ohci.c revision 1.261
1 /* $NetBSD: ohci.c,v 1.261 2016/05/06 13:03:06 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2004, 2005, 2012 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) at 9 * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca) 10 * and Matthew R. Green (mrg (at) eterna.com.au). 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * USB Open Host Controller driver. 38 * 39 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 40 * USB spec: http://www.usb.org/developers/docs/ 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.261 2016/05/06 13:03:06 skrll Exp $"); 45 46 #include "opt_usb.h" 47 48 #include <sys/param.h> 49 50 #include <sys/cpu.h> 51 #include <sys/device.h> 52 #include <sys/kernel.h> 53 #include <sys/kmem.h> 54 #include <sys/proc.h> 55 #include <sys/queue.h> 56 #include <sys/select.h> 57 #include <sys/sysctl.h> 58 #include <sys/systm.h> 59 60 #include <machine/endian.h> 61 62 #include <dev/usb/usb.h> 63 #include <dev/usb/usbdi.h> 64 #include <dev/usb/usbdivar.h> 65 #include <dev/usb/usb_mem.h> 66 #include <dev/usb/usb_quirks.h> 67 68 #include <dev/usb/ohcireg.h> 69 #include <dev/usb/ohcivar.h> 70 #include <dev/usb/usbroothub.h> 71 #include <dev/usb/usbhist.h> 72 73 #ifdef USB_DEBUG 74 #ifndef OHCI_DEBUG 75 #define ohcidebug 0 76 #else 77 static int ohcidebug = 10; 78 79 SYSCTL_SETUP(sysctl_hw_ohci_setup, "sysctl hw.ohci setup") 80 { 81 int err; 82 const struct sysctlnode *rnode; 83 const struct sysctlnode *cnode; 84 85 err = sysctl_createv(clog, 0, NULL, &rnode, 86 CTLFLAG_PERMANENT, CTLTYPE_NODE, "ohci", 87 SYSCTL_DESCR("ohci global controls"), 88 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); 89 90 if (err) 91 goto fail; 92 93 /* control debugging printfs */ 94 err = sysctl_createv(clog, 0, &rnode, &cnode, 95 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, 96 "debug", SYSCTL_DESCR("Enable debugging output"), 97 NULL, 0, &ohcidebug, sizeof(ohcidebug), CTL_CREATE, CTL_EOL); 98 if (err) 99 goto fail; 100 101 return; 102 fail: 103 aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err); 104 } 105 106 #endif /* OHCI_DEBUG */ 107 #endif /* USB_DEBUG */ 108 109 #define DPRINTF(FMT,A,B,C,D) USBHIST_LOG(ohcidebug,FMT,A,B,C,D) 110 #define DPRINTFN(N,FMT,A,B,C,D) USBHIST_LOGN(ohcidebug,N,FMT,A,B,C,D) 111 #define OHCIHIST_FUNC() USBHIST_FUNC() 112 #define OHCIHIST_CALLED(name) USBHIST_CALLED(ohcidebug) 113 114 #if BYTE_ORDER == BIG_ENDIAN 115 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 116 #else 117 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 118 #endif 119 120 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 121 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 122 #define HTOO16(val) O16TOH(val) 123 #define HTOO32(val) O32TOH(val) 124 125 struct ohci_pipe; 126 127 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 128 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 129 130 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 131 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 132 Static void ohci_free_std_locked(ohci_softc_t *, ohci_soft_td_t *); 133 134 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 135 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 136 Static void ohci_free_sitd_locked(ohci_softc_t *, 137 ohci_soft_itd_t *); 138 139 Static int ohci_alloc_std_chain(ohci_softc_t *, struct usbd_xfer *, 140 int, int); 141 Static void ohci_free_stds(ohci_softc_t *, struct ohci_xfer *); 142 143 Static void ohci_reset_std_chain(ohci_softc_t *, struct usbd_xfer *, 144 int, int, ohci_soft_td_t *, ohci_soft_td_t **); 145 146 Static usbd_status ohci_open(struct usbd_pipe *); 147 Static void ohci_poll(struct usbd_bus *); 148 Static void ohci_softintr(void *); 149 Static void ohci_rhsc(ohci_softc_t *, struct usbd_xfer *); 150 Static void ohci_rhsc_softint(void *); 151 152 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 153 ohci_soft_ed_t *); 154 155 Static void ohci_rem_ed(ohci_softc_t *, ohci_soft_ed_t *, 156 ohci_soft_ed_t *); 157 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 158 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 159 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 160 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 161 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 162 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 163 164 Static usbd_status ohci_setup_isoc(struct usbd_pipe *); 165 Static void ohci_device_isoc_enter(struct usbd_xfer *); 166 167 Static struct usbd_xfer * 168 ohci_allocx(struct usbd_bus *, unsigned int); 169 Static void ohci_freex(struct usbd_bus *, struct usbd_xfer *); 170 Static void ohci_get_lock(struct usbd_bus *, kmutex_t **); 171 Static int ohci_roothub_ctrl(struct usbd_bus *, 172 usb_device_request_t *, void *, int); 173 174 Static usbd_status ohci_root_intr_transfer(struct usbd_xfer *); 175 Static usbd_status ohci_root_intr_start(struct usbd_xfer *); 176 Static void ohci_root_intr_abort(struct usbd_xfer *); 177 Static void ohci_root_intr_close(struct usbd_pipe *); 178 Static void ohci_root_intr_done(struct usbd_xfer *); 179 180 Static int ohci_device_ctrl_init(struct usbd_xfer *); 181 Static void ohci_device_ctrl_fini(struct usbd_xfer *); 182 Static usbd_status ohci_device_ctrl_transfer(struct usbd_xfer *); 183 Static usbd_status ohci_device_ctrl_start(struct usbd_xfer *); 184 Static void ohci_device_ctrl_abort(struct usbd_xfer *); 185 Static void ohci_device_ctrl_close(struct usbd_pipe *); 186 Static void ohci_device_ctrl_done(struct usbd_xfer *); 187 188 Static int ohci_device_bulk_init(struct usbd_xfer *); 189 Static void ohci_device_bulk_fini(struct usbd_xfer *); 190 Static usbd_status ohci_device_bulk_transfer(struct usbd_xfer *); 191 Static usbd_status ohci_device_bulk_start(struct usbd_xfer *); 192 Static void ohci_device_bulk_abort(struct usbd_xfer *); 193 Static void ohci_device_bulk_close(struct usbd_pipe *); 194 Static void ohci_device_bulk_done(struct usbd_xfer *); 195 196 Static int ohci_device_intr_init(struct usbd_xfer *); 197 Static void ohci_device_intr_fini(struct usbd_xfer *); 198 Static usbd_status ohci_device_intr_transfer(struct usbd_xfer *); 199 Static usbd_status ohci_device_intr_start(struct usbd_xfer *); 200 Static void ohci_device_intr_abort(struct usbd_xfer *); 201 Static void ohci_device_intr_close(struct usbd_pipe *); 202 Static void ohci_device_intr_done(struct usbd_xfer *); 203 204 Static int ohci_device_isoc_init(struct usbd_xfer *); 205 Static void ohci_device_isoc_fini(struct usbd_xfer *); 206 Static usbd_status ohci_device_isoc_transfer(struct usbd_xfer *); 207 Static void ohci_device_isoc_abort(struct usbd_xfer *); 208 Static void ohci_device_isoc_close(struct usbd_pipe *); 209 Static void ohci_device_isoc_done(struct usbd_xfer *); 210 211 Static usbd_status ohci_device_setintr(ohci_softc_t *, 212 struct ohci_pipe *, int); 213 214 Static void ohci_timeout(void *); 215 Static void ohci_timeout_task(void *); 216 Static void ohci_rhsc_enable(void *); 217 218 Static void ohci_close_pipe(struct usbd_pipe *, ohci_soft_ed_t *); 219 Static void ohci_abort_xfer(struct usbd_xfer *, usbd_status); 220 221 Static void ohci_device_clear_toggle(struct usbd_pipe *); 222 Static void ohci_noop(struct usbd_pipe *); 223 224 #ifdef OHCI_DEBUG 225 Static void ohci_dumpregs(ohci_softc_t *); 226 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 227 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 228 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 229 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 230 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 231 #endif 232 233 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 234 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 235 #define OWRITE1(sc, r, x) \ 236 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 237 #define OWRITE2(sc, r, x) \ 238 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 239 #define OWRITE4(sc, r, x) \ 240 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 241 242 static __inline uint32_t 243 OREAD4(ohci_softc_t *sc, bus_size_t r) 244 { 245 246 OBARR(sc); 247 return bus_space_read_4(sc->iot, sc->ioh, r); 248 } 249 250 /* Reverse the bits in a value 0 .. 31 */ 251 Static uint8_t revbits[OHCI_NO_INTRS] = 252 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 253 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 254 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 255 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 256 257 struct ohci_pipe { 258 struct usbd_pipe pipe; 259 ohci_soft_ed_t *sed; 260 union { 261 ohci_soft_td_t *td; 262 ohci_soft_itd_t *itd; 263 } tail; 264 /* Info needed for different pipe kinds. */ 265 union { 266 /* Control pipe */ 267 struct { 268 usb_dma_t reqdma; 269 } ctrl; 270 /* Interrupt pipe */ 271 struct { 272 int nslots; 273 int pos; 274 } intr; 275 /* Isochronous pipe */ 276 struct isoc { 277 int next, inuse; 278 } isoc; 279 }; 280 }; 281 282 Static const struct usbd_bus_methods ohci_bus_methods = { 283 .ubm_open = ohci_open, 284 .ubm_softint = ohci_softintr, 285 .ubm_dopoll = ohci_poll, 286 .ubm_allocx = ohci_allocx, 287 .ubm_freex = ohci_freex, 288 .ubm_getlock = ohci_get_lock, 289 .ubm_rhctrl = ohci_roothub_ctrl, 290 }; 291 292 Static const struct usbd_pipe_methods ohci_root_intr_methods = { 293 .upm_transfer = ohci_root_intr_transfer, 294 .upm_start = ohci_root_intr_start, 295 .upm_abort = ohci_root_intr_abort, 296 .upm_close = ohci_root_intr_close, 297 .upm_cleartoggle = ohci_noop, 298 .upm_done = ohci_root_intr_done, 299 }; 300 301 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = { 302 .upm_init = ohci_device_ctrl_init, 303 .upm_fini = ohci_device_ctrl_fini, 304 .upm_transfer = ohci_device_ctrl_transfer, 305 .upm_start = ohci_device_ctrl_start, 306 .upm_abort = ohci_device_ctrl_abort, 307 .upm_close = ohci_device_ctrl_close, 308 .upm_cleartoggle = ohci_noop, 309 .upm_done = ohci_device_ctrl_done, 310 }; 311 312 Static const struct usbd_pipe_methods ohci_device_intr_methods = { 313 .upm_init = ohci_device_intr_init, 314 .upm_fini = ohci_device_intr_fini, 315 .upm_transfer = ohci_device_intr_transfer, 316 .upm_start = ohci_device_intr_start, 317 .upm_abort = ohci_device_intr_abort, 318 .upm_close = ohci_device_intr_close, 319 .upm_cleartoggle = ohci_device_clear_toggle, 320 .upm_done = ohci_device_intr_done, 321 }; 322 323 Static const struct usbd_pipe_methods ohci_device_bulk_methods = { 324 .upm_init = ohci_device_bulk_init, 325 .upm_fini = ohci_device_bulk_fini, 326 .upm_transfer = ohci_device_bulk_transfer, 327 .upm_start = ohci_device_bulk_start, 328 .upm_abort = ohci_device_bulk_abort, 329 .upm_close = ohci_device_bulk_close, 330 .upm_cleartoggle = ohci_device_clear_toggle, 331 .upm_done = ohci_device_bulk_done, 332 }; 333 334 Static const struct usbd_pipe_methods ohci_device_isoc_methods = { 335 .upm_init = ohci_device_isoc_init, 336 .upm_fini = ohci_device_isoc_fini, 337 .upm_transfer = ohci_device_isoc_transfer, 338 .upm_abort = ohci_device_isoc_abort, 339 .upm_close = ohci_device_isoc_close, 340 .upm_cleartoggle = ohci_noop, 341 .upm_done = ohci_device_isoc_done, 342 }; 343 344 int 345 ohci_activate(device_t self, enum devact act) 346 { 347 struct ohci_softc *sc = device_private(self); 348 349 switch (act) { 350 case DVACT_DEACTIVATE: 351 sc->sc_dying = 1; 352 return 0; 353 default: 354 return EOPNOTSUPP; 355 } 356 } 357 358 void 359 ohci_childdet(device_t self, device_t child) 360 { 361 struct ohci_softc *sc = device_private(self); 362 363 KASSERT(sc->sc_child == child); 364 sc->sc_child = NULL; 365 } 366 367 int 368 ohci_detach(struct ohci_softc *sc, int flags) 369 { 370 int rv = 0; 371 372 if (sc->sc_child != NULL) 373 rv = config_detach(sc->sc_child, flags); 374 375 if (rv != 0) 376 return rv; 377 378 callout_halt(&sc->sc_tmo_rhsc, &sc->sc_lock); 379 380 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 381 callout_destroy(&sc->sc_tmo_rhsc); 382 383 softint_disestablish(sc->sc_rhsc_si); 384 385 cv_destroy(&sc->sc_softwake_cv); 386 387 mutex_destroy(&sc->sc_lock); 388 mutex_destroy(&sc->sc_intr_lock); 389 390 if (sc->sc_hcca != NULL) 391 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 392 pool_cache_destroy(sc->sc_xferpool); 393 394 return rv; 395 } 396 397 ohci_soft_ed_t * 398 ohci_alloc_sed(ohci_softc_t *sc) 399 { 400 ohci_soft_ed_t *sed; 401 usbd_status err; 402 int i, offs; 403 usb_dma_t dma; 404 405 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 406 407 mutex_enter(&sc->sc_lock); 408 if (sc->sc_freeeds == NULL) { 409 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 410 mutex_exit(&sc->sc_lock); 411 412 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 413 OHCI_ED_ALIGN, &dma); 414 if (err) 415 return 0; 416 417 mutex_enter(&sc->sc_lock); 418 for (i = 0; i < OHCI_SED_CHUNK; i++) { 419 offs = i * OHCI_SED_SIZE; 420 sed = KERNADDR(&dma, offs); 421 sed->physaddr = DMAADDR(&dma, offs); 422 sed->dma = dma; 423 sed->offs = offs; 424 sed->next = sc->sc_freeeds; 425 sc->sc_freeeds = sed; 426 } 427 } 428 sed = sc->sc_freeeds; 429 sc->sc_freeeds = sed->next; 430 mutex_exit(&sc->sc_lock); 431 432 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 433 sed->next = 0; 434 return sed; 435 } 436 437 static inline void 438 ohci_free_sed_locked(ohci_softc_t *sc, ohci_soft_ed_t *sed) 439 { 440 441 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 442 443 sed->next = sc->sc_freeeds; 444 sc->sc_freeeds = sed; 445 } 446 447 void 448 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 449 { 450 451 mutex_enter(&sc->sc_lock); 452 ohci_free_sed_locked(sc, sed); 453 mutex_exit(&sc->sc_lock); 454 } 455 456 ohci_soft_td_t * 457 ohci_alloc_std(ohci_softc_t *sc) 458 { 459 ohci_soft_td_t *std; 460 usbd_status err; 461 int i, offs; 462 usb_dma_t dma; 463 464 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 465 466 mutex_enter(&sc->sc_lock); 467 if (sc->sc_freetds == NULL) { 468 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 469 mutex_exit(&sc->sc_lock); 470 471 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 472 OHCI_TD_ALIGN, &dma); 473 if (err) 474 return NULL; 475 476 mutex_enter(&sc->sc_lock); 477 for (i = 0; i < OHCI_STD_CHUNK; i++) { 478 offs = i * OHCI_STD_SIZE; 479 std = KERNADDR(&dma, offs); 480 std->physaddr = DMAADDR(&dma, offs); 481 std->dma = dma; 482 std->offs = offs; 483 std->nexttd = sc->sc_freetds; 484 sc->sc_freetds = std; 485 } 486 } 487 488 std = sc->sc_freetds; 489 sc->sc_freetds = std->nexttd; 490 mutex_exit(&sc->sc_lock); 491 492 memset(&std->td, 0, sizeof(ohci_td_t)); 493 std->nexttd = NULL; 494 std->xfer = NULL; 495 496 return std; 497 } 498 499 void 500 ohci_free_std_locked(ohci_softc_t *sc, ohci_soft_td_t *std) 501 { 502 503 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 504 505 std->nexttd = sc->sc_freetds; 506 sc->sc_freetds = std; 507 } 508 509 void 510 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 511 { 512 513 mutex_enter(&sc->sc_lock); 514 ohci_free_std_locked(sc, std); 515 mutex_exit(&sc->sc_lock); 516 } 517 518 Static int 519 ohci_alloc_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, int length, int rd) 520 { 521 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 522 uint16_t flags = xfer->ux_flags; 523 524 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 525 526 DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d", 527 xfer->ux_pipe->up_dev->ud_addr, 528 UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress), 529 length, xfer->ux_pipe->up_dev->ud_speed); 530 531 ASSERT_SLEEPABLE(); 532 KASSERT(length != 0 || (!rd && (flags & USBD_FORCE_SHORT_XFER))); 533 534 size_t nstd = (!rd && (flags & USBD_FORCE_SHORT_XFER)) ? 1 : 0; 535 nstd += ((length + OHCI_PAGE_SIZE - 1) / OHCI_PAGE_SIZE); 536 ox->ox_stds = kmem_zalloc(sizeof(ohci_soft_td_t *) * nstd, 537 KM_SLEEP); 538 ox->ox_nstd = nstd; 539 540 DPRINTFN(8, "xfer %p nstd %d", xfer, nstd, 0, 0); 541 542 for (size_t j = 0; j < ox->ox_nstd;) { 543 ohci_soft_td_t *cur = ohci_alloc_std(sc); 544 if (cur == NULL) 545 goto nomem; 546 547 ox->ox_stds[j++] = cur; 548 cur->xfer = xfer; 549 cur->flags = 0; 550 } 551 552 return 0; 553 554 nomem: 555 ohci_free_stds(sc, ox); 556 kmem_free(ox->ox_stds, sizeof(ohci_soft_td_t *) * nstd); 557 558 return ENOMEM; 559 } 560 561 Static void 562 ohci_free_stds(ohci_softc_t *sc, struct ohci_xfer *ox) 563 { 564 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 565 DPRINTF("ox=%p", ox, 0, 0, 0); 566 567 mutex_enter(&sc->sc_lock); 568 for (size_t i = 0; i < ox->ox_nstd; i++) { 569 ohci_soft_td_t *std = ox->ox_stds[i]; 570 if (std == NULL) 571 break; 572 ohci_free_std_locked(sc, std); 573 } 574 mutex_exit(&sc->sc_lock); 575 } 576 577 void 578 ohci_reset_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, 579 int alen, int rd, ohci_soft_td_t *sp, ohci_soft_td_t **ep) 580 { 581 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 582 ohci_soft_td_t *next, *cur; 583 int len, curlen; 584 usb_dma_t *dma = &xfer->ux_dmabuf; 585 uint16_t flags = xfer->ux_flags; 586 587 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 588 DPRINTF("start len=%d", alen, 0, 0, 0); 589 590 KASSERT(mutex_owned(&sc->sc_lock)); 591 592 DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d", 593 xfer->ux_pipe->up_dev->ud_addr, 594 UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress), 595 alen, xfer->ux_pipe->up_dev->ud_speed); 596 597 KASSERT(sp); 598 599 int mps = UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize); 600 601 /* 602 * Assign next for the len == 0 case where we don't go through the 603 * main loop. 604 */ 605 len = alen; 606 cur = next = sp; 607 608 usb_syncmem(dma, 0, len, 609 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 610 const uint32_t tdflags = HTOO32( 611 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 612 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 613 614 size_t curoffs = 0; 615 for (size_t j = 1; len != 0;) { 616 if (j == ox->ox_nstd) 617 next = NULL; 618 else 619 next = ox->ox_stds[j++]; 620 KASSERT(next != cur); 621 622 curlen = 0; 623 ohci_physaddr_t sdataphys = DMAADDR(dma, curoffs); 624 ohci_physaddr_t edataphys = DMAADDR(dma, curoffs + len - 1); 625 626 ohci_physaddr_t sphyspg = OHCI_PAGE(sdataphys); 627 ohci_physaddr_t ephyspg = OHCI_PAGE(edataphys); 628 /* 629 * The OHCI hardware can handle at most one page 630 * crossing per TD 631 */ 632 curlen = len; 633 if (!(sphyspg == ephyspg || sphyspg + 1 == ephyspg)) { 634 /* must use multiple TDs, fill as much as possible. */ 635 curlen = 2 * OHCI_PAGE_SIZE - 636 (sdataphys & (OHCI_PAGE_SIZE - 1)); 637 /* the length must be a multiple of the max size */ 638 curlen -= curlen % mps; 639 } 640 KASSERT(curlen != 0); 641 DPRINTFN(4, "sdataphys=0x%08x edataphys=0x%08x " 642 "len=%d curlen=%d", sdataphys, edataphys, len, curlen); 643 644 cur->td.td_flags = tdflags; 645 cur->td.td_cbp = HTOO32(sdataphys); 646 cur->td.td_be = HTOO32(edataphys); 647 cur->td.td_nexttd = (next != NULL) ? HTOO32(next->physaddr) : 0; 648 cur->nexttd = next; 649 cur->len = curlen; 650 cur->flags = OHCI_ADD_LEN; 651 cur->xfer = xfer; 652 ohci_hash_add_td(sc, cur); 653 654 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 655 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 656 657 curoffs += curlen; 658 len -= curlen; 659 660 if (len != 0) { 661 KASSERT(next != NULL); 662 DPRINTFN(10, "extend chain", 0, 0, 0, 0); 663 cur = next; 664 } 665 } 666 cur->td.td_flags |= 667 (xfer->ux_flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0); 668 669 if (!rd && 670 (flags & USBD_FORCE_SHORT_XFER) && 671 alen % mps == 0) { 672 /* Force a 0 length transfer at the end. */ 673 674 KASSERT(next != NULL); 675 cur = next; 676 677 cur->td.td_flags = tdflags; 678 cur->td.td_cbp = 0; /* indicate 0 length packet */ 679 cur->td.td_nexttd = 0; 680 cur->td.td_be = ~0; 681 cur->nexttd = NULL; 682 cur->len = 0; 683 cur->flags = 0; 684 cur->xfer = xfer; 685 ohci_hash_add_td(sc, cur); 686 687 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 688 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 689 DPRINTFN(2, "add 0 xfer", 0, 0, 0, 0); 690 } 691 *ep = cur; 692 } 693 694 ohci_soft_itd_t * 695 ohci_alloc_sitd(ohci_softc_t *sc) 696 { 697 ohci_soft_itd_t *sitd; 698 usbd_status err; 699 int i, offs; 700 usb_dma_t dma; 701 702 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 703 704 mutex_enter(&sc->sc_lock); 705 if (sc->sc_freeitds == NULL) { 706 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 707 mutex_exit(&sc->sc_lock); 708 709 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 710 OHCI_ITD_ALIGN, &dma); 711 if (err) 712 return NULL; 713 mutex_enter(&sc->sc_lock); 714 for (i = 0; i < OHCI_SITD_CHUNK; i++) { 715 offs = i * OHCI_SITD_SIZE; 716 sitd = KERNADDR(&dma, offs); 717 sitd->physaddr = DMAADDR(&dma, offs); 718 sitd->dma = dma; 719 sitd->offs = offs; 720 sitd->nextitd = sc->sc_freeitds; 721 sc->sc_freeitds = sitd; 722 } 723 } 724 725 sitd = sc->sc_freeitds; 726 sc->sc_freeitds = sitd->nextitd; 727 mutex_exit(&sc->sc_lock); 728 729 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 730 sitd->nextitd = NULL; 731 sitd->xfer = NULL; 732 733 #ifdef DIAGNOSTIC 734 sitd->isdone = true; 735 #endif 736 737 return sitd; 738 } 739 740 Static void 741 ohci_free_sitd_locked(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 742 { 743 744 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 745 DPRINTFN(10, "sitd=%p", sitd, 0, 0, 0); 746 747 KASSERT(sitd->isdone); 748 #ifdef DIAGNOSTIC 749 /* Warn double free */ 750 sitd->isdone = false; 751 #endif 752 753 sitd->nextitd = sc->sc_freeitds; 754 sc->sc_freeitds = sitd; 755 } 756 757 void 758 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 759 { 760 761 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 762 763 mutex_enter(&sc->sc_lock); 764 ohci_free_sitd_locked(sc, sitd); 765 mutex_exit(&sc->sc_lock); 766 } 767 768 int 769 ohci_init(ohci_softc_t *sc) 770 { 771 ohci_soft_ed_t *sed, *psed; 772 usbd_status err; 773 int i; 774 uint32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca /*, descb */; 775 776 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 777 778 aprint_normal_dev(sc->sc_dev, ""); 779 780 sc->sc_hcca = NULL; 781 callout_init(&sc->sc_tmo_rhsc, CALLOUT_MPSAFE); 782 783 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 784 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_USB); 785 cv_init(&sc->sc_softwake_cv, "ohciab"); 786 787 sc->sc_rhsc_si = softint_establish(SOFTINT_NET | SOFTINT_MPSAFE, 788 ohci_rhsc_softint, sc); 789 790 for (i = 0; i < OHCI_HASH_SIZE; i++) 791 LIST_INIT(&sc->sc_hash_tds[i]); 792 for (i = 0; i < OHCI_HASH_SIZE; i++) 793 LIST_INIT(&sc->sc_hash_itds[i]); 794 795 sc->sc_xferpool = pool_cache_init(sizeof(struct ohci_xfer), 0, 0, 0, 796 "ohcixfer", NULL, IPL_USB, NULL, NULL, NULL); 797 798 rev = OREAD4(sc, OHCI_REVISION); 799 aprint_normal("OHCI version %d.%d%s\n", 800 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 801 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 802 803 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 804 aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n"); 805 sc->sc_bus.ub_revision = USBREV_UNKNOWN; 806 return -1; 807 } 808 sc->sc_bus.ub_revision = USBREV_1_0; 809 sc->sc_bus.ub_usedma = true; 810 811 /* XXX determine alignment by R/W */ 812 /* Allocate the HCCA area. */ 813 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 814 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 815 if (err) { 816 sc->sc_hcca = NULL; 817 return err; 818 } 819 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 820 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 821 822 sc->sc_eintrs = OHCI_NORMAL_INTRS; 823 824 /* Allocate dummy ED that starts the control list. */ 825 sc->sc_ctrl_head = ohci_alloc_sed(sc); 826 if (sc->sc_ctrl_head == NULL) { 827 err = ENOMEM; 828 goto bad1; 829 } 830 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 831 832 /* Allocate dummy ED that starts the bulk list. */ 833 sc->sc_bulk_head = ohci_alloc_sed(sc); 834 if (sc->sc_bulk_head == NULL) { 835 err = ENOMEM; 836 goto bad2; 837 } 838 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 839 usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs, 840 sizeof(sc->sc_bulk_head->ed), 841 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 842 843 /* Allocate dummy ED that starts the isochronous list. */ 844 sc->sc_isoc_head = ohci_alloc_sed(sc); 845 if (sc->sc_isoc_head == NULL) { 846 err = ENOMEM; 847 goto bad3; 848 } 849 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 850 usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs, 851 sizeof(sc->sc_isoc_head->ed), 852 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 853 854 /* Allocate all the dummy EDs that make up the interrupt tree. */ 855 for (i = 0; i < OHCI_NO_EDS; i++) { 856 sed = ohci_alloc_sed(sc); 857 if (sed == NULL) { 858 while (--i >= 0) 859 ohci_free_sed(sc, sc->sc_eds[i]); 860 err = ENOMEM; 861 goto bad4; 862 } 863 /* All ED fields are set to 0. */ 864 sc->sc_eds[i] = sed; 865 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 866 if (i != 0) 867 psed = sc->sc_eds[(i-1) / 2]; 868 else 869 psed= sc->sc_isoc_head; 870 sed->next = psed; 871 sed->ed.ed_nexted = HTOO32(psed->physaddr); 872 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 873 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 874 } 875 /* 876 * Fill HCCA interrupt table. The bit reversal is to get 877 * the tree set up properly to spread the interrupts. 878 */ 879 for (i = 0; i < OHCI_NO_INTRS; i++) 880 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 881 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 882 usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE, 883 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 884 885 #ifdef OHCI_DEBUG 886 DPRINTFN(15, "--- dump start ---", 0, 0, 0 ,0); 887 if (ohcidebug >= 15) { 888 for (i = 0; i < OHCI_NO_EDS; i++) { 889 DPRINTFN(15, "ed#%d ", i, 0, 0, 0); 890 ohci_dump_ed(sc, sc->sc_eds[i]); 891 } 892 DPRINTFN(15, "iso", 0, 0, 0 ,0); 893 ohci_dump_ed(sc, sc->sc_isoc_head); 894 } 895 DPRINTFN(15, "--- dump end ---", 0, 0, 0 ,0); 896 #endif 897 898 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 899 ctl = OREAD4(sc, OHCI_CONTROL); 900 rwc = ctl & OHCI_RWC; 901 fm = OREAD4(sc, OHCI_FM_INTERVAL); 902 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 903 /* descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); */ 904 905 /* Determine in what context we are running. */ 906 if (ctl & OHCI_IR) { 907 /* SMM active, request change */ 908 DPRINTF("SMM active, request owner change", 0, 0, 0, 0); 909 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 910 (OHCI_OC | OHCI_MIE)) 911 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 912 s = OREAD4(sc, OHCI_COMMAND_STATUS); 913 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 914 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 915 usb_delay_ms(&sc->sc_bus, 1); 916 ctl = OREAD4(sc, OHCI_CONTROL); 917 } 918 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 919 if ((ctl & OHCI_IR) == 0) { 920 aprint_error_dev(sc->sc_dev, 921 "SMM does not respond, resetting\n"); 922 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 923 goto reset; 924 } 925 #if 0 926 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 927 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 928 /* BIOS started controller. */ 929 DPRINTF("BIOS active", 0, 0, 0, 0); 930 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 931 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 932 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 933 } 934 #endif 935 } else { 936 DPRINTF("cold started", 0 ,0 ,0 ,0); 937 reset: 938 /* Controller was cold started. */ 939 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 940 } 941 942 /* 943 * This reset should not be necessary according to the OHCI spec, but 944 * without it some controllers do not start. 945 */ 946 DPRINTF("sc %p: resetting", sc, 0, 0, 0); 947 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 948 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 949 950 /* We now own the host controller and the bus has been reset. */ 951 952 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 953 /* Nominal time for a reset is 10 us. */ 954 for (i = 0; i < 10; i++) { 955 delay(10); 956 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 957 if (!hcr) 958 break; 959 } 960 if (hcr) { 961 aprint_error_dev(sc->sc_dev, "reset timeout\n"); 962 err = EIO; 963 goto bad5; 964 } 965 #ifdef OHCI_DEBUG 966 if (ohcidebug >= 15) 967 ohci_dumpregs(sc); 968 #endif 969 970 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 971 972 /* Set up HC registers. */ 973 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 974 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 975 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 976 /* disable all interrupts and then switch on all desired interrupts */ 977 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 978 /* switch on desired functional features */ 979 ctl = OREAD4(sc, OHCI_CONTROL); 980 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 981 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 982 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 983 /* And finally start it! */ 984 OWRITE4(sc, OHCI_CONTROL, ctl); 985 986 /* 987 * The controller is now OPERATIONAL. Set a some final 988 * registers that should be set earlier, but that the 989 * controller ignores when in the SUSPEND state. 990 */ 991 ival = OHCI_GET_IVAL(fm); 992 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 993 fm |= OHCI_FSMPS(ival) | ival; 994 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 995 per = OHCI_PERIODIC(ival); /* 90% periodic */ 996 OWRITE4(sc, OHCI_PERIODIC_START, per); 997 998 if (sc->sc_flags & OHCIF_SUPERIO) { 999 /* no overcurrent protection */ 1000 desca |= OHCI_NOCP; 1001 /* 1002 * Clear NoPowerSwitching and PowerOnToPowerGoodTime meaning 1003 * that 1004 * - ports are always power switched 1005 * - don't wait for powered root hub port 1006 */ 1007 desca &= ~(__SHIFTIN(0xff, OHCI_POTPGT_MASK) | OHCI_NPS); 1008 } 1009 1010 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 1011 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 1012 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 1013 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 1014 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 1015 1016 /* 1017 * The AMD756 requires a delay before re-reading the register, 1018 * otherwise it will occasionally report 0 ports. 1019 */ 1020 sc->sc_noport = 0; 1021 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 1022 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 1023 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 1024 } 1025 1026 #ifdef OHCI_DEBUG 1027 if (ohcidebug >= 5) 1028 ohci_dumpregs(sc); 1029 #endif 1030 1031 /* Set up the bus struct. */ 1032 sc->sc_bus.ub_methods = &ohci_bus_methods; 1033 sc->sc_bus.ub_pipesize = sizeof(struct ohci_pipe); 1034 1035 sc->sc_control = sc->sc_intre = 0; 1036 1037 /* Finally, turn on interrupts. */ 1038 DPRINTF("enabling %#x", sc->sc_eintrs | OHCI_MIE, 0, 0, 0); 1039 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 1040 1041 return 0; 1042 1043 bad5: 1044 for (i = 0; i < OHCI_NO_EDS; i++) 1045 ohci_free_sed(sc, sc->sc_eds[i]); 1046 bad4: 1047 ohci_free_sed(sc, sc->sc_isoc_head); 1048 bad3: 1049 ohci_free_sed(sc, sc->sc_bulk_head); 1050 bad2: 1051 ohci_free_sed(sc, sc->sc_ctrl_head); 1052 bad1: 1053 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 1054 sc->sc_hcca = NULL; 1055 return err; 1056 } 1057 1058 struct usbd_xfer * 1059 ohci_allocx(struct usbd_bus *bus, unsigned int nframes) 1060 { 1061 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1062 struct usbd_xfer *xfer; 1063 1064 xfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT); 1065 if (xfer != NULL) { 1066 memset(xfer, 0, sizeof(struct ohci_xfer)); 1067 #ifdef DIAGNOSTIC 1068 xfer->ux_state = XFER_BUSY; 1069 #endif 1070 } 1071 return xfer; 1072 } 1073 1074 void 1075 ohci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 1076 { 1077 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1078 1079 KASSERTMSG(xfer->ux_state == XFER_BUSY, 1080 "xfer=%p not busy, 0x%08x\n", xfer, xfer->ux_state); 1081 #ifdef DIAGNOSTIC 1082 xfer->ux_state = XFER_FREE; 1083 #endif 1084 pool_cache_put(sc->sc_xferpool, xfer); 1085 } 1086 1087 Static void 1088 ohci_get_lock(struct usbd_bus *bus, kmutex_t **lock) 1089 { 1090 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1091 1092 *lock = &sc->sc_lock; 1093 } 1094 1095 /* 1096 * Shut down the controller when the system is going down. 1097 */ 1098 bool 1099 ohci_shutdown(device_t self, int flags) 1100 { 1101 ohci_softc_t *sc = device_private(self); 1102 1103 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1104 1105 DPRINTF("stopping the HC", 0, 0, 0, 0); 1106 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1107 return true; 1108 } 1109 1110 bool 1111 ohci_resume(device_t dv, const pmf_qual_t *qual) 1112 { 1113 ohci_softc_t *sc = device_private(dv); 1114 uint32_t ctl; 1115 1116 mutex_spin_enter(&sc->sc_intr_lock); 1117 sc->sc_bus.ub_usepolling++; 1118 mutex_spin_exit(&sc->sc_intr_lock); 1119 1120 /* Some broken BIOSes do not recover these values */ 1121 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1122 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, 1123 sc->sc_ctrl_head->physaddr); 1124 OWRITE4(sc, OHCI_BULK_HEAD_ED, 1125 sc->sc_bulk_head->physaddr); 1126 if (sc->sc_intre) 1127 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre & 1128 (OHCI_ALL_INTRS | OHCI_MIE)); 1129 if (sc->sc_control) 1130 ctl = sc->sc_control; 1131 else 1132 ctl = OREAD4(sc, OHCI_CONTROL); 1133 ctl |= OHCI_HCFS_RESUME; 1134 OWRITE4(sc, OHCI_CONTROL, ctl); 1135 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1136 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1137 OWRITE4(sc, OHCI_CONTROL, ctl); 1138 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1139 sc->sc_control = sc->sc_intre = 0; 1140 1141 mutex_spin_enter(&sc->sc_intr_lock); 1142 sc->sc_bus.ub_usepolling--; 1143 mutex_spin_exit(&sc->sc_intr_lock); 1144 1145 return true; 1146 } 1147 1148 bool 1149 ohci_suspend(device_t dv, const pmf_qual_t *qual) 1150 { 1151 ohci_softc_t *sc = device_private(dv); 1152 uint32_t ctl; 1153 1154 mutex_spin_enter(&sc->sc_intr_lock); 1155 sc->sc_bus.ub_usepolling++; 1156 mutex_spin_exit(&sc->sc_intr_lock); 1157 1158 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1159 if (sc->sc_control == 0) { 1160 /* 1161 * Preserve register values, in case that BIOS 1162 * does not recover them. 1163 */ 1164 sc->sc_control = ctl; 1165 sc->sc_intre = OREAD4(sc, 1166 OHCI_INTERRUPT_ENABLE); 1167 } 1168 ctl |= OHCI_HCFS_SUSPEND; 1169 OWRITE4(sc, OHCI_CONTROL, ctl); 1170 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1171 1172 mutex_spin_enter(&sc->sc_intr_lock); 1173 sc->sc_bus.ub_usepolling--; 1174 mutex_spin_exit(&sc->sc_intr_lock); 1175 1176 return true; 1177 } 1178 1179 #ifdef OHCI_DEBUG 1180 void 1181 ohci_dumpregs(ohci_softc_t *sc) 1182 { 1183 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1184 1185 DPRINTF("rev=0x%08x control=0x%08x command=0x%08x", 1186 OREAD4(sc, OHCI_REVISION), 1187 OREAD4(sc, OHCI_CONTROL), 1188 OREAD4(sc, OHCI_COMMAND_STATUS), 0); 1189 DPRINTF(" intrstat=0x%08x intre=0x%08x intrd=0x%08x", 1190 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1191 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1192 OREAD4(sc, OHCI_INTERRUPT_DISABLE), 0); 1193 DPRINTF(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x", 1194 OREAD4(sc, OHCI_HCCA), 1195 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1196 OREAD4(sc, OHCI_CONTROL_HEAD_ED), 0); 1197 DPRINTF(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x", 1198 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1199 OREAD4(sc, OHCI_BULK_HEAD_ED), 1200 OREAD4(sc, OHCI_BULK_CURRENT_ED) ,0); 1201 DPRINTF(" done=0x%08x fmival=0x%08x fmrem=0x%08x", 1202 OREAD4(sc, OHCI_DONE_HEAD), 1203 OREAD4(sc, OHCI_FM_INTERVAL), 1204 OREAD4(sc, OHCI_FM_REMAINING), 0); 1205 DPRINTF(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x", 1206 OREAD4(sc, OHCI_FM_NUMBER), 1207 OREAD4(sc, OHCI_PERIODIC_START), 1208 OREAD4(sc, OHCI_LS_THRESHOLD), 0); 1209 DPRINTF(" desca=0x%08x descb=0x%08x stat=0x%08x", 1210 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1211 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1212 OREAD4(sc, OHCI_RH_STATUS), 0); 1213 DPRINTF(" port1=0x%08x port2=0x%08x", 1214 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1215 OREAD4(sc, OHCI_RH_PORT_STATUS(2)), 0, 0); 1216 DPRINTF(" HCCA: frame_number=0x%04x done_head=0x%08x", 1217 O32TOH(sc->sc_hcca->hcca_frame_number), 1218 O32TOH(sc->sc_hcca->hcca_done_head), 0, 0); 1219 } 1220 #endif 1221 1222 Static int ohci_intr1(ohci_softc_t *); 1223 1224 int 1225 ohci_intr(void *p) 1226 { 1227 ohci_softc_t *sc = p; 1228 int ret = 0; 1229 1230 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1231 1232 if (sc == NULL) 1233 return 0; 1234 1235 mutex_spin_enter(&sc->sc_intr_lock); 1236 1237 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1238 goto done; 1239 1240 /* If we get an interrupt while polling, then just ignore it. */ 1241 if (sc->sc_bus.ub_usepolling) { 1242 DPRINTFN(16, "ignored interrupt while polling", 0, 0, 0, 0); 1243 /* for level triggered intrs, should do something to ack */ 1244 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1245 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1246 1247 goto done; 1248 } 1249 1250 ret = ohci_intr1(sc); 1251 1252 done: 1253 mutex_spin_exit(&sc->sc_intr_lock); 1254 return ret; 1255 } 1256 1257 Static int 1258 ohci_intr1(ohci_softc_t *sc) 1259 { 1260 uint32_t intrs, eintrs; 1261 1262 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1263 1264 /* In case the interrupt occurs before initialization has completed. */ 1265 if (sc == NULL || sc->sc_hcca == NULL) { 1266 #ifdef DIAGNOSTIC 1267 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1268 #endif 1269 return 0; 1270 } 1271 1272 KASSERT(mutex_owned(&sc->sc_intr_lock)); 1273 1274 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1275 if (!intrs) 1276 return 0; 1277 1278 /* Acknowledge */ 1279 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); 1280 eintrs = intrs & sc->sc_eintrs; 1281 DPRINTFN(7, "sc=%p", sc, 0, 0, 0); 1282 DPRINTFN(7, "intrs=%#x(%#x) eintrs=%#x(%#x)", 1283 intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), eintrs, 1284 sc->sc_eintrs); 1285 1286 if (!eintrs) { 1287 return 0; 1288 } 1289 1290 if (eintrs & OHCI_SO) { 1291 sc->sc_overrun_cnt++; 1292 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1293 printf("%s: %u scheduling overruns\n", 1294 device_xname(sc->sc_dev), sc->sc_overrun_cnt); 1295 sc->sc_overrun_cnt = 0; 1296 } 1297 /* XXX do what */ 1298 eintrs &= ~OHCI_SO; 1299 } 1300 if (eintrs & OHCI_WDH) { 1301 /* 1302 * We block the interrupt below, and reenable it later from 1303 * ohci_softintr(). 1304 */ 1305 usb_schedsoftintr(&sc->sc_bus); 1306 } 1307 if (eintrs & OHCI_RD) { 1308 DPRINTFN(5, "resume detect", sc, 0, 0, 0); 1309 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1310 /* XXX process resume detect */ 1311 } 1312 if (eintrs & OHCI_UE) { 1313 DPRINTFN(5, "unrecoverable error", sc, 0, 0, 0); 1314 printf("%s: unrecoverable error, controller halted\n", 1315 device_xname(sc->sc_dev)); 1316 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1317 /* XXX what else */ 1318 } 1319 if (eintrs & OHCI_RHSC) { 1320 /* 1321 * We block the interrupt below, and reenable it later from 1322 * a timeout. 1323 */ 1324 softint_schedule(sc->sc_rhsc_si); 1325 } 1326 1327 if (eintrs != 0) { 1328 /* Block unprocessed interrupts. */ 1329 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1330 sc->sc_eintrs &= ~eintrs; 1331 DPRINTF("sc %p blocking intrs 0x%x", sc, eintrs, 0, 0); 1332 } 1333 1334 return 1; 1335 } 1336 1337 void 1338 ohci_rhsc_enable(void *v_sc) 1339 { 1340 ohci_softc_t *sc = v_sc; 1341 1342 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1343 DPRINTF("sc %p", sc, 0, 0, 0); 1344 mutex_spin_enter(&sc->sc_intr_lock); 1345 sc->sc_eintrs |= OHCI_RHSC; 1346 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1347 mutex_spin_exit(&sc->sc_intr_lock); 1348 } 1349 1350 #ifdef OHCI_DEBUG 1351 const char *ohci_cc_strs[] = { 1352 "NO_ERROR", 1353 "CRC", 1354 "BIT_STUFFING", 1355 "DATA_TOGGLE_MISMATCH", 1356 "STALL", 1357 "DEVICE_NOT_RESPONDING", 1358 "PID_CHECK_FAILURE", 1359 "UNEXPECTED_PID", 1360 "DATA_OVERRUN", 1361 "DATA_UNDERRUN", 1362 "BUFFER_OVERRUN", 1363 "BUFFER_UNDERRUN", 1364 "reserved", 1365 "reserved", 1366 "NOT_ACCESSED", 1367 "NOT_ACCESSED", 1368 }; 1369 #endif 1370 1371 void 1372 ohci_softintr(void *v) 1373 { 1374 struct usbd_bus *bus = v; 1375 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1376 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1377 ohci_soft_td_t *std, *sdone, *stdnext; 1378 struct usbd_xfer *xfer; 1379 struct ohci_pipe *opipe; 1380 int len, cc; 1381 int i, j, actlen, iframes, uedir; 1382 ohci_physaddr_t done; 1383 1384 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1385 1386 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1387 1388 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1389 sizeof(sc->sc_hcca->hcca_done_head), 1390 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1391 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1392 sc->sc_hcca->hcca_done_head = 0; 1393 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1394 sizeof(sc->sc_hcca->hcca_done_head), 1395 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1396 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1397 sc->sc_eintrs |= OHCI_WDH; 1398 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1399 1400 /* Reverse the done list. */ 1401 for (sdone = NULL, sidone = NULL; done != 0; ) { 1402 std = ohci_hash_find_td(sc, done); 1403 if (std != NULL) { 1404 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1405 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1406 std->dnext = sdone; 1407 done = O32TOH(std->td.td_nexttd); 1408 sdone = std; 1409 DPRINTFN(10, "add TD %p", std, 0, 0, 0); 1410 continue; 1411 } 1412 sitd = ohci_hash_find_itd(sc, done); 1413 if (sitd != NULL) { 1414 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1415 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1416 sitd->dnext = sidone; 1417 done = O32TOH(sitd->itd.itd_nextitd); 1418 sidone = sitd; 1419 DPRINTFN(5, "add ITD %p", sitd, 0, 0, 0); 1420 continue; 1421 } 1422 DPRINTFN(10, "addr %p not found", done, 0, 0, 0); 1423 device_printf(sc->sc_dev, "WARNING: addr 0x%08lx not found\n", 1424 (u_long)done); 1425 break; 1426 } 1427 1428 DPRINTFN(10, "sdone=%p sidone=%p", sdone, sidone, 0, 0); 1429 DPRINTFN(10, "--- TD dump start ---", 0, 0, 0, 0); 1430 #ifdef OHCI_DEBUG 1431 if (ohcidebug >= 10) { 1432 for (std = sdone; std; std = std->dnext) 1433 ohci_dump_td(sc, std); 1434 } 1435 #endif 1436 DPRINTFN(10, "--- TD dump end ---", 0, 0, 0, 0); 1437 1438 for (std = sdone; std; std = stdnext) { 1439 xfer = std->xfer; 1440 stdnext = std->dnext; 1441 DPRINTFN(10, "std=%p xfer=%p hcpriv=%p", std, xfer, 1442 xfer ? xfer->ux_hcpriv : 0, 0); 1443 if (xfer == NULL) { 1444 /* 1445 * xfer == NULL: There seems to be no xfer associated 1446 * with this TD. It is tailp that happened to end up on 1447 * the done queue. 1448 * Shouldn't happen, but some chips are broken(?). 1449 */ 1450 continue; 1451 } 1452 if (xfer->ux_status == USBD_CANCELLED || 1453 xfer->ux_status == USBD_TIMEOUT) { 1454 DPRINTF("cancel/timeout %p", xfer, 0, 0, 0); 1455 /* Handled by abort routine. */ 1456 continue; 1457 } 1458 callout_stop(&xfer->ux_callout); 1459 1460 len = std->len; 1461 if (std->td.td_cbp != 0) 1462 len -= O32TOH(std->td.td_be) - 1463 O32TOH(std->td.td_cbp) + 1; 1464 DPRINTFN(10, "len=%d, flags=0x%x", len, std->flags, 0, 0); 1465 if (std->flags & OHCI_ADD_LEN) 1466 xfer->ux_actlen += len; 1467 1468 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1469 if (cc == OHCI_CC_NO_ERROR) { 1470 ohci_hash_rem_td(sc, std); 1471 if (std->flags & OHCI_CALL_DONE) { 1472 xfer->ux_status = USBD_NORMAL_COMPLETION; 1473 usb_transfer_complete(xfer); 1474 } 1475 } else { 1476 /* 1477 * Endpoint is halted. First unlink all the TDs 1478 * belonging to the failed transfer, and then restart 1479 * the endpoint. 1480 */ 1481 ohci_soft_td_t *p, *n; 1482 opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1483 1484 DPRINTFN(10, "error cc=%d", cc, 0, 0, 0); 1485 1486 /* remove xfer's TDs from the hash */ 1487 for (p = std; p->xfer == xfer; p = n) { 1488 n = p->nexttd; 1489 ohci_hash_rem_td(sc, p); 1490 } 1491 1492 ohci_soft_ed_t *sed = opipe->sed; 1493 1494 /* clear halt and TD chain */ 1495 sed->ed.ed_headp = HTOO32(p->physaddr); 1496 usb_syncmem(&sed->dma, 1497 sed->offs + offsetof(ohci_ed_t, ed_headp), 1498 sizeof(sed->ed.ed_headp), 1499 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1500 1501 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1502 1503 if (cc == OHCI_CC_DATA_UNDERRUN) 1504 xfer->ux_status = USBD_NORMAL_COMPLETION; 1505 else if (cc == OHCI_CC_STALL) 1506 xfer->ux_status = USBD_STALLED; 1507 else 1508 xfer->ux_status = USBD_IOERROR; 1509 usb_transfer_complete(xfer); 1510 } 1511 } 1512 DPRINTFN(10, "--- ITD dump start ---", 0, 0, 0, 0); 1513 #ifdef OHCI_DEBUG 1514 if (ohcidebug >= 10) { 1515 for (sitd = sidone; sitd; sitd = sitd->dnext) 1516 ohci_dump_itd(sc, sitd); 1517 } 1518 #endif 1519 DPRINTFN(10, "--- ITD dump end ---", 0, 0, 0, 0); 1520 1521 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1522 xfer = sitd->xfer; 1523 sitdnext = sitd->dnext; 1524 DPRINTFN(1, "sitd=%p xfer=%p hcpriv=%p", sitd, xfer, 1525 xfer ? xfer->ux_hcpriv : 0, 0); 1526 if (xfer == NULL) 1527 continue; 1528 if (xfer->ux_status == USBD_CANCELLED || 1529 xfer->ux_status == USBD_TIMEOUT) { 1530 DPRINTF("cancel/timeout %p", xfer, 0, 0, 0); 1531 /* Handled by abort routine. */ 1532 continue; 1533 } 1534 KASSERT(!sitd->isdone); 1535 #ifdef DIAGNOSTIC 1536 sitd->isdone = true; 1537 #endif 1538 if (sitd->flags & OHCI_CALL_DONE) { 1539 ohci_soft_itd_t *next; 1540 1541 opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1542 opipe->isoc.inuse -= xfer->ux_nframes; 1543 uedir = UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc-> 1544 bEndpointAddress); 1545 xfer->ux_status = USBD_NORMAL_COMPLETION; 1546 actlen = 0; 1547 for (i = 0, sitd = xfer->ux_hcpriv;; 1548 sitd = next) { 1549 next = sitd->nextitd; 1550 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1551 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1552 xfer->ux_status = USBD_IOERROR; 1553 /* For input, update frlengths with actual */ 1554 /* XXX anything necessary for output? */ 1555 if (uedir == UE_DIR_IN && 1556 xfer->ux_status == USBD_NORMAL_COMPLETION) { 1557 iframes = OHCI_ITD_GET_FC(O32TOH( 1558 sitd->itd.itd_flags)); 1559 for (j = 0; j < iframes; i++, j++) { 1560 len = O16TOH(sitd-> 1561 itd.itd_offset[j]); 1562 if ((OHCI_ITD_PSW_GET_CC(len) & 1563 OHCI_CC_NOT_ACCESSED_MASK) 1564 == OHCI_CC_NOT_ACCESSED) 1565 len = 0; 1566 else 1567 len = OHCI_ITD_PSW_LENGTH(len); 1568 xfer->ux_frlengths[i] = len; 1569 actlen += len; 1570 } 1571 } 1572 if (sitd->flags & OHCI_CALL_DONE) 1573 break; 1574 ohci_hash_rem_itd(sc, sitd); 1575 1576 } 1577 ohci_hash_rem_itd(sc, sitd); 1578 if (uedir == UE_DIR_IN && 1579 xfer->ux_status == USBD_NORMAL_COMPLETION) 1580 xfer->ux_actlen = actlen; 1581 xfer->ux_hcpriv = NULL; 1582 1583 usb_transfer_complete(xfer); 1584 } 1585 } 1586 1587 if (sc->sc_softwake) { 1588 sc->sc_softwake = 0; 1589 cv_broadcast(&sc->sc_softwake_cv); 1590 } 1591 1592 DPRINTFN(10, "done", 0, 0, 0, 0); 1593 } 1594 1595 void 1596 ohci_device_ctrl_done(struct usbd_xfer *xfer) 1597 { 1598 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1599 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1600 int len = UGETW(xfer->ux_request.wLength); 1601 int isread = (xfer->ux_request.bmRequestType & UT_READ); 1602 1603 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1604 DPRINTFN(10, "xfer=%p", xfer, 0, 0, 0); 1605 1606 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1607 KASSERT(xfer->ux_rqflags & URQ_REQUEST); 1608 1609 if (len) 1610 usb_syncmem(&xfer->ux_dmabuf, 0, len, 1611 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1612 usb_syncmem(&opipe->ctrl.reqdma, 0, 1613 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 1614 } 1615 1616 void 1617 ohci_device_intr_done(struct usbd_xfer *xfer) 1618 { 1619 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1620 int isread = 1621 (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN); 1622 1623 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1624 DPRINTFN(10, "xfer=%p, actlen=%d", xfer, xfer->ux_actlen, 0, 0); 1625 1626 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1627 1628 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 1629 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1630 } 1631 1632 void 1633 ohci_device_bulk_done(struct usbd_xfer *xfer) 1634 { 1635 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1636 1637 int isread = 1638 (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN); 1639 1640 KASSERT(mutex_owned(&sc->sc_lock)); 1641 1642 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1643 DPRINTFN(10, "xfer=%p, actlen=%d", xfer, xfer->ux_actlen, 0, 0); 1644 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 1645 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1646 } 1647 1648 Static void 1649 ohci_rhsc_softint(void *arg) 1650 { 1651 ohci_softc_t *sc = arg; 1652 1653 mutex_enter(&sc->sc_lock); 1654 1655 ohci_rhsc(sc, sc->sc_intrxfer); 1656 1657 /* Do not allow RHSC interrupts > 1 per second */ 1658 callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1659 1660 mutex_exit(&sc->sc_lock); 1661 } 1662 1663 void 1664 ohci_rhsc(ohci_softc_t *sc, struct usbd_xfer *xfer) 1665 { 1666 u_char *p; 1667 int i, m; 1668 int hstatus __unused; 1669 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1670 1671 KASSERT(mutex_owned(&sc->sc_lock)); 1672 1673 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1674 DPRINTF("sc=%p xfer=%p hstatus=0x%08x", sc, xfer, hstatus, 0); 1675 1676 if (xfer == NULL) { 1677 /* Just ignore the change. */ 1678 return; 1679 } 1680 1681 p = xfer->ux_buf; 1682 m = min(sc->sc_noport, xfer->ux_length * 8 - 1); 1683 memset(p, 0, xfer->ux_length); 1684 for (i = 1; i <= m; i++) { 1685 /* Pick out CHANGE bits from the status reg. */ 1686 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1687 p[i/8] |= 1 << (i%8); 1688 } 1689 DPRINTF("change=0x%02x", *p, 0, 0, 0); 1690 xfer->ux_actlen = xfer->ux_length; 1691 xfer->ux_status = USBD_NORMAL_COMPLETION; 1692 1693 usb_transfer_complete(xfer); 1694 } 1695 1696 void 1697 ohci_root_intr_done(struct usbd_xfer *xfer) 1698 { 1699 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1700 1701 KASSERT(mutex_owned(&sc->sc_lock)); 1702 1703 KASSERT(sc->sc_intrxfer == xfer); 1704 sc->sc_intrxfer = NULL; 1705 } 1706 1707 void 1708 ohci_poll(struct usbd_bus *bus) 1709 { 1710 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1711 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1712 1713 #ifdef OHCI_DEBUG 1714 static int last; 1715 int new; 1716 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1717 if (new != last) { 1718 DPRINTFN(10, "intrs=0x%04x", new, 0, 0, 0); 1719 last = new; 1720 } 1721 #endif 1722 sc->sc_eintrs |= OHCI_WDH; 1723 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) { 1724 mutex_spin_enter(&sc->sc_intr_lock); 1725 ohci_intr1(sc); 1726 mutex_spin_exit(&sc->sc_intr_lock); 1727 } 1728 } 1729 1730 /* 1731 * Add an ED to the schedule. Called with USB lock held. 1732 */ 1733 Static void 1734 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1735 { 1736 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1737 DPRINTFN(8, "sed=%p head=%p", sed, head, 0, 0); 1738 1739 KASSERT(mutex_owned(&sc->sc_lock)); 1740 1741 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1742 sizeof(head->ed.ed_nexted), 1743 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1744 sed->next = head->next; 1745 sed->ed.ed_nexted = head->ed.ed_nexted; 1746 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1747 sizeof(sed->ed.ed_nexted), 1748 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1749 head->next = sed; 1750 head->ed.ed_nexted = HTOO32(sed->physaddr); 1751 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1752 sizeof(head->ed.ed_nexted), 1753 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1754 } 1755 1756 /* 1757 * Remove an ED from the schedule. Called with USB lock held. 1758 */ 1759 Static void 1760 ohci_rem_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1761 { 1762 ohci_soft_ed_t *p; 1763 1764 KASSERT(mutex_owned(&sc->sc_lock)); 1765 1766 /* XXX */ 1767 for (p = head; p != NULL && p->next != sed; p = p->next) 1768 ; 1769 KASSERT(p != NULL); 1770 1771 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1772 sizeof(sed->ed.ed_nexted), 1773 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1774 p->next = sed->next; 1775 p->ed.ed_nexted = sed->ed.ed_nexted; 1776 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 1777 sizeof(p->ed.ed_nexted), 1778 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1779 } 1780 1781 /* 1782 * When a transfer is completed the TD is added to the done queue by 1783 * the host controller. This queue is the processed by software. 1784 * Unfortunately the queue contains the physical address of the TD 1785 * and we have no simple way to translate this back to a kernel address. 1786 * To make the translation possible (and fast) we use a hash table of 1787 * TDs currently in the schedule. The physical address is used as the 1788 * hash value. 1789 */ 1790 1791 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1792 /* Called with USB lock held. */ 1793 void 1794 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1795 { 1796 int h = HASH(std->physaddr); 1797 1798 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1799 1800 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1801 } 1802 1803 /* Called with USB lock held. */ 1804 void 1805 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1806 { 1807 1808 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1809 1810 LIST_REMOVE(std, hnext); 1811 } 1812 1813 ohci_soft_td_t * 1814 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1815 { 1816 int h = HASH(a); 1817 ohci_soft_td_t *std; 1818 1819 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1820 std != NULL; 1821 std = LIST_NEXT(std, hnext)) 1822 if (std->physaddr == a) 1823 return std; 1824 return NULL; 1825 } 1826 1827 /* Called with USB lock held. */ 1828 void 1829 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1830 { 1831 int h = HASH(sitd->physaddr); 1832 1833 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1834 1835 KASSERT(mutex_owned(&sc->sc_lock)); 1836 1837 DPRINTFN(10, "sitd=%p physaddr=0x%08lx", sitd, (u_long)sitd->physaddr, 1838 0, 0); 1839 1840 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1841 } 1842 1843 /* Called with USB lock held. */ 1844 void 1845 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1846 { 1847 1848 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1849 1850 KASSERT(mutex_owned(&sc->sc_lock)); 1851 1852 DPRINTFN(10, "sitd=%p physaddr=0x%08lx", sitd, (u_long)sitd->physaddr, 1853 0, 0); 1854 1855 LIST_REMOVE(sitd, hnext); 1856 } 1857 1858 ohci_soft_itd_t * 1859 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1860 { 1861 int h = HASH(a); 1862 ohci_soft_itd_t *sitd; 1863 1864 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1865 sitd != NULL; 1866 sitd = LIST_NEXT(sitd, hnext)) 1867 if (sitd->physaddr == a) 1868 return sitd; 1869 return NULL; 1870 } 1871 1872 void 1873 ohci_timeout(void *addr) 1874 { 1875 struct usbd_xfer *xfer = addr; 1876 struct ohci_xfer *oxfer = OHCI_XFER2OXFER(xfer); 1877 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1878 1879 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1880 DPRINTF("oxfer=%p", oxfer, 0, 0, 0); 1881 1882 if (sc->sc_dying) { 1883 mutex_enter(&sc->sc_lock); 1884 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1885 mutex_exit(&sc->sc_lock); 1886 return; 1887 } 1888 1889 /* Execute the abort in a process context. */ 1890 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr, 1891 USB_TASKQ_MPSAFE); 1892 usb_add_task(xfer->ux_pipe->up_dev, &oxfer->abort_task, 1893 USB_TASKQ_HC); 1894 } 1895 1896 void 1897 ohci_timeout_task(void *addr) 1898 { 1899 struct usbd_xfer *xfer = addr; 1900 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1901 1902 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1903 1904 DPRINTF("xfer=%p", xfer, 0, 0, 0); 1905 1906 mutex_enter(&sc->sc_lock); 1907 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1908 mutex_exit(&sc->sc_lock); 1909 } 1910 1911 #ifdef OHCI_DEBUG 1912 void 1913 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 1914 { 1915 for (; std; std = std->nexttd) { 1916 ohci_dump_td(sc, std); 1917 KASSERTMSG(std->nexttd == NULL || std != std->nexttd, 1918 "std %p next %p", std, std->nexttd); 1919 } 1920 } 1921 1922 void 1923 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1924 { 1925 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1926 1927 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1928 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1929 1930 uint32_t flags = O32TOH(std->td.td_flags); 1931 DPRINTF("TD(%p) at 0x%08lx:", std, (u_long)std->physaddr, 0, 0); 1932 DPRINTF(" round=%d DP=%x DI=%x T=%x", 1933 !!(flags & OHCI_TD_R), 1934 __SHIFTOUT(flags, OHCI_TD_DP_MASK), 1935 OHCI_TD_GET_DI(flags), 1936 __SHIFTOUT(flags, OHCI_TD_TOGGLE_MASK)); 1937 DPRINTF(" EC=%d CC=%d", OHCI_TD_GET_EC(flags), OHCI_TD_GET_CC(flags), 1938 0, 0); 1939 DPRINTF(" td_cbp=0x%08lx td_nexttd=0x%08lx td_be=0x%08lx", 1940 (u_long)O32TOH(std->td.td_cbp), 1941 (u_long)O32TOH(std->td.td_nexttd), 1942 (u_long)O32TOH(std->td.td_be), 0); 1943 } 1944 1945 void 1946 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1947 { 1948 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1949 1950 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1951 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1952 1953 uint32_t flags = O32TOH(sitd->itd.itd_flags); 1954 DPRINTF("ITD(%p) at 0x%08lx", sitd, (u_long)sitd->physaddr, 0, 0); 1955 DPRINTF(" sf=%d di=%d fc=%d cc=%d", 1956 OHCI_ITD_GET_SF(flags), OHCI_ITD_GET_DI(flags), 1957 OHCI_ITD_GET_FC(flags), OHCI_ITD_GET_CC(flags)); 1958 DPRINTF(" bp0=0x%08x next=0x%08x be=0x%08x", 1959 O32TOH(sitd->itd.itd_bp0), 1960 O32TOH(sitd->itd.itd_nextitd), 1961 O32TOH(sitd->itd.itd_be), 0); 1962 CTASSERT(OHCI_ITD_NOFFSET == 8); 1963 DPRINTF(" offs[0] = 0x%04x offs[1] = 0x%04x " 1964 "offs[2] = 0x%04x offs[3] = 0x%04x", 1965 O16TOH(sitd->itd.itd_offset[0]), 1966 O16TOH(sitd->itd.itd_offset[1]), 1967 O16TOH(sitd->itd.itd_offset[2]), 1968 O16TOH(sitd->itd.itd_offset[3])); 1969 DPRINTF(" offs[4] = 0x%04x offs[5] = 0x%04x " 1970 "offs[6] = 0x%04x offs[7] = 0x%04x", 1971 O16TOH(sitd->itd.itd_offset[4]), 1972 O16TOH(sitd->itd.itd_offset[5]), 1973 O16TOH(sitd->itd.itd_offset[6]), 1974 O16TOH(sitd->itd.itd_offset[7])); 1975 } 1976 1977 void 1978 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1979 { 1980 for (; sitd; sitd = sitd->nextitd) 1981 ohci_dump_itd(sc, sitd); 1982 } 1983 1984 void 1985 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 1986 { 1987 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1988 1989 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 1990 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1991 1992 uint32_t flags = O32TOH(sed->ed.ed_flags); 1993 DPRINTF("ED(%p) at 0x%08lx:", sed, sed->physaddr, 0, 0); 1994 DPRINTF(" addr=%d endpt=%d maxp=%d", 1995 OHCI_ED_GET_FA(flags), 1996 OHCI_ED_GET_EN(flags), 1997 OHCI_ED_GET_MAXP(flags), 1998 0); 1999 DPRINTF(" dir=%d speed=%d skip=%d iso=%d", 2000 __SHIFTOUT(flags, OHCI_ED_DIR_MASK), 2001 !!(flags & OHCI_ED_SPEED), 2002 !!(flags & OHCI_ED_SKIP), 2003 !!(flags & OHCI_ED_FORMAT_ISO)); 2004 DPRINTF(" tailp=0x%08lx", (u_long)O32TOH(sed->ed.ed_tailp), 2005 0, 0, 0); 2006 DPRINTF(" headp=0x%08lx nexted=0x%08lx halted=%d carry=%d", 2007 O32TOH(sed->ed.ed_headp), O32TOH(sed->ed.ed_nexted), 2008 !!(O32TOH(sed->ed.ed_headp) & OHCI_HALTED), 2009 !!(O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY)); 2010 } 2011 #endif 2012 2013 usbd_status 2014 ohci_open(struct usbd_pipe *pipe) 2015 { 2016 struct usbd_device *dev = pipe->up_dev; 2017 struct usbd_bus *bus = dev->ud_bus; 2018 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2019 usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc; 2020 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2021 uint8_t addr = dev->ud_addr; 2022 uint8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2023 ohci_soft_ed_t *sed; 2024 ohci_soft_td_t *std; 2025 ohci_soft_itd_t *sitd; 2026 ohci_physaddr_t tdphys; 2027 uint32_t fmt; 2028 usbd_status err = USBD_NOMEM; 2029 int ival; 2030 2031 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2032 DPRINTFN(1, "pipe=%p, addr=%d, endpt=%d (%d)", pipe, addr, 2033 ed->bEndpointAddress, bus->ub_rhaddr); 2034 2035 if (sc->sc_dying) { 2036 return USBD_IOERROR; 2037 } 2038 2039 std = NULL; 2040 sed = NULL; 2041 2042 if (addr == bus->ub_rhaddr) { 2043 switch (ed->bEndpointAddress) { 2044 case USB_CONTROL_ENDPOINT: 2045 pipe->up_methods = &roothub_ctrl_methods; 2046 break; 2047 case UE_DIR_IN | USBROOTHUB_INTR_ENDPT: 2048 pipe->up_methods = &ohci_root_intr_methods; 2049 break; 2050 default: 2051 err = USBD_INVAL; 2052 goto bad; 2053 } 2054 } else { 2055 sed = ohci_alloc_sed(sc); 2056 if (sed == NULL) 2057 goto bad; 2058 opipe->sed = sed; 2059 if (xfertype == UE_ISOCHRONOUS) { 2060 sitd = ohci_alloc_sitd(sc); 2061 if (sitd == NULL) 2062 goto bad; 2063 2064 opipe->tail.itd = sitd; 2065 tdphys = sitd->physaddr; 2066 fmt = OHCI_ED_FORMAT_ISO; 2067 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2068 fmt |= OHCI_ED_DIR_IN; 2069 else 2070 fmt |= OHCI_ED_DIR_OUT; 2071 } else { 2072 std = ohci_alloc_std(sc); 2073 if (std == NULL) 2074 goto bad; 2075 2076 opipe->tail.td = std; 2077 tdphys = std->physaddr; 2078 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2079 } 2080 sed->ed.ed_flags = HTOO32( 2081 OHCI_ED_SET_FA(addr) | 2082 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2083 (dev->ud_speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2084 fmt | 2085 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2086 sed->ed.ed_headp = HTOO32(tdphys | 2087 (pipe->up_endpoint->ue_toggle ? OHCI_TOGGLECARRY : 0)); 2088 sed->ed.ed_tailp = HTOO32(tdphys); 2089 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2090 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2091 2092 switch (xfertype) { 2093 case UE_CONTROL: 2094 pipe->up_methods = &ohci_device_ctrl_methods; 2095 err = usb_allocmem(&sc->sc_bus, 2096 sizeof(usb_device_request_t), 2097 0, &opipe->ctrl.reqdma); 2098 if (err) 2099 goto bad; 2100 mutex_enter(&sc->sc_lock); 2101 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2102 mutex_exit(&sc->sc_lock); 2103 break; 2104 case UE_INTERRUPT: 2105 pipe->up_methods = &ohci_device_intr_methods; 2106 ival = pipe->up_interval; 2107 if (ival == USBD_DEFAULT_INTERVAL) 2108 ival = ed->bInterval; 2109 err = ohci_device_setintr(sc, opipe, ival); 2110 if (err) 2111 goto bad; 2112 break; 2113 case UE_ISOCHRONOUS: 2114 pipe->up_serialise = false; 2115 pipe->up_methods = &ohci_device_isoc_methods; 2116 return ohci_setup_isoc(pipe); 2117 case UE_BULK: 2118 pipe->up_methods = &ohci_device_bulk_methods; 2119 mutex_enter(&sc->sc_lock); 2120 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2121 mutex_exit(&sc->sc_lock); 2122 break; 2123 } 2124 } 2125 2126 return USBD_NORMAL_COMPLETION; 2127 2128 bad: 2129 if (std != NULL) { 2130 ohci_free_std(sc, std); 2131 } 2132 if (sed != NULL) 2133 ohci_free_sed(sc, sed); 2134 return err; 2135 2136 } 2137 2138 /* 2139 * Close a reqular pipe. 2140 * Assumes that there are no pending transactions. 2141 */ 2142 void 2143 ohci_close_pipe(struct usbd_pipe *pipe, ohci_soft_ed_t *head) 2144 { 2145 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2146 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2147 ohci_soft_ed_t *sed = opipe->sed; 2148 2149 KASSERT(mutex_owned(&sc->sc_lock)); 2150 2151 #ifdef DIAGNOSTIC 2152 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2153 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2154 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2155 ohci_soft_td_t *std; 2156 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2157 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2158 "tl=0x%x pipe=%p, std=%p\n", sed, 2159 (int)O32TOH(sed->ed.ed_headp), 2160 (int)O32TOH(sed->ed.ed_tailp), 2161 pipe, std); 2162 #ifdef OHCI_DEBUG 2163 usbd_dump_pipe(&opipe->pipe); 2164 ohci_dump_ed(sc, sed); 2165 if (std) 2166 ohci_dump_td(sc, std); 2167 #endif 2168 usb_delay_ms(&sc->sc_bus, 2); 2169 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2170 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2171 printf("ohci_close_pipe: pipe still not empty\n"); 2172 } 2173 #endif 2174 ohci_rem_ed(sc, sed, head); 2175 /* Make sure the host controller is not touching this ED */ 2176 usb_delay_ms(&sc->sc_bus, 1); 2177 pipe->up_endpoint->ue_toggle = 2178 (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0; 2179 ohci_free_sed_locked(sc, opipe->sed); 2180 } 2181 2182 /* 2183 * Abort a device request. 2184 * If this routine is called at splusb() it guarantees that the request 2185 * will be removed from the hardware scheduling and that the callback 2186 * for it will be called with USBD_CANCELLED status. 2187 * It's impossible to guarantee that the requested transfer will not 2188 * have happened since the hardware runs concurrently. 2189 * If the transaction has already happened we rely on the ordinary 2190 * interrupt processing to process it. 2191 * XXX This is most probably wrong. 2192 * XXXMRG this doesn't make sense anymore. 2193 */ 2194 void 2195 ohci_abort_xfer(struct usbd_xfer *xfer, usbd_status status) 2196 { 2197 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2198 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2199 ohci_soft_ed_t *sed = opipe->sed; 2200 ohci_soft_td_t *p, *n; 2201 ohci_physaddr_t headp; 2202 int hit; 2203 int wake; 2204 2205 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2206 DPRINTF("xfer=%p pipe=%p sed=%p", xfer, opipe,sed, 0); 2207 2208 KASSERT(mutex_owned(&sc->sc_lock)); 2209 ASSERT_SLEEPABLE(); 2210 2211 if (sc->sc_dying) { 2212 /* If we're dying, just do the software part. */ 2213 xfer->ux_status = status; /* make software ignore it */ 2214 callout_halt(&xfer->ux_callout, &sc->sc_lock); 2215 usb_transfer_complete(xfer); 2216 return; 2217 } 2218 2219 /* 2220 * If an abort is already in progress then just wait for it to 2221 * complete and return. 2222 */ 2223 if (xfer->ux_hcflags & UXFER_ABORTING) { 2224 DPRINTFN(2, "already aborting", 0, 0, 0, 0); 2225 #ifdef DIAGNOSTIC 2226 if (status == USBD_TIMEOUT) 2227 printf("%s: TIMEOUT while aborting\n", __func__); 2228 #endif 2229 /* Override the status which might be USBD_TIMEOUT. */ 2230 xfer->ux_status = status; 2231 DPRINTFN(2, "waiting for abort to finish", 0, 0, 0, 0); 2232 xfer->ux_hcflags |= UXFER_ABORTWAIT; 2233 while (xfer->ux_hcflags & UXFER_ABORTING) 2234 cv_wait(&xfer->ux_hccv, &sc->sc_lock); 2235 goto done; 2236 } 2237 xfer->ux_hcflags |= UXFER_ABORTING; 2238 2239 /* 2240 * Step 1: Make interrupt routine and hardware ignore xfer. 2241 */ 2242 xfer->ux_status = status; /* make software ignore it */ 2243 callout_stop(&xfer->ux_callout); 2244 DPRINTFN(1, "stop ed=%p", sed, 0, 0, 0); 2245 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2246 sizeof(sed->ed.ed_flags), 2247 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2248 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2249 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2250 sizeof(sed->ed.ed_flags), 2251 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2252 2253 /* 2254 * Step 2: Wait until we know hardware has finished any possible 2255 * use of the xfer. Also make sure the soft interrupt routine 2256 * has run. 2257 */ 2258 /* Hardware finishes in 1ms */ 2259 usb_delay_ms_locked(opipe->pipe.up_dev->ud_bus, 20, &sc->sc_lock); 2260 sc->sc_softwake = 1; 2261 usb_schedsoftintr(&sc->sc_bus); 2262 cv_wait(&sc->sc_softwake_cv, &sc->sc_lock); 2263 2264 /* 2265 * Step 3: Remove any vestiges of the xfer from the hardware. 2266 * The complication here is that the hardware may have executed 2267 * beyond the xfer we're trying to abort. So as we're scanning 2268 * the TDs of this xfer we check if the hardware points to 2269 * any of them. 2270 */ 2271 p = xfer->ux_hcpriv; 2272 KASSERT(p); 2273 2274 #ifdef OHCI_DEBUG 2275 DPRINTF("--- dump start ---", 0, 0, 0, 0); 2276 2277 if (ohcidebug >= 2) { 2278 DPRINTF("sed:", 0, 0, 0, 0); 2279 ohci_dump_ed(sc, sed); 2280 ohci_dump_tds(sc, p); 2281 } 2282 DPRINTF("--- dump end ---", 0, 0, 0, 0); 2283 #endif 2284 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2285 hit = 0; 2286 for (; p->xfer == xfer; p = n) { 2287 hit |= headp == p->physaddr; 2288 n = p->nexttd; 2289 ohci_hash_rem_td(sc, p); 2290 } 2291 /* Zap headp register if hardware pointed inside the xfer. */ 2292 if (hit) { 2293 DPRINTFN(1, "set hd=0x%08x, tl=0x%08x", (int)p->physaddr, 2294 (int)O32TOH(sed->ed.ed_tailp), 0, 0); 2295 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2296 usb_syncmem(&sed->dma, 2297 sed->offs + offsetof(ohci_ed_t, ed_headp), 2298 sizeof(sed->ed.ed_headp), 2299 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2300 } else { 2301 DPRINTFN(1, "no hit", 0, 0, 0, 0); 2302 } 2303 2304 /* 2305 * Step 4: Turn on hardware again. 2306 */ 2307 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2308 sizeof(sed->ed.ed_flags), 2309 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2310 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2311 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2312 sizeof(sed->ed.ed_flags), 2313 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2314 2315 /* 2316 * Step 5: Execute callback. 2317 */ 2318 wake = xfer->ux_hcflags & UXFER_ABORTWAIT; 2319 xfer->ux_hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2320 usb_transfer_complete(xfer); 2321 if (wake) 2322 cv_broadcast(&xfer->ux_hccv); 2323 2324 done: 2325 KASSERT(mutex_owned(&sc->sc_lock)); 2326 } 2327 2328 /* 2329 * Data structures and routines to emulate the root hub. 2330 */ 2331 Static int 2332 ohci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req, 2333 void *buf, int buflen) 2334 { 2335 ohci_softc_t *sc = OHCI_BUS2SC(bus); 2336 usb_port_status_t ps; 2337 uint16_t len, value, index; 2338 int l, totlen = 0; 2339 int port, i; 2340 uint32_t v; 2341 2342 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2343 2344 if (sc->sc_dying) 2345 return -1; 2346 2347 DPRINTFN(4, "type=0x%02x request=%02x", req->bmRequestType, 2348 req->bRequest, 0, 0); 2349 2350 len = UGETW(req->wLength); 2351 value = UGETW(req->wValue); 2352 index = UGETW(req->wIndex); 2353 2354 #define C(x,y) ((x) | ((y) << 8)) 2355 switch (C(req->bRequest, req->bmRequestType)) { 2356 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2357 DPRINTFN(8, "wValue=0x%04x", value, 0, 0, 0); 2358 if (len == 0) 2359 break; 2360 switch (value) { 2361 case C(0, UDESC_DEVICE): { 2362 usb_device_descriptor_t devd; 2363 2364 totlen = min(buflen, sizeof(devd)); 2365 memcpy(&devd, buf, totlen); 2366 USETW(devd.idVendor, sc->sc_id_vendor); 2367 memcpy(buf, &devd, totlen); 2368 break; 2369 } 2370 case C(1, UDESC_STRING): 2371 #define sd ((usb_string_descriptor_t *)buf) 2372 /* Vendor */ 2373 totlen = usb_makestrdesc(sd, len, sc->sc_vendor); 2374 break; 2375 case C(2, UDESC_STRING): 2376 /* Product */ 2377 totlen = usb_makestrdesc(sd, len, "OHCI root hub"); 2378 break; 2379 #undef sd 2380 default: 2381 /* default from usbroothub */ 2382 return buflen; 2383 } 2384 break; 2385 2386 /* Hub requests */ 2387 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2388 break; 2389 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2390 DPRINTFN(8, "UR_CLEAR_PORT_FEATURE port=%d feature=%d", 2391 index, value, 0, 0); 2392 if (index < 1 || index > sc->sc_noport) { 2393 return -1; 2394 } 2395 port = OHCI_RH_PORT_STATUS(index); 2396 switch(value) { 2397 case UHF_PORT_ENABLE: 2398 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2399 break; 2400 case UHF_PORT_SUSPEND: 2401 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2402 break; 2403 case UHF_PORT_POWER: 2404 /* Yes, writing to the LOW_SPEED bit clears power. */ 2405 OWRITE4(sc, port, UPS_LOW_SPEED); 2406 break; 2407 case UHF_C_PORT_CONNECTION: 2408 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2409 break; 2410 case UHF_C_PORT_ENABLE: 2411 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2412 break; 2413 case UHF_C_PORT_SUSPEND: 2414 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2415 break; 2416 case UHF_C_PORT_OVER_CURRENT: 2417 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2418 break; 2419 case UHF_C_PORT_RESET: 2420 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2421 break; 2422 default: 2423 return -1; 2424 } 2425 switch(value) { 2426 case UHF_C_PORT_CONNECTION: 2427 case UHF_C_PORT_ENABLE: 2428 case UHF_C_PORT_SUSPEND: 2429 case UHF_C_PORT_OVER_CURRENT: 2430 case UHF_C_PORT_RESET: 2431 /* Enable RHSC interrupt if condition is cleared. */ 2432 if ((OREAD4(sc, port) >> 16) == 0) 2433 ohci_rhsc_enable(sc); 2434 break; 2435 default: 2436 break; 2437 } 2438 break; 2439 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2440 if (len == 0) 2441 break; 2442 if ((value & 0xff) != 0) { 2443 return -1; 2444 } 2445 usb_hub_descriptor_t hubd; 2446 2447 totlen = min(buflen, sizeof(hubd)); 2448 memcpy(&hubd, buf, totlen); 2449 2450 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2451 hubd.bNbrPorts = sc->sc_noport; 2452 USETW(hubd.wHubCharacteristics, 2453 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2454 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2455 /* XXX overcurrent */ 2456 ); 2457 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2458 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2459 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2460 hubd.DeviceRemovable[i++] = (uint8_t)v; 2461 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2462 totlen = min(totlen, hubd.bDescLength); 2463 memcpy(buf, &hubd, totlen); 2464 break; 2465 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2466 if (len != 4) { 2467 return -1; 2468 } 2469 memset(buf, 0, len); /* ? XXX */ 2470 totlen = len; 2471 break; 2472 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2473 DPRINTFN(8, "get port status i=%d", index, 0, 0, 0); 2474 if (index < 1 || index > sc->sc_noport) { 2475 return -1; 2476 } 2477 if (len != 4) { 2478 return -1; 2479 } 2480 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2481 DPRINTFN(8, "port status=0x%04x", v, 0, 0, 0); 2482 USETW(ps.wPortStatus, v); 2483 USETW(ps.wPortChange, v >> 16); 2484 totlen = min(len, sizeof(ps)); 2485 memcpy(buf, &ps, totlen); 2486 break; 2487 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2488 return -1; 2489 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2490 break; 2491 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2492 if (index < 1 || index > sc->sc_noport) { 2493 return -1; 2494 } 2495 port = OHCI_RH_PORT_STATUS(index); 2496 switch(value) { 2497 case UHF_PORT_ENABLE: 2498 OWRITE4(sc, port, UPS_PORT_ENABLED); 2499 break; 2500 case UHF_PORT_SUSPEND: 2501 OWRITE4(sc, port, UPS_SUSPEND); 2502 break; 2503 case UHF_PORT_RESET: 2504 DPRINTFN(5, "reset port %d", index, 0, 0, 0); 2505 OWRITE4(sc, port, UPS_RESET); 2506 for (i = 0; i < 5; i++) { 2507 usb_delay_ms(&sc->sc_bus, 2508 USB_PORT_ROOT_RESET_DELAY); 2509 if (sc->sc_dying) { 2510 return -1; 2511 } 2512 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2513 break; 2514 } 2515 DPRINTFN(8, "port %d reset, status = 0x%04x", index, 2516 OREAD4(sc, port), 0, 0); 2517 break; 2518 case UHF_PORT_POWER: 2519 DPRINTFN(2, "set port power %d", index, 0, 0, 0); 2520 OWRITE4(sc, port, UPS_PORT_POWER); 2521 break; 2522 default: 2523 return -1; 2524 } 2525 break; 2526 default: 2527 /* default from usbroothub */ 2528 return buflen; 2529 } 2530 2531 return totlen; 2532 } 2533 2534 Static usbd_status 2535 ohci_root_intr_transfer(struct usbd_xfer *xfer) 2536 { 2537 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2538 usbd_status err; 2539 2540 /* Insert last in queue. */ 2541 mutex_enter(&sc->sc_lock); 2542 err = usb_insert_transfer(xfer); 2543 mutex_exit(&sc->sc_lock); 2544 if (err) 2545 return err; 2546 2547 /* Pipe isn't running, start first */ 2548 return ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2549 } 2550 2551 Static usbd_status 2552 ohci_root_intr_start(struct usbd_xfer *xfer) 2553 { 2554 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2555 2556 if (sc->sc_dying) 2557 return USBD_IOERROR; 2558 2559 mutex_enter(&sc->sc_lock); 2560 KASSERT(sc->sc_intrxfer == NULL); 2561 sc->sc_intrxfer = xfer; 2562 mutex_exit(&sc->sc_lock); 2563 2564 return USBD_IN_PROGRESS; 2565 } 2566 2567 /* Abort a root interrupt request. */ 2568 Static void 2569 ohci_root_intr_abort(struct usbd_xfer *xfer) 2570 { 2571 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2572 2573 KASSERT(mutex_owned(&sc->sc_lock)); 2574 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 2575 2576 sc->sc_intrxfer = NULL; 2577 2578 xfer->ux_status = USBD_CANCELLED; 2579 usb_transfer_complete(xfer); 2580 } 2581 2582 /* Close the root pipe. */ 2583 Static void 2584 ohci_root_intr_close(struct usbd_pipe *pipe) 2585 { 2586 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2587 2588 KASSERT(mutex_owned(&sc->sc_lock)); 2589 2590 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2591 2592 sc->sc_intrxfer = NULL; 2593 } 2594 2595 /************************/ 2596 2597 int 2598 ohci_device_ctrl_init(struct usbd_xfer *xfer) 2599 { 2600 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2601 usb_device_request_t *req = &xfer->ux_request; 2602 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2603 ohci_soft_td_t *stat, *setup; 2604 int isread = req->bmRequestType & UT_READ; 2605 int len = xfer->ux_bufsize; 2606 int err = ENOMEM; 2607 2608 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2609 2610 setup = ohci_alloc_std(sc); 2611 if (setup == NULL) { 2612 goto bad1; 2613 } 2614 stat = ohci_alloc_std(sc); 2615 if (stat == NULL) { 2616 goto bad2; 2617 } 2618 2619 ox->ox_setup = setup; 2620 ox->ox_stat = stat; 2621 ox->ox_nstd = 0; 2622 2623 /* Set up data transaction */ 2624 if (len != 0) { 2625 err = ohci_alloc_std_chain(sc, xfer, len, isread); 2626 if (err) { 2627 goto bad3; 2628 } 2629 } 2630 return 0; 2631 2632 bad3: 2633 ohci_free_std(sc, stat); 2634 bad2: 2635 ohci_free_std(sc, setup); 2636 bad1: 2637 return err; 2638 } 2639 2640 void 2641 ohci_device_ctrl_fini(struct usbd_xfer *xfer) 2642 { 2643 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2644 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2645 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2646 2647 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2648 DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0); 2649 2650 mutex_enter(&sc->sc_lock); 2651 if (ox->ox_setup != opipe->tail.td) { 2652 ohci_free_std_locked(sc, ox->ox_setup); 2653 } 2654 for (size_t i = 0; i < ox->ox_nstd; i++) { 2655 ohci_soft_td_t *std = ox->ox_stds[i]; 2656 if (std == NULL) 2657 break; 2658 ohci_free_std_locked(sc, std); 2659 } 2660 ohci_free_std_locked(sc, ox->ox_stat); 2661 mutex_exit(&sc->sc_lock); 2662 2663 if (ox->ox_nstd) { 2664 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 2665 kmem_free(ox->ox_stds, sz); 2666 } 2667 } 2668 2669 Static usbd_status 2670 ohci_device_ctrl_transfer(struct usbd_xfer *xfer) 2671 { 2672 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2673 usbd_status err; 2674 2675 /* Insert last in queue. */ 2676 mutex_enter(&sc->sc_lock); 2677 err = usb_insert_transfer(xfer); 2678 mutex_exit(&sc->sc_lock); 2679 if (err) 2680 return err; 2681 2682 /* Pipe isn't running, start first */ 2683 return ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2684 } 2685 2686 Static usbd_status 2687 ohci_device_ctrl_start(struct usbd_xfer *xfer) 2688 { 2689 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2690 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2691 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2692 usb_device_request_t *req = &xfer->ux_request; 2693 struct usbd_device *dev __diagused = opipe->pipe.up_dev; 2694 ohci_soft_td_t *setup, *stat, *next, *tail; 2695 ohci_soft_ed_t *sed; 2696 int isread; 2697 int len; 2698 2699 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2700 2701 if (sc->sc_dying) 2702 return USBD_IOERROR; 2703 2704 KASSERT(xfer->ux_rqflags & URQ_REQUEST); 2705 2706 isread = req->bmRequestType & UT_READ; 2707 len = UGETW(req->wLength); 2708 2709 DPRINTF("xfer=%p len=%d, addr=%d, endpt=%d", xfer, len, dev->ud_addr, 2710 opipe->pipe.up_endpoint->ue_edesc->bEndpointAddress); 2711 DPRINTF("type=0x%02x, request=0x%02x, wValue=0x%04x, wIndex=0x%04x", 2712 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2713 UGETW(req->wIndex)); 2714 2715 /* Need to take lock here for pipe->tail.td */ 2716 mutex_enter(&sc->sc_lock); 2717 2718 /* 2719 * Use the pipe "tail" TD as our first and loan our first TD to the 2720 * next transfer 2721 */ 2722 setup = opipe->tail.td; 2723 opipe->tail.td = ox->ox_setup; 2724 ox->ox_setup = setup; 2725 2726 stat = ox->ox_stat; 2727 2728 /* point at sentinel */ 2729 tail = opipe->tail.td; 2730 sed = opipe->sed; 2731 2732 KASSERTMSG(OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)) == dev->ud_addr, 2733 "address ED %d pipe %d\n", 2734 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), dev->ud_addr); 2735 KASSERTMSG(OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)) == 2736 UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize), 2737 "MPL ED %d pipe %d\n", 2738 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), 2739 UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize)); 2740 2741 /* next will point to data if len != 0 */ 2742 next = stat; 2743 2744 /* Set up data transaction */ 2745 if (len != 0) { 2746 ohci_soft_td_t *std; 2747 ohci_soft_td_t *end; 2748 2749 next = ox->ox_stds[0]; 2750 ohci_reset_std_chain(sc, xfer, len, isread, next, &end); 2751 2752 end->td.td_nexttd = HTOO32(stat->physaddr); 2753 end->nexttd = stat; 2754 2755 usb_syncmem(&end->dma, 2756 end->offs + offsetof(ohci_td_t, td_nexttd), 2757 sizeof(end->td.td_nexttd), 2758 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2759 2760 usb_syncmem(&xfer->ux_dmabuf, 0, len, 2761 isread ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2762 std = ox->ox_stds[0]; 2763 /* Start toggle at 1 and then use the carried toggle. */ 2764 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 2765 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 2766 usb_syncmem(&std->dma, 2767 std->offs + offsetof(ohci_td_t, td_flags), 2768 sizeof(std->td.td_flags), 2769 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2770 } 2771 2772 DPRINTFN(8, "setup %p data %p stat %p tail %p", setup, 2773 (len != 0 ? ox->ox_stds[0] : NULL), stat, tail); 2774 KASSERT(opipe->tail.td == tail); 2775 2776 memcpy(KERNADDR(&opipe->ctrl.reqdma, 0), req, sizeof(*req)); 2777 usb_syncmem(&opipe->ctrl.reqdma, 0, sizeof(*req), BUS_DMASYNC_PREWRITE); 2778 2779 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 2780 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 2781 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->ctrl.reqdma, 0)); 2782 setup->td.td_nexttd = HTOO32(next->physaddr); 2783 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof(*req) - 1); 2784 setup->nexttd = next; 2785 setup->len = 0; 2786 setup->xfer = xfer; 2787 setup->flags = 0; 2788 ohci_hash_add_td(sc, setup); 2789 2790 xfer->ux_hcpriv = setup; 2791 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 2792 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2793 2794 stat->td.td_flags = HTOO32( 2795 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 2796 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 2797 stat->td.td_cbp = 0; 2798 stat->td.td_nexttd = HTOO32(tail->physaddr); 2799 stat->td.td_be = 0; 2800 stat->nexttd = tail; 2801 stat->flags = OHCI_CALL_DONE; 2802 stat->len = 0; 2803 stat->xfer = xfer; 2804 ohci_hash_add_td(sc, stat); 2805 2806 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 2807 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2808 2809 memset(&tail->td, 0, sizeof(tail->td)); 2810 tail->nexttd = NULL; 2811 tail->xfer = NULL; 2812 2813 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 2814 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2815 2816 #ifdef OHCI_DEBUG 2817 USBHIST_LOGN(ohcidebug, 5, "--- dump start ---", 0, 0, 0, 0); 2818 if (ohcidebug >= 5) { 2819 ohci_dump_ed(sc, sed); 2820 ohci_dump_tds(sc, setup); 2821 } 2822 USBHIST_LOGN(ohcidebug, 5, "--- dump end ---", 0, 0, 0, 0); 2823 #endif 2824 2825 /* Insert ED in schedule */ 2826 sed->ed.ed_tailp = HTOO32(tail->physaddr); 2827 usb_syncmem(&sed->dma, 2828 sed->offs + offsetof(ohci_ed_t, ed_tailp), 2829 sizeof(sed->ed.ed_tailp), 2830 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2831 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 2832 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 2833 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 2834 ohci_timeout, xfer); 2835 } 2836 2837 DPRINTF("done", 0, 0, 0, 0); 2838 2839 mutex_exit(&sc->sc_lock); 2840 2841 return USBD_IN_PROGRESS; 2842 } 2843 2844 /* Abort a device control request. */ 2845 Static void 2846 ohci_device_ctrl_abort(struct usbd_xfer *xfer) 2847 { 2848 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 2849 2850 KASSERT(mutex_owned(&sc->sc_lock)); 2851 2852 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2853 DPRINTF("xfer=%p", xfer, 0, 0, 0); 2854 ohci_abort_xfer(xfer, USBD_CANCELLED); 2855 } 2856 2857 /* Close a device control pipe. */ 2858 Static void 2859 ohci_device_ctrl_close(struct usbd_pipe *pipe) 2860 { 2861 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2862 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2863 2864 KASSERT(mutex_owned(&sc->sc_lock)); 2865 2866 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2867 DPRINTF("pipe=%p", pipe, 0, 0, 0); 2868 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2869 ohci_free_std_locked(sc, opipe->tail.td); 2870 } 2871 2872 /************************/ 2873 2874 Static void 2875 ohci_device_clear_toggle(struct usbd_pipe *pipe) 2876 { 2877 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2878 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2879 2880 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2881 } 2882 2883 Static void 2884 ohci_noop(struct usbd_pipe *pipe) 2885 { 2886 } 2887 2888 Static int 2889 ohci_device_bulk_init(struct usbd_xfer *xfer) 2890 { 2891 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2892 int len = xfer->ux_bufsize; 2893 int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;; 2894 int isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2895 int err; 2896 2897 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2898 2899 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 2900 2901 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 2902 xfer->ux_flags); 2903 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 2904 2905 /* Allocate a chain of new TDs (including a new tail). */ 2906 err = ohci_alloc_std_chain(sc, xfer, len, isread); 2907 if (err) 2908 return err; 2909 2910 return 0; 2911 } 2912 2913 Static void 2914 ohci_device_bulk_fini(struct usbd_xfer *xfer) 2915 { 2916 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2917 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2918 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2919 2920 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2921 DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0); 2922 2923 mutex_enter(&sc->sc_lock); 2924 for (size_t i = 0; i < ox->ox_nstd; i++) { 2925 ohci_soft_td_t *std = ox->ox_stds[i]; 2926 if (std == NULL) 2927 break; 2928 if (std != opipe->tail.td) 2929 ohci_free_std_locked(sc, std); 2930 } 2931 mutex_exit(&sc->sc_lock); 2932 2933 if (ox->ox_nstd) { 2934 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 2935 kmem_free(ox->ox_stds, sz); 2936 } 2937 } 2938 2939 Static usbd_status 2940 ohci_device_bulk_transfer(struct usbd_xfer *xfer) 2941 { 2942 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2943 usbd_status err; 2944 2945 /* Insert last in queue. */ 2946 mutex_enter(&sc->sc_lock); 2947 err = usb_insert_transfer(xfer); 2948 mutex_exit(&sc->sc_lock); 2949 if (err) 2950 return err; 2951 2952 /* Pipe isn't running, start first */ 2953 return ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2954 } 2955 2956 Static usbd_status 2957 ohci_device_bulk_start(struct usbd_xfer *xfer) 2958 { 2959 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2960 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2961 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2962 ohci_soft_td_t *last; 2963 ohci_soft_td_t *data, *tail, *tdp; 2964 ohci_soft_ed_t *sed; 2965 int len, isread, endpt; 2966 2967 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2968 2969 if (sc->sc_dying) 2970 return USBD_IOERROR; 2971 2972 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 2973 2974 len = xfer->ux_length; 2975 endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 2976 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2977 sed = opipe->sed; 2978 2979 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 2980 xfer->ux_flags); 2981 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 2982 2983 mutex_enter(&sc->sc_lock); 2984 2985 /* 2986 * Use the pipe "tail" TD as our first and loan our first TD to the 2987 * next transfer 2988 */ 2989 data = opipe->tail.td; 2990 opipe->tail.td = ox->ox_stds[0]; 2991 ox->ox_stds[0] = data; 2992 ohci_reset_std_chain(sc, xfer, len, isread, data, &last); 2993 2994 /* point at sentinel */ 2995 tail = opipe->tail.td; 2996 memset(&tail->td, 0, sizeof(tail->td)); 2997 tail->nexttd = NULL; 2998 tail->xfer = NULL; 2999 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 3000 BUS_DMASYNC_PREWRITE); 3001 xfer->ux_hcpriv = data; 3002 3003 DPRINTFN(8, "xfer %p data %p tail %p", xfer, ox->ox_stds[0], tail, 0); 3004 KASSERT(opipe->tail.td == tail); 3005 3006 /* We want interrupt at the end of the transfer. */ 3007 last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3008 last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3009 last->td.td_nexttd = HTOO32(tail->physaddr); 3010 last->nexttd = tail; 3011 last->flags |= OHCI_CALL_DONE; 3012 usb_syncmem(&last->dma, last->offs, sizeof(last->td), 3013 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3014 3015 DPRINTFN(4, "ed_flags=0x%08x td_flags=0x%08x " 3016 "td_cbp=0x%08x td_be=0x%08x", 3017 (int)O32TOH(sed->ed.ed_flags), 3018 (int)O32TOH(data->td.td_flags), 3019 (int)O32TOH(data->td.td_cbp), 3020 (int)O32TOH(data->td.td_be)); 3021 3022 #ifdef OHCI_DEBUG 3023 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 3024 if (ohcidebug >= 5) { 3025 ohci_dump_ed(sc, sed); 3026 ohci_dump_tds(sc, data); 3027 } 3028 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 3029 #endif 3030 3031 /* Insert ED in schedule */ 3032 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 3033 KASSERT(tdp->xfer == xfer); 3034 } 3035 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3036 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3037 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3038 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3039 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3040 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3041 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 3042 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 3043 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 3044 ohci_timeout, xfer); 3045 } 3046 mutex_exit(&sc->sc_lock); 3047 3048 return USBD_IN_PROGRESS; 3049 } 3050 3051 Static void 3052 ohci_device_bulk_abort(struct usbd_xfer *xfer) 3053 { 3054 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 3055 3056 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3057 3058 KASSERT(mutex_owned(&sc->sc_lock)); 3059 3060 DPRINTF("xfer=%p", xfer, 0, 0, 0); 3061 ohci_abort_xfer(xfer, USBD_CANCELLED); 3062 } 3063 3064 /* 3065 * Close a device bulk pipe. 3066 */ 3067 Static void 3068 ohci_device_bulk_close(struct usbd_pipe *pipe) 3069 { 3070 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3071 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3072 3073 KASSERT(mutex_owned(&sc->sc_lock)); 3074 3075 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3076 3077 DPRINTF("pipe=%p", pipe, 0, 0, 0); 3078 ohci_close_pipe(pipe, sc->sc_bulk_head); 3079 ohci_free_std_locked(sc, opipe->tail.td); 3080 } 3081 3082 /************************/ 3083 3084 Static int 3085 ohci_device_intr_init(struct usbd_xfer *xfer) 3086 { 3087 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3088 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3089 int len = xfer->ux_bufsize; 3090 int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;; 3091 int isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3092 int err; 3093 3094 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3095 3096 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3097 KASSERT(len != 0); 3098 3099 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 3100 xfer->ux_flags); 3101 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 3102 3103 ox->ox_nstd = 0; 3104 3105 err = ohci_alloc_std_chain(sc, xfer, len, isread); 3106 if (err) { 3107 return err; 3108 } 3109 3110 return 0; 3111 } 3112 3113 Static void 3114 ohci_device_intr_fini(struct usbd_xfer *xfer) 3115 { 3116 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3117 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3118 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3119 3120 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3121 DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0); 3122 3123 mutex_enter(&sc->sc_lock); 3124 for (size_t i = 0; i < ox->ox_nstd; i++) { 3125 ohci_soft_td_t *std = ox->ox_stds[i]; 3126 if (std != NULL) 3127 break; 3128 if (std != opipe->tail.td) 3129 ohci_free_std_locked(sc, std); 3130 } 3131 mutex_exit(&sc->sc_lock); 3132 3133 if (ox->ox_nstd) { 3134 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 3135 kmem_free(ox->ox_stds, sz); 3136 } 3137 } 3138 3139 Static usbd_status 3140 ohci_device_intr_transfer(struct usbd_xfer *xfer) 3141 { 3142 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3143 usbd_status err; 3144 3145 /* Insert last in queue. */ 3146 mutex_enter(&sc->sc_lock); 3147 err = usb_insert_transfer(xfer); 3148 mutex_exit(&sc->sc_lock); 3149 if (err) 3150 return err; 3151 3152 /* Pipe isn't running, start first */ 3153 return ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 3154 } 3155 3156 Static usbd_status 3157 ohci_device_intr_start(struct usbd_xfer *xfer) 3158 { 3159 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3160 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3161 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3162 ohci_soft_ed_t *sed = opipe->sed; 3163 ohci_soft_td_t *data, *last, *tail; 3164 int len, isread, endpt; 3165 3166 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3167 3168 if (sc->sc_dying) 3169 return USBD_IOERROR; 3170 3171 DPRINTFN(3, "xfer=%p len=%d flags=%d priv=%p", xfer, xfer->ux_length, 3172 xfer->ux_flags, xfer->ux_priv); 3173 3174 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3175 3176 len = xfer->ux_length; 3177 endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 3178 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3179 3180 mutex_enter(&sc->sc_lock); 3181 3182 /* 3183 * Use the pipe "tail" TD as our first and loan our first TD to the 3184 * next transfer. 3185 */ 3186 data = opipe->tail.td; 3187 opipe->tail.td = ox->ox_stds[0]; 3188 ox->ox_stds[0] = data; 3189 ohci_reset_std_chain(sc, xfer, len, isread, data, &last); 3190 3191 /* point at sentinel */ 3192 tail = opipe->tail.td; 3193 memset(&tail->td, 0, sizeof(tail->td)); 3194 tail->nexttd = NULL; 3195 tail->xfer = NULL; 3196 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 3197 BUS_DMASYNC_PREWRITE); 3198 xfer->ux_hcpriv = data; 3199 3200 DPRINTFN(8, "data %p tail %p", ox->ox_stds[0], tail, 0, 0); 3201 KASSERT(opipe->tail.td == tail); 3202 3203 /* We want interrupt at the end of the transfer. */ 3204 last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3205 last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3206 3207 last->td.td_nexttd = HTOO32(tail->physaddr); 3208 last->nexttd = tail; 3209 last->flags |= OHCI_CALL_DONE; 3210 usb_syncmem(&last->dma, last->offs, sizeof(last->td), 3211 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3212 3213 #ifdef OHCI_DEBUG 3214 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 3215 if (ohcidebug >= 5) { 3216 ohci_dump_ed(sc, sed); 3217 ohci_dump_tds(sc, data); 3218 } 3219 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 3220 #endif 3221 3222 /* Insert ED in schedule */ 3223 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3224 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3225 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3226 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3227 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3228 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3229 3230 mutex_exit(&sc->sc_lock); 3231 3232 return USBD_IN_PROGRESS; 3233 } 3234 3235 /* Abort a device interrupt request. */ 3236 Static void 3237 ohci_device_intr_abort(struct usbd_xfer *xfer) 3238 { 3239 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 3240 3241 KASSERT(mutex_owned(&sc->sc_lock)); 3242 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 3243 3244 ohci_abort_xfer(xfer, USBD_CANCELLED); 3245 } 3246 3247 /* Close a device interrupt pipe. */ 3248 Static void 3249 ohci_device_intr_close(struct usbd_pipe *pipe) 3250 { 3251 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3252 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3253 int nslots = opipe->intr.nslots; 3254 int pos = opipe->intr.pos; 3255 int j; 3256 ohci_soft_ed_t *p, *sed = opipe->sed; 3257 3258 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3259 3260 KASSERT(mutex_owned(&sc->sc_lock)); 3261 3262 DPRINTFN(1, "pipe=%p nslots=%d pos=%d", pipe, nslots, pos, 0); 3263 usb_syncmem(&sed->dma, sed->offs, 3264 sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3265 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3266 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3267 sizeof(sed->ed.ed_flags), 3268 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3269 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3270 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3271 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); 3272 3273 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3274 continue; 3275 KASSERT(p); 3276 p->next = sed->next; 3277 p->ed.ed_nexted = sed->ed.ed_nexted; 3278 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 3279 sizeof(p->ed.ed_nexted), 3280 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3281 3282 for (j = 0; j < nslots; j++) 3283 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3284 3285 ohci_free_std_locked(sc, opipe->tail.td); 3286 ohci_free_sed_locked(sc, opipe->sed); 3287 } 3288 3289 Static usbd_status 3290 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3291 { 3292 int i, j, best; 3293 u_int npoll, slow, shigh, nslots; 3294 u_int bestbw, bw; 3295 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3296 3297 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3298 3299 DPRINTFN(2, "pipe=%p", opipe, 0, 0, 0); 3300 if (ival == 0) { 3301 printf("ohci_setintr: 0 interval\n"); 3302 return USBD_INVAL; 3303 } 3304 3305 npoll = OHCI_NO_INTRS; 3306 while (npoll > ival) 3307 npoll /= 2; 3308 DPRINTFN(2, "ival=%d npoll=%d", ival, npoll, 0, 0); 3309 3310 /* 3311 * We now know which level in the tree the ED must go into. 3312 * Figure out which slot has most bandwidth left over. 3313 * Slots to examine: 3314 * npoll 3315 * 1 0 3316 * 2 1 2 3317 * 4 3 4 5 6 3318 * 8 7 8 9 10 11 12 13 14 3319 * N (N-1) .. (N-1+N-1) 3320 */ 3321 slow = npoll-1; 3322 shigh = slow + npoll; 3323 nslots = OHCI_NO_INTRS / npoll; 3324 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3325 bw = 0; 3326 for (j = 0; j < nslots; j++) 3327 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3328 if (bw < bestbw) { 3329 best = i; 3330 bestbw = bw; 3331 } 3332 } 3333 DPRINTFN(2, "best=%d(%d..%d) bestbw=%d", best, slow, shigh, bestbw); 3334 3335 mutex_enter(&sc->sc_lock); 3336 hsed = sc->sc_eds[best]; 3337 sed->next = hsed->next; 3338 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3339 sizeof(hsed->ed.ed_flags), 3340 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3341 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3342 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3343 sizeof(sed->ed.ed_flags), 3344 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3345 hsed->next = sed; 3346 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3347 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3348 sizeof(hsed->ed.ed_flags), 3349 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3350 mutex_exit(&sc->sc_lock); 3351 3352 for (j = 0; j < nslots; j++) 3353 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3354 opipe->intr.nslots = nslots; 3355 opipe->intr.pos = best; 3356 3357 DPRINTFN(5, "returns %p", opipe, 0, 0, 0); 3358 return USBD_NORMAL_COMPLETION; 3359 } 3360 3361 /***********************/ 3362 3363 Static int 3364 ohci_device_isoc_init(struct usbd_xfer *xfer) 3365 { 3366 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3367 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3368 ohci_soft_itd_t *sitd; 3369 size_t i; 3370 int err; 3371 3372 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3373 3374 DPRINTFN(1, "xfer %p len %d flags %d", xfer, xfer->ux_length, 3375 xfer->ux_flags, 0); 3376 3377 const size_t nfsitd = 3378 (xfer->ux_nframes + OHCI_ITD_NOFFSET - 1) / OHCI_ITD_NOFFSET; 3379 const size_t nbsitd = xfer->ux_bufsize / OHCI_PAGE_SIZE; 3380 const size_t nsitd = MAX(nfsitd, nbsitd) + 1; 3381 3382 ox->ox_sitds = kmem_zalloc(sizeof(ohci_soft_itd_t *) * nsitd, 3383 KM_SLEEP); 3384 ox->ox_nsitd = nsitd; 3385 3386 for (i = 0; i < nsitd; i++) { 3387 /* Allocate next ITD */ 3388 sitd = ohci_alloc_sitd(sc); 3389 if (sitd == NULL) { 3390 err = ENOMEM; 3391 goto fail; 3392 } 3393 ox->ox_sitds[i] = sitd; 3394 sitd->xfer = xfer; 3395 sitd->flags = 0; 3396 } 3397 3398 return 0; 3399 fail: 3400 for (; i > 0;) { 3401 ohci_free_sitd(sc, ox->ox_sitds[--i]); 3402 } 3403 return err; 3404 } 3405 3406 Static void 3407 ohci_device_isoc_fini(struct usbd_xfer *xfer) 3408 { 3409 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3410 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3411 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3412 3413 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3414 3415 mutex_enter(&sc->sc_lock); 3416 for (size_t i = 0; i < ox->ox_nsitd; i++) { 3417 if (ox->ox_sitds[i] != opipe->tail.itd) { 3418 ohci_free_sitd_locked(sc, ox->ox_sitds[i]); 3419 } 3420 } 3421 mutex_exit(&sc->sc_lock); 3422 3423 if (ox->ox_nsitd) { 3424 const size_t sz = sizeof(ohci_soft_itd_t *) * ox->ox_nsitd; 3425 kmem_free(ox->ox_sitds, sz); 3426 } 3427 } 3428 3429 3430 usbd_status 3431 ohci_device_isoc_transfer(struct usbd_xfer *xfer) 3432 { 3433 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3434 usbd_status __diagused err; 3435 3436 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3437 3438 DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0); 3439 3440 /* Put it on our queue, */ 3441 mutex_enter(&sc->sc_lock); 3442 err = usb_insert_transfer(xfer); 3443 mutex_exit(&sc->sc_lock); 3444 3445 KASSERT(err == USBD_NORMAL_COMPLETION); 3446 3447 /* insert into schedule, */ 3448 ohci_device_isoc_enter(xfer); 3449 3450 /* and start if the pipe wasn't running */ 3451 return USBD_IN_PROGRESS; 3452 } 3453 3454 void 3455 ohci_device_isoc_enter(struct usbd_xfer *xfer) 3456 { 3457 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3458 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3459 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3460 ohci_soft_ed_t *sed = opipe->sed; 3461 ohci_soft_itd_t *sitd, *nsitd, *tail; 3462 ohci_physaddr_t buf, offs, noffs, bp0; 3463 int i, ncur, nframes; 3464 3465 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3466 DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0); 3467 3468 mutex_enter(&sc->sc_lock); 3469 3470 if (sc->sc_dying) { 3471 mutex_exit(&sc->sc_lock); 3472 return; 3473 } 3474 3475 struct isoc *isoc = &opipe->isoc; 3476 3477 DPRINTFN(1, "used=%d next=%d xfer=%p nframes=%d", 3478 isoc->inuse, isoc->next, xfer, xfer->ux_nframes); 3479 3480 if (isoc->next == -1) { 3481 /* Not in use yet, schedule it a few frames ahead. */ 3482 isoc->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3483 DPRINTFN(2,"start next=%d", isoc->next, 0, 0, 0); 3484 } 3485 3486 sitd = opipe->tail.itd; 3487 opipe->tail.itd = ox->ox_sitds[0]; 3488 ox->ox_sitds[0] = sitd; 3489 3490 buf = DMAADDR(&xfer->ux_dmabuf, 0); 3491 bp0 = OHCI_PAGE(buf); 3492 offs = OHCI_PAGE_OFFSET(buf); 3493 nframes = xfer->ux_nframes; 3494 xfer->ux_hcpriv = sitd; 3495 size_t j = 1; 3496 for (i = ncur = 0; i < nframes; i++, ncur++) { 3497 noffs = offs + xfer->ux_frlengths[i]; 3498 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3499 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3500 3501 /* Allocate next ITD */ 3502 nsitd = ox->ox_sitds[j++]; 3503 KASSERT(nsitd != NULL); 3504 KASSERT(j < ox->ox_nsitd); 3505 3506 /* Fill current ITD */ 3507 sitd->itd.itd_flags = HTOO32( 3508 OHCI_ITD_NOCC | 3509 OHCI_ITD_SET_SF(isoc->next) | 3510 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3511 OHCI_ITD_SET_FC(ncur)); 3512 sitd->itd.itd_bp0 = HTOO32(bp0); 3513 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3514 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3515 sitd->nextitd = nsitd; 3516 sitd->xfer = xfer; 3517 sitd->flags = 0; 3518 #ifdef DIAGNOSTIC 3519 sitd->isdone = false; 3520 #endif 3521 ohci_hash_add_itd(sc, sitd); 3522 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3523 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3524 3525 sitd = nsitd; 3526 isoc->next = isoc->next + ncur; 3527 bp0 = OHCI_PAGE(buf + offs); 3528 ncur = 0; 3529 } 3530 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3531 offs = noffs; 3532 } 3533 KASSERT(j <= ox->ox_nsitd); 3534 3535 /* point at sentinel */ 3536 tail = opipe->tail.itd; 3537 memset(&tail->itd, 0, sizeof(tail->itd)); 3538 tail->nextitd = NULL; 3539 tail->xfer = NULL; 3540 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->itd), 3541 BUS_DMASYNC_PREWRITE); 3542 3543 /* Fixup last used ITD */ 3544 sitd->itd.itd_flags = HTOO32( 3545 OHCI_ITD_NOCC | 3546 OHCI_ITD_SET_SF(isoc->next) | 3547 OHCI_ITD_SET_DI(0) | 3548 OHCI_ITD_SET_FC(ncur)); 3549 sitd->itd.itd_bp0 = HTOO32(bp0); 3550 sitd->itd.itd_nextitd = HTOO32(tail->physaddr); 3551 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3552 sitd->nextitd = tail; 3553 sitd->xfer = xfer; 3554 sitd->flags = OHCI_CALL_DONE; 3555 #ifdef DIAGNOSTIC 3556 sitd->isdone = false; 3557 #endif 3558 ohci_hash_add_itd(sc, sitd); 3559 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3560 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3561 3562 isoc->next = isoc->next + ncur; 3563 isoc->inuse += nframes; 3564 3565 /* XXX pretend we did it all */ 3566 xfer->ux_actlen = offs; 3567 xfer->ux_status = USBD_IN_PROGRESS; 3568 3569 #ifdef OHCI_DEBUG 3570 if (ohcidebug >= 5) { 3571 DPRINTF("frame=%d", O32TOH(sc->sc_hcca->hcca_frame_number), 3572 0, 0, 0); 3573 ohci_dump_itds(sc, xfer->ux_hcpriv); 3574 ohci_dump_ed(sc, sed); 3575 } 3576 #endif 3577 3578 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3579 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3580 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3581 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3582 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3583 sizeof(sed->ed.ed_flags), 3584 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3585 mutex_exit(&sc->sc_lock); 3586 } 3587 3588 void 3589 ohci_device_isoc_abort(struct usbd_xfer *xfer) 3590 { 3591 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3592 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3593 ohci_soft_ed_t *sed; 3594 ohci_soft_itd_t *sitd; 3595 3596 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3597 DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0); 3598 3599 KASSERT(mutex_owned(&sc->sc_lock)); 3600 3601 /* Transfer is already done. */ 3602 if (xfer->ux_status != USBD_NOT_STARTED && 3603 xfer->ux_status != USBD_IN_PROGRESS) { 3604 printf("ohci_device_isoc_abort: early return\n"); 3605 goto done; 3606 } 3607 3608 /* Give xfer the requested abort code. */ 3609 xfer->ux_status = USBD_CANCELLED; 3610 3611 sed = opipe->sed; 3612 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3613 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3614 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3615 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3616 sizeof(sed->ed.ed_flags), 3617 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3618 3619 sitd = xfer->ux_hcpriv; 3620 KASSERT(sitd); 3621 3622 usb_delay_ms_locked(&sc->sc_bus, OHCI_ITD_NOFFSET, &sc->sc_lock); 3623 3624 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3625 ohci_hash_rem_itd(sc, sitd); 3626 #ifdef DIAGNOSTIC 3627 DPRINTFN(1, "abort sets done sitd=%p", sitd, 0, 0, 0); 3628 sitd->isdone = true; 3629 #endif 3630 } 3631 3632 /* Run callback. */ 3633 usb_transfer_complete(xfer); 3634 3635 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3636 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3637 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3638 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3639 3640 done: 3641 KASSERT(mutex_owned(&sc->sc_lock)); 3642 } 3643 3644 void 3645 ohci_device_isoc_done(struct usbd_xfer *xfer) 3646 { 3647 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3648 DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0); 3649 } 3650 3651 usbd_status 3652 ohci_setup_isoc(struct usbd_pipe *pipe) 3653 { 3654 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3655 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3656 struct isoc *isoc = &opipe->isoc; 3657 3658 isoc->next = -1; 3659 isoc->inuse = 0; 3660 3661 mutex_enter(&sc->sc_lock); 3662 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3663 mutex_exit(&sc->sc_lock); 3664 3665 return USBD_NORMAL_COMPLETION; 3666 } 3667 3668 void 3669 ohci_device_isoc_close(struct usbd_pipe *pipe) 3670 { 3671 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3672 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3673 3674 KASSERT(mutex_owned(&sc->sc_lock)); 3675 3676 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3677 DPRINTF("pipe=%p", pipe, 0, 0, 0); 3678 ohci_close_pipe(pipe, sc->sc_isoc_head); 3679 #ifdef DIAGNOSTIC 3680 opipe->tail.itd->isdone = true; 3681 #endif 3682 ohci_free_sitd_locked(sc, opipe->tail.itd); 3683 } 3684
Indexes created Fri Oct 03 02:09:57 GMT 2025