ohci.c revision 1.268
1 /* $NetBSD: ohci.c,v 1.268 2017/01/30 21:34:20 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2004, 2005, 2012 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) at 9 * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca) 10 * and Matthew R. Green (mrg (at) eterna.com.au). 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * USB Open Host Controller driver. 38 * 39 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 40 * USB spec: http://www.usb.org/developers/docs/ 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.268 2017/01/30 21:34:20 skrll Exp $"); 45 46 #ifdef _KERNEL_OPT 47 #include "opt_usb.h" 48 #endif 49 50 #include <sys/param.h> 51 52 #include <sys/cpu.h> 53 #include <sys/device.h> 54 #include <sys/kernel.h> 55 #include <sys/kmem.h> 56 #include <sys/proc.h> 57 #include <sys/queue.h> 58 #include <sys/select.h> 59 #include <sys/sysctl.h> 60 #include <sys/systm.h> 61 62 #include <machine/endian.h> 63 64 #include <dev/usb/usb.h> 65 #include <dev/usb/usbdi.h> 66 #include <dev/usb/usbdivar.h> 67 #include <dev/usb/usb_mem.h> 68 #include <dev/usb/usb_quirks.h> 69 70 #include <dev/usb/ohcireg.h> 71 #include <dev/usb/ohcivar.h> 72 #include <dev/usb/usbroothub.h> 73 #include <dev/usb/usbhist.h> 74 75 #ifdef USB_DEBUG 76 #ifndef OHCI_DEBUG 77 #define ohcidebug 0 78 #else 79 static int ohcidebug = 10; 80 81 SYSCTL_SETUP(sysctl_hw_ohci_setup, "sysctl hw.ohci setup") 82 { 83 int err; 84 const struct sysctlnode *rnode; 85 const struct sysctlnode *cnode; 86 87 err = sysctl_createv(clog, 0, NULL, &rnode, 88 CTLFLAG_PERMANENT, CTLTYPE_NODE, "ohci", 89 SYSCTL_DESCR("ohci global controls"), 90 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); 91 92 if (err) 93 goto fail; 94 95 /* control debugging printfs */ 96 err = sysctl_createv(clog, 0, &rnode, &cnode, 97 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, 98 "debug", SYSCTL_DESCR("Enable debugging output"), 99 NULL, 0, &ohcidebug, sizeof(ohcidebug), CTL_CREATE, CTL_EOL); 100 if (err) 101 goto fail; 102 103 return; 104 fail: 105 aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err); 106 } 107 108 #endif /* OHCI_DEBUG */ 109 #endif /* USB_DEBUG */ 110 111 #define DPRINTF(FMT,A,B,C,D) USBHIST_LOG(ohcidebug,FMT,A,B,C,D) 112 #define DPRINTFN(N,FMT,A,B,C,D) USBHIST_LOGN(ohcidebug,N,FMT,A,B,C,D) 113 #define OHCIHIST_FUNC() USBHIST_FUNC() 114 #define OHCIHIST_CALLED(name) USBHIST_CALLED(ohcidebug) 115 116 #if BYTE_ORDER == BIG_ENDIAN 117 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 118 #else 119 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 120 #endif 121 122 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 123 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 124 #define HTOO16(val) O16TOH(val) 125 #define HTOO32(val) O32TOH(val) 126 127 struct ohci_pipe; 128 129 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 130 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 131 132 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 133 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 134 Static void ohci_free_std_locked(ohci_softc_t *, ohci_soft_td_t *); 135 136 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 137 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 138 Static void ohci_free_sitd_locked(ohci_softc_t *, 139 ohci_soft_itd_t *); 140 141 Static int ohci_alloc_std_chain(ohci_softc_t *, struct usbd_xfer *, 142 int, int); 143 Static void ohci_free_stds(ohci_softc_t *, struct ohci_xfer *); 144 145 Static void ohci_reset_std_chain(ohci_softc_t *, struct usbd_xfer *, 146 int, int, ohci_soft_td_t *, ohci_soft_td_t **); 147 148 Static usbd_status ohci_open(struct usbd_pipe *); 149 Static void ohci_poll(struct usbd_bus *); 150 Static void ohci_softintr(void *); 151 Static void ohci_rhsc(ohci_softc_t *, struct usbd_xfer *); 152 Static void ohci_rhsc_softint(void *); 153 154 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 155 ohci_soft_ed_t *); 156 157 Static void ohci_rem_ed(ohci_softc_t *, ohci_soft_ed_t *, 158 ohci_soft_ed_t *); 159 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 160 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 161 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 162 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 163 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 164 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 165 166 Static usbd_status ohci_setup_isoc(struct usbd_pipe *); 167 Static void ohci_device_isoc_enter(struct usbd_xfer *); 168 169 Static struct usbd_xfer * 170 ohci_allocx(struct usbd_bus *, unsigned int); 171 Static void ohci_freex(struct usbd_bus *, struct usbd_xfer *); 172 Static void ohci_get_lock(struct usbd_bus *, kmutex_t **); 173 Static int ohci_roothub_ctrl(struct usbd_bus *, 174 usb_device_request_t *, void *, int); 175 176 Static usbd_status ohci_root_intr_transfer(struct usbd_xfer *); 177 Static usbd_status ohci_root_intr_start(struct usbd_xfer *); 178 Static void ohci_root_intr_abort(struct usbd_xfer *); 179 Static void ohci_root_intr_close(struct usbd_pipe *); 180 Static void ohci_root_intr_done(struct usbd_xfer *); 181 182 Static int ohci_device_ctrl_init(struct usbd_xfer *); 183 Static void ohci_device_ctrl_fini(struct usbd_xfer *); 184 Static usbd_status ohci_device_ctrl_transfer(struct usbd_xfer *); 185 Static usbd_status ohci_device_ctrl_start(struct usbd_xfer *); 186 Static void ohci_device_ctrl_abort(struct usbd_xfer *); 187 Static void ohci_device_ctrl_close(struct usbd_pipe *); 188 Static void ohci_device_ctrl_done(struct usbd_xfer *); 189 190 Static int ohci_device_bulk_init(struct usbd_xfer *); 191 Static void ohci_device_bulk_fini(struct usbd_xfer *); 192 Static usbd_status ohci_device_bulk_transfer(struct usbd_xfer *); 193 Static usbd_status ohci_device_bulk_start(struct usbd_xfer *); 194 Static void ohci_device_bulk_abort(struct usbd_xfer *); 195 Static void ohci_device_bulk_close(struct usbd_pipe *); 196 Static void ohci_device_bulk_done(struct usbd_xfer *); 197 198 Static int ohci_device_intr_init(struct usbd_xfer *); 199 Static void ohci_device_intr_fini(struct usbd_xfer *); 200 Static usbd_status ohci_device_intr_transfer(struct usbd_xfer *); 201 Static usbd_status ohci_device_intr_start(struct usbd_xfer *); 202 Static void ohci_device_intr_abort(struct usbd_xfer *); 203 Static void ohci_device_intr_close(struct usbd_pipe *); 204 Static void ohci_device_intr_done(struct usbd_xfer *); 205 206 Static int ohci_device_isoc_init(struct usbd_xfer *); 207 Static void ohci_device_isoc_fini(struct usbd_xfer *); 208 Static usbd_status ohci_device_isoc_transfer(struct usbd_xfer *); 209 Static void ohci_device_isoc_abort(struct usbd_xfer *); 210 Static void ohci_device_isoc_close(struct usbd_pipe *); 211 Static void ohci_device_isoc_done(struct usbd_xfer *); 212 213 Static usbd_status ohci_device_setintr(ohci_softc_t *, 214 struct ohci_pipe *, int); 215 216 Static void ohci_timeout(void *); 217 Static void ohci_timeout_task(void *); 218 Static void ohci_rhsc_enable(void *); 219 220 Static void ohci_close_pipe(struct usbd_pipe *, ohci_soft_ed_t *); 221 Static void ohci_abort_xfer(struct usbd_xfer *, usbd_status); 222 223 Static void ohci_device_clear_toggle(struct usbd_pipe *); 224 Static void ohci_noop(struct usbd_pipe *); 225 226 #ifdef OHCI_DEBUG 227 Static void ohci_dumpregs(ohci_softc_t *); 228 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 229 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 230 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 231 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 232 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 233 #endif 234 235 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 236 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 237 #define OWRITE1(sc, r, x) \ 238 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 239 #define OWRITE2(sc, r, x) \ 240 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 241 #define OWRITE4(sc, r, x) \ 242 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 243 244 static __inline uint32_t 245 OREAD4(ohci_softc_t *sc, bus_size_t r) 246 { 247 248 OBARR(sc); 249 return bus_space_read_4(sc->iot, sc->ioh, r); 250 } 251 252 /* Reverse the bits in a value 0 .. 31 */ 253 Static uint8_t revbits[OHCI_NO_INTRS] = 254 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 255 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 256 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 257 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 258 259 struct ohci_pipe { 260 struct usbd_pipe pipe; 261 ohci_soft_ed_t *sed; 262 union { 263 ohci_soft_td_t *td; 264 ohci_soft_itd_t *itd; 265 } tail; 266 /* Info needed for different pipe kinds. */ 267 union { 268 /* Control pipe */ 269 struct { 270 usb_dma_t reqdma; 271 } ctrl; 272 /* Interrupt pipe */ 273 struct { 274 int nslots; 275 int pos; 276 } intr; 277 /* Isochronous pipe */ 278 struct isoc { 279 int next, inuse; 280 } isoc; 281 }; 282 }; 283 284 Static const struct usbd_bus_methods ohci_bus_methods = { 285 .ubm_open = ohci_open, 286 .ubm_softint = ohci_softintr, 287 .ubm_dopoll = ohci_poll, 288 .ubm_allocx = ohci_allocx, 289 .ubm_freex = ohci_freex, 290 .ubm_getlock = ohci_get_lock, 291 .ubm_rhctrl = ohci_roothub_ctrl, 292 }; 293 294 Static const struct usbd_pipe_methods ohci_root_intr_methods = { 295 .upm_transfer = ohci_root_intr_transfer, 296 .upm_start = ohci_root_intr_start, 297 .upm_abort = ohci_root_intr_abort, 298 .upm_close = ohci_root_intr_close, 299 .upm_cleartoggle = ohci_noop, 300 .upm_done = ohci_root_intr_done, 301 }; 302 303 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = { 304 .upm_init = ohci_device_ctrl_init, 305 .upm_fini = ohci_device_ctrl_fini, 306 .upm_transfer = ohci_device_ctrl_transfer, 307 .upm_start = ohci_device_ctrl_start, 308 .upm_abort = ohci_device_ctrl_abort, 309 .upm_close = ohci_device_ctrl_close, 310 .upm_cleartoggle = ohci_noop, 311 .upm_done = ohci_device_ctrl_done, 312 }; 313 314 Static const struct usbd_pipe_methods ohci_device_intr_methods = { 315 .upm_init = ohci_device_intr_init, 316 .upm_fini = ohci_device_intr_fini, 317 .upm_transfer = ohci_device_intr_transfer, 318 .upm_start = ohci_device_intr_start, 319 .upm_abort = ohci_device_intr_abort, 320 .upm_close = ohci_device_intr_close, 321 .upm_cleartoggle = ohci_device_clear_toggle, 322 .upm_done = ohci_device_intr_done, 323 }; 324 325 Static const struct usbd_pipe_methods ohci_device_bulk_methods = { 326 .upm_init = ohci_device_bulk_init, 327 .upm_fini = ohci_device_bulk_fini, 328 .upm_transfer = ohci_device_bulk_transfer, 329 .upm_start = ohci_device_bulk_start, 330 .upm_abort = ohci_device_bulk_abort, 331 .upm_close = ohci_device_bulk_close, 332 .upm_cleartoggle = ohci_device_clear_toggle, 333 .upm_done = ohci_device_bulk_done, 334 }; 335 336 Static const struct usbd_pipe_methods ohci_device_isoc_methods = { 337 .upm_init = ohci_device_isoc_init, 338 .upm_fini = ohci_device_isoc_fini, 339 .upm_transfer = ohci_device_isoc_transfer, 340 .upm_abort = ohci_device_isoc_abort, 341 .upm_close = ohci_device_isoc_close, 342 .upm_cleartoggle = ohci_noop, 343 .upm_done = ohci_device_isoc_done, 344 }; 345 346 int 347 ohci_activate(device_t self, enum devact act) 348 { 349 struct ohci_softc *sc = device_private(self); 350 351 switch (act) { 352 case DVACT_DEACTIVATE: 353 sc->sc_dying = 1; 354 return 0; 355 default: 356 return EOPNOTSUPP; 357 } 358 } 359 360 void 361 ohci_childdet(device_t self, device_t child) 362 { 363 struct ohci_softc *sc = device_private(self); 364 365 KASSERT(sc->sc_child == child); 366 sc->sc_child = NULL; 367 } 368 369 int 370 ohci_detach(struct ohci_softc *sc, int flags) 371 { 372 int rv = 0; 373 374 if (sc->sc_child != NULL) 375 rv = config_detach(sc->sc_child, flags); 376 377 if (rv != 0) 378 return rv; 379 380 callout_halt(&sc->sc_tmo_rhsc, &sc->sc_lock); 381 382 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 383 callout_destroy(&sc->sc_tmo_rhsc); 384 385 softint_disestablish(sc->sc_rhsc_si); 386 387 cv_destroy(&sc->sc_softwake_cv); 388 389 mutex_destroy(&sc->sc_lock); 390 mutex_destroy(&sc->sc_intr_lock); 391 392 if (sc->sc_hcca != NULL) 393 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 394 pool_cache_destroy(sc->sc_xferpool); 395 396 return rv; 397 } 398 399 ohci_soft_ed_t * 400 ohci_alloc_sed(ohci_softc_t *sc) 401 { 402 ohci_soft_ed_t *sed; 403 usbd_status err; 404 int i, offs; 405 usb_dma_t dma; 406 407 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 408 409 mutex_enter(&sc->sc_lock); 410 if (sc->sc_freeeds == NULL) { 411 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 412 mutex_exit(&sc->sc_lock); 413 414 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 415 OHCI_ED_ALIGN, &dma); 416 if (err) 417 return 0; 418 419 mutex_enter(&sc->sc_lock); 420 for (i = 0; i < OHCI_SED_CHUNK; i++) { 421 offs = i * OHCI_SED_SIZE; 422 sed = KERNADDR(&dma, offs); 423 sed->physaddr = DMAADDR(&dma, offs); 424 sed->dma = dma; 425 sed->offs = offs; 426 sed->next = sc->sc_freeeds; 427 sc->sc_freeeds = sed; 428 } 429 } 430 sed = sc->sc_freeeds; 431 sc->sc_freeeds = sed->next; 432 mutex_exit(&sc->sc_lock); 433 434 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 435 sed->next = 0; 436 return sed; 437 } 438 439 static inline void 440 ohci_free_sed_locked(ohci_softc_t *sc, ohci_soft_ed_t *sed) 441 { 442 443 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 444 445 sed->next = sc->sc_freeeds; 446 sc->sc_freeeds = sed; 447 } 448 449 void 450 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 451 { 452 453 mutex_enter(&sc->sc_lock); 454 ohci_free_sed_locked(sc, sed); 455 mutex_exit(&sc->sc_lock); 456 } 457 458 ohci_soft_td_t * 459 ohci_alloc_std(ohci_softc_t *sc) 460 { 461 ohci_soft_td_t *std; 462 usbd_status err; 463 int i, offs; 464 usb_dma_t dma; 465 466 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 467 468 mutex_enter(&sc->sc_lock); 469 if (sc->sc_freetds == NULL) { 470 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 471 mutex_exit(&sc->sc_lock); 472 473 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 474 OHCI_TD_ALIGN, &dma); 475 if (err) 476 return NULL; 477 478 mutex_enter(&sc->sc_lock); 479 for (i = 0; i < OHCI_STD_CHUNK; i++) { 480 offs = i * OHCI_STD_SIZE; 481 std = KERNADDR(&dma, offs); 482 std->physaddr = DMAADDR(&dma, offs); 483 std->dma = dma; 484 std->offs = offs; 485 std->nexttd = sc->sc_freetds; 486 sc->sc_freetds = std; 487 } 488 } 489 490 std = sc->sc_freetds; 491 sc->sc_freetds = std->nexttd; 492 mutex_exit(&sc->sc_lock); 493 494 memset(&std->td, 0, sizeof(ohci_td_t)); 495 std->nexttd = NULL; 496 std->xfer = NULL; 497 498 return std; 499 } 500 501 void 502 ohci_free_std_locked(ohci_softc_t *sc, ohci_soft_td_t *std) 503 { 504 505 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 506 507 std->nexttd = sc->sc_freetds; 508 sc->sc_freetds = std; 509 } 510 511 void 512 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 513 { 514 515 mutex_enter(&sc->sc_lock); 516 ohci_free_std_locked(sc, std); 517 mutex_exit(&sc->sc_lock); 518 } 519 520 Static int 521 ohci_alloc_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, int length, int rd) 522 { 523 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 524 uint16_t flags = xfer->ux_flags; 525 526 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 527 528 DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d", 529 xfer->ux_pipe->up_dev->ud_addr, 530 UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress), 531 length, xfer->ux_pipe->up_dev->ud_speed); 532 533 ASSERT_SLEEPABLE(); 534 KASSERT(length != 0 || (!rd && (flags & USBD_FORCE_SHORT_XFER))); 535 536 size_t nstd = (!rd && (flags & USBD_FORCE_SHORT_XFER)) ? 1 : 0; 537 nstd += ((length + OHCI_PAGE_SIZE - 1) / OHCI_PAGE_SIZE); 538 ox->ox_stds = kmem_zalloc(sizeof(ohci_soft_td_t *) * nstd, 539 KM_SLEEP); 540 ox->ox_nstd = nstd; 541 542 DPRINTFN(8, "xfer %p nstd %d", xfer, nstd, 0, 0); 543 544 for (size_t j = 0; j < ox->ox_nstd;) { 545 ohci_soft_td_t *cur = ohci_alloc_std(sc); 546 if (cur == NULL) 547 goto nomem; 548 549 ox->ox_stds[j++] = cur; 550 cur->xfer = xfer; 551 cur->flags = 0; 552 } 553 554 return 0; 555 556 nomem: 557 ohci_free_stds(sc, ox); 558 kmem_free(ox->ox_stds, sizeof(ohci_soft_td_t *) * nstd); 559 560 return ENOMEM; 561 } 562 563 Static void 564 ohci_free_stds(ohci_softc_t *sc, struct ohci_xfer *ox) 565 { 566 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 567 DPRINTF("ox=%p", ox, 0, 0, 0); 568 569 mutex_enter(&sc->sc_lock); 570 for (size_t i = 0; i < ox->ox_nstd; i++) { 571 ohci_soft_td_t *std = ox->ox_stds[i]; 572 if (std == NULL) 573 break; 574 ohci_free_std_locked(sc, std); 575 } 576 mutex_exit(&sc->sc_lock); 577 } 578 579 void 580 ohci_reset_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, 581 int alen, int rd, ohci_soft_td_t *sp, ohci_soft_td_t **ep) 582 { 583 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 584 ohci_soft_td_t *next, *cur; 585 int len, curlen; 586 usb_dma_t *dma = &xfer->ux_dmabuf; 587 uint16_t flags = xfer->ux_flags; 588 589 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 590 DPRINTF("start len=%d", alen, 0, 0, 0); 591 592 KASSERT(mutex_owned(&sc->sc_lock)); 593 594 DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d", 595 xfer->ux_pipe->up_dev->ud_addr, 596 UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress), 597 alen, xfer->ux_pipe->up_dev->ud_speed); 598 599 KASSERT(sp); 600 601 int mps = UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize); 602 603 /* 604 * Assign next for the len == 0 case where we don't go through the 605 * main loop. 606 */ 607 len = alen; 608 cur = next = sp; 609 610 usb_syncmem(dma, 0, len, 611 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 612 const uint32_t tdflags = HTOO32( 613 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 614 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 615 616 size_t curoffs = 0; 617 for (size_t j = 1; len != 0;) { 618 if (j == ox->ox_nstd) 619 next = NULL; 620 else 621 next = ox->ox_stds[j++]; 622 KASSERT(next != cur); 623 624 curlen = 0; 625 ohci_physaddr_t sdataphys = DMAADDR(dma, curoffs); 626 ohci_physaddr_t edataphys = DMAADDR(dma, curoffs + len - 1); 627 628 ohci_physaddr_t sphyspg = OHCI_PAGE(sdataphys); 629 ohci_physaddr_t ephyspg = OHCI_PAGE(edataphys); 630 /* 631 * The OHCI hardware can handle at most one page 632 * crossing per TD 633 */ 634 curlen = len; 635 if (sphyspg != ephyspg && 636 sphyspg + OHCI_PAGE_SIZE != ephyspg) { 637 /* must use multiple TDs, fill as much as possible. */ 638 curlen = 2 * OHCI_PAGE_SIZE - 639 (sdataphys & (OHCI_PAGE_SIZE - 1)); 640 /* the length must be a multiple of the max size */ 641 curlen -= curlen % mps; 642 } 643 KASSERT(curlen != 0); 644 DPRINTFN(4, "sdataphys=0x%08x edataphys=0x%08x " 645 "len=%d curlen=%d", sdataphys, edataphys, len, curlen); 646 647 cur->td.td_flags = tdflags; 648 cur->td.td_cbp = HTOO32(sdataphys); 649 cur->td.td_be = HTOO32(edataphys); 650 cur->td.td_nexttd = (next != NULL) ? HTOO32(next->physaddr) : 0; 651 cur->nexttd = next; 652 cur->len = curlen; 653 cur->flags = OHCI_ADD_LEN; 654 cur->xfer = xfer; 655 ohci_hash_add_td(sc, cur); 656 657 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 658 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 659 660 curoffs += curlen; 661 len -= curlen; 662 663 if (len != 0) { 664 KASSERT(next != NULL); 665 DPRINTFN(10, "extend chain", 0, 0, 0, 0); 666 cur = next; 667 } 668 } 669 cur->td.td_flags |= 670 HTOO32(xfer->ux_flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0); 671 672 if (!rd && 673 (flags & USBD_FORCE_SHORT_XFER) && 674 alen % mps == 0) { 675 /* Force a 0 length transfer at the end. */ 676 677 KASSERT(next != NULL); 678 cur = next; 679 680 cur->td.td_flags = tdflags; 681 cur->td.td_cbp = 0; /* indicate 0 length packet */ 682 cur->td.td_nexttd = 0; 683 cur->td.td_be = ~0; 684 cur->nexttd = NULL; 685 cur->len = 0; 686 cur->flags = 0; 687 cur->xfer = xfer; 688 ohci_hash_add_td(sc, cur); 689 690 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 691 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 692 DPRINTFN(2, "add 0 xfer", 0, 0, 0, 0); 693 } 694 *ep = cur; 695 } 696 697 ohci_soft_itd_t * 698 ohci_alloc_sitd(ohci_softc_t *sc) 699 { 700 ohci_soft_itd_t *sitd; 701 usbd_status err; 702 int i, offs; 703 usb_dma_t dma; 704 705 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 706 707 mutex_enter(&sc->sc_lock); 708 if (sc->sc_freeitds == NULL) { 709 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 710 mutex_exit(&sc->sc_lock); 711 712 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 713 OHCI_ITD_ALIGN, &dma); 714 if (err) 715 return NULL; 716 mutex_enter(&sc->sc_lock); 717 for (i = 0; i < OHCI_SITD_CHUNK; i++) { 718 offs = i * OHCI_SITD_SIZE; 719 sitd = KERNADDR(&dma, offs); 720 sitd->physaddr = DMAADDR(&dma, offs); 721 sitd->dma = dma; 722 sitd->offs = offs; 723 sitd->nextitd = sc->sc_freeitds; 724 sc->sc_freeitds = sitd; 725 } 726 } 727 728 sitd = sc->sc_freeitds; 729 sc->sc_freeitds = sitd->nextitd; 730 mutex_exit(&sc->sc_lock); 731 732 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 733 sitd->nextitd = NULL; 734 sitd->xfer = NULL; 735 736 #ifdef DIAGNOSTIC 737 sitd->isdone = true; 738 #endif 739 740 return sitd; 741 } 742 743 Static void 744 ohci_free_sitd_locked(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 745 { 746 747 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 748 DPRINTFN(10, "sitd=%p", sitd, 0, 0, 0); 749 750 KASSERT(sitd->isdone); 751 #ifdef DIAGNOSTIC 752 /* Warn double free */ 753 sitd->isdone = false; 754 #endif 755 756 sitd->nextitd = sc->sc_freeitds; 757 sc->sc_freeitds = sitd; 758 } 759 760 void 761 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 762 { 763 764 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 765 766 mutex_enter(&sc->sc_lock); 767 ohci_free_sitd_locked(sc, sitd); 768 mutex_exit(&sc->sc_lock); 769 } 770 771 int 772 ohci_init(ohci_softc_t *sc) 773 { 774 ohci_soft_ed_t *sed, *psed; 775 usbd_status err; 776 int i; 777 uint32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca /*, descb */; 778 779 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 780 781 aprint_normal_dev(sc->sc_dev, ""); 782 783 sc->sc_hcca = NULL; 784 callout_init(&sc->sc_tmo_rhsc, CALLOUT_MPSAFE); 785 786 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 787 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_USB); 788 cv_init(&sc->sc_softwake_cv, "ohciab"); 789 790 sc->sc_rhsc_si = softint_establish(SOFTINT_USB | SOFTINT_MPSAFE, 791 ohci_rhsc_softint, sc); 792 793 for (i = 0; i < OHCI_HASH_SIZE; i++) 794 LIST_INIT(&sc->sc_hash_tds[i]); 795 for (i = 0; i < OHCI_HASH_SIZE; i++) 796 LIST_INIT(&sc->sc_hash_itds[i]); 797 798 sc->sc_xferpool = pool_cache_init(sizeof(struct ohci_xfer), 0, 0, 0, 799 "ohcixfer", NULL, IPL_USB, NULL, NULL, NULL); 800 801 rev = OREAD4(sc, OHCI_REVISION); 802 aprint_normal("OHCI version %d.%d%s\n", 803 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 804 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 805 806 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 807 aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n"); 808 sc->sc_bus.ub_revision = USBREV_UNKNOWN; 809 return -1; 810 } 811 sc->sc_bus.ub_revision = USBREV_1_0; 812 sc->sc_bus.ub_usedma = true; 813 814 /* XXX determine alignment by R/W */ 815 /* Allocate the HCCA area. */ 816 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 817 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 818 if (err) { 819 sc->sc_hcca = NULL; 820 return err; 821 } 822 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 823 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 824 825 sc->sc_eintrs = OHCI_NORMAL_INTRS; 826 827 /* Allocate dummy ED that starts the control list. */ 828 sc->sc_ctrl_head = ohci_alloc_sed(sc); 829 if (sc->sc_ctrl_head == NULL) { 830 err = ENOMEM; 831 goto bad1; 832 } 833 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 834 835 /* Allocate dummy ED that starts the bulk list. */ 836 sc->sc_bulk_head = ohci_alloc_sed(sc); 837 if (sc->sc_bulk_head == NULL) { 838 err = ENOMEM; 839 goto bad2; 840 } 841 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 842 usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs, 843 sizeof(sc->sc_bulk_head->ed), 844 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 845 846 /* Allocate dummy ED that starts the isochronous list. */ 847 sc->sc_isoc_head = ohci_alloc_sed(sc); 848 if (sc->sc_isoc_head == NULL) { 849 err = ENOMEM; 850 goto bad3; 851 } 852 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 853 usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs, 854 sizeof(sc->sc_isoc_head->ed), 855 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 856 857 /* Allocate all the dummy EDs that make up the interrupt tree. */ 858 for (i = 0; i < OHCI_NO_EDS; i++) { 859 sed = ohci_alloc_sed(sc); 860 if (sed == NULL) { 861 while (--i >= 0) 862 ohci_free_sed(sc, sc->sc_eds[i]); 863 err = ENOMEM; 864 goto bad4; 865 } 866 /* All ED fields are set to 0. */ 867 sc->sc_eds[i] = sed; 868 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 869 if (i != 0) 870 psed = sc->sc_eds[(i-1) / 2]; 871 else 872 psed= sc->sc_isoc_head; 873 sed->next = psed; 874 sed->ed.ed_nexted = HTOO32(psed->physaddr); 875 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 876 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 877 } 878 /* 879 * Fill HCCA interrupt table. The bit reversal is to get 880 * the tree set up properly to spread the interrupts. 881 */ 882 for (i = 0; i < OHCI_NO_INTRS; i++) 883 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 884 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 885 usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE, 886 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 887 888 #ifdef OHCI_DEBUG 889 DPRINTFN(15, "--- dump start ---", 0, 0, 0 ,0); 890 if (ohcidebug >= 15) { 891 for (i = 0; i < OHCI_NO_EDS; i++) { 892 DPRINTFN(15, "ed#%d ", i, 0, 0, 0); 893 ohci_dump_ed(sc, sc->sc_eds[i]); 894 } 895 DPRINTFN(15, "iso", 0, 0, 0 ,0); 896 ohci_dump_ed(sc, sc->sc_isoc_head); 897 } 898 DPRINTFN(15, "--- dump end ---", 0, 0, 0 ,0); 899 #endif 900 901 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 902 ctl = OREAD4(sc, OHCI_CONTROL); 903 rwc = ctl & OHCI_RWC; 904 fm = OREAD4(sc, OHCI_FM_INTERVAL); 905 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 906 /* descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); */ 907 908 /* Determine in what context we are running. */ 909 if (ctl & OHCI_IR) { 910 /* SMM active, request change */ 911 DPRINTF("SMM active, request owner change", 0, 0, 0, 0); 912 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 913 (OHCI_OC | OHCI_MIE)) 914 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 915 s = OREAD4(sc, OHCI_COMMAND_STATUS); 916 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 917 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 918 usb_delay_ms(&sc->sc_bus, 1); 919 ctl = OREAD4(sc, OHCI_CONTROL); 920 } 921 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 922 if ((ctl & OHCI_IR) == 0) { 923 aprint_error_dev(sc->sc_dev, 924 "SMM does not respond, resetting\n"); 925 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 926 goto reset; 927 } 928 #if 0 929 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 930 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 931 /* BIOS started controller. */ 932 DPRINTF("BIOS active", 0, 0, 0, 0); 933 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 934 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 935 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 936 } 937 #endif 938 } else { 939 DPRINTF("cold started", 0 ,0 ,0 ,0); 940 reset: 941 /* Controller was cold started. */ 942 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 943 } 944 945 /* 946 * This reset should not be necessary according to the OHCI spec, but 947 * without it some controllers do not start. 948 */ 949 DPRINTF("sc %p: resetting", sc, 0, 0, 0); 950 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 951 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 952 953 /* We now own the host controller and the bus has been reset. */ 954 955 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 956 /* Nominal time for a reset is 10 us. */ 957 for (i = 0; i < 10; i++) { 958 delay(10); 959 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 960 if (!hcr) 961 break; 962 } 963 if (hcr) { 964 aprint_error_dev(sc->sc_dev, "reset timeout\n"); 965 err = EIO; 966 goto bad5; 967 } 968 #ifdef OHCI_DEBUG 969 if (ohcidebug >= 15) 970 ohci_dumpregs(sc); 971 #endif 972 973 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 974 975 /* Set up HC registers. */ 976 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 977 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 978 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 979 /* disable all interrupts and then switch on all desired interrupts */ 980 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 981 /* switch on desired functional features */ 982 ctl = OREAD4(sc, OHCI_CONTROL); 983 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 984 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 985 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 986 /* And finally start it! */ 987 OWRITE4(sc, OHCI_CONTROL, ctl); 988 989 /* 990 * The controller is now OPERATIONAL. Set a some final 991 * registers that should be set earlier, but that the 992 * controller ignores when in the SUSPEND state. 993 */ 994 ival = OHCI_GET_IVAL(fm); 995 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 996 fm |= OHCI_FSMPS(ival) | ival; 997 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 998 per = OHCI_PERIODIC(ival); /* 90% periodic */ 999 OWRITE4(sc, OHCI_PERIODIC_START, per); 1000 1001 if (sc->sc_flags & OHCIF_SUPERIO) { 1002 /* no overcurrent protection */ 1003 desca |= OHCI_NOCP; 1004 /* 1005 * Clear NoPowerSwitching and PowerOnToPowerGoodTime meaning 1006 * that 1007 * - ports are always power switched 1008 * - don't wait for powered root hub port 1009 */ 1010 desca &= ~(__SHIFTIN(0xff, OHCI_POTPGT_MASK) | OHCI_NPS); 1011 } 1012 1013 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 1014 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 1015 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 1016 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 1017 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 1018 1019 /* 1020 * The AMD756 requires a delay before re-reading the register, 1021 * otherwise it will occasionally report 0 ports. 1022 */ 1023 sc->sc_noport = 0; 1024 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 1025 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 1026 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 1027 } 1028 1029 #ifdef OHCI_DEBUG 1030 if (ohcidebug >= 5) 1031 ohci_dumpregs(sc); 1032 #endif 1033 1034 /* Set up the bus struct. */ 1035 sc->sc_bus.ub_methods = &ohci_bus_methods; 1036 sc->sc_bus.ub_pipesize = sizeof(struct ohci_pipe); 1037 1038 sc->sc_control = sc->sc_intre = 0; 1039 1040 /* Finally, turn on interrupts. */ 1041 DPRINTF("enabling %#x", sc->sc_eintrs | OHCI_MIE, 0, 0, 0); 1042 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 1043 1044 return 0; 1045 1046 bad5: 1047 for (i = 0; i < OHCI_NO_EDS; i++) 1048 ohci_free_sed(sc, sc->sc_eds[i]); 1049 bad4: 1050 ohci_free_sed(sc, sc->sc_isoc_head); 1051 bad3: 1052 ohci_free_sed(sc, sc->sc_bulk_head); 1053 bad2: 1054 ohci_free_sed(sc, sc->sc_ctrl_head); 1055 bad1: 1056 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 1057 sc->sc_hcca = NULL; 1058 return err; 1059 } 1060 1061 struct usbd_xfer * 1062 ohci_allocx(struct usbd_bus *bus, unsigned int nframes) 1063 { 1064 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1065 struct usbd_xfer *xfer; 1066 1067 xfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT); 1068 if (xfer != NULL) { 1069 memset(xfer, 0, sizeof(struct ohci_xfer)); 1070 #ifdef DIAGNOSTIC 1071 xfer->ux_state = XFER_BUSY; 1072 #endif 1073 } 1074 return xfer; 1075 } 1076 1077 void 1078 ohci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 1079 { 1080 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1081 1082 KASSERTMSG(xfer->ux_state == XFER_BUSY, 1083 "xfer=%p not busy, 0x%08x\n", xfer, xfer->ux_state); 1084 #ifdef DIAGNOSTIC 1085 xfer->ux_state = XFER_FREE; 1086 #endif 1087 pool_cache_put(sc->sc_xferpool, xfer); 1088 } 1089 1090 Static void 1091 ohci_get_lock(struct usbd_bus *bus, kmutex_t **lock) 1092 { 1093 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1094 1095 *lock = &sc->sc_lock; 1096 } 1097 1098 /* 1099 * Shut down the controller when the system is going down. 1100 */ 1101 bool 1102 ohci_shutdown(device_t self, int flags) 1103 { 1104 ohci_softc_t *sc = device_private(self); 1105 1106 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1107 1108 DPRINTF("stopping the HC", 0, 0, 0, 0); 1109 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1110 return true; 1111 } 1112 1113 bool 1114 ohci_resume(device_t dv, const pmf_qual_t *qual) 1115 { 1116 ohci_softc_t *sc = device_private(dv); 1117 uint32_t ctl; 1118 1119 mutex_spin_enter(&sc->sc_intr_lock); 1120 sc->sc_bus.ub_usepolling++; 1121 mutex_spin_exit(&sc->sc_intr_lock); 1122 1123 /* Some broken BIOSes do not recover these values */ 1124 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1125 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, 1126 sc->sc_ctrl_head->physaddr); 1127 OWRITE4(sc, OHCI_BULK_HEAD_ED, 1128 sc->sc_bulk_head->physaddr); 1129 if (sc->sc_intre) 1130 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre & 1131 (OHCI_ALL_INTRS | OHCI_MIE)); 1132 if (sc->sc_control) 1133 ctl = sc->sc_control; 1134 else 1135 ctl = OREAD4(sc, OHCI_CONTROL); 1136 ctl |= OHCI_HCFS_RESUME; 1137 OWRITE4(sc, OHCI_CONTROL, ctl); 1138 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1139 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1140 OWRITE4(sc, OHCI_CONTROL, ctl); 1141 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1142 sc->sc_control = sc->sc_intre = 0; 1143 1144 mutex_spin_enter(&sc->sc_intr_lock); 1145 sc->sc_bus.ub_usepolling--; 1146 mutex_spin_exit(&sc->sc_intr_lock); 1147 1148 return true; 1149 } 1150 1151 bool 1152 ohci_suspend(device_t dv, const pmf_qual_t *qual) 1153 { 1154 ohci_softc_t *sc = device_private(dv); 1155 uint32_t ctl; 1156 1157 mutex_spin_enter(&sc->sc_intr_lock); 1158 sc->sc_bus.ub_usepolling++; 1159 mutex_spin_exit(&sc->sc_intr_lock); 1160 1161 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1162 if (sc->sc_control == 0) { 1163 /* 1164 * Preserve register values, in case that BIOS 1165 * does not recover them. 1166 */ 1167 sc->sc_control = ctl; 1168 sc->sc_intre = OREAD4(sc, 1169 OHCI_INTERRUPT_ENABLE); 1170 } 1171 ctl |= OHCI_HCFS_SUSPEND; 1172 OWRITE4(sc, OHCI_CONTROL, ctl); 1173 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1174 1175 mutex_spin_enter(&sc->sc_intr_lock); 1176 sc->sc_bus.ub_usepolling--; 1177 mutex_spin_exit(&sc->sc_intr_lock); 1178 1179 return true; 1180 } 1181 1182 #ifdef OHCI_DEBUG 1183 void 1184 ohci_dumpregs(ohci_softc_t *sc) 1185 { 1186 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1187 1188 DPRINTF("rev=0x%08x control=0x%08x command=0x%08x", 1189 OREAD4(sc, OHCI_REVISION), 1190 OREAD4(sc, OHCI_CONTROL), 1191 OREAD4(sc, OHCI_COMMAND_STATUS), 0); 1192 DPRINTF(" intrstat=0x%08x intre=0x%08x intrd=0x%08x", 1193 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1194 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1195 OREAD4(sc, OHCI_INTERRUPT_DISABLE), 0); 1196 DPRINTF(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x", 1197 OREAD4(sc, OHCI_HCCA), 1198 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1199 OREAD4(sc, OHCI_CONTROL_HEAD_ED), 0); 1200 DPRINTF(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x", 1201 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1202 OREAD4(sc, OHCI_BULK_HEAD_ED), 1203 OREAD4(sc, OHCI_BULK_CURRENT_ED) ,0); 1204 DPRINTF(" done=0x%08x fmival=0x%08x fmrem=0x%08x", 1205 OREAD4(sc, OHCI_DONE_HEAD), 1206 OREAD4(sc, OHCI_FM_INTERVAL), 1207 OREAD4(sc, OHCI_FM_REMAINING), 0); 1208 DPRINTF(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x", 1209 OREAD4(sc, OHCI_FM_NUMBER), 1210 OREAD4(sc, OHCI_PERIODIC_START), 1211 OREAD4(sc, OHCI_LS_THRESHOLD), 0); 1212 DPRINTF(" desca=0x%08x descb=0x%08x stat=0x%08x", 1213 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1214 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1215 OREAD4(sc, OHCI_RH_STATUS), 0); 1216 DPRINTF(" port1=0x%08x port2=0x%08x", 1217 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1218 OREAD4(sc, OHCI_RH_PORT_STATUS(2)), 0, 0); 1219 DPRINTF(" HCCA: frame_number=0x%04x done_head=0x%08x", 1220 O32TOH(sc->sc_hcca->hcca_frame_number), 1221 O32TOH(sc->sc_hcca->hcca_done_head), 0, 0); 1222 } 1223 #endif 1224 1225 Static int ohci_intr1(ohci_softc_t *); 1226 1227 int 1228 ohci_intr(void *p) 1229 { 1230 ohci_softc_t *sc = p; 1231 int ret = 0; 1232 1233 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1234 1235 if (sc == NULL) 1236 return 0; 1237 1238 mutex_spin_enter(&sc->sc_intr_lock); 1239 1240 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1241 goto done; 1242 1243 /* If we get an interrupt while polling, then just ignore it. */ 1244 if (sc->sc_bus.ub_usepolling) { 1245 DPRINTFN(16, "ignored interrupt while polling", 0, 0, 0, 0); 1246 /* for level triggered intrs, should do something to ack */ 1247 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1248 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1249 1250 goto done; 1251 } 1252 1253 ret = ohci_intr1(sc); 1254 1255 done: 1256 mutex_spin_exit(&sc->sc_intr_lock); 1257 return ret; 1258 } 1259 1260 Static int 1261 ohci_intr1(ohci_softc_t *sc) 1262 { 1263 uint32_t intrs, eintrs; 1264 1265 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1266 1267 /* In case the interrupt occurs before initialization has completed. */ 1268 if (sc == NULL || sc->sc_hcca == NULL) { 1269 #ifdef DIAGNOSTIC 1270 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1271 #endif 1272 return 0; 1273 } 1274 1275 KASSERT(mutex_owned(&sc->sc_intr_lock)); 1276 1277 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1278 if (!intrs) 1279 return 0; 1280 1281 /* Acknowledge */ 1282 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); 1283 eintrs = intrs & sc->sc_eintrs; 1284 DPRINTFN(7, "sc=%p", sc, 0, 0, 0); 1285 DPRINTFN(7, "intrs=%#x(%#x) eintrs=%#x(%#x)", 1286 intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), eintrs, 1287 sc->sc_eintrs); 1288 1289 if (!eintrs) { 1290 return 0; 1291 } 1292 1293 if (eintrs & OHCI_SO) { 1294 sc->sc_overrun_cnt++; 1295 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1296 printf("%s: %u scheduling overruns\n", 1297 device_xname(sc->sc_dev), sc->sc_overrun_cnt); 1298 sc->sc_overrun_cnt = 0; 1299 } 1300 /* XXX do what */ 1301 eintrs &= ~OHCI_SO; 1302 } 1303 if (eintrs & OHCI_WDH) { 1304 /* 1305 * We block the interrupt below, and reenable it later from 1306 * ohci_softintr(). 1307 */ 1308 usb_schedsoftintr(&sc->sc_bus); 1309 } 1310 if (eintrs & OHCI_RD) { 1311 DPRINTFN(5, "resume detect", sc, 0, 0, 0); 1312 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1313 /* XXX process resume detect */ 1314 } 1315 if (eintrs & OHCI_UE) { 1316 DPRINTFN(5, "unrecoverable error", sc, 0, 0, 0); 1317 printf("%s: unrecoverable error, controller halted\n", 1318 device_xname(sc->sc_dev)); 1319 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1320 /* XXX what else */ 1321 } 1322 if (eintrs & OHCI_RHSC) { 1323 /* 1324 * We block the interrupt below, and reenable it later from 1325 * a timeout. 1326 */ 1327 softint_schedule(sc->sc_rhsc_si); 1328 } 1329 1330 if (eintrs != 0) { 1331 /* Block unprocessed interrupts. */ 1332 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1333 sc->sc_eintrs &= ~eintrs; 1334 DPRINTF("sc %p blocking intrs 0x%x", sc, eintrs, 0, 0); 1335 } 1336 1337 return 1; 1338 } 1339 1340 void 1341 ohci_rhsc_enable(void *v_sc) 1342 { 1343 ohci_softc_t *sc = v_sc; 1344 1345 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1346 DPRINTF("sc %p", sc, 0, 0, 0); 1347 mutex_spin_enter(&sc->sc_intr_lock); 1348 sc->sc_eintrs |= OHCI_RHSC; 1349 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1350 mutex_spin_exit(&sc->sc_intr_lock); 1351 } 1352 1353 #ifdef OHCI_DEBUG 1354 const char *ohci_cc_strs[] = { 1355 "NO_ERROR", 1356 "CRC", 1357 "BIT_STUFFING", 1358 "DATA_TOGGLE_MISMATCH", 1359 "STALL", 1360 "DEVICE_NOT_RESPONDING", 1361 "PID_CHECK_FAILURE", 1362 "UNEXPECTED_PID", 1363 "DATA_OVERRUN", 1364 "DATA_UNDERRUN", 1365 "BUFFER_OVERRUN", 1366 "BUFFER_UNDERRUN", 1367 "reserved", 1368 "reserved", 1369 "NOT_ACCESSED", 1370 "NOT_ACCESSED", 1371 }; 1372 #endif 1373 1374 void 1375 ohci_softintr(void *v) 1376 { 1377 struct usbd_bus *bus = v; 1378 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1379 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1380 ohci_soft_td_t *std, *sdone, *stdnext; 1381 struct usbd_xfer *xfer; 1382 struct ohci_pipe *opipe; 1383 int len, cc; 1384 int i, j, actlen, iframes, uedir; 1385 ohci_physaddr_t done; 1386 1387 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1388 1389 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1390 1391 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1392 sizeof(sc->sc_hcca->hcca_done_head), 1393 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1394 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1395 sc->sc_hcca->hcca_done_head = 0; 1396 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1397 sizeof(sc->sc_hcca->hcca_done_head), 1398 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1399 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1400 sc->sc_eintrs |= OHCI_WDH; 1401 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1402 1403 /* Reverse the done list. */ 1404 for (sdone = NULL, sidone = NULL; done != 0; ) { 1405 std = ohci_hash_find_td(sc, done); 1406 if (std != NULL) { 1407 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1408 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1409 std->dnext = sdone; 1410 done = O32TOH(std->td.td_nexttd); 1411 sdone = std; 1412 DPRINTFN(10, "add TD %p", std, 0, 0, 0); 1413 continue; 1414 } 1415 sitd = ohci_hash_find_itd(sc, done); 1416 if (sitd != NULL) { 1417 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1418 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1419 sitd->dnext = sidone; 1420 done = O32TOH(sitd->itd.itd_nextitd); 1421 sidone = sitd; 1422 DPRINTFN(5, "add ITD %p", sitd, 0, 0, 0); 1423 continue; 1424 } 1425 DPRINTFN(10, "addr %p not found", done, 0, 0, 0); 1426 device_printf(sc->sc_dev, "WARNING: addr 0x%08lx not found\n", 1427 (u_long)done); 1428 break; 1429 } 1430 1431 DPRINTFN(10, "sdone=%p sidone=%p", sdone, sidone, 0, 0); 1432 DPRINTFN(10, "--- TD dump start ---", 0, 0, 0, 0); 1433 #ifdef OHCI_DEBUG 1434 if (ohcidebug >= 10) { 1435 for (std = sdone; std; std = std->dnext) 1436 ohci_dump_td(sc, std); 1437 } 1438 #endif 1439 DPRINTFN(10, "--- TD dump end ---", 0, 0, 0, 0); 1440 1441 for (std = sdone; std; std = stdnext) { 1442 xfer = std->xfer; 1443 stdnext = std->dnext; 1444 DPRINTFN(10, "std=%p xfer=%p hcpriv=%p", std, xfer, 1445 xfer ? xfer->ux_hcpriv : 0, 0); 1446 if (xfer == NULL) { 1447 /* 1448 * xfer == NULL: There seems to be no xfer associated 1449 * with this TD. It is tailp that happened to end up on 1450 * the done queue. 1451 * Shouldn't happen, but some chips are broken(?). 1452 */ 1453 continue; 1454 } 1455 if (xfer->ux_status == USBD_CANCELLED || 1456 xfer->ux_status == USBD_TIMEOUT) { 1457 DPRINTF("cancel/timeout %p", xfer, 0, 0, 0); 1458 /* Handled by abort routine. */ 1459 continue; 1460 } 1461 callout_stop(&xfer->ux_callout); 1462 1463 len = std->len; 1464 if (std->td.td_cbp != 0) 1465 len -= O32TOH(std->td.td_be) - 1466 O32TOH(std->td.td_cbp) + 1; 1467 DPRINTFN(10, "len=%d, flags=0x%x", len, std->flags, 0, 0); 1468 if (std->flags & OHCI_ADD_LEN) 1469 xfer->ux_actlen += len; 1470 1471 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1472 if (cc == OHCI_CC_NO_ERROR) { 1473 ohci_hash_rem_td(sc, std); 1474 if (std->flags & OHCI_CALL_DONE) { 1475 xfer->ux_status = USBD_NORMAL_COMPLETION; 1476 usb_transfer_complete(xfer); 1477 } 1478 } else { 1479 /* 1480 * Endpoint is halted. First unlink all the TDs 1481 * belonging to the failed transfer, and then restart 1482 * the endpoint. 1483 */ 1484 ohci_soft_td_t *p, *n; 1485 opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1486 1487 DPRINTFN(10, "error cc=%d", cc, 0, 0, 0); 1488 1489 /* remove xfer's TDs from the hash */ 1490 for (p = std; p->xfer == xfer; p = n) { 1491 n = p->nexttd; 1492 ohci_hash_rem_td(sc, p); 1493 } 1494 1495 ohci_soft_ed_t *sed = opipe->sed; 1496 1497 /* clear halt and TD chain */ 1498 sed->ed.ed_headp = HTOO32(p->physaddr); 1499 usb_syncmem(&sed->dma, 1500 sed->offs + offsetof(ohci_ed_t, ed_headp), 1501 sizeof(sed->ed.ed_headp), 1502 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1503 1504 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1505 1506 if (cc == OHCI_CC_DATA_UNDERRUN) 1507 xfer->ux_status = USBD_NORMAL_COMPLETION; 1508 else if (cc == OHCI_CC_STALL) 1509 xfer->ux_status = USBD_STALLED; 1510 else 1511 xfer->ux_status = USBD_IOERROR; 1512 usb_transfer_complete(xfer); 1513 } 1514 } 1515 DPRINTFN(10, "--- ITD dump start ---", 0, 0, 0, 0); 1516 #ifdef OHCI_DEBUG 1517 if (ohcidebug >= 10) { 1518 for (sitd = sidone; sitd; sitd = sitd->dnext) 1519 ohci_dump_itd(sc, sitd); 1520 } 1521 #endif 1522 DPRINTFN(10, "--- ITD dump end ---", 0, 0, 0, 0); 1523 1524 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1525 xfer = sitd->xfer; 1526 sitdnext = sitd->dnext; 1527 DPRINTFN(1, "sitd=%p xfer=%p hcpriv=%p", sitd, xfer, 1528 xfer ? xfer->ux_hcpriv : 0, 0); 1529 if (xfer == NULL) 1530 continue; 1531 if (xfer->ux_status == USBD_CANCELLED || 1532 xfer->ux_status == USBD_TIMEOUT) { 1533 DPRINTF("cancel/timeout %p", xfer, 0, 0, 0); 1534 /* Handled by abort routine. */ 1535 continue; 1536 } 1537 KASSERT(!sitd->isdone); 1538 #ifdef DIAGNOSTIC 1539 sitd->isdone = true; 1540 #endif 1541 if (sitd->flags & OHCI_CALL_DONE) { 1542 ohci_soft_itd_t *next; 1543 1544 opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1545 opipe->isoc.inuse -= xfer->ux_nframes; 1546 uedir = UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc-> 1547 bEndpointAddress); 1548 xfer->ux_status = USBD_NORMAL_COMPLETION; 1549 actlen = 0; 1550 for (i = 0, sitd = xfer->ux_hcpriv;; 1551 sitd = next) { 1552 next = sitd->nextitd; 1553 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1554 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1555 xfer->ux_status = USBD_IOERROR; 1556 /* For input, update frlengths with actual */ 1557 /* XXX anything necessary for output? */ 1558 if (uedir == UE_DIR_IN && 1559 xfer->ux_status == USBD_NORMAL_COMPLETION) { 1560 iframes = OHCI_ITD_GET_FC(O32TOH( 1561 sitd->itd.itd_flags)); 1562 for (j = 0; j < iframes; i++, j++) { 1563 len = O16TOH(sitd-> 1564 itd.itd_offset[j]); 1565 if ((OHCI_ITD_PSW_GET_CC(len) & 1566 OHCI_CC_NOT_ACCESSED_MASK) 1567 == OHCI_CC_NOT_ACCESSED) 1568 len = 0; 1569 else 1570 len = OHCI_ITD_PSW_LENGTH(len); 1571 xfer->ux_frlengths[i] = len; 1572 actlen += len; 1573 } 1574 } 1575 if (sitd->flags & OHCI_CALL_DONE) 1576 break; 1577 ohci_hash_rem_itd(sc, sitd); 1578 1579 } 1580 ohci_hash_rem_itd(sc, sitd); 1581 if (uedir == UE_DIR_IN && 1582 xfer->ux_status == USBD_NORMAL_COMPLETION) 1583 xfer->ux_actlen = actlen; 1584 xfer->ux_hcpriv = NULL; 1585 1586 usb_transfer_complete(xfer); 1587 } 1588 } 1589 1590 if (sc->sc_softwake) { 1591 sc->sc_softwake = 0; 1592 cv_broadcast(&sc->sc_softwake_cv); 1593 } 1594 1595 DPRINTFN(10, "done", 0, 0, 0, 0); 1596 } 1597 1598 void 1599 ohci_device_ctrl_done(struct usbd_xfer *xfer) 1600 { 1601 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1602 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1603 int len = UGETW(xfer->ux_request.wLength); 1604 int isread = (xfer->ux_request.bmRequestType & UT_READ); 1605 1606 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1607 DPRINTFN(10, "xfer=%p", xfer, 0, 0, 0); 1608 1609 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1610 KASSERT(xfer->ux_rqflags & URQ_REQUEST); 1611 1612 if (len) 1613 usb_syncmem(&xfer->ux_dmabuf, 0, len, 1614 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1615 usb_syncmem(&opipe->ctrl.reqdma, 0, 1616 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 1617 } 1618 1619 void 1620 ohci_device_intr_done(struct usbd_xfer *xfer) 1621 { 1622 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1623 int isread = 1624 (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN); 1625 1626 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1627 DPRINTFN(10, "xfer=%p, actlen=%d", xfer, xfer->ux_actlen, 0, 0); 1628 1629 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1630 1631 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 1632 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1633 } 1634 1635 void 1636 ohci_device_bulk_done(struct usbd_xfer *xfer) 1637 { 1638 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1639 1640 int isread = 1641 (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN); 1642 1643 KASSERT(mutex_owned(&sc->sc_lock)); 1644 1645 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1646 DPRINTFN(10, "xfer=%p, actlen=%d", xfer, xfer->ux_actlen, 0, 0); 1647 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 1648 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1649 } 1650 1651 Static void 1652 ohci_rhsc_softint(void *arg) 1653 { 1654 ohci_softc_t *sc = arg; 1655 1656 mutex_enter(&sc->sc_lock); 1657 1658 ohci_rhsc(sc, sc->sc_intrxfer); 1659 1660 /* Do not allow RHSC interrupts > 1 per second */ 1661 callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1662 1663 mutex_exit(&sc->sc_lock); 1664 } 1665 1666 void 1667 ohci_rhsc(ohci_softc_t *sc, struct usbd_xfer *xfer) 1668 { 1669 u_char *p; 1670 int i, m; 1671 int hstatus __unused; 1672 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1673 1674 KASSERT(mutex_owned(&sc->sc_lock)); 1675 1676 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1677 DPRINTF("sc=%p xfer=%p hstatus=0x%08x", sc, xfer, hstatus, 0); 1678 1679 if (xfer == NULL) { 1680 /* Just ignore the change. */ 1681 return; 1682 } 1683 1684 p = xfer->ux_buf; 1685 m = min(sc->sc_noport, xfer->ux_length * 8 - 1); 1686 memset(p, 0, xfer->ux_length); 1687 for (i = 1; i <= m; i++) { 1688 /* Pick out CHANGE bits from the status reg. */ 1689 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1690 p[i/8] |= 1 << (i%8); 1691 } 1692 DPRINTF("change=0x%02x", *p, 0, 0, 0); 1693 xfer->ux_actlen = xfer->ux_length; 1694 xfer->ux_status = USBD_NORMAL_COMPLETION; 1695 1696 usb_transfer_complete(xfer); 1697 } 1698 1699 void 1700 ohci_root_intr_done(struct usbd_xfer *xfer) 1701 { 1702 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1703 1704 KASSERT(mutex_owned(&sc->sc_lock)); 1705 1706 KASSERT(sc->sc_intrxfer == xfer); 1707 sc->sc_intrxfer = NULL; 1708 } 1709 1710 void 1711 ohci_poll(struct usbd_bus *bus) 1712 { 1713 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1714 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1715 1716 #ifdef OHCI_DEBUG 1717 static int last; 1718 int new; 1719 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1720 if (new != last) { 1721 DPRINTFN(10, "intrs=0x%04x", new, 0, 0, 0); 1722 last = new; 1723 } 1724 #endif 1725 sc->sc_eintrs |= OHCI_WDH; 1726 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) { 1727 mutex_spin_enter(&sc->sc_intr_lock); 1728 ohci_intr1(sc); 1729 mutex_spin_exit(&sc->sc_intr_lock); 1730 } 1731 } 1732 1733 /* 1734 * Add an ED to the schedule. Called with USB lock held. 1735 */ 1736 Static void 1737 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1738 { 1739 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1740 DPRINTFN(8, "sed=%p head=%p", sed, head, 0, 0); 1741 1742 KASSERT(mutex_owned(&sc->sc_lock)); 1743 1744 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1745 sizeof(head->ed.ed_nexted), 1746 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1747 sed->next = head->next; 1748 sed->ed.ed_nexted = head->ed.ed_nexted; 1749 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1750 sizeof(sed->ed.ed_nexted), 1751 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1752 head->next = sed; 1753 head->ed.ed_nexted = HTOO32(sed->physaddr); 1754 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1755 sizeof(head->ed.ed_nexted), 1756 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1757 } 1758 1759 /* 1760 * Remove an ED from the schedule. Called with USB lock held. 1761 */ 1762 Static void 1763 ohci_rem_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1764 { 1765 ohci_soft_ed_t *p; 1766 1767 KASSERT(mutex_owned(&sc->sc_lock)); 1768 1769 /* XXX */ 1770 for (p = head; p != NULL && p->next != sed; p = p->next) 1771 ; 1772 KASSERT(p != NULL); 1773 1774 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1775 sizeof(sed->ed.ed_nexted), 1776 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1777 p->next = sed->next; 1778 p->ed.ed_nexted = sed->ed.ed_nexted; 1779 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 1780 sizeof(p->ed.ed_nexted), 1781 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1782 } 1783 1784 /* 1785 * When a transfer is completed the TD is added to the done queue by 1786 * the host controller. This queue is the processed by software. 1787 * Unfortunately the queue contains the physical address of the TD 1788 * and we have no simple way to translate this back to a kernel address. 1789 * To make the translation possible (and fast) we use a hash table of 1790 * TDs currently in the schedule. The physical address is used as the 1791 * hash value. 1792 */ 1793 1794 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1795 /* Called with USB lock held. */ 1796 void 1797 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1798 { 1799 int h = HASH(std->physaddr); 1800 1801 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1802 1803 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1804 } 1805 1806 /* Called with USB lock held. */ 1807 void 1808 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1809 { 1810 1811 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1812 1813 LIST_REMOVE(std, hnext); 1814 } 1815 1816 ohci_soft_td_t * 1817 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1818 { 1819 int h = HASH(a); 1820 ohci_soft_td_t *std; 1821 1822 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1823 std != NULL; 1824 std = LIST_NEXT(std, hnext)) 1825 if (std->physaddr == a) 1826 return std; 1827 return NULL; 1828 } 1829 1830 /* Called with USB lock held. */ 1831 void 1832 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1833 { 1834 int h = HASH(sitd->physaddr); 1835 1836 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1837 1838 KASSERT(mutex_owned(&sc->sc_lock)); 1839 1840 DPRINTFN(10, "sitd=%p physaddr=0x%08lx", sitd, (u_long)sitd->physaddr, 1841 0, 0); 1842 1843 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1844 } 1845 1846 /* Called with USB lock held. */ 1847 void 1848 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1849 { 1850 1851 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1852 1853 KASSERT(mutex_owned(&sc->sc_lock)); 1854 1855 DPRINTFN(10, "sitd=%p physaddr=0x%08lx", sitd, (u_long)sitd->physaddr, 1856 0, 0); 1857 1858 LIST_REMOVE(sitd, hnext); 1859 } 1860 1861 ohci_soft_itd_t * 1862 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1863 { 1864 int h = HASH(a); 1865 ohci_soft_itd_t *sitd; 1866 1867 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1868 sitd != NULL; 1869 sitd = LIST_NEXT(sitd, hnext)) 1870 if (sitd->physaddr == a) 1871 return sitd; 1872 return NULL; 1873 } 1874 1875 void 1876 ohci_timeout(void *addr) 1877 { 1878 struct usbd_xfer *xfer = addr; 1879 struct ohci_xfer *oxfer = OHCI_XFER2OXFER(xfer); 1880 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1881 1882 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1883 DPRINTF("oxfer=%p", oxfer, 0, 0, 0); 1884 1885 if (sc->sc_dying) { 1886 mutex_enter(&sc->sc_lock); 1887 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1888 mutex_exit(&sc->sc_lock); 1889 return; 1890 } 1891 1892 /* Execute the abort in a process context. */ 1893 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr, 1894 USB_TASKQ_MPSAFE); 1895 usb_add_task(xfer->ux_pipe->up_dev, &oxfer->abort_task, 1896 USB_TASKQ_HC); 1897 } 1898 1899 void 1900 ohci_timeout_task(void *addr) 1901 { 1902 struct usbd_xfer *xfer = addr; 1903 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1904 1905 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1906 1907 DPRINTF("xfer=%p", xfer, 0, 0, 0); 1908 1909 mutex_enter(&sc->sc_lock); 1910 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1911 mutex_exit(&sc->sc_lock); 1912 } 1913 1914 #ifdef OHCI_DEBUG 1915 void 1916 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 1917 { 1918 for (; std; std = std->nexttd) { 1919 ohci_dump_td(sc, std); 1920 KASSERTMSG(std->nexttd == NULL || std != std->nexttd, 1921 "std %p next %p", std, std->nexttd); 1922 } 1923 } 1924 1925 void 1926 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1927 { 1928 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1929 1930 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1931 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1932 1933 uint32_t flags = O32TOH(std->td.td_flags); 1934 DPRINTF("TD(%p) at 0x%08lx:", std, (u_long)std->physaddr, 0, 0); 1935 DPRINTF(" round=%d DP=%x DI=%x T=%x", 1936 !!(flags & OHCI_TD_R), 1937 __SHIFTOUT(flags, OHCI_TD_DP_MASK), 1938 OHCI_TD_GET_DI(flags), 1939 __SHIFTOUT(flags, OHCI_TD_TOGGLE_MASK)); 1940 DPRINTF(" EC=%d CC=%d", OHCI_TD_GET_EC(flags), OHCI_TD_GET_CC(flags), 1941 0, 0); 1942 DPRINTF(" td_cbp=0x%08lx td_nexttd=0x%08lx td_be=0x%08lx", 1943 (u_long)O32TOH(std->td.td_cbp), 1944 (u_long)O32TOH(std->td.td_nexttd), 1945 (u_long)O32TOH(std->td.td_be), 0); 1946 } 1947 1948 void 1949 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1950 { 1951 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1952 1953 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1954 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1955 1956 uint32_t flags = O32TOH(sitd->itd.itd_flags); 1957 DPRINTF("ITD(%p) at 0x%08lx", sitd, (u_long)sitd->physaddr, 0, 0); 1958 DPRINTF(" sf=%d di=%d fc=%d cc=%d", 1959 OHCI_ITD_GET_SF(flags), OHCI_ITD_GET_DI(flags), 1960 OHCI_ITD_GET_FC(flags), OHCI_ITD_GET_CC(flags)); 1961 DPRINTF(" bp0=0x%08x next=0x%08x be=0x%08x", 1962 O32TOH(sitd->itd.itd_bp0), 1963 O32TOH(sitd->itd.itd_nextitd), 1964 O32TOH(sitd->itd.itd_be), 0); 1965 CTASSERT(OHCI_ITD_NOFFSET == 8); 1966 DPRINTF(" offs[0] = 0x%04x offs[1] = 0x%04x " 1967 "offs[2] = 0x%04x offs[3] = 0x%04x", 1968 O16TOH(sitd->itd.itd_offset[0]), 1969 O16TOH(sitd->itd.itd_offset[1]), 1970 O16TOH(sitd->itd.itd_offset[2]), 1971 O16TOH(sitd->itd.itd_offset[3])); 1972 DPRINTF(" offs[4] = 0x%04x offs[5] = 0x%04x " 1973 "offs[6] = 0x%04x offs[7] = 0x%04x", 1974 O16TOH(sitd->itd.itd_offset[4]), 1975 O16TOH(sitd->itd.itd_offset[5]), 1976 O16TOH(sitd->itd.itd_offset[6]), 1977 O16TOH(sitd->itd.itd_offset[7])); 1978 } 1979 1980 void 1981 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1982 { 1983 for (; sitd; sitd = sitd->nextitd) 1984 ohci_dump_itd(sc, sitd); 1985 } 1986 1987 void 1988 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 1989 { 1990 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1991 1992 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 1993 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1994 1995 uint32_t flags = O32TOH(sed->ed.ed_flags); 1996 DPRINTF("ED(%p) at 0x%08lx:", sed, sed->physaddr, 0, 0); 1997 DPRINTF(" addr=%d endpt=%d maxp=%d", 1998 OHCI_ED_GET_FA(flags), 1999 OHCI_ED_GET_EN(flags), 2000 OHCI_ED_GET_MAXP(flags), 2001 0); 2002 DPRINTF(" dir=%d speed=%d skip=%d iso=%d", 2003 __SHIFTOUT(flags, OHCI_ED_DIR_MASK), 2004 !!(flags & OHCI_ED_SPEED), 2005 !!(flags & OHCI_ED_SKIP), 2006 !!(flags & OHCI_ED_FORMAT_ISO)); 2007 DPRINTF(" tailp=0x%08lx", (u_long)O32TOH(sed->ed.ed_tailp), 2008 0, 0, 0); 2009 DPRINTF(" headp=0x%08lx nexted=0x%08lx halted=%d carry=%d", 2010 O32TOH(sed->ed.ed_headp), O32TOH(sed->ed.ed_nexted), 2011 !!(O32TOH(sed->ed.ed_headp) & OHCI_HALTED), 2012 !!(O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY)); 2013 } 2014 #endif 2015 2016 usbd_status 2017 ohci_open(struct usbd_pipe *pipe) 2018 { 2019 struct usbd_device *dev = pipe->up_dev; 2020 struct usbd_bus *bus = dev->ud_bus; 2021 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2022 usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc; 2023 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2024 uint8_t addr = dev->ud_addr; 2025 uint8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2026 ohci_soft_ed_t *sed; 2027 ohci_soft_td_t *std; 2028 ohci_soft_itd_t *sitd; 2029 ohci_physaddr_t tdphys; 2030 uint32_t fmt; 2031 usbd_status err = USBD_NOMEM; 2032 int ival; 2033 2034 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2035 DPRINTFN(1, "pipe=%p, addr=%d, endpt=%d (%d)", pipe, addr, 2036 ed->bEndpointAddress, bus->ub_rhaddr); 2037 2038 if (sc->sc_dying) { 2039 return USBD_IOERROR; 2040 } 2041 2042 std = NULL; 2043 sed = NULL; 2044 2045 if (addr == bus->ub_rhaddr) { 2046 switch (ed->bEndpointAddress) { 2047 case USB_CONTROL_ENDPOINT: 2048 pipe->up_methods = &roothub_ctrl_methods; 2049 break; 2050 case UE_DIR_IN | USBROOTHUB_INTR_ENDPT: 2051 pipe->up_methods = &ohci_root_intr_methods; 2052 break; 2053 default: 2054 err = USBD_INVAL; 2055 goto bad; 2056 } 2057 } else { 2058 sed = ohci_alloc_sed(sc); 2059 if (sed == NULL) 2060 goto bad; 2061 opipe->sed = sed; 2062 if (xfertype == UE_ISOCHRONOUS) { 2063 sitd = ohci_alloc_sitd(sc); 2064 if (sitd == NULL) 2065 goto bad; 2066 2067 opipe->tail.itd = sitd; 2068 tdphys = sitd->physaddr; 2069 fmt = OHCI_ED_FORMAT_ISO; 2070 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2071 fmt |= OHCI_ED_DIR_IN; 2072 else 2073 fmt |= OHCI_ED_DIR_OUT; 2074 } else { 2075 std = ohci_alloc_std(sc); 2076 if (std == NULL) 2077 goto bad; 2078 2079 opipe->tail.td = std; 2080 tdphys = std->physaddr; 2081 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2082 } 2083 sed->ed.ed_flags = HTOO32( 2084 OHCI_ED_SET_FA(addr) | 2085 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2086 (dev->ud_speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2087 fmt | 2088 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2089 sed->ed.ed_headp = HTOO32(tdphys | 2090 (pipe->up_endpoint->ue_toggle ? OHCI_TOGGLECARRY : 0)); 2091 sed->ed.ed_tailp = HTOO32(tdphys); 2092 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2093 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2094 2095 switch (xfertype) { 2096 case UE_CONTROL: 2097 pipe->up_methods = &ohci_device_ctrl_methods; 2098 err = usb_allocmem(&sc->sc_bus, 2099 sizeof(usb_device_request_t), 2100 0, &opipe->ctrl.reqdma); 2101 if (err) 2102 goto bad; 2103 mutex_enter(&sc->sc_lock); 2104 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2105 mutex_exit(&sc->sc_lock); 2106 break; 2107 case UE_INTERRUPT: 2108 pipe->up_methods = &ohci_device_intr_methods; 2109 ival = pipe->up_interval; 2110 if (ival == USBD_DEFAULT_INTERVAL) 2111 ival = ed->bInterval; 2112 err = ohci_device_setintr(sc, opipe, ival); 2113 if (err) 2114 goto bad; 2115 break; 2116 case UE_ISOCHRONOUS: 2117 pipe->up_serialise = false; 2118 pipe->up_methods = &ohci_device_isoc_methods; 2119 return ohci_setup_isoc(pipe); 2120 case UE_BULK: 2121 pipe->up_methods = &ohci_device_bulk_methods; 2122 mutex_enter(&sc->sc_lock); 2123 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2124 mutex_exit(&sc->sc_lock); 2125 break; 2126 } 2127 } 2128 2129 return USBD_NORMAL_COMPLETION; 2130 2131 bad: 2132 if (std != NULL) { 2133 ohci_free_std(sc, std); 2134 } 2135 if (sed != NULL) 2136 ohci_free_sed(sc, sed); 2137 return err; 2138 2139 } 2140 2141 /* 2142 * Close a reqular pipe. 2143 * Assumes that there are no pending transactions. 2144 */ 2145 void 2146 ohci_close_pipe(struct usbd_pipe *pipe, ohci_soft_ed_t *head) 2147 { 2148 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2149 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2150 ohci_soft_ed_t *sed = opipe->sed; 2151 2152 KASSERT(mutex_owned(&sc->sc_lock)); 2153 2154 #ifdef DIAGNOSTIC 2155 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2156 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2157 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2158 ohci_soft_td_t *std; 2159 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2160 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2161 "tl=0x%x pipe=%p, std=%p\n", sed, 2162 (int)O32TOH(sed->ed.ed_headp), 2163 (int)O32TOH(sed->ed.ed_tailp), 2164 pipe, std); 2165 #ifdef OHCI_DEBUG 2166 usbd_dump_pipe(&opipe->pipe); 2167 ohci_dump_ed(sc, sed); 2168 if (std) 2169 ohci_dump_td(sc, std); 2170 #endif 2171 usb_delay_ms(&sc->sc_bus, 2); 2172 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2173 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2174 printf("ohci_close_pipe: pipe still not empty\n"); 2175 } 2176 #endif 2177 ohci_rem_ed(sc, sed, head); 2178 /* Make sure the host controller is not touching this ED */ 2179 usb_delay_ms(&sc->sc_bus, 1); 2180 pipe->up_endpoint->ue_toggle = 2181 (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0; 2182 ohci_free_sed_locked(sc, opipe->sed); 2183 } 2184 2185 /* 2186 * Abort a device request. 2187 * If this routine is called at splusb() it guarantees that the request 2188 * will be removed from the hardware scheduling and that the callback 2189 * for it will be called with USBD_CANCELLED status. 2190 * It's impossible to guarantee that the requested transfer will not 2191 * have happened since the hardware runs concurrently. 2192 * If the transaction has already happened we rely on the ordinary 2193 * interrupt processing to process it. 2194 * XXX This is most probably wrong. 2195 * XXXMRG this doesn't make sense anymore. 2196 */ 2197 void 2198 ohci_abort_xfer(struct usbd_xfer *xfer, usbd_status status) 2199 { 2200 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2201 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2202 ohci_soft_ed_t *sed = opipe->sed; 2203 ohci_soft_td_t *p, *n; 2204 ohci_physaddr_t headp; 2205 int hit; 2206 int wake; 2207 2208 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2209 DPRINTF("xfer=%p pipe=%p sed=%p", xfer, opipe,sed, 0); 2210 2211 KASSERT(mutex_owned(&sc->sc_lock)); 2212 ASSERT_SLEEPABLE(); 2213 2214 if (sc->sc_dying) { 2215 /* If we're dying, just do the software part. */ 2216 xfer->ux_status = status; /* make software ignore it */ 2217 callout_halt(&xfer->ux_callout, &sc->sc_lock); 2218 usb_transfer_complete(xfer); 2219 return; 2220 } 2221 2222 /* 2223 * If an abort is already in progress then just wait for it to 2224 * complete and return. 2225 */ 2226 if (xfer->ux_hcflags & UXFER_ABORTING) { 2227 DPRINTFN(2, "already aborting", 0, 0, 0, 0); 2228 #ifdef DIAGNOSTIC 2229 if (status == USBD_TIMEOUT) 2230 printf("%s: TIMEOUT while aborting\n", __func__); 2231 #endif 2232 /* Override the status which might be USBD_TIMEOUT. */ 2233 xfer->ux_status = status; 2234 DPRINTFN(2, "waiting for abort to finish", 0, 0, 0, 0); 2235 xfer->ux_hcflags |= UXFER_ABORTWAIT; 2236 while (xfer->ux_hcflags & UXFER_ABORTING) 2237 cv_wait(&xfer->ux_hccv, &sc->sc_lock); 2238 goto done; 2239 } 2240 xfer->ux_hcflags |= UXFER_ABORTING; 2241 2242 /* 2243 * Step 1: Make interrupt routine and hardware ignore xfer. 2244 */ 2245 xfer->ux_status = status; /* make software ignore it */ 2246 callout_stop(&xfer->ux_callout); 2247 DPRINTFN(1, "stop ed=%p", sed, 0, 0, 0); 2248 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2249 sizeof(sed->ed.ed_flags), 2250 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2251 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2252 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2253 sizeof(sed->ed.ed_flags), 2254 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2255 2256 /* 2257 * Step 2: Wait until we know hardware has finished any possible 2258 * use of the xfer. Also make sure the soft interrupt routine 2259 * has run. 2260 */ 2261 /* Hardware finishes in 1ms */ 2262 usb_delay_ms_locked(opipe->pipe.up_dev->ud_bus, 20, &sc->sc_lock); 2263 sc->sc_softwake = 1; 2264 usb_schedsoftintr(&sc->sc_bus); 2265 cv_wait(&sc->sc_softwake_cv, &sc->sc_lock); 2266 2267 /* 2268 * Step 3: Remove any vestiges of the xfer from the hardware. 2269 * The complication here is that the hardware may have executed 2270 * beyond the xfer we're trying to abort. So as we're scanning 2271 * the TDs of this xfer we check if the hardware points to 2272 * any of them. 2273 */ 2274 p = xfer->ux_hcpriv; 2275 KASSERT(p); 2276 2277 #ifdef OHCI_DEBUG 2278 DPRINTF("--- dump start ---", 0, 0, 0, 0); 2279 2280 if (ohcidebug >= 2) { 2281 DPRINTF("sed:", 0, 0, 0, 0); 2282 ohci_dump_ed(sc, sed); 2283 ohci_dump_tds(sc, p); 2284 } 2285 DPRINTF("--- dump end ---", 0, 0, 0, 0); 2286 #endif 2287 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2288 hit = 0; 2289 for (; p->xfer == xfer; p = n) { 2290 hit |= headp == p->physaddr; 2291 n = p->nexttd; 2292 ohci_hash_rem_td(sc, p); 2293 } 2294 /* Zap headp register if hardware pointed inside the xfer. */ 2295 if (hit) { 2296 DPRINTFN(1, "set hd=0x%08x, tl=0x%08x", (int)p->physaddr, 2297 (int)O32TOH(sed->ed.ed_tailp), 0, 0); 2298 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2299 usb_syncmem(&sed->dma, 2300 sed->offs + offsetof(ohci_ed_t, ed_headp), 2301 sizeof(sed->ed.ed_headp), 2302 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2303 } else { 2304 DPRINTFN(1, "no hit", 0, 0, 0, 0); 2305 } 2306 2307 /* 2308 * Step 4: Turn on hardware again. 2309 */ 2310 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2311 sizeof(sed->ed.ed_flags), 2312 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2313 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2314 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2315 sizeof(sed->ed.ed_flags), 2316 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2317 2318 /* 2319 * Step 5: Execute callback. 2320 */ 2321 wake = xfer->ux_hcflags & UXFER_ABORTWAIT; 2322 xfer->ux_hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2323 usb_transfer_complete(xfer); 2324 if (wake) 2325 cv_broadcast(&xfer->ux_hccv); 2326 2327 done: 2328 KASSERT(mutex_owned(&sc->sc_lock)); 2329 } 2330 2331 /* 2332 * Data structures and routines to emulate the root hub. 2333 */ 2334 Static int 2335 ohci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req, 2336 void *buf, int buflen) 2337 { 2338 ohci_softc_t *sc = OHCI_BUS2SC(bus); 2339 usb_port_status_t ps; 2340 uint16_t len, value, index; 2341 int l, totlen = 0; 2342 int port, i; 2343 uint32_t v; 2344 2345 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2346 2347 if (sc->sc_dying) 2348 return -1; 2349 2350 DPRINTFN(4, "type=0x%02x request=%02x", req->bmRequestType, 2351 req->bRequest, 0, 0); 2352 2353 len = UGETW(req->wLength); 2354 value = UGETW(req->wValue); 2355 index = UGETW(req->wIndex); 2356 2357 #define C(x,y) ((x) | ((y) << 8)) 2358 switch (C(req->bRequest, req->bmRequestType)) { 2359 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2360 DPRINTFN(8, "wValue=0x%04x", value, 0, 0, 0); 2361 if (len == 0) 2362 break; 2363 switch (value) { 2364 case C(0, UDESC_DEVICE): { 2365 usb_device_descriptor_t devd; 2366 2367 totlen = min(buflen, sizeof(devd)); 2368 memcpy(&devd, buf, totlen); 2369 USETW(devd.idVendor, sc->sc_id_vendor); 2370 memcpy(buf, &devd, totlen); 2371 break; 2372 } 2373 case C(1, UDESC_STRING): 2374 #define sd ((usb_string_descriptor_t *)buf) 2375 /* Vendor */ 2376 totlen = usb_makestrdesc(sd, len, sc->sc_vendor); 2377 break; 2378 case C(2, UDESC_STRING): 2379 /* Product */ 2380 totlen = usb_makestrdesc(sd, len, "OHCI root hub"); 2381 break; 2382 #undef sd 2383 default: 2384 /* default from usbroothub */ 2385 return buflen; 2386 } 2387 break; 2388 2389 /* Hub requests */ 2390 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2391 break; 2392 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2393 DPRINTFN(8, "UR_CLEAR_PORT_FEATURE port=%d feature=%d", 2394 index, value, 0, 0); 2395 if (index < 1 || index > sc->sc_noport) { 2396 return -1; 2397 } 2398 port = OHCI_RH_PORT_STATUS(index); 2399 switch(value) { 2400 case UHF_PORT_ENABLE: 2401 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2402 break; 2403 case UHF_PORT_SUSPEND: 2404 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2405 break; 2406 case UHF_PORT_POWER: 2407 /* Yes, writing to the LOW_SPEED bit clears power. */ 2408 OWRITE4(sc, port, UPS_LOW_SPEED); 2409 break; 2410 case UHF_C_PORT_CONNECTION: 2411 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2412 break; 2413 case UHF_C_PORT_ENABLE: 2414 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2415 break; 2416 case UHF_C_PORT_SUSPEND: 2417 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2418 break; 2419 case UHF_C_PORT_OVER_CURRENT: 2420 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2421 break; 2422 case UHF_C_PORT_RESET: 2423 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2424 break; 2425 default: 2426 return -1; 2427 } 2428 switch(value) { 2429 case UHF_C_PORT_CONNECTION: 2430 case UHF_C_PORT_ENABLE: 2431 case UHF_C_PORT_SUSPEND: 2432 case UHF_C_PORT_OVER_CURRENT: 2433 case UHF_C_PORT_RESET: 2434 /* Enable RHSC interrupt if condition is cleared. */ 2435 if ((OREAD4(sc, port) >> 16) == 0) 2436 ohci_rhsc_enable(sc); 2437 break; 2438 default: 2439 break; 2440 } 2441 break; 2442 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2443 if (len == 0) 2444 break; 2445 if ((value & 0xff) != 0) { 2446 return -1; 2447 } 2448 usb_hub_descriptor_t hubd; 2449 2450 totlen = min(buflen, sizeof(hubd)); 2451 memcpy(&hubd, buf, totlen); 2452 2453 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2454 hubd.bNbrPorts = sc->sc_noport; 2455 USETW(hubd.wHubCharacteristics, 2456 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2457 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2458 /* XXX overcurrent */ 2459 ); 2460 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2461 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2462 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2463 hubd.DeviceRemovable[i++] = (uint8_t)v; 2464 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2465 totlen = min(totlen, hubd.bDescLength); 2466 memcpy(buf, &hubd, totlen); 2467 break; 2468 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2469 if (len != 4) { 2470 return -1; 2471 } 2472 memset(buf, 0, len); /* ? XXX */ 2473 totlen = len; 2474 break; 2475 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2476 DPRINTFN(8, "get port status i=%d", index, 0, 0, 0); 2477 if (index < 1 || index > sc->sc_noport) { 2478 return -1; 2479 } 2480 if (len != 4) { 2481 return -1; 2482 } 2483 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2484 DPRINTFN(8, "port status=0x%04x", v, 0, 0, 0); 2485 USETW(ps.wPortStatus, v); 2486 USETW(ps.wPortChange, v >> 16); 2487 totlen = min(len, sizeof(ps)); 2488 memcpy(buf, &ps, totlen); 2489 break; 2490 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2491 return -1; 2492 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2493 break; 2494 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2495 if (index < 1 || index > sc->sc_noport) { 2496 return -1; 2497 } 2498 port = OHCI_RH_PORT_STATUS(index); 2499 switch(value) { 2500 case UHF_PORT_ENABLE: 2501 OWRITE4(sc, port, UPS_PORT_ENABLED); 2502 break; 2503 case UHF_PORT_SUSPEND: 2504 OWRITE4(sc, port, UPS_SUSPEND); 2505 break; 2506 case UHF_PORT_RESET: 2507 DPRINTFN(5, "reset port %d", index, 0, 0, 0); 2508 OWRITE4(sc, port, UPS_RESET); 2509 for (i = 0; i < 5; i++) { 2510 usb_delay_ms(&sc->sc_bus, 2511 USB_PORT_ROOT_RESET_DELAY); 2512 if (sc->sc_dying) { 2513 return -1; 2514 } 2515 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2516 break; 2517 } 2518 DPRINTFN(8, "port %d reset, status = 0x%04x", index, 2519 OREAD4(sc, port), 0, 0); 2520 break; 2521 case UHF_PORT_POWER: 2522 DPRINTFN(2, "set port power %d", index, 0, 0, 0); 2523 OWRITE4(sc, port, UPS_PORT_POWER); 2524 break; 2525 default: 2526 return -1; 2527 } 2528 break; 2529 default: 2530 /* default from usbroothub */ 2531 return buflen; 2532 } 2533 2534 return totlen; 2535 } 2536 2537 Static usbd_status 2538 ohci_root_intr_transfer(struct usbd_xfer *xfer) 2539 { 2540 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2541 usbd_status err; 2542 2543 /* Insert last in queue. */ 2544 mutex_enter(&sc->sc_lock); 2545 err = usb_insert_transfer(xfer); 2546 mutex_exit(&sc->sc_lock); 2547 if (err) 2548 return err; 2549 2550 /* Pipe isn't running, start first */ 2551 return ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2552 } 2553 2554 Static usbd_status 2555 ohci_root_intr_start(struct usbd_xfer *xfer) 2556 { 2557 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2558 2559 if (sc->sc_dying) 2560 return USBD_IOERROR; 2561 2562 mutex_enter(&sc->sc_lock); 2563 KASSERT(sc->sc_intrxfer == NULL); 2564 sc->sc_intrxfer = xfer; 2565 mutex_exit(&sc->sc_lock); 2566 2567 return USBD_IN_PROGRESS; 2568 } 2569 2570 /* Abort a root interrupt request. */ 2571 Static void 2572 ohci_root_intr_abort(struct usbd_xfer *xfer) 2573 { 2574 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2575 2576 KASSERT(mutex_owned(&sc->sc_lock)); 2577 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 2578 2579 sc->sc_intrxfer = NULL; 2580 2581 xfer->ux_status = USBD_CANCELLED; 2582 usb_transfer_complete(xfer); 2583 } 2584 2585 /* Close the root pipe. */ 2586 Static void 2587 ohci_root_intr_close(struct usbd_pipe *pipe) 2588 { 2589 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2590 2591 KASSERT(mutex_owned(&sc->sc_lock)); 2592 2593 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2594 2595 sc->sc_intrxfer = NULL; 2596 } 2597 2598 /************************/ 2599 2600 int 2601 ohci_device_ctrl_init(struct usbd_xfer *xfer) 2602 { 2603 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2604 usb_device_request_t *req = &xfer->ux_request; 2605 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2606 ohci_soft_td_t *stat, *setup; 2607 int isread = req->bmRequestType & UT_READ; 2608 int len = xfer->ux_bufsize; 2609 int err = ENOMEM; 2610 2611 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2612 2613 setup = ohci_alloc_std(sc); 2614 if (setup == NULL) { 2615 goto bad1; 2616 } 2617 stat = ohci_alloc_std(sc); 2618 if (stat == NULL) { 2619 goto bad2; 2620 } 2621 2622 ox->ox_setup = setup; 2623 ox->ox_stat = stat; 2624 ox->ox_nstd = 0; 2625 2626 /* Set up data transaction */ 2627 if (len != 0) { 2628 err = ohci_alloc_std_chain(sc, xfer, len, isread); 2629 if (err) { 2630 goto bad3; 2631 } 2632 } 2633 return 0; 2634 2635 bad3: 2636 ohci_free_std(sc, stat); 2637 bad2: 2638 ohci_free_std(sc, setup); 2639 bad1: 2640 return err; 2641 } 2642 2643 void 2644 ohci_device_ctrl_fini(struct usbd_xfer *xfer) 2645 { 2646 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2647 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2648 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2649 2650 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2651 DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0); 2652 2653 mutex_enter(&sc->sc_lock); 2654 if (ox->ox_setup != opipe->tail.td) { 2655 ohci_free_std_locked(sc, ox->ox_setup); 2656 } 2657 for (size_t i = 0; i < ox->ox_nstd; i++) { 2658 ohci_soft_td_t *std = ox->ox_stds[i]; 2659 if (std == NULL) 2660 break; 2661 ohci_free_std_locked(sc, std); 2662 } 2663 ohci_free_std_locked(sc, ox->ox_stat); 2664 mutex_exit(&sc->sc_lock); 2665 2666 if (ox->ox_nstd) { 2667 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 2668 kmem_free(ox->ox_stds, sz); 2669 } 2670 } 2671 2672 Static usbd_status 2673 ohci_device_ctrl_transfer(struct usbd_xfer *xfer) 2674 { 2675 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2676 usbd_status err; 2677 2678 /* Insert last in queue. */ 2679 mutex_enter(&sc->sc_lock); 2680 err = usb_insert_transfer(xfer); 2681 mutex_exit(&sc->sc_lock); 2682 if (err) 2683 return err; 2684 2685 /* Pipe isn't running, start first */ 2686 return ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2687 } 2688 2689 Static usbd_status 2690 ohci_device_ctrl_start(struct usbd_xfer *xfer) 2691 { 2692 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2693 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2694 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2695 usb_device_request_t *req = &xfer->ux_request; 2696 struct usbd_device *dev __diagused = opipe->pipe.up_dev; 2697 ohci_soft_td_t *setup, *stat, *next, *tail; 2698 ohci_soft_ed_t *sed; 2699 int isread; 2700 int len; 2701 2702 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2703 2704 if (sc->sc_dying) 2705 return USBD_IOERROR; 2706 2707 KASSERT(xfer->ux_rqflags & URQ_REQUEST); 2708 2709 isread = req->bmRequestType & UT_READ; 2710 len = UGETW(req->wLength); 2711 2712 DPRINTF("xfer=%p len=%d, addr=%d, endpt=%d", xfer, len, dev->ud_addr, 2713 opipe->pipe.up_endpoint->ue_edesc->bEndpointAddress); 2714 DPRINTF("type=0x%02x, request=0x%02x, wValue=0x%04x, wIndex=0x%04x", 2715 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2716 UGETW(req->wIndex)); 2717 2718 /* Need to take lock here for pipe->tail.td */ 2719 mutex_enter(&sc->sc_lock); 2720 2721 /* 2722 * Use the pipe "tail" TD as our first and loan our first TD to the 2723 * next transfer 2724 */ 2725 setup = opipe->tail.td; 2726 opipe->tail.td = ox->ox_setup; 2727 ox->ox_setup = setup; 2728 2729 stat = ox->ox_stat; 2730 2731 /* point at sentinel */ 2732 tail = opipe->tail.td; 2733 sed = opipe->sed; 2734 2735 KASSERTMSG(OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)) == dev->ud_addr, 2736 "address ED %d pipe %d\n", 2737 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), dev->ud_addr); 2738 KASSERTMSG(OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)) == 2739 UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize), 2740 "MPL ED %d pipe %d\n", 2741 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), 2742 UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize)); 2743 2744 /* next will point to data if len != 0 */ 2745 next = stat; 2746 2747 /* Set up data transaction */ 2748 if (len != 0) { 2749 ohci_soft_td_t *std; 2750 ohci_soft_td_t *end; 2751 2752 next = ox->ox_stds[0]; 2753 ohci_reset_std_chain(sc, xfer, len, isread, next, &end); 2754 2755 end->td.td_nexttd = HTOO32(stat->physaddr); 2756 end->nexttd = stat; 2757 2758 usb_syncmem(&end->dma, 2759 end->offs + offsetof(ohci_td_t, td_nexttd), 2760 sizeof(end->td.td_nexttd), 2761 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2762 2763 usb_syncmem(&xfer->ux_dmabuf, 0, len, 2764 isread ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2765 std = ox->ox_stds[0]; 2766 /* Start toggle at 1 and then use the carried toggle. */ 2767 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 2768 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 2769 usb_syncmem(&std->dma, 2770 std->offs + offsetof(ohci_td_t, td_flags), 2771 sizeof(std->td.td_flags), 2772 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2773 } 2774 2775 DPRINTFN(8, "setup %p data %p stat %p tail %p", setup, 2776 (len != 0 ? ox->ox_stds[0] : NULL), stat, tail); 2777 KASSERT(opipe->tail.td == tail); 2778 2779 memcpy(KERNADDR(&opipe->ctrl.reqdma, 0), req, sizeof(*req)); 2780 usb_syncmem(&opipe->ctrl.reqdma, 0, sizeof(*req), BUS_DMASYNC_PREWRITE); 2781 2782 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 2783 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 2784 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->ctrl.reqdma, 0)); 2785 setup->td.td_nexttd = HTOO32(next->physaddr); 2786 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof(*req) - 1); 2787 setup->nexttd = next; 2788 setup->len = 0; 2789 setup->xfer = xfer; 2790 setup->flags = 0; 2791 ohci_hash_add_td(sc, setup); 2792 2793 xfer->ux_hcpriv = setup; 2794 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 2795 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2796 2797 stat->td.td_flags = HTOO32( 2798 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 2799 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 2800 stat->td.td_cbp = 0; 2801 stat->td.td_nexttd = HTOO32(tail->physaddr); 2802 stat->td.td_be = 0; 2803 stat->nexttd = tail; 2804 stat->flags = OHCI_CALL_DONE; 2805 stat->len = 0; 2806 stat->xfer = xfer; 2807 ohci_hash_add_td(sc, stat); 2808 2809 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 2810 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2811 2812 memset(&tail->td, 0, sizeof(tail->td)); 2813 tail->nexttd = NULL; 2814 tail->xfer = NULL; 2815 2816 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 2817 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2818 2819 #ifdef OHCI_DEBUG 2820 USBHIST_LOGN(ohcidebug, 5, "--- dump start ---", 0, 0, 0, 0); 2821 if (ohcidebug >= 5) { 2822 ohci_dump_ed(sc, sed); 2823 ohci_dump_tds(sc, setup); 2824 } 2825 USBHIST_LOGN(ohcidebug, 5, "--- dump end ---", 0, 0, 0, 0); 2826 #endif 2827 2828 /* Insert ED in schedule */ 2829 sed->ed.ed_tailp = HTOO32(tail->physaddr); 2830 usb_syncmem(&sed->dma, 2831 sed->offs + offsetof(ohci_ed_t, ed_tailp), 2832 sizeof(sed->ed.ed_tailp), 2833 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2834 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 2835 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 2836 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 2837 ohci_timeout, xfer); 2838 } 2839 2840 DPRINTF("done", 0, 0, 0, 0); 2841 2842 mutex_exit(&sc->sc_lock); 2843 2844 return USBD_IN_PROGRESS; 2845 } 2846 2847 /* Abort a device control request. */ 2848 Static void 2849 ohci_device_ctrl_abort(struct usbd_xfer *xfer) 2850 { 2851 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 2852 2853 KASSERT(mutex_owned(&sc->sc_lock)); 2854 2855 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2856 DPRINTF("xfer=%p", xfer, 0, 0, 0); 2857 ohci_abort_xfer(xfer, USBD_CANCELLED); 2858 } 2859 2860 /* Close a device control pipe. */ 2861 Static void 2862 ohci_device_ctrl_close(struct usbd_pipe *pipe) 2863 { 2864 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2865 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2866 2867 KASSERT(mutex_owned(&sc->sc_lock)); 2868 2869 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2870 DPRINTF("pipe=%p", pipe, 0, 0, 0); 2871 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2872 ohci_free_std_locked(sc, opipe->tail.td); 2873 } 2874 2875 /************************/ 2876 2877 Static void 2878 ohci_device_clear_toggle(struct usbd_pipe *pipe) 2879 { 2880 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2881 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2882 2883 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2884 } 2885 2886 Static void 2887 ohci_noop(struct usbd_pipe *pipe) 2888 { 2889 } 2890 2891 Static int 2892 ohci_device_bulk_init(struct usbd_xfer *xfer) 2893 { 2894 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2895 int len = xfer->ux_bufsize; 2896 int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;; 2897 int isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2898 int err; 2899 2900 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2901 2902 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 2903 2904 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 2905 xfer->ux_flags); 2906 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 2907 2908 /* Allocate a chain of new TDs (including a new tail). */ 2909 err = ohci_alloc_std_chain(sc, xfer, len, isread); 2910 if (err) 2911 return err; 2912 2913 return 0; 2914 } 2915 2916 Static void 2917 ohci_device_bulk_fini(struct usbd_xfer *xfer) 2918 { 2919 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2920 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2921 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2922 2923 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2924 DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0); 2925 2926 mutex_enter(&sc->sc_lock); 2927 for (size_t i = 0; i < ox->ox_nstd; i++) { 2928 ohci_soft_td_t *std = ox->ox_stds[i]; 2929 if (std == NULL) 2930 break; 2931 if (std != opipe->tail.td) 2932 ohci_free_std_locked(sc, std); 2933 } 2934 mutex_exit(&sc->sc_lock); 2935 2936 if (ox->ox_nstd) { 2937 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 2938 kmem_free(ox->ox_stds, sz); 2939 } 2940 } 2941 2942 Static usbd_status 2943 ohci_device_bulk_transfer(struct usbd_xfer *xfer) 2944 { 2945 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2946 usbd_status err; 2947 2948 /* Insert last in queue. */ 2949 mutex_enter(&sc->sc_lock); 2950 err = usb_insert_transfer(xfer); 2951 mutex_exit(&sc->sc_lock); 2952 if (err) 2953 return err; 2954 2955 /* Pipe isn't running, start first */ 2956 return ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2957 } 2958 2959 Static usbd_status 2960 ohci_device_bulk_start(struct usbd_xfer *xfer) 2961 { 2962 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2963 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2964 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2965 ohci_soft_td_t *last; 2966 ohci_soft_td_t *data, *tail, *tdp; 2967 ohci_soft_ed_t *sed; 2968 int len, isread, endpt; 2969 2970 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2971 2972 if (sc->sc_dying) 2973 return USBD_IOERROR; 2974 2975 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 2976 2977 len = xfer->ux_length; 2978 endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 2979 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2980 sed = opipe->sed; 2981 2982 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 2983 xfer->ux_flags); 2984 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 2985 2986 mutex_enter(&sc->sc_lock); 2987 2988 /* 2989 * Use the pipe "tail" TD as our first and loan our first TD to the 2990 * next transfer 2991 */ 2992 data = opipe->tail.td; 2993 opipe->tail.td = ox->ox_stds[0]; 2994 ox->ox_stds[0] = data; 2995 ohci_reset_std_chain(sc, xfer, len, isread, data, &last); 2996 2997 /* point at sentinel */ 2998 tail = opipe->tail.td; 2999 memset(&tail->td, 0, sizeof(tail->td)); 3000 tail->nexttd = NULL; 3001 tail->xfer = NULL; 3002 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 3003 BUS_DMASYNC_PREWRITE); 3004 xfer->ux_hcpriv = data; 3005 3006 DPRINTFN(8, "xfer %p data %p tail %p", xfer, ox->ox_stds[0], tail, 0); 3007 KASSERT(opipe->tail.td == tail); 3008 3009 /* We want interrupt at the end of the transfer. */ 3010 last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3011 last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3012 last->td.td_nexttd = HTOO32(tail->physaddr); 3013 last->nexttd = tail; 3014 last->flags |= OHCI_CALL_DONE; 3015 usb_syncmem(&last->dma, last->offs, sizeof(last->td), 3016 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3017 3018 DPRINTFN(4, "ed_flags=0x%08x td_flags=0x%08x " 3019 "td_cbp=0x%08x td_be=0x%08x", 3020 (int)O32TOH(sed->ed.ed_flags), 3021 (int)O32TOH(data->td.td_flags), 3022 (int)O32TOH(data->td.td_cbp), 3023 (int)O32TOH(data->td.td_be)); 3024 3025 #ifdef OHCI_DEBUG 3026 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 3027 if (ohcidebug >= 5) { 3028 ohci_dump_ed(sc, sed); 3029 ohci_dump_tds(sc, data); 3030 } 3031 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 3032 #endif 3033 3034 /* Insert ED in schedule */ 3035 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 3036 KASSERT(tdp->xfer == xfer); 3037 } 3038 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3039 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3040 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3041 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3042 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3043 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3044 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 3045 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 3046 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 3047 ohci_timeout, xfer); 3048 } 3049 mutex_exit(&sc->sc_lock); 3050 3051 return USBD_IN_PROGRESS; 3052 } 3053 3054 Static void 3055 ohci_device_bulk_abort(struct usbd_xfer *xfer) 3056 { 3057 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 3058 3059 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3060 3061 KASSERT(mutex_owned(&sc->sc_lock)); 3062 3063 DPRINTF("xfer=%p", xfer, 0, 0, 0); 3064 ohci_abort_xfer(xfer, USBD_CANCELLED); 3065 } 3066 3067 /* 3068 * Close a device bulk pipe. 3069 */ 3070 Static void 3071 ohci_device_bulk_close(struct usbd_pipe *pipe) 3072 { 3073 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3074 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3075 3076 KASSERT(mutex_owned(&sc->sc_lock)); 3077 3078 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3079 3080 DPRINTF("pipe=%p", pipe, 0, 0, 0); 3081 ohci_close_pipe(pipe, sc->sc_bulk_head); 3082 ohci_free_std_locked(sc, opipe->tail.td); 3083 } 3084 3085 /************************/ 3086 3087 Static int 3088 ohci_device_intr_init(struct usbd_xfer *xfer) 3089 { 3090 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3091 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3092 int len = xfer->ux_bufsize; 3093 int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;; 3094 int isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3095 int err; 3096 3097 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3098 3099 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3100 KASSERT(len != 0); 3101 3102 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 3103 xfer->ux_flags); 3104 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 3105 3106 ox->ox_nstd = 0; 3107 3108 err = ohci_alloc_std_chain(sc, xfer, len, isread); 3109 if (err) { 3110 return err; 3111 } 3112 3113 return 0; 3114 } 3115 3116 Static void 3117 ohci_device_intr_fini(struct usbd_xfer *xfer) 3118 { 3119 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3120 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3121 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3122 3123 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3124 DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0); 3125 3126 mutex_enter(&sc->sc_lock); 3127 for (size_t i = 0; i < ox->ox_nstd; i++) { 3128 ohci_soft_td_t *std = ox->ox_stds[i]; 3129 if (std != NULL) 3130 break; 3131 if (std != opipe->tail.td) 3132 ohci_free_std_locked(sc, std); 3133 } 3134 mutex_exit(&sc->sc_lock); 3135 3136 if (ox->ox_nstd) { 3137 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 3138 kmem_free(ox->ox_stds, sz); 3139 } 3140 } 3141 3142 Static usbd_status 3143 ohci_device_intr_transfer(struct usbd_xfer *xfer) 3144 { 3145 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3146 usbd_status err; 3147 3148 /* Insert last in queue. */ 3149 mutex_enter(&sc->sc_lock); 3150 err = usb_insert_transfer(xfer); 3151 mutex_exit(&sc->sc_lock); 3152 if (err) 3153 return err; 3154 3155 /* Pipe isn't running, start first */ 3156 return ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 3157 } 3158 3159 Static usbd_status 3160 ohci_device_intr_start(struct usbd_xfer *xfer) 3161 { 3162 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3163 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3164 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3165 ohci_soft_ed_t *sed = opipe->sed; 3166 ohci_soft_td_t *data, *last, *tail; 3167 int len, isread, endpt; 3168 3169 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3170 3171 if (sc->sc_dying) 3172 return USBD_IOERROR; 3173 3174 DPRINTFN(3, "xfer=%p len=%d flags=%d priv=%p", xfer, xfer->ux_length, 3175 xfer->ux_flags, xfer->ux_priv); 3176 3177 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3178 3179 len = xfer->ux_length; 3180 endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 3181 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3182 3183 mutex_enter(&sc->sc_lock); 3184 3185 /* 3186 * Use the pipe "tail" TD as our first and loan our first TD to the 3187 * next transfer. 3188 */ 3189 data = opipe->tail.td; 3190 opipe->tail.td = ox->ox_stds[0]; 3191 ox->ox_stds[0] = data; 3192 ohci_reset_std_chain(sc, xfer, len, isread, data, &last); 3193 3194 /* point at sentinel */ 3195 tail = opipe->tail.td; 3196 memset(&tail->td, 0, sizeof(tail->td)); 3197 tail->nexttd = NULL; 3198 tail->xfer = NULL; 3199 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 3200 BUS_DMASYNC_PREWRITE); 3201 xfer->ux_hcpriv = data; 3202 3203 DPRINTFN(8, "data %p tail %p", ox->ox_stds[0], tail, 0, 0); 3204 KASSERT(opipe->tail.td == tail); 3205 3206 /* We want interrupt at the end of the transfer. */ 3207 last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3208 last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3209 3210 last->td.td_nexttd = HTOO32(tail->physaddr); 3211 last->nexttd = tail; 3212 last->flags |= OHCI_CALL_DONE; 3213 usb_syncmem(&last->dma, last->offs, sizeof(last->td), 3214 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3215 3216 #ifdef OHCI_DEBUG 3217 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 3218 if (ohcidebug >= 5) { 3219 ohci_dump_ed(sc, sed); 3220 ohci_dump_tds(sc, data); 3221 } 3222 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 3223 #endif 3224 3225 /* Insert ED in schedule */ 3226 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3227 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3228 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3229 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3230 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3231 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3232 3233 mutex_exit(&sc->sc_lock); 3234 3235 return USBD_IN_PROGRESS; 3236 } 3237 3238 /* Abort a device interrupt request. */ 3239 Static void 3240 ohci_device_intr_abort(struct usbd_xfer *xfer) 3241 { 3242 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 3243 3244 KASSERT(mutex_owned(&sc->sc_lock)); 3245 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 3246 3247 ohci_abort_xfer(xfer, USBD_CANCELLED); 3248 } 3249 3250 /* Close a device interrupt pipe. */ 3251 Static void 3252 ohci_device_intr_close(struct usbd_pipe *pipe) 3253 { 3254 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3255 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3256 int nslots = opipe->intr.nslots; 3257 int pos = opipe->intr.pos; 3258 int j; 3259 ohci_soft_ed_t *p, *sed = opipe->sed; 3260 3261 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3262 3263 KASSERT(mutex_owned(&sc->sc_lock)); 3264 3265 DPRINTFN(1, "pipe=%p nslots=%d pos=%d", pipe, nslots, pos, 0); 3266 usb_syncmem(&sed->dma, sed->offs, 3267 sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3268 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3269 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3270 sizeof(sed->ed.ed_flags), 3271 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3272 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3273 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3274 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); 3275 3276 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3277 continue; 3278 KASSERT(p); 3279 p->next = sed->next; 3280 p->ed.ed_nexted = sed->ed.ed_nexted; 3281 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 3282 sizeof(p->ed.ed_nexted), 3283 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3284 3285 for (j = 0; j < nslots; j++) 3286 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3287 3288 ohci_free_std_locked(sc, opipe->tail.td); 3289 ohci_free_sed_locked(sc, opipe->sed); 3290 } 3291 3292 Static usbd_status 3293 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3294 { 3295 int i, j, best; 3296 u_int npoll, slow, shigh, nslots; 3297 u_int bestbw, bw; 3298 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3299 3300 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3301 3302 DPRINTFN(2, "pipe=%p", opipe, 0, 0, 0); 3303 if (ival == 0) { 3304 printf("ohci_setintr: 0 interval\n"); 3305 return USBD_INVAL; 3306 } 3307 3308 npoll = OHCI_NO_INTRS; 3309 while (npoll > ival) 3310 npoll /= 2; 3311 DPRINTFN(2, "ival=%d npoll=%d", ival, npoll, 0, 0); 3312 3313 /* 3314 * We now know which level in the tree the ED must go into. 3315 * Figure out which slot has most bandwidth left over. 3316 * Slots to examine: 3317 * npoll 3318 * 1 0 3319 * 2 1 2 3320 * 4 3 4 5 6 3321 * 8 7 8 9 10 11 12 13 14 3322 * N (N-1) .. (N-1+N-1) 3323 */ 3324 slow = npoll-1; 3325 shigh = slow + npoll; 3326 nslots = OHCI_NO_INTRS / npoll; 3327 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3328 bw = 0; 3329 for (j = 0; j < nslots; j++) 3330 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3331 if (bw < bestbw) { 3332 best = i; 3333 bestbw = bw; 3334 } 3335 } 3336 DPRINTFN(2, "best=%d(%d..%d) bestbw=%d", best, slow, shigh, bestbw); 3337 3338 mutex_enter(&sc->sc_lock); 3339 hsed = sc->sc_eds[best]; 3340 sed->next = hsed->next; 3341 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3342 sizeof(hsed->ed.ed_flags), 3343 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3344 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3345 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3346 sizeof(sed->ed.ed_flags), 3347 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3348 hsed->next = sed; 3349 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3350 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3351 sizeof(hsed->ed.ed_flags), 3352 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3353 mutex_exit(&sc->sc_lock); 3354 3355 for (j = 0; j < nslots; j++) 3356 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3357 opipe->intr.nslots = nslots; 3358 opipe->intr.pos = best; 3359 3360 DPRINTFN(5, "returns %p", opipe, 0, 0, 0); 3361 return USBD_NORMAL_COMPLETION; 3362 } 3363 3364 /***********************/ 3365 3366 Static int 3367 ohci_device_isoc_init(struct usbd_xfer *xfer) 3368 { 3369 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3370 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3371 ohci_soft_itd_t *sitd; 3372 size_t i; 3373 int err; 3374 3375 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3376 3377 DPRINTFN(1, "xfer %p len %d flags %d", xfer, xfer->ux_length, 3378 xfer->ux_flags, 0); 3379 3380 const size_t nfsitd = 3381 (xfer->ux_nframes + OHCI_ITD_NOFFSET - 1) / OHCI_ITD_NOFFSET; 3382 const size_t nbsitd = xfer->ux_bufsize / OHCI_PAGE_SIZE; 3383 const size_t nsitd = MAX(nfsitd, nbsitd) + 1; 3384 3385 ox->ox_sitds = kmem_zalloc(sizeof(ohci_soft_itd_t *) * nsitd, 3386 KM_SLEEP); 3387 ox->ox_nsitd = nsitd; 3388 3389 for (i = 0; i < nsitd; i++) { 3390 /* Allocate next ITD */ 3391 sitd = ohci_alloc_sitd(sc); 3392 if (sitd == NULL) { 3393 err = ENOMEM; 3394 goto fail; 3395 } 3396 ox->ox_sitds[i] = sitd; 3397 sitd->xfer = xfer; 3398 sitd->flags = 0; 3399 } 3400 3401 return 0; 3402 fail: 3403 for (; i > 0;) { 3404 ohci_free_sitd(sc, ox->ox_sitds[--i]); 3405 } 3406 return err; 3407 } 3408 3409 Static void 3410 ohci_device_isoc_fini(struct usbd_xfer *xfer) 3411 { 3412 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3413 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3414 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3415 3416 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3417 3418 mutex_enter(&sc->sc_lock); 3419 for (size_t i = 0; i < ox->ox_nsitd; i++) { 3420 if (ox->ox_sitds[i] != opipe->tail.itd) { 3421 ohci_free_sitd_locked(sc, ox->ox_sitds[i]); 3422 } 3423 } 3424 mutex_exit(&sc->sc_lock); 3425 3426 if (ox->ox_nsitd) { 3427 const size_t sz = sizeof(ohci_soft_itd_t *) * ox->ox_nsitd; 3428 kmem_free(ox->ox_sitds, sz); 3429 } 3430 } 3431 3432 3433 usbd_status 3434 ohci_device_isoc_transfer(struct usbd_xfer *xfer) 3435 { 3436 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3437 usbd_status __diagused err; 3438 3439 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3440 3441 DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0); 3442 3443 /* Put it on our queue, */ 3444 mutex_enter(&sc->sc_lock); 3445 err = usb_insert_transfer(xfer); 3446 mutex_exit(&sc->sc_lock); 3447 3448 KASSERT(err == USBD_NORMAL_COMPLETION); 3449 3450 /* insert into schedule, */ 3451 ohci_device_isoc_enter(xfer); 3452 3453 /* and start if the pipe wasn't running */ 3454 return USBD_IN_PROGRESS; 3455 } 3456 3457 void 3458 ohci_device_isoc_enter(struct usbd_xfer *xfer) 3459 { 3460 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3461 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3462 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3463 ohci_soft_ed_t *sed = opipe->sed; 3464 ohci_soft_itd_t *sitd, *nsitd, *tail; 3465 ohci_physaddr_t buf, offs, noffs, bp0; 3466 int i, ncur, nframes; 3467 3468 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3469 DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0); 3470 3471 mutex_enter(&sc->sc_lock); 3472 3473 if (sc->sc_dying) { 3474 mutex_exit(&sc->sc_lock); 3475 return; 3476 } 3477 3478 struct isoc *isoc = &opipe->isoc; 3479 3480 DPRINTFN(1, "used=%d next=%d xfer=%p nframes=%d", 3481 isoc->inuse, isoc->next, xfer, xfer->ux_nframes); 3482 3483 if (isoc->next == -1) { 3484 /* Not in use yet, schedule it a few frames ahead. */ 3485 isoc->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3486 DPRINTFN(2,"start next=%d", isoc->next, 0, 0, 0); 3487 } 3488 3489 sitd = opipe->tail.itd; 3490 opipe->tail.itd = ox->ox_sitds[0]; 3491 ox->ox_sitds[0] = sitd; 3492 3493 buf = DMAADDR(&xfer->ux_dmabuf, 0); 3494 bp0 = OHCI_PAGE(buf); 3495 offs = OHCI_PAGE_OFFSET(buf); 3496 nframes = xfer->ux_nframes; 3497 xfer->ux_hcpriv = sitd; 3498 size_t j = 1; 3499 for (i = ncur = 0; i < nframes; i++, ncur++) { 3500 noffs = offs + xfer->ux_frlengths[i]; 3501 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3502 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3503 3504 /* Allocate next ITD */ 3505 nsitd = ox->ox_sitds[j++]; 3506 KASSERT(nsitd != NULL); 3507 KASSERT(j < ox->ox_nsitd); 3508 3509 /* Fill current ITD */ 3510 sitd->itd.itd_flags = HTOO32( 3511 OHCI_ITD_NOCC | 3512 OHCI_ITD_SET_SF(isoc->next) | 3513 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3514 OHCI_ITD_SET_FC(ncur)); 3515 sitd->itd.itd_bp0 = HTOO32(bp0); 3516 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3517 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3518 sitd->nextitd = nsitd; 3519 sitd->xfer = xfer; 3520 sitd->flags = 0; 3521 #ifdef DIAGNOSTIC 3522 sitd->isdone = false; 3523 #endif 3524 ohci_hash_add_itd(sc, sitd); 3525 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3526 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3527 3528 sitd = nsitd; 3529 isoc->next = isoc->next + ncur; 3530 bp0 = OHCI_PAGE(buf + offs); 3531 ncur = 0; 3532 } 3533 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3534 offs = noffs; 3535 } 3536 KASSERT(j <= ox->ox_nsitd); 3537 3538 /* point at sentinel */ 3539 tail = opipe->tail.itd; 3540 memset(&tail->itd, 0, sizeof(tail->itd)); 3541 tail->nextitd = NULL; 3542 tail->xfer = NULL; 3543 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->itd), 3544 BUS_DMASYNC_PREWRITE); 3545 3546 /* Fixup last used ITD */ 3547 sitd->itd.itd_flags = HTOO32( 3548 OHCI_ITD_NOCC | 3549 OHCI_ITD_SET_SF(isoc->next) | 3550 OHCI_ITD_SET_DI(0) | 3551 OHCI_ITD_SET_FC(ncur)); 3552 sitd->itd.itd_bp0 = HTOO32(bp0); 3553 sitd->itd.itd_nextitd = HTOO32(tail->physaddr); 3554 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3555 sitd->nextitd = tail; 3556 sitd->xfer = xfer; 3557 sitd->flags = OHCI_CALL_DONE; 3558 #ifdef DIAGNOSTIC 3559 sitd->isdone = false; 3560 #endif 3561 ohci_hash_add_itd(sc, sitd); 3562 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3563 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3564 3565 isoc->next = isoc->next + ncur; 3566 isoc->inuse += nframes; 3567 3568 /* XXX pretend we did it all */ 3569 xfer->ux_actlen = offs; 3570 xfer->ux_status = USBD_IN_PROGRESS; 3571 3572 #ifdef OHCI_DEBUG 3573 if (ohcidebug >= 5) { 3574 DPRINTF("frame=%d", O32TOH(sc->sc_hcca->hcca_frame_number), 3575 0, 0, 0); 3576 ohci_dump_itds(sc, xfer->ux_hcpriv); 3577 ohci_dump_ed(sc, sed); 3578 } 3579 #endif 3580 3581 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3582 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3583 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3584 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3585 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3586 sizeof(sed->ed.ed_flags), 3587 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3588 mutex_exit(&sc->sc_lock); 3589 } 3590 3591 void 3592 ohci_device_isoc_abort(struct usbd_xfer *xfer) 3593 { 3594 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3595 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3596 ohci_soft_ed_t *sed; 3597 ohci_soft_itd_t *sitd; 3598 3599 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3600 DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0); 3601 3602 KASSERT(mutex_owned(&sc->sc_lock)); 3603 3604 /* Transfer is already done. */ 3605 if (xfer->ux_status != USBD_NOT_STARTED && 3606 xfer->ux_status != USBD_IN_PROGRESS) { 3607 printf("ohci_device_isoc_abort: early return\n"); 3608 goto done; 3609 } 3610 3611 /* Give xfer the requested abort code. */ 3612 xfer->ux_status = USBD_CANCELLED; 3613 3614 sed = opipe->sed; 3615 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3616 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3617 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3618 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3619 sizeof(sed->ed.ed_flags), 3620 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3621 3622 sitd = xfer->ux_hcpriv; 3623 KASSERT(sitd); 3624 3625 usb_delay_ms_locked(&sc->sc_bus, OHCI_ITD_NOFFSET, &sc->sc_lock); 3626 3627 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3628 ohci_hash_rem_itd(sc, sitd); 3629 #ifdef DIAGNOSTIC 3630 DPRINTFN(1, "abort sets done sitd=%p", sitd, 0, 0, 0); 3631 sitd->isdone = true; 3632 #endif 3633 } 3634 3635 /* Run callback. */ 3636 usb_transfer_complete(xfer); 3637 3638 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3639 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3640 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3641 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3642 3643 done: 3644 KASSERT(mutex_owned(&sc->sc_lock)); 3645 } 3646 3647 void 3648 ohci_device_isoc_done(struct usbd_xfer *xfer) 3649 { 3650 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3651 DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0); 3652 } 3653 3654 usbd_status 3655 ohci_setup_isoc(struct usbd_pipe *pipe) 3656 { 3657 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3658 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3659 struct isoc *isoc = &opipe->isoc; 3660 3661 isoc->next = -1; 3662 isoc->inuse = 0; 3663 3664 mutex_enter(&sc->sc_lock); 3665 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3666 mutex_exit(&sc->sc_lock); 3667 3668 return USBD_NORMAL_COMPLETION; 3669 } 3670 3671 void 3672 ohci_device_isoc_close(struct usbd_pipe *pipe) 3673 { 3674 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3675 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3676 3677 KASSERT(mutex_owned(&sc->sc_lock)); 3678 3679 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3680 DPRINTF("pipe=%p", pipe, 0, 0, 0); 3681 ohci_close_pipe(pipe, sc->sc_isoc_head); 3682 #ifdef DIAGNOSTIC 3683 opipe->tail.itd->isdone = true; 3684 #endif 3685 ohci_free_sitd_locked(sc, opipe->tail.itd); 3686 } 3687
Indexes created Tue Sep 23 14:10:03 GMT 2025