ohci.c revision 1.27
1 /* $NetBSD: ohci.c,v 1.27 1999/01/13 10:33:53 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (augustss (at) carlstedt.se) at 9 * Carlstedt Research & Technology. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * USB Open Host Controller driver. 42 * 43 * OHCI spec: http://www.intel.com/design/usb/ohci11d.pdf 44 * USB spec: http://www.teleport.com/cgi-bin/mailmerge.cgi/~usb/cgiform.tpl 45 */ 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/kernel.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) 52 #include <sys/device.h> 53 #elif defined(__FreeBSD__) 54 #include <sys/module.h> 55 #include <sys/bus.h> 56 #endif 57 #include <sys/proc.h> 58 #include <sys/queue.h> 59 #include <sys/select.h> 60 61 #include <machine/bus.h> 62 #include <machine/endian.h> 63 64 #include <dev/usb/usb.h> 65 #include <dev/usb/usbdi.h> 66 #include <dev/usb/usbdivar.h> 67 #include <dev/usb/usb_quirks.h> 68 #include <dev/usb/usb_mem.h> 69 70 #include <dev/usb/ohcireg.h> 71 #include <dev/usb/ohcivar.h> 72 73 #if defined(__FreeBSD__) 74 #include <machine/clock.h> 75 76 #define delay(d) DELAY(d) 77 78 #endif 79 80 /* 81 * The OHCI controller is little endian, so on big endian machines 82 * the data strored in memory needs to be swapped. 83 */ 84 #if BYTE_ORDER == BIG_ENDIAN 85 #define LE(x) (bswap32(x)) 86 #else 87 #define LE(x) (x) 88 #endif 89 90 struct ohci_pipe; 91 92 ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *)); 93 void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *)); 94 95 ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *)); 96 void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *)); 97 98 usbd_status ohci_open __P((usbd_pipe_handle)); 99 void ohci_poll __P((struct usbd_bus *)); 100 void ohci_waitintr __P((ohci_softc_t *, usbd_request_handle)); 101 void ohci_rhsc __P((ohci_softc_t *, usbd_request_handle)); 102 void ohci_process_done __P((ohci_softc_t *, ohci_physaddr_t)); 103 void ohci_ii_done __P((ohci_softc_t *, usbd_request_handle)); 104 void ohci_ctrl_done __P((ohci_softc_t *, usbd_request_handle)); 105 void ohci_intr_done __P((ohci_softc_t *, usbd_request_handle)); 106 void ohci_bulk_done __P((ohci_softc_t *, usbd_request_handle)); 107 108 usbd_status ohci_device_request __P((usbd_request_handle reqh)); 109 void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 110 void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 111 void ohci_hash_add_td __P((ohci_softc_t *, ohci_soft_td_t *)); 112 void ohci_hash_rem_td __P((ohci_softc_t *, ohci_soft_td_t *)); 113 ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, ohci_physaddr_t)); 114 115 usbd_status ohci_root_ctrl_transfer __P((usbd_request_handle)); 116 usbd_status ohci_root_ctrl_start __P((usbd_request_handle)); 117 void ohci_root_ctrl_abort __P((usbd_request_handle)); 118 void ohci_root_ctrl_close __P((usbd_pipe_handle)); 119 120 usbd_status ohci_root_intr_transfer __P((usbd_request_handle)); 121 usbd_status ohci_root_intr_start __P((usbd_request_handle)); 122 void ohci_root_intr_abort __P((usbd_request_handle)); 123 void ohci_root_intr_close __P((usbd_pipe_handle)); 124 125 usbd_status ohci_device_ctrl_transfer __P((usbd_request_handle)); 126 usbd_status ohci_device_ctrl_start __P((usbd_request_handle)); 127 void ohci_device_ctrl_abort __P((usbd_request_handle)); 128 void ohci_device_ctrl_close __P((usbd_pipe_handle)); 129 130 usbd_status ohci_device_bulk_transfer __P((usbd_request_handle)); 131 usbd_status ohci_device_bulk_start __P((usbd_request_handle)); 132 void ohci_device_bulk_abort __P((usbd_request_handle)); 133 void ohci_device_bulk_close __P((usbd_pipe_handle)); 134 135 usbd_status ohci_device_intr_transfer __P((usbd_request_handle)); 136 usbd_status ohci_device_intr_start __P((usbd_request_handle)); 137 void ohci_device_intr_abort __P((usbd_request_handle)); 138 void ohci_device_intr_close __P((usbd_pipe_handle)); 139 usbd_status ohci_device_setintr __P((ohci_softc_t *sc, 140 struct ohci_pipe *pipe, int ival)); 141 142 int ohci_str __P((usb_string_descriptor_t *, int, char *)); 143 144 void ohci_timeout __P((void *)); 145 void ohci_rhsc_able __P((ohci_softc_t *, int)); 146 147 #ifdef USB_DEBUG 148 ohci_softc_t *thesc; 149 void ohci_dumpregs __P((ohci_softc_t *)); 150 void ohci_dump_tds __P((ohci_soft_td_t *)); 151 void ohci_dump_td __P((ohci_soft_td_t *)); 152 void ohci_dump_ed __P((ohci_soft_ed_t *)); 153 #endif 154 155 #if defined(__NetBSD__) 156 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 157 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 158 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 159 #elif defined(__FreeBSD__) 160 #define OWRITE4(sc, r, x) *(u_int32_t *) ((sc)->sc_iobase + (r)) = x 161 #define OREAD4(sc, r) (*(u_int32_t *) ((sc)->sc_iobase + (r))) 162 #define OREAD2(sc, r) (*(u_int16_t *) ((sc)->sc_iobase + (r))) 163 #endif 164 165 /* Reverse the bits in a value 0 .. 31 */ 166 static u_int8_t revbits[OHCI_NO_INTRS] = 167 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 168 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 169 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 170 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 171 172 struct ohci_pipe { 173 struct usbd_pipe pipe; 174 ohci_soft_ed_t *sed; 175 ohci_soft_td_t *tail; 176 /* Info needed for different pipe kinds. */ 177 union { 178 /* Control pipe */ 179 struct { 180 usb_dma_t datadma; 181 usb_dma_t reqdma; 182 u_int length; 183 ohci_soft_td_t *setup, *xfer, *stat; 184 } ctl; 185 /* Interrupt pipe */ 186 struct { 187 usb_dma_t datadma; 188 int nslots; 189 int pos; 190 } intr; 191 /* Bulk pipe */ 192 struct { 193 usb_dma_t datadma; 194 u_int length; 195 } bulk; 196 } u; 197 }; 198 199 #define OHCI_INTR_ENDPT 1 200 201 struct usbd_methods ohci_root_ctrl_methods = { 202 ohci_root_ctrl_transfer, 203 ohci_root_ctrl_start, 204 ohci_root_ctrl_abort, 205 ohci_root_ctrl_close, 206 0, 207 }; 208 209 struct usbd_methods ohci_root_intr_methods = { 210 ohci_root_intr_transfer, 211 ohci_root_intr_start, 212 ohci_root_intr_abort, 213 ohci_root_intr_close, 214 0, 215 }; 216 217 struct usbd_methods ohci_device_ctrl_methods = { 218 ohci_device_ctrl_transfer, 219 ohci_device_ctrl_start, 220 ohci_device_ctrl_abort, 221 ohci_device_ctrl_close, 222 0, 223 }; 224 225 struct usbd_methods ohci_device_intr_methods = { 226 ohci_device_intr_transfer, 227 ohci_device_intr_start, 228 ohci_device_intr_abort, 229 ohci_device_intr_close, 230 }; 231 232 struct usbd_methods ohci_device_bulk_methods = { 233 ohci_device_bulk_transfer, 234 ohci_device_bulk_start, 235 ohci_device_bulk_abort, 236 ohci_device_bulk_close, 237 0, 238 }; 239 240 ohci_soft_ed_t * 241 ohci_alloc_sed(sc) 242 ohci_softc_t *sc; 243 { 244 ohci_soft_ed_t *sed; 245 usbd_status r; 246 int i, offs; 247 usb_dma_t dma; 248 249 if (!sc->sc_freeeds) { 250 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 251 sed = malloc(sizeof(ohci_soft_ed_t) * OHCI_ED_CHUNK, 252 M_USBDEV, M_NOWAIT); 253 if (!sed) 254 return 0; 255 r = usb_allocmem(sc->sc_dmatag, OHCI_ED_SIZE * OHCI_ED_CHUNK, 256 OHCI_ED_ALIGN, &dma); 257 if (r != USBD_NORMAL_COMPLETION) { 258 free(sed, M_USBDEV); 259 return 0; 260 } 261 for(i = 0; i < OHCI_ED_CHUNK; i++, sed++) { 262 offs = i * OHCI_ED_SIZE; 263 sed->physaddr = DMAADDR(&dma) + offs; 264 sed->ed = (ohci_ed_t *) 265 ((char *)KERNADDR(&dma) + offs); 266 sed->next = sc->sc_freeeds; 267 sc->sc_freeeds = sed; 268 } 269 } 270 sed = sc->sc_freeeds; 271 sc->sc_freeeds = sed->next; 272 memset(sed->ed, 0, OHCI_ED_SIZE); 273 sed->next = 0; 274 return sed; 275 } 276 277 void 278 ohci_free_sed(sc, sed) 279 ohci_softc_t *sc; 280 ohci_soft_ed_t *sed; 281 { 282 sed->next = sc->sc_freeeds; 283 sc->sc_freeeds = sed; 284 } 285 286 ohci_soft_td_t * 287 ohci_alloc_std(sc) 288 ohci_softc_t *sc; 289 { 290 ohci_soft_td_t *std; 291 usbd_status r; 292 int i, offs; 293 usb_dma_t dma; 294 295 if (!sc->sc_freetds) { 296 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 297 std = malloc(sizeof(ohci_soft_td_t) * OHCI_TD_CHUNK, 298 M_USBDEV, M_NOWAIT); 299 if (!std) 300 return 0; 301 r = usb_allocmem(sc->sc_dmatag, OHCI_TD_SIZE * OHCI_TD_CHUNK, 302 OHCI_TD_ALIGN, &dma); 303 if (r != USBD_NORMAL_COMPLETION) { 304 free(std, M_USBDEV); 305 return 0; 306 } 307 for(i = 0; i < OHCI_TD_CHUNK; i++, std++) { 308 offs = i * OHCI_TD_SIZE; 309 std->physaddr = DMAADDR(&dma) + offs; 310 std->td = (ohci_td_t *) 311 ((char *)KERNADDR(&dma) + offs); 312 std->nexttd = sc->sc_freetds; 313 sc->sc_freetds = std; 314 } 315 } 316 std = sc->sc_freetds; 317 sc->sc_freetds = std->nexttd; 318 memset(std->td, 0, OHCI_TD_SIZE); 319 std->nexttd = 0; 320 return (std); 321 } 322 323 void 324 ohci_free_std(sc, std) 325 ohci_softc_t *sc; 326 ohci_soft_td_t *std; 327 { 328 std->nexttd = sc->sc_freetds; 329 sc->sc_freetds = std; 330 } 331 332 usbd_status 333 ohci_init(sc) 334 ohci_softc_t *sc; 335 { 336 ohci_soft_ed_t *sed, *psed; 337 usbd_status r; 338 int rev; 339 int i; 340 u_int32_t s, ctl, ival, hcr, fm, per; 341 342 DPRINTF(("ohci_init: start\n")); 343 rev = OREAD4(sc, OHCI_REVISION); 344 printf("%s: OHCI version %d.%d%s\n", USBDEVNAME(sc->sc_bus.bdev), 345 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 346 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 347 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 348 printf("%s: unsupported OHCI revision\n", 349 USBDEVNAME(sc->sc_bus.bdev)); 350 return (USBD_INVAL); 351 } 352 353 for (i = 0; i < OHCI_HASH_SIZE; i++) 354 LIST_INIT(&sc->sc_hash_tds[i]); 355 356 /* Allocate the HCCA area. */ 357 r = usb_allocmem(sc->sc_dmatag, OHCI_HCCA_SIZE, 358 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 359 if (r != USBD_NORMAL_COMPLETION) 360 return (r); 361 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 362 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 363 364 sc->sc_eintrs = OHCI_NORMAL_INTRS; 365 366 sc->sc_ctrl_head = ohci_alloc_sed(sc); 367 if (!sc->sc_ctrl_head) { 368 r = USBD_NOMEM; 369 goto bad1; 370 } 371 sc->sc_ctrl_head->ed->ed_flags |= LE(OHCI_ED_SKIP); 372 sc->sc_bulk_head = ohci_alloc_sed(sc); 373 if (!sc->sc_bulk_head) { 374 r = USBD_NOMEM; 375 goto bad2; 376 } 377 sc->sc_bulk_head->ed->ed_flags |= LE(OHCI_ED_SKIP); 378 379 /* Allocate all the dummy EDs that make up the interrupt tree. */ 380 for (i = 0; i < OHCI_NO_EDS; i++) { 381 sed = ohci_alloc_sed(sc); 382 if (!sed) { 383 while (--i >= 0) 384 ohci_free_sed(sc, sc->sc_eds[i]); 385 r = USBD_NOMEM; 386 goto bad3; 387 } 388 /* All ED fields are set to 0. */ 389 sc->sc_eds[i] = sed; 390 sed->ed->ed_flags |= LE(OHCI_ED_SKIP); 391 if (i != 0) { 392 psed = sc->sc_eds[(i-1) / 2]; 393 sed->next = psed; 394 sed->ed->ed_nexted = LE(psed->physaddr); 395 } 396 } 397 /* 398 * Fill HCCA interrupt table. The bit reversal is to get 399 * the tree set up properly to spread the interrupts. 400 */ 401 for (i = 0; i < OHCI_NO_INTRS; i++) 402 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 403 LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 404 405 /* Determine in what context we are running. */ 406 ctl = OREAD4(sc, OHCI_CONTROL); 407 if (ctl & OHCI_IR) { 408 /* SMM active, request change */ 409 DPRINTF(("ohci_init: SMM active, request owner change\n")); 410 s = OREAD4(sc, OHCI_COMMAND_STATUS); 411 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 412 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 413 delay(1000); 414 ctl = OREAD4(sc, OHCI_CONTROL); 415 } 416 if ((ctl & OHCI_IR) == 0) { 417 printf("%s: SMM does not respond, resetting\n", 418 USBDEVNAME(sc->sc_bus.bdev)); 419 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 420 goto reset; 421 } 422 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 423 /* BIOS started controller. */ 424 DPRINTF(("ohci_init: BIOS active\n")); 425 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 426 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 427 delay(USB_RESUME_DELAY * 1000); 428 } 429 } else { 430 DPRINTF(("ohci_init: cold started\n")); 431 reset: 432 /* Controller was cold started. */ 433 delay(USB_BUS_RESET_DELAY * 1000); 434 } 435 436 /* 437 * This reset should not be necessary according to the OHCI spec, but 438 * without it some controllers do not start. 439 */ 440 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 441 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 442 delay(USB_BUS_RESET_DELAY * 1000); 443 444 /* We now own the host controller and the bus has been reset. */ 445 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 446 447 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 448 /* Nominal time for a reset is 10 us. */ 449 for (i = 0; i < 10; i++) { 450 delay(10); 451 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 452 if (!hcr) 453 break; 454 } 455 if (hcr) { 456 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 457 r = USBD_IOERROR; 458 goto bad3; 459 } 460 #ifdef USB_DEBUG 461 thesc = sc; 462 if (ohcidebug > 15) 463 ohci_dumpregs(sc); 464 #endif 465 466 /* The controller is now in suspend state, we have 2ms to finish. */ 467 468 /* Set up HC registers. */ 469 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 470 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 471 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 472 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 473 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 474 ctl = OREAD4(sc, OHCI_CONTROL); 475 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 476 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 477 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 478 /* And finally start it! */ 479 OWRITE4(sc, OHCI_CONTROL, ctl); 480 481 /* 482 * The controller is now OPERATIONAL. Set a some final 483 * registers that should be set earlier, but that the 484 * controller ignores when in the SUSPEND state. 485 */ 486 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 487 fm |= OHCI_FSMPS(ival) | ival; 488 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 489 per = OHCI_PERIODIC(ival); /* 90% periodic */ 490 OWRITE4(sc, OHCI_PERIODIC_START, per); 491 492 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 493 494 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 495 496 #ifdef USB_DEBUG 497 if (ohcidebug > 5) 498 ohci_dumpregs(sc); 499 #endif 500 501 /* Set up the bus struct. */ 502 sc->sc_bus.open_pipe = ohci_open; 503 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 504 sc->sc_bus.do_poll = ohci_poll; 505 506 return (USBD_NORMAL_COMPLETION); 507 508 bad3: 509 ohci_free_sed(sc, sc->sc_ctrl_head); 510 bad2: 511 ohci_free_sed(sc, sc->sc_bulk_head); 512 bad1: 513 usb_freemem(sc->sc_dmatag, &sc->sc_hccadma); 514 return (r); 515 } 516 517 #ifdef USB_DEBUG 518 void ohcidump(void); 519 void ohcidump(void) { ohci_dumpregs(thesc); } 520 521 void 522 ohci_dumpregs(sc) 523 ohci_softc_t *sc; 524 { 525 printf("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 526 OREAD4(sc, OHCI_REVISION), 527 OREAD4(sc, OHCI_CONTROL), 528 OREAD4(sc, OHCI_COMMAND_STATUS)); 529 printf(" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 530 OREAD4(sc, OHCI_INTERRUPT_STATUS), 531 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 532 OREAD4(sc, OHCI_INTERRUPT_DISABLE)); 533 printf(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 534 OREAD4(sc, OHCI_HCCA), 535 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 536 OREAD4(sc, OHCI_CONTROL_HEAD_ED)); 537 printf(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 538 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 539 OREAD4(sc, OHCI_BULK_HEAD_ED), 540 OREAD4(sc, OHCI_BULK_CURRENT_ED)); 541 printf(" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 542 OREAD4(sc, OHCI_DONE_HEAD), 543 OREAD4(sc, OHCI_FM_INTERVAL), 544 OREAD4(sc, OHCI_FM_REMAINING)); 545 printf(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 546 OREAD4(sc, OHCI_FM_NUMBER), 547 OREAD4(sc, OHCI_PERIODIC_START), 548 OREAD4(sc, OHCI_LS_THRESHOLD)); 549 printf(" desca=0x%08x descb=0x%08x stat=0x%08x\n", 550 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 551 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 552 OREAD4(sc, OHCI_RH_STATUS)); 553 printf(" port1=0x%08x port2=0x%08x\n", 554 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 555 OREAD4(sc, OHCI_RH_PORT_STATUS(2))); 556 printf(" HCCA: frame_number=0x%04x done_head=0x%08x\n", 557 LE(sc->sc_hcca->hcca_frame_number), 558 LE(sc->sc_hcca->hcca_done_head)); 559 } 560 #endif 561 562 int 563 ohci_intr(p) 564 void *p; 565 { 566 ohci_softc_t *sc = p; 567 u_int32_t intrs, eintrs; 568 ohci_physaddr_t done; 569 570 /* In case the interrupt occurs before initialization has completed. */ 571 if (sc == NULL || sc->sc_hcca == NULL) { /* NWH added sc==0 */ 572 #ifdef DIAGNOSTIC 573 printf("ohci_intr: sc->sc_hcca == NULL\n"); 574 #endif 575 return (0); 576 } 577 578 intrs = 0; 579 done = LE(sc->sc_hcca->hcca_done_head); 580 if (done != 0) { 581 sc->sc_hcca->hcca_done_head = 0; 582 if (done & ~OHCI_DONE_INTRS) 583 intrs = OHCI_WDH; 584 if (done & OHCI_DONE_INTRS) 585 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 586 } else 587 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 588 if (!intrs) 589 return (0); 590 intrs &= ~OHCI_MIE; 591 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 592 eintrs = intrs & sc->sc_eintrs; 593 if (!eintrs) 594 return (0); 595 596 sc->sc_intrs++; 597 DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n", 598 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 599 (u_int)eintrs)); 600 601 if (eintrs & OHCI_SO) { 602 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev)); 603 /* XXX do what */ 604 intrs &= ~OHCI_SO; 605 } 606 if (eintrs & OHCI_WDH) { 607 ohci_process_done(sc, done &~ OHCI_DONE_INTRS); 608 intrs &= ~OHCI_WDH; 609 } 610 if (eintrs & OHCI_RD) { 611 /* XXX process resume detect */ 612 } 613 if (eintrs & OHCI_UE) { 614 printf("%s: unrecoverable error, controller halted\n", 615 USBDEVNAME(sc->sc_bus.bdev)); 616 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 617 /* XXX what else */ 618 } 619 if (eintrs & OHCI_RHSC) { 620 ohci_rhsc(sc, sc->sc_intrreqh); 621 intrs &= ~OHCI_RHSC; 622 623 /* 624 * Disable RHSC interrupt for now, because it will be 625 * on until the port has been reset. 626 */ 627 ohci_rhsc_able(sc, 0); 628 } 629 630 /* Block unprocessed interrupts. XXX */ 631 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 632 sc->sc_eintrs &= ~intrs; 633 634 return (1); 635 } 636 637 void 638 ohci_rhsc_able(sc, on) 639 ohci_softc_t *sc; 640 int on; 641 { 642 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 643 if (on) { 644 sc->sc_eintrs |= OHCI_RHSC; 645 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 646 } else { 647 sc->sc_eintrs &= ~OHCI_RHSC; 648 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 649 } 650 } 651 652 #ifdef USB_DEBUG 653 char *ohci_cc_strs[] = { 654 "NO_ERROR", 655 "CRC", 656 "BIT_STUFFING", 657 "DATA_TOGGLE_MISMATCH", 658 "STALL", 659 "DEVICE_NOT_RESPONDING", 660 "PID_CHECK_FAILURE", 661 "UNEXPECTED_PID", 662 "DATA_OVERRUN", 663 "DATA_UNDERRUN", 664 "BUFFER_OVERRUN", 665 "BUFFER_UNDERRUN", 666 "NOT_ACCESSED", 667 }; 668 #endif 669 670 void 671 ohci_process_done(sc, done) 672 ohci_softc_t *sc; 673 ohci_physaddr_t done; 674 { 675 ohci_soft_td_t *std, *sdone; 676 usbd_request_handle reqh; 677 int len, cc; 678 679 DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done)); 680 681 /* Reverse the done list. */ 682 for (sdone = 0; done; done = LE(std->td->td_nexttd)) { 683 std = ohci_hash_find_td(sc, done); 684 std->dnext = sdone; 685 sdone = std; 686 } 687 688 #ifdef USB_DEBUG 689 if (ohcidebug > 10) { 690 printf("ohci_process_done: TD done:\n"); 691 ohci_dump_tds(sdone); 692 } 693 #endif 694 695 for (std = sdone; std; std = std->dnext) { 696 reqh = std->reqh; 697 DPRINTFN(10, ("ohci_process_done: std=%p reqh=%p hcpriv=%p\n", 698 std, reqh, reqh->hcpriv)); 699 cc = OHCI_TD_GET_CC(LE(std->td->td_flags)); 700 if (cc == OHCI_CC_NO_ERROR) { 701 if (std->td->td_cbp == 0) 702 len = std->len; 703 else 704 len = LE(std->td->td_be) - 705 LE(std->td->td_cbp) + 1; 706 /* 707 * Only do a callback on the last stage of a transfer. 708 * Others have hcpriv = 0. 709 */ 710 if ((reqh->pipe->endpoint->edesc->bmAttributes & 711 UE_XFERTYPE) == UE_CONTROL) { 712 /* For a control transfer the length is in 713 * the xfer stage */ 714 if (reqh->hcpriv == std) { 715 reqh->status = USBD_NORMAL_COMPLETION; 716 ohci_ii_done(sc, reqh); 717 } else 718 reqh->actlen = len; 719 } else { 720 if (reqh->hcpriv == std) { 721 reqh->actlen = len; 722 reqh->status = USBD_NORMAL_COMPLETION; 723 ohci_ii_done(sc, reqh); 724 } 725 } 726 } else { 727 ohci_soft_td_t *p, *n; 728 struct ohci_pipe *opipe = 729 (struct ohci_pipe *)reqh->pipe; 730 DPRINTFN(-1,("ohci_process_done: error cc=%d (%s)\n", 731 OHCI_TD_GET_CC(LE(std->td->td_flags)), 732 ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td->td_flags))])); 733 /* 734 * Endpoint is halted. First unlink all the TDs 735 * belonging to the failed transfer, and then restart 736 * the endpoint. 737 */ 738 for (p = std->nexttd; p->reqh == reqh; p = n) { 739 n = p->nexttd; 740 ohci_hash_rem_td(sc, p); 741 ohci_free_std(sc, p); 742 } 743 /* clear halt */ 744 opipe->sed->ed->ed_headp = LE(p->physaddr); 745 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 746 747 if (cc == OHCI_CC_STALL) 748 reqh->status = USBD_STALLED; 749 else 750 reqh->status = USBD_IOERROR; 751 ohci_ii_done(sc, reqh); 752 } 753 ohci_hash_rem_td(sc, std); 754 ohci_free_std(sc, std); 755 } 756 } 757 758 void 759 ohci_ii_done(sc, reqh) 760 ohci_softc_t *sc; 761 usbd_request_handle reqh; 762 { 763 switch (reqh->pipe->endpoint->edesc->bmAttributes & UE_XFERTYPE) { 764 case UE_CONTROL: 765 ohci_ctrl_done(sc, reqh); 766 usb_start_next(reqh->pipe); 767 break; 768 case UE_INTERRUPT: 769 ohci_intr_done(sc, reqh); 770 break; 771 case UE_BULK: 772 ohci_bulk_done(sc, reqh); 773 usb_start_next(reqh->pipe); 774 break; 775 case UE_ISOCHRONOUS: 776 printf("ohci_process_done: ISO done?\n"); 777 usb_start_next(reqh->pipe); 778 break; 779 } 780 781 /* And finally execute callback. */ 782 reqh->xfercb(reqh); 783 } 784 785 void 786 ohci_ctrl_done(sc, reqh) 787 ohci_softc_t *sc; 788 usbd_request_handle reqh; 789 { 790 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 791 u_int len = opipe->u.ctl.length; 792 usb_dma_t *dma; 793 794 DPRINTFN(10,("ohci_ctrl_done: reqh=%p\n", reqh)); 795 796 if (!reqh->isreq) { 797 panic("ohci_ctrl_done: not a request\n"); 798 return; 799 } 800 801 if (len != 0) { 802 dma = &opipe->u.ctl.datadma; 803 if (reqh->request.bmRequestType & UT_READ) 804 memcpy(reqh->buffer, KERNADDR(dma), len); 805 usb_freemem(sc->sc_dmatag, dma); 806 } 807 usb_untimeout(ohci_timeout, reqh, reqh->timo_handle); 808 } 809 810 void 811 ohci_intr_done(sc, reqh) 812 ohci_softc_t *sc; 813 usbd_request_handle reqh; 814 { 815 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 816 usb_dma_t *dma; 817 ohci_soft_ed_t *sed = opipe->sed; 818 ohci_soft_td_t *xfer, *tail; 819 820 821 DPRINTFN(10,("ohci_intr_done: reqh=%p, actlen=%d\n", 822 reqh, reqh->actlen)); 823 824 dma = &opipe->u.intr.datadma; 825 memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen); 826 827 if (reqh->pipe->intrreqh == reqh) { 828 xfer = opipe->tail; 829 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 830 if (!tail) { 831 reqh->status = USBD_NOMEM; 832 return; 833 } 834 tail->reqh = 0; 835 836 xfer->td->td_flags = LE( 837 OHCI_TD_IN | OHCI_TD_NOCC | 838 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 839 if (reqh->flags & USBD_SHORT_XFER_OK) 840 xfer->td->td_flags |= LE(OHCI_TD_R); 841 xfer->td->td_cbp = LE(DMAADDR(dma)); 842 xfer->nexttd = tail; 843 xfer->td->td_nexttd = LE(tail->physaddr); 844 xfer->td->td_be = LE(LE(xfer->td->td_cbp) + reqh->length - 1); 845 xfer->len = reqh->length; 846 xfer->reqh = reqh; 847 848 reqh->hcpriv = xfer; 849 850 ohci_hash_add_td(sc, xfer); 851 sed->ed->ed_tailp = LE(tail->physaddr); 852 opipe->tail = tail; 853 } else { 854 usb_freemem(sc->sc_dmatag, dma); 855 usb_start_next(reqh->pipe); 856 } 857 } 858 859 void 860 ohci_bulk_done(sc, reqh) 861 ohci_softc_t *sc; 862 usbd_request_handle reqh; 863 { 864 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 865 usb_dma_t *dma; 866 867 868 DPRINTFN(10,("ohci_bulk_done: reqh=%p, actlen=%d\n", 869 reqh, reqh->actlen)); 870 871 dma = &opipe->u.bulk.datadma; 872 if (reqh->request.bmRequestType & UT_READ) 873 memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen); 874 usb_freemem(sc->sc_dmatag, dma); 875 usb_untimeout(ohci_timeout, reqh, reqh->timo_handle); 876 } 877 878 void 879 ohci_rhsc(sc, reqh) 880 ohci_softc_t *sc; 881 usbd_request_handle reqh; 882 { 883 usbd_pipe_handle pipe; 884 struct ohci_pipe *opipe; 885 u_char *p; 886 int i, m; 887 int hstatus; 888 889 hstatus = OREAD4(sc, OHCI_RH_STATUS); 890 DPRINTF(("ohci_rhsc: sc=%p reqh=%p hstatus=0x%08x\n", 891 sc, reqh, hstatus)); 892 893 if (reqh == 0) { 894 /* Just ignore the change. */ 895 return; 896 } 897 898 pipe = reqh->pipe; 899 opipe = (struct ohci_pipe *)pipe; 900 901 p = KERNADDR(&opipe->u.intr.datadma); 902 m = min(sc->sc_noport, reqh->length * 8 - 1); 903 memset(p, 0, reqh->length); 904 for (i = 1; i <= m; i++) { 905 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 906 p[i/8] |= 1 << (i%8); 907 } 908 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 909 reqh->actlen = reqh->length; 910 reqh->status = USBD_NORMAL_COMPLETION; 911 reqh->xfercb(reqh); 912 913 if (reqh->pipe->intrreqh != reqh) { 914 sc->sc_intrreqh = 0; 915 usb_freemem(sc->sc_dmatag, &opipe->u.intr.datadma); 916 usb_start_next(reqh->pipe); 917 } 918 } 919 920 /* 921 * Wait here until controller claims to have an interrupt. 922 * Then call ohci_intr and return. Use timeout to avoid waiting 923 * too long. 924 */ 925 void 926 ohci_waitintr(sc, reqh) 927 ohci_softc_t *sc; 928 usbd_request_handle reqh; 929 { 930 int timo = reqh->timeout; 931 int usecs; 932 u_int32_t intrs; 933 934 reqh->status = USBD_IN_PROGRESS; 935 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 936 usb_delay_ms(&sc->sc_bus, 1); 937 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 938 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 939 #ifdef USB_DEBUG 940 if (ohcidebug > 15) 941 ohci_dumpregs(sc); 942 #endif 943 if (intrs) { 944 ohci_intr(sc); 945 if (reqh->status != USBD_IN_PROGRESS) 946 return; 947 } 948 } 949 950 /* Timeout */ 951 DPRINTF(("ohci_waitintr: timeout\n")); 952 reqh->status = USBD_TIMEOUT; 953 ohci_ii_done(sc, reqh); 954 /* XXX should free TD */ 955 } 956 957 void 958 ohci_poll(bus) 959 struct usbd_bus *bus; 960 { 961 ohci_softc_t *sc = (ohci_softc_t *)bus; 962 963 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 964 ohci_intr(sc); 965 } 966 967 usbd_status 968 ohci_device_request(reqh) 969 usbd_request_handle reqh; 970 { 971 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 972 usb_device_request_t *req = &reqh->request; 973 usbd_device_handle dev = opipe->pipe.device; 974 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 975 int addr = dev->address; 976 ohci_soft_td_t *setup, *xfer = 0, *stat, *next, *tail; 977 ohci_soft_ed_t *sed; 978 usb_dma_t *dmap; 979 int isread; 980 int len; 981 usbd_status r; 982 int s; 983 984 isread = req->bmRequestType & UT_READ; 985 len = UGETW(req->wLength); 986 987 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 988 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 989 req->bmRequestType, req->bRequest, UGETW(req->wValue), 990 UGETW(req->wIndex), len, addr, 991 opipe->pipe.endpoint->edesc->bEndpointAddress)); 992 993 setup = opipe->tail; 994 stat = ohci_alloc_std(sc); 995 if (!stat) { 996 r = USBD_NOMEM; 997 goto bad1; 998 } 999 tail = ohci_alloc_std(sc); 1000 if (!tail) { 1001 r = USBD_NOMEM; 1002 goto bad2; 1003 } 1004 tail->reqh = 0; 1005 1006 sed = opipe->sed; 1007 dmap = &opipe->u.ctl.datadma; 1008 opipe->u.ctl.length = len; 1009 1010 /* Update device address and length since they may have changed. */ 1011 /* XXX This only needs to be done once, but it's too early in open. */ 1012 sed->ed->ed_flags = LE( 1013 (LE(sed->ed->ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1014 OHCI_ED_SET_FA(addr) | 1015 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1016 1017 /* Set up data transaction */ 1018 if (len != 0) { 1019 xfer = ohci_alloc_std(sc); 1020 if (!xfer) { 1021 r = USBD_NOMEM; 1022 goto bad3; 1023 } 1024 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1025 if (r != USBD_NORMAL_COMPLETION) 1026 goto bad4; 1027 xfer->td->td_flags = LE( 1028 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 1029 OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR | 1030 (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0)); 1031 xfer->td->td_cbp = LE(DMAADDR(dmap)); 1032 xfer->nexttd = stat; 1033 xfer->td->td_nexttd = LE(stat->physaddr); 1034 xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1); 1035 xfer->len = len; 1036 xfer->reqh = reqh; 1037 1038 next = xfer; 1039 } else 1040 next = stat; 1041 1042 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1043 if (!isread && len != 0) 1044 memcpy(KERNADDR(dmap), reqh->buffer, len); 1045 1046 setup->td->td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC | 1047 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1048 setup->td->td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma)); 1049 setup->nexttd = next; 1050 setup->td->td_nexttd = LE(next->physaddr); 1051 setup->td->td_be = LE(LE(setup->td->td_cbp) + sizeof *req - 1); 1052 setup->len = 0; /* XXX The number of byte we count */ 1053 setup->reqh = reqh; 1054 1055 stat->td->td_flags = LE( 1056 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC | 1057 OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1058 stat->td->td_cbp = 0; 1059 stat->nexttd = tail; 1060 stat->td->td_nexttd = LE(tail->physaddr); 1061 stat->td->td_be = 0; 1062 stat->len = 0; 1063 stat->reqh = reqh; 1064 1065 reqh->hcpriv = stat; 1066 1067 #if USB_DEBUG 1068 if (ohcidebug > 5) { 1069 printf("ohci_device_request:\n"); 1070 ohci_dump_ed(sed); 1071 ohci_dump_tds(setup); 1072 } 1073 #endif 1074 1075 /* Insert ED in schedule */ 1076 s = splusb(); 1077 ohci_hash_add_td(sc, setup); 1078 if (len != 0) 1079 ohci_hash_add_td(sc, xfer); 1080 ohci_hash_add_td(sc, stat); 1081 sed->ed->ed_tailp = LE(tail->physaddr); 1082 opipe->tail = tail; 1083 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1084 if (reqh->timeout && !sc->sc_bus.use_polling) { 1085 usb_timeout(ohci_timeout, reqh, 1086 MS_TO_TICKS(reqh->timeout), reqh->timo_handle); 1087 } 1088 splx(s); 1089 1090 #if USB_DEBUG 1091 if (ohcidebug > 5) { 1092 delay(5000); 1093 printf("ohci_device_request: status=%x\n", 1094 OREAD4(sc, OHCI_COMMAND_STATUS)); 1095 ohci_dump_ed(sed); 1096 ohci_dump_tds(setup); 1097 } 1098 #endif 1099 1100 return (USBD_NORMAL_COMPLETION); 1101 1102 bad4: 1103 ohci_free_std(sc, xfer); 1104 bad3: 1105 ohci_free_std(sc, tail); 1106 bad2: 1107 ohci_free_std(sc, stat); 1108 bad1: 1109 return (r); 1110 } 1111 1112 /* 1113 * Add an ED to the schedule. Called at splusb(). 1114 */ 1115 void 1116 ohci_add_ed(sed, head) 1117 ohci_soft_ed_t *sed; 1118 ohci_soft_ed_t *head; 1119 { 1120 sed->next = head->next; 1121 sed->ed->ed_nexted = head->ed->ed_nexted; 1122 head->next = sed; 1123 head->ed->ed_nexted = LE(sed->physaddr); 1124 } 1125 1126 /* 1127 * Remove an ED from the schedule. Called at splusb(). 1128 */ 1129 void 1130 ohci_rem_ed(sed, head) 1131 ohci_soft_ed_t *sed; 1132 ohci_soft_ed_t *head; 1133 { 1134 ohci_soft_ed_t *p; 1135 1136 /* XXX */ 1137 for (p = head; p && p->next != sed; p = p->next) 1138 ; 1139 if (!p) 1140 panic("ohci_rem_ed: ED not found\n"); 1141 p->next = sed->next; 1142 p->ed->ed_nexted = sed->ed->ed_nexted; 1143 } 1144 1145 /* 1146 * When a transfer is completed the TD is added to the done queue by 1147 * the host controller. This queue is the processed by software. 1148 * Unfortunately the queue contains the physical address of the TD 1149 * and we have no simple way to translate this back to a kernel address. 1150 * To make the translation possible (and fast) we use a hash table of 1151 * TDs currently in the schedule. The physical address is used as the 1152 * hash value. 1153 */ 1154 1155 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1156 /* Called at splusb() */ 1157 void 1158 ohci_hash_add_td(sc, std) 1159 ohci_softc_t *sc; 1160 ohci_soft_td_t *std; 1161 { 1162 int h = HASH(std->physaddr); 1163 1164 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1165 } 1166 1167 /* Called at splusb() */ 1168 void 1169 ohci_hash_rem_td(sc, std) 1170 ohci_softc_t *sc; 1171 ohci_soft_td_t *std; 1172 { 1173 LIST_REMOVE(std, hnext); 1174 } 1175 1176 ohci_soft_td_t * 1177 ohci_hash_find_td(sc, a) 1178 ohci_softc_t *sc; 1179 ohci_physaddr_t a; 1180 { 1181 int h = HASH(a); 1182 ohci_soft_td_t *std; 1183 1184 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1185 std != 0; 1186 std = LIST_NEXT(std, hnext)) 1187 if (std->physaddr == a) 1188 return (std); 1189 panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a); 1190 } 1191 1192 void 1193 ohci_timeout(addr) 1194 void *addr; 1195 { 1196 #if 0 1197 usbd_request_handle *reqh = addr; 1198 int s; 1199 1200 DPRINTF(("ohci_timeout: reqh=%p\n", reqh)); 1201 s = splusb(); 1202 /* XXX need to inactivate TD before calling interrupt routine */ 1203 ohci_XXX_done(reqh); 1204 splx(s); 1205 #endif 1206 } 1207 1208 #ifdef USB_DEBUG 1209 void 1210 ohci_dump_tds(std) 1211 ohci_soft_td_t *std; 1212 { 1213 for (; std; std = std->nexttd) 1214 ohci_dump_td(std); 1215 } 1216 1217 void 1218 ohci_dump_td(std) 1219 ohci_soft_td_t *std; 1220 { 1221 printf("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1222 "nexttd=0x%08lx be=0x%08lx\n", 1223 std, (u_long)std->physaddr, 1224 (u_long)LE(std->td->td_flags), 1225 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1226 OHCI_TD_GET_DI(LE(std->td->td_flags)), 1227 OHCI_TD_GET_EC(LE(std->td->td_flags)), 1228 OHCI_TD_GET_CC(LE(std->td->td_flags)), 1229 (u_long)LE(std->td->td_cbp), 1230 (u_long)LE(std->td->td_nexttd), (u_long)LE(std->td->td_be)); 1231 } 1232 1233 void 1234 ohci_dump_ed(sed) 1235 ohci_soft_ed_t *sed; 1236 { 1237 printf("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx " 1238 "headp=%b nexted=0x%08lx\n", 1239 sed, (u_long)sed->physaddr, 1240 OHCI_ED_GET_FA(LE(sed->ed->ed_flags)), 1241 OHCI_ED_GET_EN(LE(sed->ed->ed_flags)), 1242 OHCI_ED_GET_MAXP(LE(sed->ed->ed_flags)), 1243 (u_long)LE(sed->ed->ed_flags), 1244 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1245 (u_long)LE(sed->ed->ed_tailp), 1246 (u_long)LE(sed->ed->ed_headp), "\20\1HALT\2CARRY", 1247 (u_long)LE(sed->ed->ed_nexted)); 1248 } 1249 #endif 1250 1251 usbd_status 1252 ohci_open(pipe) 1253 usbd_pipe_handle pipe; 1254 { 1255 usbd_device_handle dev = pipe->device; 1256 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1257 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1258 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1259 u_int8_t addr = dev->address; 1260 ohci_soft_ed_t *sed; 1261 ohci_soft_td_t *std; 1262 usbd_status r; 1263 int s; 1264 1265 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1266 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1267 if (addr == sc->sc_addr) { 1268 switch (ed->bEndpointAddress) { 1269 case USB_CONTROL_ENDPOINT: 1270 pipe->methods = &ohci_root_ctrl_methods; 1271 break; 1272 case UE_IN | OHCI_INTR_ENDPT: 1273 pipe->methods = &ohci_root_intr_methods; 1274 break; 1275 default: 1276 return (USBD_INVAL); 1277 } 1278 } else { 1279 sed = ohci_alloc_sed(sc); 1280 if (sed == 0) 1281 goto bad0; 1282 std = ohci_alloc_std(sc); 1283 if (std == 0) 1284 goto bad1; 1285 opipe->sed = sed; 1286 opipe->tail = std; 1287 sed->ed->ed_flags = LE( 1288 OHCI_ED_SET_FA(addr) | 1289 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1290 OHCI_ED_DIR_TD | 1291 (dev->lowspeed ? OHCI_ED_SPEED : 0) | 1292 ((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ? 1293 OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) | 1294 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1295 sed->ed->ed_headp = sed->ed->ed_tailp = LE(std->physaddr); 1296 1297 switch (ed->bmAttributes & UE_XFERTYPE) { 1298 case UE_CONTROL: 1299 pipe->methods = &ohci_device_ctrl_methods; 1300 r = usb_allocmem(sc->sc_dmatag, 1301 sizeof(usb_device_request_t), 1302 0, &opipe->u.ctl.reqdma); 1303 if (r != USBD_NORMAL_COMPLETION) 1304 goto bad; 1305 s = splusb(); 1306 ohci_add_ed(sed, sc->sc_ctrl_head); 1307 splx(s); 1308 break; 1309 case UE_INTERRUPT: 1310 pipe->methods = &ohci_device_intr_methods; 1311 return (ohci_device_setintr(sc, opipe, ed->bInterval)); 1312 case UE_ISOCHRONOUS: 1313 printf("ohci_open: open iso unimplemented\n"); 1314 return (USBD_XXX); 1315 case UE_BULK: 1316 pipe->methods = &ohci_device_bulk_methods; 1317 s = splusb(); 1318 ohci_add_ed(sed, sc->sc_bulk_head); 1319 splx(s); 1320 break; 1321 } 1322 } 1323 return (USBD_NORMAL_COMPLETION); 1324 1325 bad: 1326 ohci_free_std(sc, std); 1327 bad1: 1328 ohci_free_sed(sc, sed); 1329 bad0: 1330 return (USBD_NOMEM); 1331 1332 } 1333 1334 /* 1335 * Data structures and routines to emulate the root hub. 1336 */ 1337 usb_device_descriptor_t ohci_devd = { 1338 USB_DEVICE_DESCRIPTOR_SIZE, 1339 UDESC_DEVICE, /* type */ 1340 {0x00, 0x01}, /* USB version */ 1341 UCLASS_HUB, /* class */ 1342 USUBCLASS_HUB, /* subclass */ 1343 0, /* protocol */ 1344 64, /* max packet */ 1345 {0},{0},{0x00,0x01}, /* device id */ 1346 1,2,0, /* string indicies */ 1347 1 /* # of configurations */ 1348 }; 1349 1350 usb_config_descriptor_t ohci_confd = { 1351 USB_CONFIG_DESCRIPTOR_SIZE, 1352 UDESC_CONFIG, 1353 {USB_CONFIG_DESCRIPTOR_SIZE + 1354 USB_INTERFACE_DESCRIPTOR_SIZE + 1355 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1356 1, 1357 1, 1358 0, 1359 UC_SELF_POWERED, 1360 0 /* max power */ 1361 }; 1362 1363 usb_interface_descriptor_t ohci_ifcd = { 1364 USB_INTERFACE_DESCRIPTOR_SIZE, 1365 UDESC_INTERFACE, 1366 0, 1367 0, 1368 1, 1369 UCLASS_HUB, 1370 USUBCLASS_HUB, 1371 0, 1372 0 1373 }; 1374 1375 usb_endpoint_descriptor_t ohci_endpd = { 1376 USB_ENDPOINT_DESCRIPTOR_SIZE, 1377 UDESC_ENDPOINT, 1378 UE_IN | OHCI_INTR_ENDPT, 1379 UE_INTERRUPT, 1380 {8, 0}, /* max packet */ 1381 255 1382 }; 1383 1384 usb_hub_descriptor_t ohci_hubd = { 1385 USB_HUB_DESCRIPTOR_SIZE, 1386 UDESC_HUB, 1387 0, 1388 {0,0}, 1389 0, 1390 0, 1391 {0}, 1392 }; 1393 1394 int 1395 ohci_str(p, l, s) 1396 usb_string_descriptor_t *p; 1397 int l; 1398 char *s; 1399 { 1400 int i; 1401 1402 if (l == 0) 1403 return (0); 1404 p->bLength = 2 * strlen(s) + 2; 1405 if (l == 1) 1406 return (1); 1407 p->bDescriptorType = UDESC_STRING; 1408 l -= 2; 1409 for (i = 0; s[i] && l > 1; i++, l -= 2) 1410 USETW2(p->bString[i], 0, s[i]); 1411 return (2*i+2); 1412 } 1413 1414 /* 1415 * Simulate a hardware hub by handling all the necessary requests. 1416 */ 1417 usbd_status 1418 ohci_root_ctrl_transfer(reqh) 1419 usbd_request_handle reqh; 1420 { 1421 int s; 1422 usbd_status r; 1423 1424 s = splusb(); 1425 r = usb_insert_transfer(reqh); 1426 splx(s); 1427 if (r != USBD_NORMAL_COMPLETION) 1428 return (r); 1429 else 1430 return (ohci_root_ctrl_start(reqh)); 1431 } 1432 1433 usbd_status 1434 ohci_root_ctrl_start(reqh) 1435 usbd_request_handle reqh; 1436 { 1437 ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus; 1438 usb_device_request_t *req; 1439 void *buf; 1440 int port, i; 1441 int len, value, index, l, totlen = 0; 1442 usb_port_status_t ps; 1443 usb_hub_descriptor_t hubd; 1444 usbd_status r; 1445 u_int32_t v; 1446 1447 if (!reqh->isreq) 1448 /* XXX panic */ 1449 return (USBD_INVAL); 1450 req = &reqh->request; 1451 buf = reqh->buffer; 1452 1453 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 1454 req->bmRequestType, req->bRequest)); 1455 1456 len = UGETW(req->wLength); 1457 value = UGETW(req->wValue); 1458 index = UGETW(req->wIndex); 1459 #define C(x,y) ((x) | ((y) << 8)) 1460 switch(C(req->bRequest, req->bmRequestType)) { 1461 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1462 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1463 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1464 /* 1465 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1466 * for the integrated root hub. 1467 */ 1468 break; 1469 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1470 if (len > 0) { 1471 *(u_int8_t *)buf = sc->sc_conf; 1472 totlen = 1; 1473 } 1474 break; 1475 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1476 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 1477 switch(value >> 8) { 1478 case UDESC_DEVICE: 1479 if ((value & 0xff) != 0) { 1480 r = USBD_IOERROR; 1481 goto ret; 1482 } 1483 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1484 memcpy(buf, &ohci_devd, l); 1485 break; 1486 case UDESC_CONFIG: 1487 if ((value & 0xff) != 0) { 1488 r = USBD_IOERROR; 1489 goto ret; 1490 } 1491 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1492 memcpy(buf, &ohci_confd, l); 1493 buf = (char *)buf + l; 1494 len -= l; 1495 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1496 totlen += l; 1497 memcpy(buf, &ohci_ifcd, l); 1498 buf = (char *)buf + l; 1499 len -= l; 1500 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1501 totlen += l; 1502 memcpy(buf, &ohci_endpd, l); 1503 break; 1504 case UDESC_STRING: 1505 if (len == 0) 1506 break; 1507 *(u_int8_t *)buf = 0; 1508 totlen = 1; 1509 switch (value & 0xff) { 1510 case 1: /* Vendor */ 1511 totlen = ohci_str(buf, len, sc->sc_vendor); 1512 break; 1513 case 2: /* Product */ 1514 totlen = ohci_str(buf, len, "OHCI root hub"); 1515 break; 1516 } 1517 break; 1518 default: 1519 r = USBD_IOERROR; 1520 goto ret; 1521 } 1522 break; 1523 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1524 if (len > 0) { 1525 *(u_int8_t *)buf = 0; 1526 totlen = 1; 1527 } 1528 break; 1529 case C(UR_GET_STATUS, UT_READ_DEVICE): 1530 if (len > 1) { 1531 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1532 totlen = 2; 1533 } 1534 break; 1535 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1536 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1537 if (len > 1) { 1538 USETW(((usb_status_t *)buf)->wStatus, 0); 1539 totlen = 2; 1540 } 1541 break; 1542 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1543 if (value >= USB_MAX_DEVICES) { 1544 r = USBD_IOERROR; 1545 goto ret; 1546 } 1547 sc->sc_addr = value; 1548 break; 1549 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1550 if (value != 0 && value != 1) { 1551 r = USBD_IOERROR; 1552 goto ret; 1553 } 1554 sc->sc_conf = value; 1555 break; 1556 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1557 break; 1558 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1559 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1560 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1561 r = USBD_IOERROR; 1562 goto ret; 1563 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1564 break; 1565 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1566 break; 1567 /* Hub requests */ 1568 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1569 break; 1570 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1571 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1572 "port=%d feature=%d\n", 1573 index, value)); 1574 if (index < 1 || index > sc->sc_noport) { 1575 r = USBD_IOERROR; 1576 goto ret; 1577 } 1578 port = OHCI_RH_PORT_STATUS(index); 1579 switch(value) { 1580 case UHF_PORT_ENABLE: 1581 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 1582 break; 1583 case UHF_PORT_SUSPEND: 1584 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 1585 break; 1586 case UHF_PORT_POWER: 1587 OWRITE4(sc, port, UPS_LOW_SPEED); 1588 break; 1589 case UHF_C_PORT_CONNECTION: 1590 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 1591 break; 1592 case UHF_C_PORT_ENABLE: 1593 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 1594 break; 1595 case UHF_C_PORT_SUSPEND: 1596 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 1597 break; 1598 case UHF_C_PORT_OVER_CURRENT: 1599 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 1600 break; 1601 case UHF_C_PORT_RESET: 1602 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 1603 break; 1604 default: 1605 r = USBD_IOERROR; 1606 goto ret; 1607 } 1608 switch(value) { 1609 case UHF_C_PORT_CONNECTION: 1610 case UHF_C_PORT_ENABLE: 1611 case UHF_C_PORT_SUSPEND: 1612 case UHF_C_PORT_OVER_CURRENT: 1613 case UHF_C_PORT_RESET: 1614 /* Enable RHSC interrupt if condition is cleared. */ 1615 if ((OREAD4(sc, port) >> 16) == 0) 1616 ohci_rhsc_able(sc, 1); 1617 break; 1618 default: 1619 break; 1620 } 1621 break; 1622 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1623 if (value != 0) { 1624 r = USBD_IOERROR; 1625 goto ret; 1626 } 1627 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 1628 hubd = ohci_hubd; 1629 hubd.bNbrPorts = sc->sc_noport; 1630 USETW(hubd.wHubCharacteristics, 1631 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 1632 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 1633 /* XXX overcurrent */ 1634 ); 1635 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 1636 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 1637 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1638 hubd.DeviceRemovable[i++] = (u_int8_t)v; 1639 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1640 l = min(len, hubd.bDescLength); 1641 totlen = l; 1642 memcpy(buf, &hubd, l); 1643 break; 1644 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1645 if (len != 4) { 1646 r = USBD_IOERROR; 1647 goto ret; 1648 } 1649 memset(buf, 0, len); /* ? XXX */ 1650 totlen = len; 1651 break; 1652 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1653 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 1654 index)); 1655 if (index < 1 || index > sc->sc_noport) { 1656 r = USBD_IOERROR; 1657 goto ret; 1658 } 1659 if (len != 4) { 1660 r = USBD_IOERROR; 1661 goto ret; 1662 } 1663 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 1664 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 1665 v)); 1666 USETW(ps.wPortStatus, v); 1667 USETW(ps.wPortChange, v >> 16); 1668 l = min(len, sizeof ps); 1669 memcpy(buf, &ps, l); 1670 totlen = l; 1671 break; 1672 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1673 r = USBD_IOERROR; 1674 goto ret; 1675 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1676 break; 1677 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1678 if (index < 1 || index > sc->sc_noport) { 1679 r = USBD_IOERROR; 1680 goto ret; 1681 } 1682 port = OHCI_RH_PORT_STATUS(index); 1683 switch(value) { 1684 case UHF_PORT_ENABLE: 1685 OWRITE4(sc, port, UPS_PORT_ENABLED); 1686 break; 1687 case UHF_PORT_SUSPEND: 1688 OWRITE4(sc, port, UPS_SUSPEND); 1689 break; 1690 case UHF_PORT_RESET: 1691 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 1692 index)); 1693 OWRITE4(sc, port, UPS_RESET); 1694 for (i = 0; i < 10; i++) { 1695 usb_delay_ms(&sc->sc_bus, 10); 1696 if ((OREAD4(sc, port) & UPS_RESET) == 0) 1697 break; 1698 } 1699 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 1700 index, OREAD4(sc, port))); 1701 break; 1702 case UHF_PORT_POWER: 1703 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 1704 "%d\n", index)); 1705 OWRITE4(sc, port, UPS_PORT_POWER); 1706 break; 1707 default: 1708 r = USBD_IOERROR; 1709 goto ret; 1710 } 1711 break; 1712 default: 1713 r = USBD_IOERROR; 1714 goto ret; 1715 } 1716 reqh->actlen = totlen; 1717 r = USBD_NORMAL_COMPLETION; 1718 ret: 1719 reqh->status = r; 1720 reqh->xfercb(reqh); 1721 usb_start_next(reqh->pipe); 1722 return (USBD_IN_PROGRESS); 1723 } 1724 1725 /* Abort a root control request. */ 1726 void 1727 ohci_root_ctrl_abort(reqh) 1728 usbd_request_handle reqh; 1729 { 1730 /* Nothing to do, all transfers are synchronous. */ 1731 } 1732 1733 /* Close the root pipe. */ 1734 void 1735 ohci_root_ctrl_close(pipe) 1736 usbd_pipe_handle pipe; 1737 { 1738 DPRINTF(("ohci_root_ctrl_close\n")); 1739 } 1740 1741 usbd_status 1742 ohci_root_intr_transfer(reqh) 1743 usbd_request_handle reqh; 1744 { 1745 int s; 1746 usbd_status r; 1747 1748 s = splusb(); 1749 r = usb_insert_transfer(reqh); 1750 splx(s); 1751 if (r != USBD_NORMAL_COMPLETION) 1752 return (r); 1753 else 1754 return (ohci_root_intr_start(reqh)); 1755 } 1756 1757 usbd_status 1758 ohci_root_intr_start(reqh) 1759 usbd_request_handle reqh; 1760 { 1761 usbd_pipe_handle pipe = reqh->pipe; 1762 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1763 struct ohci_pipe *upipe = (struct ohci_pipe *)pipe; 1764 usb_dma_t *dmap; 1765 usbd_status r; 1766 int len; 1767 1768 len = reqh->length; 1769 dmap = &upipe->u.intr.datadma; 1770 if (len == 0) 1771 return (USBD_INVAL); /* XXX should it be? */ 1772 1773 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1774 if (r != USBD_NORMAL_COMPLETION) 1775 return (r); 1776 sc->sc_intrreqh = reqh; 1777 1778 return (USBD_IN_PROGRESS); 1779 } 1780 1781 /* Abort a root interrupt request. */ 1782 void 1783 ohci_root_intr_abort(reqh) 1784 usbd_request_handle reqh; 1785 { 1786 /* No need to abort. */ 1787 } 1788 1789 /* Close the root pipe. */ 1790 void 1791 ohci_root_intr_close(pipe) 1792 usbd_pipe_handle pipe; 1793 { 1794 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1795 sc->sc_intrreqh = 0; 1796 1797 DPRINTF(("ohci_root_intr_close\n")); 1798 } 1799 1800 /************************/ 1801 1802 usbd_status 1803 ohci_device_ctrl_transfer(reqh) 1804 usbd_request_handle reqh; 1805 { 1806 int s; 1807 usbd_status r; 1808 1809 s = splusb(); 1810 r = usb_insert_transfer(reqh); 1811 splx(s); 1812 if (r != USBD_NORMAL_COMPLETION) 1813 return (r); 1814 else 1815 return (ohci_device_ctrl_start(reqh)); 1816 } 1817 1818 usbd_status 1819 ohci_device_ctrl_start(reqh) 1820 usbd_request_handle reqh; 1821 { 1822 ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus; 1823 usbd_status r; 1824 1825 if (!reqh->isreq) { 1826 /* XXX panic */ 1827 printf("ohci_device_ctrl_transfer: not a request\n"); 1828 return (USBD_INVAL); 1829 } 1830 1831 r = ohci_device_request(reqh); 1832 if (r != USBD_NORMAL_COMPLETION) 1833 return (r); 1834 1835 if (sc->sc_bus.use_polling) 1836 ohci_waitintr(sc, reqh); 1837 return (USBD_IN_PROGRESS); 1838 } 1839 1840 /* Abort a device control request. */ 1841 void 1842 ohci_device_ctrl_abort(reqh) 1843 usbd_request_handle reqh; 1844 { 1845 /* XXX inactivate */ 1846 usb_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is donw */ 1847 /* XXX call done */ 1848 } 1849 1850 /* Close a device control pipe. */ 1851 void 1852 ohci_device_ctrl_close(pipe) 1853 usbd_pipe_handle pipe; 1854 { 1855 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1856 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1857 ohci_soft_ed_t *sed = opipe->sed; 1858 int s; 1859 1860 s = splusb(); 1861 sed->ed->ed_flags |= LE(OHCI_ED_SKIP); 1862 if ((LE(sed->ed->ed_tailp) & OHCI_TAILMASK) != LE(sed->ed->ed_headp)) 1863 usb_delay_ms(&sc->sc_bus, 2); 1864 ohci_rem_ed(sed, sc->sc_ctrl_head); 1865 splx(s); 1866 ohci_free_std(sc, opipe->tail); 1867 ohci_free_sed(sc, opipe->sed); 1868 /* XXX free other resources */ 1869 } 1870 1871 /************************/ 1872 1873 usbd_status 1874 ohci_device_bulk_transfer(reqh) 1875 usbd_request_handle reqh; 1876 { 1877 int s; 1878 usbd_status r; 1879 1880 s = splusb(); 1881 r = usb_insert_transfer(reqh); 1882 splx(s); 1883 if (r != USBD_NORMAL_COMPLETION) 1884 return (r); 1885 else 1886 return (ohci_device_bulk_start(reqh)); 1887 } 1888 1889 usbd_status 1890 ohci_device_bulk_start(reqh) 1891 usbd_request_handle reqh; 1892 { 1893 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 1894 usbd_device_handle dev = opipe->pipe.device; 1895 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1896 int addr = dev->address; 1897 ohci_soft_td_t *xfer, *tail; 1898 ohci_soft_ed_t *sed; 1899 usb_dma_t *dmap; 1900 usbd_status r; 1901 int s, len, isread; 1902 1903 if (reqh->isreq) { 1904 /* XXX panic */ 1905 printf("ohci_device_bulk_transfer: a request\n"); 1906 return (USBD_INVAL); 1907 } 1908 1909 len = reqh->length; 1910 dmap = &opipe->u.bulk.datadma; 1911 isread = reqh->pipe->endpoint->edesc->bEndpointAddress & UE_IN; 1912 sed = opipe->sed; 1913 1914 opipe->u.bulk.length = len; 1915 1916 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1917 if (r != USBD_NORMAL_COMPLETION) 1918 goto ret1; 1919 1920 tail = ohci_alloc_std(sc); 1921 if (!tail) { 1922 r = USBD_NOMEM; 1923 goto ret2; 1924 } 1925 tail->reqh = 0; 1926 1927 /* Update device address */ 1928 sed->ed->ed_flags = LE( 1929 (LE(sed->ed->ed_flags) & ~OHCI_ED_ADDRMASK) | 1930 OHCI_ED_SET_FA(addr)); 1931 1932 /* Set up data transaction */ 1933 xfer = opipe->tail; 1934 xfer->td->td_flags = LE( 1935 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 1936 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY | 1937 (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0)); 1938 xfer->td->td_cbp = LE(DMAADDR(dmap)); 1939 xfer->nexttd = tail; 1940 xfer->td->td_nexttd = LE(tail->physaddr); 1941 xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1); 1942 xfer->len = len; 1943 xfer->reqh = reqh; 1944 1945 reqh->hcpriv = xfer; 1946 1947 if (!isread) 1948 memcpy(KERNADDR(dmap), reqh->buffer, len); 1949 1950 /* Insert ED in schedule */ 1951 s = splusb(); 1952 ohci_hash_add_td(sc, xfer); 1953 sed->ed->ed_tailp = LE(tail->physaddr); 1954 opipe->tail = tail; 1955 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 1956 if (reqh->timeout && !sc->sc_bus.use_polling) { 1957 usb_timeout(ohci_timeout, reqh, 1958 MS_TO_TICKS(reqh->timeout), reqh->timo_handle); 1959 } 1960 splx(s); 1961 1962 return (USBD_IN_PROGRESS); 1963 1964 ret2: 1965 usb_freemem(sc->sc_dmatag, dmap); 1966 ret1: 1967 return (r); 1968 } 1969 1970 /* Abort a device bulk request. */ 1971 void 1972 ohci_device_bulk_abort(reqh) 1973 usbd_request_handle reqh; 1974 { 1975 #if 0 1976 sed->ed->ed_flags |= LE(OHCI_ED_SKIP); 1977 if ((LE(sed->ed->ed_tailp) & OHCI_TAILMASK) != LE(sed->ed->ed_headp)) 1978 usb_delay_ms(reqh->pipe->device->bus, 2); 1979 #endif 1980 /* XXX inactivate */ 1981 usb_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is done */ 1982 /* XXX call done */ 1983 } 1984 1985 /* Close a device bulk pipe. */ 1986 void 1987 ohci_device_bulk_close(pipe) 1988 usbd_pipe_handle pipe; 1989 { 1990 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1991 usbd_device_handle dev = opipe->pipe.device; 1992 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1993 int s; 1994 1995 s = splusb(); 1996 ohci_rem_ed(opipe->sed, sc->sc_bulk_head); 1997 splx(s); 1998 ohci_free_std(sc, opipe->tail); 1999 ohci_free_sed(sc, opipe->sed); 2000 /* XXX free other resources */ 2001 } 2002 2003 /************************/ 2004 2005 usbd_status 2006 ohci_device_intr_transfer(reqh) 2007 usbd_request_handle reqh; 2008 { 2009 int s; 2010 usbd_status r; 2011 2012 s = splusb(); 2013 r = usb_insert_transfer(reqh); 2014 splx(s); 2015 if (r != USBD_NORMAL_COMPLETION) 2016 return (r); 2017 else 2018 return (ohci_device_intr_start(reqh)); 2019 } 2020 2021 usbd_status 2022 ohci_device_intr_start(reqh) 2023 usbd_request_handle reqh; 2024 { 2025 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 2026 usbd_device_handle dev = opipe->pipe.device; 2027 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2028 ohci_soft_ed_t *sed = opipe->sed; 2029 ohci_soft_td_t *xfer, *tail; 2030 usb_dma_t *dmap; 2031 usbd_status r; 2032 int len; 2033 int s; 2034 2035 DPRINTFN(3, ("ohci_device_intr_transfer: reqh=%p buf=%p len=%d " 2036 "flags=%d priv=%p\n", 2037 reqh, reqh->buffer, reqh->length, reqh->flags, reqh->priv)); 2038 2039 if (reqh->isreq) 2040 panic("ohci_device_intr_transfer: a request\n"); 2041 2042 len = reqh->length; 2043 dmap = &opipe->u.intr.datadma; 2044 if (len == 0) 2045 return (USBD_INVAL); /* XXX should it be? */ 2046 2047 xfer = opipe->tail; 2048 tail = ohci_alloc_std(sc); 2049 if (!tail) { 2050 r = USBD_NOMEM; 2051 goto ret1; 2052 } 2053 tail->reqh = 0; 2054 2055 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 2056 if (r != USBD_NORMAL_COMPLETION) 2057 goto ret2; 2058 2059 xfer->td->td_flags = LE( 2060 OHCI_TD_IN | OHCI_TD_NOCC | 2061 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2062 if (reqh->flags & USBD_SHORT_XFER_OK) 2063 xfer->td->td_flags |= LE(OHCI_TD_R); 2064 xfer->td->td_cbp = LE(DMAADDR(dmap)); 2065 xfer->nexttd = tail; 2066 xfer->td->td_nexttd = LE(tail->physaddr); 2067 xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1); 2068 xfer->len = len; 2069 xfer->reqh = reqh; 2070 2071 reqh->hcpriv = xfer; 2072 2073 #if USB_DEBUG 2074 if (ohcidebug > 5) { 2075 printf("ohci_device_intr_transfer:\n"); 2076 ohci_dump_ed(sed); 2077 ohci_dump_tds(xfer); 2078 } 2079 #endif 2080 2081 /* Insert ED in schedule */ 2082 s = splusb(); 2083 ohci_hash_add_td(sc, xfer); 2084 sed->ed->ed_tailp = LE(tail->physaddr); 2085 opipe->tail = tail; 2086 #if 0 2087 if (reqh->timeout && !sc->sc_bus.use_polling) { 2088 usb_timeout(ohci_timeout, reqh, 2089 MS_TO_TICKS(reqh->timeout), reqh->timo_handle); 2090 } 2091 #endif 2092 sed->ed->ed_flags &= LE(~OHCI_ED_SKIP); 2093 2094 #ifdef USB_DEBUG 2095 if (ohcidebug > 5) { 2096 delay(5000); 2097 printf("ohci_device_intr_transfer: status=%x\n", 2098 OREAD4(sc, OHCI_COMMAND_STATUS)); 2099 ohci_dump_ed(sed); 2100 ohci_dump_tds(xfer); 2101 } 2102 #endif 2103 splx(s); 2104 2105 return (USBD_IN_PROGRESS); 2106 2107 ret2: 2108 ohci_free_std(sc, xfer); 2109 ret1: 2110 return (r); 2111 } 2112 2113 /* Abort a device control request. */ 2114 void 2115 ohci_device_intr_abort(reqh) 2116 usbd_request_handle reqh; 2117 { 2118 /* XXX inactivate */ 2119 usb_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is done */ 2120 if (reqh->pipe->intrreqh == reqh) { 2121 DPRINTF(("ohci_device_intr_abort: remove\n")); 2122 reqh->pipe->intrreqh = 0; 2123 ohci_intr_done((ohci_softc_t *)reqh->pipe->device->bus, reqh); 2124 } 2125 } 2126 2127 /* Close a device interrupt pipe. */ 2128 void 2129 ohci_device_intr_close(pipe) 2130 usbd_pipe_handle pipe; 2131 { 2132 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2133 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2134 int nslots = opipe->u.intr.nslots; 2135 int pos = opipe->u.intr.pos; 2136 int j; 2137 ohci_soft_ed_t *p, *sed = opipe->sed; 2138 int s; 2139 2140 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2141 pipe, nslots, pos)); 2142 s = splusb(); 2143 sed->ed->ed_flags |= LE(OHCI_ED_SKIP); 2144 if ((sed->ed->ed_tailp & LE(OHCI_TAILMASK)) != sed->ed->ed_headp) 2145 usb_delay_ms(&sc->sc_bus, 2); 2146 2147 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2148 ; 2149 if (!p) 2150 panic("ohci_device_intr_close: ED not found\n"); 2151 p->next = sed->next; 2152 p->ed->ed_nexted = sed->ed->ed_nexted; 2153 splx(s); 2154 2155 for (j = 0; j < nslots; j++) 2156 --sc->sc_bws[pos * nslots + j]; 2157 2158 ohci_free_std(sc, opipe->tail); 2159 ohci_free_sed(sc, opipe->sed); 2160 /* XXX free other resources */ 2161 } 2162 2163 usbd_status 2164 ohci_device_setintr(sc, opipe, ival) 2165 ohci_softc_t *sc; 2166 struct ohci_pipe *opipe; 2167 int ival; 2168 { 2169 int i, j, s, best; 2170 u_int npoll, slow, shigh, nslots; 2171 u_int bestbw, bw; 2172 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2173 2174 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2175 if (ival == 0) { 2176 printf("ohci_setintr: 0 interval\n"); 2177 return (USBD_INVAL); 2178 } 2179 2180 npoll = OHCI_NO_INTRS; 2181 while (npoll > ival) 2182 npoll /= 2; 2183 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2184 2185 /* 2186 * We now know which level in the tree the ED must go into. 2187 * Figure out which slot has most bandwidth left over. 2188 * Slots to examine: 2189 * npoll 2190 * 1 0 2191 * 2 1 2 2192 * 4 3 4 5 6 2193 * 8 7 8 9 10 11 12 13 14 2194 * N (N-1) .. (N-1+N-1) 2195 */ 2196 slow = npoll-1; 2197 shigh = slow + npoll; 2198 nslots = OHCI_NO_INTRS / npoll; 2199 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2200 bw = 0; 2201 for (j = 0; j < nslots; j++) 2202 bw += sc->sc_bws[i * nslots + j]; 2203 if (bw < bestbw) { 2204 best = i; 2205 bestbw = bw; 2206 } 2207 } 2208 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2209 best, slow, shigh, bestbw)); 2210 2211 s = splusb(); 2212 hsed = sc->sc_eds[best]; 2213 sed->next = hsed->next; 2214 sed->ed->ed_nexted = hsed->ed->ed_nexted; 2215 hsed->next = sed; 2216 hsed->ed->ed_nexted = LE(sed->physaddr); 2217 splx(s); 2218 2219 for (j = 0; j < nslots; j++) 2220 ++sc->sc_bws[best * nslots + j]; 2221 opipe->u.intr.nslots = nslots; 2222 opipe->u.intr.pos = best; 2223 2224 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 2225 return (USBD_NORMAL_COMPLETION); 2226 } 2227 2228
Indexes created Tue Sep 23 07:09:52 GMT 2025