ohci.c revision 1.273
1 /* $NetBSD: ohci.c,v 1.273 2017/02/04 08:03:40 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2004, 2005, 2012 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) at 9 * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca) 10 * and Matthew R. Green (mrg (at) eterna.com.au). 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * USB Open Host Controller driver. 38 * 39 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 40 * USB spec: http://www.usb.org/developers/docs/ 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.273 2017/02/04 08:03:40 skrll Exp $"); 45 46 #ifdef _KERNEL_OPT 47 #include "opt_usb.h" 48 #endif 49 50 #include <sys/param.h> 51 52 #include <sys/cpu.h> 53 #include <sys/device.h> 54 #include <sys/kernel.h> 55 #include <sys/kmem.h> 56 #include <sys/proc.h> 57 #include <sys/queue.h> 58 #include <sys/select.h> 59 #include <sys/sysctl.h> 60 #include <sys/systm.h> 61 62 #include <machine/endian.h> 63 64 #include <dev/usb/usb.h> 65 #include <dev/usb/usbdi.h> 66 #include <dev/usb/usbdivar.h> 67 #include <dev/usb/usb_mem.h> 68 #include <dev/usb/usb_quirks.h> 69 70 #include <dev/usb/ohcireg.h> 71 #include <dev/usb/ohcivar.h> 72 #include <dev/usb/usbroothub.h> 73 #include <dev/usb/usbhist.h> 74 75 #ifdef USB_DEBUG 76 #ifndef OHCI_DEBUG 77 #define ohcidebug 0 78 #else 79 static int ohcidebug = 10; 80 81 SYSCTL_SETUP(sysctl_hw_ohci_setup, "sysctl hw.ohci setup") 82 { 83 int err; 84 const struct sysctlnode *rnode; 85 const struct sysctlnode *cnode; 86 87 err = sysctl_createv(clog, 0, NULL, &rnode, 88 CTLFLAG_PERMANENT, CTLTYPE_NODE, "ohci", 89 SYSCTL_DESCR("ohci global controls"), 90 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); 91 92 if (err) 93 goto fail; 94 95 /* control debugging printfs */ 96 err = sysctl_createv(clog, 0, &rnode, &cnode, 97 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, 98 "debug", SYSCTL_DESCR("Enable debugging output"), 99 NULL, 0, &ohcidebug, sizeof(ohcidebug), CTL_CREATE, CTL_EOL); 100 if (err) 101 goto fail; 102 103 return; 104 fail: 105 aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err); 106 } 107 108 #endif /* OHCI_DEBUG */ 109 #endif /* USB_DEBUG */ 110 111 #define DPRINTF(FMT,A,B,C,D) USBHIST_LOG(ohcidebug,FMT,A,B,C,D) 112 #define DPRINTFN(N,FMT,A,B,C,D) USBHIST_LOGN(ohcidebug,N,FMT,A,B,C,D) 113 #define OHCIHIST_FUNC() USBHIST_FUNC() 114 #define OHCIHIST_CALLED(name) USBHIST_CALLED(ohcidebug) 115 116 #if BYTE_ORDER == BIG_ENDIAN 117 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 118 #else 119 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 120 #endif 121 122 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 123 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 124 #define HTOO16(val) O16TOH(val) 125 #define HTOO32(val) O32TOH(val) 126 127 struct ohci_pipe; 128 129 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 130 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 131 132 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 133 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 134 Static void ohci_free_std_locked(ohci_softc_t *, ohci_soft_td_t *); 135 136 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 137 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 138 Static void ohci_free_sitd_locked(ohci_softc_t *, 139 ohci_soft_itd_t *); 140 141 Static int ohci_alloc_std_chain(ohci_softc_t *, struct usbd_xfer *, 142 int, int); 143 Static void ohci_free_stds(ohci_softc_t *, struct ohci_xfer *); 144 145 Static void ohci_reset_std_chain(ohci_softc_t *, struct usbd_xfer *, 146 int, int, ohci_soft_td_t *, ohci_soft_td_t **); 147 148 Static usbd_status ohci_open(struct usbd_pipe *); 149 Static void ohci_poll(struct usbd_bus *); 150 Static void ohci_softintr(void *); 151 Static void ohci_rhsc(ohci_softc_t *, struct usbd_xfer *); 152 Static void ohci_rhsc_softint(void *); 153 154 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 155 ohci_soft_ed_t *); 156 157 Static void ohci_rem_ed(ohci_softc_t *, ohci_soft_ed_t *, 158 ohci_soft_ed_t *); 159 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 160 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 161 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 162 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 163 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 164 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 165 166 Static usbd_status ohci_setup_isoc(struct usbd_pipe *); 167 Static void ohci_device_isoc_enter(struct usbd_xfer *); 168 169 Static struct usbd_xfer * 170 ohci_allocx(struct usbd_bus *, unsigned int); 171 Static void ohci_freex(struct usbd_bus *, struct usbd_xfer *); 172 Static void ohci_get_lock(struct usbd_bus *, kmutex_t **); 173 Static int ohci_roothub_ctrl(struct usbd_bus *, 174 usb_device_request_t *, void *, int); 175 176 Static usbd_status ohci_root_intr_transfer(struct usbd_xfer *); 177 Static usbd_status ohci_root_intr_start(struct usbd_xfer *); 178 Static void ohci_root_intr_abort(struct usbd_xfer *); 179 Static void ohci_root_intr_close(struct usbd_pipe *); 180 Static void ohci_root_intr_done(struct usbd_xfer *); 181 182 Static int ohci_device_ctrl_init(struct usbd_xfer *); 183 Static void ohci_device_ctrl_fini(struct usbd_xfer *); 184 Static usbd_status ohci_device_ctrl_transfer(struct usbd_xfer *); 185 Static usbd_status ohci_device_ctrl_start(struct usbd_xfer *); 186 Static void ohci_device_ctrl_abort(struct usbd_xfer *); 187 Static void ohci_device_ctrl_close(struct usbd_pipe *); 188 Static void ohci_device_ctrl_done(struct usbd_xfer *); 189 190 Static int ohci_device_bulk_init(struct usbd_xfer *); 191 Static void ohci_device_bulk_fini(struct usbd_xfer *); 192 Static usbd_status ohci_device_bulk_transfer(struct usbd_xfer *); 193 Static usbd_status ohci_device_bulk_start(struct usbd_xfer *); 194 Static void ohci_device_bulk_abort(struct usbd_xfer *); 195 Static void ohci_device_bulk_close(struct usbd_pipe *); 196 Static void ohci_device_bulk_done(struct usbd_xfer *); 197 198 Static int ohci_device_intr_init(struct usbd_xfer *); 199 Static void ohci_device_intr_fini(struct usbd_xfer *); 200 Static usbd_status ohci_device_intr_transfer(struct usbd_xfer *); 201 Static usbd_status ohci_device_intr_start(struct usbd_xfer *); 202 Static void ohci_device_intr_abort(struct usbd_xfer *); 203 Static void ohci_device_intr_close(struct usbd_pipe *); 204 Static void ohci_device_intr_done(struct usbd_xfer *); 205 206 Static int ohci_device_isoc_init(struct usbd_xfer *); 207 Static void ohci_device_isoc_fini(struct usbd_xfer *); 208 Static usbd_status ohci_device_isoc_transfer(struct usbd_xfer *); 209 Static void ohci_device_isoc_abort(struct usbd_xfer *); 210 Static void ohci_device_isoc_close(struct usbd_pipe *); 211 Static void ohci_device_isoc_done(struct usbd_xfer *); 212 213 Static usbd_status ohci_device_setintr(ohci_softc_t *, 214 struct ohci_pipe *, int); 215 216 Static void ohci_timeout(void *); 217 Static void ohci_timeout_task(void *); 218 Static void ohci_rhsc_enable(void *); 219 220 Static void ohci_close_pipe(struct usbd_pipe *, ohci_soft_ed_t *); 221 Static void ohci_abort_xfer(struct usbd_xfer *, usbd_status); 222 223 Static void ohci_device_clear_toggle(struct usbd_pipe *); 224 Static void ohci_noop(struct usbd_pipe *); 225 226 #ifdef OHCI_DEBUG 227 Static void ohci_dumpregs(ohci_softc_t *); 228 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 229 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 230 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 231 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 232 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 233 #endif 234 235 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 236 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 237 #define OWRITE1(sc, r, x) \ 238 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 239 #define OWRITE2(sc, r, x) \ 240 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 241 #define OWRITE4(sc, r, x) \ 242 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 243 244 static __inline uint32_t 245 OREAD4(ohci_softc_t *sc, bus_size_t r) 246 { 247 248 OBARR(sc); 249 return bus_space_read_4(sc->iot, sc->ioh, r); 250 } 251 252 /* Reverse the bits in a value 0 .. 31 */ 253 Static uint8_t revbits[OHCI_NO_INTRS] = 254 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 255 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 256 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 257 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 258 259 struct ohci_pipe { 260 struct usbd_pipe pipe; 261 ohci_soft_ed_t *sed; 262 union { 263 ohci_soft_td_t *td; 264 ohci_soft_itd_t *itd; 265 } tail; 266 /* Info needed for different pipe kinds. */ 267 union { 268 /* Control pipe */ 269 struct { 270 usb_dma_t reqdma; 271 } ctrl; 272 /* Interrupt pipe */ 273 struct { 274 int nslots; 275 int pos; 276 } intr; 277 /* Isochronous pipe */ 278 struct isoc { 279 int next, inuse; 280 } isoc; 281 }; 282 }; 283 284 Static const struct usbd_bus_methods ohci_bus_methods = { 285 .ubm_open = ohci_open, 286 .ubm_softint = ohci_softintr, 287 .ubm_dopoll = ohci_poll, 288 .ubm_allocx = ohci_allocx, 289 .ubm_freex = ohci_freex, 290 .ubm_getlock = ohci_get_lock, 291 .ubm_rhctrl = ohci_roothub_ctrl, 292 }; 293 294 Static const struct usbd_pipe_methods ohci_root_intr_methods = { 295 .upm_transfer = ohci_root_intr_transfer, 296 .upm_start = ohci_root_intr_start, 297 .upm_abort = ohci_root_intr_abort, 298 .upm_close = ohci_root_intr_close, 299 .upm_cleartoggle = ohci_noop, 300 .upm_done = ohci_root_intr_done, 301 }; 302 303 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = { 304 .upm_init = ohci_device_ctrl_init, 305 .upm_fini = ohci_device_ctrl_fini, 306 .upm_transfer = ohci_device_ctrl_transfer, 307 .upm_start = ohci_device_ctrl_start, 308 .upm_abort = ohci_device_ctrl_abort, 309 .upm_close = ohci_device_ctrl_close, 310 .upm_cleartoggle = ohci_noop, 311 .upm_done = ohci_device_ctrl_done, 312 }; 313 314 Static const struct usbd_pipe_methods ohci_device_intr_methods = { 315 .upm_init = ohci_device_intr_init, 316 .upm_fini = ohci_device_intr_fini, 317 .upm_transfer = ohci_device_intr_transfer, 318 .upm_start = ohci_device_intr_start, 319 .upm_abort = ohci_device_intr_abort, 320 .upm_close = ohci_device_intr_close, 321 .upm_cleartoggle = ohci_device_clear_toggle, 322 .upm_done = ohci_device_intr_done, 323 }; 324 325 Static const struct usbd_pipe_methods ohci_device_bulk_methods = { 326 .upm_init = ohci_device_bulk_init, 327 .upm_fini = ohci_device_bulk_fini, 328 .upm_transfer = ohci_device_bulk_transfer, 329 .upm_start = ohci_device_bulk_start, 330 .upm_abort = ohci_device_bulk_abort, 331 .upm_close = ohci_device_bulk_close, 332 .upm_cleartoggle = ohci_device_clear_toggle, 333 .upm_done = ohci_device_bulk_done, 334 }; 335 336 Static const struct usbd_pipe_methods ohci_device_isoc_methods = { 337 .upm_init = ohci_device_isoc_init, 338 .upm_fini = ohci_device_isoc_fini, 339 .upm_transfer = ohci_device_isoc_transfer, 340 .upm_abort = ohci_device_isoc_abort, 341 .upm_close = ohci_device_isoc_close, 342 .upm_cleartoggle = ohci_noop, 343 .upm_done = ohci_device_isoc_done, 344 }; 345 346 int 347 ohci_activate(device_t self, enum devact act) 348 { 349 struct ohci_softc *sc = device_private(self); 350 351 switch (act) { 352 case DVACT_DEACTIVATE: 353 sc->sc_dying = 1; 354 return 0; 355 default: 356 return EOPNOTSUPP; 357 } 358 } 359 360 void 361 ohci_childdet(device_t self, device_t child) 362 { 363 struct ohci_softc *sc = device_private(self); 364 365 KASSERT(sc->sc_child == child); 366 sc->sc_child = NULL; 367 } 368 369 int 370 ohci_detach(struct ohci_softc *sc, int flags) 371 { 372 int rv = 0; 373 374 if (sc->sc_child != NULL) 375 rv = config_detach(sc->sc_child, flags); 376 377 if (rv != 0) 378 return rv; 379 380 callout_halt(&sc->sc_tmo_rhsc, &sc->sc_lock); 381 382 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 383 callout_destroy(&sc->sc_tmo_rhsc); 384 385 softint_disestablish(sc->sc_rhsc_si); 386 387 cv_destroy(&sc->sc_softwake_cv); 388 389 mutex_destroy(&sc->sc_lock); 390 mutex_destroy(&sc->sc_intr_lock); 391 392 if (sc->sc_hcca != NULL) 393 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 394 pool_cache_destroy(sc->sc_xferpool); 395 396 return rv; 397 } 398 399 ohci_soft_ed_t * 400 ohci_alloc_sed(ohci_softc_t *sc) 401 { 402 ohci_soft_ed_t *sed; 403 usbd_status err; 404 int i, offs; 405 usb_dma_t dma; 406 407 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 408 409 mutex_enter(&sc->sc_lock); 410 if (sc->sc_freeeds == NULL) { 411 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 412 mutex_exit(&sc->sc_lock); 413 414 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 415 OHCI_ED_ALIGN, &dma); 416 if (err) 417 return 0; 418 419 mutex_enter(&sc->sc_lock); 420 for (i = 0; i < OHCI_SED_CHUNK; i++) { 421 offs = i * OHCI_SED_SIZE; 422 sed = KERNADDR(&dma, offs); 423 sed->physaddr = DMAADDR(&dma, offs); 424 sed->dma = dma; 425 sed->offs = offs; 426 sed->next = sc->sc_freeeds; 427 sc->sc_freeeds = sed; 428 } 429 } 430 sed = sc->sc_freeeds; 431 sc->sc_freeeds = sed->next; 432 mutex_exit(&sc->sc_lock); 433 434 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 435 sed->next = 0; 436 return sed; 437 } 438 439 static inline void 440 ohci_free_sed_locked(ohci_softc_t *sc, ohci_soft_ed_t *sed) 441 { 442 443 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 444 445 sed->next = sc->sc_freeeds; 446 sc->sc_freeeds = sed; 447 } 448 449 void 450 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 451 { 452 453 mutex_enter(&sc->sc_lock); 454 ohci_free_sed_locked(sc, sed); 455 mutex_exit(&sc->sc_lock); 456 } 457 458 ohci_soft_td_t * 459 ohci_alloc_std(ohci_softc_t *sc) 460 { 461 ohci_soft_td_t *std; 462 usbd_status err; 463 int i, offs; 464 usb_dma_t dma; 465 466 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 467 468 mutex_enter(&sc->sc_lock); 469 if (sc->sc_freetds == NULL) { 470 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 471 mutex_exit(&sc->sc_lock); 472 473 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 474 OHCI_TD_ALIGN, &dma); 475 if (err) 476 return NULL; 477 478 mutex_enter(&sc->sc_lock); 479 for (i = 0; i < OHCI_STD_CHUNK; i++) { 480 offs = i * OHCI_STD_SIZE; 481 std = KERNADDR(&dma, offs); 482 std->physaddr = DMAADDR(&dma, offs); 483 std->dma = dma; 484 std->offs = offs; 485 std->nexttd = sc->sc_freetds; 486 sc->sc_freetds = std; 487 } 488 } 489 490 std = sc->sc_freetds; 491 sc->sc_freetds = std->nexttd; 492 mutex_exit(&sc->sc_lock); 493 494 memset(&std->td, 0, sizeof(ohci_td_t)); 495 std->nexttd = NULL; 496 std->xfer = NULL; 497 498 return std; 499 } 500 501 void 502 ohci_free_std_locked(ohci_softc_t *sc, ohci_soft_td_t *std) 503 { 504 505 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 506 507 std->nexttd = sc->sc_freetds; 508 sc->sc_freetds = std; 509 } 510 511 void 512 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 513 { 514 515 mutex_enter(&sc->sc_lock); 516 ohci_free_std_locked(sc, std); 517 mutex_exit(&sc->sc_lock); 518 } 519 520 Static int 521 ohci_alloc_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, int length, int rd) 522 { 523 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 524 uint16_t flags = xfer->ux_flags; 525 526 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 527 528 DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d", 529 xfer->ux_pipe->up_dev->ud_addr, 530 UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress), 531 length, xfer->ux_pipe->up_dev->ud_speed); 532 533 ASSERT_SLEEPABLE(); 534 KASSERT(length != 0 || (!rd && (flags & USBD_FORCE_SHORT_XFER))); 535 536 size_t nstd = (!rd && (flags & USBD_FORCE_SHORT_XFER)) ? 1 : 0; 537 nstd += ((length + OHCI_PAGE_SIZE - 1) / OHCI_PAGE_SIZE); 538 ox->ox_stds = kmem_zalloc(sizeof(ohci_soft_td_t *) * nstd, 539 KM_SLEEP); 540 ox->ox_nstd = nstd; 541 542 DPRINTFN(8, "xfer %p nstd %d", xfer, nstd, 0, 0); 543 544 for (size_t j = 0; j < ox->ox_nstd;) { 545 ohci_soft_td_t *cur = ohci_alloc_std(sc); 546 if (cur == NULL) 547 goto nomem; 548 549 ox->ox_stds[j++] = cur; 550 cur->xfer = xfer; 551 cur->flags = 0; 552 } 553 554 return 0; 555 556 nomem: 557 ohci_free_stds(sc, ox); 558 kmem_free(ox->ox_stds, sizeof(ohci_soft_td_t *) * nstd); 559 560 return ENOMEM; 561 } 562 563 Static void 564 ohci_free_stds(ohci_softc_t *sc, struct ohci_xfer *ox) 565 { 566 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 567 DPRINTF("ox=%p", ox, 0, 0, 0); 568 569 mutex_enter(&sc->sc_lock); 570 for (size_t i = 0; i < ox->ox_nstd; i++) { 571 ohci_soft_td_t *std = ox->ox_stds[i]; 572 if (std == NULL) 573 break; 574 ohci_free_std_locked(sc, std); 575 } 576 mutex_exit(&sc->sc_lock); 577 } 578 579 void 580 ohci_reset_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, 581 int alen, int rd, ohci_soft_td_t *sp, ohci_soft_td_t **ep) 582 { 583 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 584 ohci_soft_td_t *next, *cur; 585 int len, curlen; 586 usb_dma_t *dma = &xfer->ux_dmabuf; 587 uint16_t flags = xfer->ux_flags; 588 589 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 590 DPRINTF("start len=%d", alen, 0, 0, 0); 591 592 KASSERT(mutex_owned(&sc->sc_lock)); 593 594 DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d", 595 xfer->ux_pipe->up_dev->ud_addr, 596 UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress), 597 alen, xfer->ux_pipe->up_dev->ud_speed); 598 599 KASSERT(sp); 600 601 int mps = UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize); 602 603 /* 604 * Assign next for the len == 0 case where we don't go through the 605 * main loop. 606 */ 607 len = alen; 608 cur = next = sp; 609 610 usb_syncmem(dma, 0, len, 611 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 612 const uint32_t tdflags = HTOO32( 613 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 614 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 615 616 size_t curoffs = 0; 617 for (size_t j = 1; len != 0;) { 618 if (j == ox->ox_nstd) 619 next = NULL; 620 else 621 next = ox->ox_stds[j++]; 622 KASSERT(next != cur); 623 624 curlen = 0; 625 const ohci_physaddr_t sdataphys = DMAADDR(dma, curoffs); 626 ohci_physaddr_t edataphys = DMAADDR(dma, curoffs + len - 1); 627 628 const ohci_physaddr_t sphyspg = OHCI_PAGE(sdataphys); 629 ohci_physaddr_t ephyspg = OHCI_PAGE(edataphys); 630 /* 631 * The OHCI hardware can handle at most one page 632 * crossing per TD 633 */ 634 curlen = len; 635 if (sphyspg != ephyspg && 636 sphyspg + OHCI_PAGE_SIZE != ephyspg) { 637 /* must use multiple TDs, fill as much as possible. */ 638 curlen = 2 * OHCI_PAGE_SIZE - 639 OHCI_PAGE_OFFSET(sdataphys); 640 /* the length must be a multiple of the max size */ 641 curlen -= curlen % mps; 642 edataphys = DMAADDR(dma, curoffs + curlen - 1); 643 } 644 KASSERT(curlen != 0); 645 DPRINTFN(4, "sdataphys=0x%08x edataphys=0x%08x " 646 "len=%d curlen=%d", sdataphys, edataphys, len, curlen); 647 648 cur->td.td_flags = tdflags; 649 cur->td.td_cbp = HTOO32(sdataphys); 650 cur->td.td_be = HTOO32(edataphys); 651 cur->td.td_nexttd = (next != NULL) ? HTOO32(next->physaddr) : 0; 652 cur->nexttd = next; 653 cur->len = curlen; 654 cur->flags = OHCI_ADD_LEN; 655 cur->xfer = xfer; 656 ohci_hash_add_td(sc, cur); 657 658 curoffs += curlen; 659 len -= curlen; 660 661 if (len != 0) { 662 KASSERT(next != NULL); 663 DPRINTFN(10, "extend chain", 0, 0, 0, 0); 664 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 665 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 666 667 cur = next; 668 } 669 } 670 cur->td.td_flags |= 671 HTOO32(xfer->ux_flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0); 672 673 if (!rd && 674 (flags & USBD_FORCE_SHORT_XFER) && 675 alen % mps == 0) { 676 /* We're adding a ZLP so sync the previous TD */ 677 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 678 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 679 680 /* Force a 0 length transfer at the end. */ 681 682 KASSERT(next != NULL); 683 cur = next; 684 685 cur->td.td_flags = tdflags; 686 cur->td.td_cbp = 0; /* indicate 0 length packet */ 687 cur->td.td_nexttd = 0; 688 cur->td.td_be = ~0; 689 cur->nexttd = NULL; 690 cur->len = 0; 691 cur->flags = 0; 692 cur->xfer = xfer; 693 ohci_hash_add_td(sc, cur); 694 695 DPRINTFN(2, "add 0 xfer", 0, 0, 0, 0); 696 } 697 698 /* Last TD gets usb_syncmem'ed by caller */ 699 *ep = cur; 700 } 701 702 ohci_soft_itd_t * 703 ohci_alloc_sitd(ohci_softc_t *sc) 704 { 705 ohci_soft_itd_t *sitd; 706 usbd_status err; 707 int i, offs; 708 usb_dma_t dma; 709 710 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 711 712 mutex_enter(&sc->sc_lock); 713 if (sc->sc_freeitds == NULL) { 714 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 715 mutex_exit(&sc->sc_lock); 716 717 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 718 OHCI_ITD_ALIGN, &dma); 719 if (err) 720 return NULL; 721 mutex_enter(&sc->sc_lock); 722 for (i = 0; i < OHCI_SITD_CHUNK; i++) { 723 offs = i * OHCI_SITD_SIZE; 724 sitd = KERNADDR(&dma, offs); 725 sitd->physaddr = DMAADDR(&dma, offs); 726 sitd->dma = dma; 727 sitd->offs = offs; 728 sitd->nextitd = sc->sc_freeitds; 729 sc->sc_freeitds = sitd; 730 } 731 } 732 733 sitd = sc->sc_freeitds; 734 sc->sc_freeitds = sitd->nextitd; 735 mutex_exit(&sc->sc_lock); 736 737 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 738 sitd->nextitd = NULL; 739 sitd->xfer = NULL; 740 741 #ifdef DIAGNOSTIC 742 sitd->isdone = true; 743 #endif 744 745 return sitd; 746 } 747 748 Static void 749 ohci_free_sitd_locked(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 750 { 751 752 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 753 DPRINTFN(10, "sitd=%p", sitd, 0, 0, 0); 754 755 KASSERT(sitd->isdone); 756 #ifdef DIAGNOSTIC 757 /* Warn double free */ 758 sitd->isdone = false; 759 #endif 760 761 sitd->nextitd = sc->sc_freeitds; 762 sc->sc_freeitds = sitd; 763 } 764 765 void 766 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 767 { 768 769 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 770 771 mutex_enter(&sc->sc_lock); 772 ohci_free_sitd_locked(sc, sitd); 773 mutex_exit(&sc->sc_lock); 774 } 775 776 int 777 ohci_init(ohci_softc_t *sc) 778 { 779 ohci_soft_ed_t *sed, *psed; 780 usbd_status err; 781 int i; 782 uint32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca /*, descb */; 783 784 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 785 786 aprint_normal_dev(sc->sc_dev, ""); 787 788 sc->sc_hcca = NULL; 789 callout_init(&sc->sc_tmo_rhsc, CALLOUT_MPSAFE); 790 791 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 792 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_USB); 793 cv_init(&sc->sc_softwake_cv, "ohciab"); 794 795 sc->sc_rhsc_si = softint_establish(SOFTINT_USB | SOFTINT_MPSAFE, 796 ohci_rhsc_softint, sc); 797 798 for (i = 0; i < OHCI_HASH_SIZE; i++) 799 LIST_INIT(&sc->sc_hash_tds[i]); 800 for (i = 0; i < OHCI_HASH_SIZE; i++) 801 LIST_INIT(&sc->sc_hash_itds[i]); 802 803 sc->sc_xferpool = pool_cache_init(sizeof(struct ohci_xfer), 0, 0, 0, 804 "ohcixfer", NULL, IPL_USB, NULL, NULL, NULL); 805 806 rev = OREAD4(sc, OHCI_REVISION); 807 aprint_normal("OHCI version %d.%d%s\n", 808 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 809 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 810 811 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 812 aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n"); 813 sc->sc_bus.ub_revision = USBREV_UNKNOWN; 814 return -1; 815 } 816 sc->sc_bus.ub_revision = USBREV_1_0; 817 sc->sc_bus.ub_usedma = true; 818 819 /* XXX determine alignment by R/W */ 820 /* Allocate the HCCA area. */ 821 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 822 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 823 if (err) { 824 sc->sc_hcca = NULL; 825 return err; 826 } 827 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 828 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 829 830 sc->sc_eintrs = OHCI_NORMAL_INTRS; 831 832 /* Allocate dummy ED that starts the control list. */ 833 sc->sc_ctrl_head = ohci_alloc_sed(sc); 834 if (sc->sc_ctrl_head == NULL) { 835 err = ENOMEM; 836 goto bad1; 837 } 838 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 839 840 /* Allocate dummy ED that starts the bulk list. */ 841 sc->sc_bulk_head = ohci_alloc_sed(sc); 842 if (sc->sc_bulk_head == NULL) { 843 err = ENOMEM; 844 goto bad2; 845 } 846 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 847 usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs, 848 sizeof(sc->sc_bulk_head->ed), 849 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 850 851 /* Allocate dummy ED that starts the isochronous list. */ 852 sc->sc_isoc_head = ohci_alloc_sed(sc); 853 if (sc->sc_isoc_head == NULL) { 854 err = ENOMEM; 855 goto bad3; 856 } 857 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 858 usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs, 859 sizeof(sc->sc_isoc_head->ed), 860 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 861 862 /* Allocate all the dummy EDs that make up the interrupt tree. */ 863 for (i = 0; i < OHCI_NO_EDS; i++) { 864 sed = ohci_alloc_sed(sc); 865 if (sed == NULL) { 866 while (--i >= 0) 867 ohci_free_sed(sc, sc->sc_eds[i]); 868 err = ENOMEM; 869 goto bad4; 870 } 871 /* All ED fields are set to 0. */ 872 sc->sc_eds[i] = sed; 873 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 874 if (i != 0) 875 psed = sc->sc_eds[(i-1) / 2]; 876 else 877 psed= sc->sc_isoc_head; 878 sed->next = psed; 879 sed->ed.ed_nexted = HTOO32(psed->physaddr); 880 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 881 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 882 } 883 /* 884 * Fill HCCA interrupt table. The bit reversal is to get 885 * the tree set up properly to spread the interrupts. 886 */ 887 for (i = 0; i < OHCI_NO_INTRS; i++) 888 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 889 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 890 usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE, 891 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 892 893 #ifdef OHCI_DEBUG 894 DPRINTFN(15, "--- dump start ---", 0, 0, 0 ,0); 895 if (ohcidebug >= 15) { 896 for (i = 0; i < OHCI_NO_EDS; i++) { 897 DPRINTFN(15, "ed#%d ", i, 0, 0, 0); 898 ohci_dump_ed(sc, sc->sc_eds[i]); 899 } 900 DPRINTFN(15, "iso", 0, 0, 0 ,0); 901 ohci_dump_ed(sc, sc->sc_isoc_head); 902 } 903 DPRINTFN(15, "--- dump end ---", 0, 0, 0 ,0); 904 #endif 905 906 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 907 ctl = OREAD4(sc, OHCI_CONTROL); 908 rwc = ctl & OHCI_RWC; 909 fm = OREAD4(sc, OHCI_FM_INTERVAL); 910 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 911 /* descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); */ 912 913 /* Determine in what context we are running. */ 914 if (ctl & OHCI_IR) { 915 /* SMM active, request change */ 916 DPRINTF("SMM active, request owner change", 0, 0, 0, 0); 917 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 918 (OHCI_OC | OHCI_MIE)) 919 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 920 s = OREAD4(sc, OHCI_COMMAND_STATUS); 921 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 922 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 923 usb_delay_ms(&sc->sc_bus, 1); 924 ctl = OREAD4(sc, OHCI_CONTROL); 925 } 926 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 927 if ((ctl & OHCI_IR) == 0) { 928 aprint_error_dev(sc->sc_dev, 929 "SMM does not respond, resetting\n"); 930 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 931 goto reset; 932 } 933 #if 0 934 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 935 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 936 /* BIOS started controller. */ 937 DPRINTF("BIOS active", 0, 0, 0, 0); 938 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 939 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 940 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 941 } 942 #endif 943 } else { 944 DPRINTF("cold started", 0 ,0 ,0 ,0); 945 reset: 946 /* Controller was cold started. */ 947 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 948 } 949 950 /* 951 * This reset should not be necessary according to the OHCI spec, but 952 * without it some controllers do not start. 953 */ 954 DPRINTF("sc %p: resetting", sc, 0, 0, 0); 955 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 956 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 957 958 /* We now own the host controller and the bus has been reset. */ 959 960 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 961 /* Nominal time for a reset is 10 us. */ 962 for (i = 0; i < 10; i++) { 963 delay(10); 964 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 965 if (!hcr) 966 break; 967 } 968 if (hcr) { 969 aprint_error_dev(sc->sc_dev, "reset timeout\n"); 970 err = EIO; 971 goto bad5; 972 } 973 #ifdef OHCI_DEBUG 974 if (ohcidebug >= 15) 975 ohci_dumpregs(sc); 976 #endif 977 978 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 979 980 /* Set up HC registers. */ 981 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 982 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 983 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 984 /* disable all interrupts and then switch on all desired interrupts */ 985 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 986 /* switch on desired functional features */ 987 ctl = OREAD4(sc, OHCI_CONTROL); 988 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 989 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 990 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 991 /* And finally start it! */ 992 OWRITE4(sc, OHCI_CONTROL, ctl); 993 994 /* 995 * The controller is now OPERATIONAL. Set a some final 996 * registers that should be set earlier, but that the 997 * controller ignores when in the SUSPEND state. 998 */ 999 ival = OHCI_GET_IVAL(fm); 1000 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 1001 fm |= OHCI_FSMPS(ival) | ival; 1002 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 1003 per = OHCI_PERIODIC(ival); /* 90% periodic */ 1004 OWRITE4(sc, OHCI_PERIODIC_START, per); 1005 1006 if (sc->sc_flags & OHCIF_SUPERIO) { 1007 /* no overcurrent protection */ 1008 desca |= OHCI_NOCP; 1009 /* 1010 * Clear NoPowerSwitching and PowerOnToPowerGoodTime meaning 1011 * that 1012 * - ports are always power switched 1013 * - don't wait for powered root hub port 1014 */ 1015 desca &= ~(__SHIFTIN(0xff, OHCI_POTPGT_MASK) | OHCI_NPS); 1016 } 1017 1018 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 1019 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 1020 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 1021 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 1022 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 1023 1024 /* 1025 * The AMD756 requires a delay before re-reading the register, 1026 * otherwise it will occasionally report 0 ports. 1027 */ 1028 sc->sc_noport = 0; 1029 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 1030 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 1031 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 1032 } 1033 1034 #ifdef OHCI_DEBUG 1035 if (ohcidebug >= 5) 1036 ohci_dumpregs(sc); 1037 #endif 1038 1039 /* Set up the bus struct. */ 1040 sc->sc_bus.ub_methods = &ohci_bus_methods; 1041 sc->sc_bus.ub_pipesize = sizeof(struct ohci_pipe); 1042 1043 sc->sc_control = sc->sc_intre = 0; 1044 1045 /* Finally, turn on interrupts. */ 1046 DPRINTF("enabling %#x", sc->sc_eintrs | OHCI_MIE, 0, 0, 0); 1047 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 1048 1049 return 0; 1050 1051 bad5: 1052 for (i = 0; i < OHCI_NO_EDS; i++) 1053 ohci_free_sed(sc, sc->sc_eds[i]); 1054 bad4: 1055 ohci_free_sed(sc, sc->sc_isoc_head); 1056 bad3: 1057 ohci_free_sed(sc, sc->sc_bulk_head); 1058 bad2: 1059 ohci_free_sed(sc, sc->sc_ctrl_head); 1060 bad1: 1061 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 1062 sc->sc_hcca = NULL; 1063 return err; 1064 } 1065 1066 struct usbd_xfer * 1067 ohci_allocx(struct usbd_bus *bus, unsigned int nframes) 1068 { 1069 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1070 struct usbd_xfer *xfer; 1071 1072 xfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT); 1073 if (xfer != NULL) { 1074 memset(xfer, 0, sizeof(struct ohci_xfer)); 1075 #ifdef DIAGNOSTIC 1076 xfer->ux_state = XFER_BUSY; 1077 #endif 1078 } 1079 return xfer; 1080 } 1081 1082 void 1083 ohci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 1084 { 1085 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1086 1087 KASSERTMSG(xfer->ux_state == XFER_BUSY, 1088 "xfer=%p not busy, 0x%08x\n", xfer, xfer->ux_state); 1089 #ifdef DIAGNOSTIC 1090 xfer->ux_state = XFER_FREE; 1091 #endif 1092 pool_cache_put(sc->sc_xferpool, xfer); 1093 } 1094 1095 Static void 1096 ohci_get_lock(struct usbd_bus *bus, kmutex_t **lock) 1097 { 1098 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1099 1100 *lock = &sc->sc_lock; 1101 } 1102 1103 /* 1104 * Shut down the controller when the system is going down. 1105 */ 1106 bool 1107 ohci_shutdown(device_t self, int flags) 1108 { 1109 ohci_softc_t *sc = device_private(self); 1110 1111 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1112 1113 DPRINTF("stopping the HC", 0, 0, 0, 0); 1114 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1115 return true; 1116 } 1117 1118 bool 1119 ohci_resume(device_t dv, const pmf_qual_t *qual) 1120 { 1121 ohci_softc_t *sc = device_private(dv); 1122 uint32_t ctl; 1123 1124 mutex_spin_enter(&sc->sc_intr_lock); 1125 sc->sc_bus.ub_usepolling++; 1126 mutex_spin_exit(&sc->sc_intr_lock); 1127 1128 /* Some broken BIOSes do not recover these values */ 1129 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1130 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, 1131 sc->sc_ctrl_head->physaddr); 1132 OWRITE4(sc, OHCI_BULK_HEAD_ED, 1133 sc->sc_bulk_head->physaddr); 1134 if (sc->sc_intre) 1135 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre & 1136 (OHCI_ALL_INTRS | OHCI_MIE)); 1137 if (sc->sc_control) 1138 ctl = sc->sc_control; 1139 else 1140 ctl = OREAD4(sc, OHCI_CONTROL); 1141 ctl |= OHCI_HCFS_RESUME; 1142 OWRITE4(sc, OHCI_CONTROL, ctl); 1143 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1144 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1145 OWRITE4(sc, OHCI_CONTROL, ctl); 1146 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1147 sc->sc_control = sc->sc_intre = 0; 1148 1149 mutex_spin_enter(&sc->sc_intr_lock); 1150 sc->sc_bus.ub_usepolling--; 1151 mutex_spin_exit(&sc->sc_intr_lock); 1152 1153 return true; 1154 } 1155 1156 bool 1157 ohci_suspend(device_t dv, const pmf_qual_t *qual) 1158 { 1159 ohci_softc_t *sc = device_private(dv); 1160 uint32_t ctl; 1161 1162 mutex_spin_enter(&sc->sc_intr_lock); 1163 sc->sc_bus.ub_usepolling++; 1164 mutex_spin_exit(&sc->sc_intr_lock); 1165 1166 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1167 if (sc->sc_control == 0) { 1168 /* 1169 * Preserve register values, in case that BIOS 1170 * does not recover them. 1171 */ 1172 sc->sc_control = ctl; 1173 sc->sc_intre = OREAD4(sc, 1174 OHCI_INTERRUPT_ENABLE); 1175 } 1176 ctl |= OHCI_HCFS_SUSPEND; 1177 OWRITE4(sc, OHCI_CONTROL, ctl); 1178 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1179 1180 mutex_spin_enter(&sc->sc_intr_lock); 1181 sc->sc_bus.ub_usepolling--; 1182 mutex_spin_exit(&sc->sc_intr_lock); 1183 1184 return true; 1185 } 1186 1187 #ifdef OHCI_DEBUG 1188 void 1189 ohci_dumpregs(ohci_softc_t *sc) 1190 { 1191 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1192 1193 DPRINTF("rev=0x%08x control=0x%08x command=0x%08x", 1194 OREAD4(sc, OHCI_REVISION), 1195 OREAD4(sc, OHCI_CONTROL), 1196 OREAD4(sc, OHCI_COMMAND_STATUS), 0); 1197 DPRINTF(" intrstat=0x%08x intre=0x%08x intrd=0x%08x", 1198 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1199 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1200 OREAD4(sc, OHCI_INTERRUPT_DISABLE), 0); 1201 DPRINTF(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x", 1202 OREAD4(sc, OHCI_HCCA), 1203 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1204 OREAD4(sc, OHCI_CONTROL_HEAD_ED), 0); 1205 DPRINTF(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x", 1206 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1207 OREAD4(sc, OHCI_BULK_HEAD_ED), 1208 OREAD4(sc, OHCI_BULK_CURRENT_ED) ,0); 1209 DPRINTF(" done=0x%08x fmival=0x%08x fmrem=0x%08x", 1210 OREAD4(sc, OHCI_DONE_HEAD), 1211 OREAD4(sc, OHCI_FM_INTERVAL), 1212 OREAD4(sc, OHCI_FM_REMAINING), 0); 1213 DPRINTF(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x", 1214 OREAD4(sc, OHCI_FM_NUMBER), 1215 OREAD4(sc, OHCI_PERIODIC_START), 1216 OREAD4(sc, OHCI_LS_THRESHOLD), 0); 1217 DPRINTF(" desca=0x%08x descb=0x%08x stat=0x%08x", 1218 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1219 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1220 OREAD4(sc, OHCI_RH_STATUS), 0); 1221 DPRINTF(" port1=0x%08x port2=0x%08x", 1222 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1223 OREAD4(sc, OHCI_RH_PORT_STATUS(2)), 0, 0); 1224 DPRINTF(" HCCA: frame_number=0x%04x done_head=0x%08x", 1225 O32TOH(sc->sc_hcca->hcca_frame_number), 1226 O32TOH(sc->sc_hcca->hcca_done_head), 0, 0); 1227 } 1228 #endif 1229 1230 Static int ohci_intr1(ohci_softc_t *); 1231 1232 int 1233 ohci_intr(void *p) 1234 { 1235 ohci_softc_t *sc = p; 1236 int ret = 0; 1237 1238 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1239 1240 if (sc == NULL) 1241 return 0; 1242 1243 mutex_spin_enter(&sc->sc_intr_lock); 1244 1245 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1246 goto done; 1247 1248 /* If we get an interrupt while polling, then just ignore it. */ 1249 if (sc->sc_bus.ub_usepolling) { 1250 DPRINTFN(16, "ignored interrupt while polling", 0, 0, 0, 0); 1251 /* for level triggered intrs, should do something to ack */ 1252 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1253 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1254 1255 goto done; 1256 } 1257 1258 ret = ohci_intr1(sc); 1259 1260 done: 1261 mutex_spin_exit(&sc->sc_intr_lock); 1262 return ret; 1263 } 1264 1265 Static int 1266 ohci_intr1(ohci_softc_t *sc) 1267 { 1268 uint32_t intrs, eintrs; 1269 1270 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1271 1272 /* In case the interrupt occurs before initialization has completed. */ 1273 if (sc == NULL || sc->sc_hcca == NULL) { 1274 #ifdef DIAGNOSTIC 1275 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1276 #endif 1277 return 0; 1278 } 1279 1280 KASSERT(mutex_owned(&sc->sc_intr_lock)); 1281 1282 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1283 if (!intrs) 1284 return 0; 1285 1286 /* Acknowledge */ 1287 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); 1288 eintrs = intrs & sc->sc_eintrs; 1289 DPRINTFN(7, "sc=%p", sc, 0, 0, 0); 1290 DPRINTFN(7, "intrs=%#x(%#x) eintrs=%#x(%#x)", 1291 intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), eintrs, 1292 sc->sc_eintrs); 1293 1294 if (!eintrs) { 1295 return 0; 1296 } 1297 1298 if (eintrs & OHCI_SO) { 1299 sc->sc_overrun_cnt++; 1300 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1301 printf("%s: %u scheduling overruns\n", 1302 device_xname(sc->sc_dev), sc->sc_overrun_cnt); 1303 sc->sc_overrun_cnt = 0; 1304 } 1305 /* XXX do what */ 1306 eintrs &= ~OHCI_SO; 1307 } 1308 if (eintrs & OHCI_WDH) { 1309 /* 1310 * We block the interrupt below, and reenable it later from 1311 * ohci_softintr(). 1312 */ 1313 usb_schedsoftintr(&sc->sc_bus); 1314 } 1315 if (eintrs & OHCI_RD) { 1316 DPRINTFN(5, "resume detect", sc, 0, 0, 0); 1317 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1318 /* XXX process resume detect */ 1319 } 1320 if (eintrs & OHCI_UE) { 1321 DPRINTFN(5, "unrecoverable error", sc, 0, 0, 0); 1322 printf("%s: unrecoverable error, controller halted\n", 1323 device_xname(sc->sc_dev)); 1324 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1325 /* XXX what else */ 1326 } 1327 if (eintrs & OHCI_RHSC) { 1328 /* 1329 * We block the interrupt below, and reenable it later from 1330 * a timeout. 1331 */ 1332 softint_schedule(sc->sc_rhsc_si); 1333 } 1334 1335 if (eintrs != 0) { 1336 /* Block unprocessed interrupts. */ 1337 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1338 sc->sc_eintrs &= ~eintrs; 1339 DPRINTF("sc %p blocking intrs 0x%x", sc, eintrs, 0, 0); 1340 } 1341 1342 return 1; 1343 } 1344 1345 void 1346 ohci_rhsc_enable(void *v_sc) 1347 { 1348 ohci_softc_t *sc = v_sc; 1349 1350 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1351 DPRINTF("sc %p", sc, 0, 0, 0); 1352 mutex_spin_enter(&sc->sc_intr_lock); 1353 sc->sc_eintrs |= OHCI_RHSC; 1354 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1355 mutex_spin_exit(&sc->sc_intr_lock); 1356 } 1357 1358 #ifdef OHCI_DEBUG 1359 const char *ohci_cc_strs[] = { 1360 "NO_ERROR", 1361 "CRC", 1362 "BIT_STUFFING", 1363 "DATA_TOGGLE_MISMATCH", 1364 "STALL", 1365 "DEVICE_NOT_RESPONDING", 1366 "PID_CHECK_FAILURE", 1367 "UNEXPECTED_PID", 1368 "DATA_OVERRUN", 1369 "DATA_UNDERRUN", 1370 "BUFFER_OVERRUN", 1371 "BUFFER_UNDERRUN", 1372 "reserved", 1373 "reserved", 1374 "NOT_ACCESSED", 1375 "NOT_ACCESSED", 1376 }; 1377 #endif 1378 1379 void 1380 ohci_softintr(void *v) 1381 { 1382 struct usbd_bus *bus = v; 1383 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1384 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1385 ohci_soft_td_t *std, *sdone, *stdnext; 1386 struct usbd_xfer *xfer; 1387 struct ohci_pipe *opipe; 1388 int len, cc; 1389 int i, j, actlen, iframes, uedir; 1390 ohci_physaddr_t done; 1391 1392 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1393 1394 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1395 1396 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1397 sizeof(sc->sc_hcca->hcca_done_head), 1398 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1399 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1400 sc->sc_hcca->hcca_done_head = 0; 1401 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1402 sizeof(sc->sc_hcca->hcca_done_head), 1403 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1404 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1405 sc->sc_eintrs |= OHCI_WDH; 1406 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1407 1408 /* Reverse the done list. */ 1409 for (sdone = NULL, sidone = NULL; done != 0; ) { 1410 std = ohci_hash_find_td(sc, done); 1411 if (std != NULL) { 1412 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1413 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1414 std->dnext = sdone; 1415 done = O32TOH(std->td.td_nexttd); 1416 sdone = std; 1417 DPRINTFN(10, "add TD %p", std, 0, 0, 0); 1418 continue; 1419 } 1420 sitd = ohci_hash_find_itd(sc, done); 1421 if (sitd != NULL) { 1422 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1423 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1424 sitd->dnext = sidone; 1425 done = O32TOH(sitd->itd.itd_nextitd); 1426 sidone = sitd; 1427 DPRINTFN(5, "add ITD %p", sitd, 0, 0, 0); 1428 continue; 1429 } 1430 DPRINTFN(10, "addr %p not found", done, 0, 0, 0); 1431 device_printf(sc->sc_dev, "WARNING: addr 0x%08lx not found\n", 1432 (u_long)done); 1433 break; 1434 } 1435 1436 DPRINTFN(10, "sdone=%p sidone=%p", sdone, sidone, 0, 0); 1437 DPRINTFN(10, "--- TD dump start ---", 0, 0, 0, 0); 1438 #ifdef OHCI_DEBUG 1439 if (ohcidebug >= 10) { 1440 for (std = sdone; std; std = std->dnext) 1441 ohci_dump_td(sc, std); 1442 } 1443 #endif 1444 DPRINTFN(10, "--- TD dump end ---", 0, 0, 0, 0); 1445 1446 for (std = sdone; std; std = stdnext) { 1447 xfer = std->xfer; 1448 stdnext = std->dnext; 1449 DPRINTFN(10, "std=%p xfer=%p hcpriv=%p", std, xfer, 1450 xfer ? xfer->ux_hcpriv : 0, 0); 1451 if (xfer == NULL) { 1452 /* 1453 * xfer == NULL: There seems to be no xfer associated 1454 * with this TD. It is tailp that happened to end up on 1455 * the done queue. 1456 * Shouldn't happen, but some chips are broken(?). 1457 */ 1458 continue; 1459 } 1460 if (xfer->ux_status == USBD_CANCELLED || 1461 xfer->ux_status == USBD_TIMEOUT) { 1462 DPRINTF("cancel/timeout %p", xfer, 0, 0, 0); 1463 /* Handled by abort routine. */ 1464 continue; 1465 } 1466 callout_stop(&xfer->ux_callout); 1467 1468 len = std->len; 1469 if (std->td.td_cbp != 0) 1470 len -= O32TOH(std->td.td_be) - 1471 O32TOH(std->td.td_cbp) + 1; 1472 DPRINTFN(10, "len=%d, flags=0x%x", len, std->flags, 0, 0); 1473 if (std->flags & OHCI_ADD_LEN) 1474 xfer->ux_actlen += len; 1475 1476 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1477 if (cc == OHCI_CC_NO_ERROR) { 1478 ohci_hash_rem_td(sc, std); 1479 if (std->flags & OHCI_CALL_DONE) { 1480 xfer->ux_status = USBD_NORMAL_COMPLETION; 1481 usb_transfer_complete(xfer); 1482 } 1483 } else { 1484 /* 1485 * Endpoint is halted. First unlink all the TDs 1486 * belonging to the failed transfer, and then restart 1487 * the endpoint. 1488 */ 1489 ohci_soft_td_t *p, *n; 1490 opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1491 1492 DPRINTFN(10, "error cc=%d", cc, 0, 0, 0); 1493 1494 /* remove xfer's TDs from the hash */ 1495 for (p = std; p->xfer == xfer; p = n) { 1496 n = p->nexttd; 1497 ohci_hash_rem_td(sc, p); 1498 } 1499 1500 ohci_soft_ed_t *sed = opipe->sed; 1501 1502 /* clear halt and TD chain */ 1503 sed->ed.ed_headp = HTOO32(p->physaddr); 1504 usb_syncmem(&sed->dma, 1505 sed->offs + offsetof(ohci_ed_t, ed_headp), 1506 sizeof(sed->ed.ed_headp), 1507 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1508 1509 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1510 1511 if (cc == OHCI_CC_DATA_UNDERRUN) 1512 xfer->ux_status = USBD_NORMAL_COMPLETION; 1513 else if (cc == OHCI_CC_STALL) 1514 xfer->ux_status = USBD_STALLED; 1515 else 1516 xfer->ux_status = USBD_IOERROR; 1517 usb_transfer_complete(xfer); 1518 } 1519 } 1520 DPRINTFN(10, "--- ITD dump start ---", 0, 0, 0, 0); 1521 #ifdef OHCI_DEBUG 1522 if (ohcidebug >= 10) { 1523 for (sitd = sidone; sitd; sitd = sitd->dnext) 1524 ohci_dump_itd(sc, sitd); 1525 } 1526 #endif 1527 DPRINTFN(10, "--- ITD dump end ---", 0, 0, 0, 0); 1528 1529 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1530 xfer = sitd->xfer; 1531 sitdnext = sitd->dnext; 1532 DPRINTFN(1, "sitd=%p xfer=%p hcpriv=%p", sitd, xfer, 1533 xfer ? xfer->ux_hcpriv : 0, 0); 1534 if (xfer == NULL) 1535 continue; 1536 if (xfer->ux_status == USBD_CANCELLED || 1537 xfer->ux_status == USBD_TIMEOUT) { 1538 DPRINTF("cancel/timeout %p", xfer, 0, 0, 0); 1539 /* Handled by abort routine. */ 1540 continue; 1541 } 1542 KASSERT(!sitd->isdone); 1543 #ifdef DIAGNOSTIC 1544 sitd->isdone = true; 1545 #endif 1546 if (sitd->flags & OHCI_CALL_DONE) { 1547 ohci_soft_itd_t *next; 1548 1549 opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1550 opipe->isoc.inuse -= xfer->ux_nframes; 1551 uedir = UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc-> 1552 bEndpointAddress); 1553 xfer->ux_status = USBD_NORMAL_COMPLETION; 1554 actlen = 0; 1555 for (i = 0, sitd = xfer->ux_hcpriv;; 1556 sitd = next) { 1557 next = sitd->nextitd; 1558 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1559 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1560 xfer->ux_status = USBD_IOERROR; 1561 /* For input, update frlengths with actual */ 1562 /* XXX anything necessary for output? */ 1563 if (uedir == UE_DIR_IN && 1564 xfer->ux_status == USBD_NORMAL_COMPLETION) { 1565 iframes = OHCI_ITD_GET_FC(O32TOH( 1566 sitd->itd.itd_flags)); 1567 for (j = 0; j < iframes; i++, j++) { 1568 len = O16TOH(sitd-> 1569 itd.itd_offset[j]); 1570 if ((OHCI_ITD_PSW_GET_CC(len) & 1571 OHCI_CC_NOT_ACCESSED_MASK) 1572 == OHCI_CC_NOT_ACCESSED) 1573 len = 0; 1574 else 1575 len = OHCI_ITD_PSW_LENGTH(len); 1576 xfer->ux_frlengths[i] = len; 1577 actlen += len; 1578 } 1579 } 1580 if (sitd->flags & OHCI_CALL_DONE) 1581 break; 1582 ohci_hash_rem_itd(sc, sitd); 1583 1584 } 1585 ohci_hash_rem_itd(sc, sitd); 1586 if (uedir == UE_DIR_IN && 1587 xfer->ux_status == USBD_NORMAL_COMPLETION) 1588 xfer->ux_actlen = actlen; 1589 xfer->ux_hcpriv = NULL; 1590 1591 usb_transfer_complete(xfer); 1592 } 1593 } 1594 1595 if (sc->sc_softwake) { 1596 sc->sc_softwake = 0; 1597 cv_broadcast(&sc->sc_softwake_cv); 1598 } 1599 1600 DPRINTFN(10, "done", 0, 0, 0, 0); 1601 } 1602 1603 void 1604 ohci_device_ctrl_done(struct usbd_xfer *xfer) 1605 { 1606 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1607 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1608 int len = UGETW(xfer->ux_request.wLength); 1609 int isread = (xfer->ux_request.bmRequestType & UT_READ); 1610 1611 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1612 DPRINTFN(10, "xfer=%p", xfer, 0, 0, 0); 1613 1614 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1615 KASSERT(xfer->ux_rqflags & URQ_REQUEST); 1616 1617 if (len) 1618 usb_syncmem(&xfer->ux_dmabuf, 0, len, 1619 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1620 usb_syncmem(&opipe->ctrl.reqdma, 0, 1621 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 1622 } 1623 1624 void 1625 ohci_device_intr_done(struct usbd_xfer *xfer) 1626 { 1627 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1628 int isread = 1629 (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN); 1630 1631 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1632 DPRINTFN(10, "xfer=%p, actlen=%d", xfer, xfer->ux_actlen, 0, 0); 1633 1634 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1635 1636 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 1637 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1638 } 1639 1640 void 1641 ohci_device_bulk_done(struct usbd_xfer *xfer) 1642 { 1643 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1644 1645 int isread = 1646 (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN); 1647 1648 KASSERT(mutex_owned(&sc->sc_lock)); 1649 1650 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1651 DPRINTFN(10, "xfer=%p, actlen=%d", xfer, xfer->ux_actlen, 0, 0); 1652 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 1653 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1654 } 1655 1656 Static void 1657 ohci_rhsc_softint(void *arg) 1658 { 1659 ohci_softc_t *sc = arg; 1660 1661 mutex_enter(&sc->sc_lock); 1662 1663 ohci_rhsc(sc, sc->sc_intrxfer); 1664 1665 /* Do not allow RHSC interrupts > 1 per second */ 1666 callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1667 1668 mutex_exit(&sc->sc_lock); 1669 } 1670 1671 void 1672 ohci_rhsc(ohci_softc_t *sc, struct usbd_xfer *xfer) 1673 { 1674 u_char *p; 1675 int i, m; 1676 int hstatus __unused; 1677 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1678 1679 KASSERT(mutex_owned(&sc->sc_lock)); 1680 1681 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1682 DPRINTF("sc=%p xfer=%p hstatus=0x%08x", sc, xfer, hstatus, 0); 1683 1684 if (xfer == NULL) { 1685 /* Just ignore the change. */ 1686 return; 1687 } 1688 1689 p = xfer->ux_buf; 1690 m = min(sc->sc_noport, xfer->ux_length * 8 - 1); 1691 memset(p, 0, xfer->ux_length); 1692 for (i = 1; i <= m; i++) { 1693 /* Pick out CHANGE bits from the status reg. */ 1694 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1695 p[i/8] |= 1 << (i%8); 1696 } 1697 DPRINTF("change=0x%02x", *p, 0, 0, 0); 1698 xfer->ux_actlen = xfer->ux_length; 1699 xfer->ux_status = USBD_NORMAL_COMPLETION; 1700 1701 usb_transfer_complete(xfer); 1702 } 1703 1704 void 1705 ohci_root_intr_done(struct usbd_xfer *xfer) 1706 { 1707 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1708 1709 KASSERT(mutex_owned(&sc->sc_lock)); 1710 1711 KASSERT(sc->sc_intrxfer == xfer); 1712 sc->sc_intrxfer = NULL; 1713 } 1714 1715 void 1716 ohci_poll(struct usbd_bus *bus) 1717 { 1718 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1719 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1720 1721 #ifdef OHCI_DEBUG 1722 static int last; 1723 int new; 1724 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1725 if (new != last) { 1726 DPRINTFN(10, "intrs=0x%04x", new, 0, 0, 0); 1727 last = new; 1728 } 1729 #endif 1730 sc->sc_eintrs |= OHCI_WDH; 1731 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) { 1732 mutex_spin_enter(&sc->sc_intr_lock); 1733 ohci_intr1(sc); 1734 mutex_spin_exit(&sc->sc_intr_lock); 1735 } 1736 } 1737 1738 /* 1739 * Add an ED to the schedule. Called with USB lock held. 1740 */ 1741 Static void 1742 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1743 { 1744 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1745 DPRINTFN(8, "sed=%p head=%p", sed, head, 0, 0); 1746 1747 KASSERT(mutex_owned(&sc->sc_lock)); 1748 1749 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1750 sizeof(head->ed.ed_nexted), 1751 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1752 sed->next = head->next; 1753 sed->ed.ed_nexted = head->ed.ed_nexted; 1754 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1755 sizeof(sed->ed.ed_nexted), 1756 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1757 head->next = sed; 1758 head->ed.ed_nexted = HTOO32(sed->physaddr); 1759 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1760 sizeof(head->ed.ed_nexted), 1761 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1762 } 1763 1764 /* 1765 * Remove an ED from the schedule. Called with USB lock held. 1766 */ 1767 Static void 1768 ohci_rem_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1769 { 1770 ohci_soft_ed_t *p; 1771 1772 KASSERT(mutex_owned(&sc->sc_lock)); 1773 1774 /* XXX */ 1775 for (p = head; p != NULL && p->next != sed; p = p->next) 1776 ; 1777 KASSERT(p != NULL); 1778 1779 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1780 sizeof(sed->ed.ed_nexted), 1781 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1782 p->next = sed->next; 1783 p->ed.ed_nexted = sed->ed.ed_nexted; 1784 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 1785 sizeof(p->ed.ed_nexted), 1786 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1787 } 1788 1789 /* 1790 * When a transfer is completed the TD is added to the done queue by 1791 * the host controller. This queue is the processed by software. 1792 * Unfortunately the queue contains the physical address of the TD 1793 * and we have no simple way to translate this back to a kernel address. 1794 * To make the translation possible (and fast) we use a hash table of 1795 * TDs currently in the schedule. The physical address is used as the 1796 * hash value. 1797 */ 1798 1799 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1800 /* Called with USB lock held. */ 1801 void 1802 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1803 { 1804 int h = HASH(std->physaddr); 1805 1806 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1807 1808 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1809 } 1810 1811 /* Called with USB lock held. */ 1812 void 1813 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1814 { 1815 1816 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1817 1818 LIST_REMOVE(std, hnext); 1819 } 1820 1821 ohci_soft_td_t * 1822 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1823 { 1824 int h = HASH(a); 1825 ohci_soft_td_t *std; 1826 1827 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1828 std != NULL; 1829 std = LIST_NEXT(std, hnext)) 1830 if (std->physaddr == a) 1831 return std; 1832 return NULL; 1833 } 1834 1835 /* Called with USB lock held. */ 1836 void 1837 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1838 { 1839 int h = HASH(sitd->physaddr); 1840 1841 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1842 1843 KASSERT(mutex_owned(&sc->sc_lock)); 1844 1845 DPRINTFN(10, "sitd=%p physaddr=0x%08lx", sitd, (u_long)sitd->physaddr, 1846 0, 0); 1847 1848 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1849 } 1850 1851 /* Called with USB lock held. */ 1852 void 1853 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1854 { 1855 1856 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1857 1858 KASSERT(mutex_owned(&sc->sc_lock)); 1859 1860 DPRINTFN(10, "sitd=%p physaddr=0x%08lx", sitd, (u_long)sitd->physaddr, 1861 0, 0); 1862 1863 LIST_REMOVE(sitd, hnext); 1864 } 1865 1866 ohci_soft_itd_t * 1867 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1868 { 1869 int h = HASH(a); 1870 ohci_soft_itd_t *sitd; 1871 1872 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1873 sitd != NULL; 1874 sitd = LIST_NEXT(sitd, hnext)) 1875 if (sitd->physaddr == a) 1876 return sitd; 1877 return NULL; 1878 } 1879 1880 void 1881 ohci_timeout(void *addr) 1882 { 1883 struct usbd_xfer *xfer = addr; 1884 struct ohci_xfer *oxfer = OHCI_XFER2OXFER(xfer); 1885 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1886 1887 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1888 DPRINTF("oxfer=%p", oxfer, 0, 0, 0); 1889 1890 if (sc->sc_dying) { 1891 mutex_enter(&sc->sc_lock); 1892 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1893 mutex_exit(&sc->sc_lock); 1894 return; 1895 } 1896 1897 /* Execute the abort in a process context. */ 1898 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr, 1899 USB_TASKQ_MPSAFE); 1900 usb_add_task(xfer->ux_pipe->up_dev, &oxfer->abort_task, 1901 USB_TASKQ_HC); 1902 } 1903 1904 void 1905 ohci_timeout_task(void *addr) 1906 { 1907 struct usbd_xfer *xfer = addr; 1908 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1909 1910 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1911 1912 DPRINTF("xfer=%p", xfer, 0, 0, 0); 1913 1914 mutex_enter(&sc->sc_lock); 1915 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1916 mutex_exit(&sc->sc_lock); 1917 } 1918 1919 #ifdef OHCI_DEBUG 1920 void 1921 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 1922 { 1923 for (; std; std = std->nexttd) { 1924 ohci_dump_td(sc, std); 1925 KASSERTMSG(std->nexttd == NULL || std != std->nexttd, 1926 "std %p next %p", std, std->nexttd); 1927 } 1928 } 1929 1930 void 1931 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1932 { 1933 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1934 1935 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1936 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1937 1938 uint32_t flags = O32TOH(std->td.td_flags); 1939 DPRINTF("TD(%p) at 0x%08lx:", std, (u_long)std->physaddr, 0, 0); 1940 DPRINTF(" round=%d DP=%x DI=%x T=%x", 1941 !!(flags & OHCI_TD_R), 1942 __SHIFTOUT(flags, OHCI_TD_DP_MASK), 1943 OHCI_TD_GET_DI(flags), 1944 __SHIFTOUT(flags, OHCI_TD_TOGGLE_MASK)); 1945 DPRINTF(" EC=%d CC=%d", OHCI_TD_GET_EC(flags), OHCI_TD_GET_CC(flags), 1946 0, 0); 1947 DPRINTF(" td_cbp=0x%08lx td_nexttd=0x%08lx td_be=0x%08lx", 1948 (u_long)O32TOH(std->td.td_cbp), 1949 (u_long)O32TOH(std->td.td_nexttd), 1950 (u_long)O32TOH(std->td.td_be), 0); 1951 } 1952 1953 void 1954 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1955 { 1956 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1957 1958 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1959 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1960 1961 uint32_t flags = O32TOH(sitd->itd.itd_flags); 1962 DPRINTF("ITD(%p) at 0x%08lx", sitd, (u_long)sitd->physaddr, 0, 0); 1963 DPRINTF(" sf=%d di=%d fc=%d cc=%d", 1964 OHCI_ITD_GET_SF(flags), OHCI_ITD_GET_DI(flags), 1965 OHCI_ITD_GET_FC(flags), OHCI_ITD_GET_CC(flags)); 1966 DPRINTF(" bp0=0x%08x next=0x%08x be=0x%08x", 1967 O32TOH(sitd->itd.itd_bp0), 1968 O32TOH(sitd->itd.itd_nextitd), 1969 O32TOH(sitd->itd.itd_be), 0); 1970 CTASSERT(OHCI_ITD_NOFFSET == 8); 1971 DPRINTF(" offs[0] = 0x%04x offs[1] = 0x%04x " 1972 "offs[2] = 0x%04x offs[3] = 0x%04x", 1973 O16TOH(sitd->itd.itd_offset[0]), 1974 O16TOH(sitd->itd.itd_offset[1]), 1975 O16TOH(sitd->itd.itd_offset[2]), 1976 O16TOH(sitd->itd.itd_offset[3])); 1977 DPRINTF(" offs[4] = 0x%04x offs[5] = 0x%04x " 1978 "offs[6] = 0x%04x offs[7] = 0x%04x", 1979 O16TOH(sitd->itd.itd_offset[4]), 1980 O16TOH(sitd->itd.itd_offset[5]), 1981 O16TOH(sitd->itd.itd_offset[6]), 1982 O16TOH(sitd->itd.itd_offset[7])); 1983 } 1984 1985 void 1986 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1987 { 1988 for (; sitd; sitd = sitd->nextitd) 1989 ohci_dump_itd(sc, sitd); 1990 } 1991 1992 void 1993 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 1994 { 1995 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1996 1997 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 1998 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1999 2000 uint32_t flags = O32TOH(sed->ed.ed_flags); 2001 DPRINTF("ED(%p) at 0x%08lx:", sed, sed->physaddr, 0, 0); 2002 DPRINTF(" addr=%d endpt=%d maxp=%d", 2003 OHCI_ED_GET_FA(flags), 2004 OHCI_ED_GET_EN(flags), 2005 OHCI_ED_GET_MAXP(flags), 2006 0); 2007 DPRINTF(" dir=%d speed=%d skip=%d iso=%d", 2008 __SHIFTOUT(flags, OHCI_ED_DIR_MASK), 2009 !!(flags & OHCI_ED_SPEED), 2010 !!(flags & OHCI_ED_SKIP), 2011 !!(flags & OHCI_ED_FORMAT_ISO)); 2012 DPRINTF(" tailp=0x%08lx", (u_long)O32TOH(sed->ed.ed_tailp), 2013 0, 0, 0); 2014 DPRINTF(" headp=0x%08lx nexted=0x%08lx halted=%d carry=%d", 2015 O32TOH(sed->ed.ed_headp), O32TOH(sed->ed.ed_nexted), 2016 !!(O32TOH(sed->ed.ed_headp) & OHCI_HALTED), 2017 !!(O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY)); 2018 } 2019 #endif 2020 2021 usbd_status 2022 ohci_open(struct usbd_pipe *pipe) 2023 { 2024 struct usbd_device *dev = pipe->up_dev; 2025 struct usbd_bus *bus = dev->ud_bus; 2026 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2027 usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc; 2028 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2029 uint8_t addr = dev->ud_addr; 2030 uint8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2031 ohci_soft_ed_t *sed; 2032 ohci_soft_td_t *std; 2033 ohci_soft_itd_t *sitd; 2034 ohci_physaddr_t tdphys; 2035 uint32_t fmt; 2036 usbd_status err = USBD_NOMEM; 2037 int ival; 2038 2039 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2040 DPRINTFN(1, "pipe=%p, addr=%d, endpt=%d (%d)", pipe, addr, 2041 ed->bEndpointAddress, bus->ub_rhaddr); 2042 2043 if (sc->sc_dying) { 2044 return USBD_IOERROR; 2045 } 2046 2047 std = NULL; 2048 sed = NULL; 2049 2050 if (addr == bus->ub_rhaddr) { 2051 switch (ed->bEndpointAddress) { 2052 case USB_CONTROL_ENDPOINT: 2053 pipe->up_methods = &roothub_ctrl_methods; 2054 break; 2055 case UE_DIR_IN | USBROOTHUB_INTR_ENDPT: 2056 pipe->up_methods = &ohci_root_intr_methods; 2057 break; 2058 default: 2059 err = USBD_INVAL; 2060 goto bad; 2061 } 2062 } else { 2063 sed = ohci_alloc_sed(sc); 2064 if (sed == NULL) 2065 goto bad; 2066 opipe->sed = sed; 2067 if (xfertype == UE_ISOCHRONOUS) { 2068 sitd = ohci_alloc_sitd(sc); 2069 if (sitd == NULL) 2070 goto bad; 2071 2072 opipe->tail.itd = sitd; 2073 tdphys = sitd->physaddr; 2074 fmt = OHCI_ED_FORMAT_ISO; 2075 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2076 fmt |= OHCI_ED_DIR_IN; 2077 else 2078 fmt |= OHCI_ED_DIR_OUT; 2079 } else { 2080 std = ohci_alloc_std(sc); 2081 if (std == NULL) 2082 goto bad; 2083 2084 opipe->tail.td = std; 2085 tdphys = std->physaddr; 2086 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2087 } 2088 sed->ed.ed_flags = HTOO32( 2089 OHCI_ED_SET_FA(addr) | 2090 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2091 (dev->ud_speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2092 fmt | 2093 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2094 sed->ed.ed_headp = HTOO32(tdphys | 2095 (pipe->up_endpoint->ue_toggle ? OHCI_TOGGLECARRY : 0)); 2096 sed->ed.ed_tailp = HTOO32(tdphys); 2097 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2098 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2099 2100 switch (xfertype) { 2101 case UE_CONTROL: 2102 pipe->up_methods = &ohci_device_ctrl_methods; 2103 err = usb_allocmem(&sc->sc_bus, 2104 sizeof(usb_device_request_t), 2105 0, &opipe->ctrl.reqdma); 2106 if (err) 2107 goto bad; 2108 mutex_enter(&sc->sc_lock); 2109 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2110 mutex_exit(&sc->sc_lock); 2111 break; 2112 case UE_INTERRUPT: 2113 pipe->up_methods = &ohci_device_intr_methods; 2114 ival = pipe->up_interval; 2115 if (ival == USBD_DEFAULT_INTERVAL) 2116 ival = ed->bInterval; 2117 err = ohci_device_setintr(sc, opipe, ival); 2118 if (err) 2119 goto bad; 2120 break; 2121 case UE_ISOCHRONOUS: 2122 pipe->up_serialise = false; 2123 pipe->up_methods = &ohci_device_isoc_methods; 2124 return ohci_setup_isoc(pipe); 2125 case UE_BULK: 2126 pipe->up_methods = &ohci_device_bulk_methods; 2127 mutex_enter(&sc->sc_lock); 2128 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2129 mutex_exit(&sc->sc_lock); 2130 break; 2131 } 2132 } 2133 2134 return USBD_NORMAL_COMPLETION; 2135 2136 bad: 2137 if (std != NULL) { 2138 ohci_free_std(sc, std); 2139 } 2140 if (sed != NULL) 2141 ohci_free_sed(sc, sed); 2142 return err; 2143 2144 } 2145 2146 /* 2147 * Close a reqular pipe. 2148 * Assumes that there are no pending transactions. 2149 */ 2150 void 2151 ohci_close_pipe(struct usbd_pipe *pipe, ohci_soft_ed_t *head) 2152 { 2153 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2154 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2155 ohci_soft_ed_t *sed = opipe->sed; 2156 2157 KASSERT(mutex_owned(&sc->sc_lock)); 2158 2159 #ifdef DIAGNOSTIC 2160 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2161 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2162 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2163 ohci_soft_td_t *std; 2164 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2165 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2166 "tl=0x%x pipe=%p, std=%p\n", sed, 2167 (int)O32TOH(sed->ed.ed_headp), 2168 (int)O32TOH(sed->ed.ed_tailp), 2169 pipe, std); 2170 #ifdef OHCI_DEBUG 2171 usbd_dump_pipe(&opipe->pipe); 2172 ohci_dump_ed(sc, sed); 2173 if (std) 2174 ohci_dump_td(sc, std); 2175 #endif 2176 usb_delay_ms(&sc->sc_bus, 2); 2177 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2178 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2179 printf("ohci_close_pipe: pipe still not empty\n"); 2180 } 2181 #endif 2182 ohci_rem_ed(sc, sed, head); 2183 /* Make sure the host controller is not touching this ED */ 2184 usb_delay_ms(&sc->sc_bus, 1); 2185 pipe->up_endpoint->ue_toggle = 2186 (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0; 2187 ohci_free_sed_locked(sc, opipe->sed); 2188 } 2189 2190 /* 2191 * Abort a device request. 2192 * If this routine is called at splusb() it guarantees that the request 2193 * will be removed from the hardware scheduling and that the callback 2194 * for it will be called with USBD_CANCELLED status. 2195 * It's impossible to guarantee that the requested transfer will not 2196 * have happened since the hardware runs concurrently. 2197 * If the transaction has already happened we rely on the ordinary 2198 * interrupt processing to process it. 2199 * XXX This is most probably wrong. 2200 * XXXMRG this doesn't make sense anymore. 2201 */ 2202 void 2203 ohci_abort_xfer(struct usbd_xfer *xfer, usbd_status status) 2204 { 2205 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2206 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2207 ohci_soft_ed_t *sed = opipe->sed; 2208 ohci_soft_td_t *p, *n; 2209 ohci_physaddr_t headp; 2210 int hit; 2211 int wake; 2212 2213 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2214 DPRINTF("xfer=%p pipe=%p sed=%p", xfer, opipe,sed, 0); 2215 2216 KASSERT(mutex_owned(&sc->sc_lock)); 2217 ASSERT_SLEEPABLE(); 2218 2219 if (sc->sc_dying) { 2220 /* If we're dying, just do the software part. */ 2221 xfer->ux_status = status; /* make software ignore it */ 2222 callout_halt(&xfer->ux_callout, &sc->sc_lock); 2223 usb_transfer_complete(xfer); 2224 return; 2225 } 2226 2227 /* 2228 * If an abort is already in progress then just wait for it to 2229 * complete and return. 2230 */ 2231 if (xfer->ux_hcflags & UXFER_ABORTING) { 2232 DPRINTFN(2, "already aborting", 0, 0, 0, 0); 2233 #ifdef DIAGNOSTIC 2234 if (status == USBD_TIMEOUT) 2235 printf("%s: TIMEOUT while aborting\n", __func__); 2236 #endif 2237 /* Override the status which might be USBD_TIMEOUT. */ 2238 xfer->ux_status = status; 2239 DPRINTFN(2, "waiting for abort to finish", 0, 0, 0, 0); 2240 xfer->ux_hcflags |= UXFER_ABORTWAIT; 2241 while (xfer->ux_hcflags & UXFER_ABORTING) 2242 cv_wait(&xfer->ux_hccv, &sc->sc_lock); 2243 goto done; 2244 } 2245 xfer->ux_hcflags |= UXFER_ABORTING; 2246 2247 /* 2248 * Step 1: Make interrupt routine and hardware ignore xfer. 2249 */ 2250 xfer->ux_status = status; /* make software ignore it */ 2251 callout_stop(&xfer->ux_callout); 2252 DPRINTFN(1, "stop ed=%p", sed, 0, 0, 0); 2253 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2254 sizeof(sed->ed.ed_flags), 2255 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2256 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2257 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2258 sizeof(sed->ed.ed_flags), 2259 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2260 2261 /* 2262 * Step 2: Wait until we know hardware has finished any possible 2263 * use of the xfer. Also make sure the soft interrupt routine 2264 * has run. 2265 */ 2266 /* Hardware finishes in 1ms */ 2267 usb_delay_ms_locked(opipe->pipe.up_dev->ud_bus, 20, &sc->sc_lock); 2268 sc->sc_softwake = 1; 2269 usb_schedsoftintr(&sc->sc_bus); 2270 cv_wait(&sc->sc_softwake_cv, &sc->sc_lock); 2271 2272 /* 2273 * Step 3: Remove any vestiges of the xfer from the hardware. 2274 * The complication here is that the hardware may have executed 2275 * beyond the xfer we're trying to abort. So as we're scanning 2276 * the TDs of this xfer we check if the hardware points to 2277 * any of them. 2278 */ 2279 p = xfer->ux_hcpriv; 2280 KASSERT(p); 2281 2282 #ifdef OHCI_DEBUG 2283 DPRINTF("--- dump start ---", 0, 0, 0, 0); 2284 2285 if (ohcidebug >= 2) { 2286 DPRINTF("sed:", 0, 0, 0, 0); 2287 ohci_dump_ed(sc, sed); 2288 ohci_dump_tds(sc, p); 2289 } 2290 DPRINTF("--- dump end ---", 0, 0, 0, 0); 2291 #endif 2292 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2293 hit = 0; 2294 for (; p->xfer == xfer; p = n) { 2295 hit |= headp == p->physaddr; 2296 n = p->nexttd; 2297 ohci_hash_rem_td(sc, p); 2298 } 2299 /* Zap headp register if hardware pointed inside the xfer. */ 2300 if (hit) { 2301 DPRINTFN(1, "set hd=0x%08x, tl=0x%08x", (int)p->physaddr, 2302 (int)O32TOH(sed->ed.ed_tailp), 0, 0); 2303 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2304 usb_syncmem(&sed->dma, 2305 sed->offs + offsetof(ohci_ed_t, ed_headp), 2306 sizeof(sed->ed.ed_headp), 2307 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2308 } else { 2309 DPRINTFN(1, "no hit", 0, 0, 0, 0); 2310 } 2311 2312 /* 2313 * Step 4: Turn on hardware again. 2314 */ 2315 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2316 sizeof(sed->ed.ed_flags), 2317 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2318 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2319 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2320 sizeof(sed->ed.ed_flags), 2321 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2322 2323 /* 2324 * Step 5: Execute callback. 2325 */ 2326 wake = xfer->ux_hcflags & UXFER_ABORTWAIT; 2327 xfer->ux_hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2328 usb_transfer_complete(xfer); 2329 if (wake) 2330 cv_broadcast(&xfer->ux_hccv); 2331 2332 done: 2333 KASSERT(mutex_owned(&sc->sc_lock)); 2334 } 2335 2336 /* 2337 * Data structures and routines to emulate the root hub. 2338 */ 2339 Static int 2340 ohci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req, 2341 void *buf, int buflen) 2342 { 2343 ohci_softc_t *sc = OHCI_BUS2SC(bus); 2344 usb_port_status_t ps; 2345 uint16_t len, value, index; 2346 int l, totlen = 0; 2347 int port, i; 2348 uint32_t v; 2349 2350 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2351 2352 if (sc->sc_dying) 2353 return -1; 2354 2355 DPRINTFN(4, "type=0x%02x request=%02x", req->bmRequestType, 2356 req->bRequest, 0, 0); 2357 2358 len = UGETW(req->wLength); 2359 value = UGETW(req->wValue); 2360 index = UGETW(req->wIndex); 2361 2362 #define C(x,y) ((x) | ((y) << 8)) 2363 switch (C(req->bRequest, req->bmRequestType)) { 2364 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2365 DPRINTFN(8, "wValue=0x%04x", value, 0, 0, 0); 2366 if (len == 0) 2367 break; 2368 switch (value) { 2369 case C(0, UDESC_DEVICE): { 2370 usb_device_descriptor_t devd; 2371 2372 totlen = min(buflen, sizeof(devd)); 2373 memcpy(&devd, buf, totlen); 2374 USETW(devd.idVendor, sc->sc_id_vendor); 2375 memcpy(buf, &devd, totlen); 2376 break; 2377 } 2378 case C(1, UDESC_STRING): 2379 #define sd ((usb_string_descriptor_t *)buf) 2380 /* Vendor */ 2381 totlen = usb_makestrdesc(sd, len, sc->sc_vendor); 2382 break; 2383 case C(2, UDESC_STRING): 2384 /* Product */ 2385 totlen = usb_makestrdesc(sd, len, "OHCI root hub"); 2386 break; 2387 #undef sd 2388 default: 2389 /* default from usbroothub */ 2390 return buflen; 2391 } 2392 break; 2393 2394 /* Hub requests */ 2395 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2396 break; 2397 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2398 DPRINTFN(8, "UR_CLEAR_PORT_FEATURE port=%d feature=%d", 2399 index, value, 0, 0); 2400 if (index < 1 || index > sc->sc_noport) { 2401 return -1; 2402 } 2403 port = OHCI_RH_PORT_STATUS(index); 2404 switch(value) { 2405 case UHF_PORT_ENABLE: 2406 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2407 break; 2408 case UHF_PORT_SUSPEND: 2409 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2410 break; 2411 case UHF_PORT_POWER: 2412 /* Yes, writing to the LOW_SPEED bit clears power. */ 2413 OWRITE4(sc, port, UPS_LOW_SPEED); 2414 break; 2415 case UHF_C_PORT_CONNECTION: 2416 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2417 break; 2418 case UHF_C_PORT_ENABLE: 2419 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2420 break; 2421 case UHF_C_PORT_SUSPEND: 2422 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2423 break; 2424 case UHF_C_PORT_OVER_CURRENT: 2425 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2426 break; 2427 case UHF_C_PORT_RESET: 2428 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2429 break; 2430 default: 2431 return -1; 2432 } 2433 switch(value) { 2434 case UHF_C_PORT_CONNECTION: 2435 case UHF_C_PORT_ENABLE: 2436 case UHF_C_PORT_SUSPEND: 2437 case UHF_C_PORT_OVER_CURRENT: 2438 case UHF_C_PORT_RESET: 2439 /* Enable RHSC interrupt if condition is cleared. */ 2440 if ((OREAD4(sc, port) >> 16) == 0) 2441 ohci_rhsc_enable(sc); 2442 break; 2443 default: 2444 break; 2445 } 2446 break; 2447 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2448 if (len == 0) 2449 break; 2450 if ((value & 0xff) != 0) { 2451 return -1; 2452 } 2453 usb_hub_descriptor_t hubd; 2454 2455 totlen = min(buflen, sizeof(hubd)); 2456 memcpy(&hubd, buf, totlen); 2457 2458 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2459 hubd.bNbrPorts = sc->sc_noport; 2460 USETW(hubd.wHubCharacteristics, 2461 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2462 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2463 /* XXX overcurrent */ 2464 ); 2465 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2466 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2467 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2468 hubd.DeviceRemovable[i++] = (uint8_t)v; 2469 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2470 totlen = min(totlen, hubd.bDescLength); 2471 memcpy(buf, &hubd, totlen); 2472 break; 2473 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2474 if (len != 4) { 2475 return -1; 2476 } 2477 memset(buf, 0, len); /* ? XXX */ 2478 totlen = len; 2479 break; 2480 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2481 DPRINTFN(8, "get port status i=%d", index, 0, 0, 0); 2482 if (index < 1 || index > sc->sc_noport) { 2483 return -1; 2484 } 2485 if (len != 4) { 2486 return -1; 2487 } 2488 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2489 DPRINTFN(8, "port status=0x%04x", v, 0, 0, 0); 2490 USETW(ps.wPortStatus, v); 2491 USETW(ps.wPortChange, v >> 16); 2492 totlen = min(len, sizeof(ps)); 2493 memcpy(buf, &ps, totlen); 2494 break; 2495 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2496 return -1; 2497 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2498 break; 2499 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2500 if (index < 1 || index > sc->sc_noport) { 2501 return -1; 2502 } 2503 port = OHCI_RH_PORT_STATUS(index); 2504 switch(value) { 2505 case UHF_PORT_ENABLE: 2506 OWRITE4(sc, port, UPS_PORT_ENABLED); 2507 break; 2508 case UHF_PORT_SUSPEND: 2509 OWRITE4(sc, port, UPS_SUSPEND); 2510 break; 2511 case UHF_PORT_RESET: 2512 DPRINTFN(5, "reset port %d", index, 0, 0, 0); 2513 OWRITE4(sc, port, UPS_RESET); 2514 for (i = 0; i < 5; i++) { 2515 usb_delay_ms(&sc->sc_bus, 2516 USB_PORT_ROOT_RESET_DELAY); 2517 if (sc->sc_dying) { 2518 return -1; 2519 } 2520 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2521 break; 2522 } 2523 DPRINTFN(8, "port %d reset, status = 0x%04x", index, 2524 OREAD4(sc, port), 0, 0); 2525 break; 2526 case UHF_PORT_POWER: 2527 DPRINTFN(2, "set port power %d", index, 0, 0, 0); 2528 OWRITE4(sc, port, UPS_PORT_POWER); 2529 break; 2530 default: 2531 return -1; 2532 } 2533 break; 2534 default: 2535 /* default from usbroothub */ 2536 return buflen; 2537 } 2538 2539 return totlen; 2540 } 2541 2542 Static usbd_status 2543 ohci_root_intr_transfer(struct usbd_xfer *xfer) 2544 { 2545 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2546 usbd_status err; 2547 2548 /* Insert last in queue. */ 2549 mutex_enter(&sc->sc_lock); 2550 err = usb_insert_transfer(xfer); 2551 mutex_exit(&sc->sc_lock); 2552 if (err) 2553 return err; 2554 2555 /* Pipe isn't running, start first */ 2556 return ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2557 } 2558 2559 Static usbd_status 2560 ohci_root_intr_start(struct usbd_xfer *xfer) 2561 { 2562 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2563 2564 if (sc->sc_dying) 2565 return USBD_IOERROR; 2566 2567 mutex_enter(&sc->sc_lock); 2568 KASSERT(sc->sc_intrxfer == NULL); 2569 sc->sc_intrxfer = xfer; 2570 mutex_exit(&sc->sc_lock); 2571 2572 return USBD_IN_PROGRESS; 2573 } 2574 2575 /* Abort a root interrupt request. */ 2576 Static void 2577 ohci_root_intr_abort(struct usbd_xfer *xfer) 2578 { 2579 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2580 2581 KASSERT(mutex_owned(&sc->sc_lock)); 2582 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 2583 2584 sc->sc_intrxfer = NULL; 2585 2586 xfer->ux_status = USBD_CANCELLED; 2587 usb_transfer_complete(xfer); 2588 } 2589 2590 /* Close the root pipe. */ 2591 Static void 2592 ohci_root_intr_close(struct usbd_pipe *pipe) 2593 { 2594 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2595 2596 KASSERT(mutex_owned(&sc->sc_lock)); 2597 2598 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2599 2600 sc->sc_intrxfer = NULL; 2601 } 2602 2603 /************************/ 2604 2605 int 2606 ohci_device_ctrl_init(struct usbd_xfer *xfer) 2607 { 2608 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2609 usb_device_request_t *req = &xfer->ux_request; 2610 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2611 ohci_soft_td_t *stat, *setup; 2612 int isread = req->bmRequestType & UT_READ; 2613 int len = xfer->ux_bufsize; 2614 int err = ENOMEM; 2615 2616 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2617 2618 setup = ohci_alloc_std(sc); 2619 if (setup == NULL) { 2620 goto bad1; 2621 } 2622 stat = ohci_alloc_std(sc); 2623 if (stat == NULL) { 2624 goto bad2; 2625 } 2626 2627 ox->ox_setup = setup; 2628 ox->ox_stat = stat; 2629 ox->ox_nstd = 0; 2630 2631 /* Set up data transaction */ 2632 if (len != 0) { 2633 err = ohci_alloc_std_chain(sc, xfer, len, isread); 2634 if (err) { 2635 goto bad3; 2636 } 2637 } 2638 return 0; 2639 2640 bad3: 2641 ohci_free_std(sc, stat); 2642 bad2: 2643 ohci_free_std(sc, setup); 2644 bad1: 2645 return err; 2646 } 2647 2648 void 2649 ohci_device_ctrl_fini(struct usbd_xfer *xfer) 2650 { 2651 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2652 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2653 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2654 2655 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2656 DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0); 2657 2658 mutex_enter(&sc->sc_lock); 2659 if (ox->ox_setup != opipe->tail.td) { 2660 ohci_free_std_locked(sc, ox->ox_setup); 2661 } 2662 for (size_t i = 0; i < ox->ox_nstd; i++) { 2663 ohci_soft_td_t *std = ox->ox_stds[i]; 2664 if (std == NULL) 2665 break; 2666 ohci_free_std_locked(sc, std); 2667 } 2668 ohci_free_std_locked(sc, ox->ox_stat); 2669 mutex_exit(&sc->sc_lock); 2670 2671 if (ox->ox_nstd) { 2672 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 2673 kmem_free(ox->ox_stds, sz); 2674 } 2675 } 2676 2677 Static usbd_status 2678 ohci_device_ctrl_transfer(struct usbd_xfer *xfer) 2679 { 2680 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2681 usbd_status err; 2682 2683 /* Insert last in queue. */ 2684 mutex_enter(&sc->sc_lock); 2685 err = usb_insert_transfer(xfer); 2686 mutex_exit(&sc->sc_lock); 2687 if (err) 2688 return err; 2689 2690 /* Pipe isn't running, start first */ 2691 return ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2692 } 2693 2694 Static usbd_status 2695 ohci_device_ctrl_start(struct usbd_xfer *xfer) 2696 { 2697 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2698 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2699 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2700 usb_device_request_t *req = &xfer->ux_request; 2701 struct usbd_device *dev __diagused = opipe->pipe.up_dev; 2702 ohci_soft_td_t *setup, *stat, *next, *tail; 2703 ohci_soft_ed_t *sed; 2704 int isread; 2705 int len; 2706 2707 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2708 2709 if (sc->sc_dying) 2710 return USBD_IOERROR; 2711 2712 KASSERT(xfer->ux_rqflags & URQ_REQUEST); 2713 2714 isread = req->bmRequestType & UT_READ; 2715 len = UGETW(req->wLength); 2716 2717 DPRINTF("xfer=%p len=%d, addr=%d, endpt=%d", xfer, len, dev->ud_addr, 2718 opipe->pipe.up_endpoint->ue_edesc->bEndpointAddress); 2719 DPRINTF("type=0x%02x, request=0x%02x, wValue=0x%04x, wIndex=0x%04x", 2720 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2721 UGETW(req->wIndex)); 2722 2723 /* Need to take lock here for pipe->tail.td */ 2724 mutex_enter(&sc->sc_lock); 2725 2726 /* 2727 * Use the pipe "tail" TD as our first and loan our first TD to the 2728 * next transfer 2729 */ 2730 setup = opipe->tail.td; 2731 opipe->tail.td = ox->ox_setup; 2732 ox->ox_setup = setup; 2733 2734 stat = ox->ox_stat; 2735 2736 /* point at sentinel */ 2737 tail = opipe->tail.td; 2738 sed = opipe->sed; 2739 2740 KASSERTMSG(OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)) == dev->ud_addr, 2741 "address ED %d pipe %d\n", 2742 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), dev->ud_addr); 2743 KASSERTMSG(OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)) == 2744 UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize), 2745 "MPL ED %d pipe %d\n", 2746 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), 2747 UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize)); 2748 2749 /* next will point to data if len != 0 */ 2750 next = stat; 2751 2752 /* Set up data transaction */ 2753 if (len != 0) { 2754 ohci_soft_td_t *std; 2755 ohci_soft_td_t *end; 2756 2757 next = ox->ox_stds[0]; 2758 ohci_reset_std_chain(sc, xfer, len, isread, next, &end); 2759 2760 end->td.td_nexttd = HTOO32(stat->physaddr); 2761 end->nexttd = stat; 2762 2763 usb_syncmem(&end->dma, end->offs, sizeof(end->td), 2764 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2765 2766 usb_syncmem(&xfer->ux_dmabuf, 0, len, 2767 isread ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2768 std = ox->ox_stds[0]; 2769 /* Start toggle at 1 and then use the carried toggle. */ 2770 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 2771 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 2772 usb_syncmem(&std->dma, 2773 std->offs + offsetof(ohci_td_t, td_flags), 2774 sizeof(std->td.td_flags), 2775 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2776 } 2777 2778 DPRINTFN(8, "setup %p data %p stat %p tail %p", setup, 2779 (len != 0 ? ox->ox_stds[0] : NULL), stat, tail); 2780 KASSERT(opipe->tail.td == tail); 2781 2782 memcpy(KERNADDR(&opipe->ctrl.reqdma, 0), req, sizeof(*req)); 2783 usb_syncmem(&opipe->ctrl.reqdma, 0, sizeof(*req), BUS_DMASYNC_PREWRITE); 2784 2785 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 2786 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 2787 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->ctrl.reqdma, 0)); 2788 setup->td.td_nexttd = HTOO32(next->physaddr); 2789 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof(*req) - 1); 2790 setup->nexttd = next; 2791 setup->len = 0; 2792 setup->xfer = xfer; 2793 setup->flags = 0; 2794 ohci_hash_add_td(sc, setup); 2795 2796 xfer->ux_hcpriv = setup; 2797 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 2798 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2799 2800 stat->td.td_flags = HTOO32( 2801 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 2802 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 2803 stat->td.td_cbp = 0; 2804 stat->td.td_nexttd = HTOO32(tail->physaddr); 2805 stat->td.td_be = 0; 2806 stat->nexttd = tail; 2807 stat->flags = OHCI_CALL_DONE; 2808 stat->len = 0; 2809 stat->xfer = xfer; 2810 ohci_hash_add_td(sc, stat); 2811 2812 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 2813 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2814 2815 memset(&tail->td, 0, sizeof(tail->td)); 2816 tail->nexttd = NULL; 2817 tail->xfer = NULL; 2818 2819 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 2820 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2821 2822 #ifdef OHCI_DEBUG 2823 USBHIST_LOGN(ohcidebug, 5, "--- dump start ---", 0, 0, 0, 0); 2824 if (ohcidebug >= 5) { 2825 ohci_dump_ed(sc, sed); 2826 ohci_dump_tds(sc, setup); 2827 } 2828 USBHIST_LOGN(ohcidebug, 5, "--- dump end ---", 0, 0, 0, 0); 2829 #endif 2830 2831 /* Insert ED in schedule */ 2832 sed->ed.ed_tailp = HTOO32(tail->physaddr); 2833 usb_syncmem(&sed->dma, 2834 sed->offs + offsetof(ohci_ed_t, ed_tailp), 2835 sizeof(sed->ed.ed_tailp), 2836 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2837 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 2838 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 2839 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 2840 ohci_timeout, xfer); 2841 } 2842 2843 DPRINTF("done", 0, 0, 0, 0); 2844 2845 mutex_exit(&sc->sc_lock); 2846 2847 return USBD_IN_PROGRESS; 2848 } 2849 2850 /* Abort a device control request. */ 2851 Static void 2852 ohci_device_ctrl_abort(struct usbd_xfer *xfer) 2853 { 2854 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 2855 2856 KASSERT(mutex_owned(&sc->sc_lock)); 2857 2858 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2859 DPRINTF("xfer=%p", xfer, 0, 0, 0); 2860 ohci_abort_xfer(xfer, USBD_CANCELLED); 2861 } 2862 2863 /* Close a device control pipe. */ 2864 Static void 2865 ohci_device_ctrl_close(struct usbd_pipe *pipe) 2866 { 2867 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2868 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2869 2870 KASSERT(mutex_owned(&sc->sc_lock)); 2871 2872 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2873 DPRINTF("pipe=%p", pipe, 0, 0, 0); 2874 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2875 ohci_free_std_locked(sc, opipe->tail.td); 2876 } 2877 2878 /************************/ 2879 2880 Static void 2881 ohci_device_clear_toggle(struct usbd_pipe *pipe) 2882 { 2883 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2884 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2885 2886 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2887 } 2888 2889 Static void 2890 ohci_noop(struct usbd_pipe *pipe) 2891 { 2892 } 2893 2894 Static int 2895 ohci_device_bulk_init(struct usbd_xfer *xfer) 2896 { 2897 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2898 int len = xfer->ux_bufsize; 2899 int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;; 2900 int isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2901 int err; 2902 2903 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2904 2905 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 2906 2907 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 2908 xfer->ux_flags); 2909 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 2910 2911 /* Allocate a chain of new TDs (including a new tail). */ 2912 err = ohci_alloc_std_chain(sc, xfer, len, isread); 2913 if (err) 2914 return err; 2915 2916 return 0; 2917 } 2918 2919 Static void 2920 ohci_device_bulk_fini(struct usbd_xfer *xfer) 2921 { 2922 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2923 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2924 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2925 2926 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2927 DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0); 2928 2929 mutex_enter(&sc->sc_lock); 2930 for (size_t i = 0; i < ox->ox_nstd; i++) { 2931 ohci_soft_td_t *std = ox->ox_stds[i]; 2932 if (std == NULL) 2933 break; 2934 if (std != opipe->tail.td) 2935 ohci_free_std_locked(sc, std); 2936 } 2937 mutex_exit(&sc->sc_lock); 2938 2939 if (ox->ox_nstd) { 2940 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 2941 kmem_free(ox->ox_stds, sz); 2942 } 2943 } 2944 2945 Static usbd_status 2946 ohci_device_bulk_transfer(struct usbd_xfer *xfer) 2947 { 2948 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2949 usbd_status err; 2950 2951 /* Insert last in queue. */ 2952 mutex_enter(&sc->sc_lock); 2953 err = usb_insert_transfer(xfer); 2954 mutex_exit(&sc->sc_lock); 2955 if (err) 2956 return err; 2957 2958 /* Pipe isn't running, start first */ 2959 return ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2960 } 2961 2962 Static usbd_status 2963 ohci_device_bulk_start(struct usbd_xfer *xfer) 2964 { 2965 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2966 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2967 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2968 ohci_soft_td_t *last; 2969 ohci_soft_td_t *data, *tail, *tdp; 2970 ohci_soft_ed_t *sed; 2971 int len, isread, endpt; 2972 2973 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2974 2975 if (sc->sc_dying) 2976 return USBD_IOERROR; 2977 2978 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 2979 2980 len = xfer->ux_length; 2981 endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 2982 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2983 sed = opipe->sed; 2984 2985 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 2986 xfer->ux_flags); 2987 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 2988 2989 mutex_enter(&sc->sc_lock); 2990 2991 /* 2992 * Use the pipe "tail" TD as our first and loan our first TD to the 2993 * next transfer 2994 */ 2995 data = opipe->tail.td; 2996 opipe->tail.td = ox->ox_stds[0]; 2997 ox->ox_stds[0] = data; 2998 ohci_reset_std_chain(sc, xfer, len, isread, data, &last); 2999 3000 /* point at sentinel */ 3001 tail = opipe->tail.td; 3002 memset(&tail->td, 0, sizeof(tail->td)); 3003 tail->nexttd = NULL; 3004 tail->xfer = NULL; 3005 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 3006 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3007 xfer->ux_hcpriv = data; 3008 3009 DPRINTFN(8, "xfer %p data %p tail %p", xfer, ox->ox_stds[0], tail, 0); 3010 KASSERT(opipe->tail.td == tail); 3011 3012 /* We want interrupt at the end of the transfer. */ 3013 last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3014 last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3015 last->td.td_nexttd = HTOO32(tail->physaddr); 3016 last->nexttd = tail; 3017 last->flags |= OHCI_CALL_DONE; 3018 usb_syncmem(&last->dma, last->offs, sizeof(last->td), 3019 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3020 3021 DPRINTFN(4, "ed_flags=0x%08x td_flags=0x%08x " 3022 "td_cbp=0x%08x td_be=0x%08x", 3023 (int)O32TOH(sed->ed.ed_flags), 3024 (int)O32TOH(data->td.td_flags), 3025 (int)O32TOH(data->td.td_cbp), 3026 (int)O32TOH(data->td.td_be)); 3027 3028 #ifdef OHCI_DEBUG 3029 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 3030 if (ohcidebug >= 5) { 3031 ohci_dump_ed(sc, sed); 3032 ohci_dump_tds(sc, data); 3033 } 3034 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 3035 #endif 3036 3037 /* Insert ED in schedule */ 3038 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 3039 KASSERT(tdp->xfer == xfer); 3040 } 3041 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3042 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3043 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3044 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3045 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3046 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3047 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 3048 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 3049 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 3050 ohci_timeout, xfer); 3051 } 3052 mutex_exit(&sc->sc_lock); 3053 3054 return USBD_IN_PROGRESS; 3055 } 3056 3057 Static void 3058 ohci_device_bulk_abort(struct usbd_xfer *xfer) 3059 { 3060 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 3061 3062 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3063 3064 KASSERT(mutex_owned(&sc->sc_lock)); 3065 3066 DPRINTF("xfer=%p", xfer, 0, 0, 0); 3067 ohci_abort_xfer(xfer, USBD_CANCELLED); 3068 } 3069 3070 /* 3071 * Close a device bulk pipe. 3072 */ 3073 Static void 3074 ohci_device_bulk_close(struct usbd_pipe *pipe) 3075 { 3076 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3077 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3078 3079 KASSERT(mutex_owned(&sc->sc_lock)); 3080 3081 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3082 3083 DPRINTF("pipe=%p", pipe, 0, 0, 0); 3084 ohci_close_pipe(pipe, sc->sc_bulk_head); 3085 ohci_free_std_locked(sc, opipe->tail.td); 3086 } 3087 3088 /************************/ 3089 3090 Static int 3091 ohci_device_intr_init(struct usbd_xfer *xfer) 3092 { 3093 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3094 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3095 int len = xfer->ux_bufsize; 3096 int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;; 3097 int isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3098 int err; 3099 3100 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3101 3102 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3103 KASSERT(len != 0); 3104 3105 DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread, 3106 xfer->ux_flags); 3107 DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0); 3108 3109 ox->ox_nstd = 0; 3110 3111 err = ohci_alloc_std_chain(sc, xfer, len, isread); 3112 if (err) { 3113 return err; 3114 } 3115 3116 return 0; 3117 } 3118 3119 Static void 3120 ohci_device_intr_fini(struct usbd_xfer *xfer) 3121 { 3122 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3123 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3124 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3125 3126 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3127 DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0); 3128 3129 mutex_enter(&sc->sc_lock); 3130 for (size_t i = 0; i < ox->ox_nstd; i++) { 3131 ohci_soft_td_t *std = ox->ox_stds[i]; 3132 if (std != NULL) 3133 break; 3134 if (std != opipe->tail.td) 3135 ohci_free_std_locked(sc, std); 3136 } 3137 mutex_exit(&sc->sc_lock); 3138 3139 if (ox->ox_nstd) { 3140 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 3141 kmem_free(ox->ox_stds, sz); 3142 } 3143 } 3144 3145 Static usbd_status 3146 ohci_device_intr_transfer(struct usbd_xfer *xfer) 3147 { 3148 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3149 usbd_status err; 3150 3151 /* Insert last in queue. */ 3152 mutex_enter(&sc->sc_lock); 3153 err = usb_insert_transfer(xfer); 3154 mutex_exit(&sc->sc_lock); 3155 if (err) 3156 return err; 3157 3158 /* Pipe isn't running, start first */ 3159 return ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 3160 } 3161 3162 Static usbd_status 3163 ohci_device_intr_start(struct usbd_xfer *xfer) 3164 { 3165 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3166 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3167 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3168 ohci_soft_ed_t *sed = opipe->sed; 3169 ohci_soft_td_t *data, *last, *tail; 3170 int len, isread, endpt; 3171 3172 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3173 3174 if (sc->sc_dying) 3175 return USBD_IOERROR; 3176 3177 DPRINTFN(3, "xfer=%p len=%d flags=%d priv=%p", xfer, xfer->ux_length, 3178 xfer->ux_flags, xfer->ux_priv); 3179 3180 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3181 3182 len = xfer->ux_length; 3183 endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 3184 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3185 3186 mutex_enter(&sc->sc_lock); 3187 3188 /* 3189 * Use the pipe "tail" TD as our first and loan our first TD to the 3190 * next transfer. 3191 */ 3192 data = opipe->tail.td; 3193 opipe->tail.td = ox->ox_stds[0]; 3194 ox->ox_stds[0] = data; 3195 ohci_reset_std_chain(sc, xfer, len, isread, data, &last); 3196 3197 /* point at sentinel */ 3198 tail = opipe->tail.td; 3199 memset(&tail->td, 0, sizeof(tail->td)); 3200 tail->nexttd = NULL; 3201 tail->xfer = NULL; 3202 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 3203 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3204 xfer->ux_hcpriv = data; 3205 3206 DPRINTFN(8, "data %p tail %p", ox->ox_stds[0], tail, 0, 0); 3207 KASSERT(opipe->tail.td == tail); 3208 3209 /* We want interrupt at the end of the transfer. */ 3210 last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3211 last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3212 3213 last->td.td_nexttd = HTOO32(tail->physaddr); 3214 last->nexttd = tail; 3215 last->flags |= OHCI_CALL_DONE; 3216 usb_syncmem(&last->dma, last->offs, sizeof(last->td), 3217 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3218 3219 #ifdef OHCI_DEBUG 3220 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 3221 if (ohcidebug >= 5) { 3222 ohci_dump_ed(sc, sed); 3223 ohci_dump_tds(sc, data); 3224 } 3225 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 3226 #endif 3227 3228 /* Insert ED in schedule */ 3229 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3230 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3231 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3232 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3233 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3234 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3235 3236 mutex_exit(&sc->sc_lock); 3237 3238 return USBD_IN_PROGRESS; 3239 } 3240 3241 /* Abort a device interrupt request. */ 3242 Static void 3243 ohci_device_intr_abort(struct usbd_xfer *xfer) 3244 { 3245 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 3246 3247 KASSERT(mutex_owned(&sc->sc_lock)); 3248 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 3249 3250 ohci_abort_xfer(xfer, USBD_CANCELLED); 3251 } 3252 3253 /* Close a device interrupt pipe. */ 3254 Static void 3255 ohci_device_intr_close(struct usbd_pipe *pipe) 3256 { 3257 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3258 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3259 int nslots = opipe->intr.nslots; 3260 int pos = opipe->intr.pos; 3261 int j; 3262 ohci_soft_ed_t *p, *sed = opipe->sed; 3263 3264 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3265 3266 KASSERT(mutex_owned(&sc->sc_lock)); 3267 3268 DPRINTFN(1, "pipe=%p nslots=%d pos=%d", pipe, nslots, pos, 0); 3269 usb_syncmem(&sed->dma, sed->offs, 3270 sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3271 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3272 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3273 sizeof(sed->ed.ed_flags), 3274 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3275 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3276 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3277 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); 3278 3279 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3280 continue; 3281 KASSERT(p); 3282 p->next = sed->next; 3283 p->ed.ed_nexted = sed->ed.ed_nexted; 3284 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 3285 sizeof(p->ed.ed_nexted), 3286 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3287 3288 for (j = 0; j < nslots; j++) 3289 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3290 3291 ohci_free_std_locked(sc, opipe->tail.td); 3292 ohci_free_sed_locked(sc, opipe->sed); 3293 } 3294 3295 Static usbd_status 3296 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3297 { 3298 int i, j, best; 3299 u_int npoll, slow, shigh, nslots; 3300 u_int bestbw, bw; 3301 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3302 3303 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3304 3305 DPRINTFN(2, "pipe=%p", opipe, 0, 0, 0); 3306 if (ival == 0) { 3307 printf("ohci_setintr: 0 interval\n"); 3308 return USBD_INVAL; 3309 } 3310 3311 npoll = OHCI_NO_INTRS; 3312 while (npoll > ival) 3313 npoll /= 2; 3314 DPRINTFN(2, "ival=%d npoll=%d", ival, npoll, 0, 0); 3315 3316 /* 3317 * We now know which level in the tree the ED must go into. 3318 * Figure out which slot has most bandwidth left over. 3319 * Slots to examine: 3320 * npoll 3321 * 1 0 3322 * 2 1 2 3323 * 4 3 4 5 6 3324 * 8 7 8 9 10 11 12 13 14 3325 * N (N-1) .. (N-1+N-1) 3326 */ 3327 slow = npoll-1; 3328 shigh = slow + npoll; 3329 nslots = OHCI_NO_INTRS / npoll; 3330 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3331 bw = 0; 3332 for (j = 0; j < nslots; j++) 3333 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3334 if (bw < bestbw) { 3335 best = i; 3336 bestbw = bw; 3337 } 3338 } 3339 DPRINTFN(2, "best=%d(%d..%d) bestbw=%d", best, slow, shigh, bestbw); 3340 3341 mutex_enter(&sc->sc_lock); 3342 hsed = sc->sc_eds[best]; 3343 sed->next = hsed->next; 3344 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3345 sizeof(hsed->ed.ed_flags), 3346 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3347 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3348 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3349 sizeof(sed->ed.ed_flags), 3350 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3351 hsed->next = sed; 3352 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3353 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3354 sizeof(hsed->ed.ed_flags), 3355 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3356 mutex_exit(&sc->sc_lock); 3357 3358 for (j = 0; j < nslots; j++) 3359 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3360 opipe->intr.nslots = nslots; 3361 opipe->intr.pos = best; 3362 3363 DPRINTFN(5, "returns %p", opipe, 0, 0, 0); 3364 return USBD_NORMAL_COMPLETION; 3365 } 3366 3367 /***********************/ 3368 3369 Static int 3370 ohci_device_isoc_init(struct usbd_xfer *xfer) 3371 { 3372 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3373 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3374 ohci_soft_itd_t *sitd; 3375 size_t i; 3376 int err; 3377 3378 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3379 3380 DPRINTFN(1, "xfer %p len %d flags %d", xfer, xfer->ux_length, 3381 xfer->ux_flags, 0); 3382 3383 const size_t nfsitd = 3384 (xfer->ux_nframes + OHCI_ITD_NOFFSET - 1) / OHCI_ITD_NOFFSET; 3385 const size_t nbsitd = xfer->ux_bufsize / OHCI_PAGE_SIZE; 3386 const size_t nsitd = MAX(nfsitd, nbsitd) + 1; 3387 3388 ox->ox_sitds = kmem_zalloc(sizeof(ohci_soft_itd_t *) * nsitd, 3389 KM_SLEEP); 3390 ox->ox_nsitd = nsitd; 3391 3392 for (i = 0; i < nsitd; i++) { 3393 /* Allocate next ITD */ 3394 sitd = ohci_alloc_sitd(sc); 3395 if (sitd == NULL) { 3396 err = ENOMEM; 3397 goto fail; 3398 } 3399 ox->ox_sitds[i] = sitd; 3400 sitd->xfer = xfer; 3401 sitd->flags = 0; 3402 } 3403 3404 return 0; 3405 fail: 3406 for (; i > 0;) { 3407 ohci_free_sitd(sc, ox->ox_sitds[--i]); 3408 } 3409 return err; 3410 } 3411 3412 Static void 3413 ohci_device_isoc_fini(struct usbd_xfer *xfer) 3414 { 3415 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3416 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3417 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3418 3419 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3420 3421 mutex_enter(&sc->sc_lock); 3422 for (size_t i = 0; i < ox->ox_nsitd; i++) { 3423 if (ox->ox_sitds[i] != opipe->tail.itd) { 3424 ohci_free_sitd_locked(sc, ox->ox_sitds[i]); 3425 } 3426 } 3427 mutex_exit(&sc->sc_lock); 3428 3429 if (ox->ox_nsitd) { 3430 const size_t sz = sizeof(ohci_soft_itd_t *) * ox->ox_nsitd; 3431 kmem_free(ox->ox_sitds, sz); 3432 } 3433 } 3434 3435 3436 usbd_status 3437 ohci_device_isoc_transfer(struct usbd_xfer *xfer) 3438 { 3439 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3440 usbd_status __diagused err; 3441 3442 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3443 3444 DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0); 3445 3446 /* Put it on our queue, */ 3447 mutex_enter(&sc->sc_lock); 3448 err = usb_insert_transfer(xfer); 3449 mutex_exit(&sc->sc_lock); 3450 3451 KASSERT(err == USBD_NORMAL_COMPLETION); 3452 3453 /* insert into schedule, */ 3454 ohci_device_isoc_enter(xfer); 3455 3456 /* and start if the pipe wasn't running */ 3457 return USBD_IN_PROGRESS; 3458 } 3459 3460 void 3461 ohci_device_isoc_enter(struct usbd_xfer *xfer) 3462 { 3463 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3464 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3465 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3466 ohci_soft_ed_t *sed = opipe->sed; 3467 ohci_soft_itd_t *sitd, *nsitd, *tail; 3468 ohci_physaddr_t buf, offs, noffs, bp0; 3469 int i, ncur, nframes; 3470 3471 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3472 DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0); 3473 3474 mutex_enter(&sc->sc_lock); 3475 3476 if (sc->sc_dying) { 3477 mutex_exit(&sc->sc_lock); 3478 return; 3479 } 3480 3481 struct isoc *isoc = &opipe->isoc; 3482 3483 DPRINTFN(1, "used=%d next=%d xfer=%p nframes=%d", 3484 isoc->inuse, isoc->next, xfer, xfer->ux_nframes); 3485 3486 if (isoc->next == -1) { 3487 /* Not in use yet, schedule it a few frames ahead. */ 3488 isoc->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3489 DPRINTFN(2,"start next=%d", isoc->next, 0, 0, 0); 3490 } 3491 3492 sitd = opipe->tail.itd; 3493 opipe->tail.itd = ox->ox_sitds[0]; 3494 ox->ox_sitds[0] = sitd; 3495 3496 buf = DMAADDR(&xfer->ux_dmabuf, 0); 3497 bp0 = OHCI_PAGE(buf); 3498 offs = OHCI_PAGE_OFFSET(buf); 3499 nframes = xfer->ux_nframes; 3500 xfer->ux_hcpriv = sitd; 3501 size_t j = 1; 3502 for (i = ncur = 0; i < nframes; i++, ncur++) { 3503 noffs = offs + xfer->ux_frlengths[i]; 3504 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3505 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3506 3507 /* Allocate next ITD */ 3508 nsitd = ox->ox_sitds[j++]; 3509 KASSERT(nsitd != NULL); 3510 KASSERT(j < ox->ox_nsitd); 3511 3512 /* Fill current ITD */ 3513 sitd->itd.itd_flags = HTOO32( 3514 OHCI_ITD_NOCC | 3515 OHCI_ITD_SET_SF(isoc->next) | 3516 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3517 OHCI_ITD_SET_FC(ncur)); 3518 sitd->itd.itd_bp0 = HTOO32(bp0); 3519 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3520 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3521 sitd->nextitd = nsitd; 3522 sitd->xfer = xfer; 3523 sitd->flags = 0; 3524 #ifdef DIAGNOSTIC 3525 sitd->isdone = false; 3526 #endif 3527 ohci_hash_add_itd(sc, sitd); 3528 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3529 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3530 3531 sitd = nsitd; 3532 isoc->next = isoc->next + ncur; 3533 bp0 = OHCI_PAGE(buf + offs); 3534 ncur = 0; 3535 } 3536 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3537 /* XXX Sync */ 3538 offs = noffs; 3539 } 3540 KASSERT(j <= ox->ox_nsitd); 3541 3542 /* point at sentinel */ 3543 tail = opipe->tail.itd; 3544 memset(&tail->itd, 0, sizeof(tail->itd)); 3545 tail->nextitd = NULL; 3546 tail->xfer = NULL; 3547 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->itd), 3548 BUS_DMASYNC_PREWRITE); 3549 3550 /* Fixup last used ITD */ 3551 sitd->itd.itd_flags = HTOO32( 3552 OHCI_ITD_NOCC | 3553 OHCI_ITD_SET_SF(isoc->next) | 3554 OHCI_ITD_SET_DI(0) | 3555 OHCI_ITD_SET_FC(ncur)); 3556 sitd->itd.itd_bp0 = HTOO32(bp0); 3557 sitd->itd.itd_nextitd = HTOO32(tail->physaddr); 3558 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3559 sitd->nextitd = tail; 3560 sitd->xfer = xfer; 3561 sitd->flags = OHCI_CALL_DONE; 3562 #ifdef DIAGNOSTIC 3563 sitd->isdone = false; 3564 #endif 3565 ohci_hash_add_itd(sc, sitd); 3566 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3567 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3568 3569 isoc->next = isoc->next + ncur; 3570 isoc->inuse += nframes; 3571 3572 /* XXX pretend we did it all */ 3573 xfer->ux_actlen = offs; 3574 xfer->ux_status = USBD_IN_PROGRESS; 3575 3576 #ifdef OHCI_DEBUG 3577 if (ohcidebug >= 5) { 3578 DPRINTF("frame=%d", O32TOH(sc->sc_hcca->hcca_frame_number), 3579 0, 0, 0); 3580 ohci_dump_itds(sc, xfer->ux_hcpriv); 3581 ohci_dump_ed(sc, sed); 3582 } 3583 #endif 3584 3585 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3586 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3587 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3588 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3589 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3590 sizeof(sed->ed.ed_flags), 3591 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3592 mutex_exit(&sc->sc_lock); 3593 } 3594 3595 void 3596 ohci_device_isoc_abort(struct usbd_xfer *xfer) 3597 { 3598 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3599 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3600 ohci_soft_ed_t *sed; 3601 ohci_soft_itd_t *sitd; 3602 3603 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3604 DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0); 3605 3606 KASSERT(mutex_owned(&sc->sc_lock)); 3607 3608 /* Transfer is already done. */ 3609 if (xfer->ux_status != USBD_NOT_STARTED && 3610 xfer->ux_status != USBD_IN_PROGRESS) { 3611 printf("ohci_device_isoc_abort: early return\n"); 3612 goto done; 3613 } 3614 3615 /* Give xfer the requested abort code. */ 3616 xfer->ux_status = USBD_CANCELLED; 3617 3618 sed = opipe->sed; 3619 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3620 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3621 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3622 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3623 sizeof(sed->ed.ed_flags), 3624 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3625 3626 sitd = xfer->ux_hcpriv; 3627 KASSERT(sitd); 3628 3629 usb_delay_ms_locked(&sc->sc_bus, OHCI_ITD_NOFFSET, &sc->sc_lock); 3630 3631 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3632 ohci_hash_rem_itd(sc, sitd); 3633 #ifdef DIAGNOSTIC 3634 DPRINTFN(1, "abort sets done sitd=%p", sitd, 0, 0, 0); 3635 sitd->isdone = true; 3636 #endif 3637 } 3638 3639 /* Run callback. */ 3640 usb_transfer_complete(xfer); 3641 3642 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3643 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3644 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3645 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3646 3647 done: 3648 KASSERT(mutex_owned(&sc->sc_lock)); 3649 } 3650 3651 void 3652 ohci_device_isoc_done(struct usbd_xfer *xfer) 3653 { 3654 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3655 DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0); 3656 } 3657 3658 usbd_status 3659 ohci_setup_isoc(struct usbd_pipe *pipe) 3660 { 3661 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3662 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3663 struct isoc *isoc = &opipe->isoc; 3664 3665 isoc->next = -1; 3666 isoc->inuse = 0; 3667 3668 mutex_enter(&sc->sc_lock); 3669 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3670 mutex_exit(&sc->sc_lock); 3671 3672 return USBD_NORMAL_COMPLETION; 3673 } 3674 3675 void 3676 ohci_device_isoc_close(struct usbd_pipe *pipe) 3677 { 3678 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3679 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3680 3681 KASSERT(mutex_owned(&sc->sc_lock)); 3682 3683 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3684 DPRINTF("pipe=%p", pipe, 0, 0, 0); 3685 ohci_close_pipe(pipe, sc->sc_isoc_head); 3686 #ifdef DIAGNOSTIC 3687 opipe->tail.itd->isdone = true; 3688 #endif 3689 ohci_free_sitd_locked(sc, opipe->tail.itd); 3690 } 3691
Indexes created Tue Sep 23 07:09:52 GMT 2025