ohci.c revision 1.273.6.4
1 /* $NetBSD: ohci.c,v 1.273.6.4 2018/09/27 14:52:26 martin Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2004, 2005, 2012 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) at 9 * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca) 10 * and Matthew R. Green (mrg (at) eterna.com.au). 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * USB Open Host Controller driver. 38 * 39 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 40 * USB spec: http://www.usb.org/developers/docs/ 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.273.6.4 2018/09/27 14:52:26 martin Exp $"); 45 46 #ifdef _KERNEL_OPT 47 #include "opt_usb.h" 48 #endif 49 50 #include <sys/param.h> 51 52 #include <sys/cpu.h> 53 #include <sys/device.h> 54 #include <sys/kernel.h> 55 #include <sys/kmem.h> 56 #include <sys/proc.h> 57 #include <sys/queue.h> 58 #include <sys/select.h> 59 #include <sys/sysctl.h> 60 #include <sys/systm.h> 61 62 #include <machine/endian.h> 63 64 #include <dev/usb/usb.h> 65 #include <dev/usb/usbdi.h> 66 #include <dev/usb/usbdivar.h> 67 #include <dev/usb/usb_mem.h> 68 #include <dev/usb/usb_quirks.h> 69 70 #include <dev/usb/ohcireg.h> 71 #include <dev/usb/ohcivar.h> 72 #include <dev/usb/usbroothub.h> 73 #include <dev/usb/usbhist.h> 74 75 #ifdef USB_DEBUG 76 #ifndef OHCI_DEBUG 77 #define ohcidebug 0 78 #else 79 static int ohcidebug = 10; 80 81 SYSCTL_SETUP(sysctl_hw_ohci_setup, "sysctl hw.ohci setup") 82 { 83 int err; 84 const struct sysctlnode *rnode; 85 const struct sysctlnode *cnode; 86 87 err = sysctl_createv(clog, 0, NULL, &rnode, 88 CTLFLAG_PERMANENT, CTLTYPE_NODE, "ohci", 89 SYSCTL_DESCR("ohci global controls"), 90 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); 91 92 if (err) 93 goto fail; 94 95 /* control debugging printfs */ 96 err = sysctl_createv(clog, 0, &rnode, &cnode, 97 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, 98 "debug", SYSCTL_DESCR("Enable debugging output"), 99 NULL, 0, &ohcidebug, sizeof(ohcidebug), CTL_CREATE, CTL_EOL); 100 if (err) 101 goto fail; 102 103 return; 104 fail: 105 aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err); 106 } 107 108 #endif /* OHCI_DEBUG */ 109 #endif /* USB_DEBUG */ 110 111 #define DPRINTF(FMT,A,B,C,D) USBHIST_LOG(ohcidebug,FMT,A,B,C,D) 112 #define DPRINTFN(N,FMT,A,B,C,D) USBHIST_LOGN(ohcidebug,N,FMT,A,B,C,D) 113 #define OHCIHIST_FUNC() USBHIST_FUNC() 114 #define OHCIHIST_CALLED(name) USBHIST_CALLED(ohcidebug) 115 116 #if BYTE_ORDER == BIG_ENDIAN 117 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 118 #else 119 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 120 #endif 121 122 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 123 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 124 #define HTOO16(val) O16TOH(val) 125 #define HTOO32(val) O32TOH(val) 126 127 struct ohci_pipe; 128 129 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 130 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 131 132 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 133 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 134 Static void ohci_free_std_locked(ohci_softc_t *, ohci_soft_td_t *); 135 136 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 137 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 138 Static void ohci_free_sitd_locked(ohci_softc_t *, 139 ohci_soft_itd_t *); 140 141 Static int ohci_alloc_std_chain(ohci_softc_t *, struct usbd_xfer *, 142 int, int); 143 Static void ohci_free_stds(ohci_softc_t *, struct ohci_xfer *); 144 145 Static void ohci_reset_std_chain(ohci_softc_t *, struct usbd_xfer *, 146 int, int, ohci_soft_td_t *, ohci_soft_td_t **); 147 148 Static usbd_status ohci_open(struct usbd_pipe *); 149 Static void ohci_poll(struct usbd_bus *); 150 Static void ohci_softintr(void *); 151 Static void ohci_rhsc(ohci_softc_t *, struct usbd_xfer *); 152 Static void ohci_rhsc_softint(void *); 153 154 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 155 ohci_soft_ed_t *); 156 157 Static void ohci_rem_ed(ohci_softc_t *, ohci_soft_ed_t *, 158 ohci_soft_ed_t *); 159 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 160 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 161 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 162 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 163 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 164 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 165 166 Static usbd_status ohci_setup_isoc(struct usbd_pipe *); 167 Static void ohci_device_isoc_enter(struct usbd_xfer *); 168 169 Static struct usbd_xfer * 170 ohci_allocx(struct usbd_bus *, unsigned int); 171 Static void ohci_freex(struct usbd_bus *, struct usbd_xfer *); 172 Static void ohci_get_lock(struct usbd_bus *, kmutex_t **); 173 Static int ohci_roothub_ctrl(struct usbd_bus *, 174 usb_device_request_t *, void *, int); 175 176 Static usbd_status ohci_root_intr_transfer(struct usbd_xfer *); 177 Static usbd_status ohci_root_intr_start(struct usbd_xfer *); 178 Static void ohci_root_intr_abort(struct usbd_xfer *); 179 Static void ohci_root_intr_close(struct usbd_pipe *); 180 Static void ohci_root_intr_done(struct usbd_xfer *); 181 182 Static int ohci_device_ctrl_init(struct usbd_xfer *); 183 Static void ohci_device_ctrl_fini(struct usbd_xfer *); 184 Static usbd_status ohci_device_ctrl_transfer(struct usbd_xfer *); 185 Static usbd_status ohci_device_ctrl_start(struct usbd_xfer *); 186 Static void ohci_device_ctrl_abort(struct usbd_xfer *); 187 Static void ohci_device_ctrl_close(struct usbd_pipe *); 188 Static void ohci_device_ctrl_done(struct usbd_xfer *); 189 190 Static int ohci_device_bulk_init(struct usbd_xfer *); 191 Static void ohci_device_bulk_fini(struct usbd_xfer *); 192 Static usbd_status ohci_device_bulk_transfer(struct usbd_xfer *); 193 Static usbd_status ohci_device_bulk_start(struct usbd_xfer *); 194 Static void ohci_device_bulk_abort(struct usbd_xfer *); 195 Static void ohci_device_bulk_close(struct usbd_pipe *); 196 Static void ohci_device_bulk_done(struct usbd_xfer *); 197 198 Static int ohci_device_intr_init(struct usbd_xfer *); 199 Static void ohci_device_intr_fini(struct usbd_xfer *); 200 Static usbd_status ohci_device_intr_transfer(struct usbd_xfer *); 201 Static usbd_status ohci_device_intr_start(struct usbd_xfer *); 202 Static void ohci_device_intr_abort(struct usbd_xfer *); 203 Static void ohci_device_intr_close(struct usbd_pipe *); 204 Static void ohci_device_intr_done(struct usbd_xfer *); 205 206 Static int ohci_device_isoc_init(struct usbd_xfer *); 207 Static void ohci_device_isoc_fini(struct usbd_xfer *); 208 Static usbd_status ohci_device_isoc_transfer(struct usbd_xfer *); 209 Static void ohci_device_isoc_abort(struct usbd_xfer *); 210 Static void ohci_device_isoc_close(struct usbd_pipe *); 211 Static void ohci_device_isoc_done(struct usbd_xfer *); 212 213 Static usbd_status ohci_device_setintr(ohci_softc_t *, 214 struct ohci_pipe *, int); 215 216 Static void ohci_timeout(void *); 217 Static void ohci_timeout_task(void *); 218 Static void ohci_rhsc_enable(void *); 219 220 Static void ohci_close_pipe(struct usbd_pipe *, ohci_soft_ed_t *); 221 Static void ohci_abort_xfer(struct usbd_xfer *, usbd_status); 222 223 Static void ohci_device_clear_toggle(struct usbd_pipe *); 224 Static void ohci_noop(struct usbd_pipe *); 225 226 #ifdef OHCI_DEBUG 227 Static void ohci_dumpregs(ohci_softc_t *); 228 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 229 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 230 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 231 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 232 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 233 #endif 234 235 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 236 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 237 #define OWRITE1(sc, r, x) \ 238 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 239 #define OWRITE2(sc, r, x) \ 240 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 241 #define OWRITE4(sc, r, x) \ 242 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 243 244 static __inline uint32_t 245 OREAD4(ohci_softc_t *sc, bus_size_t r) 246 { 247 248 OBARR(sc); 249 return bus_space_read_4(sc->iot, sc->ioh, r); 250 } 251 252 /* Reverse the bits in a value 0 .. 31 */ 253 Static uint8_t revbits[OHCI_NO_INTRS] = 254 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 255 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 256 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 257 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 258 259 struct ohci_pipe { 260 struct usbd_pipe pipe; 261 ohci_soft_ed_t *sed; 262 union { 263 ohci_soft_td_t *td; 264 ohci_soft_itd_t *itd; 265 } tail; 266 /* Info needed for different pipe kinds. */ 267 union { 268 /* Control pipe */ 269 struct { 270 usb_dma_t reqdma; 271 } ctrl; 272 /* Interrupt pipe */ 273 struct { 274 int nslots; 275 int pos; 276 } intr; 277 /* Isochronous pipe */ 278 struct isoc { 279 int next, inuse; 280 } isoc; 281 }; 282 }; 283 284 Static const struct usbd_bus_methods ohci_bus_methods = { 285 .ubm_open = ohci_open, 286 .ubm_softint = ohci_softintr, 287 .ubm_dopoll = ohci_poll, 288 .ubm_allocx = ohci_allocx, 289 .ubm_freex = ohci_freex, 290 .ubm_getlock = ohci_get_lock, 291 .ubm_rhctrl = ohci_roothub_ctrl, 292 }; 293 294 Static const struct usbd_pipe_methods ohci_root_intr_methods = { 295 .upm_transfer = ohci_root_intr_transfer, 296 .upm_start = ohci_root_intr_start, 297 .upm_abort = ohci_root_intr_abort, 298 .upm_close = ohci_root_intr_close, 299 .upm_cleartoggle = ohci_noop, 300 .upm_done = ohci_root_intr_done, 301 }; 302 303 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = { 304 .upm_init = ohci_device_ctrl_init, 305 .upm_fini = ohci_device_ctrl_fini, 306 .upm_transfer = ohci_device_ctrl_transfer, 307 .upm_start = ohci_device_ctrl_start, 308 .upm_abort = ohci_device_ctrl_abort, 309 .upm_close = ohci_device_ctrl_close, 310 .upm_cleartoggle = ohci_noop, 311 .upm_done = ohci_device_ctrl_done, 312 }; 313 314 Static const struct usbd_pipe_methods ohci_device_intr_methods = { 315 .upm_init = ohci_device_intr_init, 316 .upm_fini = ohci_device_intr_fini, 317 .upm_transfer = ohci_device_intr_transfer, 318 .upm_start = ohci_device_intr_start, 319 .upm_abort = ohci_device_intr_abort, 320 .upm_close = ohci_device_intr_close, 321 .upm_cleartoggle = ohci_device_clear_toggle, 322 .upm_done = ohci_device_intr_done, 323 }; 324 325 Static const struct usbd_pipe_methods ohci_device_bulk_methods = { 326 .upm_init = ohci_device_bulk_init, 327 .upm_fini = ohci_device_bulk_fini, 328 .upm_transfer = ohci_device_bulk_transfer, 329 .upm_start = ohci_device_bulk_start, 330 .upm_abort = ohci_device_bulk_abort, 331 .upm_close = ohci_device_bulk_close, 332 .upm_cleartoggle = ohci_device_clear_toggle, 333 .upm_done = ohci_device_bulk_done, 334 }; 335 336 Static const struct usbd_pipe_methods ohci_device_isoc_methods = { 337 .upm_init = ohci_device_isoc_init, 338 .upm_fini = ohci_device_isoc_fini, 339 .upm_transfer = ohci_device_isoc_transfer, 340 .upm_abort = ohci_device_isoc_abort, 341 .upm_close = ohci_device_isoc_close, 342 .upm_cleartoggle = ohci_noop, 343 .upm_done = ohci_device_isoc_done, 344 }; 345 346 int 347 ohci_activate(device_t self, enum devact act) 348 { 349 struct ohci_softc *sc = device_private(self); 350 351 switch (act) { 352 case DVACT_DEACTIVATE: 353 sc->sc_dying = 1; 354 return 0; 355 default: 356 return EOPNOTSUPP; 357 } 358 } 359 360 void 361 ohci_childdet(device_t self, device_t child) 362 { 363 struct ohci_softc *sc = device_private(self); 364 365 KASSERT(sc->sc_child == child); 366 sc->sc_child = NULL; 367 } 368 369 int 370 ohci_detach(struct ohci_softc *sc, int flags) 371 { 372 int rv = 0; 373 374 if (sc->sc_child != NULL) 375 rv = config_detach(sc->sc_child, flags); 376 377 if (rv != 0) 378 return rv; 379 380 callout_halt(&sc->sc_tmo_rhsc, &sc->sc_lock); 381 382 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 383 callout_destroy(&sc->sc_tmo_rhsc); 384 385 softint_disestablish(sc->sc_rhsc_si); 386 387 mutex_destroy(&sc->sc_lock); 388 mutex_destroy(&sc->sc_intr_lock); 389 390 if (sc->sc_hcca != NULL) 391 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 392 pool_cache_destroy(sc->sc_xferpool); 393 394 return rv; 395 } 396 397 ohci_soft_ed_t * 398 ohci_alloc_sed(ohci_softc_t *sc) 399 { 400 ohci_soft_ed_t *sed; 401 usbd_status err; 402 int i, offs; 403 usb_dma_t dma; 404 405 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 406 407 mutex_enter(&sc->sc_lock); 408 if (sc->sc_freeeds == NULL) { 409 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 410 mutex_exit(&sc->sc_lock); 411 412 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 413 OHCI_ED_ALIGN, &dma); 414 if (err) 415 return 0; 416 417 mutex_enter(&sc->sc_lock); 418 for (i = 0; i < OHCI_SED_CHUNK; i++) { 419 offs = i * OHCI_SED_SIZE; 420 sed = KERNADDR(&dma, offs); 421 sed->physaddr = DMAADDR(&dma, offs); 422 sed->dma = dma; 423 sed->offs = offs; 424 sed->next = sc->sc_freeeds; 425 sc->sc_freeeds = sed; 426 } 427 } 428 sed = sc->sc_freeeds; 429 sc->sc_freeeds = sed->next; 430 mutex_exit(&sc->sc_lock); 431 432 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 433 sed->next = 0; 434 return sed; 435 } 436 437 static inline void 438 ohci_free_sed_locked(ohci_softc_t *sc, ohci_soft_ed_t *sed) 439 { 440 441 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 442 443 sed->next = sc->sc_freeeds; 444 sc->sc_freeeds = sed; 445 } 446 447 void 448 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 449 { 450 451 mutex_enter(&sc->sc_lock); 452 ohci_free_sed_locked(sc, sed); 453 mutex_exit(&sc->sc_lock); 454 } 455 456 ohci_soft_td_t * 457 ohci_alloc_std(ohci_softc_t *sc) 458 { 459 ohci_soft_td_t *std; 460 usbd_status err; 461 int i, offs; 462 usb_dma_t dma; 463 464 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 465 466 mutex_enter(&sc->sc_lock); 467 if (sc->sc_freetds == NULL) { 468 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 469 mutex_exit(&sc->sc_lock); 470 471 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 472 OHCI_TD_ALIGN, &dma); 473 if (err) 474 return NULL; 475 476 mutex_enter(&sc->sc_lock); 477 for (i = 0; i < OHCI_STD_CHUNK; i++) { 478 offs = i * OHCI_STD_SIZE; 479 std = KERNADDR(&dma, offs); 480 std->physaddr = DMAADDR(&dma, offs); 481 std->dma = dma; 482 std->offs = offs; 483 std->nexttd = sc->sc_freetds; 484 sc->sc_freetds = std; 485 } 486 } 487 488 std = sc->sc_freetds; 489 sc->sc_freetds = std->nexttd; 490 mutex_exit(&sc->sc_lock); 491 492 memset(&std->td, 0, sizeof(ohci_td_t)); 493 std->nexttd = NULL; 494 std->xfer = NULL; 495 496 return std; 497 } 498 499 void 500 ohci_free_std_locked(ohci_softc_t *sc, ohci_soft_td_t *std) 501 { 502 503 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 504 505 std->nexttd = sc->sc_freetds; 506 sc->sc_freetds = std; 507 } 508 509 void 510 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 511 { 512 513 mutex_enter(&sc->sc_lock); 514 ohci_free_std_locked(sc, std); 515 mutex_exit(&sc->sc_lock); 516 } 517 518 Static int 519 ohci_alloc_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, int length, int rd) 520 { 521 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 522 uint16_t flags = xfer->ux_flags; 523 524 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 525 526 DPRINTFN(8, "addr=%jd endpt=%jd len=%jd speed=%jd", 527 xfer->ux_pipe->up_dev->ud_addr, 528 UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress), 529 length, xfer->ux_pipe->up_dev->ud_speed); 530 531 ASSERT_SLEEPABLE(); 532 KASSERT(length != 0 || (!rd && (flags & USBD_FORCE_SHORT_XFER))); 533 534 size_t nstd = (!rd && (flags & USBD_FORCE_SHORT_XFER)) ? 1 : 0; 535 nstd += ((length + OHCI_PAGE_SIZE - 1) / OHCI_PAGE_SIZE); 536 ox->ox_stds = kmem_zalloc(sizeof(ohci_soft_td_t *) * nstd, 537 KM_SLEEP); 538 ox->ox_nstd = nstd; 539 540 DPRINTFN(8, "xfer %#jx nstd %jd", (uintptr_t)xfer, nstd, 0, 0); 541 542 for (size_t j = 0; j < ox->ox_nstd;) { 543 ohci_soft_td_t *cur = ohci_alloc_std(sc); 544 if (cur == NULL) 545 goto nomem; 546 547 ox->ox_stds[j++] = cur; 548 cur->xfer = xfer; 549 cur->flags = 0; 550 } 551 552 return 0; 553 554 nomem: 555 ohci_free_stds(sc, ox); 556 kmem_free(ox->ox_stds, sizeof(ohci_soft_td_t *) * nstd); 557 558 return ENOMEM; 559 } 560 561 Static void 562 ohci_free_stds(ohci_softc_t *sc, struct ohci_xfer *ox) 563 { 564 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 565 DPRINTF("ox=%#jx", (uintptr_t)ox, 0, 0, 0); 566 567 mutex_enter(&sc->sc_lock); 568 for (size_t i = 0; i < ox->ox_nstd; i++) { 569 ohci_soft_td_t *std = ox->ox_stds[i]; 570 if (std == NULL) 571 break; 572 ohci_free_std_locked(sc, std); 573 } 574 mutex_exit(&sc->sc_lock); 575 } 576 577 void 578 ohci_reset_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, 579 int alen, int rd, ohci_soft_td_t *sp, ohci_soft_td_t **ep) 580 { 581 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 582 ohci_soft_td_t *next, *cur; 583 int len, curlen; 584 usb_dma_t *dma = &xfer->ux_dmabuf; 585 uint16_t flags = xfer->ux_flags; 586 587 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 588 DPRINTF("start len=%jd", alen, 0, 0, 0); 589 590 KASSERT(mutex_owned(&sc->sc_lock)); 591 592 DPRINTFN(8, "addr=%jd endpt=%jd len=%jd speed=%jd", 593 xfer->ux_pipe->up_dev->ud_addr, 594 UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress), 595 alen, xfer->ux_pipe->up_dev->ud_speed); 596 597 KASSERT(sp); 598 599 int mps = UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize); 600 601 /* 602 * Assign next for the len == 0 case where we don't go through the 603 * main loop. 604 */ 605 len = alen; 606 cur = next = sp; 607 608 usb_syncmem(dma, 0, len, 609 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 610 const uint32_t tdflags = HTOO32( 611 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 612 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 613 614 size_t curoffs = 0; 615 for (size_t j = 1; len != 0;) { 616 if (j == ox->ox_nstd) 617 next = NULL; 618 else 619 next = ox->ox_stds[j++]; 620 KASSERT(next != cur); 621 622 curlen = 0; 623 const ohci_physaddr_t sdataphys = DMAADDR(dma, curoffs); 624 ohci_physaddr_t edataphys = DMAADDR(dma, curoffs + len - 1); 625 626 const ohci_physaddr_t sphyspg = OHCI_PAGE(sdataphys); 627 ohci_physaddr_t ephyspg = OHCI_PAGE(edataphys); 628 /* 629 * The OHCI hardware can handle at most one page 630 * crossing per TD 631 */ 632 curlen = len; 633 if (sphyspg != ephyspg && 634 sphyspg + OHCI_PAGE_SIZE != ephyspg) { 635 /* must use multiple TDs, fill as much as possible. */ 636 curlen = 2 * OHCI_PAGE_SIZE - 637 OHCI_PAGE_OFFSET(sdataphys); 638 /* the length must be a multiple of the max size */ 639 curlen -= curlen % mps; 640 edataphys = DMAADDR(dma, curoffs + curlen - 1); 641 } 642 KASSERT(curlen != 0); 643 DPRINTFN(4, "sdataphys=0x%08jx edataphys=0x%08jx " 644 "len=%jd curlen=%jd", sdataphys, edataphys, len, curlen); 645 646 cur->td.td_flags = tdflags; 647 cur->td.td_cbp = HTOO32(sdataphys); 648 cur->td.td_be = HTOO32(edataphys); 649 cur->td.td_nexttd = (next != NULL) ? HTOO32(next->physaddr) : 0; 650 cur->nexttd = next; 651 cur->len = curlen; 652 cur->flags = OHCI_ADD_LEN; 653 cur->xfer = xfer; 654 ohci_hash_add_td(sc, cur); 655 656 curoffs += curlen; 657 len -= curlen; 658 659 if (len != 0) { 660 KASSERT(next != NULL); 661 DPRINTFN(10, "extend chain", 0, 0, 0, 0); 662 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 663 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 664 665 cur = next; 666 } 667 } 668 cur->td.td_flags |= 669 HTOO32(xfer->ux_flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0); 670 671 if (!rd && 672 (flags & USBD_FORCE_SHORT_XFER) && 673 alen % mps == 0) { 674 /* We're adding a ZLP so sync the previous TD */ 675 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 676 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 677 678 /* Force a 0 length transfer at the end. */ 679 680 KASSERT(next != NULL); 681 cur = next; 682 683 cur->td.td_flags = tdflags; 684 cur->td.td_cbp = 0; /* indicate 0 length packet */ 685 cur->td.td_nexttd = 0; 686 cur->td.td_be = ~0; 687 cur->nexttd = NULL; 688 cur->len = 0; 689 cur->flags = 0; 690 cur->xfer = xfer; 691 ohci_hash_add_td(sc, cur); 692 693 DPRINTFN(2, "add 0 xfer", 0, 0, 0, 0); 694 } 695 696 /* Last TD gets usb_syncmem'ed by caller */ 697 *ep = cur; 698 } 699 700 ohci_soft_itd_t * 701 ohci_alloc_sitd(ohci_softc_t *sc) 702 { 703 ohci_soft_itd_t *sitd; 704 usbd_status err; 705 int i, offs; 706 usb_dma_t dma; 707 708 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 709 710 mutex_enter(&sc->sc_lock); 711 if (sc->sc_freeitds == NULL) { 712 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 713 mutex_exit(&sc->sc_lock); 714 715 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 716 OHCI_ITD_ALIGN, &dma); 717 if (err) 718 return NULL; 719 mutex_enter(&sc->sc_lock); 720 for (i = 0; i < OHCI_SITD_CHUNK; i++) { 721 offs = i * OHCI_SITD_SIZE; 722 sitd = KERNADDR(&dma, offs); 723 sitd->physaddr = DMAADDR(&dma, offs); 724 sitd->dma = dma; 725 sitd->offs = offs; 726 sitd->nextitd = sc->sc_freeitds; 727 sc->sc_freeitds = sitd; 728 } 729 } 730 731 sitd = sc->sc_freeitds; 732 sc->sc_freeitds = sitd->nextitd; 733 mutex_exit(&sc->sc_lock); 734 735 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 736 sitd->nextitd = NULL; 737 sitd->xfer = NULL; 738 739 #ifdef DIAGNOSTIC 740 sitd->isdone = true; 741 #endif 742 743 return sitd; 744 } 745 746 Static void 747 ohci_free_sitd_locked(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 748 { 749 750 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 751 DPRINTFN(10, "sitd=%#jx", (uintptr_t)sitd, 0, 0, 0); 752 753 KASSERT(sitd->isdone); 754 #ifdef DIAGNOSTIC 755 /* Warn double free */ 756 sitd->isdone = false; 757 #endif 758 759 sitd->nextitd = sc->sc_freeitds; 760 sc->sc_freeitds = sitd; 761 } 762 763 void 764 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 765 { 766 767 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 768 769 mutex_enter(&sc->sc_lock); 770 ohci_free_sitd_locked(sc, sitd); 771 mutex_exit(&sc->sc_lock); 772 } 773 774 int 775 ohci_init(ohci_softc_t *sc) 776 { 777 ohci_soft_ed_t *sed, *psed; 778 usbd_status err; 779 int i; 780 uint32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca /*, descb */; 781 782 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 783 784 aprint_normal_dev(sc->sc_dev, ""); 785 786 sc->sc_hcca = NULL; 787 callout_init(&sc->sc_tmo_rhsc, CALLOUT_MPSAFE); 788 789 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 790 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_USB); 791 792 sc->sc_rhsc_si = softint_establish(SOFTINT_USB | SOFTINT_MPSAFE, 793 ohci_rhsc_softint, sc); 794 795 for (i = 0; i < OHCI_HASH_SIZE; i++) 796 LIST_INIT(&sc->sc_hash_tds[i]); 797 for (i = 0; i < OHCI_HASH_SIZE; i++) 798 LIST_INIT(&sc->sc_hash_itds[i]); 799 800 sc->sc_xferpool = pool_cache_init(sizeof(struct ohci_xfer), 0, 0, 0, 801 "ohcixfer", NULL, IPL_USB, NULL, NULL, NULL); 802 803 rev = OREAD4(sc, OHCI_REVISION); 804 aprint_normal("OHCI version %d.%d%s\n", 805 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 806 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 807 808 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 809 aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n"); 810 sc->sc_bus.ub_revision = USBREV_UNKNOWN; 811 return -1; 812 } 813 sc->sc_bus.ub_revision = USBREV_1_0; 814 sc->sc_bus.ub_usedma = true; 815 816 /* XXX determine alignment by R/W */ 817 /* Allocate the HCCA area. */ 818 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 819 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 820 if (err) { 821 sc->sc_hcca = NULL; 822 return err; 823 } 824 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 825 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 826 827 sc->sc_eintrs = OHCI_NORMAL_INTRS; 828 829 /* Allocate dummy ED that starts the control list. */ 830 sc->sc_ctrl_head = ohci_alloc_sed(sc); 831 if (sc->sc_ctrl_head == NULL) { 832 err = ENOMEM; 833 goto bad1; 834 } 835 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 836 837 /* Allocate dummy ED that starts the bulk list. */ 838 sc->sc_bulk_head = ohci_alloc_sed(sc); 839 if (sc->sc_bulk_head == NULL) { 840 err = ENOMEM; 841 goto bad2; 842 } 843 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 844 usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs, 845 sizeof(sc->sc_bulk_head->ed), 846 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 847 848 /* Allocate dummy ED that starts the isochronous list. */ 849 sc->sc_isoc_head = ohci_alloc_sed(sc); 850 if (sc->sc_isoc_head == NULL) { 851 err = ENOMEM; 852 goto bad3; 853 } 854 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 855 usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs, 856 sizeof(sc->sc_isoc_head->ed), 857 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 858 859 /* Allocate all the dummy EDs that make up the interrupt tree. */ 860 for (i = 0; i < OHCI_NO_EDS; i++) { 861 sed = ohci_alloc_sed(sc); 862 if (sed == NULL) { 863 while (--i >= 0) 864 ohci_free_sed(sc, sc->sc_eds[i]); 865 err = ENOMEM; 866 goto bad4; 867 } 868 /* All ED fields are set to 0. */ 869 sc->sc_eds[i] = sed; 870 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 871 if (i != 0) 872 psed = sc->sc_eds[(i-1) / 2]; 873 else 874 psed= sc->sc_isoc_head; 875 sed->next = psed; 876 sed->ed.ed_nexted = HTOO32(psed->physaddr); 877 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 878 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 879 } 880 /* 881 * Fill HCCA interrupt table. The bit reversal is to get 882 * the tree set up properly to spread the interrupts. 883 */ 884 for (i = 0; i < OHCI_NO_INTRS; i++) 885 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 886 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 887 usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE, 888 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 889 890 #ifdef OHCI_DEBUG 891 DPRINTFN(15, "--- dump start ---", 0, 0, 0 ,0); 892 if (ohcidebug >= 15) { 893 for (i = 0; i < OHCI_NO_EDS; i++) { 894 DPRINTFN(15, "ed#%jd ", i, 0, 0, 0); 895 ohci_dump_ed(sc, sc->sc_eds[i]); 896 } 897 DPRINTFN(15, "iso", 0, 0, 0 ,0); 898 ohci_dump_ed(sc, sc->sc_isoc_head); 899 } 900 DPRINTFN(15, "--- dump end ---", 0, 0, 0 ,0); 901 #endif 902 903 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 904 ctl = OREAD4(sc, OHCI_CONTROL); 905 rwc = ctl & OHCI_RWC; 906 fm = OREAD4(sc, OHCI_FM_INTERVAL); 907 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 908 /* descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); */ 909 910 /* Determine in what context we are running. */ 911 if (ctl & OHCI_IR) { 912 /* SMM active, request change */ 913 DPRINTF("SMM active, request owner change", 0, 0, 0, 0); 914 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 915 (OHCI_OC | OHCI_MIE)) 916 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 917 s = OREAD4(sc, OHCI_COMMAND_STATUS); 918 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 919 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 920 usb_delay_ms(&sc->sc_bus, 1); 921 ctl = OREAD4(sc, OHCI_CONTROL); 922 } 923 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 924 if ((ctl & OHCI_IR) == 0) { 925 aprint_error_dev(sc->sc_dev, 926 "SMM does not respond, resetting\n"); 927 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 928 goto reset; 929 } 930 #if 0 931 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 932 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 933 /* BIOS started controller. */ 934 DPRINTF("BIOS active", 0, 0, 0, 0); 935 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 936 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 937 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 938 } 939 #endif 940 } else { 941 DPRINTF("cold started", 0 ,0 ,0 ,0); 942 reset: 943 /* Controller was cold started. */ 944 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 945 } 946 947 /* 948 * This reset should not be necessary according to the OHCI spec, but 949 * without it some controllers do not start. 950 */ 951 DPRINTF("sc %#jx: resetting", (uintptr_t)sc, 0, 0, 0); 952 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 953 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 954 955 /* We now own the host controller and the bus has been reset. */ 956 957 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 958 /* Nominal time for a reset is 10 us. */ 959 for (i = 0; i < 10; i++) { 960 delay(10); 961 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 962 if (!hcr) 963 break; 964 } 965 if (hcr) { 966 aprint_error_dev(sc->sc_dev, "reset timeout\n"); 967 err = EIO; 968 goto bad5; 969 } 970 #ifdef OHCI_DEBUG 971 if (ohcidebug >= 15) 972 ohci_dumpregs(sc); 973 #endif 974 975 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 976 977 /* Set up HC registers. */ 978 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 979 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 980 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 981 /* disable all interrupts and then switch on all desired interrupts */ 982 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 983 /* switch on desired functional features */ 984 ctl = OREAD4(sc, OHCI_CONTROL); 985 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 986 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 987 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 988 /* And finally start it! */ 989 OWRITE4(sc, OHCI_CONTROL, ctl); 990 991 /* 992 * The controller is now OPERATIONAL. Set a some final 993 * registers that should be set earlier, but that the 994 * controller ignores when in the SUSPEND state. 995 */ 996 ival = OHCI_GET_IVAL(fm); 997 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 998 fm |= OHCI_FSMPS(ival) | ival; 999 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 1000 per = OHCI_PERIODIC(ival); /* 90% periodic */ 1001 OWRITE4(sc, OHCI_PERIODIC_START, per); 1002 1003 if (sc->sc_flags & OHCIF_SUPERIO) { 1004 /* no overcurrent protection */ 1005 desca |= OHCI_NOCP; 1006 /* 1007 * Clear NoPowerSwitching and PowerOnToPowerGoodTime meaning 1008 * that 1009 * - ports are always power switched 1010 * - don't wait for powered root hub port 1011 */ 1012 desca &= ~(__SHIFTIN(0xff, OHCI_POTPGT_MASK) | OHCI_NPS); 1013 } 1014 1015 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 1016 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 1017 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 1018 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 1019 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 1020 1021 /* 1022 * The AMD756 requires a delay before re-reading the register, 1023 * otherwise it will occasionally report 0 ports. 1024 */ 1025 sc->sc_noport = 0; 1026 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 1027 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 1028 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 1029 } 1030 1031 #ifdef OHCI_DEBUG 1032 if (ohcidebug >= 5) 1033 ohci_dumpregs(sc); 1034 #endif 1035 1036 /* Set up the bus struct. */ 1037 sc->sc_bus.ub_methods = &ohci_bus_methods; 1038 sc->sc_bus.ub_pipesize = sizeof(struct ohci_pipe); 1039 1040 sc->sc_control = sc->sc_intre = 0; 1041 1042 /* Finally, turn on interrupts. */ 1043 DPRINTF("enabling %#jx", sc->sc_eintrs | OHCI_MIE, 0, 0, 0); 1044 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 1045 1046 return 0; 1047 1048 bad5: 1049 for (i = 0; i < OHCI_NO_EDS; i++) 1050 ohci_free_sed(sc, sc->sc_eds[i]); 1051 bad4: 1052 ohci_free_sed(sc, sc->sc_isoc_head); 1053 bad3: 1054 ohci_free_sed(sc, sc->sc_bulk_head); 1055 bad2: 1056 ohci_free_sed(sc, sc->sc_ctrl_head); 1057 bad1: 1058 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 1059 sc->sc_hcca = NULL; 1060 return err; 1061 } 1062 1063 struct usbd_xfer * 1064 ohci_allocx(struct usbd_bus *bus, unsigned int nframes) 1065 { 1066 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1067 struct usbd_xfer *xfer; 1068 1069 xfer = pool_cache_get(sc->sc_xferpool, PR_WAITOK); 1070 if (xfer != NULL) { 1071 memset(xfer, 0, sizeof(struct ohci_xfer)); 1072 1073 /* Initialise this always so we can call remove on it. */ 1074 usb_init_task(&xfer->ux_aborttask, ohci_timeout_task, xfer, 1075 USB_TASKQ_MPSAFE); 1076 #ifdef DIAGNOSTIC 1077 xfer->ux_state = XFER_BUSY; 1078 #endif 1079 } 1080 return xfer; 1081 } 1082 1083 void 1084 ohci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 1085 { 1086 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1087 1088 KASSERTMSG(xfer->ux_state == XFER_BUSY, 1089 "xfer=%p not busy, 0x%08x\n", xfer, xfer->ux_state); 1090 #ifdef DIAGNOSTIC 1091 xfer->ux_state = XFER_FREE; 1092 #endif 1093 pool_cache_put(sc->sc_xferpool, xfer); 1094 } 1095 1096 Static void 1097 ohci_get_lock(struct usbd_bus *bus, kmutex_t **lock) 1098 { 1099 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1100 1101 *lock = &sc->sc_lock; 1102 } 1103 1104 /* 1105 * Shut down the controller when the system is going down. 1106 */ 1107 bool 1108 ohci_shutdown(device_t self, int flags) 1109 { 1110 ohci_softc_t *sc = device_private(self); 1111 1112 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1113 1114 DPRINTF("stopping the HC", 0, 0, 0, 0); 1115 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1116 return true; 1117 } 1118 1119 bool 1120 ohci_resume(device_t dv, const pmf_qual_t *qual) 1121 { 1122 ohci_softc_t *sc = device_private(dv); 1123 uint32_t ctl; 1124 1125 mutex_spin_enter(&sc->sc_intr_lock); 1126 sc->sc_bus.ub_usepolling++; 1127 mutex_spin_exit(&sc->sc_intr_lock); 1128 1129 /* Some broken BIOSes do not recover these values */ 1130 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1131 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, 1132 sc->sc_ctrl_head->physaddr); 1133 OWRITE4(sc, OHCI_BULK_HEAD_ED, 1134 sc->sc_bulk_head->physaddr); 1135 if (sc->sc_intre) 1136 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre & 1137 (OHCI_ALL_INTRS | OHCI_MIE)); 1138 if (sc->sc_control) 1139 ctl = sc->sc_control; 1140 else 1141 ctl = OREAD4(sc, OHCI_CONTROL); 1142 ctl |= OHCI_HCFS_RESUME; 1143 OWRITE4(sc, OHCI_CONTROL, ctl); 1144 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1145 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1146 OWRITE4(sc, OHCI_CONTROL, ctl); 1147 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1148 sc->sc_control = sc->sc_intre = 0; 1149 1150 mutex_spin_enter(&sc->sc_intr_lock); 1151 sc->sc_bus.ub_usepolling--; 1152 mutex_spin_exit(&sc->sc_intr_lock); 1153 1154 return true; 1155 } 1156 1157 bool 1158 ohci_suspend(device_t dv, const pmf_qual_t *qual) 1159 { 1160 ohci_softc_t *sc = device_private(dv); 1161 uint32_t ctl; 1162 1163 mutex_spin_enter(&sc->sc_intr_lock); 1164 sc->sc_bus.ub_usepolling++; 1165 mutex_spin_exit(&sc->sc_intr_lock); 1166 1167 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1168 if (sc->sc_control == 0) { 1169 /* 1170 * Preserve register values, in case that BIOS 1171 * does not recover them. 1172 */ 1173 sc->sc_control = ctl; 1174 sc->sc_intre = OREAD4(sc, 1175 OHCI_INTERRUPT_ENABLE); 1176 } 1177 ctl |= OHCI_HCFS_SUSPEND; 1178 OWRITE4(sc, OHCI_CONTROL, ctl); 1179 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1180 1181 mutex_spin_enter(&sc->sc_intr_lock); 1182 sc->sc_bus.ub_usepolling--; 1183 mutex_spin_exit(&sc->sc_intr_lock); 1184 1185 return true; 1186 } 1187 1188 #ifdef OHCI_DEBUG 1189 void 1190 ohci_dumpregs(ohci_softc_t *sc) 1191 { 1192 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1193 1194 DPRINTF("rev=0x%08jx control=0x%08jx command=0x%08jx", 1195 OREAD4(sc, OHCI_REVISION), 1196 OREAD4(sc, OHCI_CONTROL), 1197 OREAD4(sc, OHCI_COMMAND_STATUS), 0); 1198 DPRINTF(" intrstat=0x%08jx intre=0x%08jx intrd=0x%08jx", 1199 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1200 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1201 OREAD4(sc, OHCI_INTERRUPT_DISABLE), 0); 1202 DPRINTF(" hcca=0x%08jx percur=0x%08jx ctrlhd=0x%08jx", 1203 OREAD4(sc, OHCI_HCCA), 1204 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1205 OREAD4(sc, OHCI_CONTROL_HEAD_ED), 0); 1206 DPRINTF(" ctrlcur=0x%08jx bulkhd=0x%08jx bulkcur=0x%08jx", 1207 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1208 OREAD4(sc, OHCI_BULK_HEAD_ED), 1209 OREAD4(sc, OHCI_BULK_CURRENT_ED) ,0); 1210 DPRINTF(" done=0x%08jx fmival=0x%08jx fmrem=0x%08jx", 1211 OREAD4(sc, OHCI_DONE_HEAD), 1212 OREAD4(sc, OHCI_FM_INTERVAL), 1213 OREAD4(sc, OHCI_FM_REMAINING), 0); 1214 DPRINTF(" fmnum=0x%08jx perst=0x%08jx lsthrs=0x%08jx", 1215 OREAD4(sc, OHCI_FM_NUMBER), 1216 OREAD4(sc, OHCI_PERIODIC_START), 1217 OREAD4(sc, OHCI_LS_THRESHOLD), 0); 1218 DPRINTF(" desca=0x%08jx descb=0x%08jx stat=0x%08jx", 1219 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1220 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1221 OREAD4(sc, OHCI_RH_STATUS), 0); 1222 DPRINTF(" port1=0x%08jx port2=0x%08jx", 1223 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1224 OREAD4(sc, OHCI_RH_PORT_STATUS(2)), 0, 0); 1225 DPRINTF(" HCCA: frame_number=0x%04jx done_head=0x%08jx", 1226 O32TOH(sc->sc_hcca->hcca_frame_number), 1227 O32TOH(sc->sc_hcca->hcca_done_head), 0, 0); 1228 } 1229 #endif 1230 1231 Static int ohci_intr1(ohci_softc_t *); 1232 1233 int 1234 ohci_intr(void *p) 1235 { 1236 ohci_softc_t *sc = p; 1237 int ret = 0; 1238 1239 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1240 1241 if (sc == NULL) 1242 return 0; 1243 1244 mutex_spin_enter(&sc->sc_intr_lock); 1245 1246 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1247 goto done; 1248 1249 /* If we get an interrupt while polling, then just ignore it. */ 1250 if (sc->sc_bus.ub_usepolling) { 1251 DPRINTFN(16, "ignored interrupt while polling", 0, 0, 0, 0); 1252 /* for level triggered intrs, should do something to ack */ 1253 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1254 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1255 1256 goto done; 1257 } 1258 1259 ret = ohci_intr1(sc); 1260 1261 done: 1262 mutex_spin_exit(&sc->sc_intr_lock); 1263 return ret; 1264 } 1265 1266 Static int 1267 ohci_intr1(ohci_softc_t *sc) 1268 { 1269 uint32_t intrs, eintrs; 1270 1271 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1272 1273 /* In case the interrupt occurs before initialization has completed. */ 1274 if (sc == NULL || sc->sc_hcca == NULL) { 1275 #ifdef DIAGNOSTIC 1276 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1277 #endif 1278 return 0; 1279 } 1280 1281 KASSERT(mutex_owned(&sc->sc_intr_lock)); 1282 1283 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1284 if (!intrs) 1285 return 0; 1286 1287 /* Acknowledge */ 1288 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); 1289 eintrs = intrs & sc->sc_eintrs; 1290 DPRINTFN(7, "sc=%#jx", (uintptr_t)sc, 0, 0, 0); 1291 DPRINTFN(7, "intrs=%#jx(%#jx) eintrs=%#jx(%#jx)", 1292 intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), eintrs, 1293 sc->sc_eintrs); 1294 1295 if (!eintrs) { 1296 return 0; 1297 } 1298 1299 if (eintrs & OHCI_SO) { 1300 sc->sc_overrun_cnt++; 1301 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1302 printf("%s: %u scheduling overruns\n", 1303 device_xname(sc->sc_dev), sc->sc_overrun_cnt); 1304 sc->sc_overrun_cnt = 0; 1305 } 1306 /* XXX do what */ 1307 eintrs &= ~OHCI_SO; 1308 } 1309 if (eintrs & OHCI_WDH) { 1310 /* 1311 * We block the interrupt below, and reenable it later from 1312 * ohci_softintr(). 1313 */ 1314 usb_schedsoftintr(&sc->sc_bus); 1315 } 1316 if (eintrs & OHCI_RD) { 1317 /* 1 argument, but zero format strings */ 1318 DPRINTFN(5, "resume detect", (uintptr_t)sc, 0, 0, 0); 1319 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1320 /* XXX process resume detect */ 1321 } 1322 if (eintrs & OHCI_UE) { 1323 /* 1 argument, but zero format strings */ 1324 DPRINTFN(5, "unrecoverable error", (uintptr_t)sc, 0, 0, 0); 1325 printf("%s: unrecoverable error, controller halted\n", 1326 device_xname(sc->sc_dev)); 1327 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1328 /* XXX what else */ 1329 } 1330 if (eintrs & OHCI_RHSC) { 1331 /* 1332 * We block the interrupt below, and reenable it later from 1333 * a timeout. 1334 */ 1335 softint_schedule(sc->sc_rhsc_si); 1336 } 1337 1338 if (eintrs != 0) { 1339 /* Block unprocessed interrupts. */ 1340 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1341 sc->sc_eintrs &= ~eintrs; 1342 DPRINTF("sc %#jx blocking intrs 0x%jx", (uintptr_t)sc, 1343 eintrs, 0, 0); 1344 } 1345 1346 return 1; 1347 } 1348 1349 void 1350 ohci_rhsc_enable(void *v_sc) 1351 { 1352 ohci_softc_t *sc = v_sc; 1353 1354 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1355 DPRINTF("sc %#jx", (uintptr_t)sc, 0, 0, 0); 1356 mutex_spin_enter(&sc->sc_intr_lock); 1357 sc->sc_eintrs |= OHCI_RHSC; 1358 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1359 mutex_spin_exit(&sc->sc_intr_lock); 1360 } 1361 1362 #ifdef OHCI_DEBUG 1363 const char *ohci_cc_strs[] = { 1364 "NO_ERROR", 1365 "CRC", 1366 "BIT_STUFFING", 1367 "DATA_TOGGLE_MISMATCH", 1368 "STALL", 1369 "DEVICE_NOT_RESPONDING", 1370 "PID_CHECK_FAILURE", 1371 "UNEXPECTED_PID", 1372 "DATA_OVERRUN", 1373 "DATA_UNDERRUN", 1374 "BUFFER_OVERRUN", 1375 "BUFFER_UNDERRUN", 1376 "reserved", 1377 "reserved", 1378 "NOT_ACCESSED", 1379 "NOT_ACCESSED", 1380 }; 1381 #endif 1382 1383 void 1384 ohci_softintr(void *v) 1385 { 1386 struct usbd_bus *bus = v; 1387 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1388 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1389 ohci_soft_td_t *std, *sdone, *stdnext; 1390 struct usbd_xfer *xfer; 1391 struct ohci_pipe *opipe; 1392 int len, cc; 1393 int i, j, actlen, iframes, uedir; 1394 ohci_physaddr_t done; 1395 1396 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1397 1398 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1399 1400 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1401 sizeof(sc->sc_hcca->hcca_done_head), 1402 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1403 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1404 sc->sc_hcca->hcca_done_head = 0; 1405 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1406 sizeof(sc->sc_hcca->hcca_done_head), 1407 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1408 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1409 sc->sc_eintrs |= OHCI_WDH; 1410 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1411 1412 /* Reverse the done list. */ 1413 for (sdone = NULL, sidone = NULL; done != 0; ) { 1414 std = ohci_hash_find_td(sc, done); 1415 if (std != NULL) { 1416 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1417 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1418 std->dnext = sdone; 1419 done = O32TOH(std->td.td_nexttd); 1420 sdone = std; 1421 DPRINTFN(10, "add TD %#jx", (uintptr_t)std, 0, 0, 0); 1422 continue; 1423 } 1424 sitd = ohci_hash_find_itd(sc, done); 1425 if (sitd != NULL) { 1426 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1427 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1428 sitd->dnext = sidone; 1429 done = O32TOH(sitd->itd.itd_nextitd); 1430 sidone = sitd; 1431 DPRINTFN(5, "add ITD %#jx", (uintptr_t)sitd, 0, 0, 0); 1432 continue; 1433 } 1434 DPRINTFN(10, "addr %#jx not found", (uintptr_t)done, 0, 0, 0); 1435 device_printf(sc->sc_dev, "WARNING: addr 0x%08lx not found\n", 1436 (u_long)done); 1437 break; 1438 } 1439 1440 DPRINTFN(10, "sdone=%#jx sidone=%#jx", (uintptr_t)sdone, 1441 (uintptr_t)sidone, 0, 0); 1442 DPRINTFN(10, "--- TD dump start ---", 0, 0, 0, 0); 1443 #ifdef OHCI_DEBUG 1444 if (ohcidebug >= 10) { 1445 for (std = sdone; std; std = std->dnext) 1446 ohci_dump_td(sc, std); 1447 } 1448 #endif 1449 DPRINTFN(10, "--- TD dump end ---", 0, 0, 0, 0); 1450 1451 for (std = sdone; std; std = stdnext) { 1452 xfer = std->xfer; 1453 stdnext = std->dnext; 1454 DPRINTFN(10, "std=%#jx xfer=%#jx hcpriv=%#jx", (uintptr_t)std, 1455 (uintptr_t)xfer, (uintptr_t)(xfer ? xfer->ux_hcpriv : 0), 1456 0); 1457 if (xfer == NULL) { 1458 /* 1459 * xfer == NULL: There seems to be no xfer associated 1460 * with this TD. It is tailp that happened to end up on 1461 * the done queue. 1462 * Shouldn't happen, but some chips are broken(?). 1463 */ 1464 continue; 1465 } 1466 1467 /* 1468 * If software has completed it, either by cancellation 1469 * or timeout, drop it on the floor. 1470 */ 1471 if (xfer->ux_status != USBD_IN_PROGRESS) { 1472 KASSERT(xfer->ux_status == USBD_CANCELLED || 1473 xfer->ux_status == USBD_TIMEOUT); 1474 continue; 1475 } 1476 1477 /* 1478 * Cancel the timeout and the task, which have not yet 1479 * run. If they have already fired, at worst they are 1480 * waiting for the lock. They will see that the xfer 1481 * is no longer in progress and give up. 1482 */ 1483 callout_stop(&xfer->ux_callout); 1484 usb_rem_task(xfer->ux_pipe->up_dev, &xfer->ux_aborttask); 1485 1486 len = std->len; 1487 if (std->td.td_cbp != 0) 1488 len -= O32TOH(std->td.td_be) - 1489 O32TOH(std->td.td_cbp) + 1; 1490 DPRINTFN(10, "len=%jd, flags=0x%jx", len, std->flags, 0, 0); 1491 if (std->flags & OHCI_ADD_LEN) 1492 xfer->ux_actlen += len; 1493 1494 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1495 if (cc == OHCI_CC_NO_ERROR) { 1496 ohci_hash_rem_td(sc, std); 1497 if (std->flags & OHCI_CALL_DONE) { 1498 xfer->ux_status = USBD_NORMAL_COMPLETION; 1499 usb_transfer_complete(xfer); 1500 } 1501 } else { 1502 /* 1503 * Endpoint is halted. First unlink all the TDs 1504 * belonging to the failed transfer, and then restart 1505 * the endpoint. 1506 */ 1507 ohci_soft_td_t *p, *n; 1508 opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1509 1510 DPRINTFN(10, "error cc=%jd", cc, 0, 0, 0); 1511 1512 /* remove xfer's TDs from the hash */ 1513 for (p = std; p->xfer == xfer; p = n) { 1514 n = p->nexttd; 1515 ohci_hash_rem_td(sc, p); 1516 } 1517 1518 ohci_soft_ed_t *sed = opipe->sed; 1519 1520 /* clear halt and TD chain */ 1521 sed->ed.ed_headp = HTOO32(p->physaddr); 1522 usb_syncmem(&sed->dma, 1523 sed->offs + offsetof(ohci_ed_t, ed_headp), 1524 sizeof(sed->ed.ed_headp), 1525 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1526 1527 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1528 1529 if (cc == OHCI_CC_DATA_UNDERRUN) 1530 xfer->ux_status = USBD_NORMAL_COMPLETION; 1531 else if (cc == OHCI_CC_STALL) 1532 xfer->ux_status = USBD_STALLED; 1533 else 1534 xfer->ux_status = USBD_IOERROR; 1535 usb_transfer_complete(xfer); 1536 } 1537 } 1538 DPRINTFN(10, "--- ITD dump start ---", 0, 0, 0, 0); 1539 #ifdef OHCI_DEBUG 1540 if (ohcidebug >= 10) { 1541 for (sitd = sidone; sitd; sitd = sitd->dnext) 1542 ohci_dump_itd(sc, sitd); 1543 } 1544 #endif 1545 DPRINTFN(10, "--- ITD dump end ---", 0, 0, 0, 0); 1546 1547 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1548 xfer = sitd->xfer; 1549 sitdnext = sitd->dnext; 1550 DPRINTFN(1, "sitd=%#jx xfer=%#jx hcpriv=%#jx", (uintptr_t)sitd, 1551 (uintptr_t)xfer, (uintptr_t)(xfer ? xfer->ux_hcpriv : 0), 1552 0); 1553 if (xfer == NULL) 1554 continue; 1555 1556 /* 1557 * If software has completed it, either by cancellation 1558 * or timeout, drop it on the floor. 1559 */ 1560 if (xfer->ux_status != USBD_IN_PROGRESS) { 1561 KASSERT(xfer->ux_status == USBD_CANCELLED || 1562 xfer->ux_status == USBD_TIMEOUT); 1563 continue; 1564 } 1565 1566 /* 1567 * Cancel the timeout and the task, which have not yet 1568 * run. If they have already fired, at worst they are 1569 * waiting for the lock. They will see that the xfer 1570 * is no longer in progress and give up. 1571 */ 1572 callout_stop(&xfer->ux_callout); 1573 usb_rem_task(xfer->ux_pipe->up_dev, &xfer->ux_aborttask); 1574 1575 KASSERT(!sitd->isdone); 1576 #ifdef DIAGNOSTIC 1577 sitd->isdone = true; 1578 #endif 1579 if (sitd->flags & OHCI_CALL_DONE) { 1580 ohci_soft_itd_t *next; 1581 1582 opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1583 opipe->isoc.inuse -= xfer->ux_nframes; 1584 uedir = UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc-> 1585 bEndpointAddress); 1586 xfer->ux_status = USBD_NORMAL_COMPLETION; 1587 actlen = 0; 1588 for (i = 0, sitd = xfer->ux_hcpriv;; 1589 sitd = next) { 1590 next = sitd->nextitd; 1591 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1592 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1593 xfer->ux_status = USBD_IOERROR; 1594 /* For input, update frlengths with actual */ 1595 /* XXX anything necessary for output? */ 1596 if (uedir == UE_DIR_IN && 1597 xfer->ux_status == USBD_NORMAL_COMPLETION) { 1598 iframes = OHCI_ITD_GET_FC(O32TOH( 1599 sitd->itd.itd_flags)); 1600 for (j = 0; j < iframes; i++, j++) { 1601 len = O16TOH(sitd-> 1602 itd.itd_offset[j]); 1603 if ((OHCI_ITD_PSW_GET_CC(len) & 1604 OHCI_CC_NOT_ACCESSED_MASK) 1605 == OHCI_CC_NOT_ACCESSED) 1606 len = 0; 1607 else 1608 len = OHCI_ITD_PSW_LENGTH(len); 1609 xfer->ux_frlengths[i] = len; 1610 actlen += len; 1611 } 1612 } 1613 if (sitd->flags & OHCI_CALL_DONE) 1614 break; 1615 ohci_hash_rem_itd(sc, sitd); 1616 1617 } 1618 ohci_hash_rem_itd(sc, sitd); 1619 if (uedir == UE_DIR_IN && 1620 xfer->ux_status == USBD_NORMAL_COMPLETION) 1621 xfer->ux_actlen = actlen; 1622 xfer->ux_hcpriv = NULL; 1623 1624 usb_transfer_complete(xfer); 1625 } 1626 } 1627 1628 DPRINTFN(10, "done", 0, 0, 0, 0); 1629 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1630 } 1631 1632 void 1633 ohci_device_ctrl_done(struct usbd_xfer *xfer) 1634 { 1635 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1636 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1637 int len = UGETW(xfer->ux_request.wLength); 1638 int isread = (xfer->ux_request.bmRequestType & UT_READ); 1639 1640 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1641 DPRINTFN(10, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 1642 1643 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1644 KASSERT(xfer->ux_rqflags & URQ_REQUEST); 1645 1646 if (len) 1647 usb_syncmem(&xfer->ux_dmabuf, 0, len, 1648 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1649 usb_syncmem(&opipe->ctrl.reqdma, 0, 1650 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 1651 } 1652 1653 void 1654 ohci_device_intr_done(struct usbd_xfer *xfer) 1655 { 1656 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1657 int isread = 1658 (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN); 1659 1660 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1661 DPRINTFN(10, "xfer=%#jx, actlen=%jd", (uintptr_t)xfer, 1662 xfer->ux_actlen, 0, 0); 1663 1664 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1665 1666 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 1667 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1668 } 1669 1670 void 1671 ohci_device_bulk_done(struct usbd_xfer *xfer) 1672 { 1673 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1674 1675 int isread = 1676 (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN); 1677 1678 KASSERT(mutex_owned(&sc->sc_lock)); 1679 1680 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1681 DPRINTFN(10, "xfer=%#jx, actlen=%jd", (uintptr_t)xfer, xfer->ux_actlen, 1682 0, 0); 1683 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 1684 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1685 } 1686 1687 Static void 1688 ohci_rhsc_softint(void *arg) 1689 { 1690 ohci_softc_t *sc = arg; 1691 1692 mutex_enter(&sc->sc_lock); 1693 1694 ohci_rhsc(sc, sc->sc_intrxfer); 1695 1696 /* Do not allow RHSC interrupts > 1 per second */ 1697 callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1698 1699 mutex_exit(&sc->sc_lock); 1700 } 1701 1702 void 1703 ohci_rhsc(ohci_softc_t *sc, struct usbd_xfer *xfer) 1704 { 1705 u_char *p; 1706 int i, m; 1707 int hstatus __unused; 1708 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1709 1710 KASSERT(mutex_owned(&sc->sc_lock)); 1711 1712 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1713 DPRINTF("sc=%#jx xfer=%#jx hstatus=0x%08jx", (uintptr_t)sc, 1714 (uintptr_t)xfer, hstatus, 0); 1715 1716 if (xfer == NULL) { 1717 /* Just ignore the change. */ 1718 return; 1719 } 1720 1721 p = xfer->ux_buf; 1722 m = min(sc->sc_noport, xfer->ux_length * 8 - 1); 1723 memset(p, 0, xfer->ux_length); 1724 for (i = 1; i <= m; i++) { 1725 /* Pick out CHANGE bits from the status reg. */ 1726 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1727 p[i/8] |= 1 << (i%8); 1728 } 1729 DPRINTF("change=0x%02jx", *p, 0, 0, 0); 1730 xfer->ux_actlen = xfer->ux_length; 1731 xfer->ux_status = USBD_NORMAL_COMPLETION; 1732 1733 usb_transfer_complete(xfer); 1734 } 1735 1736 void 1737 ohci_root_intr_done(struct usbd_xfer *xfer) 1738 { 1739 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1740 1741 KASSERT(mutex_owned(&sc->sc_lock)); 1742 1743 KASSERT(sc->sc_intrxfer == xfer); 1744 sc->sc_intrxfer = NULL; 1745 } 1746 1747 void 1748 ohci_poll(struct usbd_bus *bus) 1749 { 1750 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1751 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1752 1753 #ifdef OHCI_DEBUG 1754 static int last; 1755 int new; 1756 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1757 if (new != last) { 1758 DPRINTFN(10, "intrs=0x%04jx", new, 0, 0, 0); 1759 last = new; 1760 } 1761 #endif 1762 sc->sc_eintrs |= OHCI_WDH; 1763 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) { 1764 mutex_spin_enter(&sc->sc_intr_lock); 1765 ohci_intr1(sc); 1766 mutex_spin_exit(&sc->sc_intr_lock); 1767 } 1768 } 1769 1770 /* 1771 * Add an ED to the schedule. Called with USB lock held. 1772 */ 1773 Static void 1774 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1775 { 1776 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1777 DPRINTFN(8, "sed=%#jx head=%#jx", (uintptr_t)sed, (uintptr_t)head, 0, 1778 0); 1779 1780 KASSERT(mutex_owned(&sc->sc_lock)); 1781 1782 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1783 sizeof(head->ed.ed_nexted), 1784 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1785 sed->next = head->next; 1786 sed->ed.ed_nexted = head->ed.ed_nexted; 1787 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1788 sizeof(sed->ed.ed_nexted), 1789 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1790 head->next = sed; 1791 head->ed.ed_nexted = HTOO32(sed->physaddr); 1792 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1793 sizeof(head->ed.ed_nexted), 1794 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1795 } 1796 1797 /* 1798 * Remove an ED from the schedule. Called with USB lock held. 1799 */ 1800 Static void 1801 ohci_rem_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1802 { 1803 ohci_soft_ed_t *p; 1804 1805 KASSERT(mutex_owned(&sc->sc_lock)); 1806 1807 /* XXX */ 1808 for (p = head; p != NULL && p->next != sed; p = p->next) 1809 ; 1810 KASSERT(p != NULL); 1811 1812 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1813 sizeof(sed->ed.ed_nexted), 1814 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1815 p->next = sed->next; 1816 p->ed.ed_nexted = sed->ed.ed_nexted; 1817 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 1818 sizeof(p->ed.ed_nexted), 1819 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1820 } 1821 1822 /* 1823 * When a transfer is completed the TD is added to the done queue by 1824 * the host controller. This queue is the processed by software. 1825 * Unfortunately the queue contains the physical address of the TD 1826 * and we have no simple way to translate this back to a kernel address. 1827 * To make the translation possible (and fast) we use a hash table of 1828 * TDs currently in the schedule. The physical address is used as the 1829 * hash value. 1830 */ 1831 1832 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1833 /* Called with USB lock held. */ 1834 void 1835 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1836 { 1837 int h = HASH(std->physaddr); 1838 1839 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1840 1841 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1842 } 1843 1844 /* Called with USB lock held. */ 1845 void 1846 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1847 { 1848 1849 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1850 1851 LIST_REMOVE(std, hnext); 1852 } 1853 1854 ohci_soft_td_t * 1855 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1856 { 1857 int h = HASH(a); 1858 ohci_soft_td_t *std; 1859 1860 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1861 std != NULL; 1862 std = LIST_NEXT(std, hnext)) 1863 if (std->physaddr == a) 1864 return std; 1865 return NULL; 1866 } 1867 1868 /* Called with USB lock held. */ 1869 void 1870 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1871 { 1872 int h = HASH(sitd->physaddr); 1873 1874 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1875 1876 KASSERT(mutex_owned(&sc->sc_lock)); 1877 1878 DPRINTFN(10, "sitd=%#jx physaddr=0x%08jx", 1879 (uintptr_t)sitd, (u_long)sitd->physaddr, 0, 0); 1880 1881 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1882 } 1883 1884 /* Called with USB lock held. */ 1885 void 1886 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1887 { 1888 1889 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1890 1891 KASSERT(mutex_owned(&sc->sc_lock)); 1892 1893 DPRINTFN(10, "sitd=%#jx physaddr=0x%08jx", (uintptr_t)sitd, 1894 sitd->physaddr, 0, 0); 1895 1896 LIST_REMOVE(sitd, hnext); 1897 } 1898 1899 ohci_soft_itd_t * 1900 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1901 { 1902 int h = HASH(a); 1903 ohci_soft_itd_t *sitd; 1904 1905 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1906 sitd != NULL; 1907 sitd = LIST_NEXT(sitd, hnext)) 1908 if (sitd->physaddr == a) 1909 return sitd; 1910 return NULL; 1911 } 1912 1913 void 1914 ohci_timeout(void *addr) 1915 { 1916 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1917 struct usbd_xfer *xfer = addr; 1918 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1919 struct usbd_device *dev = xfer->ux_pipe->up_dev; 1920 1921 DPRINTF("xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 1922 1923 mutex_enter(&sc->sc_lock); 1924 if (!sc->sc_dying && xfer->ux_status == USBD_IN_PROGRESS) 1925 usb_add_task(dev, &xfer->ux_aborttask, USB_TASKQ_HC); 1926 mutex_exit(&sc->sc_lock); 1927 } 1928 1929 void 1930 ohci_timeout_task(void *addr) 1931 { 1932 struct usbd_xfer *xfer = addr; 1933 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1934 1935 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1936 1937 DPRINTF("xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 1938 1939 mutex_enter(&sc->sc_lock); 1940 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1941 mutex_exit(&sc->sc_lock); 1942 } 1943 1944 #ifdef OHCI_DEBUG 1945 void 1946 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 1947 { 1948 for (; std; std = std->nexttd) { 1949 ohci_dump_td(sc, std); 1950 KASSERTMSG(std->nexttd == NULL || std != std->nexttd, 1951 "std %p next %p", std, std->nexttd); 1952 } 1953 } 1954 1955 void 1956 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1957 { 1958 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1959 1960 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1961 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1962 1963 uint32_t flags = O32TOH(std->td.td_flags); 1964 DPRINTF("TD(%#jx) at 0x%08jx:", (uintptr_t)std, std->physaddr, 0, 0); 1965 DPRINTF(" round=%jd DP=%jx DI=%jx T=%jx", 1966 !!(flags & OHCI_TD_R), 1967 __SHIFTOUT(flags, OHCI_TD_DP_MASK), 1968 OHCI_TD_GET_DI(flags), 1969 __SHIFTOUT(flags, OHCI_TD_TOGGLE_MASK)); 1970 DPRINTF(" EC=%jd CC=%jd", OHCI_TD_GET_EC(flags), 1971 OHCI_TD_GET_CC(flags), 0, 0); 1972 DPRINTF(" td_cbp=0x%08jx td_nexttd=0x%08jx td_be=0x%08jx", 1973 (u_long)O32TOH(std->td.td_cbp), 1974 (u_long)O32TOH(std->td.td_nexttd), 1975 (u_long)O32TOH(std->td.td_be), 0); 1976 } 1977 1978 void 1979 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1980 { 1981 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1982 1983 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1984 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1985 1986 uint32_t flags = O32TOH(sitd->itd.itd_flags); 1987 DPRINTF("ITD(%#jx) at 0x%08jx", (uintptr_t)sitd, sitd->physaddr, 0, 0); 1988 DPRINTF(" sf=%jd di=%jd fc=%jd cc=%jd", 1989 OHCI_ITD_GET_SF(flags), OHCI_ITD_GET_DI(flags), 1990 OHCI_ITD_GET_FC(flags), OHCI_ITD_GET_CC(flags)); 1991 DPRINTF(" bp0=0x%08jx next=0x%08jx be=0x%08jx", 1992 O32TOH(sitd->itd.itd_bp0), 1993 O32TOH(sitd->itd.itd_nextitd), 1994 O32TOH(sitd->itd.itd_be), 0); 1995 CTASSERT(OHCI_ITD_NOFFSET == 8); 1996 DPRINTF(" offs[0] = 0x%04jx offs[1] = 0x%04jx " 1997 "offs[2] = 0x%04jx offs[3] = 0x%04jx", 1998 O16TOH(sitd->itd.itd_offset[0]), 1999 O16TOH(sitd->itd.itd_offset[1]), 2000 O16TOH(sitd->itd.itd_offset[2]), 2001 O16TOH(sitd->itd.itd_offset[3])); 2002 DPRINTF(" offs[4] = 0x%04jx offs[5] = 0x%04jx " 2003 "offs[6] = 0x%04jx offs[7] = 0x%04jx", 2004 O16TOH(sitd->itd.itd_offset[4]), 2005 O16TOH(sitd->itd.itd_offset[5]), 2006 O16TOH(sitd->itd.itd_offset[6]), 2007 O16TOH(sitd->itd.itd_offset[7])); 2008 } 2009 2010 void 2011 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2012 { 2013 for (; sitd; sitd = sitd->nextitd) 2014 ohci_dump_itd(sc, sitd); 2015 } 2016 2017 void 2018 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 2019 { 2020 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2021 2022 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2023 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2024 2025 uint32_t flags = O32TOH(sed->ed.ed_flags); 2026 DPRINTF("ED(%#jx) at 0x%08jx:", (uintptr_t)sed, sed->physaddr, 0, 0); 2027 DPRINTF(" addr=%jd endpt=%jd maxp=%jd", 2028 OHCI_ED_GET_FA(flags), 2029 OHCI_ED_GET_EN(flags), 2030 OHCI_ED_GET_MAXP(flags), 2031 0); 2032 DPRINTF(" dir=%jd speed=%jd skip=%jd iso=%jd", 2033 __SHIFTOUT(flags, OHCI_ED_DIR_MASK), 2034 !!(flags & OHCI_ED_SPEED), 2035 !!(flags & OHCI_ED_SKIP), 2036 !!(flags & OHCI_ED_FORMAT_ISO)); 2037 DPRINTF(" tailp=0x%08jx", (u_long)O32TOH(sed->ed.ed_tailp), 2038 0, 0, 0); 2039 DPRINTF(" headp=0x%08jx nexted=0x%08jx halted=%jd carry=%jd", 2040 O32TOH(sed->ed.ed_headp), O32TOH(sed->ed.ed_nexted), 2041 !!(O32TOH(sed->ed.ed_headp) & OHCI_HALTED), 2042 !!(O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY)); 2043 } 2044 #endif 2045 2046 usbd_status 2047 ohci_open(struct usbd_pipe *pipe) 2048 { 2049 struct usbd_device *dev = pipe->up_dev; 2050 struct usbd_bus *bus = dev->ud_bus; 2051 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2052 usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc; 2053 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2054 uint8_t addr = dev->ud_addr; 2055 uint8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2056 ohci_soft_ed_t *sed; 2057 ohci_soft_td_t *std; 2058 ohci_soft_itd_t *sitd; 2059 ohci_physaddr_t tdphys; 2060 uint32_t fmt; 2061 usbd_status err = USBD_NOMEM; 2062 int ival; 2063 2064 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2065 DPRINTFN(1, "pipe=%#jx, addr=%jd, endpt=%jd (%jd)", (uintptr_t)pipe, 2066 addr, ed->bEndpointAddress, bus->ub_rhaddr); 2067 2068 if (sc->sc_dying) { 2069 return USBD_IOERROR; 2070 } 2071 2072 std = NULL; 2073 sed = NULL; 2074 2075 if (addr == bus->ub_rhaddr) { 2076 switch (ed->bEndpointAddress) { 2077 case USB_CONTROL_ENDPOINT: 2078 pipe->up_methods = &roothub_ctrl_methods; 2079 break; 2080 case UE_DIR_IN | USBROOTHUB_INTR_ENDPT: 2081 pipe->up_methods = &ohci_root_intr_methods; 2082 break; 2083 default: 2084 err = USBD_INVAL; 2085 goto bad; 2086 } 2087 } else { 2088 sed = ohci_alloc_sed(sc); 2089 if (sed == NULL) 2090 goto bad; 2091 opipe->sed = sed; 2092 if (xfertype == UE_ISOCHRONOUS) { 2093 sitd = ohci_alloc_sitd(sc); 2094 if (sitd == NULL) 2095 goto bad; 2096 2097 opipe->tail.itd = sitd; 2098 tdphys = sitd->physaddr; 2099 fmt = OHCI_ED_FORMAT_ISO; 2100 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2101 fmt |= OHCI_ED_DIR_IN; 2102 else 2103 fmt |= OHCI_ED_DIR_OUT; 2104 } else { 2105 std = ohci_alloc_std(sc); 2106 if (std == NULL) 2107 goto bad; 2108 2109 opipe->tail.td = std; 2110 tdphys = std->physaddr; 2111 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2112 } 2113 sed->ed.ed_flags = HTOO32( 2114 OHCI_ED_SET_FA(addr) | 2115 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2116 (dev->ud_speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2117 fmt | 2118 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2119 sed->ed.ed_headp = HTOO32(tdphys | 2120 (pipe->up_endpoint->ue_toggle ? OHCI_TOGGLECARRY : 0)); 2121 sed->ed.ed_tailp = HTOO32(tdphys); 2122 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2123 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2124 2125 switch (xfertype) { 2126 case UE_CONTROL: 2127 pipe->up_methods = &ohci_device_ctrl_methods; 2128 err = usb_allocmem(&sc->sc_bus, 2129 sizeof(usb_device_request_t), 2130 0, &opipe->ctrl.reqdma); 2131 if (err) 2132 goto bad; 2133 mutex_enter(&sc->sc_lock); 2134 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2135 mutex_exit(&sc->sc_lock); 2136 break; 2137 case UE_INTERRUPT: 2138 pipe->up_methods = &ohci_device_intr_methods; 2139 ival = pipe->up_interval; 2140 if (ival == USBD_DEFAULT_INTERVAL) 2141 ival = ed->bInterval; 2142 err = ohci_device_setintr(sc, opipe, ival); 2143 if (err) 2144 goto bad; 2145 break; 2146 case UE_ISOCHRONOUS: 2147 pipe->up_serialise = false; 2148 pipe->up_methods = &ohci_device_isoc_methods; 2149 return ohci_setup_isoc(pipe); 2150 case UE_BULK: 2151 pipe->up_methods = &ohci_device_bulk_methods; 2152 mutex_enter(&sc->sc_lock); 2153 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2154 mutex_exit(&sc->sc_lock); 2155 break; 2156 } 2157 } 2158 2159 return USBD_NORMAL_COMPLETION; 2160 2161 bad: 2162 if (std != NULL) { 2163 ohci_free_std(sc, std); 2164 } 2165 if (sed != NULL) 2166 ohci_free_sed(sc, sed); 2167 return err; 2168 2169 } 2170 2171 /* 2172 * Close a reqular pipe. 2173 * Assumes that there are no pending transactions. 2174 */ 2175 void 2176 ohci_close_pipe(struct usbd_pipe *pipe, ohci_soft_ed_t *head) 2177 { 2178 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2179 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2180 ohci_soft_ed_t *sed = opipe->sed; 2181 2182 KASSERT(mutex_owned(&sc->sc_lock)); 2183 2184 #ifdef DIAGNOSTIC 2185 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2186 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2187 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2188 ohci_soft_td_t *std; 2189 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2190 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2191 "tl=0x%x pipe=%p, std=%p\n", sed, 2192 (int)O32TOH(sed->ed.ed_headp), 2193 (int)O32TOH(sed->ed.ed_tailp), 2194 pipe, std); 2195 #ifdef OHCI_DEBUG 2196 usbd_dump_pipe(&opipe->pipe); 2197 ohci_dump_ed(sc, sed); 2198 if (std) 2199 ohci_dump_td(sc, std); 2200 #endif 2201 usb_delay_ms(&sc->sc_bus, 2); 2202 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2203 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2204 printf("ohci_close_pipe: pipe still not empty\n"); 2205 } 2206 #endif 2207 ohci_rem_ed(sc, sed, head); 2208 /* Make sure the host controller is not touching this ED */ 2209 usb_delay_ms(&sc->sc_bus, 1); 2210 pipe->up_endpoint->ue_toggle = 2211 (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0; 2212 ohci_free_sed_locked(sc, opipe->sed); 2213 } 2214 2215 /* 2216 * Cancel or timeout a device request. We have two cases to deal with 2217 * 2218 * 1) A driver wants to stop scheduled or inflight transfers 2219 * 2) A transfer has timed out 2220 * 2221 * It's impossible to guarantee that the requested transfer will not 2222 * have (partially) happened since the hardware runs concurrently. 2223 * 2224 * Transfer state is protected by the bus lock and we set the transfer status 2225 * as soon as either of the above happens (with bus lock held). 2226 * 2227 * Then we arrange for the hardware to tells us that it is not still 2228 * processing the TDs by setting the sKip bit and requesting a SOF interrupt 2229 * 2230 * Once we see the SOF interrupt we can check the transfer TDs/iTDs to see if 2231 * they've been processed and either 2232 * a) if they're unused recover them for later use, or 2233 * b) if they've been used allocate new TD/iTDs to replace those 2234 * used. The softint handler will free the old ones. 2235 */ 2236 void 2237 ohci_abort_xfer(struct usbd_xfer *xfer, usbd_status status) 2238 { 2239 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2240 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2241 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2242 ohci_soft_ed_t *sed = opipe->sed; 2243 ohci_soft_td_t *p, *n; 2244 ohci_physaddr_t headp; 2245 int hit; 2246 2247 KASSERTMSG((status == USBD_CANCELLED || status == USBD_TIMEOUT), 2248 "invalid status for abort: %d", (int)status); 2249 2250 DPRINTF("xfer=%#jx pipe=%#jx sed=%#jx", (uintptr_t)xfer, 2251 (uintptr_t)opipe, (uintptr_t)sed, 0); 2252 2253 KASSERT(mutex_owned(&sc->sc_lock)); 2254 ASSERT_SLEEPABLE(); 2255 2256 if (status == USBD_CANCELLED) { 2257 /* 2258 * We are synchronously aborting. Try to stop the 2259 * callout and task, but if we can't, wait for them to 2260 * complete. 2261 */ 2262 callout_halt(&xfer->ux_callout, &sc->sc_lock); 2263 usb_rem_task_wait(xfer->ux_pipe->up_dev, &xfer->ux_aborttask, 2264 USB_TASKQ_HC, &sc->sc_lock); 2265 } else { 2266 /* Otherwise, we are timing out. */ 2267 KASSERT(status == USBD_TIMEOUT); 2268 } 2269 2270 /* 2271 * The xfer cannot have been cancelled already. It is the 2272 * responsibility of the caller of usbd_abort_pipe not to try 2273 * to abort a pipe multiple times, whether concurrently or 2274 * sequentially. 2275 */ 2276 KASSERT(xfer->ux_status != USBD_CANCELLED); 2277 2278 /* Only the timeout, which runs only once, can time it out. */ 2279 KASSERT(xfer->ux_status != USBD_TIMEOUT); 2280 2281 /* If anyone else beat us, we're done. */ 2282 if (xfer->ux_status != USBD_IN_PROGRESS) 2283 return; 2284 2285 /* We beat everyone else. Claim the status. */ 2286 xfer->ux_status = status; 2287 2288 /* 2289 * If we're dying, skip the hardware action and just notify the 2290 * software that we're done. 2291 */ 2292 if (sc->sc_dying) { 2293 DPRINTFN(4, "xfer %#jx dying %ju", (uintptr_t)xfer, 2294 xfer->ux_status, 0, 0); 2295 goto dying; 2296 } 2297 2298 /* 2299 * HC Step 1: Unless the endpoint is already halted, we set the endpoint 2300 * descriptor sKip bit and wait for hardware to complete processing. 2301 * 2302 * This includes ensuring that any TDs of the transfer that got onto 2303 * the done list are also removed. We ensure this by waiting for 2304 * both a WDH and SOF interrupt. 2305 */ 2306 DPRINTFN(1, "stop ed=%#jx", (uintptr_t)sed, 0, 0, 0); 2307 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2308 sizeof(sed->ed.ed_flags), 2309 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2310 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2311 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2312 sizeof(sed->ed.ed_flags), 2313 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2314 2315 /* 2316 * HC Step 2: Wait until we know hardware has finished any possible 2317 * use of the xfer. 2318 */ 2319 /* Hardware finishes in 1ms */ 2320 usb_delay_ms_locked(opipe->pipe.up_dev->ud_bus, 20, &sc->sc_lock); 2321 2322 /* 2323 * HC Step 3: Remove any vestiges of the xfer from the hardware. 2324 * The complication here is that the hardware may have executed 2325 * beyond the xfer we're trying to abort. So as we're scanning 2326 * the TDs of this xfer we check if the hardware points to 2327 * any of them. 2328 */ 2329 p = xfer->ux_hcpriv; 2330 KASSERT(p); 2331 2332 #ifdef OHCI_DEBUG 2333 DPRINTF("--- dump start ---", 0, 0, 0, 0); 2334 2335 if (ohcidebug >= 2) { 2336 DPRINTF("sed:", 0, 0, 0, 0); 2337 ohci_dump_ed(sc, sed); 2338 ohci_dump_tds(sc, p); 2339 } 2340 DPRINTF("--- dump end ---", 0, 0, 0, 0); 2341 #endif 2342 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2343 hit = 0; 2344 for (; p->xfer == xfer; p = n) { 2345 hit |= headp == p->physaddr; 2346 n = p->nexttd; 2347 ohci_hash_rem_td(sc, p); 2348 } 2349 /* Zap headp register if hardware pointed inside the xfer. */ 2350 if (hit) { 2351 DPRINTFN(1, "set hd=0x%08jx, tl=0x%08jx", (int)p->physaddr, 2352 (int)O32TOH(sed->ed.ed_tailp), 0, 0); 2353 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2354 usb_syncmem(&sed->dma, 2355 sed->offs + offsetof(ohci_ed_t, ed_headp), 2356 sizeof(sed->ed.ed_headp), 2357 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2358 } else { 2359 DPRINTFN(1, "no hit", 0, 0, 0, 0); 2360 } 2361 2362 /* 2363 * HC Step 4: Turn on hardware again. 2364 */ 2365 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2366 sizeof(sed->ed.ed_flags), 2367 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2368 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2369 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2370 sizeof(sed->ed.ed_flags), 2371 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2372 2373 /* 2374 * Final step: Notify completion to waiting xfers. 2375 */ 2376 dying: 2377 usb_transfer_complete(xfer); 2378 DPRINTFN(14, "end", 0, 0, 0, 0); 2379 2380 KASSERT(mutex_owned(&sc->sc_lock)); 2381 } 2382 2383 /* 2384 * Data structures and routines to emulate the root hub. 2385 */ 2386 Static int 2387 ohci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req, 2388 void *buf, int buflen) 2389 { 2390 ohci_softc_t *sc = OHCI_BUS2SC(bus); 2391 usb_port_status_t ps; 2392 uint16_t len, value, index; 2393 int l, totlen = 0; 2394 int port, i; 2395 uint32_t v; 2396 2397 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2398 2399 if (sc->sc_dying) 2400 return -1; 2401 2402 DPRINTFN(4, "type=0x%02jx request=%02jx", req->bmRequestType, 2403 req->bRequest, 0, 0); 2404 2405 len = UGETW(req->wLength); 2406 value = UGETW(req->wValue); 2407 index = UGETW(req->wIndex); 2408 2409 #define C(x,y) ((x) | ((y) << 8)) 2410 switch (C(req->bRequest, req->bmRequestType)) { 2411 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2412 DPRINTFN(8, "wValue=0x%04jx", value, 0, 0, 0); 2413 if (len == 0) 2414 break; 2415 switch (value) { 2416 case C(0, UDESC_DEVICE): { 2417 usb_device_descriptor_t devd; 2418 2419 totlen = min(buflen, sizeof(devd)); 2420 memcpy(&devd, buf, totlen); 2421 USETW(devd.idVendor, sc->sc_id_vendor); 2422 memcpy(buf, &devd, totlen); 2423 break; 2424 } 2425 case C(1, UDESC_STRING): 2426 #define sd ((usb_string_descriptor_t *)buf) 2427 /* Vendor */ 2428 totlen = usb_makestrdesc(sd, len, sc->sc_vendor); 2429 break; 2430 case C(2, UDESC_STRING): 2431 /* Product */ 2432 totlen = usb_makestrdesc(sd, len, "OHCI root hub"); 2433 break; 2434 #undef sd 2435 default: 2436 /* default from usbroothub */ 2437 return buflen; 2438 } 2439 break; 2440 2441 /* Hub requests */ 2442 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2443 break; 2444 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2445 DPRINTFN(8, "UR_CLEAR_PORT_FEATURE port=%jd feature=%jd", 2446 index, value, 0, 0); 2447 if (index < 1 || index > sc->sc_noport) { 2448 return -1; 2449 } 2450 port = OHCI_RH_PORT_STATUS(index); 2451 switch(value) { 2452 case UHF_PORT_ENABLE: 2453 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2454 break; 2455 case UHF_PORT_SUSPEND: 2456 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2457 break; 2458 case UHF_PORT_POWER: 2459 /* Yes, writing to the LOW_SPEED bit clears power. */ 2460 OWRITE4(sc, port, UPS_LOW_SPEED); 2461 break; 2462 case UHF_C_PORT_CONNECTION: 2463 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2464 break; 2465 case UHF_C_PORT_ENABLE: 2466 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2467 break; 2468 case UHF_C_PORT_SUSPEND: 2469 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2470 break; 2471 case UHF_C_PORT_OVER_CURRENT: 2472 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2473 break; 2474 case UHF_C_PORT_RESET: 2475 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2476 break; 2477 default: 2478 return -1; 2479 } 2480 switch(value) { 2481 case UHF_C_PORT_CONNECTION: 2482 case UHF_C_PORT_ENABLE: 2483 case UHF_C_PORT_SUSPEND: 2484 case UHF_C_PORT_OVER_CURRENT: 2485 case UHF_C_PORT_RESET: 2486 /* Enable RHSC interrupt if condition is cleared. */ 2487 if ((OREAD4(sc, port) >> 16) == 0) 2488 ohci_rhsc_enable(sc); 2489 break; 2490 default: 2491 break; 2492 } 2493 break; 2494 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2495 if (len == 0) 2496 break; 2497 if ((value & 0xff) != 0) { 2498 return -1; 2499 } 2500 usb_hub_descriptor_t hubd; 2501 2502 totlen = min(buflen, sizeof(hubd)); 2503 memcpy(&hubd, buf, totlen); 2504 2505 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2506 hubd.bNbrPorts = sc->sc_noport; 2507 USETW(hubd.wHubCharacteristics, 2508 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2509 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2510 /* XXX overcurrent */ 2511 ); 2512 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2513 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2514 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2515 hubd.DeviceRemovable[i++] = (uint8_t)v; 2516 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2517 totlen = min(totlen, hubd.bDescLength); 2518 memcpy(buf, &hubd, totlen); 2519 break; 2520 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2521 if (len != 4) { 2522 return -1; 2523 } 2524 memset(buf, 0, len); /* ? XXX */ 2525 totlen = len; 2526 break; 2527 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2528 DPRINTFN(8, "get port status i=%jd", index, 0, 0, 0); 2529 if (index < 1 || index > sc->sc_noport) { 2530 return -1; 2531 } 2532 if (len != 4) { 2533 return -1; 2534 } 2535 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2536 DPRINTFN(8, "port status=0x%04jx", v, 0, 0, 0); 2537 USETW(ps.wPortStatus, v); 2538 USETW(ps.wPortChange, v >> 16); 2539 totlen = min(len, sizeof(ps)); 2540 memcpy(buf, &ps, totlen); 2541 break; 2542 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2543 return -1; 2544 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2545 break; 2546 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2547 if (index < 1 || index > sc->sc_noport) { 2548 return -1; 2549 } 2550 port = OHCI_RH_PORT_STATUS(index); 2551 switch(value) { 2552 case UHF_PORT_ENABLE: 2553 OWRITE4(sc, port, UPS_PORT_ENABLED); 2554 break; 2555 case UHF_PORT_SUSPEND: 2556 OWRITE4(sc, port, UPS_SUSPEND); 2557 break; 2558 case UHF_PORT_RESET: 2559 DPRINTFN(5, "reset port %jd", index, 0, 0, 0); 2560 OWRITE4(sc, port, UPS_RESET); 2561 for (i = 0; i < 5; i++) { 2562 usb_delay_ms(&sc->sc_bus, 2563 USB_PORT_ROOT_RESET_DELAY); 2564 if (sc->sc_dying) { 2565 return -1; 2566 } 2567 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2568 break; 2569 } 2570 DPRINTFN(8, "port %jd reset, status = 0x%04jx", index, 2571 OREAD4(sc, port), 0, 0); 2572 break; 2573 case UHF_PORT_POWER: 2574 DPRINTFN(2, "set port power %jd", index, 0, 0, 0); 2575 OWRITE4(sc, port, UPS_PORT_POWER); 2576 break; 2577 default: 2578 return -1; 2579 } 2580 break; 2581 default: 2582 /* default from usbroothub */ 2583 return buflen; 2584 } 2585 2586 return totlen; 2587 } 2588 2589 Static usbd_status 2590 ohci_root_intr_transfer(struct usbd_xfer *xfer) 2591 { 2592 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2593 usbd_status err; 2594 2595 /* Insert last in queue. */ 2596 mutex_enter(&sc->sc_lock); 2597 err = usb_insert_transfer(xfer); 2598 mutex_exit(&sc->sc_lock); 2599 if (err) 2600 return err; 2601 2602 /* Pipe isn't running, start first */ 2603 return ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2604 } 2605 2606 Static usbd_status 2607 ohci_root_intr_start(struct usbd_xfer *xfer) 2608 { 2609 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2610 const bool polling = sc->sc_bus.ub_usepolling; 2611 2612 if (sc->sc_dying) 2613 return USBD_IOERROR; 2614 2615 if (!polling) 2616 mutex_enter(&sc->sc_lock); 2617 KASSERT(sc->sc_intrxfer == NULL); 2618 sc->sc_intrxfer = xfer; 2619 if (!polling) 2620 mutex_exit(&sc->sc_lock); 2621 2622 return USBD_IN_PROGRESS; 2623 } 2624 2625 /* Abort a root interrupt request. */ 2626 Static void 2627 ohci_root_intr_abort(struct usbd_xfer *xfer) 2628 { 2629 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2630 2631 KASSERT(mutex_owned(&sc->sc_lock)); 2632 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 2633 2634 sc->sc_intrxfer = NULL; 2635 2636 xfer->ux_status = USBD_CANCELLED; 2637 usb_transfer_complete(xfer); 2638 } 2639 2640 /* Close the root pipe. */ 2641 Static void 2642 ohci_root_intr_close(struct usbd_pipe *pipe) 2643 { 2644 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2645 2646 KASSERT(mutex_owned(&sc->sc_lock)); 2647 2648 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2649 2650 sc->sc_intrxfer = NULL; 2651 } 2652 2653 /************************/ 2654 2655 int 2656 ohci_device_ctrl_init(struct usbd_xfer *xfer) 2657 { 2658 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2659 usb_device_request_t *req = &xfer->ux_request; 2660 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2661 ohci_soft_td_t *stat, *setup; 2662 int isread = req->bmRequestType & UT_READ; 2663 int len = xfer->ux_bufsize; 2664 int err = ENOMEM; 2665 2666 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2667 2668 setup = ohci_alloc_std(sc); 2669 if (setup == NULL) { 2670 goto bad1; 2671 } 2672 stat = ohci_alloc_std(sc); 2673 if (stat == NULL) { 2674 goto bad2; 2675 } 2676 2677 ox->ox_setup = setup; 2678 ox->ox_stat = stat; 2679 ox->ox_nstd = 0; 2680 2681 /* Set up data transaction */ 2682 if (len != 0) { 2683 err = ohci_alloc_std_chain(sc, xfer, len, isread); 2684 if (err) { 2685 goto bad3; 2686 } 2687 } 2688 return 0; 2689 2690 bad3: 2691 ohci_free_std(sc, stat); 2692 bad2: 2693 ohci_free_std(sc, setup); 2694 bad1: 2695 return err; 2696 } 2697 2698 void 2699 ohci_device_ctrl_fini(struct usbd_xfer *xfer) 2700 { 2701 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2702 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2703 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2704 2705 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2706 DPRINTFN(8, "xfer %#jx nstd %jd", (uintptr_t)xfer, ox->ox_nstd, 0, 0); 2707 2708 mutex_enter(&sc->sc_lock); 2709 if (ox->ox_setup != opipe->tail.td) { 2710 ohci_free_std_locked(sc, ox->ox_setup); 2711 } 2712 for (size_t i = 0; i < ox->ox_nstd; i++) { 2713 ohci_soft_td_t *std = ox->ox_stds[i]; 2714 if (std == NULL) 2715 break; 2716 ohci_free_std_locked(sc, std); 2717 } 2718 ohci_free_std_locked(sc, ox->ox_stat); 2719 mutex_exit(&sc->sc_lock); 2720 2721 if (ox->ox_nstd) { 2722 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 2723 kmem_free(ox->ox_stds, sz); 2724 } 2725 } 2726 2727 Static usbd_status 2728 ohci_device_ctrl_transfer(struct usbd_xfer *xfer) 2729 { 2730 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2731 usbd_status err; 2732 2733 /* Insert last in queue. */ 2734 mutex_enter(&sc->sc_lock); 2735 err = usb_insert_transfer(xfer); 2736 mutex_exit(&sc->sc_lock); 2737 if (err) 2738 return err; 2739 2740 /* Pipe isn't running, start first */ 2741 return ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2742 } 2743 2744 Static usbd_status 2745 ohci_device_ctrl_start(struct usbd_xfer *xfer) 2746 { 2747 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2748 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2749 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2750 usb_device_request_t *req = &xfer->ux_request; 2751 struct usbd_device *dev __diagused = opipe->pipe.up_dev; 2752 ohci_soft_td_t *setup, *stat, *next, *tail; 2753 ohci_soft_ed_t *sed; 2754 int isread; 2755 int len; 2756 const bool polling = sc->sc_bus.ub_usepolling; 2757 2758 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2759 2760 if (sc->sc_dying) 2761 return USBD_IOERROR; 2762 2763 KASSERT(xfer->ux_rqflags & URQ_REQUEST); 2764 2765 isread = req->bmRequestType & UT_READ; 2766 len = UGETW(req->wLength); 2767 2768 DPRINTF("xfer=%#jx len=%jd, addr=%jd, endpt=%jd", (uintptr_t)xfer, len, 2769 dev->ud_addr, opipe->pipe.up_endpoint->ue_edesc->bEndpointAddress); 2770 DPRINTF("type=0x%02jx, request=0x%02jx, wValue=0x%04jx, wIndex=0x%04jx", 2771 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2772 UGETW(req->wIndex)); 2773 2774 /* Need to take lock here for pipe->tail.td */ 2775 if (!polling) 2776 mutex_enter(&sc->sc_lock); 2777 2778 /* 2779 * Use the pipe "tail" TD as our first and loan our first TD to the 2780 * next transfer 2781 */ 2782 setup = opipe->tail.td; 2783 opipe->tail.td = ox->ox_setup; 2784 ox->ox_setup = setup; 2785 2786 stat = ox->ox_stat; 2787 2788 /* point at sentinel */ 2789 tail = opipe->tail.td; 2790 sed = opipe->sed; 2791 2792 KASSERTMSG(OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)) == dev->ud_addr, 2793 "address ED %d pipe %d\n", 2794 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), dev->ud_addr); 2795 KASSERTMSG(OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)) == 2796 UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize), 2797 "MPL ED %d pipe %d\n", 2798 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), 2799 UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize)); 2800 2801 /* next will point to data if len != 0 */ 2802 next = stat; 2803 2804 /* Set up data transaction */ 2805 if (len != 0) { 2806 ohci_soft_td_t *std; 2807 ohci_soft_td_t *end; 2808 2809 next = ox->ox_stds[0]; 2810 ohci_reset_std_chain(sc, xfer, len, isread, next, &end); 2811 2812 end->td.td_nexttd = HTOO32(stat->physaddr); 2813 end->nexttd = stat; 2814 2815 usb_syncmem(&end->dma, end->offs, sizeof(end->td), 2816 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2817 2818 usb_syncmem(&xfer->ux_dmabuf, 0, len, 2819 isread ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2820 std = ox->ox_stds[0]; 2821 /* Start toggle at 1 and then use the carried toggle. */ 2822 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 2823 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 2824 usb_syncmem(&std->dma, 2825 std->offs + offsetof(ohci_td_t, td_flags), 2826 sizeof(std->td.td_flags), 2827 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2828 } 2829 2830 DPRINTFN(8, "setup %#jx data %#jx stat %#jx tail %#jx", 2831 (uintptr_t)setup, 2832 (uintptr_t)(len != 0 ? ox->ox_stds[0] : NULL), (uintptr_t)stat, 2833 (uintptr_t)tail); 2834 KASSERT(opipe->tail.td == tail); 2835 2836 memcpy(KERNADDR(&opipe->ctrl.reqdma, 0), req, sizeof(*req)); 2837 usb_syncmem(&opipe->ctrl.reqdma, 0, sizeof(*req), BUS_DMASYNC_PREWRITE); 2838 2839 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 2840 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 2841 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->ctrl.reqdma, 0)); 2842 setup->td.td_nexttd = HTOO32(next->physaddr); 2843 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof(*req) - 1); 2844 setup->nexttd = next; 2845 setup->len = 0; 2846 setup->xfer = xfer; 2847 setup->flags = 0; 2848 ohci_hash_add_td(sc, setup); 2849 2850 xfer->ux_hcpriv = setup; 2851 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 2852 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2853 2854 stat->td.td_flags = HTOO32( 2855 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 2856 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 2857 stat->td.td_cbp = 0; 2858 stat->td.td_nexttd = HTOO32(tail->physaddr); 2859 stat->td.td_be = 0; 2860 stat->nexttd = tail; 2861 stat->flags = OHCI_CALL_DONE; 2862 stat->len = 0; 2863 stat->xfer = xfer; 2864 ohci_hash_add_td(sc, stat); 2865 2866 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 2867 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2868 2869 memset(&tail->td, 0, sizeof(tail->td)); 2870 tail->nexttd = NULL; 2871 tail->xfer = NULL; 2872 2873 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 2874 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2875 2876 #ifdef OHCI_DEBUG 2877 USBHIST_LOGN(ohcidebug, 5, "--- dump start ---", 0, 0, 0, 0); 2878 if (ohcidebug >= 5) { 2879 ohci_dump_ed(sc, sed); 2880 ohci_dump_tds(sc, setup); 2881 } 2882 USBHIST_LOGN(ohcidebug, 5, "--- dump end ---", 0, 0, 0, 0); 2883 #endif 2884 2885 /* Insert ED in schedule */ 2886 sed->ed.ed_tailp = HTOO32(tail->physaddr); 2887 usb_syncmem(&sed->dma, 2888 sed->offs + offsetof(ohci_ed_t, ed_tailp), 2889 sizeof(sed->ed.ed_tailp), 2890 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2891 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 2892 if (xfer->ux_timeout && !polling) { 2893 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 2894 ohci_timeout, xfer); 2895 } 2896 2897 DPRINTF("done", 0, 0, 0, 0); 2898 2899 xfer->ux_status = USBD_IN_PROGRESS; 2900 if (!polling) 2901 mutex_exit(&sc->sc_lock); 2902 2903 return USBD_IN_PROGRESS; 2904 } 2905 2906 /* Abort a device control request. */ 2907 Static void 2908 ohci_device_ctrl_abort(struct usbd_xfer *xfer) 2909 { 2910 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 2911 2912 KASSERT(mutex_owned(&sc->sc_lock)); 2913 2914 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2915 DPRINTF("xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 2916 ohci_abort_xfer(xfer, USBD_CANCELLED); 2917 } 2918 2919 /* Close a device control pipe. */ 2920 Static void 2921 ohci_device_ctrl_close(struct usbd_pipe *pipe) 2922 { 2923 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2924 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2925 2926 KASSERT(mutex_owned(&sc->sc_lock)); 2927 2928 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2929 DPRINTF("pipe=%#jx", (uintptr_t)pipe, 0, 0, 0); 2930 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2931 ohci_free_std_locked(sc, opipe->tail.td); 2932 } 2933 2934 /************************/ 2935 2936 Static void 2937 ohci_device_clear_toggle(struct usbd_pipe *pipe) 2938 { 2939 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2940 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2941 2942 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2943 } 2944 2945 Static void 2946 ohci_noop(struct usbd_pipe *pipe) 2947 { 2948 } 2949 2950 Static int 2951 ohci_device_bulk_init(struct usbd_xfer *xfer) 2952 { 2953 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2954 int len = xfer->ux_bufsize; 2955 int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;; 2956 int isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2957 int err; 2958 2959 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2960 2961 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 2962 2963 DPRINTFN(4, "xfer=%#jx len=%jd isread=%jd flags=%jd", (uintptr_t)xfer, 2964 len, isread, xfer->ux_flags); 2965 DPRINTFN(4, "endpt=%jd", endpt, 0, 0, 0); 2966 2967 /* Allocate a chain of new TDs (including a new tail). */ 2968 err = ohci_alloc_std_chain(sc, xfer, len, isread); 2969 if (err) 2970 return err; 2971 2972 return 0; 2973 } 2974 2975 Static void 2976 ohci_device_bulk_fini(struct usbd_xfer *xfer) 2977 { 2978 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2979 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2980 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2981 2982 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2983 DPRINTFN(8, "xfer %#jx nstd %jd", (uintptr_t)xfer, ox->ox_nstd, 0, 0); 2984 2985 mutex_enter(&sc->sc_lock); 2986 for (size_t i = 0; i < ox->ox_nstd; i++) { 2987 ohci_soft_td_t *std = ox->ox_stds[i]; 2988 if (std == NULL) 2989 break; 2990 if (std != opipe->tail.td) 2991 ohci_free_std_locked(sc, std); 2992 } 2993 mutex_exit(&sc->sc_lock); 2994 2995 if (ox->ox_nstd) { 2996 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 2997 kmem_free(ox->ox_stds, sz); 2998 } 2999 } 3000 3001 Static usbd_status 3002 ohci_device_bulk_transfer(struct usbd_xfer *xfer) 3003 { 3004 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3005 usbd_status err; 3006 3007 /* Insert last in queue. */ 3008 mutex_enter(&sc->sc_lock); 3009 err = usb_insert_transfer(xfer); 3010 mutex_exit(&sc->sc_lock); 3011 if (err) 3012 return err; 3013 3014 /* Pipe isn't running, start first */ 3015 return ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 3016 } 3017 3018 Static usbd_status 3019 ohci_device_bulk_start(struct usbd_xfer *xfer) 3020 { 3021 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3022 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3023 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3024 ohci_soft_td_t *last; 3025 ohci_soft_td_t *data, *tail, *tdp; 3026 ohci_soft_ed_t *sed; 3027 int len, isread, endpt; 3028 const bool polling = sc->sc_bus.ub_usepolling; 3029 3030 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3031 3032 if (sc->sc_dying) 3033 return USBD_IOERROR; 3034 3035 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3036 3037 len = xfer->ux_length; 3038 endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 3039 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3040 sed = opipe->sed; 3041 3042 DPRINTFN(4, "xfer=%#jx len=%jd isread=%jd flags=%jd", (uintptr_t)xfer, 3043 len, isread, xfer->ux_flags); 3044 DPRINTFN(4, "endpt=%jd", endpt, 0, 0, 0); 3045 3046 if (!polling) 3047 mutex_enter(&sc->sc_lock); 3048 3049 /* 3050 * Use the pipe "tail" TD as our first and loan our first TD to the 3051 * next transfer 3052 */ 3053 data = opipe->tail.td; 3054 opipe->tail.td = ox->ox_stds[0]; 3055 ox->ox_stds[0] = data; 3056 ohci_reset_std_chain(sc, xfer, len, isread, data, &last); 3057 3058 /* point at sentinel */ 3059 tail = opipe->tail.td; 3060 memset(&tail->td, 0, sizeof(tail->td)); 3061 tail->nexttd = NULL; 3062 tail->xfer = NULL; 3063 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 3064 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3065 xfer->ux_hcpriv = data; 3066 3067 DPRINTFN(8, "xfer %#jx data %#jx tail %#jx", (uintptr_t)xfer, 3068 (uintptr_t)ox->ox_stds[0], (uintptr_t)tail, 0); 3069 KASSERT(opipe->tail.td == tail); 3070 3071 /* We want interrupt at the end of the transfer. */ 3072 last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3073 last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3074 last->td.td_nexttd = HTOO32(tail->physaddr); 3075 last->nexttd = tail; 3076 last->flags |= OHCI_CALL_DONE; 3077 usb_syncmem(&last->dma, last->offs, sizeof(last->td), 3078 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3079 3080 DPRINTFN(4, "ed_flags=0x%08jx td_flags=0x%08jx " 3081 "td_cbp=0x%08jx td_be=0x%08jx", 3082 (int)O32TOH(sed->ed.ed_flags), 3083 (int)O32TOH(data->td.td_flags), 3084 (int)O32TOH(data->td.td_cbp), 3085 (int)O32TOH(data->td.td_be)); 3086 3087 #ifdef OHCI_DEBUG 3088 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 3089 if (ohcidebug >= 5) { 3090 ohci_dump_ed(sc, sed); 3091 ohci_dump_tds(sc, data); 3092 } 3093 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 3094 #endif 3095 3096 /* Insert ED in schedule */ 3097 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 3098 KASSERT(tdp->xfer == xfer); 3099 } 3100 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3101 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3102 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3103 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3104 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3105 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3106 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 3107 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 3108 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 3109 ohci_timeout, xfer); 3110 } 3111 3112 xfer->ux_status = USBD_IN_PROGRESS; 3113 if (!polling) 3114 mutex_exit(&sc->sc_lock); 3115 3116 return USBD_IN_PROGRESS; 3117 } 3118 3119 Static void 3120 ohci_device_bulk_abort(struct usbd_xfer *xfer) 3121 { 3122 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 3123 3124 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3125 3126 KASSERT(mutex_owned(&sc->sc_lock)); 3127 3128 DPRINTF("xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 3129 ohci_abort_xfer(xfer, USBD_CANCELLED); 3130 } 3131 3132 /* 3133 * Close a device bulk pipe. 3134 */ 3135 Static void 3136 ohci_device_bulk_close(struct usbd_pipe *pipe) 3137 { 3138 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3139 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3140 3141 KASSERT(mutex_owned(&sc->sc_lock)); 3142 3143 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3144 3145 DPRINTF("pipe=%#jx", (uintptr_t)pipe, 0, 0, 0); 3146 ohci_close_pipe(pipe, sc->sc_bulk_head); 3147 ohci_free_std_locked(sc, opipe->tail.td); 3148 } 3149 3150 /************************/ 3151 3152 Static int 3153 ohci_device_intr_init(struct usbd_xfer *xfer) 3154 { 3155 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3156 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3157 int len = xfer->ux_bufsize; 3158 int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;; 3159 int isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3160 int err; 3161 3162 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3163 3164 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3165 KASSERT(len != 0); 3166 3167 DPRINTFN(4, "xfer=%#jx len=%jd isread=%jd flags=%jd", (uintptr_t)xfer, 3168 len, isread, xfer->ux_flags); 3169 DPRINTFN(4, "endpt=%jd", endpt, 0, 0, 0); 3170 3171 ox->ox_nstd = 0; 3172 3173 err = ohci_alloc_std_chain(sc, xfer, len, isread); 3174 if (err) { 3175 return err; 3176 } 3177 3178 return 0; 3179 } 3180 3181 Static void 3182 ohci_device_intr_fini(struct usbd_xfer *xfer) 3183 { 3184 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3185 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3186 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3187 3188 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3189 DPRINTFN(8, "xfer %#jx nstd %jd", (uintptr_t)xfer, ox->ox_nstd, 0, 0); 3190 3191 mutex_enter(&sc->sc_lock); 3192 for (size_t i = 0; i < ox->ox_nstd; i++) { 3193 ohci_soft_td_t *std = ox->ox_stds[i]; 3194 if (std != NULL) 3195 break; 3196 if (std != opipe->tail.td) 3197 ohci_free_std_locked(sc, std); 3198 } 3199 mutex_exit(&sc->sc_lock); 3200 3201 if (ox->ox_nstd) { 3202 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 3203 kmem_free(ox->ox_stds, sz); 3204 } 3205 } 3206 3207 Static usbd_status 3208 ohci_device_intr_transfer(struct usbd_xfer *xfer) 3209 { 3210 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3211 usbd_status err; 3212 3213 /* Insert last in queue. */ 3214 mutex_enter(&sc->sc_lock); 3215 err = usb_insert_transfer(xfer); 3216 mutex_exit(&sc->sc_lock); 3217 if (err) 3218 return err; 3219 3220 /* Pipe isn't running, start first */ 3221 return ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 3222 } 3223 3224 Static usbd_status 3225 ohci_device_intr_start(struct usbd_xfer *xfer) 3226 { 3227 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3228 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3229 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3230 ohci_soft_ed_t *sed = opipe->sed; 3231 ohci_soft_td_t *data, *last, *tail; 3232 int len, isread, endpt; 3233 const bool polling = sc->sc_bus.ub_usepolling; 3234 3235 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3236 3237 if (sc->sc_dying) 3238 return USBD_IOERROR; 3239 3240 DPRINTFN(3, "xfer=%#jx len=%jd flags=%jd priv=%#jx", (uintptr_t)xfer, 3241 xfer->ux_length, xfer->ux_flags, (uintptr_t)xfer->ux_priv); 3242 3243 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3244 3245 len = xfer->ux_length; 3246 endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 3247 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3248 3249 if (!polling) 3250 mutex_enter(&sc->sc_lock); 3251 3252 /* 3253 * Use the pipe "tail" TD as our first and loan our first TD to the 3254 * next transfer. 3255 */ 3256 data = opipe->tail.td; 3257 opipe->tail.td = ox->ox_stds[0]; 3258 ox->ox_stds[0] = data; 3259 ohci_reset_std_chain(sc, xfer, len, isread, data, &last); 3260 3261 /* point at sentinel */ 3262 tail = opipe->tail.td; 3263 memset(&tail->td, 0, sizeof(tail->td)); 3264 tail->nexttd = NULL; 3265 tail->xfer = NULL; 3266 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 3267 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3268 xfer->ux_hcpriv = data; 3269 3270 DPRINTFN(8, "data %#jx tail %#jx", (uintptr_t)ox->ox_stds[0], 3271 (uintptr_t)tail, 0, 0); 3272 KASSERT(opipe->tail.td == tail); 3273 3274 /* We want interrupt at the end of the transfer. */ 3275 last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3276 last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3277 3278 last->td.td_nexttd = HTOO32(tail->physaddr); 3279 last->nexttd = tail; 3280 last->flags |= OHCI_CALL_DONE; 3281 usb_syncmem(&last->dma, last->offs, sizeof(last->td), 3282 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3283 3284 #ifdef OHCI_DEBUG 3285 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 3286 if (ohcidebug >= 5) { 3287 ohci_dump_ed(sc, sed); 3288 ohci_dump_tds(sc, data); 3289 } 3290 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 3291 #endif 3292 3293 /* Insert ED in schedule */ 3294 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3295 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3296 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3297 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3298 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3299 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3300 3301 xfer->ux_status = USBD_IN_PROGRESS; 3302 if (!polling) 3303 mutex_exit(&sc->sc_lock); 3304 3305 return USBD_IN_PROGRESS; 3306 } 3307 3308 /* Abort a device interrupt request. */ 3309 Static void 3310 ohci_device_intr_abort(struct usbd_xfer *xfer) 3311 { 3312 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 3313 3314 KASSERT(mutex_owned(&sc->sc_lock)); 3315 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 3316 3317 ohci_abort_xfer(xfer, USBD_CANCELLED); 3318 } 3319 3320 /* Close a device interrupt pipe. */ 3321 Static void 3322 ohci_device_intr_close(struct usbd_pipe *pipe) 3323 { 3324 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3325 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3326 int nslots = opipe->intr.nslots; 3327 int pos = opipe->intr.pos; 3328 int j; 3329 ohci_soft_ed_t *p, *sed = opipe->sed; 3330 3331 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3332 3333 KASSERT(mutex_owned(&sc->sc_lock)); 3334 3335 DPRINTFN(1, "pipe=%#jx nslots=%jd pos=%jd", (uintptr_t)pipe, nslots, 3336 pos, 0); 3337 usb_syncmem(&sed->dma, sed->offs, 3338 sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3339 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3340 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3341 sizeof(sed->ed.ed_flags), 3342 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3343 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3344 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3345 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); 3346 3347 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3348 continue; 3349 KASSERT(p); 3350 p->next = sed->next; 3351 p->ed.ed_nexted = sed->ed.ed_nexted; 3352 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 3353 sizeof(p->ed.ed_nexted), 3354 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3355 3356 for (j = 0; j < nslots; j++) 3357 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3358 3359 ohci_free_std_locked(sc, opipe->tail.td); 3360 ohci_free_sed_locked(sc, opipe->sed); 3361 } 3362 3363 Static usbd_status 3364 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3365 { 3366 int i, j, best; 3367 u_int npoll, slow, shigh, nslots; 3368 u_int bestbw, bw; 3369 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3370 3371 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3372 3373 DPRINTFN(2, "pipe=%#jx", (uintptr_t)opipe, 0, 0, 0); 3374 if (ival == 0) { 3375 printf("ohci_setintr: 0 interval\n"); 3376 return USBD_INVAL; 3377 } 3378 3379 npoll = OHCI_NO_INTRS; 3380 while (npoll > ival) 3381 npoll /= 2; 3382 DPRINTFN(2, "ival=%jd npoll=%jd", ival, npoll, 0, 0); 3383 3384 /* 3385 * We now know which level in the tree the ED must go into. 3386 * Figure out which slot has most bandwidth left over. 3387 * Slots to examine: 3388 * npoll 3389 * 1 0 3390 * 2 1 2 3391 * 4 3 4 5 6 3392 * 8 7 8 9 10 11 12 13 14 3393 * N (N-1) .. (N-1+N-1) 3394 */ 3395 slow = npoll-1; 3396 shigh = slow + npoll; 3397 nslots = OHCI_NO_INTRS / npoll; 3398 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3399 bw = 0; 3400 for (j = 0; j < nslots; j++) 3401 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3402 if (bw < bestbw) { 3403 best = i; 3404 bestbw = bw; 3405 } 3406 } 3407 DPRINTFN(2, "best=%jd(%jd..%jd) bestbw=%jd", best, slow, shigh, bestbw); 3408 3409 mutex_enter(&sc->sc_lock); 3410 hsed = sc->sc_eds[best]; 3411 sed->next = hsed->next; 3412 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3413 sizeof(hsed->ed.ed_flags), 3414 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3415 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3416 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3417 sizeof(sed->ed.ed_flags), 3418 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3419 hsed->next = sed; 3420 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3421 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3422 sizeof(hsed->ed.ed_flags), 3423 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3424 mutex_exit(&sc->sc_lock); 3425 3426 for (j = 0; j < nslots; j++) 3427 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3428 opipe->intr.nslots = nslots; 3429 opipe->intr.pos = best; 3430 3431 DPRINTFN(5, "returns %#jx", (uintptr_t)opipe, 0, 0, 0); 3432 return USBD_NORMAL_COMPLETION; 3433 } 3434 3435 /***********************/ 3436 3437 Static int 3438 ohci_device_isoc_init(struct usbd_xfer *xfer) 3439 { 3440 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3441 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3442 ohci_soft_itd_t *sitd; 3443 size_t i; 3444 int err; 3445 3446 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3447 3448 DPRINTFN(1, "xfer %#jx len %jd flags %jd", (uintptr_t)xfer, 3449 xfer->ux_length, xfer->ux_flags, 0); 3450 3451 const size_t nfsitd = 3452 (xfer->ux_nframes + OHCI_ITD_NOFFSET - 1) / OHCI_ITD_NOFFSET; 3453 const size_t nbsitd = xfer->ux_bufsize / OHCI_PAGE_SIZE; 3454 const size_t nsitd = MAX(nfsitd, nbsitd) + 1; 3455 3456 ox->ox_sitds = kmem_zalloc(sizeof(ohci_soft_itd_t *) * nsitd, 3457 KM_SLEEP); 3458 ox->ox_nsitd = nsitd; 3459 3460 for (i = 0; i < nsitd; i++) { 3461 /* Allocate next ITD */ 3462 sitd = ohci_alloc_sitd(sc); 3463 if (sitd == NULL) { 3464 err = ENOMEM; 3465 goto fail; 3466 } 3467 ox->ox_sitds[i] = sitd; 3468 sitd->xfer = xfer; 3469 sitd->flags = 0; 3470 } 3471 3472 return 0; 3473 fail: 3474 for (; i > 0;) { 3475 ohci_free_sitd(sc, ox->ox_sitds[--i]); 3476 } 3477 return err; 3478 } 3479 3480 Static void 3481 ohci_device_isoc_fini(struct usbd_xfer *xfer) 3482 { 3483 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3484 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3485 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3486 3487 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3488 3489 mutex_enter(&sc->sc_lock); 3490 for (size_t i = 0; i < ox->ox_nsitd; i++) { 3491 if (ox->ox_sitds[i] != opipe->tail.itd) { 3492 ohci_free_sitd_locked(sc, ox->ox_sitds[i]); 3493 } 3494 } 3495 mutex_exit(&sc->sc_lock); 3496 3497 if (ox->ox_nsitd) { 3498 const size_t sz = sizeof(ohci_soft_itd_t *) * ox->ox_nsitd; 3499 kmem_free(ox->ox_sitds, sz); 3500 } 3501 } 3502 3503 3504 usbd_status 3505 ohci_device_isoc_transfer(struct usbd_xfer *xfer) 3506 { 3507 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3508 usbd_status __diagused err; 3509 3510 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3511 3512 DPRINTFN(5, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 3513 3514 /* Put it on our queue, */ 3515 mutex_enter(&sc->sc_lock); 3516 err = usb_insert_transfer(xfer); 3517 mutex_exit(&sc->sc_lock); 3518 3519 KASSERT(err == USBD_NORMAL_COMPLETION); 3520 3521 /* insert into schedule, */ 3522 ohci_device_isoc_enter(xfer); 3523 3524 /* and start if the pipe wasn't running */ 3525 return USBD_IN_PROGRESS; 3526 } 3527 3528 void 3529 ohci_device_isoc_enter(struct usbd_xfer *xfer) 3530 { 3531 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3532 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3533 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3534 ohci_soft_ed_t *sed = opipe->sed; 3535 ohci_soft_itd_t *sitd, *nsitd, *tail; 3536 ohci_physaddr_t buf, offs, noffs, bp0; 3537 int i, ncur, nframes; 3538 3539 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3540 DPRINTFN(5, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 3541 3542 mutex_enter(&sc->sc_lock); 3543 3544 if (sc->sc_dying) { 3545 mutex_exit(&sc->sc_lock); 3546 return; 3547 } 3548 3549 struct isoc *isoc = &opipe->isoc; 3550 3551 DPRINTFN(1, "used=%jd next=%jd xfer=%#jx nframes=%jd", 3552 isoc->inuse, isoc->next, (uintptr_t)xfer, xfer->ux_nframes); 3553 3554 if (isoc->next == -1) { 3555 /* Not in use yet, schedule it a few frames ahead. */ 3556 isoc->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3557 DPRINTFN(2,"start next=%jd", isoc->next, 0, 0, 0); 3558 } 3559 3560 sitd = opipe->tail.itd; 3561 opipe->tail.itd = ox->ox_sitds[0]; 3562 ox->ox_sitds[0] = sitd; 3563 3564 buf = DMAADDR(&xfer->ux_dmabuf, 0); 3565 bp0 = OHCI_PAGE(buf); 3566 offs = OHCI_PAGE_OFFSET(buf); 3567 nframes = xfer->ux_nframes; 3568 xfer->ux_hcpriv = sitd; 3569 size_t j = 1; 3570 for (i = ncur = 0; i < nframes; i++, ncur++) { 3571 noffs = offs + xfer->ux_frlengths[i]; 3572 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3573 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3574 3575 /* Allocate next ITD */ 3576 nsitd = ox->ox_sitds[j++]; 3577 KASSERT(nsitd != NULL); 3578 KASSERT(j < ox->ox_nsitd); 3579 3580 /* Fill current ITD */ 3581 sitd->itd.itd_flags = HTOO32( 3582 OHCI_ITD_NOCC | 3583 OHCI_ITD_SET_SF(isoc->next) | 3584 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3585 OHCI_ITD_SET_FC(ncur)); 3586 sitd->itd.itd_bp0 = HTOO32(bp0); 3587 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3588 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3589 sitd->nextitd = nsitd; 3590 sitd->xfer = xfer; 3591 sitd->flags = 0; 3592 #ifdef DIAGNOSTIC 3593 sitd->isdone = false; 3594 #endif 3595 ohci_hash_add_itd(sc, sitd); 3596 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3597 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3598 3599 sitd = nsitd; 3600 isoc->next = isoc->next + ncur; 3601 bp0 = OHCI_PAGE(buf + offs); 3602 ncur = 0; 3603 } 3604 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3605 /* XXX Sync */ 3606 offs = noffs; 3607 } 3608 KASSERT(j <= ox->ox_nsitd); 3609 3610 /* point at sentinel */ 3611 tail = opipe->tail.itd; 3612 memset(&tail->itd, 0, sizeof(tail->itd)); 3613 tail->nextitd = NULL; 3614 tail->xfer = NULL; 3615 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->itd), 3616 BUS_DMASYNC_PREWRITE); 3617 3618 /* Fixup last used ITD */ 3619 sitd->itd.itd_flags = HTOO32( 3620 OHCI_ITD_NOCC | 3621 OHCI_ITD_SET_SF(isoc->next) | 3622 OHCI_ITD_SET_DI(0) | 3623 OHCI_ITD_SET_FC(ncur)); 3624 sitd->itd.itd_bp0 = HTOO32(bp0); 3625 sitd->itd.itd_nextitd = HTOO32(tail->physaddr); 3626 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3627 sitd->nextitd = tail; 3628 sitd->xfer = xfer; 3629 sitd->flags = OHCI_CALL_DONE; 3630 #ifdef DIAGNOSTIC 3631 sitd->isdone = false; 3632 #endif 3633 ohci_hash_add_itd(sc, sitd); 3634 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3635 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3636 3637 isoc->next = isoc->next + ncur; 3638 isoc->inuse += nframes; 3639 3640 /* XXX pretend we did it all */ 3641 xfer->ux_actlen = offs; 3642 xfer->ux_status = USBD_IN_PROGRESS; 3643 3644 #ifdef OHCI_DEBUG 3645 if (ohcidebug >= 5) { 3646 DPRINTF("frame=%jd", O32TOH(sc->sc_hcca->hcca_frame_number), 3647 0, 0, 0); 3648 ohci_dump_itds(sc, xfer->ux_hcpriv); 3649 ohci_dump_ed(sc, sed); 3650 } 3651 #endif 3652 3653 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3654 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3655 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3656 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3657 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3658 sizeof(sed->ed.ed_flags), 3659 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3660 mutex_exit(&sc->sc_lock); 3661 } 3662 3663 void 3664 ohci_device_isoc_abort(struct usbd_xfer *xfer) 3665 { 3666 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3667 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3668 ohci_soft_ed_t *sed; 3669 ohci_soft_itd_t *sitd; 3670 3671 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3672 DPRINTFN(1, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 3673 3674 KASSERT(mutex_owned(&sc->sc_lock)); 3675 3676 /* Transfer is already done. */ 3677 if (xfer->ux_status != USBD_NOT_STARTED && 3678 xfer->ux_status != USBD_IN_PROGRESS) { 3679 printf("ohci_device_isoc_abort: early return\n"); 3680 goto done; 3681 } 3682 3683 /* Give xfer the requested abort code. */ 3684 xfer->ux_status = USBD_CANCELLED; 3685 3686 sed = opipe->sed; 3687 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3688 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3689 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3690 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3691 sizeof(sed->ed.ed_flags), 3692 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3693 3694 sitd = xfer->ux_hcpriv; 3695 KASSERT(sitd); 3696 3697 usb_delay_ms_locked(&sc->sc_bus, OHCI_ITD_NOFFSET, &sc->sc_lock); 3698 3699 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3700 ohci_hash_rem_itd(sc, sitd); 3701 #ifdef DIAGNOSTIC 3702 DPRINTFN(1, "abort sets done sitd=%#jx", (uintptr_t)sitd, 3703 0, 0, 0); 3704 sitd->isdone = true; 3705 #endif 3706 } 3707 3708 /* Run callback. */ 3709 usb_transfer_complete(xfer); 3710 3711 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3712 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3713 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3714 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3715 3716 done: 3717 KASSERT(mutex_owned(&sc->sc_lock)); 3718 } 3719 3720 void 3721 ohci_device_isoc_done(struct usbd_xfer *xfer) 3722 { 3723 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3724 DPRINTFN(1, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 3725 } 3726 3727 usbd_status 3728 ohci_setup_isoc(struct usbd_pipe *pipe) 3729 { 3730 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3731 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3732 struct isoc *isoc = &opipe->isoc; 3733 3734 isoc->next = -1; 3735 isoc->inuse = 0; 3736 3737 mutex_enter(&sc->sc_lock); 3738 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3739 mutex_exit(&sc->sc_lock); 3740 3741 return USBD_NORMAL_COMPLETION; 3742 } 3743 3744 void 3745 ohci_device_isoc_close(struct usbd_pipe *pipe) 3746 { 3747 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3748 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3749 3750 KASSERT(mutex_owned(&sc->sc_lock)); 3751 3752 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3753 DPRINTF("pipe=%#jx", (uintptr_t)pipe, 0, 0, 0); 3754 ohci_close_pipe(pipe, sc->sc_isoc_head); 3755 #ifdef DIAGNOSTIC 3756 opipe->tail.itd->isdone = true; 3757 #endif 3758 ohci_free_sitd_locked(sc, opipe->tail.itd); 3759 } 3760
Indexes created Fri Oct 03 02:09:57 GMT 2025