ohci.c revision 1.282
1 /* $NetBSD: ohci.c,v 1.282 2018/08/09 06:26:47 mrg Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2004, 2005, 2012 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) at 9 * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca) 10 * and Matthew R. Green (mrg (at) eterna.com.au). 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * USB Open Host Controller driver. 38 * 39 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 40 * USB spec: http://www.usb.org/developers/docs/ 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.282 2018/08/09 06:26:47 mrg Exp $"); 45 46 #ifdef _KERNEL_OPT 47 #include "opt_usb.h" 48 #endif 49 50 #include <sys/param.h> 51 52 #include <sys/cpu.h> 53 #include <sys/device.h> 54 #include <sys/kernel.h> 55 #include <sys/kmem.h> 56 #include <sys/proc.h> 57 #include <sys/queue.h> 58 #include <sys/select.h> 59 #include <sys/sysctl.h> 60 #include <sys/systm.h> 61 62 #include <machine/endian.h> 63 64 #include <dev/usb/usb.h> 65 #include <dev/usb/usbdi.h> 66 #include <dev/usb/usbdivar.h> 67 #include <dev/usb/usb_mem.h> 68 #include <dev/usb/usb_quirks.h> 69 70 #include <dev/usb/ohcireg.h> 71 #include <dev/usb/ohcivar.h> 72 #include <dev/usb/usbroothub.h> 73 #include <dev/usb/usbhist.h> 74 75 #ifdef USB_DEBUG 76 #ifndef OHCI_DEBUG 77 #define ohcidebug 0 78 #else 79 static int ohcidebug = 10; 80 81 SYSCTL_SETUP(sysctl_hw_ohci_setup, "sysctl hw.ohci setup") 82 { 83 int err; 84 const struct sysctlnode *rnode; 85 const struct sysctlnode *cnode; 86 87 err = sysctl_createv(clog, 0, NULL, &rnode, 88 CTLFLAG_PERMANENT, CTLTYPE_NODE, "ohci", 89 SYSCTL_DESCR("ohci global controls"), 90 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); 91 92 if (err) 93 goto fail; 94 95 /* control debugging printfs */ 96 err = sysctl_createv(clog, 0, &rnode, &cnode, 97 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, 98 "debug", SYSCTL_DESCR("Enable debugging output"), 99 NULL, 0, &ohcidebug, sizeof(ohcidebug), CTL_CREATE, CTL_EOL); 100 if (err) 101 goto fail; 102 103 return; 104 fail: 105 aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err); 106 } 107 108 #endif /* OHCI_DEBUG */ 109 #endif /* USB_DEBUG */ 110 111 #define DPRINTF(FMT,A,B,C,D) USBHIST_LOG(ohcidebug,FMT,A,B,C,D) 112 #define DPRINTFN(N,FMT,A,B,C,D) USBHIST_LOGN(ohcidebug,N,FMT,A,B,C,D) 113 #define OHCIHIST_FUNC() USBHIST_FUNC() 114 #define OHCIHIST_CALLED(name) USBHIST_CALLED(ohcidebug) 115 116 #if BYTE_ORDER == BIG_ENDIAN 117 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 118 #else 119 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 120 #endif 121 122 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 123 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 124 #define HTOO16(val) O16TOH(val) 125 #define HTOO32(val) O32TOH(val) 126 127 struct ohci_pipe; 128 129 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 130 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 131 132 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 133 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 134 Static void ohci_free_std_locked(ohci_softc_t *, ohci_soft_td_t *); 135 136 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 137 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 138 Static void ohci_free_sitd_locked(ohci_softc_t *, 139 ohci_soft_itd_t *); 140 141 Static int ohci_alloc_std_chain(ohci_softc_t *, struct usbd_xfer *, 142 int, int); 143 Static void ohci_free_stds(ohci_softc_t *, struct ohci_xfer *); 144 145 Static void ohci_reset_std_chain(ohci_softc_t *, struct usbd_xfer *, 146 int, int, ohci_soft_td_t *, ohci_soft_td_t **); 147 148 Static usbd_status ohci_open(struct usbd_pipe *); 149 Static void ohci_poll(struct usbd_bus *); 150 Static void ohci_softintr(void *); 151 Static void ohci_rhsc(ohci_softc_t *, struct usbd_xfer *); 152 Static void ohci_rhsc_softint(void *); 153 154 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 155 ohci_soft_ed_t *); 156 157 Static void ohci_rem_ed(ohci_softc_t *, ohci_soft_ed_t *, 158 ohci_soft_ed_t *); 159 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 160 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 161 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 162 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 163 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 164 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 165 166 Static usbd_status ohci_setup_isoc(struct usbd_pipe *); 167 Static void ohci_device_isoc_enter(struct usbd_xfer *); 168 169 Static struct usbd_xfer * 170 ohci_allocx(struct usbd_bus *, unsigned int); 171 Static void ohci_freex(struct usbd_bus *, struct usbd_xfer *); 172 Static void ohci_get_lock(struct usbd_bus *, kmutex_t **); 173 Static int ohci_roothub_ctrl(struct usbd_bus *, 174 usb_device_request_t *, void *, int); 175 176 Static usbd_status ohci_root_intr_transfer(struct usbd_xfer *); 177 Static usbd_status ohci_root_intr_start(struct usbd_xfer *); 178 Static void ohci_root_intr_abort(struct usbd_xfer *); 179 Static void ohci_root_intr_close(struct usbd_pipe *); 180 Static void ohci_root_intr_done(struct usbd_xfer *); 181 182 Static int ohci_device_ctrl_init(struct usbd_xfer *); 183 Static void ohci_device_ctrl_fini(struct usbd_xfer *); 184 Static usbd_status ohci_device_ctrl_transfer(struct usbd_xfer *); 185 Static usbd_status ohci_device_ctrl_start(struct usbd_xfer *); 186 Static void ohci_device_ctrl_abort(struct usbd_xfer *); 187 Static void ohci_device_ctrl_close(struct usbd_pipe *); 188 Static void ohci_device_ctrl_done(struct usbd_xfer *); 189 190 Static int ohci_device_bulk_init(struct usbd_xfer *); 191 Static void ohci_device_bulk_fini(struct usbd_xfer *); 192 Static usbd_status ohci_device_bulk_transfer(struct usbd_xfer *); 193 Static usbd_status ohci_device_bulk_start(struct usbd_xfer *); 194 Static void ohci_device_bulk_abort(struct usbd_xfer *); 195 Static void ohci_device_bulk_close(struct usbd_pipe *); 196 Static void ohci_device_bulk_done(struct usbd_xfer *); 197 198 Static int ohci_device_intr_init(struct usbd_xfer *); 199 Static void ohci_device_intr_fini(struct usbd_xfer *); 200 Static usbd_status ohci_device_intr_transfer(struct usbd_xfer *); 201 Static usbd_status ohci_device_intr_start(struct usbd_xfer *); 202 Static void ohci_device_intr_abort(struct usbd_xfer *); 203 Static void ohci_device_intr_close(struct usbd_pipe *); 204 Static void ohci_device_intr_done(struct usbd_xfer *); 205 206 Static int ohci_device_isoc_init(struct usbd_xfer *); 207 Static void ohci_device_isoc_fini(struct usbd_xfer *); 208 Static usbd_status ohci_device_isoc_transfer(struct usbd_xfer *); 209 Static void ohci_device_isoc_abort(struct usbd_xfer *); 210 Static void ohci_device_isoc_close(struct usbd_pipe *); 211 Static void ohci_device_isoc_done(struct usbd_xfer *); 212 213 Static usbd_status ohci_device_setintr(ohci_softc_t *, 214 struct ohci_pipe *, int); 215 216 Static void ohci_timeout(void *); 217 Static void ohci_timeout_task(void *); 218 Static void ohci_rhsc_enable(void *); 219 220 Static void ohci_close_pipe(struct usbd_pipe *, ohci_soft_ed_t *); 221 Static void ohci_abort_xfer(struct usbd_xfer *, usbd_status); 222 223 Static void ohci_device_clear_toggle(struct usbd_pipe *); 224 Static void ohci_noop(struct usbd_pipe *); 225 226 #ifdef OHCI_DEBUG 227 Static void ohci_dumpregs(ohci_softc_t *); 228 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 229 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 230 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 231 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 232 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 233 #endif 234 235 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 236 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 237 #define OWRITE1(sc, r, x) \ 238 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 239 #define OWRITE2(sc, r, x) \ 240 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 241 #define OWRITE4(sc, r, x) \ 242 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 243 244 static __inline uint32_t 245 OREAD4(ohci_softc_t *sc, bus_size_t r) 246 { 247 248 OBARR(sc); 249 return bus_space_read_4(sc->iot, sc->ioh, r); 250 } 251 252 /* Reverse the bits in a value 0 .. 31 */ 253 Static uint8_t revbits[OHCI_NO_INTRS] = 254 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 255 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 256 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 257 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 258 259 struct ohci_pipe { 260 struct usbd_pipe pipe; 261 ohci_soft_ed_t *sed; 262 union { 263 ohci_soft_td_t *td; 264 ohci_soft_itd_t *itd; 265 } tail; 266 /* Info needed for different pipe kinds. */ 267 union { 268 /* Control pipe */ 269 struct { 270 usb_dma_t reqdma; 271 } ctrl; 272 /* Interrupt pipe */ 273 struct { 274 int nslots; 275 int pos; 276 } intr; 277 /* Isochronous pipe */ 278 struct isoc { 279 int next, inuse; 280 } isoc; 281 }; 282 }; 283 284 Static const struct usbd_bus_methods ohci_bus_methods = { 285 .ubm_open = ohci_open, 286 .ubm_softint = ohci_softintr, 287 .ubm_dopoll = ohci_poll, 288 .ubm_allocx = ohci_allocx, 289 .ubm_freex = ohci_freex, 290 .ubm_getlock = ohci_get_lock, 291 .ubm_rhctrl = ohci_roothub_ctrl, 292 }; 293 294 Static const struct usbd_pipe_methods ohci_root_intr_methods = { 295 .upm_transfer = ohci_root_intr_transfer, 296 .upm_start = ohci_root_intr_start, 297 .upm_abort = ohci_root_intr_abort, 298 .upm_close = ohci_root_intr_close, 299 .upm_cleartoggle = ohci_noop, 300 .upm_done = ohci_root_intr_done, 301 }; 302 303 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = { 304 .upm_init = ohci_device_ctrl_init, 305 .upm_fini = ohci_device_ctrl_fini, 306 .upm_transfer = ohci_device_ctrl_transfer, 307 .upm_start = ohci_device_ctrl_start, 308 .upm_abort = ohci_device_ctrl_abort, 309 .upm_close = ohci_device_ctrl_close, 310 .upm_cleartoggle = ohci_noop, 311 .upm_done = ohci_device_ctrl_done, 312 }; 313 314 Static const struct usbd_pipe_methods ohci_device_intr_methods = { 315 .upm_init = ohci_device_intr_init, 316 .upm_fini = ohci_device_intr_fini, 317 .upm_transfer = ohci_device_intr_transfer, 318 .upm_start = ohci_device_intr_start, 319 .upm_abort = ohci_device_intr_abort, 320 .upm_close = ohci_device_intr_close, 321 .upm_cleartoggle = ohci_device_clear_toggle, 322 .upm_done = ohci_device_intr_done, 323 }; 324 325 Static const struct usbd_pipe_methods ohci_device_bulk_methods = { 326 .upm_init = ohci_device_bulk_init, 327 .upm_fini = ohci_device_bulk_fini, 328 .upm_transfer = ohci_device_bulk_transfer, 329 .upm_start = ohci_device_bulk_start, 330 .upm_abort = ohci_device_bulk_abort, 331 .upm_close = ohci_device_bulk_close, 332 .upm_cleartoggle = ohci_device_clear_toggle, 333 .upm_done = ohci_device_bulk_done, 334 }; 335 336 Static const struct usbd_pipe_methods ohci_device_isoc_methods = { 337 .upm_init = ohci_device_isoc_init, 338 .upm_fini = ohci_device_isoc_fini, 339 .upm_transfer = ohci_device_isoc_transfer, 340 .upm_abort = ohci_device_isoc_abort, 341 .upm_close = ohci_device_isoc_close, 342 .upm_cleartoggle = ohci_noop, 343 .upm_done = ohci_device_isoc_done, 344 }; 345 346 int 347 ohci_activate(device_t self, enum devact act) 348 { 349 struct ohci_softc *sc = device_private(self); 350 351 switch (act) { 352 case DVACT_DEACTIVATE: 353 sc->sc_dying = 1; 354 return 0; 355 default: 356 return EOPNOTSUPP; 357 } 358 } 359 360 void 361 ohci_childdet(device_t self, device_t child) 362 { 363 struct ohci_softc *sc = device_private(self); 364 365 KASSERT(sc->sc_child == child); 366 sc->sc_child = NULL; 367 } 368 369 int 370 ohci_detach(struct ohci_softc *sc, int flags) 371 { 372 int rv = 0; 373 374 if (sc->sc_child != NULL) 375 rv = config_detach(sc->sc_child, flags); 376 377 if (rv != 0) 378 return rv; 379 380 softint_disestablish(sc->sc_rhsc_si); 381 382 callout_halt(&sc->sc_tmo_rhsc, NULL); 383 callout_destroy(&sc->sc_tmo_rhsc); 384 385 mutex_destroy(&sc->sc_lock); 386 mutex_destroy(&sc->sc_intr_lock); 387 388 if (sc->sc_hcca != NULL) 389 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 390 pool_cache_destroy(sc->sc_xferpool); 391 392 return rv; 393 } 394 395 ohci_soft_ed_t * 396 ohci_alloc_sed(ohci_softc_t *sc) 397 { 398 ohci_soft_ed_t *sed; 399 usbd_status err; 400 int i, offs; 401 usb_dma_t dma; 402 403 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 404 405 mutex_enter(&sc->sc_lock); 406 if (sc->sc_freeeds == NULL) { 407 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 408 mutex_exit(&sc->sc_lock); 409 410 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 411 OHCI_ED_ALIGN, &dma); 412 if (err) 413 return 0; 414 415 mutex_enter(&sc->sc_lock); 416 for (i = 0; i < OHCI_SED_CHUNK; i++) { 417 offs = i * OHCI_SED_SIZE; 418 sed = KERNADDR(&dma, offs); 419 sed->physaddr = DMAADDR(&dma, offs); 420 sed->dma = dma; 421 sed->offs = offs; 422 sed->next = sc->sc_freeeds; 423 sc->sc_freeeds = sed; 424 } 425 } 426 sed = sc->sc_freeeds; 427 sc->sc_freeeds = sed->next; 428 mutex_exit(&sc->sc_lock); 429 430 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 431 sed->next = 0; 432 return sed; 433 } 434 435 static inline void 436 ohci_free_sed_locked(ohci_softc_t *sc, ohci_soft_ed_t *sed) 437 { 438 439 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 440 441 sed->next = sc->sc_freeeds; 442 sc->sc_freeeds = sed; 443 } 444 445 void 446 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 447 { 448 449 mutex_enter(&sc->sc_lock); 450 ohci_free_sed_locked(sc, sed); 451 mutex_exit(&sc->sc_lock); 452 } 453 454 ohci_soft_td_t * 455 ohci_alloc_std(ohci_softc_t *sc) 456 { 457 ohci_soft_td_t *std; 458 usbd_status err; 459 int i, offs; 460 usb_dma_t dma; 461 462 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 463 464 mutex_enter(&sc->sc_lock); 465 if (sc->sc_freetds == NULL) { 466 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 467 mutex_exit(&sc->sc_lock); 468 469 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 470 OHCI_TD_ALIGN, &dma); 471 if (err) 472 return NULL; 473 474 mutex_enter(&sc->sc_lock); 475 for (i = 0; i < OHCI_STD_CHUNK; i++) { 476 offs = i * OHCI_STD_SIZE; 477 std = KERNADDR(&dma, offs); 478 std->physaddr = DMAADDR(&dma, offs); 479 std->dma = dma; 480 std->offs = offs; 481 std->nexttd = sc->sc_freetds; 482 sc->sc_freetds = std; 483 } 484 } 485 486 std = sc->sc_freetds; 487 sc->sc_freetds = std->nexttd; 488 mutex_exit(&sc->sc_lock); 489 490 memset(&std->td, 0, sizeof(ohci_td_t)); 491 std->nexttd = NULL; 492 std->xfer = NULL; 493 494 return std; 495 } 496 497 void 498 ohci_free_std_locked(ohci_softc_t *sc, ohci_soft_td_t *std) 499 { 500 501 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 502 503 std->nexttd = sc->sc_freetds; 504 sc->sc_freetds = std; 505 } 506 507 void 508 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 509 { 510 511 mutex_enter(&sc->sc_lock); 512 ohci_free_std_locked(sc, std); 513 mutex_exit(&sc->sc_lock); 514 } 515 516 Static int 517 ohci_alloc_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, int length, int rd) 518 { 519 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 520 uint16_t flags = xfer->ux_flags; 521 522 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 523 524 DPRINTFN(8, "addr=%jd endpt=%jd len=%jd speed=%jd", 525 xfer->ux_pipe->up_dev->ud_addr, 526 UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress), 527 length, xfer->ux_pipe->up_dev->ud_speed); 528 529 ASSERT_SLEEPABLE(); 530 KASSERT(length != 0 || (!rd && (flags & USBD_FORCE_SHORT_XFER))); 531 532 size_t nstd = (!rd && (flags & USBD_FORCE_SHORT_XFER)) ? 1 : 0; 533 nstd += ((length + OHCI_PAGE_SIZE - 1) / OHCI_PAGE_SIZE); 534 ox->ox_stds = kmem_zalloc(sizeof(ohci_soft_td_t *) * nstd, 535 KM_SLEEP); 536 ox->ox_nstd = nstd; 537 538 DPRINTFN(8, "xfer %#jx nstd %jd", (uintptr_t)xfer, nstd, 0, 0); 539 540 for (size_t j = 0; j < ox->ox_nstd;) { 541 ohci_soft_td_t *cur = ohci_alloc_std(sc); 542 if (cur == NULL) 543 goto nomem; 544 545 ox->ox_stds[j++] = cur; 546 cur->xfer = xfer; 547 cur->flags = 0; 548 } 549 550 return 0; 551 552 nomem: 553 ohci_free_stds(sc, ox); 554 kmem_free(ox->ox_stds, sizeof(ohci_soft_td_t *) * nstd); 555 556 return ENOMEM; 557 } 558 559 Static void 560 ohci_free_stds(ohci_softc_t *sc, struct ohci_xfer *ox) 561 { 562 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 563 DPRINTF("ox=%#jx", (uintptr_t)ox, 0, 0, 0); 564 565 mutex_enter(&sc->sc_lock); 566 for (size_t i = 0; i < ox->ox_nstd; i++) { 567 ohci_soft_td_t *std = ox->ox_stds[i]; 568 if (std == NULL) 569 break; 570 ohci_free_std_locked(sc, std); 571 } 572 mutex_exit(&sc->sc_lock); 573 } 574 575 void 576 ohci_reset_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, 577 int alen, int rd, ohci_soft_td_t *sp, ohci_soft_td_t **ep) 578 { 579 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 580 ohci_soft_td_t *next, *cur; 581 int len, curlen; 582 usb_dma_t *dma = &xfer->ux_dmabuf; 583 uint16_t flags = xfer->ux_flags; 584 585 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 586 DPRINTF("start len=%jd", alen, 0, 0, 0); 587 588 KASSERT(mutex_owned(&sc->sc_lock)); 589 590 DPRINTFN(8, "addr=%jd endpt=%jd len=%jd speed=%jd", 591 xfer->ux_pipe->up_dev->ud_addr, 592 UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress), 593 alen, xfer->ux_pipe->up_dev->ud_speed); 594 595 KASSERT(sp); 596 597 int mps = UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize); 598 599 /* 600 * Assign next for the len == 0 case where we don't go through the 601 * main loop. 602 */ 603 len = alen; 604 cur = next = sp; 605 606 usb_syncmem(dma, 0, len, 607 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 608 const uint32_t tdflags = HTOO32( 609 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 610 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 611 612 size_t curoffs = 0; 613 for (size_t j = 1; len != 0;) { 614 if (j == ox->ox_nstd) 615 next = NULL; 616 else 617 next = ox->ox_stds[j++]; 618 KASSERT(next != cur); 619 620 curlen = 0; 621 const ohci_physaddr_t sdataphys = DMAADDR(dma, curoffs); 622 ohci_physaddr_t edataphys = DMAADDR(dma, curoffs + len - 1); 623 624 const ohci_physaddr_t sphyspg = OHCI_PAGE(sdataphys); 625 ohci_physaddr_t ephyspg = OHCI_PAGE(edataphys); 626 /* 627 * The OHCI hardware can handle at most one page 628 * crossing per TD 629 */ 630 curlen = len; 631 if (sphyspg != ephyspg && 632 sphyspg + OHCI_PAGE_SIZE != ephyspg) { 633 /* must use multiple TDs, fill as much as possible. */ 634 curlen = 2 * OHCI_PAGE_SIZE - 635 OHCI_PAGE_OFFSET(sdataphys); 636 /* the length must be a multiple of the max size */ 637 curlen -= curlen % mps; 638 edataphys = DMAADDR(dma, curoffs + curlen - 1); 639 } 640 KASSERT(curlen != 0); 641 DPRINTFN(4, "sdataphys=0x%08jx edataphys=0x%08jx " 642 "len=%jd curlen=%jd", sdataphys, edataphys, len, curlen); 643 644 cur->td.td_flags = tdflags; 645 cur->td.td_cbp = HTOO32(sdataphys); 646 cur->td.td_be = HTOO32(edataphys); 647 cur->td.td_nexttd = (next != NULL) ? HTOO32(next->physaddr) : 0; 648 cur->nexttd = next; 649 cur->len = curlen; 650 cur->flags = OHCI_ADD_LEN; 651 cur->xfer = xfer; 652 ohci_hash_add_td(sc, cur); 653 654 curoffs += curlen; 655 len -= curlen; 656 657 if (len != 0) { 658 KASSERT(next != NULL); 659 DPRINTFN(10, "extend chain", 0, 0, 0, 0); 660 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 661 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 662 663 cur = next; 664 } 665 } 666 cur->td.td_flags |= 667 HTOO32(xfer->ux_flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0); 668 669 if (!rd && 670 (flags & USBD_FORCE_SHORT_XFER) && 671 alen % mps == 0) { 672 /* We're adding a ZLP so sync the previous TD */ 673 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 674 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 675 676 /* Force a 0 length transfer at the end. */ 677 678 KASSERT(next != NULL); 679 cur = next; 680 681 cur->td.td_flags = tdflags; 682 cur->td.td_cbp = 0; /* indicate 0 length packet */ 683 cur->td.td_nexttd = 0; 684 cur->td.td_be = ~0; 685 cur->nexttd = NULL; 686 cur->len = 0; 687 cur->flags = 0; 688 cur->xfer = xfer; 689 ohci_hash_add_td(sc, cur); 690 691 DPRINTFN(2, "add 0 xfer", 0, 0, 0, 0); 692 } 693 694 /* Last TD gets usb_syncmem'ed by caller */ 695 *ep = cur; 696 } 697 698 ohci_soft_itd_t * 699 ohci_alloc_sitd(ohci_softc_t *sc) 700 { 701 ohci_soft_itd_t *sitd; 702 usbd_status err; 703 int i, offs; 704 usb_dma_t dma; 705 706 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 707 708 mutex_enter(&sc->sc_lock); 709 if (sc->sc_freeitds == NULL) { 710 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 711 mutex_exit(&sc->sc_lock); 712 713 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 714 OHCI_ITD_ALIGN, &dma); 715 if (err) 716 return NULL; 717 mutex_enter(&sc->sc_lock); 718 for (i = 0; i < OHCI_SITD_CHUNK; i++) { 719 offs = i * OHCI_SITD_SIZE; 720 sitd = KERNADDR(&dma, offs); 721 sitd->physaddr = DMAADDR(&dma, offs); 722 sitd->dma = dma; 723 sitd->offs = offs; 724 sitd->nextitd = sc->sc_freeitds; 725 sc->sc_freeitds = sitd; 726 } 727 } 728 729 sitd = sc->sc_freeitds; 730 sc->sc_freeitds = sitd->nextitd; 731 mutex_exit(&sc->sc_lock); 732 733 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 734 sitd->nextitd = NULL; 735 sitd->xfer = NULL; 736 737 #ifdef DIAGNOSTIC 738 sitd->isdone = true; 739 #endif 740 741 return sitd; 742 } 743 744 Static void 745 ohci_free_sitd_locked(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 746 { 747 748 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 749 DPRINTFN(10, "sitd=%#jx", (uintptr_t)sitd, 0, 0, 0); 750 751 KASSERT(sitd->isdone); 752 #ifdef DIAGNOSTIC 753 /* Warn double free */ 754 sitd->isdone = false; 755 #endif 756 757 sitd->nextitd = sc->sc_freeitds; 758 sc->sc_freeitds = sitd; 759 } 760 761 void 762 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 763 { 764 765 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 766 767 mutex_enter(&sc->sc_lock); 768 ohci_free_sitd_locked(sc, sitd); 769 mutex_exit(&sc->sc_lock); 770 } 771 772 int 773 ohci_init(ohci_softc_t *sc) 774 { 775 ohci_soft_ed_t *sed, *psed; 776 usbd_status err; 777 int i; 778 uint32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca /*, descb */; 779 780 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 781 782 aprint_normal_dev(sc->sc_dev, ""); 783 784 sc->sc_hcca = NULL; 785 callout_init(&sc->sc_tmo_rhsc, CALLOUT_MPSAFE); 786 787 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 788 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_USB); 789 790 sc->sc_rhsc_si = softint_establish(SOFTINT_USB | SOFTINT_MPSAFE, 791 ohci_rhsc_softint, sc); 792 793 for (i = 0; i < OHCI_HASH_SIZE; i++) 794 LIST_INIT(&sc->sc_hash_tds[i]); 795 for (i = 0; i < OHCI_HASH_SIZE; i++) 796 LIST_INIT(&sc->sc_hash_itds[i]); 797 798 sc->sc_xferpool = pool_cache_init(sizeof(struct ohci_xfer), 0, 0, 0, 799 "ohcixfer", NULL, IPL_USB, NULL, NULL, NULL); 800 801 rev = OREAD4(sc, OHCI_REVISION); 802 aprint_normal("OHCI version %d.%d%s\n", 803 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 804 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 805 806 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 807 aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n"); 808 sc->sc_bus.ub_revision = USBREV_UNKNOWN; 809 return -1; 810 } 811 sc->sc_bus.ub_revision = USBREV_1_0; 812 sc->sc_bus.ub_usedma = true; 813 814 /* XXX determine alignment by R/W */ 815 /* Allocate the HCCA area. */ 816 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 817 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 818 if (err) { 819 sc->sc_hcca = NULL; 820 return err; 821 } 822 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 823 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 824 825 sc->sc_eintrs = OHCI_NORMAL_INTRS; 826 827 /* Allocate dummy ED that starts the control list. */ 828 sc->sc_ctrl_head = ohci_alloc_sed(sc); 829 if (sc->sc_ctrl_head == NULL) { 830 err = ENOMEM; 831 goto bad1; 832 } 833 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 834 835 /* Allocate dummy ED that starts the bulk list. */ 836 sc->sc_bulk_head = ohci_alloc_sed(sc); 837 if (sc->sc_bulk_head == NULL) { 838 err = ENOMEM; 839 goto bad2; 840 } 841 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 842 usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs, 843 sizeof(sc->sc_bulk_head->ed), 844 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 845 846 /* Allocate dummy ED that starts the isochronous list. */ 847 sc->sc_isoc_head = ohci_alloc_sed(sc); 848 if (sc->sc_isoc_head == NULL) { 849 err = ENOMEM; 850 goto bad3; 851 } 852 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 853 usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs, 854 sizeof(sc->sc_isoc_head->ed), 855 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 856 857 /* Allocate all the dummy EDs that make up the interrupt tree. */ 858 for (i = 0; i < OHCI_NO_EDS; i++) { 859 sed = ohci_alloc_sed(sc); 860 if (sed == NULL) { 861 while (--i >= 0) 862 ohci_free_sed(sc, sc->sc_eds[i]); 863 err = ENOMEM; 864 goto bad4; 865 } 866 /* All ED fields are set to 0. */ 867 sc->sc_eds[i] = sed; 868 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 869 if (i != 0) 870 psed = sc->sc_eds[(i-1) / 2]; 871 else 872 psed= sc->sc_isoc_head; 873 sed->next = psed; 874 sed->ed.ed_nexted = HTOO32(psed->physaddr); 875 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 876 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 877 } 878 /* 879 * Fill HCCA interrupt table. The bit reversal is to get 880 * the tree set up properly to spread the interrupts. 881 */ 882 for (i = 0; i < OHCI_NO_INTRS; i++) 883 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 884 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 885 usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE, 886 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 887 888 #ifdef OHCI_DEBUG 889 DPRINTFN(15, "--- dump start ---", 0, 0, 0 ,0); 890 if (ohcidebug >= 15) { 891 for (i = 0; i < OHCI_NO_EDS; i++) { 892 DPRINTFN(15, "ed#%jd ", i, 0, 0, 0); 893 ohci_dump_ed(sc, sc->sc_eds[i]); 894 } 895 DPRINTFN(15, "iso", 0, 0, 0 ,0); 896 ohci_dump_ed(sc, sc->sc_isoc_head); 897 } 898 DPRINTFN(15, "--- dump end ---", 0, 0, 0 ,0); 899 #endif 900 901 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 902 ctl = OREAD4(sc, OHCI_CONTROL); 903 rwc = ctl & OHCI_RWC; 904 fm = OREAD4(sc, OHCI_FM_INTERVAL); 905 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 906 /* descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); */ 907 908 /* Determine in what context we are running. */ 909 if (ctl & OHCI_IR) { 910 /* SMM active, request change */ 911 DPRINTF("SMM active, request owner change", 0, 0, 0, 0); 912 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 913 (OHCI_OC | OHCI_MIE)) 914 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 915 s = OREAD4(sc, OHCI_COMMAND_STATUS); 916 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 917 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 918 usb_delay_ms(&sc->sc_bus, 1); 919 ctl = OREAD4(sc, OHCI_CONTROL); 920 } 921 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 922 if ((ctl & OHCI_IR) == 0) { 923 aprint_error_dev(sc->sc_dev, 924 "SMM does not respond, resetting\n"); 925 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 926 goto reset; 927 } 928 #if 0 929 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 930 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 931 /* BIOS started controller. */ 932 DPRINTF("BIOS active", 0, 0, 0, 0); 933 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 934 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 935 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 936 } 937 #endif 938 } else { 939 DPRINTF("cold started", 0 ,0 ,0 ,0); 940 reset: 941 /* Controller was cold started. */ 942 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 943 } 944 945 /* 946 * This reset should not be necessary according to the OHCI spec, but 947 * without it some controllers do not start. 948 */ 949 DPRINTF("sc %#jx: resetting", (uintptr_t)sc, 0, 0, 0); 950 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 951 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 952 953 /* We now own the host controller and the bus has been reset. */ 954 955 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 956 /* Nominal time for a reset is 10 us. */ 957 for (i = 0; i < 10; i++) { 958 delay(10); 959 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 960 if (!hcr) 961 break; 962 } 963 if (hcr) { 964 aprint_error_dev(sc->sc_dev, "reset timeout\n"); 965 err = EIO; 966 goto bad5; 967 } 968 #ifdef OHCI_DEBUG 969 if (ohcidebug >= 15) 970 ohci_dumpregs(sc); 971 #endif 972 973 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 974 975 /* Set up HC registers. */ 976 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 977 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 978 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 979 /* disable all interrupts and then switch on all desired interrupts */ 980 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 981 /* switch on desired functional features */ 982 ctl = OREAD4(sc, OHCI_CONTROL); 983 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 984 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 985 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 986 /* And finally start it! */ 987 OWRITE4(sc, OHCI_CONTROL, ctl); 988 989 /* 990 * The controller is now OPERATIONAL. Set a some final 991 * registers that should be set earlier, but that the 992 * controller ignores when in the SUSPEND state. 993 */ 994 ival = OHCI_GET_IVAL(fm); 995 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 996 fm |= OHCI_FSMPS(ival) | ival; 997 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 998 per = OHCI_PERIODIC(ival); /* 90% periodic */ 999 OWRITE4(sc, OHCI_PERIODIC_START, per); 1000 1001 if (sc->sc_flags & OHCIF_SUPERIO) { 1002 /* no overcurrent protection */ 1003 desca |= OHCI_NOCP; 1004 /* 1005 * Clear NoPowerSwitching and PowerOnToPowerGoodTime meaning 1006 * that 1007 * - ports are always power switched 1008 * - don't wait for powered root hub port 1009 */ 1010 desca &= ~(__SHIFTIN(0xff, OHCI_POTPGT_MASK) | OHCI_NPS); 1011 } 1012 1013 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 1014 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 1015 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 1016 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 1017 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 1018 1019 /* 1020 * The AMD756 requires a delay before re-reading the register, 1021 * otherwise it will occasionally report 0 ports. 1022 */ 1023 sc->sc_noport = 0; 1024 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 1025 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 1026 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 1027 } 1028 1029 #ifdef OHCI_DEBUG 1030 if (ohcidebug >= 5) 1031 ohci_dumpregs(sc); 1032 #endif 1033 1034 /* Set up the bus struct. */ 1035 sc->sc_bus.ub_methods = &ohci_bus_methods; 1036 sc->sc_bus.ub_pipesize = sizeof(struct ohci_pipe); 1037 1038 sc->sc_control = sc->sc_intre = 0; 1039 1040 /* Finally, turn on interrupts. */ 1041 DPRINTF("enabling %#jx", sc->sc_eintrs | OHCI_MIE, 0, 0, 0); 1042 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 1043 1044 return 0; 1045 1046 bad5: 1047 for (i = 0; i < OHCI_NO_EDS; i++) 1048 ohci_free_sed(sc, sc->sc_eds[i]); 1049 bad4: 1050 ohci_free_sed(sc, sc->sc_isoc_head); 1051 bad3: 1052 ohci_free_sed(sc, sc->sc_bulk_head); 1053 bad2: 1054 ohci_free_sed(sc, sc->sc_ctrl_head); 1055 bad1: 1056 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 1057 sc->sc_hcca = NULL; 1058 return err; 1059 } 1060 1061 struct usbd_xfer * 1062 ohci_allocx(struct usbd_bus *bus, unsigned int nframes) 1063 { 1064 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1065 struct usbd_xfer *xfer; 1066 1067 xfer = pool_cache_get(sc->sc_xferpool, PR_WAITOK); 1068 if (xfer != NULL) { 1069 memset(xfer, 0, sizeof(struct ohci_xfer)); 1070 1071 /* Initialise this always so we can call remove on it. */ 1072 usb_init_task(&xfer->ux_aborttask, ohci_timeout_task, xfer, 1073 USB_TASKQ_MPSAFE); 1074 #ifdef DIAGNOSTIC 1075 xfer->ux_state = XFER_BUSY; 1076 #endif 1077 } 1078 return xfer; 1079 } 1080 1081 void 1082 ohci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 1083 { 1084 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1085 1086 KASSERTMSG(xfer->ux_state == XFER_BUSY, 1087 "xfer=%p not busy, 0x%08x\n", xfer, xfer->ux_state); 1088 #ifdef DIAGNOSTIC 1089 xfer->ux_state = XFER_FREE; 1090 #endif 1091 pool_cache_put(sc->sc_xferpool, xfer); 1092 } 1093 1094 Static void 1095 ohci_get_lock(struct usbd_bus *bus, kmutex_t **lock) 1096 { 1097 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1098 1099 *lock = &sc->sc_lock; 1100 } 1101 1102 /* 1103 * Shut down the controller when the system is going down. 1104 */ 1105 bool 1106 ohci_shutdown(device_t self, int flags) 1107 { 1108 ohci_softc_t *sc = device_private(self); 1109 1110 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1111 1112 DPRINTF("stopping the HC", 0, 0, 0, 0); 1113 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 1114 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1115 return true; 1116 } 1117 1118 bool 1119 ohci_resume(device_t dv, const pmf_qual_t *qual) 1120 { 1121 ohci_softc_t *sc = device_private(dv); 1122 uint32_t ctl; 1123 1124 mutex_spin_enter(&sc->sc_intr_lock); 1125 sc->sc_bus.ub_usepolling++; 1126 mutex_spin_exit(&sc->sc_intr_lock); 1127 1128 /* Some broken BIOSes do not recover these values */ 1129 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1130 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, 1131 sc->sc_ctrl_head->physaddr); 1132 OWRITE4(sc, OHCI_BULK_HEAD_ED, 1133 sc->sc_bulk_head->physaddr); 1134 if (sc->sc_intre) 1135 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre & 1136 (OHCI_ALL_INTRS | OHCI_MIE)); 1137 if (sc->sc_control) 1138 ctl = sc->sc_control; 1139 else 1140 ctl = OREAD4(sc, OHCI_CONTROL); 1141 ctl |= OHCI_HCFS_RESUME; 1142 OWRITE4(sc, OHCI_CONTROL, ctl); 1143 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1144 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1145 OWRITE4(sc, OHCI_CONTROL, ctl); 1146 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1147 sc->sc_control = sc->sc_intre = 0; 1148 1149 mutex_spin_enter(&sc->sc_intr_lock); 1150 sc->sc_bus.ub_usepolling--; 1151 mutex_spin_exit(&sc->sc_intr_lock); 1152 1153 return true; 1154 } 1155 1156 bool 1157 ohci_suspend(device_t dv, const pmf_qual_t *qual) 1158 { 1159 ohci_softc_t *sc = device_private(dv); 1160 uint32_t ctl; 1161 1162 mutex_spin_enter(&sc->sc_intr_lock); 1163 sc->sc_bus.ub_usepolling++; 1164 mutex_spin_exit(&sc->sc_intr_lock); 1165 1166 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1167 if (sc->sc_control == 0) { 1168 /* 1169 * Preserve register values, in case that BIOS 1170 * does not recover them. 1171 */ 1172 sc->sc_control = ctl; 1173 sc->sc_intre = OREAD4(sc, 1174 OHCI_INTERRUPT_ENABLE); 1175 } 1176 ctl |= OHCI_HCFS_SUSPEND; 1177 OWRITE4(sc, OHCI_CONTROL, ctl); 1178 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1179 1180 mutex_spin_enter(&sc->sc_intr_lock); 1181 sc->sc_bus.ub_usepolling--; 1182 mutex_spin_exit(&sc->sc_intr_lock); 1183 1184 return true; 1185 } 1186 1187 #ifdef OHCI_DEBUG 1188 void 1189 ohci_dumpregs(ohci_softc_t *sc) 1190 { 1191 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1192 1193 DPRINTF("rev=0x%08jx control=0x%08jx command=0x%08jx", 1194 OREAD4(sc, OHCI_REVISION), 1195 OREAD4(sc, OHCI_CONTROL), 1196 OREAD4(sc, OHCI_COMMAND_STATUS), 0); 1197 DPRINTF(" intrstat=0x%08jx intre=0x%08jx intrd=0x%08jx", 1198 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1199 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1200 OREAD4(sc, OHCI_INTERRUPT_DISABLE), 0); 1201 DPRINTF(" hcca=0x%08jx percur=0x%08jx ctrlhd=0x%08jx", 1202 OREAD4(sc, OHCI_HCCA), 1203 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1204 OREAD4(sc, OHCI_CONTROL_HEAD_ED), 0); 1205 DPRINTF(" ctrlcur=0x%08jx bulkhd=0x%08jx bulkcur=0x%08jx", 1206 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1207 OREAD4(sc, OHCI_BULK_HEAD_ED), 1208 OREAD4(sc, OHCI_BULK_CURRENT_ED) ,0); 1209 DPRINTF(" done=0x%08jx fmival=0x%08jx fmrem=0x%08jx", 1210 OREAD4(sc, OHCI_DONE_HEAD), 1211 OREAD4(sc, OHCI_FM_INTERVAL), 1212 OREAD4(sc, OHCI_FM_REMAINING), 0); 1213 DPRINTF(" fmnum=0x%08jx perst=0x%08jx lsthrs=0x%08jx", 1214 OREAD4(sc, OHCI_FM_NUMBER), 1215 OREAD4(sc, OHCI_PERIODIC_START), 1216 OREAD4(sc, OHCI_LS_THRESHOLD), 0); 1217 DPRINTF(" desca=0x%08jx descb=0x%08jx stat=0x%08jx", 1218 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1219 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1220 OREAD4(sc, OHCI_RH_STATUS), 0); 1221 DPRINTF(" port1=0x%08jx port2=0x%08jx", 1222 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1223 OREAD4(sc, OHCI_RH_PORT_STATUS(2)), 0, 0); 1224 DPRINTF(" HCCA: frame_number=0x%04jx done_head=0x%08jx", 1225 O32TOH(sc->sc_hcca->hcca_frame_number), 1226 O32TOH(sc->sc_hcca->hcca_done_head), 0, 0); 1227 } 1228 #endif 1229 1230 Static int ohci_intr1(ohci_softc_t *); 1231 1232 int 1233 ohci_intr(void *p) 1234 { 1235 ohci_softc_t *sc = p; 1236 int ret = 0; 1237 1238 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1239 1240 if (sc == NULL) 1241 return 0; 1242 1243 mutex_spin_enter(&sc->sc_intr_lock); 1244 1245 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1246 goto done; 1247 1248 /* If we get an interrupt while polling, then just ignore it. */ 1249 if (sc->sc_bus.ub_usepolling) { 1250 DPRINTFN(16, "ignored interrupt while polling", 0, 0, 0, 0); 1251 /* for level triggered intrs, should do something to ack */ 1252 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1253 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1254 1255 goto done; 1256 } 1257 1258 ret = ohci_intr1(sc); 1259 1260 done: 1261 mutex_spin_exit(&sc->sc_intr_lock); 1262 return ret; 1263 } 1264 1265 Static int 1266 ohci_intr1(ohci_softc_t *sc) 1267 { 1268 uint32_t intrs, eintrs; 1269 1270 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1271 1272 /* In case the interrupt occurs before initialization has completed. */ 1273 if (sc == NULL || sc->sc_hcca == NULL) { 1274 #ifdef DIAGNOSTIC 1275 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1276 #endif 1277 return 0; 1278 } 1279 1280 KASSERT(mutex_owned(&sc->sc_intr_lock)); 1281 1282 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1283 if (!intrs) 1284 return 0; 1285 1286 /* Acknowledge */ 1287 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); 1288 eintrs = intrs & sc->sc_eintrs; 1289 DPRINTFN(7, "sc=%#jx", (uintptr_t)sc, 0, 0, 0); 1290 DPRINTFN(7, "intrs=%#jx(%#jx) eintrs=%#jx(%#jx)", 1291 intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), eintrs, 1292 sc->sc_eintrs); 1293 1294 if (!eintrs) { 1295 return 0; 1296 } 1297 1298 if (eintrs & OHCI_SO) { 1299 sc->sc_overrun_cnt++; 1300 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1301 printf("%s: %u scheduling overruns\n", 1302 device_xname(sc->sc_dev), sc->sc_overrun_cnt); 1303 sc->sc_overrun_cnt = 0; 1304 } 1305 /* XXX do what */ 1306 eintrs &= ~OHCI_SO; 1307 } 1308 if (eintrs & OHCI_WDH) { 1309 /* 1310 * We block the interrupt below, and reenable it later from 1311 * ohci_softintr(). 1312 */ 1313 usb_schedsoftintr(&sc->sc_bus); 1314 } 1315 if (eintrs & OHCI_RD) { 1316 DPRINTFN(5, "resume detect sc=%#jx", (uintptr_t)sc, 0, 0, 0); 1317 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1318 /* XXX process resume detect */ 1319 } 1320 if (eintrs & OHCI_UE) { 1321 DPRINTFN(5, "unrecoverable error sc=%#jx", (uintptr_t)sc, 0, 0, 0); 1322 printf("%s: unrecoverable error, controller halted\n", 1323 device_xname(sc->sc_dev)); 1324 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1325 /* XXX what else */ 1326 } 1327 if (eintrs & OHCI_RHSC) { 1328 /* 1329 * We block the interrupt below, and reenable it later from 1330 * a timeout. 1331 */ 1332 softint_schedule(sc->sc_rhsc_si); 1333 } 1334 1335 if (eintrs != 0) { 1336 /* Block unprocessed interrupts. */ 1337 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1338 sc->sc_eintrs &= ~eintrs; 1339 DPRINTF("sc %#jx blocking intrs 0x%jx", (uintptr_t)sc, 1340 eintrs, 0, 0); 1341 } 1342 1343 return 1; 1344 } 1345 1346 void 1347 ohci_rhsc_enable(void *v_sc) 1348 { 1349 ohci_softc_t *sc = v_sc; 1350 1351 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1352 DPRINTF("sc %#jx", (uintptr_t)sc, 0, 0, 0); 1353 mutex_spin_enter(&sc->sc_intr_lock); 1354 sc->sc_eintrs |= OHCI_RHSC; 1355 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1356 mutex_spin_exit(&sc->sc_intr_lock); 1357 } 1358 1359 #ifdef OHCI_DEBUG 1360 const char *ohci_cc_strs[] = { 1361 "NO_ERROR", 1362 "CRC", 1363 "BIT_STUFFING", 1364 "DATA_TOGGLE_MISMATCH", 1365 "STALL", 1366 "DEVICE_NOT_RESPONDING", 1367 "PID_CHECK_FAILURE", 1368 "UNEXPECTED_PID", 1369 "DATA_OVERRUN", 1370 "DATA_UNDERRUN", 1371 "BUFFER_OVERRUN", 1372 "BUFFER_UNDERRUN", 1373 "reserved", 1374 "reserved", 1375 "NOT_ACCESSED", 1376 "NOT_ACCESSED", 1377 }; 1378 #endif 1379 1380 void 1381 ohci_softintr(void *v) 1382 { 1383 struct usbd_bus *bus = v; 1384 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1385 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1386 ohci_soft_td_t *std, *sdone, *stdnext; 1387 struct usbd_xfer *xfer; 1388 struct ohci_pipe *opipe; 1389 int len, cc; 1390 int i, j, actlen, iframes, uedir; 1391 ohci_physaddr_t done; 1392 bool polling = sc->sc_bus.ub_usepolling; 1393 1394 KASSERT(polling || mutex_owned(&sc->sc_lock)); 1395 1396 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1397 1398 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1399 sizeof(sc->sc_hcca->hcca_done_head), 1400 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1401 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1402 sc->sc_hcca->hcca_done_head = 0; 1403 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1404 sizeof(sc->sc_hcca->hcca_done_head), 1405 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1406 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1407 sc->sc_eintrs |= OHCI_WDH; 1408 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1409 1410 /* Reverse the done list. */ 1411 for (sdone = NULL, sidone = NULL; done != 0; ) { 1412 std = ohci_hash_find_td(sc, done); 1413 if (std != NULL) { 1414 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1415 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1416 std->dnext = sdone; 1417 done = O32TOH(std->td.td_nexttd); 1418 sdone = std; 1419 DPRINTFN(10, "add TD %#jx", (uintptr_t)std, 0, 0, 0); 1420 continue; 1421 } 1422 sitd = ohci_hash_find_itd(sc, done); 1423 if (sitd != NULL) { 1424 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1425 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1426 sitd->dnext = sidone; 1427 done = O32TOH(sitd->itd.itd_nextitd); 1428 sidone = sitd; 1429 DPRINTFN(5, "add ITD %#jx", (uintptr_t)sitd, 0, 0, 0); 1430 continue; 1431 } 1432 DPRINTFN(10, "addr %#jx not found", (uintptr_t)done, 0, 0, 0); 1433 device_printf(sc->sc_dev, "WARNING: addr 0x%08lx not found\n", 1434 (u_long)done); 1435 break; 1436 } 1437 1438 DPRINTFN(10, "sdone=%#jx sidone=%#jx", (uintptr_t)sdone, 1439 (uintptr_t)sidone, 0, 0); 1440 DPRINTFN(10, "--- TD dump start ---", 0, 0, 0, 0); 1441 #ifdef OHCI_DEBUG 1442 if (ohcidebug >= 10) { 1443 for (std = sdone; std; std = std->dnext) 1444 ohci_dump_td(sc, std); 1445 } 1446 #endif 1447 DPRINTFN(10, "--- TD dump end ---", 0, 0, 0, 0); 1448 1449 for (std = sdone; std; std = stdnext) { 1450 xfer = std->xfer; 1451 stdnext = std->dnext; 1452 DPRINTFN(10, "std=%#jx xfer=%#jx hcpriv=%#jx", (uintptr_t)std, 1453 (uintptr_t)xfer, (uintptr_t)(xfer ? xfer->ux_hcpriv : 0), 1454 0); 1455 if (xfer == NULL) { 1456 /* 1457 * xfer == NULL: There seems to be no xfer associated 1458 * with this TD. It is tailp that happened to end up on 1459 * the done queue. 1460 * Shouldn't happen, but some chips are broken(?). 1461 */ 1462 continue; 1463 } 1464 1465 /* 1466 * If software has completed it, either by cancellation 1467 * or timeout, drop it on the floor. 1468 */ 1469 if (xfer->ux_status != USBD_IN_PROGRESS) { 1470 KASSERT(xfer->ux_status == USBD_CANCELLED || 1471 xfer->ux_status == USBD_TIMEOUT); 1472 continue; 1473 } 1474 1475 /* 1476 * Cancel the timeout and the task, which have not yet 1477 * run. If they have already fired, at worst they are 1478 * waiting for the lock. They will see that the xfer 1479 * is no longer in progress and give up. 1480 */ 1481 callout_stop(&xfer->ux_callout); 1482 usb_rem_task(xfer->ux_pipe->up_dev, &xfer->ux_aborttask); 1483 1484 len = std->len; 1485 if (std->td.td_cbp != 0) 1486 len -= O32TOH(std->td.td_be) - 1487 O32TOH(std->td.td_cbp) + 1; 1488 DPRINTFN(10, "len=%jd, flags=0x%jx", len, std->flags, 0, 0); 1489 if (std->flags & OHCI_ADD_LEN) 1490 xfer->ux_actlen += len; 1491 1492 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1493 if (cc == OHCI_CC_NO_ERROR) { 1494 ohci_hash_rem_td(sc, std); 1495 if (std->flags & OHCI_CALL_DONE) { 1496 xfer->ux_status = USBD_NORMAL_COMPLETION; 1497 usb_transfer_complete(xfer); 1498 } 1499 } else { 1500 /* 1501 * Endpoint is halted. First unlink all the TDs 1502 * belonging to the failed transfer, and then restart 1503 * the endpoint. 1504 */ 1505 ohci_soft_td_t *p, *n; 1506 opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1507 1508 DPRINTFN(10, "error cc=%jd", cc, 0, 0, 0); 1509 1510 /* remove xfer's TDs from the hash */ 1511 for (p = std; p->xfer == xfer; p = n) { 1512 n = p->nexttd; 1513 ohci_hash_rem_td(sc, p); 1514 } 1515 1516 ohci_soft_ed_t *sed = opipe->sed; 1517 1518 /* clear halt and TD chain */ 1519 sed->ed.ed_headp = HTOO32(p->physaddr); 1520 usb_syncmem(&sed->dma, 1521 sed->offs + offsetof(ohci_ed_t, ed_headp), 1522 sizeof(sed->ed.ed_headp), 1523 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1524 1525 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1526 1527 if (cc == OHCI_CC_DATA_UNDERRUN) 1528 xfer->ux_status = USBD_NORMAL_COMPLETION; 1529 else if (cc == OHCI_CC_STALL) 1530 xfer->ux_status = USBD_STALLED; 1531 else 1532 xfer->ux_status = USBD_IOERROR; 1533 usb_transfer_complete(xfer); 1534 } 1535 } 1536 DPRINTFN(10, "--- ITD dump start ---", 0, 0, 0, 0); 1537 #ifdef OHCI_DEBUG 1538 if (ohcidebug >= 10) { 1539 for (sitd = sidone; sitd; sitd = sitd->dnext) 1540 ohci_dump_itd(sc, sitd); 1541 } 1542 #endif 1543 DPRINTFN(10, "--- ITD dump end ---", 0, 0, 0, 0); 1544 1545 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1546 xfer = sitd->xfer; 1547 sitdnext = sitd->dnext; 1548 DPRINTFN(1, "sitd=%#jx xfer=%#jx hcpriv=%#jx", (uintptr_t)sitd, 1549 (uintptr_t)xfer, (uintptr_t)(xfer ? xfer->ux_hcpriv : 0), 1550 0); 1551 if (xfer == NULL) 1552 continue; 1553 1554 /* 1555 * If software has completed it, either by cancellation 1556 * or timeout, drop it on the floor. 1557 */ 1558 if (xfer->ux_status != USBD_IN_PROGRESS) { 1559 KASSERT(xfer->ux_status == USBD_CANCELLED || 1560 xfer->ux_status == USBD_TIMEOUT); 1561 continue; 1562 } 1563 1564 /* 1565 * Cancel the timeout and the task, which have not yet 1566 * run. If they have already fired, at worst they are 1567 * waiting for the lock. They will see that the xfer 1568 * is no longer in progress and give up. 1569 */ 1570 callout_stop(&xfer->ux_callout); 1571 usb_rem_task(xfer->ux_pipe->up_dev, &xfer->ux_aborttask); 1572 1573 KASSERT(!sitd->isdone); 1574 #ifdef DIAGNOSTIC 1575 sitd->isdone = true; 1576 #endif 1577 if (sitd->flags & OHCI_CALL_DONE) { 1578 ohci_soft_itd_t *next; 1579 1580 opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1581 opipe->isoc.inuse -= xfer->ux_nframes; 1582 uedir = UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc-> 1583 bEndpointAddress); 1584 xfer->ux_status = USBD_NORMAL_COMPLETION; 1585 actlen = 0; 1586 for (i = 0, sitd = xfer->ux_hcpriv;; 1587 sitd = next) { 1588 next = sitd->nextitd; 1589 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1590 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1591 xfer->ux_status = USBD_IOERROR; 1592 /* For input, update frlengths with actual */ 1593 /* XXX anything necessary for output? */ 1594 if (uedir == UE_DIR_IN && 1595 xfer->ux_status == USBD_NORMAL_COMPLETION) { 1596 iframes = OHCI_ITD_GET_FC(O32TOH( 1597 sitd->itd.itd_flags)); 1598 for (j = 0; j < iframes; i++, j++) { 1599 len = O16TOH(sitd-> 1600 itd.itd_offset[j]); 1601 if ((OHCI_ITD_PSW_GET_CC(len) & 1602 OHCI_CC_NOT_ACCESSED_MASK) 1603 == OHCI_CC_NOT_ACCESSED) 1604 len = 0; 1605 else 1606 len = OHCI_ITD_PSW_LENGTH(len); 1607 xfer->ux_frlengths[i] = len; 1608 actlen += len; 1609 } 1610 } 1611 if (sitd->flags & OHCI_CALL_DONE) 1612 break; 1613 ohci_hash_rem_itd(sc, sitd); 1614 1615 } 1616 ohci_hash_rem_itd(sc, sitd); 1617 if (uedir == UE_DIR_IN && 1618 xfer->ux_status == USBD_NORMAL_COMPLETION) 1619 xfer->ux_actlen = actlen; 1620 xfer->ux_hcpriv = NULL; 1621 1622 usb_transfer_complete(xfer); 1623 } 1624 } 1625 1626 DPRINTFN(10, "done", 0, 0, 0, 0); 1627 KASSERT(polling || mutex_owned(&sc->sc_lock)); 1628 } 1629 1630 void 1631 ohci_device_ctrl_done(struct usbd_xfer *xfer) 1632 { 1633 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1634 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1635 int len = UGETW(xfer->ux_request.wLength); 1636 int isread = (xfer->ux_request.bmRequestType & UT_READ); 1637 1638 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1639 DPRINTFN(10, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 1640 1641 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1642 KASSERT(xfer->ux_rqflags & URQ_REQUEST); 1643 1644 if (len) 1645 usb_syncmem(&xfer->ux_dmabuf, 0, len, 1646 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1647 usb_syncmem(&opipe->ctrl.reqdma, 0, 1648 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 1649 } 1650 1651 void 1652 ohci_device_intr_done(struct usbd_xfer *xfer) 1653 { 1654 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1655 int isread = 1656 (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN); 1657 1658 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1659 DPRINTFN(10, "xfer=%#jx, actlen=%jd", (uintptr_t)xfer, 1660 xfer->ux_actlen, 0, 0); 1661 1662 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1663 1664 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 1665 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1666 } 1667 1668 void 1669 ohci_device_bulk_done(struct usbd_xfer *xfer) 1670 { 1671 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1672 1673 int isread = 1674 (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN); 1675 1676 KASSERT(mutex_owned(&sc->sc_lock)); 1677 1678 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1679 DPRINTFN(10, "xfer=%#jx, actlen=%jd", (uintptr_t)xfer, xfer->ux_actlen, 1680 0, 0); 1681 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 1682 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1683 } 1684 1685 Static void 1686 ohci_rhsc_softint(void *arg) 1687 { 1688 ohci_softc_t *sc = arg; 1689 1690 mutex_enter(&sc->sc_lock); 1691 1692 ohci_rhsc(sc, sc->sc_intrxfer); 1693 1694 /* Do not allow RHSC interrupts > 1 per second */ 1695 callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1696 1697 mutex_exit(&sc->sc_lock); 1698 } 1699 1700 void 1701 ohci_rhsc(ohci_softc_t *sc, struct usbd_xfer *xfer) 1702 { 1703 u_char *p; 1704 int i, m; 1705 int hstatus __unused; 1706 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1707 1708 KASSERT(mutex_owned(&sc->sc_lock)); 1709 1710 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1711 DPRINTF("sc=%#jx xfer=%#jx hstatus=0x%08jx", (uintptr_t)sc, 1712 (uintptr_t)xfer, hstatus, 0); 1713 1714 if (xfer == NULL) { 1715 /* Just ignore the change. */ 1716 return; 1717 } 1718 1719 p = xfer->ux_buf; 1720 m = min(sc->sc_noport, xfer->ux_length * 8 - 1); 1721 memset(p, 0, xfer->ux_length); 1722 for (i = 1; i <= m; i++) { 1723 /* Pick out CHANGE bits from the status reg. */ 1724 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1725 p[i/8] |= 1 << (i%8); 1726 } 1727 DPRINTF("change=0x%02jx", *p, 0, 0, 0); 1728 xfer->ux_actlen = xfer->ux_length; 1729 xfer->ux_status = USBD_NORMAL_COMPLETION; 1730 1731 usb_transfer_complete(xfer); 1732 } 1733 1734 void 1735 ohci_root_intr_done(struct usbd_xfer *xfer) 1736 { 1737 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1738 1739 KASSERT(mutex_owned(&sc->sc_lock)); 1740 1741 KASSERT(sc->sc_intrxfer == xfer); 1742 sc->sc_intrxfer = NULL; 1743 } 1744 1745 void 1746 ohci_poll(struct usbd_bus *bus) 1747 { 1748 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1749 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1750 1751 #ifdef OHCI_DEBUG 1752 static int last; 1753 int new; 1754 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1755 if (new != last) { 1756 DPRINTFN(10, "intrs=0x%04jx", new, 0, 0, 0); 1757 last = new; 1758 } 1759 #endif 1760 sc->sc_eintrs |= OHCI_WDH; 1761 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) { 1762 mutex_spin_enter(&sc->sc_intr_lock); 1763 ohci_intr1(sc); 1764 mutex_spin_exit(&sc->sc_intr_lock); 1765 } 1766 } 1767 1768 /* 1769 * Add an ED to the schedule. Called with USB lock held. 1770 */ 1771 Static void 1772 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1773 { 1774 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1775 DPRINTFN(8, "sed=%#jx head=%#jx", (uintptr_t)sed, (uintptr_t)head, 0, 1776 0); 1777 1778 KASSERT(mutex_owned(&sc->sc_lock)); 1779 1780 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1781 sizeof(head->ed.ed_nexted), 1782 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1783 sed->next = head->next; 1784 sed->ed.ed_nexted = head->ed.ed_nexted; 1785 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1786 sizeof(sed->ed.ed_nexted), 1787 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1788 head->next = sed; 1789 head->ed.ed_nexted = HTOO32(sed->physaddr); 1790 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1791 sizeof(head->ed.ed_nexted), 1792 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1793 } 1794 1795 /* 1796 * Remove an ED from the schedule. Called with USB lock held. 1797 */ 1798 Static void 1799 ohci_rem_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1800 { 1801 ohci_soft_ed_t *p; 1802 1803 KASSERT(mutex_owned(&sc->sc_lock)); 1804 1805 /* XXX */ 1806 for (p = head; p != NULL && p->next != sed; p = p->next) 1807 ; 1808 KASSERT(p != NULL); 1809 1810 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1811 sizeof(sed->ed.ed_nexted), 1812 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1813 p->next = sed->next; 1814 p->ed.ed_nexted = sed->ed.ed_nexted; 1815 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 1816 sizeof(p->ed.ed_nexted), 1817 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1818 } 1819 1820 /* 1821 * When a transfer is completed the TD is added to the done queue by 1822 * the host controller. This queue is the processed by software. 1823 * Unfortunately the queue contains the physical address of the TD 1824 * and we have no simple way to translate this back to a kernel address. 1825 * To make the translation possible (and fast) we use a hash table of 1826 * TDs currently in the schedule. The physical address is used as the 1827 * hash value. 1828 */ 1829 1830 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1831 /* Called with USB lock held. */ 1832 void 1833 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1834 { 1835 int h = HASH(std->physaddr); 1836 1837 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1838 1839 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1840 } 1841 1842 /* Called with USB lock held. */ 1843 void 1844 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1845 { 1846 1847 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1848 1849 LIST_REMOVE(std, hnext); 1850 } 1851 1852 ohci_soft_td_t * 1853 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1854 { 1855 int h = HASH(a); 1856 ohci_soft_td_t *std; 1857 1858 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1859 std != NULL; 1860 std = LIST_NEXT(std, hnext)) 1861 if (std->physaddr == a) 1862 return std; 1863 return NULL; 1864 } 1865 1866 /* Called with USB lock held. */ 1867 void 1868 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1869 { 1870 int h = HASH(sitd->physaddr); 1871 1872 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1873 1874 KASSERT(mutex_owned(&sc->sc_lock)); 1875 1876 DPRINTFN(10, "sitd=%#jx physaddr=0x%08jx", 1877 (uintptr_t)sitd, (u_long)sitd->physaddr, 0, 0); 1878 1879 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1880 } 1881 1882 /* Called with USB lock held. */ 1883 void 1884 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1885 { 1886 1887 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1888 1889 KASSERT(mutex_owned(&sc->sc_lock)); 1890 1891 DPRINTFN(10, "sitd=%#jx physaddr=0x%08jx", (uintptr_t)sitd, 1892 sitd->physaddr, 0, 0); 1893 1894 LIST_REMOVE(sitd, hnext); 1895 } 1896 1897 ohci_soft_itd_t * 1898 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1899 { 1900 int h = HASH(a); 1901 ohci_soft_itd_t *sitd; 1902 1903 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1904 sitd != NULL; 1905 sitd = LIST_NEXT(sitd, hnext)) 1906 if (sitd->physaddr == a) 1907 return sitd; 1908 return NULL; 1909 } 1910 1911 void 1912 ohci_timeout(void *addr) 1913 { 1914 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1915 struct usbd_xfer *xfer = addr; 1916 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1917 struct usbd_device *dev = xfer->ux_pipe->up_dev; 1918 1919 DPRINTF("xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 1920 1921 mutex_enter(&sc->sc_lock); 1922 if (!sc->sc_dying && xfer->ux_status == USBD_IN_PROGRESS) 1923 usb_add_task(dev, &xfer->ux_aborttask, USB_TASKQ_HC); 1924 mutex_exit(&sc->sc_lock); 1925 } 1926 1927 void 1928 ohci_timeout_task(void *addr) 1929 { 1930 struct usbd_xfer *xfer = addr; 1931 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1932 1933 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1934 1935 DPRINTF("xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 1936 1937 mutex_enter(&sc->sc_lock); 1938 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1939 mutex_exit(&sc->sc_lock); 1940 } 1941 1942 #ifdef OHCI_DEBUG 1943 void 1944 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 1945 { 1946 for (; std; std = std->nexttd) { 1947 ohci_dump_td(sc, std); 1948 KASSERTMSG(std->nexttd == NULL || std != std->nexttd, 1949 "std %p next %p", std, std->nexttd); 1950 } 1951 } 1952 1953 void 1954 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1955 { 1956 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1957 1958 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1959 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1960 1961 uint32_t flags = O32TOH(std->td.td_flags); 1962 DPRINTF("TD(%#jx) at 0x%08jx:", (uintptr_t)std, std->physaddr, 0, 0); 1963 DPRINTF(" round=%jd DP=%jx DI=%jx T=%jx", 1964 !!(flags & OHCI_TD_R), 1965 __SHIFTOUT(flags, OHCI_TD_DP_MASK), 1966 OHCI_TD_GET_DI(flags), 1967 __SHIFTOUT(flags, OHCI_TD_TOGGLE_MASK)); 1968 DPRINTF(" EC=%jd CC=%jd", OHCI_TD_GET_EC(flags), 1969 OHCI_TD_GET_CC(flags), 0, 0); 1970 DPRINTF(" td_cbp=0x%08jx td_nexttd=0x%08jx td_be=0x%08jx", 1971 (u_long)O32TOH(std->td.td_cbp), 1972 (u_long)O32TOH(std->td.td_nexttd), 1973 (u_long)O32TOH(std->td.td_be), 0); 1974 } 1975 1976 void 1977 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1978 { 1979 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1980 1981 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1982 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1983 1984 uint32_t flags = O32TOH(sitd->itd.itd_flags); 1985 DPRINTF("ITD(%#jx) at 0x%08jx", (uintptr_t)sitd, sitd->physaddr, 0, 0); 1986 DPRINTF(" sf=%jd di=%jd fc=%jd cc=%jd", 1987 OHCI_ITD_GET_SF(flags), OHCI_ITD_GET_DI(flags), 1988 OHCI_ITD_GET_FC(flags), OHCI_ITD_GET_CC(flags)); 1989 DPRINTF(" bp0=0x%08jx next=0x%08jx be=0x%08jx", 1990 O32TOH(sitd->itd.itd_bp0), 1991 O32TOH(sitd->itd.itd_nextitd), 1992 O32TOH(sitd->itd.itd_be), 0); 1993 CTASSERT(OHCI_ITD_NOFFSET == 8); 1994 DPRINTF(" offs[0] = 0x%04jx offs[1] = 0x%04jx " 1995 "offs[2] = 0x%04jx offs[3] = 0x%04jx", 1996 O16TOH(sitd->itd.itd_offset[0]), 1997 O16TOH(sitd->itd.itd_offset[1]), 1998 O16TOH(sitd->itd.itd_offset[2]), 1999 O16TOH(sitd->itd.itd_offset[3])); 2000 DPRINTF(" offs[4] = 0x%04jx offs[5] = 0x%04jx " 2001 "offs[6] = 0x%04jx offs[7] = 0x%04jx", 2002 O16TOH(sitd->itd.itd_offset[4]), 2003 O16TOH(sitd->itd.itd_offset[5]), 2004 O16TOH(sitd->itd.itd_offset[6]), 2005 O16TOH(sitd->itd.itd_offset[7])); 2006 } 2007 2008 void 2009 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2010 { 2011 for (; sitd; sitd = sitd->nextitd) 2012 ohci_dump_itd(sc, sitd); 2013 } 2014 2015 void 2016 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 2017 { 2018 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2019 2020 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2021 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2022 2023 uint32_t flags = O32TOH(sed->ed.ed_flags); 2024 DPRINTF("ED(%#jx) at 0x%08jx:", (uintptr_t)sed, sed->physaddr, 0, 0); 2025 DPRINTF(" addr=%jd endpt=%jd maxp=%jd", 2026 OHCI_ED_GET_FA(flags), 2027 OHCI_ED_GET_EN(flags), 2028 OHCI_ED_GET_MAXP(flags), 2029 0); 2030 DPRINTF(" dir=%jd speed=%jd skip=%jd iso=%jd", 2031 __SHIFTOUT(flags, OHCI_ED_DIR_MASK), 2032 !!(flags & OHCI_ED_SPEED), 2033 !!(flags & OHCI_ED_SKIP), 2034 !!(flags & OHCI_ED_FORMAT_ISO)); 2035 DPRINTF(" tailp=0x%08jx", (u_long)O32TOH(sed->ed.ed_tailp), 2036 0, 0, 0); 2037 DPRINTF(" headp=0x%08jx nexted=0x%08jx halted=%jd carry=%jd", 2038 O32TOH(sed->ed.ed_headp), O32TOH(sed->ed.ed_nexted), 2039 !!(O32TOH(sed->ed.ed_headp) & OHCI_HALTED), 2040 !!(O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY)); 2041 } 2042 #endif 2043 2044 usbd_status 2045 ohci_open(struct usbd_pipe *pipe) 2046 { 2047 struct usbd_device *dev = pipe->up_dev; 2048 struct usbd_bus *bus = dev->ud_bus; 2049 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2050 usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc; 2051 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2052 uint8_t addr = dev->ud_addr; 2053 uint8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2054 ohci_soft_ed_t *sed; 2055 ohci_soft_td_t *std; 2056 ohci_soft_itd_t *sitd; 2057 ohci_physaddr_t tdphys; 2058 uint32_t fmt; 2059 usbd_status err = USBD_NOMEM; 2060 int ival; 2061 2062 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2063 DPRINTFN(1, "pipe=%#jx, addr=%jd, endpt=%jd (%jd)", (uintptr_t)pipe, 2064 addr, ed->bEndpointAddress, bus->ub_rhaddr); 2065 2066 if (sc->sc_dying) { 2067 return USBD_IOERROR; 2068 } 2069 2070 std = NULL; 2071 sed = NULL; 2072 2073 if (addr == bus->ub_rhaddr) { 2074 switch (ed->bEndpointAddress) { 2075 case USB_CONTROL_ENDPOINT: 2076 pipe->up_methods = &roothub_ctrl_methods; 2077 break; 2078 case UE_DIR_IN | USBROOTHUB_INTR_ENDPT: 2079 pipe->up_methods = &ohci_root_intr_methods; 2080 break; 2081 default: 2082 err = USBD_INVAL; 2083 goto bad; 2084 } 2085 } else { 2086 sed = ohci_alloc_sed(sc); 2087 if (sed == NULL) 2088 goto bad; 2089 opipe->sed = sed; 2090 if (xfertype == UE_ISOCHRONOUS) { 2091 sitd = ohci_alloc_sitd(sc); 2092 if (sitd == NULL) 2093 goto bad; 2094 2095 opipe->tail.itd = sitd; 2096 tdphys = sitd->physaddr; 2097 fmt = OHCI_ED_FORMAT_ISO; 2098 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2099 fmt |= OHCI_ED_DIR_IN; 2100 else 2101 fmt |= OHCI_ED_DIR_OUT; 2102 } else { 2103 std = ohci_alloc_std(sc); 2104 if (std == NULL) 2105 goto bad; 2106 2107 opipe->tail.td = std; 2108 tdphys = std->physaddr; 2109 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2110 } 2111 sed->ed.ed_flags = HTOO32( 2112 OHCI_ED_SET_FA(addr) | 2113 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2114 (dev->ud_speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2115 fmt | 2116 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2117 sed->ed.ed_headp = HTOO32(tdphys | 2118 (pipe->up_endpoint->ue_toggle ? OHCI_TOGGLECARRY : 0)); 2119 sed->ed.ed_tailp = HTOO32(tdphys); 2120 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2121 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2122 2123 switch (xfertype) { 2124 case UE_CONTROL: 2125 pipe->up_methods = &ohci_device_ctrl_methods; 2126 err = usb_allocmem(&sc->sc_bus, 2127 sizeof(usb_device_request_t), 2128 0, &opipe->ctrl.reqdma); 2129 if (err) 2130 goto bad; 2131 mutex_enter(&sc->sc_lock); 2132 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2133 mutex_exit(&sc->sc_lock); 2134 break; 2135 case UE_INTERRUPT: 2136 pipe->up_methods = &ohci_device_intr_methods; 2137 ival = pipe->up_interval; 2138 if (ival == USBD_DEFAULT_INTERVAL) 2139 ival = ed->bInterval; 2140 err = ohci_device_setintr(sc, opipe, ival); 2141 if (err) 2142 goto bad; 2143 break; 2144 case UE_ISOCHRONOUS: 2145 pipe->up_serialise = false; 2146 pipe->up_methods = &ohci_device_isoc_methods; 2147 return ohci_setup_isoc(pipe); 2148 case UE_BULK: 2149 pipe->up_methods = &ohci_device_bulk_methods; 2150 mutex_enter(&sc->sc_lock); 2151 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2152 mutex_exit(&sc->sc_lock); 2153 break; 2154 } 2155 } 2156 2157 return USBD_NORMAL_COMPLETION; 2158 2159 bad: 2160 if (std != NULL) { 2161 ohci_free_std(sc, std); 2162 } 2163 if (sed != NULL) 2164 ohci_free_sed(sc, sed); 2165 return err; 2166 2167 } 2168 2169 /* 2170 * Close a reqular pipe. 2171 * Assumes that there are no pending transactions. 2172 */ 2173 void 2174 ohci_close_pipe(struct usbd_pipe *pipe, ohci_soft_ed_t *head) 2175 { 2176 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2177 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2178 ohci_soft_ed_t *sed = opipe->sed; 2179 2180 KASSERT(mutex_owned(&sc->sc_lock)); 2181 2182 #ifdef DIAGNOSTIC 2183 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2184 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2185 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2186 ohci_soft_td_t *std; 2187 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2188 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2189 "tl=0x%x pipe=%p, std=%p\n", sed, 2190 (int)O32TOH(sed->ed.ed_headp), 2191 (int)O32TOH(sed->ed.ed_tailp), 2192 pipe, std); 2193 #ifdef OHCI_DEBUG 2194 usbd_dump_pipe(&opipe->pipe); 2195 ohci_dump_ed(sc, sed); 2196 if (std) 2197 ohci_dump_td(sc, std); 2198 #endif 2199 usb_delay_ms(&sc->sc_bus, 2); 2200 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2201 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2202 printf("ohci_close_pipe: pipe still not empty\n"); 2203 } 2204 #endif 2205 ohci_rem_ed(sc, sed, head); 2206 /* Make sure the host controller is not touching this ED */ 2207 usb_delay_ms(&sc->sc_bus, 1); 2208 pipe->up_endpoint->ue_toggle = 2209 (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0; 2210 ohci_free_sed_locked(sc, opipe->sed); 2211 } 2212 2213 /* 2214 * Cancel or timeout a device request. We have two cases to deal with 2215 * 2216 * 1) A driver wants to stop scheduled or inflight transfers 2217 * 2) A transfer has timed out 2218 * 2219 * It's impossible to guarantee that the requested transfer will not 2220 * have (partially) happened since the hardware runs concurrently. 2221 * 2222 * Transfer state is protected by the bus lock and we set the transfer status 2223 * as soon as either of the above happens (with bus lock held). 2224 * 2225 * Then we arrange for the hardware to tells us that it is not still 2226 * processing the TDs by setting the sKip bit and requesting a SOF interrupt 2227 * 2228 * Once we see the SOF interrupt we can check the transfer TDs/iTDs to see if 2229 * they've been processed and either 2230 * a) if they're unused recover them for later use, or 2231 * b) if they've been used allocate new TD/iTDs to replace those 2232 * used. The softint handler will free the old ones. 2233 */ 2234 void 2235 ohci_abort_xfer(struct usbd_xfer *xfer, usbd_status status) 2236 { 2237 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2238 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2239 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2240 ohci_soft_ed_t *sed = opipe->sed; 2241 ohci_soft_td_t *p, *n; 2242 ohci_physaddr_t headp; 2243 int hit; 2244 2245 KASSERTMSG((status == USBD_CANCELLED || status == USBD_TIMEOUT), 2246 "invalid status for abort: %d", (int)status); 2247 2248 DPRINTF("xfer=%#jx pipe=%#jx sed=%#jx", (uintptr_t)xfer, 2249 (uintptr_t)opipe, (uintptr_t)sed, 0); 2250 2251 KASSERT(mutex_owned(&sc->sc_lock)); 2252 ASSERT_SLEEPABLE(); 2253 2254 if (status == USBD_CANCELLED) { 2255 /* 2256 * We are synchronously aborting. Try to stop the 2257 * callout and task, but if we can't, wait for them to 2258 * complete. 2259 */ 2260 callout_halt(&xfer->ux_callout, &sc->sc_lock); 2261 usb_rem_task_wait(xfer->ux_pipe->up_dev, &xfer->ux_aborttask, 2262 USB_TASKQ_HC, &sc->sc_lock); 2263 } else { 2264 /* Otherwise, we are timing out. */ 2265 KASSERT(status == USBD_TIMEOUT); 2266 } 2267 2268 /* 2269 * The xfer cannot have been cancelled already. It is the 2270 * responsibility of the caller of usbd_abort_pipe not to try 2271 * to abort a pipe multiple times, whether concurrently or 2272 * sequentially. 2273 */ 2274 KASSERT(xfer->ux_status != USBD_CANCELLED); 2275 2276 /* Only the timeout, which runs only once, can time it out. */ 2277 KASSERT(xfer->ux_status != USBD_TIMEOUT); 2278 2279 /* If anyone else beat us, we're done. */ 2280 if (xfer->ux_status != USBD_IN_PROGRESS) 2281 return; 2282 2283 /* We beat everyone else. Claim the status. */ 2284 xfer->ux_status = status; 2285 2286 /* 2287 * If we're dying, skip the hardware action and just notify the 2288 * software that we're done. 2289 */ 2290 if (sc->sc_dying) { 2291 DPRINTFN(4, "xfer %#jx dying %ju", (uintptr_t)xfer, 2292 xfer->ux_status, 0, 0); 2293 goto dying; 2294 } 2295 2296 /* 2297 * HC Step 1: Unless the endpoint is already halted, we set the endpoint 2298 * descriptor sKip bit and wait for hardware to complete processing. 2299 * 2300 * This includes ensuring that any TDs of the transfer that got onto 2301 * the done list are also removed. We ensure this by waiting for 2302 * both a WDH and SOF interrupt. 2303 */ 2304 DPRINTFN(1, "stop ed=%#jx", (uintptr_t)sed, 0, 0, 0); 2305 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2306 sizeof(sed->ed.ed_flags), 2307 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2308 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2309 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2310 sizeof(sed->ed.ed_flags), 2311 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2312 2313 /* 2314 * HC Step 2: Wait until we know hardware has finished any possible 2315 * use of the xfer. 2316 */ 2317 /* Hardware finishes in 1ms */ 2318 usb_delay_ms_locked(opipe->pipe.up_dev->ud_bus, 20, &sc->sc_lock); 2319 2320 /* 2321 * HC Step 3: Remove any vestiges of the xfer from the hardware. 2322 * The complication here is that the hardware may have executed 2323 * beyond the xfer we're trying to abort. So as we're scanning 2324 * the TDs of this xfer we check if the hardware points to 2325 * any of them. 2326 */ 2327 p = xfer->ux_hcpriv; 2328 KASSERT(p); 2329 2330 #ifdef OHCI_DEBUG 2331 DPRINTF("--- dump start ---", 0, 0, 0, 0); 2332 2333 if (ohcidebug >= 2) { 2334 DPRINTF("sed:", 0, 0, 0, 0); 2335 ohci_dump_ed(sc, sed); 2336 ohci_dump_tds(sc, p); 2337 } 2338 DPRINTF("--- dump end ---", 0, 0, 0, 0); 2339 #endif 2340 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2341 hit = 0; 2342 for (; p->xfer == xfer; p = n) { 2343 hit |= headp == p->physaddr; 2344 n = p->nexttd; 2345 ohci_hash_rem_td(sc, p); 2346 } 2347 /* Zap headp register if hardware pointed inside the xfer. */ 2348 if (hit) { 2349 DPRINTFN(1, "set hd=0x%08jx, tl=0x%08jx", (int)p->physaddr, 2350 (int)O32TOH(sed->ed.ed_tailp), 0, 0); 2351 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2352 usb_syncmem(&sed->dma, 2353 sed->offs + offsetof(ohci_ed_t, ed_headp), 2354 sizeof(sed->ed.ed_headp), 2355 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2356 } else { 2357 DPRINTFN(1, "no hit", 0, 0, 0, 0); 2358 } 2359 2360 /* 2361 * HC Step 4: Turn on hardware again. 2362 */ 2363 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2364 sizeof(sed->ed.ed_flags), 2365 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2366 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2367 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2368 sizeof(sed->ed.ed_flags), 2369 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2370 2371 /* 2372 * Final step: Notify completion to waiting xfers. 2373 */ 2374 dying: 2375 usb_transfer_complete(xfer); 2376 DPRINTFN(14, "end", 0, 0, 0, 0); 2377 2378 KASSERT(mutex_owned(&sc->sc_lock)); 2379 } 2380 2381 /* 2382 * Data structures and routines to emulate the root hub. 2383 */ 2384 Static int 2385 ohci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req, 2386 void *buf, int buflen) 2387 { 2388 ohci_softc_t *sc = OHCI_BUS2SC(bus); 2389 usb_port_status_t ps; 2390 uint16_t len, value, index; 2391 int l, totlen = 0; 2392 int port, i; 2393 uint32_t v; 2394 2395 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2396 2397 if (sc->sc_dying) 2398 return -1; 2399 2400 DPRINTFN(4, "type=0x%02jx request=%02jx", req->bmRequestType, 2401 req->bRequest, 0, 0); 2402 2403 len = UGETW(req->wLength); 2404 value = UGETW(req->wValue); 2405 index = UGETW(req->wIndex); 2406 2407 #define C(x,y) ((x) | ((y) << 8)) 2408 switch (C(req->bRequest, req->bmRequestType)) { 2409 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2410 DPRINTFN(8, "wValue=0x%04jx", value, 0, 0, 0); 2411 if (len == 0) 2412 break; 2413 switch (value) { 2414 #define sd ((usb_string_descriptor_t *)buf) 2415 case C(2, UDESC_STRING): 2416 /* Product */ 2417 totlen = usb_makestrdesc(sd, len, "OHCI root hub"); 2418 break; 2419 #undef sd 2420 default: 2421 /* default from usbroothub */ 2422 return buflen; 2423 } 2424 break; 2425 2426 /* Hub requests */ 2427 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2428 break; 2429 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2430 DPRINTFN(8, "UR_CLEAR_PORT_FEATURE port=%jd feature=%jd", 2431 index, value, 0, 0); 2432 if (index < 1 || index > sc->sc_noport) { 2433 return -1; 2434 } 2435 port = OHCI_RH_PORT_STATUS(index); 2436 switch(value) { 2437 case UHF_PORT_ENABLE: 2438 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2439 break; 2440 case UHF_PORT_SUSPEND: 2441 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2442 break; 2443 case UHF_PORT_POWER: 2444 /* Yes, writing to the LOW_SPEED bit clears power. */ 2445 OWRITE4(sc, port, UPS_LOW_SPEED); 2446 break; 2447 case UHF_C_PORT_CONNECTION: 2448 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2449 break; 2450 case UHF_C_PORT_ENABLE: 2451 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2452 break; 2453 case UHF_C_PORT_SUSPEND: 2454 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2455 break; 2456 case UHF_C_PORT_OVER_CURRENT: 2457 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2458 break; 2459 case UHF_C_PORT_RESET: 2460 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2461 break; 2462 default: 2463 return -1; 2464 } 2465 switch(value) { 2466 case UHF_C_PORT_CONNECTION: 2467 case UHF_C_PORT_ENABLE: 2468 case UHF_C_PORT_SUSPEND: 2469 case UHF_C_PORT_OVER_CURRENT: 2470 case UHF_C_PORT_RESET: 2471 /* Enable RHSC interrupt if condition is cleared. */ 2472 if ((OREAD4(sc, port) >> 16) == 0) 2473 ohci_rhsc_enable(sc); 2474 break; 2475 default: 2476 break; 2477 } 2478 break; 2479 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2480 if (len == 0) 2481 break; 2482 if ((value & 0xff) != 0) { 2483 return -1; 2484 } 2485 usb_hub_descriptor_t hubd; 2486 2487 totlen = min(buflen, sizeof(hubd)); 2488 memcpy(&hubd, buf, totlen); 2489 2490 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2491 hubd.bNbrPorts = sc->sc_noport; 2492 USETW(hubd.wHubCharacteristics, 2493 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2494 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2495 /* XXX overcurrent */ 2496 ); 2497 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2498 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2499 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2500 hubd.DeviceRemovable[i++] = (uint8_t)v; 2501 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2502 totlen = min(totlen, hubd.bDescLength); 2503 memcpy(buf, &hubd, totlen); 2504 break; 2505 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2506 if (len != 4) { 2507 return -1; 2508 } 2509 memset(buf, 0, len); /* ? XXX */ 2510 totlen = len; 2511 break; 2512 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2513 DPRINTFN(8, "get port status i=%jd", index, 0, 0, 0); 2514 if (index < 1 || index > sc->sc_noport) { 2515 return -1; 2516 } 2517 if (len != 4) { 2518 return -1; 2519 } 2520 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2521 DPRINTFN(8, "port status=0x%04jx", v, 0, 0, 0); 2522 USETW(ps.wPortStatus, v); 2523 USETW(ps.wPortChange, v >> 16); 2524 totlen = min(len, sizeof(ps)); 2525 memcpy(buf, &ps, totlen); 2526 break; 2527 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2528 return -1; 2529 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2530 break; 2531 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2532 if (index < 1 || index > sc->sc_noport) { 2533 return -1; 2534 } 2535 port = OHCI_RH_PORT_STATUS(index); 2536 switch(value) { 2537 case UHF_PORT_ENABLE: 2538 OWRITE4(sc, port, UPS_PORT_ENABLED); 2539 break; 2540 case UHF_PORT_SUSPEND: 2541 OWRITE4(sc, port, UPS_SUSPEND); 2542 break; 2543 case UHF_PORT_RESET: 2544 DPRINTFN(5, "reset port %jd", index, 0, 0, 0); 2545 OWRITE4(sc, port, UPS_RESET); 2546 for (i = 0; i < 5; i++) { 2547 usb_delay_ms(&sc->sc_bus, 2548 USB_PORT_ROOT_RESET_DELAY); 2549 if (sc->sc_dying) { 2550 return -1; 2551 } 2552 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2553 break; 2554 } 2555 DPRINTFN(8, "port %jd reset, status = 0x%04jx", index, 2556 OREAD4(sc, port), 0, 0); 2557 break; 2558 case UHF_PORT_POWER: 2559 DPRINTFN(2, "set port power %jd", index, 0, 0, 0); 2560 OWRITE4(sc, port, UPS_PORT_POWER); 2561 break; 2562 default: 2563 return -1; 2564 } 2565 break; 2566 default: 2567 /* default from usbroothub */ 2568 return buflen; 2569 } 2570 2571 return totlen; 2572 } 2573 2574 Static usbd_status 2575 ohci_root_intr_transfer(struct usbd_xfer *xfer) 2576 { 2577 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2578 usbd_status err; 2579 2580 /* Insert last in queue. */ 2581 mutex_enter(&sc->sc_lock); 2582 err = usb_insert_transfer(xfer); 2583 mutex_exit(&sc->sc_lock); 2584 if (err) 2585 return err; 2586 2587 /* Pipe isn't running, start first */ 2588 return ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2589 } 2590 2591 Static usbd_status 2592 ohci_root_intr_start(struct usbd_xfer *xfer) 2593 { 2594 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2595 2596 if (sc->sc_dying) 2597 return USBD_IOERROR; 2598 2599 mutex_enter(&sc->sc_lock); 2600 KASSERT(sc->sc_intrxfer == NULL); 2601 sc->sc_intrxfer = xfer; 2602 mutex_exit(&sc->sc_lock); 2603 2604 return USBD_IN_PROGRESS; 2605 } 2606 2607 /* Abort a root interrupt request. */ 2608 Static void 2609 ohci_root_intr_abort(struct usbd_xfer *xfer) 2610 { 2611 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 2612 2613 KASSERT(mutex_owned(&sc->sc_lock)); 2614 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 2615 2616 xfer->ux_status = USBD_CANCELLED; 2617 usb_transfer_complete(xfer); 2618 } 2619 2620 /* Close the root pipe. */ 2621 Static void 2622 ohci_root_intr_close(struct usbd_pipe *pipe) 2623 { 2624 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2625 2626 KASSERT(mutex_owned(&sc->sc_lock)); 2627 2628 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2629 2630 sc->sc_intrxfer = NULL; 2631 } 2632 2633 /************************/ 2634 2635 int 2636 ohci_device_ctrl_init(struct usbd_xfer *xfer) 2637 { 2638 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2639 usb_device_request_t *req = &xfer->ux_request; 2640 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2641 ohci_soft_td_t *stat, *setup; 2642 int isread = req->bmRequestType & UT_READ; 2643 int len = xfer->ux_bufsize; 2644 int err = ENOMEM; 2645 2646 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2647 2648 setup = ohci_alloc_std(sc); 2649 if (setup == NULL) { 2650 goto bad1; 2651 } 2652 stat = ohci_alloc_std(sc); 2653 if (stat == NULL) { 2654 goto bad2; 2655 } 2656 2657 ox->ox_setup = setup; 2658 ox->ox_stat = stat; 2659 ox->ox_nstd = 0; 2660 2661 /* Set up data transaction */ 2662 if (len != 0) { 2663 err = ohci_alloc_std_chain(sc, xfer, len, isread); 2664 if (err) { 2665 goto bad3; 2666 } 2667 } 2668 return 0; 2669 2670 bad3: 2671 ohci_free_std(sc, stat); 2672 bad2: 2673 ohci_free_std(sc, setup); 2674 bad1: 2675 return err; 2676 } 2677 2678 void 2679 ohci_device_ctrl_fini(struct usbd_xfer *xfer) 2680 { 2681 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2682 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2683 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2684 2685 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2686 DPRINTFN(8, "xfer %#jx nstd %jd", (uintptr_t)xfer, ox->ox_nstd, 0, 0); 2687 2688 mutex_enter(&sc->sc_lock); 2689 if (ox->ox_setup != opipe->tail.td) { 2690 ohci_free_std_locked(sc, ox->ox_setup); 2691 } 2692 for (size_t i = 0; i < ox->ox_nstd; i++) { 2693 ohci_soft_td_t *std = ox->ox_stds[i]; 2694 if (std == NULL) 2695 break; 2696 ohci_free_std_locked(sc, std); 2697 } 2698 ohci_free_std_locked(sc, ox->ox_stat); 2699 mutex_exit(&sc->sc_lock); 2700 2701 if (ox->ox_nstd) { 2702 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 2703 kmem_free(ox->ox_stds, sz); 2704 } 2705 } 2706 2707 Static usbd_status 2708 ohci_device_ctrl_transfer(struct usbd_xfer *xfer) 2709 { 2710 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2711 usbd_status err; 2712 2713 /* Insert last in queue. */ 2714 mutex_enter(&sc->sc_lock); 2715 err = usb_insert_transfer(xfer); 2716 mutex_exit(&sc->sc_lock); 2717 if (err) 2718 return err; 2719 2720 /* Pipe isn't running, start first */ 2721 return ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2722 } 2723 2724 Static usbd_status 2725 ohci_device_ctrl_start(struct usbd_xfer *xfer) 2726 { 2727 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2728 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2729 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2730 usb_device_request_t *req = &xfer->ux_request; 2731 struct usbd_device *dev __diagused = opipe->pipe.up_dev; 2732 ohci_soft_td_t *setup, *stat, *next, *tail; 2733 ohci_soft_ed_t *sed; 2734 int isread; 2735 int len; 2736 2737 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2738 2739 if (sc->sc_dying) 2740 return USBD_IOERROR; 2741 2742 KASSERT(xfer->ux_rqflags & URQ_REQUEST); 2743 2744 isread = req->bmRequestType & UT_READ; 2745 len = UGETW(req->wLength); 2746 2747 DPRINTF("xfer=%#jx len=%jd, addr=%jd, endpt=%jd", (uintptr_t)xfer, len, 2748 dev->ud_addr, opipe->pipe.up_endpoint->ue_edesc->bEndpointAddress); 2749 DPRINTF("type=0x%02jx, request=0x%02jx, wValue=0x%04jx, wIndex=0x%04jx", 2750 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2751 UGETW(req->wIndex)); 2752 2753 /* Need to take lock here for pipe->tail.td */ 2754 mutex_enter(&sc->sc_lock); 2755 2756 /* 2757 * Use the pipe "tail" TD as our first and loan our first TD to the 2758 * next transfer 2759 */ 2760 setup = opipe->tail.td; 2761 opipe->tail.td = ox->ox_setup; 2762 ox->ox_setup = setup; 2763 2764 stat = ox->ox_stat; 2765 2766 /* point at sentinel */ 2767 tail = opipe->tail.td; 2768 sed = opipe->sed; 2769 2770 KASSERTMSG(OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)) == dev->ud_addr, 2771 "address ED %d pipe %d\n", 2772 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), dev->ud_addr); 2773 KASSERTMSG(OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)) == 2774 UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize), 2775 "MPL ED %d pipe %d\n", 2776 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), 2777 UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize)); 2778 2779 /* next will point to data if len != 0 */ 2780 next = stat; 2781 2782 /* Set up data transaction */ 2783 if (len != 0) { 2784 ohci_soft_td_t *std; 2785 ohci_soft_td_t *end; 2786 2787 next = ox->ox_stds[0]; 2788 ohci_reset_std_chain(sc, xfer, len, isread, next, &end); 2789 2790 end->td.td_nexttd = HTOO32(stat->physaddr); 2791 end->nexttd = stat; 2792 2793 usb_syncmem(&end->dma, end->offs, sizeof(end->td), 2794 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2795 2796 usb_syncmem(&xfer->ux_dmabuf, 0, len, 2797 isread ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2798 std = ox->ox_stds[0]; 2799 /* Start toggle at 1 and then use the carried toggle. */ 2800 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 2801 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 2802 usb_syncmem(&std->dma, 2803 std->offs + offsetof(ohci_td_t, td_flags), 2804 sizeof(std->td.td_flags), 2805 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2806 } 2807 2808 DPRINTFN(8, "setup %#jx data %#jx stat %#jx tail %#jx", 2809 (uintptr_t)setup, 2810 (uintptr_t)(len != 0 ? ox->ox_stds[0] : NULL), (uintptr_t)stat, 2811 (uintptr_t)tail); 2812 KASSERT(opipe->tail.td == tail); 2813 2814 memcpy(KERNADDR(&opipe->ctrl.reqdma, 0), req, sizeof(*req)); 2815 usb_syncmem(&opipe->ctrl.reqdma, 0, sizeof(*req), BUS_DMASYNC_PREWRITE); 2816 2817 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 2818 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 2819 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->ctrl.reqdma, 0)); 2820 setup->td.td_nexttd = HTOO32(next->physaddr); 2821 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof(*req) - 1); 2822 setup->nexttd = next; 2823 setup->len = 0; 2824 setup->xfer = xfer; 2825 setup->flags = 0; 2826 ohci_hash_add_td(sc, setup); 2827 2828 xfer->ux_hcpriv = setup; 2829 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 2830 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2831 2832 stat->td.td_flags = HTOO32( 2833 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 2834 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 2835 stat->td.td_cbp = 0; 2836 stat->td.td_nexttd = HTOO32(tail->physaddr); 2837 stat->td.td_be = 0; 2838 stat->nexttd = tail; 2839 stat->flags = OHCI_CALL_DONE; 2840 stat->len = 0; 2841 stat->xfer = xfer; 2842 ohci_hash_add_td(sc, stat); 2843 2844 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 2845 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2846 2847 memset(&tail->td, 0, sizeof(tail->td)); 2848 tail->nexttd = NULL; 2849 tail->xfer = NULL; 2850 2851 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 2852 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2853 2854 #ifdef OHCI_DEBUG 2855 USBHIST_LOGN(ohcidebug, 5, "--- dump start ---", 0, 0, 0, 0); 2856 if (ohcidebug >= 5) { 2857 ohci_dump_ed(sc, sed); 2858 ohci_dump_tds(sc, setup); 2859 } 2860 USBHIST_LOGN(ohcidebug, 5, "--- dump end ---", 0, 0, 0, 0); 2861 #endif 2862 2863 /* Insert ED in schedule */ 2864 sed->ed.ed_tailp = HTOO32(tail->physaddr); 2865 usb_syncmem(&sed->dma, 2866 sed->offs + offsetof(ohci_ed_t, ed_tailp), 2867 sizeof(sed->ed.ed_tailp), 2868 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2869 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 2870 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 2871 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 2872 ohci_timeout, xfer); 2873 } 2874 2875 DPRINTF("done", 0, 0, 0, 0); 2876 2877 xfer->ux_status = USBD_IN_PROGRESS; 2878 mutex_exit(&sc->sc_lock); 2879 2880 return USBD_IN_PROGRESS; 2881 } 2882 2883 /* Abort a device control request. */ 2884 Static void 2885 ohci_device_ctrl_abort(struct usbd_xfer *xfer) 2886 { 2887 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 2888 2889 KASSERT(mutex_owned(&sc->sc_lock)); 2890 2891 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2892 DPRINTF("xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 2893 ohci_abort_xfer(xfer, USBD_CANCELLED); 2894 } 2895 2896 /* Close a device control pipe. */ 2897 Static void 2898 ohci_device_ctrl_close(struct usbd_pipe *pipe) 2899 { 2900 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2901 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2902 2903 KASSERT(mutex_owned(&sc->sc_lock)); 2904 2905 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2906 DPRINTF("pipe=%#jx", (uintptr_t)pipe, 0, 0, 0); 2907 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2908 ohci_free_std_locked(sc, opipe->tail.td); 2909 } 2910 2911 /************************/ 2912 2913 Static void 2914 ohci_device_clear_toggle(struct usbd_pipe *pipe) 2915 { 2916 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2917 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2918 2919 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2920 } 2921 2922 Static void 2923 ohci_noop(struct usbd_pipe *pipe) 2924 { 2925 } 2926 2927 Static int 2928 ohci_device_bulk_init(struct usbd_xfer *xfer) 2929 { 2930 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2931 int len = xfer->ux_bufsize; 2932 int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 2933 int isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2934 int err; 2935 2936 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2937 2938 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 2939 2940 DPRINTFN(4, "xfer=%#jx len=%jd isread=%jd flags=%jd", (uintptr_t)xfer, 2941 len, isread, xfer->ux_flags); 2942 DPRINTFN(4, "endpt=%jd", endpt, 0, 0, 0); 2943 2944 /* Allocate a chain of new TDs (including a new tail). */ 2945 err = ohci_alloc_std_chain(sc, xfer, len, isread); 2946 if (err) 2947 return err; 2948 2949 return 0; 2950 } 2951 2952 Static void 2953 ohci_device_bulk_fini(struct usbd_xfer *xfer) 2954 { 2955 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2956 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2957 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2958 2959 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2960 DPRINTFN(8, "xfer %#jx nstd %jd", (uintptr_t)xfer, ox->ox_nstd, 0, 0); 2961 2962 mutex_enter(&sc->sc_lock); 2963 for (size_t i = 0; i < ox->ox_nstd; i++) { 2964 ohci_soft_td_t *std = ox->ox_stds[i]; 2965 if (std == NULL) 2966 break; 2967 if (std != opipe->tail.td) 2968 ohci_free_std_locked(sc, std); 2969 } 2970 mutex_exit(&sc->sc_lock); 2971 2972 if (ox->ox_nstd) { 2973 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 2974 kmem_free(ox->ox_stds, sz); 2975 } 2976 } 2977 2978 Static usbd_status 2979 ohci_device_bulk_transfer(struct usbd_xfer *xfer) 2980 { 2981 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2982 usbd_status err; 2983 2984 /* Insert last in queue. */ 2985 mutex_enter(&sc->sc_lock); 2986 err = usb_insert_transfer(xfer); 2987 mutex_exit(&sc->sc_lock); 2988 if (err) 2989 return err; 2990 2991 /* Pipe isn't running, start first */ 2992 return ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2993 } 2994 2995 Static usbd_status 2996 ohci_device_bulk_start(struct usbd_xfer *xfer) 2997 { 2998 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2999 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3000 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3001 ohci_soft_td_t *last; 3002 ohci_soft_td_t *data, *tail, *tdp; 3003 ohci_soft_ed_t *sed; 3004 int len, isread, endpt; 3005 3006 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3007 3008 if (sc->sc_dying) 3009 return USBD_IOERROR; 3010 3011 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3012 3013 len = xfer->ux_length; 3014 endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 3015 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3016 sed = opipe->sed; 3017 3018 DPRINTFN(4, "xfer=%#jx len=%jd isread=%jd flags=%jd", (uintptr_t)xfer, 3019 len, isread, xfer->ux_flags); 3020 DPRINTFN(4, "endpt=%jd", endpt, 0, 0, 0); 3021 3022 mutex_enter(&sc->sc_lock); 3023 3024 /* 3025 * Use the pipe "tail" TD as our first and loan our first TD to the 3026 * next transfer 3027 */ 3028 data = opipe->tail.td; 3029 opipe->tail.td = ox->ox_stds[0]; 3030 ox->ox_stds[0] = data; 3031 ohci_reset_std_chain(sc, xfer, len, isread, data, &last); 3032 3033 /* point at sentinel */ 3034 tail = opipe->tail.td; 3035 memset(&tail->td, 0, sizeof(tail->td)); 3036 tail->nexttd = NULL; 3037 tail->xfer = NULL; 3038 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 3039 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3040 xfer->ux_hcpriv = data; 3041 3042 DPRINTFN(8, "xfer %#jx data %#jx tail %#jx", (uintptr_t)xfer, 3043 (uintptr_t)ox->ox_stds[0], (uintptr_t)tail, 0); 3044 KASSERT(opipe->tail.td == tail); 3045 3046 /* We want interrupt at the end of the transfer. */ 3047 last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3048 last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3049 last->td.td_nexttd = HTOO32(tail->physaddr); 3050 last->nexttd = tail; 3051 last->flags |= OHCI_CALL_DONE; 3052 usb_syncmem(&last->dma, last->offs, sizeof(last->td), 3053 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3054 3055 DPRINTFN(4, "ed_flags=0x%08jx td_flags=0x%08jx " 3056 "td_cbp=0x%08jx td_be=0x%08jx", 3057 (int)O32TOH(sed->ed.ed_flags), 3058 (int)O32TOH(data->td.td_flags), 3059 (int)O32TOH(data->td.td_cbp), 3060 (int)O32TOH(data->td.td_be)); 3061 3062 #ifdef OHCI_DEBUG 3063 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 3064 if (ohcidebug >= 5) { 3065 ohci_dump_ed(sc, sed); 3066 ohci_dump_tds(sc, data); 3067 } 3068 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 3069 #endif 3070 3071 /* Insert ED in schedule */ 3072 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 3073 KASSERT(tdp->xfer == xfer); 3074 } 3075 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3076 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3077 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3078 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3079 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3080 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3081 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 3082 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 3083 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 3084 ohci_timeout, xfer); 3085 } 3086 3087 xfer->ux_status = USBD_IN_PROGRESS; 3088 mutex_exit(&sc->sc_lock); 3089 3090 return USBD_IN_PROGRESS; 3091 } 3092 3093 Static void 3094 ohci_device_bulk_abort(struct usbd_xfer *xfer) 3095 { 3096 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 3097 3098 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3099 3100 KASSERT(mutex_owned(&sc->sc_lock)); 3101 3102 DPRINTF("xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 3103 ohci_abort_xfer(xfer, USBD_CANCELLED); 3104 } 3105 3106 /* 3107 * Close a device bulk pipe. 3108 */ 3109 Static void 3110 ohci_device_bulk_close(struct usbd_pipe *pipe) 3111 { 3112 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3113 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3114 3115 KASSERT(mutex_owned(&sc->sc_lock)); 3116 3117 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3118 3119 DPRINTF("pipe=%#jx", (uintptr_t)pipe, 0, 0, 0); 3120 ohci_close_pipe(pipe, sc->sc_bulk_head); 3121 ohci_free_std_locked(sc, opipe->tail.td); 3122 } 3123 3124 /************************/ 3125 3126 Static int 3127 ohci_device_intr_init(struct usbd_xfer *xfer) 3128 { 3129 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3130 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3131 int len = xfer->ux_bufsize; 3132 int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 3133 int isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3134 int err; 3135 3136 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3137 3138 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3139 KASSERT(len != 0); 3140 3141 DPRINTFN(4, "xfer=%#jx len=%jd isread=%jd flags=%jd", (uintptr_t)xfer, 3142 len, isread, xfer->ux_flags); 3143 DPRINTFN(4, "endpt=%jd", endpt, 0, 0, 0); 3144 3145 ox->ox_nstd = 0; 3146 3147 err = ohci_alloc_std_chain(sc, xfer, len, isread); 3148 if (err) { 3149 return err; 3150 } 3151 3152 return 0; 3153 } 3154 3155 Static void 3156 ohci_device_intr_fini(struct usbd_xfer *xfer) 3157 { 3158 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3159 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3160 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3161 3162 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3163 DPRINTFN(8, "xfer %#jx nstd %jd", (uintptr_t)xfer, ox->ox_nstd, 0, 0); 3164 3165 mutex_enter(&sc->sc_lock); 3166 for (size_t i = 0; i < ox->ox_nstd; i++) { 3167 ohci_soft_td_t *std = ox->ox_stds[i]; 3168 if (std != NULL) 3169 break; 3170 if (std != opipe->tail.td) 3171 ohci_free_std_locked(sc, std); 3172 } 3173 mutex_exit(&sc->sc_lock); 3174 3175 if (ox->ox_nstd) { 3176 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 3177 kmem_free(ox->ox_stds, sz); 3178 } 3179 } 3180 3181 Static usbd_status 3182 ohci_device_intr_transfer(struct usbd_xfer *xfer) 3183 { 3184 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3185 usbd_status err; 3186 3187 /* Insert last in queue. */ 3188 mutex_enter(&sc->sc_lock); 3189 err = usb_insert_transfer(xfer); 3190 mutex_exit(&sc->sc_lock); 3191 if (err) 3192 return err; 3193 3194 /* Pipe isn't running, start first */ 3195 return ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 3196 } 3197 3198 Static usbd_status 3199 ohci_device_intr_start(struct usbd_xfer *xfer) 3200 { 3201 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3202 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3203 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3204 ohci_soft_ed_t *sed = opipe->sed; 3205 ohci_soft_td_t *data, *last, *tail; 3206 int len, isread, endpt; 3207 3208 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3209 3210 if (sc->sc_dying) 3211 return USBD_IOERROR; 3212 3213 DPRINTFN(3, "xfer=%#jx len=%jd flags=%jd priv=%#jx", (uintptr_t)xfer, 3214 xfer->ux_length, xfer->ux_flags, (uintptr_t)xfer->ux_priv); 3215 3216 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3217 3218 len = xfer->ux_length; 3219 endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 3220 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3221 3222 mutex_enter(&sc->sc_lock); 3223 3224 /* 3225 * Use the pipe "tail" TD as our first and loan our first TD to the 3226 * next transfer. 3227 */ 3228 data = opipe->tail.td; 3229 opipe->tail.td = ox->ox_stds[0]; 3230 ox->ox_stds[0] = data; 3231 ohci_reset_std_chain(sc, xfer, len, isread, data, &last); 3232 3233 /* point at sentinel */ 3234 tail = opipe->tail.td; 3235 memset(&tail->td, 0, sizeof(tail->td)); 3236 tail->nexttd = NULL; 3237 tail->xfer = NULL; 3238 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 3239 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3240 xfer->ux_hcpriv = data; 3241 3242 DPRINTFN(8, "data %#jx tail %#jx", (uintptr_t)ox->ox_stds[0], 3243 (uintptr_t)tail, 0, 0); 3244 KASSERT(opipe->tail.td == tail); 3245 3246 /* We want interrupt at the end of the transfer. */ 3247 last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3248 last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3249 3250 last->td.td_nexttd = HTOO32(tail->physaddr); 3251 last->nexttd = tail; 3252 last->flags |= OHCI_CALL_DONE; 3253 usb_syncmem(&last->dma, last->offs, sizeof(last->td), 3254 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3255 3256 #ifdef OHCI_DEBUG 3257 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 3258 if (ohcidebug >= 5) { 3259 ohci_dump_ed(sc, sed); 3260 ohci_dump_tds(sc, data); 3261 } 3262 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 3263 #endif 3264 3265 /* Insert ED in schedule */ 3266 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3267 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3268 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3269 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3270 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3271 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3272 3273 xfer->ux_status = USBD_IN_PROGRESS; 3274 mutex_exit(&sc->sc_lock); 3275 3276 return USBD_IN_PROGRESS; 3277 } 3278 3279 /* Abort a device interrupt request. */ 3280 Static void 3281 ohci_device_intr_abort(struct usbd_xfer *xfer) 3282 { 3283 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 3284 3285 KASSERT(mutex_owned(&sc->sc_lock)); 3286 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 3287 3288 ohci_abort_xfer(xfer, USBD_CANCELLED); 3289 } 3290 3291 /* Close a device interrupt pipe. */ 3292 Static void 3293 ohci_device_intr_close(struct usbd_pipe *pipe) 3294 { 3295 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3296 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3297 int nslots = opipe->intr.nslots; 3298 int pos = opipe->intr.pos; 3299 int j; 3300 ohci_soft_ed_t *p, *sed = opipe->sed; 3301 3302 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3303 3304 KASSERT(mutex_owned(&sc->sc_lock)); 3305 3306 DPRINTFN(1, "pipe=%#jx nslots=%jd pos=%jd", (uintptr_t)pipe, nslots, 3307 pos, 0); 3308 usb_syncmem(&sed->dma, sed->offs, 3309 sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3310 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3311 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3312 sizeof(sed->ed.ed_flags), 3313 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3314 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3315 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3316 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); 3317 3318 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3319 continue; 3320 KASSERT(p); 3321 p->next = sed->next; 3322 p->ed.ed_nexted = sed->ed.ed_nexted; 3323 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 3324 sizeof(p->ed.ed_nexted), 3325 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3326 3327 for (j = 0; j < nslots; j++) 3328 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3329 3330 ohci_free_std_locked(sc, opipe->tail.td); 3331 ohci_free_sed_locked(sc, opipe->sed); 3332 } 3333 3334 Static usbd_status 3335 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3336 { 3337 int i, j, best; 3338 u_int npoll, slow, shigh, nslots; 3339 u_int bestbw, bw; 3340 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3341 3342 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3343 3344 DPRINTFN(2, "pipe=%#jx", (uintptr_t)opipe, 0, 0, 0); 3345 if (ival == 0) { 3346 printf("ohci_setintr: 0 interval\n"); 3347 return USBD_INVAL; 3348 } 3349 3350 npoll = OHCI_NO_INTRS; 3351 while (npoll > ival) 3352 npoll /= 2; 3353 DPRINTFN(2, "ival=%jd npoll=%jd", ival, npoll, 0, 0); 3354 3355 /* 3356 * We now know which level in the tree the ED must go into. 3357 * Figure out which slot has most bandwidth left over. 3358 * Slots to examine: 3359 * npoll 3360 * 1 0 3361 * 2 1 2 3362 * 4 3 4 5 6 3363 * 8 7 8 9 10 11 12 13 14 3364 * N (N-1) .. (N-1+N-1) 3365 */ 3366 slow = npoll-1; 3367 shigh = slow + npoll; 3368 nslots = OHCI_NO_INTRS / npoll; 3369 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3370 bw = 0; 3371 for (j = 0; j < nslots; j++) 3372 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3373 if (bw < bestbw) { 3374 best = i; 3375 bestbw = bw; 3376 } 3377 } 3378 DPRINTFN(2, "best=%jd(%jd..%jd) bestbw=%jd", best, slow, shigh, bestbw); 3379 3380 mutex_enter(&sc->sc_lock); 3381 hsed = sc->sc_eds[best]; 3382 sed->next = hsed->next; 3383 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3384 sizeof(hsed->ed.ed_flags), 3385 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3386 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3387 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3388 sizeof(sed->ed.ed_flags), 3389 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3390 hsed->next = sed; 3391 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3392 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3393 sizeof(hsed->ed.ed_flags), 3394 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3395 mutex_exit(&sc->sc_lock); 3396 3397 for (j = 0; j < nslots; j++) 3398 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3399 opipe->intr.nslots = nslots; 3400 opipe->intr.pos = best; 3401 3402 DPRINTFN(5, "returns %#jx", (uintptr_t)opipe, 0, 0, 0); 3403 return USBD_NORMAL_COMPLETION; 3404 } 3405 3406 /***********************/ 3407 3408 Static int 3409 ohci_device_isoc_init(struct usbd_xfer *xfer) 3410 { 3411 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3412 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3413 ohci_soft_itd_t *sitd; 3414 size_t i; 3415 int err; 3416 3417 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3418 3419 DPRINTFN(1, "xfer %#jx len %jd flags %jd", (uintptr_t)xfer, 3420 xfer->ux_length, xfer->ux_flags, 0); 3421 3422 const size_t nfsitd = 3423 (xfer->ux_nframes + OHCI_ITD_NOFFSET - 1) / OHCI_ITD_NOFFSET; 3424 const size_t nbsitd = xfer->ux_bufsize / OHCI_PAGE_SIZE; 3425 const size_t nsitd = MAX(nfsitd, nbsitd) + 1; 3426 3427 ox->ox_sitds = kmem_zalloc(sizeof(ohci_soft_itd_t *) * nsitd, 3428 KM_SLEEP); 3429 ox->ox_nsitd = nsitd; 3430 3431 for (i = 0; i < nsitd; i++) { 3432 /* Allocate next ITD */ 3433 sitd = ohci_alloc_sitd(sc); 3434 if (sitd == NULL) { 3435 err = ENOMEM; 3436 goto fail; 3437 } 3438 ox->ox_sitds[i] = sitd; 3439 sitd->xfer = xfer; 3440 sitd->flags = 0; 3441 } 3442 3443 return 0; 3444 fail: 3445 for (; i > 0;) { 3446 ohci_free_sitd(sc, ox->ox_sitds[--i]); 3447 } 3448 return err; 3449 } 3450 3451 Static void 3452 ohci_device_isoc_fini(struct usbd_xfer *xfer) 3453 { 3454 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3455 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3456 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3457 3458 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3459 3460 mutex_enter(&sc->sc_lock); 3461 for (size_t i = 0; i < ox->ox_nsitd; i++) { 3462 if (ox->ox_sitds[i] != opipe->tail.itd) { 3463 ohci_free_sitd_locked(sc, ox->ox_sitds[i]); 3464 } 3465 } 3466 mutex_exit(&sc->sc_lock); 3467 3468 if (ox->ox_nsitd) { 3469 const size_t sz = sizeof(ohci_soft_itd_t *) * ox->ox_nsitd; 3470 kmem_free(ox->ox_sitds, sz); 3471 } 3472 } 3473 3474 3475 usbd_status 3476 ohci_device_isoc_transfer(struct usbd_xfer *xfer) 3477 { 3478 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3479 usbd_status __diagused err; 3480 3481 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3482 3483 DPRINTFN(5, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 3484 3485 /* Put it on our queue, */ 3486 mutex_enter(&sc->sc_lock); 3487 err = usb_insert_transfer(xfer); 3488 mutex_exit(&sc->sc_lock); 3489 3490 KASSERT(err == USBD_NORMAL_COMPLETION); 3491 3492 /* insert into schedule, */ 3493 ohci_device_isoc_enter(xfer); 3494 3495 /* and start if the pipe wasn't running */ 3496 return USBD_IN_PROGRESS; 3497 } 3498 3499 void 3500 ohci_device_isoc_enter(struct usbd_xfer *xfer) 3501 { 3502 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3503 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3504 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3505 ohci_soft_ed_t *sed = opipe->sed; 3506 ohci_soft_itd_t *sitd, *nsitd, *tail; 3507 ohci_physaddr_t buf, offs, noffs, bp0; 3508 int i, ncur, nframes; 3509 3510 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3511 DPRINTFN(5, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 3512 3513 mutex_enter(&sc->sc_lock); 3514 3515 if (sc->sc_dying) { 3516 mutex_exit(&sc->sc_lock); 3517 return; 3518 } 3519 3520 struct isoc *isoc = &opipe->isoc; 3521 3522 DPRINTFN(1, "used=%jd next=%jd xfer=%#jx nframes=%jd", 3523 isoc->inuse, isoc->next, (uintptr_t)xfer, xfer->ux_nframes); 3524 3525 if (isoc->next == -1) { 3526 /* Not in use yet, schedule it a few frames ahead. */ 3527 isoc->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3528 DPRINTFN(2,"start next=%jd", isoc->next, 0, 0, 0); 3529 } 3530 3531 sitd = opipe->tail.itd; 3532 opipe->tail.itd = ox->ox_sitds[0]; 3533 ox->ox_sitds[0] = sitd; 3534 3535 buf = DMAADDR(&xfer->ux_dmabuf, 0); 3536 bp0 = OHCI_PAGE(buf); 3537 offs = OHCI_PAGE_OFFSET(buf); 3538 nframes = xfer->ux_nframes; 3539 xfer->ux_hcpriv = sitd; 3540 size_t j = 1; 3541 for (i = ncur = 0; i < nframes; i++, ncur++) { 3542 noffs = offs + xfer->ux_frlengths[i]; 3543 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3544 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3545 3546 /* Allocate next ITD */ 3547 nsitd = ox->ox_sitds[j++]; 3548 KASSERT(nsitd != NULL); 3549 KASSERT(j < ox->ox_nsitd); 3550 3551 /* Fill current ITD */ 3552 sitd->itd.itd_flags = HTOO32( 3553 OHCI_ITD_NOCC | 3554 OHCI_ITD_SET_SF(isoc->next) | 3555 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3556 OHCI_ITD_SET_FC(ncur)); 3557 sitd->itd.itd_bp0 = HTOO32(bp0); 3558 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3559 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3560 sitd->nextitd = nsitd; 3561 sitd->xfer = xfer; 3562 sitd->flags = 0; 3563 #ifdef DIAGNOSTIC 3564 sitd->isdone = false; 3565 #endif 3566 ohci_hash_add_itd(sc, sitd); 3567 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3568 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3569 3570 sitd = nsitd; 3571 isoc->next = isoc->next + ncur; 3572 bp0 = OHCI_PAGE(buf + offs); 3573 ncur = 0; 3574 } 3575 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3576 /* XXX Sync */ 3577 offs = noffs; 3578 } 3579 KASSERT(j <= ox->ox_nsitd); 3580 3581 /* point at sentinel */ 3582 tail = opipe->tail.itd; 3583 memset(&tail->itd, 0, sizeof(tail->itd)); 3584 tail->nextitd = NULL; 3585 tail->xfer = NULL; 3586 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->itd), 3587 BUS_DMASYNC_PREWRITE); 3588 3589 /* Fixup last used ITD */ 3590 sitd->itd.itd_flags = HTOO32( 3591 OHCI_ITD_NOCC | 3592 OHCI_ITD_SET_SF(isoc->next) | 3593 OHCI_ITD_SET_DI(0) | 3594 OHCI_ITD_SET_FC(ncur)); 3595 sitd->itd.itd_bp0 = HTOO32(bp0); 3596 sitd->itd.itd_nextitd = HTOO32(tail->physaddr); 3597 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3598 sitd->nextitd = tail; 3599 sitd->xfer = xfer; 3600 sitd->flags = OHCI_CALL_DONE; 3601 #ifdef DIAGNOSTIC 3602 sitd->isdone = false; 3603 #endif 3604 ohci_hash_add_itd(sc, sitd); 3605 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3606 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3607 3608 isoc->next = isoc->next + ncur; 3609 isoc->inuse += nframes; 3610 3611 /* XXX pretend we did it all */ 3612 xfer->ux_actlen = offs; 3613 xfer->ux_status = USBD_IN_PROGRESS; 3614 3615 #ifdef OHCI_DEBUG 3616 if (ohcidebug >= 5) { 3617 DPRINTF("frame=%jd", O32TOH(sc->sc_hcca->hcca_frame_number), 3618 0, 0, 0); 3619 ohci_dump_itds(sc, xfer->ux_hcpriv); 3620 ohci_dump_ed(sc, sed); 3621 } 3622 #endif 3623 3624 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3625 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3626 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3627 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3628 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3629 sizeof(sed->ed.ed_flags), 3630 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3631 mutex_exit(&sc->sc_lock); 3632 } 3633 3634 void 3635 ohci_device_isoc_abort(struct usbd_xfer *xfer) 3636 { 3637 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3638 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3639 ohci_soft_ed_t *sed; 3640 ohci_soft_itd_t *sitd; 3641 3642 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3643 DPRINTFN(1, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 3644 3645 KASSERT(mutex_owned(&sc->sc_lock)); 3646 3647 /* Transfer is already done. */ 3648 if (xfer->ux_status != USBD_NOT_STARTED && 3649 xfer->ux_status != USBD_IN_PROGRESS) { 3650 printf("ohci_device_isoc_abort: early return\n"); 3651 goto done; 3652 } 3653 3654 /* Give xfer the requested abort code. */ 3655 xfer->ux_status = USBD_CANCELLED; 3656 3657 sed = opipe->sed; 3658 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3659 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3660 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3661 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3662 sizeof(sed->ed.ed_flags), 3663 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3664 3665 sitd = xfer->ux_hcpriv; 3666 KASSERT(sitd); 3667 3668 usb_delay_ms_locked(&sc->sc_bus, OHCI_ITD_NOFFSET, &sc->sc_lock); 3669 3670 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3671 ohci_hash_rem_itd(sc, sitd); 3672 #ifdef DIAGNOSTIC 3673 DPRINTFN(1, "abort sets done sitd=%#jx", (uintptr_t)sitd, 3674 0, 0, 0); 3675 sitd->isdone = true; 3676 #endif 3677 } 3678 3679 /* Run callback. */ 3680 usb_transfer_complete(xfer); 3681 3682 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3683 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3684 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3685 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3686 3687 done: 3688 KASSERT(mutex_owned(&sc->sc_lock)); 3689 } 3690 3691 void 3692 ohci_device_isoc_done(struct usbd_xfer *xfer) 3693 { 3694 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3695 DPRINTFN(1, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 3696 } 3697 3698 usbd_status 3699 ohci_setup_isoc(struct usbd_pipe *pipe) 3700 { 3701 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3702 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3703 struct isoc *isoc = &opipe->isoc; 3704 3705 isoc->next = -1; 3706 isoc->inuse = 0; 3707 3708 mutex_enter(&sc->sc_lock); 3709 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3710 mutex_exit(&sc->sc_lock); 3711 3712 return USBD_NORMAL_COMPLETION; 3713 } 3714 3715 void 3716 ohci_device_isoc_close(struct usbd_pipe *pipe) 3717 { 3718 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3719 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3720 3721 KASSERT(mutex_owned(&sc->sc_lock)); 3722 3723 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3724 DPRINTF("pipe=%#jx", (uintptr_t)pipe, 0, 0, 0); 3725 ohci_close_pipe(pipe, sc->sc_isoc_head); 3726 #ifdef DIAGNOSTIC 3727 opipe->tail.itd->isdone = true; 3728 #endif 3729 ohci_free_sitd_locked(sc, opipe->tail.itd); 3730 } 3731
Indexes created Thu Sep 25 16:09:42 GMT 2025