ohci.c revision 1.286
1 /* $NetBSD: ohci.c,v 1.286 2018/09/16 10:29:39 mrg Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2004, 2005, 2012 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) at 9 * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca) 10 * and Matthew R. Green (mrg (at) eterna.com.au). 11 * This code is derived from software contributed to The NetBSD Foundation 12 * by Charles M. Hannum. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * USB Open Host Controller driver. 38 * 39 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 40 * USB spec: http://www.usb.org/developers/docs/ 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.286 2018/09/16 10:29:39 mrg Exp $"); 45 46 #ifdef _KERNEL_OPT 47 #include "opt_usb.h" 48 #endif 49 50 #include <sys/param.h> 51 52 #include <sys/cpu.h> 53 #include <sys/device.h> 54 #include <sys/kernel.h> 55 #include <sys/kmem.h> 56 #include <sys/proc.h> 57 #include <sys/queue.h> 58 #include <sys/select.h> 59 #include <sys/sysctl.h> 60 #include <sys/systm.h> 61 62 #include <machine/endian.h> 63 64 #include <dev/usb/usb.h> 65 #include <dev/usb/usbdi.h> 66 #include <dev/usb/usbdivar.h> 67 #include <dev/usb/usb_mem.h> 68 #include <dev/usb/usb_quirks.h> 69 70 #include <dev/usb/ohcireg.h> 71 #include <dev/usb/ohcivar.h> 72 #include <dev/usb/usbroothub.h> 73 #include <dev/usb/usbhist.h> 74 75 #ifdef USB_DEBUG 76 #ifndef OHCI_DEBUG 77 #define ohcidebug 0 78 #else 79 static int ohcidebug = 10; 80 81 SYSCTL_SETUP(sysctl_hw_ohci_setup, "sysctl hw.ohci setup") 82 { 83 int err; 84 const struct sysctlnode *rnode; 85 const struct sysctlnode *cnode; 86 87 err = sysctl_createv(clog, 0, NULL, &rnode, 88 CTLFLAG_PERMANENT, CTLTYPE_NODE, "ohci", 89 SYSCTL_DESCR("ohci global controls"), 90 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); 91 92 if (err) 93 goto fail; 94 95 /* control debugging printfs */ 96 err = sysctl_createv(clog, 0, &rnode, &cnode, 97 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT, 98 "debug", SYSCTL_DESCR("Enable debugging output"), 99 NULL, 0, &ohcidebug, sizeof(ohcidebug), CTL_CREATE, CTL_EOL); 100 if (err) 101 goto fail; 102 103 return; 104 fail: 105 aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err); 106 } 107 108 #endif /* OHCI_DEBUG */ 109 #endif /* USB_DEBUG */ 110 111 #define DPRINTF(FMT,A,B,C,D) USBHIST_LOG(ohcidebug,FMT,A,B,C,D) 112 #define DPRINTFN(N,FMT,A,B,C,D) USBHIST_LOGN(ohcidebug,N,FMT,A,B,C,D) 113 #define OHCIHIST_FUNC() USBHIST_FUNC() 114 #define OHCIHIST_CALLED(name) USBHIST_CALLED(ohcidebug) 115 116 #if BYTE_ORDER == BIG_ENDIAN 117 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN 118 #else 119 #define SWAP_ENDIAN OHCI_BIG_ENDIAN 120 #endif 121 122 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val) 123 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val) 124 #define HTOO16(val) O16TOH(val) 125 #define HTOO32(val) O32TOH(val) 126 127 struct ohci_pipe; 128 129 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 130 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 131 132 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 133 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 134 Static void ohci_free_std_locked(ohci_softc_t *, ohci_soft_td_t *); 135 136 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 137 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 138 Static void ohci_free_sitd_locked(ohci_softc_t *, 139 ohci_soft_itd_t *); 140 141 Static int ohci_alloc_std_chain(ohci_softc_t *, struct usbd_xfer *, 142 int, int); 143 Static void ohci_free_stds(ohci_softc_t *, struct ohci_xfer *); 144 145 Static void ohci_reset_std_chain(ohci_softc_t *, struct usbd_xfer *, 146 int, int, ohci_soft_td_t *, ohci_soft_td_t **); 147 148 Static usbd_status ohci_open(struct usbd_pipe *); 149 Static void ohci_poll(struct usbd_bus *); 150 Static void ohci_softintr(void *); 151 Static void ohci_rhsc(ohci_softc_t *, struct usbd_xfer *); 152 Static void ohci_rhsc_softint(void *); 153 154 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *, 155 ohci_soft_ed_t *); 156 157 Static void ohci_rem_ed(ohci_softc_t *, ohci_soft_ed_t *, 158 ohci_soft_ed_t *); 159 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 160 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 161 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 162 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 163 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 164 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 165 166 Static usbd_status ohci_setup_isoc(struct usbd_pipe *); 167 Static void ohci_device_isoc_enter(struct usbd_xfer *); 168 169 Static struct usbd_xfer * 170 ohci_allocx(struct usbd_bus *, unsigned int); 171 Static void ohci_freex(struct usbd_bus *, struct usbd_xfer *); 172 Static void ohci_get_lock(struct usbd_bus *, kmutex_t **); 173 Static int ohci_roothub_ctrl(struct usbd_bus *, 174 usb_device_request_t *, void *, int); 175 176 Static usbd_status ohci_root_intr_transfer(struct usbd_xfer *); 177 Static usbd_status ohci_root_intr_start(struct usbd_xfer *); 178 Static void ohci_root_intr_abort(struct usbd_xfer *); 179 Static void ohci_root_intr_close(struct usbd_pipe *); 180 Static void ohci_root_intr_done(struct usbd_xfer *); 181 182 Static int ohci_device_ctrl_init(struct usbd_xfer *); 183 Static void ohci_device_ctrl_fini(struct usbd_xfer *); 184 Static usbd_status ohci_device_ctrl_transfer(struct usbd_xfer *); 185 Static usbd_status ohci_device_ctrl_start(struct usbd_xfer *); 186 Static void ohci_device_ctrl_abort(struct usbd_xfer *); 187 Static void ohci_device_ctrl_close(struct usbd_pipe *); 188 Static void ohci_device_ctrl_done(struct usbd_xfer *); 189 190 Static int ohci_device_bulk_init(struct usbd_xfer *); 191 Static void ohci_device_bulk_fini(struct usbd_xfer *); 192 Static usbd_status ohci_device_bulk_transfer(struct usbd_xfer *); 193 Static usbd_status ohci_device_bulk_start(struct usbd_xfer *); 194 Static void ohci_device_bulk_abort(struct usbd_xfer *); 195 Static void ohci_device_bulk_close(struct usbd_pipe *); 196 Static void ohci_device_bulk_done(struct usbd_xfer *); 197 198 Static int ohci_device_intr_init(struct usbd_xfer *); 199 Static void ohci_device_intr_fini(struct usbd_xfer *); 200 Static usbd_status ohci_device_intr_transfer(struct usbd_xfer *); 201 Static usbd_status ohci_device_intr_start(struct usbd_xfer *); 202 Static void ohci_device_intr_abort(struct usbd_xfer *); 203 Static void ohci_device_intr_close(struct usbd_pipe *); 204 Static void ohci_device_intr_done(struct usbd_xfer *); 205 206 Static int ohci_device_isoc_init(struct usbd_xfer *); 207 Static void ohci_device_isoc_fini(struct usbd_xfer *); 208 Static usbd_status ohci_device_isoc_transfer(struct usbd_xfer *); 209 Static void ohci_device_isoc_abort(struct usbd_xfer *); 210 Static void ohci_device_isoc_close(struct usbd_pipe *); 211 Static void ohci_device_isoc_done(struct usbd_xfer *); 212 213 Static usbd_status ohci_device_setintr(ohci_softc_t *, 214 struct ohci_pipe *, int); 215 216 Static void ohci_timeout(void *); 217 Static void ohci_timeout_task(void *); 218 Static void ohci_rhsc_enable(void *); 219 220 Static void ohci_close_pipe(struct usbd_pipe *, ohci_soft_ed_t *); 221 Static void ohci_abort_xfer(struct usbd_xfer *, usbd_status); 222 223 Static void ohci_device_clear_toggle(struct usbd_pipe *); 224 Static void ohci_noop(struct usbd_pipe *); 225 226 #ifdef OHCI_DEBUG 227 Static void ohci_dumpregs(ohci_softc_t *); 228 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *); 229 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *); 230 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *); 231 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *); 232 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *); 233 #endif 234 235 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 236 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 237 #define OWRITE1(sc, r, x) \ 238 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 239 #define OWRITE2(sc, r, x) \ 240 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 241 #define OWRITE4(sc, r, x) \ 242 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 243 244 static __inline uint32_t 245 OREAD4(ohci_softc_t *sc, bus_size_t r) 246 { 247 248 OBARR(sc); 249 return bus_space_read_4(sc->iot, sc->ioh, r); 250 } 251 252 /* Reverse the bits in a value 0 .. 31 */ 253 Static uint8_t revbits[OHCI_NO_INTRS] = 254 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 255 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 256 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 257 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 258 259 struct ohci_pipe { 260 struct usbd_pipe pipe; 261 ohci_soft_ed_t *sed; 262 union { 263 ohci_soft_td_t *td; 264 ohci_soft_itd_t *itd; 265 } tail; 266 /* Info needed for different pipe kinds. */ 267 union { 268 /* Control pipe */ 269 struct { 270 usb_dma_t reqdma; 271 } ctrl; 272 /* Interrupt pipe */ 273 struct { 274 int nslots; 275 int pos; 276 } intr; 277 /* Isochronous pipe */ 278 struct isoc { 279 int next, inuse; 280 } isoc; 281 }; 282 }; 283 284 Static const struct usbd_bus_methods ohci_bus_methods = { 285 .ubm_open = ohci_open, 286 .ubm_softint = ohci_softintr, 287 .ubm_dopoll = ohci_poll, 288 .ubm_allocx = ohci_allocx, 289 .ubm_freex = ohci_freex, 290 .ubm_getlock = ohci_get_lock, 291 .ubm_rhctrl = ohci_roothub_ctrl, 292 }; 293 294 Static const struct usbd_pipe_methods ohci_root_intr_methods = { 295 .upm_transfer = ohci_root_intr_transfer, 296 .upm_start = ohci_root_intr_start, 297 .upm_abort = ohci_root_intr_abort, 298 .upm_close = ohci_root_intr_close, 299 .upm_cleartoggle = ohci_noop, 300 .upm_done = ohci_root_intr_done, 301 }; 302 303 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = { 304 .upm_init = ohci_device_ctrl_init, 305 .upm_fini = ohci_device_ctrl_fini, 306 .upm_transfer = ohci_device_ctrl_transfer, 307 .upm_start = ohci_device_ctrl_start, 308 .upm_abort = ohci_device_ctrl_abort, 309 .upm_close = ohci_device_ctrl_close, 310 .upm_cleartoggle = ohci_noop, 311 .upm_done = ohci_device_ctrl_done, 312 }; 313 314 Static const struct usbd_pipe_methods ohci_device_intr_methods = { 315 .upm_init = ohci_device_intr_init, 316 .upm_fini = ohci_device_intr_fini, 317 .upm_transfer = ohci_device_intr_transfer, 318 .upm_start = ohci_device_intr_start, 319 .upm_abort = ohci_device_intr_abort, 320 .upm_close = ohci_device_intr_close, 321 .upm_cleartoggle = ohci_device_clear_toggle, 322 .upm_done = ohci_device_intr_done, 323 }; 324 325 Static const struct usbd_pipe_methods ohci_device_bulk_methods = { 326 .upm_init = ohci_device_bulk_init, 327 .upm_fini = ohci_device_bulk_fini, 328 .upm_transfer = ohci_device_bulk_transfer, 329 .upm_start = ohci_device_bulk_start, 330 .upm_abort = ohci_device_bulk_abort, 331 .upm_close = ohci_device_bulk_close, 332 .upm_cleartoggle = ohci_device_clear_toggle, 333 .upm_done = ohci_device_bulk_done, 334 }; 335 336 Static const struct usbd_pipe_methods ohci_device_isoc_methods = { 337 .upm_init = ohci_device_isoc_init, 338 .upm_fini = ohci_device_isoc_fini, 339 .upm_transfer = ohci_device_isoc_transfer, 340 .upm_abort = ohci_device_isoc_abort, 341 .upm_close = ohci_device_isoc_close, 342 .upm_cleartoggle = ohci_noop, 343 .upm_done = ohci_device_isoc_done, 344 }; 345 346 int 347 ohci_activate(device_t self, enum devact act) 348 { 349 struct ohci_softc *sc = device_private(self); 350 351 switch (act) { 352 case DVACT_DEACTIVATE: 353 sc->sc_dying = 1; 354 return 0; 355 default: 356 return EOPNOTSUPP; 357 } 358 } 359 360 void 361 ohci_childdet(device_t self, device_t child) 362 { 363 struct ohci_softc *sc = device_private(self); 364 365 KASSERT(sc->sc_child == child); 366 sc->sc_child = NULL; 367 } 368 369 int 370 ohci_detach(struct ohci_softc *sc, int flags) 371 { 372 int rv = 0; 373 374 if (sc->sc_child != NULL) 375 rv = config_detach(sc->sc_child, flags); 376 377 if (rv != 0) 378 return rv; 379 380 softint_disestablish(sc->sc_rhsc_si); 381 382 callout_halt(&sc->sc_tmo_rhsc, NULL); 383 callout_destroy(&sc->sc_tmo_rhsc); 384 385 mutex_destroy(&sc->sc_lock); 386 mutex_destroy(&sc->sc_intr_lock); 387 388 if (sc->sc_hcca != NULL) 389 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 390 pool_cache_destroy(sc->sc_xferpool); 391 392 return rv; 393 } 394 395 ohci_soft_ed_t * 396 ohci_alloc_sed(ohci_softc_t *sc) 397 { 398 ohci_soft_ed_t *sed; 399 usbd_status err; 400 int i, offs; 401 usb_dma_t dma; 402 403 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 404 405 mutex_enter(&sc->sc_lock); 406 if (sc->sc_freeeds == NULL) { 407 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 408 mutex_exit(&sc->sc_lock); 409 410 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 411 OHCI_ED_ALIGN, &dma); 412 if (err) 413 return 0; 414 415 mutex_enter(&sc->sc_lock); 416 for (i = 0; i < OHCI_SED_CHUNK; i++) { 417 offs = i * OHCI_SED_SIZE; 418 sed = KERNADDR(&dma, offs); 419 sed->physaddr = DMAADDR(&dma, offs); 420 sed->dma = dma; 421 sed->offs = offs; 422 sed->next = sc->sc_freeeds; 423 sc->sc_freeeds = sed; 424 } 425 } 426 sed = sc->sc_freeeds; 427 sc->sc_freeeds = sed->next; 428 mutex_exit(&sc->sc_lock); 429 430 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 431 sed->next = 0; 432 return sed; 433 } 434 435 static inline void 436 ohci_free_sed_locked(ohci_softc_t *sc, ohci_soft_ed_t *sed) 437 { 438 439 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 440 441 sed->next = sc->sc_freeeds; 442 sc->sc_freeeds = sed; 443 } 444 445 void 446 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 447 { 448 449 mutex_enter(&sc->sc_lock); 450 ohci_free_sed_locked(sc, sed); 451 mutex_exit(&sc->sc_lock); 452 } 453 454 ohci_soft_td_t * 455 ohci_alloc_std(ohci_softc_t *sc) 456 { 457 ohci_soft_td_t *std; 458 usbd_status err; 459 int i, offs; 460 usb_dma_t dma; 461 462 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 463 464 mutex_enter(&sc->sc_lock); 465 if (sc->sc_freetds == NULL) { 466 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 467 mutex_exit(&sc->sc_lock); 468 469 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 470 OHCI_TD_ALIGN, &dma); 471 if (err) 472 return NULL; 473 474 mutex_enter(&sc->sc_lock); 475 for (i = 0; i < OHCI_STD_CHUNK; i++) { 476 offs = i * OHCI_STD_SIZE; 477 std = KERNADDR(&dma, offs); 478 std->physaddr = DMAADDR(&dma, offs); 479 std->dma = dma; 480 std->offs = offs; 481 std->nexttd = sc->sc_freetds; 482 sc->sc_freetds = std; 483 } 484 } 485 486 std = sc->sc_freetds; 487 sc->sc_freetds = std->nexttd; 488 mutex_exit(&sc->sc_lock); 489 490 memset(&std->td, 0, sizeof(ohci_td_t)); 491 std->nexttd = NULL; 492 std->xfer = NULL; 493 494 return std; 495 } 496 497 void 498 ohci_free_std_locked(ohci_softc_t *sc, ohci_soft_td_t *std) 499 { 500 501 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 502 503 std->nexttd = sc->sc_freetds; 504 sc->sc_freetds = std; 505 } 506 507 void 508 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 509 { 510 511 mutex_enter(&sc->sc_lock); 512 ohci_free_std_locked(sc, std); 513 mutex_exit(&sc->sc_lock); 514 } 515 516 Static int 517 ohci_alloc_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, int length, int rd) 518 { 519 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 520 uint16_t flags = xfer->ux_flags; 521 522 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 523 524 DPRINTFN(8, "addr=%jd endpt=%jd len=%jd speed=%jd", 525 xfer->ux_pipe->up_dev->ud_addr, 526 UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress), 527 length, xfer->ux_pipe->up_dev->ud_speed); 528 529 ASSERT_SLEEPABLE(); 530 KASSERT(length != 0 || (!rd && (flags & USBD_FORCE_SHORT_XFER))); 531 532 size_t nstd = (!rd && (flags & USBD_FORCE_SHORT_XFER)) ? 1 : 0; 533 nstd += ((length + OHCI_PAGE_SIZE - 1) / OHCI_PAGE_SIZE); 534 ox->ox_stds = kmem_zalloc(sizeof(ohci_soft_td_t *) * nstd, 535 KM_SLEEP); 536 ox->ox_nstd = nstd; 537 538 DPRINTFN(8, "xfer %#jx nstd %jd", (uintptr_t)xfer, nstd, 0, 0); 539 540 for (size_t j = 0; j < ox->ox_nstd;) { 541 ohci_soft_td_t *cur = ohci_alloc_std(sc); 542 if (cur == NULL) 543 goto nomem; 544 545 ox->ox_stds[j++] = cur; 546 cur->xfer = xfer; 547 cur->flags = 0; 548 } 549 550 return 0; 551 552 nomem: 553 ohci_free_stds(sc, ox); 554 kmem_free(ox->ox_stds, sizeof(ohci_soft_td_t *) * nstd); 555 556 return ENOMEM; 557 } 558 559 Static void 560 ohci_free_stds(ohci_softc_t *sc, struct ohci_xfer *ox) 561 { 562 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 563 DPRINTF("ox=%#jx", (uintptr_t)ox, 0, 0, 0); 564 565 mutex_enter(&sc->sc_lock); 566 for (size_t i = 0; i < ox->ox_nstd; i++) { 567 ohci_soft_td_t *std = ox->ox_stds[i]; 568 if (std == NULL) 569 break; 570 ohci_free_std_locked(sc, std); 571 } 572 mutex_exit(&sc->sc_lock); 573 } 574 575 void 576 ohci_reset_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, 577 int alen, int rd, ohci_soft_td_t *sp, ohci_soft_td_t **ep) 578 { 579 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 580 ohci_soft_td_t *next, *cur; 581 int len, curlen; 582 usb_dma_t *dma = &xfer->ux_dmabuf; 583 uint16_t flags = xfer->ux_flags; 584 585 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 586 DPRINTF("start len=%jd", alen, 0, 0, 0); 587 588 KASSERT(mutex_owned(&sc->sc_lock)); 589 590 DPRINTFN(8, "addr=%jd endpt=%jd len=%jd speed=%jd", 591 xfer->ux_pipe->up_dev->ud_addr, 592 UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress), 593 alen, xfer->ux_pipe->up_dev->ud_speed); 594 595 KASSERT(sp); 596 597 int mps = UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize); 598 599 /* 600 * Assign next for the len == 0 case where we don't go through the 601 * main loop. 602 */ 603 len = alen; 604 cur = next = sp; 605 606 usb_syncmem(dma, 0, len, 607 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 608 const uint32_t tdflags = HTOO32( 609 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 610 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 611 612 size_t curoffs = 0; 613 for (size_t j = 1; len != 0;) { 614 if (j == ox->ox_nstd) 615 next = NULL; 616 else 617 next = ox->ox_stds[j++]; 618 KASSERT(next != cur); 619 620 curlen = 0; 621 const ohci_physaddr_t sdataphys = DMAADDR(dma, curoffs); 622 ohci_physaddr_t edataphys = DMAADDR(dma, curoffs + len - 1); 623 624 const ohci_physaddr_t sphyspg = OHCI_PAGE(sdataphys); 625 ohci_physaddr_t ephyspg = OHCI_PAGE(edataphys); 626 /* 627 * The OHCI hardware can handle at most one page 628 * crossing per TD 629 */ 630 curlen = len; 631 if (sphyspg != ephyspg && 632 sphyspg + OHCI_PAGE_SIZE != ephyspg) { 633 /* must use multiple TDs, fill as much as possible. */ 634 curlen = 2 * OHCI_PAGE_SIZE - 635 OHCI_PAGE_OFFSET(sdataphys); 636 /* the length must be a multiple of the max size */ 637 curlen -= curlen % mps; 638 edataphys = DMAADDR(dma, curoffs + curlen - 1); 639 } 640 KASSERT(curlen != 0); 641 DPRINTFN(4, "sdataphys=0x%08jx edataphys=0x%08jx " 642 "len=%jd curlen=%jd", sdataphys, edataphys, len, curlen); 643 644 cur->td.td_flags = tdflags; 645 cur->td.td_cbp = HTOO32(sdataphys); 646 cur->td.td_be = HTOO32(edataphys); 647 cur->td.td_nexttd = (next != NULL) ? HTOO32(next->physaddr) : 0; 648 cur->nexttd = next; 649 cur->len = curlen; 650 cur->flags = OHCI_ADD_LEN; 651 cur->xfer = xfer; 652 ohci_hash_add_td(sc, cur); 653 654 curoffs += curlen; 655 len -= curlen; 656 657 if (len != 0) { 658 KASSERT(next != NULL); 659 DPRINTFN(10, "extend chain", 0, 0, 0, 0); 660 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 661 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 662 663 cur = next; 664 } 665 } 666 cur->td.td_flags |= 667 HTOO32(xfer->ux_flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0); 668 669 if (!rd && 670 (flags & USBD_FORCE_SHORT_XFER) && 671 alen % mps == 0) { 672 /* We're adding a ZLP so sync the previous TD */ 673 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td), 674 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 675 676 /* Force a 0 length transfer at the end. */ 677 678 KASSERT(next != NULL); 679 cur = next; 680 681 cur->td.td_flags = tdflags; 682 cur->td.td_cbp = 0; /* indicate 0 length packet */ 683 cur->td.td_nexttd = 0; 684 cur->td.td_be = ~0; 685 cur->nexttd = NULL; 686 cur->len = 0; 687 cur->flags = 0; 688 cur->xfer = xfer; 689 ohci_hash_add_td(sc, cur); 690 691 DPRINTFN(2, "add 0 xfer", 0, 0, 0, 0); 692 } 693 694 /* Last TD gets usb_syncmem'ed by caller */ 695 *ep = cur; 696 } 697 698 ohci_soft_itd_t * 699 ohci_alloc_sitd(ohci_softc_t *sc) 700 { 701 ohci_soft_itd_t *sitd; 702 usbd_status err; 703 int i, offs; 704 usb_dma_t dma; 705 706 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 707 708 mutex_enter(&sc->sc_lock); 709 if (sc->sc_freeitds == NULL) { 710 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0); 711 mutex_exit(&sc->sc_lock); 712 713 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 714 OHCI_ITD_ALIGN, &dma); 715 if (err) 716 return NULL; 717 mutex_enter(&sc->sc_lock); 718 for (i = 0; i < OHCI_SITD_CHUNK; i++) { 719 offs = i * OHCI_SITD_SIZE; 720 sitd = KERNADDR(&dma, offs); 721 sitd->physaddr = DMAADDR(&dma, offs); 722 sitd->dma = dma; 723 sitd->offs = offs; 724 sitd->nextitd = sc->sc_freeitds; 725 sc->sc_freeitds = sitd; 726 } 727 } 728 729 sitd = sc->sc_freeitds; 730 sc->sc_freeitds = sitd->nextitd; 731 mutex_exit(&sc->sc_lock); 732 733 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 734 sitd->nextitd = NULL; 735 sitd->xfer = NULL; 736 737 #ifdef DIAGNOSTIC 738 sitd->isdone = true; 739 #endif 740 741 return sitd; 742 } 743 744 Static void 745 ohci_free_sitd_locked(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 746 { 747 748 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 749 DPRINTFN(10, "sitd=%#jx", (uintptr_t)sitd, 0, 0, 0); 750 751 KASSERT(sitd->isdone); 752 #ifdef DIAGNOSTIC 753 /* Warn double free */ 754 sitd->isdone = false; 755 #endif 756 757 sitd->nextitd = sc->sc_freeitds; 758 sc->sc_freeitds = sitd; 759 } 760 761 void 762 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 763 { 764 765 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 766 767 mutex_enter(&sc->sc_lock); 768 ohci_free_sitd_locked(sc, sitd); 769 mutex_exit(&sc->sc_lock); 770 } 771 772 int 773 ohci_init(ohci_softc_t *sc) 774 { 775 ohci_soft_ed_t *sed, *psed; 776 usbd_status err; 777 int i; 778 uint32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca /*, descb */; 779 780 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 781 782 aprint_normal_dev(sc->sc_dev, ""); 783 784 sc->sc_hcca = NULL; 785 callout_init(&sc->sc_tmo_rhsc, CALLOUT_MPSAFE); 786 787 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB); 788 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_USB); 789 790 sc->sc_rhsc_si = softint_establish(SOFTINT_USB | SOFTINT_MPSAFE, 791 ohci_rhsc_softint, sc); 792 793 for (i = 0; i < OHCI_HASH_SIZE; i++) 794 LIST_INIT(&sc->sc_hash_tds[i]); 795 for (i = 0; i < OHCI_HASH_SIZE; i++) 796 LIST_INIT(&sc->sc_hash_itds[i]); 797 798 sc->sc_xferpool = pool_cache_init(sizeof(struct ohci_xfer), 0, 0, 0, 799 "ohcixfer", NULL, IPL_USB, NULL, NULL, NULL); 800 801 rev = OREAD4(sc, OHCI_REVISION); 802 aprint_normal("OHCI version %d.%d%s\n", 803 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 804 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 805 806 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 807 aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n"); 808 sc->sc_bus.ub_revision = USBREV_UNKNOWN; 809 return -1; 810 } 811 sc->sc_bus.ub_revision = USBREV_1_0; 812 sc->sc_bus.ub_usedma = true; 813 814 /* XXX determine alignment by R/W */ 815 /* Allocate the HCCA area. */ 816 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 817 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 818 if (err) { 819 sc->sc_hcca = NULL; 820 return err; 821 } 822 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 823 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 824 825 sc->sc_eintrs = OHCI_NORMAL_INTRS; 826 827 /* Allocate dummy ED that starts the control list. */ 828 sc->sc_ctrl_head = ohci_alloc_sed(sc); 829 if (sc->sc_ctrl_head == NULL) { 830 err = ENOMEM; 831 goto bad1; 832 } 833 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 834 835 /* Allocate dummy ED that starts the bulk list. */ 836 sc->sc_bulk_head = ohci_alloc_sed(sc); 837 if (sc->sc_bulk_head == NULL) { 838 err = ENOMEM; 839 goto bad2; 840 } 841 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 842 usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs, 843 sizeof(sc->sc_bulk_head->ed), 844 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 845 846 /* Allocate dummy ED that starts the isochronous list. */ 847 sc->sc_isoc_head = ohci_alloc_sed(sc); 848 if (sc->sc_isoc_head == NULL) { 849 err = ENOMEM; 850 goto bad3; 851 } 852 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 853 usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs, 854 sizeof(sc->sc_isoc_head->ed), 855 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 856 857 /* Allocate all the dummy EDs that make up the interrupt tree. */ 858 for (i = 0; i < OHCI_NO_EDS; i++) { 859 sed = ohci_alloc_sed(sc); 860 if (sed == NULL) { 861 while (--i >= 0) 862 ohci_free_sed(sc, sc->sc_eds[i]); 863 err = ENOMEM; 864 goto bad4; 865 } 866 /* All ED fields are set to 0. */ 867 sc->sc_eds[i] = sed; 868 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 869 if (i != 0) 870 psed = sc->sc_eds[(i-1) / 2]; 871 else 872 psed= sc->sc_isoc_head; 873 sed->next = psed; 874 sed->ed.ed_nexted = HTOO32(psed->physaddr); 875 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 876 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 877 } 878 /* 879 * Fill HCCA interrupt table. The bit reversal is to get 880 * the tree set up properly to spread the interrupts. 881 */ 882 for (i = 0; i < OHCI_NO_INTRS; i++) 883 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 884 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 885 usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE, 886 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 887 888 #ifdef OHCI_DEBUG 889 DPRINTFN(15, "--- dump start ---", 0, 0, 0 ,0); 890 if (ohcidebug >= 15) { 891 for (i = 0; i < OHCI_NO_EDS; i++) { 892 DPRINTFN(15, "ed#%jd ", i, 0, 0, 0); 893 ohci_dump_ed(sc, sc->sc_eds[i]); 894 } 895 DPRINTFN(15, "iso", 0, 0, 0 ,0); 896 ohci_dump_ed(sc, sc->sc_isoc_head); 897 } 898 DPRINTFN(15, "--- dump end ---", 0, 0, 0 ,0); 899 #endif 900 901 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 902 ctl = OREAD4(sc, OHCI_CONTROL); 903 rwc = ctl & OHCI_RWC; 904 fm = OREAD4(sc, OHCI_FM_INTERVAL); 905 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 906 /* descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); */ 907 908 /* Determine in what context we are running. */ 909 if (ctl & OHCI_IR) { 910 /* SMM active, request change */ 911 DPRINTF("SMM active, request owner change", 0, 0, 0, 0); 912 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 913 (OHCI_OC | OHCI_MIE)) 914 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 915 s = OREAD4(sc, OHCI_COMMAND_STATUS); 916 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 917 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 918 usb_delay_ms(&sc->sc_bus, 1); 919 ctl = OREAD4(sc, OHCI_CONTROL); 920 } 921 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 922 if ((ctl & OHCI_IR) == 0) { 923 aprint_error_dev(sc->sc_dev, 924 "SMM does not respond, resetting\n"); 925 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 926 goto reset; 927 } 928 #if 0 929 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 930 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 931 /* BIOS started controller. */ 932 DPRINTF("BIOS active", 0, 0, 0, 0); 933 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 934 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 935 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 936 } 937 #endif 938 } else { 939 DPRINTF("cold started", 0 ,0 ,0 ,0); 940 reset: 941 /* Controller was cold started. */ 942 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 943 } 944 945 /* 946 * This reset should not be necessary according to the OHCI spec, but 947 * without it some controllers do not start. 948 */ 949 DPRINTF("sc %#jx: resetting", (uintptr_t)sc, 0, 0, 0); 950 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 951 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 952 953 /* We now own the host controller and the bus has been reset. */ 954 955 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 956 /* Nominal time for a reset is 10 us. */ 957 for (i = 0; i < 10; i++) { 958 delay(10); 959 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 960 if (!hcr) 961 break; 962 } 963 if (hcr) { 964 aprint_error_dev(sc->sc_dev, "reset timeout\n"); 965 err = EIO; 966 goto bad5; 967 } 968 #ifdef OHCI_DEBUG 969 if (ohcidebug >= 15) 970 ohci_dumpregs(sc); 971 #endif 972 973 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 974 975 /* Set up HC registers. */ 976 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 977 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 978 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 979 /* disable all interrupts and then switch on all desired interrupts */ 980 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 981 /* switch on desired functional features */ 982 ctl = OREAD4(sc, OHCI_CONTROL); 983 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 984 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 985 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 986 /* And finally start it! */ 987 OWRITE4(sc, OHCI_CONTROL, ctl); 988 989 /* 990 * The controller is now OPERATIONAL. Set a some final 991 * registers that should be set earlier, but that the 992 * controller ignores when in the SUSPEND state. 993 */ 994 ival = OHCI_GET_IVAL(fm); 995 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 996 fm |= OHCI_FSMPS(ival) | ival; 997 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 998 per = OHCI_PERIODIC(ival); /* 90% periodic */ 999 OWRITE4(sc, OHCI_PERIODIC_START, per); 1000 1001 if (sc->sc_flags & OHCIF_SUPERIO) { 1002 /* no overcurrent protection */ 1003 desca |= OHCI_NOCP; 1004 /* 1005 * Clear NoPowerSwitching and PowerOnToPowerGoodTime meaning 1006 * that 1007 * - ports are always power switched 1008 * - don't wait for powered root hub port 1009 */ 1010 desca &= ~(__SHIFTIN(0xff, OHCI_POTPGT_MASK) | OHCI_NPS); 1011 } 1012 1013 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 1014 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 1015 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 1016 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 1017 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 1018 1019 /* 1020 * The AMD756 requires a delay before re-reading the register, 1021 * otherwise it will occasionally report 0 ports. 1022 */ 1023 sc->sc_noport = 0; 1024 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 1025 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 1026 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 1027 } 1028 1029 #ifdef OHCI_DEBUG 1030 if (ohcidebug >= 5) 1031 ohci_dumpregs(sc); 1032 #endif 1033 1034 /* Set up the bus struct. */ 1035 sc->sc_bus.ub_methods = &ohci_bus_methods; 1036 sc->sc_bus.ub_pipesize = sizeof(struct ohci_pipe); 1037 1038 sc->sc_control = sc->sc_intre = 0; 1039 1040 /* Finally, turn on interrupts. */ 1041 DPRINTF("enabling %#jx", sc->sc_eintrs | OHCI_MIE, 0, 0, 0); 1042 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 1043 1044 return 0; 1045 1046 bad5: 1047 for (i = 0; i < OHCI_NO_EDS; i++) 1048 ohci_free_sed(sc, sc->sc_eds[i]); 1049 bad4: 1050 ohci_free_sed(sc, sc->sc_isoc_head); 1051 bad3: 1052 ohci_free_sed(sc, sc->sc_bulk_head); 1053 bad2: 1054 ohci_free_sed(sc, sc->sc_ctrl_head); 1055 bad1: 1056 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 1057 sc->sc_hcca = NULL; 1058 return err; 1059 } 1060 1061 struct usbd_xfer * 1062 ohci_allocx(struct usbd_bus *bus, unsigned int nframes) 1063 { 1064 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1065 struct usbd_xfer *xfer; 1066 1067 xfer = pool_cache_get(sc->sc_xferpool, PR_WAITOK); 1068 if (xfer != NULL) { 1069 memset(xfer, 0, sizeof(struct ohci_xfer)); 1070 1071 /* Initialise this always so we can call remove on it. */ 1072 usb_init_task(&xfer->ux_aborttask, ohci_timeout_task, xfer, 1073 USB_TASKQ_MPSAFE); 1074 #ifdef DIAGNOSTIC 1075 xfer->ux_state = XFER_BUSY; 1076 #endif 1077 } 1078 return xfer; 1079 } 1080 1081 void 1082 ohci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 1083 { 1084 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1085 1086 KASSERTMSG(xfer->ux_state == XFER_BUSY, 1087 "xfer=%p not busy, 0x%08x\n", xfer, xfer->ux_state); 1088 #ifdef DIAGNOSTIC 1089 xfer->ux_state = XFER_FREE; 1090 #endif 1091 pool_cache_put(sc->sc_xferpool, xfer); 1092 } 1093 1094 Static void 1095 ohci_get_lock(struct usbd_bus *bus, kmutex_t **lock) 1096 { 1097 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1098 1099 *lock = &sc->sc_lock; 1100 } 1101 1102 /* 1103 * Shut down the controller when the system is going down. 1104 */ 1105 bool 1106 ohci_shutdown(device_t self, int flags) 1107 { 1108 ohci_softc_t *sc = device_private(self); 1109 1110 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1111 1112 DPRINTF("stopping the HC", 0, 0, 0, 0); 1113 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 1114 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1115 return true; 1116 } 1117 1118 bool 1119 ohci_resume(device_t dv, const pmf_qual_t *qual) 1120 { 1121 ohci_softc_t *sc = device_private(dv); 1122 uint32_t ctl; 1123 1124 mutex_spin_enter(&sc->sc_intr_lock); 1125 sc->sc_bus.ub_usepolling++; 1126 mutex_spin_exit(&sc->sc_intr_lock); 1127 1128 /* Some broken BIOSes do not recover these values */ 1129 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1130 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, 1131 sc->sc_ctrl_head->physaddr); 1132 OWRITE4(sc, OHCI_BULK_HEAD_ED, 1133 sc->sc_bulk_head->physaddr); 1134 if (sc->sc_intre) 1135 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre & 1136 (OHCI_ALL_INTRS | OHCI_MIE)); 1137 if (sc->sc_control) 1138 ctl = sc->sc_control; 1139 else 1140 ctl = OREAD4(sc, OHCI_CONTROL); 1141 ctl |= OHCI_HCFS_RESUME; 1142 OWRITE4(sc, OHCI_CONTROL, ctl); 1143 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1144 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1145 OWRITE4(sc, OHCI_CONTROL, ctl); 1146 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1147 sc->sc_control = sc->sc_intre = 0; 1148 1149 mutex_spin_enter(&sc->sc_intr_lock); 1150 sc->sc_bus.ub_usepolling--; 1151 mutex_spin_exit(&sc->sc_intr_lock); 1152 1153 return true; 1154 } 1155 1156 bool 1157 ohci_suspend(device_t dv, const pmf_qual_t *qual) 1158 { 1159 ohci_softc_t *sc = device_private(dv); 1160 uint32_t ctl; 1161 1162 mutex_spin_enter(&sc->sc_intr_lock); 1163 sc->sc_bus.ub_usepolling++; 1164 mutex_spin_exit(&sc->sc_intr_lock); 1165 1166 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1167 if (sc->sc_control == 0) { 1168 /* 1169 * Preserve register values, in case that BIOS 1170 * does not recover them. 1171 */ 1172 sc->sc_control = ctl; 1173 sc->sc_intre = OREAD4(sc, 1174 OHCI_INTERRUPT_ENABLE); 1175 } 1176 ctl |= OHCI_HCFS_SUSPEND; 1177 OWRITE4(sc, OHCI_CONTROL, ctl); 1178 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1179 1180 mutex_spin_enter(&sc->sc_intr_lock); 1181 sc->sc_bus.ub_usepolling--; 1182 mutex_spin_exit(&sc->sc_intr_lock); 1183 1184 return true; 1185 } 1186 1187 #ifdef OHCI_DEBUG 1188 void 1189 ohci_dumpregs(ohci_softc_t *sc) 1190 { 1191 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1192 1193 DPRINTF("rev=0x%08jx control=0x%08jx command=0x%08jx", 1194 OREAD4(sc, OHCI_REVISION), 1195 OREAD4(sc, OHCI_CONTROL), 1196 OREAD4(sc, OHCI_COMMAND_STATUS), 0); 1197 DPRINTF(" intrstat=0x%08jx intre=0x%08jx intrd=0x%08jx", 1198 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1199 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1200 OREAD4(sc, OHCI_INTERRUPT_DISABLE), 0); 1201 DPRINTF(" hcca=0x%08jx percur=0x%08jx ctrlhd=0x%08jx", 1202 OREAD4(sc, OHCI_HCCA), 1203 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1204 OREAD4(sc, OHCI_CONTROL_HEAD_ED), 0); 1205 DPRINTF(" ctrlcur=0x%08jx bulkhd=0x%08jx bulkcur=0x%08jx", 1206 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1207 OREAD4(sc, OHCI_BULK_HEAD_ED), 1208 OREAD4(sc, OHCI_BULK_CURRENT_ED) ,0); 1209 DPRINTF(" done=0x%08jx fmival=0x%08jx fmrem=0x%08jx", 1210 OREAD4(sc, OHCI_DONE_HEAD), 1211 OREAD4(sc, OHCI_FM_INTERVAL), 1212 OREAD4(sc, OHCI_FM_REMAINING), 0); 1213 DPRINTF(" fmnum=0x%08jx perst=0x%08jx lsthrs=0x%08jx", 1214 OREAD4(sc, OHCI_FM_NUMBER), 1215 OREAD4(sc, OHCI_PERIODIC_START), 1216 OREAD4(sc, OHCI_LS_THRESHOLD), 0); 1217 DPRINTF(" desca=0x%08jx descb=0x%08jx stat=0x%08jx", 1218 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1219 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1220 OREAD4(sc, OHCI_RH_STATUS), 0); 1221 DPRINTF(" port1=0x%08jx port2=0x%08jx", 1222 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1223 OREAD4(sc, OHCI_RH_PORT_STATUS(2)), 0, 0); 1224 DPRINTF(" HCCA: frame_number=0x%04jx done_head=0x%08jx", 1225 O32TOH(sc->sc_hcca->hcca_frame_number), 1226 O32TOH(sc->sc_hcca->hcca_done_head), 0, 0); 1227 } 1228 #endif 1229 1230 Static int ohci_intr1(ohci_softc_t *); 1231 1232 int 1233 ohci_intr(void *p) 1234 { 1235 ohci_softc_t *sc = p; 1236 int ret = 0; 1237 1238 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1239 1240 if (sc == NULL) 1241 return 0; 1242 1243 mutex_spin_enter(&sc->sc_intr_lock); 1244 1245 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1246 goto done; 1247 1248 /* If we get an interrupt while polling, then just ignore it. */ 1249 if (sc->sc_bus.ub_usepolling) { 1250 DPRINTFN(16, "ignored interrupt while polling", 0, 0, 0, 0); 1251 /* for level triggered intrs, should do something to ack */ 1252 OWRITE4(sc, OHCI_INTERRUPT_STATUS, 1253 OREAD4(sc, OHCI_INTERRUPT_STATUS)); 1254 1255 goto done; 1256 } 1257 1258 ret = ohci_intr1(sc); 1259 1260 done: 1261 mutex_spin_exit(&sc->sc_intr_lock); 1262 return ret; 1263 } 1264 1265 Static int 1266 ohci_intr1(ohci_softc_t *sc) 1267 { 1268 uint32_t intrs, eintrs; 1269 1270 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1271 1272 /* In case the interrupt occurs before initialization has completed. */ 1273 if (sc == NULL || sc->sc_hcca == NULL) { 1274 #ifdef DIAGNOSTIC 1275 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1276 #endif 1277 return 0; 1278 } 1279 1280 KASSERT(mutex_owned(&sc->sc_intr_lock)); 1281 1282 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1283 if (!intrs) 1284 return 0; 1285 1286 /* Acknowledge */ 1287 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); 1288 eintrs = intrs & sc->sc_eintrs; 1289 DPRINTFN(7, "sc=%#jx", (uintptr_t)sc, 0, 0, 0); 1290 DPRINTFN(7, "intrs=%#jx(%#jx) eintrs=%#jx(%#jx)", 1291 intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), eintrs, 1292 sc->sc_eintrs); 1293 1294 if (!eintrs) { 1295 return 0; 1296 } 1297 1298 if (eintrs & OHCI_SO) { 1299 sc->sc_overrun_cnt++; 1300 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1301 printf("%s: %u scheduling overruns\n", 1302 device_xname(sc->sc_dev), sc->sc_overrun_cnt); 1303 sc->sc_overrun_cnt = 0; 1304 } 1305 /* XXX do what */ 1306 eintrs &= ~OHCI_SO; 1307 } 1308 if (eintrs & OHCI_WDH) { 1309 /* 1310 * We block the interrupt below, and reenable it later from 1311 * ohci_softintr(). 1312 */ 1313 usb_schedsoftintr(&sc->sc_bus); 1314 } 1315 if (eintrs & OHCI_RD) { 1316 DPRINTFN(5, "resume detect sc=%#jx", (uintptr_t)sc, 0, 0, 0); 1317 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1318 /* XXX process resume detect */ 1319 } 1320 if (eintrs & OHCI_UE) { 1321 DPRINTFN(5, "unrecoverable error sc=%#jx", (uintptr_t)sc, 0, 0, 0); 1322 printf("%s: unrecoverable error, controller halted\n", 1323 device_xname(sc->sc_dev)); 1324 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1325 /* XXX what else */ 1326 } 1327 if (eintrs & OHCI_RHSC) { 1328 /* 1329 * We block the interrupt below, and reenable it later from 1330 * a timeout. 1331 */ 1332 softint_schedule(sc->sc_rhsc_si); 1333 } 1334 1335 if (eintrs != 0) { 1336 /* Block unprocessed interrupts. */ 1337 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1338 sc->sc_eintrs &= ~eintrs; 1339 DPRINTF("sc %#jx blocking intrs 0x%jx", (uintptr_t)sc, 1340 eintrs, 0, 0); 1341 } 1342 1343 return 1; 1344 } 1345 1346 void 1347 ohci_rhsc_enable(void *v_sc) 1348 { 1349 ohci_softc_t *sc = v_sc; 1350 1351 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1352 DPRINTF("sc %#jx", (uintptr_t)sc, 0, 0, 0); 1353 mutex_spin_enter(&sc->sc_intr_lock); 1354 sc->sc_eintrs |= OHCI_RHSC; 1355 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1356 mutex_spin_exit(&sc->sc_intr_lock); 1357 } 1358 1359 #ifdef OHCI_DEBUG 1360 const char *ohci_cc_strs[] = { 1361 "NO_ERROR", 1362 "CRC", 1363 "BIT_STUFFING", 1364 "DATA_TOGGLE_MISMATCH", 1365 "STALL", 1366 "DEVICE_NOT_RESPONDING", 1367 "PID_CHECK_FAILURE", 1368 "UNEXPECTED_PID", 1369 "DATA_OVERRUN", 1370 "DATA_UNDERRUN", 1371 "BUFFER_OVERRUN", 1372 "BUFFER_UNDERRUN", 1373 "reserved", 1374 "reserved", 1375 "NOT_ACCESSED", 1376 "NOT_ACCESSED", 1377 }; 1378 #endif 1379 1380 void 1381 ohci_softintr(void *v) 1382 { 1383 struct usbd_bus *bus = v; 1384 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1385 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1386 ohci_soft_td_t *std, *sdone, *stdnext; 1387 struct usbd_xfer *xfer; 1388 struct ohci_pipe *opipe; 1389 int len, cc; 1390 int i, j, actlen, iframes, uedir; 1391 ohci_physaddr_t done; 1392 1393 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1394 1395 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1396 1397 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1398 sizeof(sc->sc_hcca->hcca_done_head), 1399 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1400 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS; 1401 sc->sc_hcca->hcca_done_head = 0; 1402 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head), 1403 sizeof(sc->sc_hcca->hcca_done_head), 1404 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1405 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH); 1406 sc->sc_eintrs |= OHCI_WDH; 1407 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH); 1408 1409 /* Reverse the done list. */ 1410 for (sdone = NULL, sidone = NULL; done != 0; ) { 1411 std = ohci_hash_find_td(sc, done); 1412 if (std != NULL) { 1413 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1414 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1415 std->dnext = sdone; 1416 done = O32TOH(std->td.td_nexttd); 1417 sdone = std; 1418 DPRINTFN(10, "add TD %#jx", (uintptr_t)std, 0, 0, 0); 1419 continue; 1420 } 1421 sitd = ohci_hash_find_itd(sc, done); 1422 if (sitd != NULL) { 1423 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1424 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1425 sitd->dnext = sidone; 1426 done = O32TOH(sitd->itd.itd_nextitd); 1427 sidone = sitd; 1428 DPRINTFN(5, "add ITD %#jx", (uintptr_t)sitd, 0, 0, 0); 1429 continue; 1430 } 1431 DPRINTFN(10, "addr %#jx not found", (uintptr_t)done, 0, 0, 0); 1432 device_printf(sc->sc_dev, "WARNING: addr 0x%08lx not found\n", 1433 (u_long)done); 1434 break; 1435 } 1436 1437 DPRINTFN(10, "sdone=%#jx sidone=%#jx", (uintptr_t)sdone, 1438 (uintptr_t)sidone, 0, 0); 1439 DPRINTFN(10, "--- TD dump start ---", 0, 0, 0, 0); 1440 #ifdef OHCI_DEBUG 1441 if (ohcidebug >= 10) { 1442 for (std = sdone; std; std = std->dnext) 1443 ohci_dump_td(sc, std); 1444 } 1445 #endif 1446 DPRINTFN(10, "--- TD dump end ---", 0, 0, 0, 0); 1447 1448 for (std = sdone; std; std = stdnext) { 1449 xfer = std->xfer; 1450 stdnext = std->dnext; 1451 DPRINTFN(10, "std=%#jx xfer=%#jx hcpriv=%#jx", (uintptr_t)std, 1452 (uintptr_t)xfer, (uintptr_t)(xfer ? xfer->ux_hcpriv : 0), 1453 0); 1454 if (xfer == NULL) { 1455 /* 1456 * xfer == NULL: There seems to be no xfer associated 1457 * with this TD. It is tailp that happened to end up on 1458 * the done queue. 1459 * Shouldn't happen, but some chips are broken(?). 1460 */ 1461 continue; 1462 } 1463 1464 /* 1465 * If software has completed it, either by cancellation 1466 * or timeout, drop it on the floor. 1467 */ 1468 if (xfer->ux_status != USBD_IN_PROGRESS) { 1469 KASSERT(xfer->ux_status == USBD_CANCELLED || 1470 xfer->ux_status == USBD_TIMEOUT); 1471 continue; 1472 } 1473 1474 /* 1475 * Cancel the timeout and the task, which have not yet 1476 * run. If they have already fired, at worst they are 1477 * waiting for the lock. They will see that the xfer 1478 * is no longer in progress and give up. 1479 */ 1480 callout_stop(&xfer->ux_callout); 1481 usb_rem_task(xfer->ux_pipe->up_dev, &xfer->ux_aborttask); 1482 1483 len = std->len; 1484 if (std->td.td_cbp != 0) 1485 len -= O32TOH(std->td.td_be) - 1486 O32TOH(std->td.td_cbp) + 1; 1487 DPRINTFN(10, "len=%jd, flags=0x%jx", len, std->flags, 0, 0); 1488 if (std->flags & OHCI_ADD_LEN) 1489 xfer->ux_actlen += len; 1490 1491 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags)); 1492 if (cc == OHCI_CC_NO_ERROR) { 1493 ohci_hash_rem_td(sc, std); 1494 if (std->flags & OHCI_CALL_DONE) { 1495 xfer->ux_status = USBD_NORMAL_COMPLETION; 1496 usb_transfer_complete(xfer); 1497 } 1498 } else { 1499 /* 1500 * Endpoint is halted. First unlink all the TDs 1501 * belonging to the failed transfer, and then restart 1502 * the endpoint. 1503 */ 1504 ohci_soft_td_t *p, *n; 1505 opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1506 1507 DPRINTFN(10, "error cc=%jd", cc, 0, 0, 0); 1508 1509 /* remove xfer's TDs from the hash */ 1510 for (p = std; p->xfer == xfer; p = n) { 1511 n = p->nexttd; 1512 ohci_hash_rem_td(sc, p); 1513 } 1514 1515 ohci_soft_ed_t *sed = opipe->sed; 1516 1517 /* clear halt and TD chain */ 1518 sed->ed.ed_headp = HTOO32(p->physaddr); 1519 usb_syncmem(&sed->dma, 1520 sed->offs + offsetof(ohci_ed_t, ed_headp), 1521 sizeof(sed->ed.ed_headp), 1522 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1523 1524 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1525 1526 if (cc == OHCI_CC_DATA_UNDERRUN) 1527 xfer->ux_status = USBD_NORMAL_COMPLETION; 1528 else if (cc == OHCI_CC_STALL) 1529 xfer->ux_status = USBD_STALLED; 1530 else 1531 xfer->ux_status = USBD_IOERROR; 1532 usb_transfer_complete(xfer); 1533 } 1534 } 1535 DPRINTFN(10, "--- ITD dump start ---", 0, 0, 0, 0); 1536 #ifdef OHCI_DEBUG 1537 if (ohcidebug >= 10) { 1538 for (sitd = sidone; sitd; sitd = sitd->dnext) 1539 ohci_dump_itd(sc, sitd); 1540 } 1541 #endif 1542 DPRINTFN(10, "--- ITD dump end ---", 0, 0, 0, 0); 1543 1544 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1545 xfer = sitd->xfer; 1546 sitdnext = sitd->dnext; 1547 DPRINTFN(1, "sitd=%#jx xfer=%#jx hcpriv=%#jx", (uintptr_t)sitd, 1548 (uintptr_t)xfer, (uintptr_t)(xfer ? xfer->ux_hcpriv : 0), 1549 0); 1550 if (xfer == NULL) 1551 continue; 1552 1553 /* 1554 * If software has completed it, either by cancellation 1555 * or timeout, drop it on the floor. 1556 */ 1557 if (xfer->ux_status != USBD_IN_PROGRESS) { 1558 KASSERT(xfer->ux_status == USBD_CANCELLED || 1559 xfer->ux_status == USBD_TIMEOUT); 1560 continue; 1561 } 1562 1563 /* 1564 * Cancel the timeout and the task, which have not yet 1565 * run. If they have already fired, at worst they are 1566 * waiting for the lock. They will see that the xfer 1567 * is no longer in progress and give up. 1568 */ 1569 callout_stop(&xfer->ux_callout); 1570 usb_rem_task(xfer->ux_pipe->up_dev, &xfer->ux_aborttask); 1571 1572 KASSERT(!sitd->isdone); 1573 #ifdef DIAGNOSTIC 1574 sitd->isdone = true; 1575 #endif 1576 if (sitd->flags & OHCI_CALL_DONE) { 1577 ohci_soft_itd_t *next; 1578 1579 opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1580 opipe->isoc.inuse -= xfer->ux_nframes; 1581 uedir = UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc-> 1582 bEndpointAddress); 1583 xfer->ux_status = USBD_NORMAL_COMPLETION; 1584 actlen = 0; 1585 for (i = 0, sitd = xfer->ux_hcpriv;; 1586 sitd = next) { 1587 next = sitd->nextitd; 1588 if (OHCI_ITD_GET_CC(O32TOH(sitd-> 1589 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1590 xfer->ux_status = USBD_IOERROR; 1591 /* For input, update frlengths with actual */ 1592 /* XXX anything necessary for output? */ 1593 if (uedir == UE_DIR_IN && 1594 xfer->ux_status == USBD_NORMAL_COMPLETION) { 1595 iframes = OHCI_ITD_GET_FC(O32TOH( 1596 sitd->itd.itd_flags)); 1597 for (j = 0; j < iframes; i++, j++) { 1598 len = O16TOH(sitd-> 1599 itd.itd_offset[j]); 1600 if ((OHCI_ITD_PSW_GET_CC(len) & 1601 OHCI_CC_NOT_ACCESSED_MASK) 1602 == OHCI_CC_NOT_ACCESSED) 1603 len = 0; 1604 else 1605 len = OHCI_ITD_PSW_LENGTH(len); 1606 xfer->ux_frlengths[i] = len; 1607 actlen += len; 1608 } 1609 } 1610 if (sitd->flags & OHCI_CALL_DONE) 1611 break; 1612 ohci_hash_rem_itd(sc, sitd); 1613 1614 } 1615 ohci_hash_rem_itd(sc, sitd); 1616 if (uedir == UE_DIR_IN && 1617 xfer->ux_status == USBD_NORMAL_COMPLETION) 1618 xfer->ux_actlen = actlen; 1619 xfer->ux_hcpriv = NULL; 1620 1621 usb_transfer_complete(xfer); 1622 } 1623 } 1624 1625 DPRINTFN(10, "done", 0, 0, 0, 0); 1626 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1627 } 1628 1629 void 1630 ohci_device_ctrl_done(struct usbd_xfer *xfer) 1631 { 1632 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 1633 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1634 int len = UGETW(xfer->ux_request.wLength); 1635 int isread = (xfer->ux_request.bmRequestType & UT_READ); 1636 1637 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1638 DPRINTFN(10, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 1639 1640 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1641 KASSERT(xfer->ux_rqflags & URQ_REQUEST); 1642 1643 if (len) 1644 usb_syncmem(&xfer->ux_dmabuf, 0, len, 1645 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1646 usb_syncmem(&opipe->ctrl.reqdma, 0, 1647 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 1648 } 1649 1650 void 1651 ohci_device_intr_done(struct usbd_xfer *xfer) 1652 { 1653 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1654 int isread = 1655 (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN); 1656 1657 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1658 DPRINTFN(10, "xfer=%#jx, actlen=%jd", (uintptr_t)xfer, 1659 xfer->ux_actlen, 0, 0); 1660 1661 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1662 1663 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 1664 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1665 } 1666 1667 void 1668 ohci_device_bulk_done(struct usbd_xfer *xfer) 1669 { 1670 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 1671 1672 int isread = 1673 (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN); 1674 1675 KASSERT(mutex_owned(&sc->sc_lock)); 1676 1677 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1678 DPRINTFN(10, "xfer=%#jx, actlen=%jd", (uintptr_t)xfer, xfer->ux_actlen, 1679 0, 0); 1680 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length, 1681 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1682 } 1683 1684 Static void 1685 ohci_rhsc_softint(void *arg) 1686 { 1687 ohci_softc_t *sc = arg; 1688 1689 mutex_enter(&sc->sc_lock); 1690 1691 ohci_rhsc(sc, sc->sc_intrxfer); 1692 1693 /* Do not allow RHSC interrupts > 1 per second */ 1694 callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1695 1696 mutex_exit(&sc->sc_lock); 1697 } 1698 1699 void 1700 ohci_rhsc(ohci_softc_t *sc, struct usbd_xfer *xfer) 1701 { 1702 u_char *p; 1703 int i, m; 1704 int hstatus __unused; 1705 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1706 1707 KASSERT(mutex_owned(&sc->sc_lock)); 1708 1709 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1710 DPRINTF("sc=%#jx xfer=%#jx hstatus=0x%08jx", (uintptr_t)sc, 1711 (uintptr_t)xfer, hstatus, 0); 1712 1713 if (xfer == NULL) { 1714 /* Just ignore the change. */ 1715 return; 1716 } 1717 1718 p = xfer->ux_buf; 1719 m = uimin(sc->sc_noport, xfer->ux_length * 8 - 1); 1720 memset(p, 0, xfer->ux_length); 1721 for (i = 1; i <= m; i++) { 1722 /* Pick out CHANGE bits from the status reg. */ 1723 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1724 p[i/8] |= 1 << (i%8); 1725 } 1726 DPRINTF("change=0x%02jx", *p, 0, 0, 0); 1727 xfer->ux_actlen = xfer->ux_length; 1728 xfer->ux_status = USBD_NORMAL_COMPLETION; 1729 1730 usb_transfer_complete(xfer); 1731 } 1732 1733 void 1734 ohci_root_intr_done(struct usbd_xfer *xfer) 1735 { 1736 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1737 1738 KASSERT(mutex_owned(&sc->sc_lock)); 1739 1740 KASSERT(sc->sc_intrxfer == xfer); 1741 sc->sc_intrxfer = NULL; 1742 } 1743 1744 void 1745 ohci_poll(struct usbd_bus *bus) 1746 { 1747 ohci_softc_t *sc = OHCI_BUS2SC(bus); 1748 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1749 1750 #ifdef OHCI_DEBUG 1751 static int last; 1752 int new; 1753 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1754 if (new != last) { 1755 DPRINTFN(10, "intrs=0x%04jx", new, 0, 0, 0); 1756 last = new; 1757 } 1758 #endif 1759 sc->sc_eintrs |= OHCI_WDH; 1760 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) { 1761 mutex_spin_enter(&sc->sc_intr_lock); 1762 ohci_intr1(sc); 1763 mutex_spin_exit(&sc->sc_intr_lock); 1764 } 1765 } 1766 1767 /* 1768 * Add an ED to the schedule. Called with USB lock held. 1769 */ 1770 Static void 1771 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1772 { 1773 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1774 DPRINTFN(8, "sed=%#jx head=%#jx", (uintptr_t)sed, (uintptr_t)head, 0, 1775 0); 1776 1777 KASSERT(mutex_owned(&sc->sc_lock)); 1778 1779 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1780 sizeof(head->ed.ed_nexted), 1781 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1782 sed->next = head->next; 1783 sed->ed.ed_nexted = head->ed.ed_nexted; 1784 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1785 sizeof(sed->ed.ed_nexted), 1786 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1787 head->next = sed; 1788 head->ed.ed_nexted = HTOO32(sed->physaddr); 1789 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted), 1790 sizeof(head->ed.ed_nexted), 1791 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1792 } 1793 1794 /* 1795 * Remove an ED from the schedule. Called with USB lock held. 1796 */ 1797 Static void 1798 ohci_rem_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1799 { 1800 ohci_soft_ed_t *p; 1801 1802 KASSERT(mutex_owned(&sc->sc_lock)); 1803 1804 /* XXX */ 1805 for (p = head; p != NULL && p->next != sed; p = p->next) 1806 ; 1807 KASSERT(p != NULL); 1808 1809 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted), 1810 sizeof(sed->ed.ed_nexted), 1811 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1812 p->next = sed->next; 1813 p->ed.ed_nexted = sed->ed.ed_nexted; 1814 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 1815 sizeof(p->ed.ed_nexted), 1816 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1817 } 1818 1819 /* 1820 * When a transfer is completed the TD is added to the done queue by 1821 * the host controller. This queue is the processed by software. 1822 * Unfortunately the queue contains the physical address of the TD 1823 * and we have no simple way to translate this back to a kernel address. 1824 * To make the translation possible (and fast) we use a hash table of 1825 * TDs currently in the schedule. The physical address is used as the 1826 * hash value. 1827 */ 1828 1829 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1830 /* Called with USB lock held. */ 1831 void 1832 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1833 { 1834 int h = HASH(std->physaddr); 1835 1836 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1837 1838 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1839 } 1840 1841 /* Called with USB lock held. */ 1842 void 1843 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1844 { 1845 1846 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock)); 1847 1848 LIST_REMOVE(std, hnext); 1849 } 1850 1851 ohci_soft_td_t * 1852 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1853 { 1854 int h = HASH(a); 1855 ohci_soft_td_t *std; 1856 1857 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1858 std != NULL; 1859 std = LIST_NEXT(std, hnext)) 1860 if (std->physaddr == a) 1861 return std; 1862 return NULL; 1863 } 1864 1865 /* Called with USB lock held. */ 1866 void 1867 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1868 { 1869 int h = HASH(sitd->physaddr); 1870 1871 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1872 1873 KASSERT(mutex_owned(&sc->sc_lock)); 1874 1875 DPRINTFN(10, "sitd=%#jx physaddr=0x%08jx", 1876 (uintptr_t)sitd, (u_long)sitd->physaddr, 0, 0); 1877 1878 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1879 } 1880 1881 /* Called with USB lock held. */ 1882 void 1883 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1884 { 1885 1886 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1887 1888 KASSERT(mutex_owned(&sc->sc_lock)); 1889 1890 DPRINTFN(10, "sitd=%#jx physaddr=0x%08jx", (uintptr_t)sitd, 1891 sitd->physaddr, 0, 0); 1892 1893 LIST_REMOVE(sitd, hnext); 1894 } 1895 1896 ohci_soft_itd_t * 1897 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1898 { 1899 int h = HASH(a); 1900 ohci_soft_itd_t *sitd; 1901 1902 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1903 sitd != NULL; 1904 sitd = LIST_NEXT(sitd, hnext)) 1905 if (sitd->physaddr == a) 1906 return sitd; 1907 return NULL; 1908 } 1909 1910 void 1911 ohci_timeout(void *addr) 1912 { 1913 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1914 struct usbd_xfer *xfer = addr; 1915 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1916 struct usbd_device *dev = xfer->ux_pipe->up_dev; 1917 1918 DPRINTF("xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 1919 1920 mutex_enter(&sc->sc_lock); 1921 if (!sc->sc_dying && xfer->ux_status == USBD_IN_PROGRESS) 1922 usb_add_task(dev, &xfer->ux_aborttask, USB_TASKQ_HC); 1923 mutex_exit(&sc->sc_lock); 1924 } 1925 1926 void 1927 ohci_timeout_task(void *addr) 1928 { 1929 struct usbd_xfer *xfer = addr; 1930 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 1931 1932 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1933 1934 DPRINTF("xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 1935 1936 mutex_enter(&sc->sc_lock); 1937 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1938 mutex_exit(&sc->sc_lock); 1939 } 1940 1941 #ifdef OHCI_DEBUG 1942 void 1943 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std) 1944 { 1945 for (; std; std = std->nexttd) { 1946 ohci_dump_td(sc, std); 1947 KASSERTMSG(std->nexttd == NULL || std != std->nexttd, 1948 "std %p next %p", std, std->nexttd); 1949 } 1950 } 1951 1952 void 1953 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1954 { 1955 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1956 1957 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1958 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1959 1960 uint32_t flags = O32TOH(std->td.td_flags); 1961 DPRINTF("TD(%#jx) at 0x%08jx:", (uintptr_t)std, std->physaddr, 0, 0); 1962 DPRINTF(" round=%jd DP=%jx DI=%jx T=%jx", 1963 !!(flags & OHCI_TD_R), 1964 __SHIFTOUT(flags, OHCI_TD_DP_MASK), 1965 OHCI_TD_GET_DI(flags), 1966 __SHIFTOUT(flags, OHCI_TD_TOGGLE_MASK)); 1967 DPRINTF(" EC=%jd CC=%jd", OHCI_TD_GET_EC(flags), 1968 OHCI_TD_GET_CC(flags), 0, 0); 1969 DPRINTF(" td_cbp=0x%08jx td_nexttd=0x%08jx td_be=0x%08jx", 1970 (u_long)O32TOH(std->td.td_cbp), 1971 (u_long)O32TOH(std->td.td_nexttd), 1972 (u_long)O32TOH(std->td.td_be), 0); 1973 } 1974 1975 void 1976 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1977 { 1978 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 1979 1980 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 1981 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1982 1983 uint32_t flags = O32TOH(sitd->itd.itd_flags); 1984 DPRINTF("ITD(%#jx) at 0x%08jx", (uintptr_t)sitd, sitd->physaddr, 0, 0); 1985 DPRINTF(" sf=%jd di=%jd fc=%jd cc=%jd", 1986 OHCI_ITD_GET_SF(flags), OHCI_ITD_GET_DI(flags), 1987 OHCI_ITD_GET_FC(flags), OHCI_ITD_GET_CC(flags)); 1988 DPRINTF(" bp0=0x%08jx next=0x%08jx be=0x%08jx", 1989 O32TOH(sitd->itd.itd_bp0), 1990 O32TOH(sitd->itd.itd_nextitd), 1991 O32TOH(sitd->itd.itd_be), 0); 1992 CTASSERT(OHCI_ITD_NOFFSET == 8); 1993 DPRINTF(" offs[0] = 0x%04jx offs[1] = 0x%04jx " 1994 "offs[2] = 0x%04jx offs[3] = 0x%04jx", 1995 O16TOH(sitd->itd.itd_offset[0]), 1996 O16TOH(sitd->itd.itd_offset[1]), 1997 O16TOH(sitd->itd.itd_offset[2]), 1998 O16TOH(sitd->itd.itd_offset[3])); 1999 DPRINTF(" offs[4] = 0x%04jx offs[5] = 0x%04jx " 2000 "offs[6] = 0x%04jx offs[7] = 0x%04jx", 2001 O16TOH(sitd->itd.itd_offset[4]), 2002 O16TOH(sitd->itd.itd_offset[5]), 2003 O16TOH(sitd->itd.itd_offset[6]), 2004 O16TOH(sitd->itd.itd_offset[7])); 2005 } 2006 2007 void 2008 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 2009 { 2010 for (; sitd; sitd = sitd->nextitd) 2011 ohci_dump_itd(sc, sitd); 2012 } 2013 2014 void 2015 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 2016 { 2017 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2018 2019 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2020 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2021 2022 uint32_t flags = O32TOH(sed->ed.ed_flags); 2023 DPRINTF("ED(%#jx) at 0x%08jx:", (uintptr_t)sed, sed->physaddr, 0, 0); 2024 DPRINTF(" addr=%jd endpt=%jd maxp=%jd", 2025 OHCI_ED_GET_FA(flags), 2026 OHCI_ED_GET_EN(flags), 2027 OHCI_ED_GET_MAXP(flags), 2028 0); 2029 DPRINTF(" dir=%jd speed=%jd skip=%jd iso=%jd", 2030 __SHIFTOUT(flags, OHCI_ED_DIR_MASK), 2031 !!(flags & OHCI_ED_SPEED), 2032 !!(flags & OHCI_ED_SKIP), 2033 !!(flags & OHCI_ED_FORMAT_ISO)); 2034 DPRINTF(" tailp=0x%08jx", (u_long)O32TOH(sed->ed.ed_tailp), 2035 0, 0, 0); 2036 DPRINTF(" headp=0x%08jx nexted=0x%08jx halted=%jd carry=%jd", 2037 O32TOH(sed->ed.ed_headp), O32TOH(sed->ed.ed_nexted), 2038 !!(O32TOH(sed->ed.ed_headp) & OHCI_HALTED), 2039 !!(O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY)); 2040 } 2041 #endif 2042 2043 usbd_status 2044 ohci_open(struct usbd_pipe *pipe) 2045 { 2046 struct usbd_device *dev = pipe->up_dev; 2047 struct usbd_bus *bus = dev->ud_bus; 2048 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2049 usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc; 2050 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2051 uint8_t addr = dev->ud_addr; 2052 uint8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2053 ohci_soft_ed_t *sed; 2054 ohci_soft_td_t *std; 2055 ohci_soft_itd_t *sitd; 2056 ohci_physaddr_t tdphys; 2057 uint32_t fmt; 2058 usbd_status err = USBD_NOMEM; 2059 int ival; 2060 2061 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2062 DPRINTFN(1, "pipe=%#jx, addr=%jd, endpt=%jd (%jd)", (uintptr_t)pipe, 2063 addr, ed->bEndpointAddress, bus->ub_rhaddr); 2064 2065 if (sc->sc_dying) { 2066 return USBD_IOERROR; 2067 } 2068 2069 std = NULL; 2070 sed = NULL; 2071 2072 if (addr == bus->ub_rhaddr) { 2073 switch (ed->bEndpointAddress) { 2074 case USB_CONTROL_ENDPOINT: 2075 pipe->up_methods = &roothub_ctrl_methods; 2076 break; 2077 case UE_DIR_IN | USBROOTHUB_INTR_ENDPT: 2078 pipe->up_methods = &ohci_root_intr_methods; 2079 break; 2080 default: 2081 err = USBD_INVAL; 2082 goto bad; 2083 } 2084 } else { 2085 sed = ohci_alloc_sed(sc); 2086 if (sed == NULL) 2087 goto bad; 2088 opipe->sed = sed; 2089 if (xfertype == UE_ISOCHRONOUS) { 2090 sitd = ohci_alloc_sitd(sc); 2091 if (sitd == NULL) 2092 goto bad; 2093 2094 opipe->tail.itd = sitd; 2095 tdphys = sitd->physaddr; 2096 fmt = OHCI_ED_FORMAT_ISO; 2097 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2098 fmt |= OHCI_ED_DIR_IN; 2099 else 2100 fmt |= OHCI_ED_DIR_OUT; 2101 } else { 2102 std = ohci_alloc_std(sc); 2103 if (std == NULL) 2104 goto bad; 2105 2106 opipe->tail.td = std; 2107 tdphys = std->physaddr; 2108 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2109 } 2110 sed->ed.ed_flags = HTOO32( 2111 OHCI_ED_SET_FA(addr) | 2112 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2113 (dev->ud_speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2114 fmt | 2115 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2116 sed->ed.ed_headp = HTOO32(tdphys | 2117 (pipe->up_endpoint->ue_toggle ? OHCI_TOGGLECARRY : 0)); 2118 sed->ed.ed_tailp = HTOO32(tdphys); 2119 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 2120 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2121 2122 switch (xfertype) { 2123 case UE_CONTROL: 2124 pipe->up_methods = &ohci_device_ctrl_methods; 2125 err = usb_allocmem(&sc->sc_bus, 2126 sizeof(usb_device_request_t), 2127 0, &opipe->ctrl.reqdma); 2128 if (err) 2129 goto bad; 2130 mutex_enter(&sc->sc_lock); 2131 ohci_add_ed(sc, sed, sc->sc_ctrl_head); 2132 mutex_exit(&sc->sc_lock); 2133 break; 2134 case UE_INTERRUPT: 2135 pipe->up_methods = &ohci_device_intr_methods; 2136 ival = pipe->up_interval; 2137 if (ival == USBD_DEFAULT_INTERVAL) 2138 ival = ed->bInterval; 2139 err = ohci_device_setintr(sc, opipe, ival); 2140 if (err) 2141 goto bad; 2142 break; 2143 case UE_ISOCHRONOUS: 2144 pipe->up_serialise = false; 2145 pipe->up_methods = &ohci_device_isoc_methods; 2146 return ohci_setup_isoc(pipe); 2147 case UE_BULK: 2148 pipe->up_methods = &ohci_device_bulk_methods; 2149 mutex_enter(&sc->sc_lock); 2150 ohci_add_ed(sc, sed, sc->sc_bulk_head); 2151 mutex_exit(&sc->sc_lock); 2152 break; 2153 } 2154 } 2155 2156 return USBD_NORMAL_COMPLETION; 2157 2158 bad: 2159 if (std != NULL) { 2160 ohci_free_std(sc, std); 2161 } 2162 if (sed != NULL) 2163 ohci_free_sed(sc, sed); 2164 return err; 2165 2166 } 2167 2168 /* 2169 * Close a reqular pipe. 2170 * Assumes that there are no pending transactions. 2171 */ 2172 void 2173 ohci_close_pipe(struct usbd_pipe *pipe, ohci_soft_ed_t *head) 2174 { 2175 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2176 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2177 ohci_soft_ed_t *sed = opipe->sed; 2178 2179 KASSERT(mutex_owned(&sc->sc_lock)); 2180 2181 #ifdef DIAGNOSTIC 2182 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 2183 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2184 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2185 ohci_soft_td_t *std; 2186 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp)); 2187 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2188 "tl=0x%x pipe=%p, std=%p\n", sed, 2189 (int)O32TOH(sed->ed.ed_headp), 2190 (int)O32TOH(sed->ed.ed_tailp), 2191 pipe, std); 2192 #ifdef OHCI_DEBUG 2193 usbd_dump_pipe(&opipe->pipe); 2194 ohci_dump_ed(sc, sed); 2195 if (std) 2196 ohci_dump_td(sc, std); 2197 #endif 2198 usb_delay_ms(&sc->sc_bus, 2); 2199 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2200 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 2201 printf("ohci_close_pipe: pipe still not empty\n"); 2202 } 2203 #endif 2204 ohci_rem_ed(sc, sed, head); 2205 /* Make sure the host controller is not touching this ED */ 2206 usb_delay_ms(&sc->sc_bus, 1); 2207 pipe->up_endpoint->ue_toggle = 2208 (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0; 2209 ohci_free_sed_locked(sc, opipe->sed); 2210 } 2211 2212 /* 2213 * Cancel or timeout a device request. We have two cases to deal with 2214 * 2215 * 1) A driver wants to stop scheduled or inflight transfers 2216 * 2) A transfer has timed out 2217 * 2218 * It's impossible to guarantee that the requested transfer will not 2219 * have (partially) happened since the hardware runs concurrently. 2220 * 2221 * Transfer state is protected by the bus lock and we set the transfer status 2222 * as soon as either of the above happens (with bus lock held). 2223 * 2224 * Then we arrange for the hardware to tells us that it is not still 2225 * processing the TDs by setting the sKip bit and requesting a SOF interrupt 2226 * 2227 * Once we see the SOF interrupt we can check the transfer TDs/iTDs to see if 2228 * they've been processed and either 2229 * a) if they're unused recover them for later use, or 2230 * b) if they've been used allocate new TD/iTDs to replace those 2231 * used. The softint handler will free the old ones. 2232 */ 2233 void 2234 ohci_abort_xfer(struct usbd_xfer *xfer, usbd_status status) 2235 { 2236 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2237 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2238 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2239 ohci_soft_ed_t *sed = opipe->sed; 2240 ohci_soft_td_t *p, *n; 2241 ohci_physaddr_t headp; 2242 int hit; 2243 2244 KASSERTMSG((status == USBD_CANCELLED || status == USBD_TIMEOUT), 2245 "invalid status for abort: %d", (int)status); 2246 2247 DPRINTF("xfer=%#jx pipe=%#jx sed=%#jx", (uintptr_t)xfer, 2248 (uintptr_t)opipe, (uintptr_t)sed, 0); 2249 2250 KASSERT(mutex_owned(&sc->sc_lock)); 2251 ASSERT_SLEEPABLE(); 2252 2253 if (status == USBD_CANCELLED) { 2254 /* 2255 * We are synchronously aborting. Try to stop the 2256 * callout and task, but if we can't, wait for them to 2257 * complete. 2258 */ 2259 callout_halt(&xfer->ux_callout, &sc->sc_lock); 2260 usb_rem_task_wait(xfer->ux_pipe->up_dev, &xfer->ux_aborttask, 2261 USB_TASKQ_HC, &sc->sc_lock); 2262 } else { 2263 /* Otherwise, we are timing out. */ 2264 KASSERT(status == USBD_TIMEOUT); 2265 } 2266 2267 /* 2268 * The xfer cannot have been cancelled already. It is the 2269 * responsibility of the caller of usbd_abort_pipe not to try 2270 * to abort a pipe multiple times, whether concurrently or 2271 * sequentially. 2272 */ 2273 KASSERT(xfer->ux_status != USBD_CANCELLED); 2274 2275 /* Only the timeout, which runs only once, can time it out. */ 2276 KASSERT(xfer->ux_status != USBD_TIMEOUT); 2277 2278 /* If anyone else beat us, we're done. */ 2279 if (xfer->ux_status != USBD_IN_PROGRESS) 2280 return; 2281 2282 /* We beat everyone else. Claim the status. */ 2283 xfer->ux_status = status; 2284 2285 /* 2286 * If we're dying, skip the hardware action and just notify the 2287 * software that we're done. 2288 */ 2289 if (sc->sc_dying) { 2290 DPRINTFN(4, "xfer %#jx dying %ju", (uintptr_t)xfer, 2291 xfer->ux_status, 0, 0); 2292 goto dying; 2293 } 2294 2295 /* 2296 * HC Step 1: Unless the endpoint is already halted, we set the endpoint 2297 * descriptor sKip bit and wait for hardware to complete processing. 2298 * 2299 * This includes ensuring that any TDs of the transfer that got onto 2300 * the done list are also removed. We ensure this by waiting for 2301 * both a WDH and SOF interrupt. 2302 */ 2303 DPRINTFN(1, "stop ed=%#jx", (uintptr_t)sed, 0, 0, 0); 2304 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2305 sizeof(sed->ed.ed_flags), 2306 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2307 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 2308 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2309 sizeof(sed->ed.ed_flags), 2310 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2311 2312 /* 2313 * HC Step 2: Wait until we know hardware has finished any possible 2314 * use of the xfer. 2315 */ 2316 /* Hardware finishes in 1ms */ 2317 usb_delay_ms_locked(opipe->pipe.up_dev->ud_bus, 20, &sc->sc_lock); 2318 2319 /* 2320 * HC Step 3: Remove any vestiges of the xfer from the hardware. 2321 * The complication here is that the hardware may have executed 2322 * beyond the xfer we're trying to abort. So as we're scanning 2323 * the TDs of this xfer we check if the hardware points to 2324 * any of them. 2325 */ 2326 p = xfer->ux_hcpriv; 2327 KASSERT(p); 2328 2329 #ifdef OHCI_DEBUG 2330 DPRINTF("--- dump start ---", 0, 0, 0, 0); 2331 2332 if (ohcidebug >= 2) { 2333 DPRINTF("sed:", 0, 0, 0, 0); 2334 ohci_dump_ed(sc, sed); 2335 ohci_dump_tds(sc, p); 2336 } 2337 DPRINTF("--- dump end ---", 0, 0, 0, 0); 2338 #endif 2339 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK; 2340 hit = 0; 2341 for (; p->xfer == xfer; p = n) { 2342 hit |= headp == p->physaddr; 2343 n = p->nexttd; 2344 ohci_hash_rem_td(sc, p); 2345 } 2346 /* Zap headp register if hardware pointed inside the xfer. */ 2347 if (hit) { 2348 DPRINTFN(1, "set hd=0x%08jx, tl=0x%08jx", (int)p->physaddr, 2349 (int)O32TOH(sed->ed.ed_tailp), 0, 0); 2350 sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */ 2351 usb_syncmem(&sed->dma, 2352 sed->offs + offsetof(ohci_ed_t, ed_headp), 2353 sizeof(sed->ed.ed_headp), 2354 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2355 } else { 2356 DPRINTFN(1, "no hit", 0, 0, 0, 0); 2357 } 2358 2359 /* 2360 * HC Step 4: Turn on hardware again. 2361 */ 2362 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2363 sizeof(sed->ed.ed_flags), 2364 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2365 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 2366 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 2367 sizeof(sed->ed.ed_flags), 2368 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2369 2370 /* 2371 * Final step: Notify completion to waiting xfers. 2372 */ 2373 dying: 2374 usb_transfer_complete(xfer); 2375 DPRINTFN(14, "end", 0, 0, 0, 0); 2376 2377 KASSERT(mutex_owned(&sc->sc_lock)); 2378 } 2379 2380 /* 2381 * Data structures and routines to emulate the root hub. 2382 */ 2383 Static int 2384 ohci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req, 2385 void *buf, int buflen) 2386 { 2387 ohci_softc_t *sc = OHCI_BUS2SC(bus); 2388 usb_port_status_t ps; 2389 uint16_t len, value, index; 2390 int l, totlen = 0; 2391 int port, i; 2392 uint32_t v; 2393 2394 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2395 2396 if (sc->sc_dying) 2397 return -1; 2398 2399 DPRINTFN(4, "type=0x%02jx request=%02jx", req->bmRequestType, 2400 req->bRequest, 0, 0); 2401 2402 len = UGETW(req->wLength); 2403 value = UGETW(req->wValue); 2404 index = UGETW(req->wIndex); 2405 2406 #define C(x,y) ((x) | ((y) << 8)) 2407 switch (C(req->bRequest, req->bmRequestType)) { 2408 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2409 DPRINTFN(8, "wValue=0x%04jx", value, 0, 0, 0); 2410 if (len == 0) 2411 break; 2412 switch (value) { 2413 #define sd ((usb_string_descriptor_t *)buf) 2414 case C(2, UDESC_STRING): 2415 /* Product */ 2416 totlen = usb_makestrdesc(sd, len, "OHCI root hub"); 2417 break; 2418 #undef sd 2419 default: 2420 /* default from usbroothub */ 2421 return buflen; 2422 } 2423 break; 2424 2425 /* Hub requests */ 2426 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2427 break; 2428 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2429 DPRINTFN(8, "UR_CLEAR_PORT_FEATURE port=%jd feature=%jd", 2430 index, value, 0, 0); 2431 if (index < 1 || index > sc->sc_noport) { 2432 return -1; 2433 } 2434 port = OHCI_RH_PORT_STATUS(index); 2435 switch(value) { 2436 case UHF_PORT_ENABLE: 2437 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2438 break; 2439 case UHF_PORT_SUSPEND: 2440 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2441 break; 2442 case UHF_PORT_POWER: 2443 /* Yes, writing to the LOW_SPEED bit clears power. */ 2444 OWRITE4(sc, port, UPS_LOW_SPEED); 2445 break; 2446 case UHF_C_PORT_CONNECTION: 2447 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2448 break; 2449 case UHF_C_PORT_ENABLE: 2450 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2451 break; 2452 case UHF_C_PORT_SUSPEND: 2453 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2454 break; 2455 case UHF_C_PORT_OVER_CURRENT: 2456 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2457 break; 2458 case UHF_C_PORT_RESET: 2459 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2460 break; 2461 default: 2462 return -1; 2463 } 2464 switch(value) { 2465 case UHF_C_PORT_CONNECTION: 2466 case UHF_C_PORT_ENABLE: 2467 case UHF_C_PORT_SUSPEND: 2468 case UHF_C_PORT_OVER_CURRENT: 2469 case UHF_C_PORT_RESET: 2470 /* Enable RHSC interrupt if condition is cleared. */ 2471 if ((OREAD4(sc, port) >> 16) == 0) 2472 ohci_rhsc_enable(sc); 2473 break; 2474 default: 2475 break; 2476 } 2477 break; 2478 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2479 if (len == 0) 2480 break; 2481 if ((value & 0xff) != 0) { 2482 return -1; 2483 } 2484 usb_hub_descriptor_t hubd; 2485 2486 totlen = uimin(buflen, sizeof(hubd)); 2487 memcpy(&hubd, buf, totlen); 2488 2489 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2490 hubd.bNbrPorts = sc->sc_noport; 2491 USETW(hubd.wHubCharacteristics, 2492 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2493 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2494 /* XXX overcurrent */ 2495 ); 2496 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2497 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2498 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2499 hubd.DeviceRemovable[i++] = (uint8_t)v; 2500 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2501 totlen = uimin(totlen, hubd.bDescLength); 2502 memcpy(buf, &hubd, totlen); 2503 break; 2504 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2505 if (len != 4) { 2506 return -1; 2507 } 2508 memset(buf, 0, len); /* ? XXX */ 2509 totlen = len; 2510 break; 2511 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2512 DPRINTFN(8, "get port status i=%jd", index, 0, 0, 0); 2513 if (index < 1 || index > sc->sc_noport) { 2514 return -1; 2515 } 2516 if (len != 4) { 2517 return -1; 2518 } 2519 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2520 DPRINTFN(8, "port status=0x%04jx", v, 0, 0, 0); 2521 USETW(ps.wPortStatus, v); 2522 USETW(ps.wPortChange, v >> 16); 2523 totlen = uimin(len, sizeof(ps)); 2524 memcpy(buf, &ps, totlen); 2525 break; 2526 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2527 return -1; 2528 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2529 break; 2530 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2531 if (index < 1 || index > sc->sc_noport) { 2532 return -1; 2533 } 2534 port = OHCI_RH_PORT_STATUS(index); 2535 switch(value) { 2536 case UHF_PORT_ENABLE: 2537 OWRITE4(sc, port, UPS_PORT_ENABLED); 2538 break; 2539 case UHF_PORT_SUSPEND: 2540 OWRITE4(sc, port, UPS_SUSPEND); 2541 break; 2542 case UHF_PORT_RESET: 2543 DPRINTFN(5, "reset port %jd", index, 0, 0, 0); 2544 OWRITE4(sc, port, UPS_RESET); 2545 for (i = 0; i < 5; i++) { 2546 usb_delay_ms(&sc->sc_bus, 2547 USB_PORT_ROOT_RESET_DELAY); 2548 if (sc->sc_dying) { 2549 return -1; 2550 } 2551 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2552 break; 2553 } 2554 DPRINTFN(8, "port %jd reset, status = 0x%04jx", index, 2555 OREAD4(sc, port), 0, 0); 2556 break; 2557 case UHF_PORT_POWER: 2558 DPRINTFN(2, "set port power %jd", index, 0, 0, 0); 2559 OWRITE4(sc, port, UPS_PORT_POWER); 2560 break; 2561 default: 2562 return -1; 2563 } 2564 break; 2565 default: 2566 /* default from usbroothub */ 2567 return buflen; 2568 } 2569 2570 return totlen; 2571 } 2572 2573 Static usbd_status 2574 ohci_root_intr_transfer(struct usbd_xfer *xfer) 2575 { 2576 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2577 usbd_status err; 2578 2579 /* Insert last in queue. */ 2580 mutex_enter(&sc->sc_lock); 2581 err = usb_insert_transfer(xfer); 2582 mutex_exit(&sc->sc_lock); 2583 if (err) 2584 return err; 2585 2586 /* Pipe isn't running, start first */ 2587 return ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2588 } 2589 2590 Static usbd_status 2591 ohci_root_intr_start(struct usbd_xfer *xfer) 2592 { 2593 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2594 2595 if (sc->sc_dying) 2596 return USBD_IOERROR; 2597 2598 mutex_enter(&sc->sc_lock); 2599 KASSERT(sc->sc_intrxfer == NULL); 2600 sc->sc_intrxfer = xfer; 2601 mutex_exit(&sc->sc_lock); 2602 2603 return USBD_IN_PROGRESS; 2604 } 2605 2606 /* Abort a root interrupt request. */ 2607 Static void 2608 ohci_root_intr_abort(struct usbd_xfer *xfer) 2609 { 2610 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 2611 2612 KASSERT(mutex_owned(&sc->sc_lock)); 2613 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 2614 2615 xfer->ux_status = USBD_CANCELLED; 2616 usb_transfer_complete(xfer); 2617 } 2618 2619 /* Close the root pipe. */ 2620 Static void 2621 ohci_root_intr_close(struct usbd_pipe *pipe) 2622 { 2623 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2624 2625 KASSERT(mutex_owned(&sc->sc_lock)); 2626 2627 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2628 2629 sc->sc_intrxfer = NULL; 2630 } 2631 2632 /************************/ 2633 2634 int 2635 ohci_device_ctrl_init(struct usbd_xfer *xfer) 2636 { 2637 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2638 usb_device_request_t *req = &xfer->ux_request; 2639 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2640 ohci_soft_td_t *stat, *setup; 2641 int isread = req->bmRequestType & UT_READ; 2642 int len = xfer->ux_bufsize; 2643 int err = ENOMEM; 2644 2645 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2646 2647 setup = ohci_alloc_std(sc); 2648 if (setup == NULL) { 2649 goto bad1; 2650 } 2651 stat = ohci_alloc_std(sc); 2652 if (stat == NULL) { 2653 goto bad2; 2654 } 2655 2656 ox->ox_setup = setup; 2657 ox->ox_stat = stat; 2658 ox->ox_nstd = 0; 2659 2660 /* Set up data transaction */ 2661 if (len != 0) { 2662 err = ohci_alloc_std_chain(sc, xfer, len, isread); 2663 if (err) { 2664 goto bad3; 2665 } 2666 } 2667 return 0; 2668 2669 bad3: 2670 ohci_free_std(sc, stat); 2671 bad2: 2672 ohci_free_std(sc, setup); 2673 bad1: 2674 return err; 2675 } 2676 2677 void 2678 ohci_device_ctrl_fini(struct usbd_xfer *xfer) 2679 { 2680 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2681 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2682 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2683 2684 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2685 DPRINTFN(8, "xfer %#jx nstd %jd", (uintptr_t)xfer, ox->ox_nstd, 0, 0); 2686 2687 mutex_enter(&sc->sc_lock); 2688 if (ox->ox_setup != opipe->tail.td) { 2689 ohci_free_std_locked(sc, ox->ox_setup); 2690 } 2691 for (size_t i = 0; i < ox->ox_nstd; i++) { 2692 ohci_soft_td_t *std = ox->ox_stds[i]; 2693 if (std == NULL) 2694 break; 2695 ohci_free_std_locked(sc, std); 2696 } 2697 ohci_free_std_locked(sc, ox->ox_stat); 2698 mutex_exit(&sc->sc_lock); 2699 2700 if (ox->ox_nstd) { 2701 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 2702 kmem_free(ox->ox_stds, sz); 2703 } 2704 } 2705 2706 Static usbd_status 2707 ohci_device_ctrl_transfer(struct usbd_xfer *xfer) 2708 { 2709 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2710 usbd_status err; 2711 2712 /* Insert last in queue. */ 2713 mutex_enter(&sc->sc_lock); 2714 err = usb_insert_transfer(xfer); 2715 mutex_exit(&sc->sc_lock); 2716 if (err) 2717 return err; 2718 2719 /* Pipe isn't running, start first */ 2720 return ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2721 } 2722 2723 Static usbd_status 2724 ohci_device_ctrl_start(struct usbd_xfer *xfer) 2725 { 2726 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2727 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2728 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2729 usb_device_request_t *req = &xfer->ux_request; 2730 struct usbd_device *dev __diagused = opipe->pipe.up_dev; 2731 ohci_soft_td_t *setup, *stat, *next, *tail; 2732 ohci_soft_ed_t *sed; 2733 int isread; 2734 int len; 2735 2736 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2737 2738 if (sc->sc_dying) 2739 return USBD_IOERROR; 2740 2741 KASSERT(xfer->ux_rqflags & URQ_REQUEST); 2742 2743 isread = req->bmRequestType & UT_READ; 2744 len = UGETW(req->wLength); 2745 2746 DPRINTF("xfer=%#jx len=%jd, addr=%jd, endpt=%jd", (uintptr_t)xfer, len, 2747 dev->ud_addr, opipe->pipe.up_endpoint->ue_edesc->bEndpointAddress); 2748 DPRINTF("type=0x%02jx, request=0x%02jx, wValue=0x%04jx, wIndex=0x%04jx", 2749 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2750 UGETW(req->wIndex)); 2751 2752 /* Need to take lock here for pipe->tail.td */ 2753 mutex_enter(&sc->sc_lock); 2754 2755 /* 2756 * Use the pipe "tail" TD as our first and loan our first TD to the 2757 * next transfer 2758 */ 2759 setup = opipe->tail.td; 2760 opipe->tail.td = ox->ox_setup; 2761 ox->ox_setup = setup; 2762 2763 stat = ox->ox_stat; 2764 2765 /* point at sentinel */ 2766 tail = opipe->tail.td; 2767 sed = opipe->sed; 2768 2769 KASSERTMSG(OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)) == dev->ud_addr, 2770 "address ED %d pipe %d\n", 2771 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), dev->ud_addr); 2772 KASSERTMSG(OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)) == 2773 UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize), 2774 "MPL ED %d pipe %d\n", 2775 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), 2776 UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize)); 2777 2778 /* next will point to data if len != 0 */ 2779 next = stat; 2780 2781 /* Set up data transaction */ 2782 if (len != 0) { 2783 ohci_soft_td_t *std; 2784 ohci_soft_td_t *end; 2785 2786 next = ox->ox_stds[0]; 2787 ohci_reset_std_chain(sc, xfer, len, isread, next, &end); 2788 2789 end->td.td_nexttd = HTOO32(stat->physaddr); 2790 end->nexttd = stat; 2791 2792 usb_syncmem(&end->dma, end->offs, sizeof(end->td), 2793 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2794 2795 usb_syncmem(&xfer->ux_dmabuf, 0, len, 2796 isread ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2797 std = ox->ox_stds[0]; 2798 /* Start toggle at 1 and then use the carried toggle. */ 2799 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK); 2800 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1); 2801 usb_syncmem(&std->dma, 2802 std->offs + offsetof(ohci_td_t, td_flags), 2803 sizeof(std->td.td_flags), 2804 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2805 } 2806 2807 DPRINTFN(8, "setup %#jx data %#jx stat %#jx tail %#jx", 2808 (uintptr_t)setup, 2809 (uintptr_t)(len != 0 ? ox->ox_stds[0] : NULL), (uintptr_t)stat, 2810 (uintptr_t)tail); 2811 KASSERT(opipe->tail.td == tail); 2812 2813 memcpy(KERNADDR(&opipe->ctrl.reqdma, 0), req, sizeof(*req)); 2814 usb_syncmem(&opipe->ctrl.reqdma, 0, sizeof(*req), BUS_DMASYNC_PREWRITE); 2815 2816 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC | 2817 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 2818 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->ctrl.reqdma, 0)); 2819 setup->td.td_nexttd = HTOO32(next->physaddr); 2820 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof(*req) - 1); 2821 setup->nexttd = next; 2822 setup->len = 0; 2823 setup->xfer = xfer; 2824 setup->flags = 0; 2825 ohci_hash_add_td(sc, setup); 2826 2827 xfer->ux_hcpriv = setup; 2828 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 2829 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2830 2831 stat->td.td_flags = HTOO32( 2832 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 2833 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 2834 stat->td.td_cbp = 0; 2835 stat->td.td_nexttd = HTOO32(tail->physaddr); 2836 stat->td.td_be = 0; 2837 stat->nexttd = tail; 2838 stat->flags = OHCI_CALL_DONE; 2839 stat->len = 0; 2840 stat->xfer = xfer; 2841 ohci_hash_add_td(sc, stat); 2842 2843 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 2844 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2845 2846 memset(&tail->td, 0, sizeof(tail->td)); 2847 tail->nexttd = NULL; 2848 tail->xfer = NULL; 2849 2850 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 2851 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2852 2853 #ifdef OHCI_DEBUG 2854 USBHIST_LOGN(ohcidebug, 5, "--- dump start ---", 0, 0, 0, 0); 2855 if (ohcidebug >= 5) { 2856 ohci_dump_ed(sc, sed); 2857 ohci_dump_tds(sc, setup); 2858 } 2859 USBHIST_LOGN(ohcidebug, 5, "--- dump end ---", 0, 0, 0, 0); 2860 #endif 2861 2862 /* Insert ED in schedule */ 2863 sed->ed.ed_tailp = HTOO32(tail->physaddr); 2864 usb_syncmem(&sed->dma, 2865 sed->offs + offsetof(ohci_ed_t, ed_tailp), 2866 sizeof(sed->ed.ed_tailp), 2867 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2868 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 2869 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 2870 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 2871 ohci_timeout, xfer); 2872 } 2873 2874 DPRINTF("done", 0, 0, 0, 0); 2875 2876 xfer->ux_status = USBD_IN_PROGRESS; 2877 mutex_exit(&sc->sc_lock); 2878 2879 return USBD_IN_PROGRESS; 2880 } 2881 2882 /* Abort a device control request. */ 2883 Static void 2884 ohci_device_ctrl_abort(struct usbd_xfer *xfer) 2885 { 2886 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 2887 2888 KASSERT(mutex_owned(&sc->sc_lock)); 2889 2890 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2891 DPRINTF("xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 2892 ohci_abort_xfer(xfer, USBD_CANCELLED); 2893 } 2894 2895 /* Close a device control pipe. */ 2896 Static void 2897 ohci_device_ctrl_close(struct usbd_pipe *pipe) 2898 { 2899 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2900 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2901 2902 KASSERT(mutex_owned(&sc->sc_lock)); 2903 2904 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2905 DPRINTF("pipe=%#jx", (uintptr_t)pipe, 0, 0, 0); 2906 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2907 ohci_free_std_locked(sc, opipe->tail.td); 2908 } 2909 2910 /************************/ 2911 2912 Static void 2913 ohci_device_clear_toggle(struct usbd_pipe *pipe) 2914 { 2915 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 2916 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 2917 2918 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY); 2919 } 2920 2921 Static void 2922 ohci_noop(struct usbd_pipe *pipe) 2923 { 2924 } 2925 2926 Static int 2927 ohci_device_bulk_init(struct usbd_xfer *xfer) 2928 { 2929 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2930 int len = xfer->ux_bufsize; 2931 int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 2932 int isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2933 int err; 2934 2935 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2936 2937 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 2938 2939 DPRINTFN(4, "xfer=%#jx len=%jd isread=%jd flags=%jd", (uintptr_t)xfer, 2940 len, isread, xfer->ux_flags); 2941 DPRINTFN(4, "endpt=%jd", endpt, 0, 0, 0); 2942 2943 /* Allocate a chain of new TDs (including a new tail). */ 2944 err = ohci_alloc_std_chain(sc, xfer, len, isread); 2945 if (err) 2946 return err; 2947 2948 return 0; 2949 } 2950 2951 Static void 2952 ohci_device_bulk_fini(struct usbd_xfer *xfer) 2953 { 2954 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2955 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2956 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2957 2958 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 2959 DPRINTFN(8, "xfer %#jx nstd %jd", (uintptr_t)xfer, ox->ox_nstd, 0, 0); 2960 2961 mutex_enter(&sc->sc_lock); 2962 for (size_t i = 0; i < ox->ox_nstd; i++) { 2963 ohci_soft_td_t *std = ox->ox_stds[i]; 2964 if (std == NULL) 2965 break; 2966 if (std != opipe->tail.td) 2967 ohci_free_std_locked(sc, std); 2968 } 2969 mutex_exit(&sc->sc_lock); 2970 2971 if (ox->ox_nstd) { 2972 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 2973 kmem_free(ox->ox_stds, sz); 2974 } 2975 } 2976 2977 Static usbd_status 2978 ohci_device_bulk_transfer(struct usbd_xfer *xfer) 2979 { 2980 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 2981 usbd_status err; 2982 2983 /* Insert last in queue. */ 2984 mutex_enter(&sc->sc_lock); 2985 err = usb_insert_transfer(xfer); 2986 mutex_exit(&sc->sc_lock); 2987 if (err) 2988 return err; 2989 2990 /* Pipe isn't running, start first */ 2991 return ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 2992 } 2993 2994 Static usbd_status 2995 ohci_device_bulk_start(struct usbd_xfer *xfer) 2996 { 2997 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 2998 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 2999 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3000 ohci_soft_td_t *last; 3001 ohci_soft_td_t *data, *tail, *tdp; 3002 ohci_soft_ed_t *sed; 3003 int len, isread, endpt; 3004 3005 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3006 3007 if (sc->sc_dying) 3008 return USBD_IOERROR; 3009 3010 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3011 3012 len = xfer->ux_length; 3013 endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 3014 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3015 sed = opipe->sed; 3016 3017 DPRINTFN(4, "xfer=%#jx len=%jd isread=%jd flags=%jd", (uintptr_t)xfer, 3018 len, isread, xfer->ux_flags); 3019 DPRINTFN(4, "endpt=%jd", endpt, 0, 0, 0); 3020 3021 mutex_enter(&sc->sc_lock); 3022 3023 /* 3024 * Use the pipe "tail" TD as our first and loan our first TD to the 3025 * next transfer 3026 */ 3027 data = opipe->tail.td; 3028 opipe->tail.td = ox->ox_stds[0]; 3029 ox->ox_stds[0] = data; 3030 ohci_reset_std_chain(sc, xfer, len, isread, data, &last); 3031 3032 /* point at sentinel */ 3033 tail = opipe->tail.td; 3034 memset(&tail->td, 0, sizeof(tail->td)); 3035 tail->nexttd = NULL; 3036 tail->xfer = NULL; 3037 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 3038 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3039 xfer->ux_hcpriv = data; 3040 3041 DPRINTFN(8, "xfer %#jx data %#jx tail %#jx", (uintptr_t)xfer, 3042 (uintptr_t)ox->ox_stds[0], (uintptr_t)tail, 0); 3043 KASSERT(opipe->tail.td == tail); 3044 3045 /* We want interrupt at the end of the transfer. */ 3046 last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3047 last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3048 last->td.td_nexttd = HTOO32(tail->physaddr); 3049 last->nexttd = tail; 3050 last->flags |= OHCI_CALL_DONE; 3051 usb_syncmem(&last->dma, last->offs, sizeof(last->td), 3052 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3053 3054 DPRINTFN(4, "ed_flags=0x%08jx td_flags=0x%08jx " 3055 "td_cbp=0x%08jx td_be=0x%08jx", 3056 (int)O32TOH(sed->ed.ed_flags), 3057 (int)O32TOH(data->td.td_flags), 3058 (int)O32TOH(data->td.td_cbp), 3059 (int)O32TOH(data->td.td_be)); 3060 3061 #ifdef OHCI_DEBUG 3062 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 3063 if (ohcidebug >= 5) { 3064 ohci_dump_ed(sc, sed); 3065 ohci_dump_tds(sc, data); 3066 } 3067 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 3068 #endif 3069 3070 /* Insert ED in schedule */ 3071 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 3072 KASSERT(tdp->xfer == xfer); 3073 } 3074 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3075 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3076 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3077 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3078 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3079 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3080 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 3081 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) { 3082 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout), 3083 ohci_timeout, xfer); 3084 } 3085 3086 xfer->ux_status = USBD_IN_PROGRESS; 3087 mutex_exit(&sc->sc_lock); 3088 3089 return USBD_IN_PROGRESS; 3090 } 3091 3092 Static void 3093 ohci_device_bulk_abort(struct usbd_xfer *xfer) 3094 { 3095 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 3096 3097 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3098 3099 KASSERT(mutex_owned(&sc->sc_lock)); 3100 3101 DPRINTF("xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 3102 ohci_abort_xfer(xfer, USBD_CANCELLED); 3103 } 3104 3105 /* 3106 * Close a device bulk pipe. 3107 */ 3108 Static void 3109 ohci_device_bulk_close(struct usbd_pipe *pipe) 3110 { 3111 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3112 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3113 3114 KASSERT(mutex_owned(&sc->sc_lock)); 3115 3116 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3117 3118 DPRINTF("pipe=%#jx", (uintptr_t)pipe, 0, 0, 0); 3119 ohci_close_pipe(pipe, sc->sc_bulk_head); 3120 ohci_free_std_locked(sc, opipe->tail.td); 3121 } 3122 3123 /************************/ 3124 3125 Static int 3126 ohci_device_intr_init(struct usbd_xfer *xfer) 3127 { 3128 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3129 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3130 int len = xfer->ux_bufsize; 3131 int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 3132 int isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3133 int err; 3134 3135 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3136 3137 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3138 KASSERT(len != 0); 3139 3140 DPRINTFN(4, "xfer=%#jx len=%jd isread=%jd flags=%jd", (uintptr_t)xfer, 3141 len, isread, xfer->ux_flags); 3142 DPRINTFN(4, "endpt=%jd", endpt, 0, 0, 0); 3143 3144 ox->ox_nstd = 0; 3145 3146 err = ohci_alloc_std_chain(sc, xfer, len, isread); 3147 if (err) { 3148 return err; 3149 } 3150 3151 return 0; 3152 } 3153 3154 Static void 3155 ohci_device_intr_fini(struct usbd_xfer *xfer) 3156 { 3157 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3158 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3159 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3160 3161 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3162 DPRINTFN(8, "xfer %#jx nstd %jd", (uintptr_t)xfer, ox->ox_nstd, 0, 0); 3163 3164 mutex_enter(&sc->sc_lock); 3165 for (size_t i = 0; i < ox->ox_nstd; i++) { 3166 ohci_soft_td_t *std = ox->ox_stds[i]; 3167 if (std != NULL) 3168 break; 3169 if (std != opipe->tail.td) 3170 ohci_free_std_locked(sc, std); 3171 } 3172 mutex_exit(&sc->sc_lock); 3173 3174 if (ox->ox_nstd) { 3175 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd; 3176 kmem_free(ox->ox_stds, sz); 3177 } 3178 } 3179 3180 Static usbd_status 3181 ohci_device_intr_transfer(struct usbd_xfer *xfer) 3182 { 3183 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3184 usbd_status err; 3185 3186 /* Insert last in queue. */ 3187 mutex_enter(&sc->sc_lock); 3188 err = usb_insert_transfer(xfer); 3189 mutex_exit(&sc->sc_lock); 3190 if (err) 3191 return err; 3192 3193 /* Pipe isn't running, start first */ 3194 return ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)); 3195 } 3196 3197 Static usbd_status 3198 ohci_device_intr_start(struct usbd_xfer *xfer) 3199 { 3200 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3201 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3202 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3203 ohci_soft_ed_t *sed = opipe->sed; 3204 ohci_soft_td_t *data, *last, *tail; 3205 int len, isread, endpt; 3206 3207 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3208 3209 if (sc->sc_dying) 3210 return USBD_IOERROR; 3211 3212 DPRINTFN(3, "xfer=%#jx len=%jd flags=%jd priv=%#jx", (uintptr_t)xfer, 3213 xfer->ux_length, xfer->ux_flags, (uintptr_t)xfer->ux_priv); 3214 3215 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST)); 3216 3217 len = xfer->ux_length; 3218 endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress; 3219 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3220 3221 mutex_enter(&sc->sc_lock); 3222 3223 /* 3224 * Use the pipe "tail" TD as our first and loan our first TD to the 3225 * next transfer. 3226 */ 3227 data = opipe->tail.td; 3228 opipe->tail.td = ox->ox_stds[0]; 3229 ox->ox_stds[0] = data; 3230 ohci_reset_std_chain(sc, xfer, len, isread, data, &last); 3231 3232 /* point at sentinel */ 3233 tail = opipe->tail.td; 3234 memset(&tail->td, 0, sizeof(tail->td)); 3235 tail->nexttd = NULL; 3236 tail->xfer = NULL; 3237 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td), 3238 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3239 xfer->ux_hcpriv = data; 3240 3241 DPRINTFN(8, "data %#jx tail %#jx", (uintptr_t)ox->ox_stds[0], 3242 (uintptr_t)tail, 0, 0); 3243 KASSERT(opipe->tail.td == tail); 3244 3245 /* We want interrupt at the end of the transfer. */ 3246 last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK); 3247 last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1)); 3248 3249 last->td.td_nexttd = HTOO32(tail->physaddr); 3250 last->nexttd = tail; 3251 last->flags |= OHCI_CALL_DONE; 3252 usb_syncmem(&last->dma, last->offs, sizeof(last->td), 3253 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3254 3255 #ifdef OHCI_DEBUG 3256 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0); 3257 if (ohcidebug >= 5) { 3258 ohci_dump_ed(sc, sed); 3259 ohci_dump_tds(sc, data); 3260 } 3261 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0); 3262 #endif 3263 3264 /* Insert ED in schedule */ 3265 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3266 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3267 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3268 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3269 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3270 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3271 3272 xfer->ux_status = USBD_IN_PROGRESS; 3273 mutex_exit(&sc->sc_lock); 3274 3275 return USBD_IN_PROGRESS; 3276 } 3277 3278 /* Abort a device interrupt request. */ 3279 Static void 3280 ohci_device_intr_abort(struct usbd_xfer *xfer) 3281 { 3282 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer); 3283 3284 KASSERT(mutex_owned(&sc->sc_lock)); 3285 KASSERT(xfer->ux_pipe->up_intrxfer == xfer); 3286 3287 ohci_abort_xfer(xfer, USBD_CANCELLED); 3288 } 3289 3290 /* Close a device interrupt pipe. */ 3291 Static void 3292 ohci_device_intr_close(struct usbd_pipe *pipe) 3293 { 3294 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3295 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3296 int nslots = opipe->intr.nslots; 3297 int pos = opipe->intr.pos; 3298 int j; 3299 ohci_soft_ed_t *p, *sed = opipe->sed; 3300 3301 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3302 3303 KASSERT(mutex_owned(&sc->sc_lock)); 3304 3305 DPRINTFN(1, "pipe=%#jx nslots=%jd pos=%jd", (uintptr_t)pipe, nslots, 3306 pos, 0); 3307 usb_syncmem(&sed->dma, sed->offs, 3308 sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3309 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); 3310 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3311 sizeof(sed->ed.ed_flags), 3312 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3313 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3314 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) 3315 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock); 3316 3317 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3318 continue; 3319 KASSERT(p); 3320 p->next = sed->next; 3321 p->ed.ed_nexted = sed->ed.ed_nexted; 3322 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted), 3323 sizeof(p->ed.ed_nexted), 3324 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3325 3326 for (j = 0; j < nslots; j++) 3327 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3328 3329 ohci_free_std_locked(sc, opipe->tail.td); 3330 ohci_free_sed_locked(sc, opipe->sed); 3331 } 3332 3333 Static usbd_status 3334 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3335 { 3336 int i, j, best; 3337 u_int npoll, slow, shigh, nslots; 3338 u_int bestbw, bw; 3339 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3340 3341 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3342 3343 DPRINTFN(2, "pipe=%#jx", (uintptr_t)opipe, 0, 0, 0); 3344 if (ival == 0) { 3345 printf("ohci_setintr: 0 interval\n"); 3346 return USBD_INVAL; 3347 } 3348 3349 npoll = OHCI_NO_INTRS; 3350 while (npoll > ival) 3351 npoll /= 2; 3352 DPRINTFN(2, "ival=%jd npoll=%jd", ival, npoll, 0, 0); 3353 3354 /* 3355 * We now know which level in the tree the ED must go into. 3356 * Figure out which slot has most bandwidth left over. 3357 * Slots to examine: 3358 * npoll 3359 * 1 0 3360 * 2 1 2 3361 * 4 3 4 5 6 3362 * 8 7 8 9 10 11 12 13 14 3363 * N (N-1) .. (N-1+N-1) 3364 */ 3365 slow = npoll-1; 3366 shigh = slow + npoll; 3367 nslots = OHCI_NO_INTRS / npoll; 3368 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3369 bw = 0; 3370 for (j = 0; j < nslots; j++) 3371 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3372 if (bw < bestbw) { 3373 best = i; 3374 bestbw = bw; 3375 } 3376 } 3377 DPRINTFN(2, "best=%jd(%jd..%jd) bestbw=%jd", best, slow, shigh, bestbw); 3378 3379 mutex_enter(&sc->sc_lock); 3380 hsed = sc->sc_eds[best]; 3381 sed->next = hsed->next; 3382 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3383 sizeof(hsed->ed.ed_flags), 3384 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3385 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3386 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3387 sizeof(sed->ed.ed_flags), 3388 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3389 hsed->next = sed; 3390 hsed->ed.ed_nexted = HTOO32(sed->physaddr); 3391 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags), 3392 sizeof(hsed->ed.ed_flags), 3393 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3394 mutex_exit(&sc->sc_lock); 3395 3396 for (j = 0; j < nslots; j++) 3397 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3398 opipe->intr.nslots = nslots; 3399 opipe->intr.pos = best; 3400 3401 DPRINTFN(5, "returns %#jx", (uintptr_t)opipe, 0, 0, 0); 3402 return USBD_NORMAL_COMPLETION; 3403 } 3404 3405 /***********************/ 3406 3407 Static int 3408 ohci_device_isoc_init(struct usbd_xfer *xfer) 3409 { 3410 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3411 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3412 ohci_soft_itd_t *sitd; 3413 size_t i; 3414 int err; 3415 3416 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3417 3418 DPRINTFN(1, "xfer %#jx len %jd flags %jd", (uintptr_t)xfer, 3419 xfer->ux_length, xfer->ux_flags, 0); 3420 3421 const size_t nfsitd = 3422 (xfer->ux_nframes + OHCI_ITD_NOFFSET - 1) / OHCI_ITD_NOFFSET; 3423 const size_t nbsitd = xfer->ux_bufsize / OHCI_PAGE_SIZE; 3424 const size_t nsitd = MAX(nfsitd, nbsitd) + 1; 3425 3426 ox->ox_sitds = kmem_zalloc(sizeof(ohci_soft_itd_t *) * nsitd, 3427 KM_SLEEP); 3428 ox->ox_nsitd = nsitd; 3429 3430 for (i = 0; i < nsitd; i++) { 3431 /* Allocate next ITD */ 3432 sitd = ohci_alloc_sitd(sc); 3433 if (sitd == NULL) { 3434 err = ENOMEM; 3435 goto fail; 3436 } 3437 ox->ox_sitds[i] = sitd; 3438 sitd->xfer = xfer; 3439 sitd->flags = 0; 3440 } 3441 3442 return 0; 3443 fail: 3444 for (; i > 0;) { 3445 ohci_free_sitd(sc, ox->ox_sitds[--i]); 3446 } 3447 return err; 3448 } 3449 3450 Static void 3451 ohci_device_isoc_fini(struct usbd_xfer *xfer) 3452 { 3453 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3454 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3455 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3456 3457 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3458 3459 mutex_enter(&sc->sc_lock); 3460 for (size_t i = 0; i < ox->ox_nsitd; i++) { 3461 if (ox->ox_sitds[i] != opipe->tail.itd) { 3462 ohci_free_sitd_locked(sc, ox->ox_sitds[i]); 3463 } 3464 } 3465 mutex_exit(&sc->sc_lock); 3466 3467 if (ox->ox_nsitd) { 3468 const size_t sz = sizeof(ohci_soft_itd_t *) * ox->ox_nsitd; 3469 kmem_free(ox->ox_sitds, sz); 3470 } 3471 } 3472 3473 3474 usbd_status 3475 ohci_device_isoc_transfer(struct usbd_xfer *xfer) 3476 { 3477 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3478 usbd_status __diagused err; 3479 3480 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3481 3482 DPRINTFN(5, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 3483 3484 /* Put it on our queue, */ 3485 mutex_enter(&sc->sc_lock); 3486 err = usb_insert_transfer(xfer); 3487 mutex_exit(&sc->sc_lock); 3488 3489 KASSERT(err == USBD_NORMAL_COMPLETION); 3490 3491 /* insert into schedule, */ 3492 ohci_device_isoc_enter(xfer); 3493 3494 /* and start if the pipe wasn't running */ 3495 return USBD_IN_PROGRESS; 3496 } 3497 3498 void 3499 ohci_device_isoc_enter(struct usbd_xfer *xfer) 3500 { 3501 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer); 3502 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3503 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3504 ohci_soft_ed_t *sed = opipe->sed; 3505 ohci_soft_itd_t *sitd, *nsitd, *tail; 3506 ohci_physaddr_t buf, offs, noffs, bp0; 3507 int i, ncur, nframes; 3508 3509 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3510 DPRINTFN(5, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 3511 3512 mutex_enter(&sc->sc_lock); 3513 3514 if (sc->sc_dying) { 3515 mutex_exit(&sc->sc_lock); 3516 return; 3517 } 3518 3519 struct isoc *isoc = &opipe->isoc; 3520 3521 DPRINTFN(1, "used=%jd next=%jd xfer=%#jx nframes=%jd", 3522 isoc->inuse, isoc->next, (uintptr_t)xfer, xfer->ux_nframes); 3523 3524 if (isoc->next == -1) { 3525 /* Not in use yet, schedule it a few frames ahead. */ 3526 isoc->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5; 3527 DPRINTFN(2,"start next=%jd", isoc->next, 0, 0, 0); 3528 } 3529 3530 sitd = opipe->tail.itd; 3531 opipe->tail.itd = ox->ox_sitds[0]; 3532 ox->ox_sitds[0] = sitd; 3533 3534 buf = DMAADDR(&xfer->ux_dmabuf, 0); 3535 bp0 = OHCI_PAGE(buf); 3536 offs = OHCI_PAGE_OFFSET(buf); 3537 nframes = xfer->ux_nframes; 3538 xfer->ux_hcpriv = sitd; 3539 size_t j = 1; 3540 for (i = ncur = 0; i < nframes; i++, ncur++) { 3541 noffs = offs + xfer->ux_frlengths[i]; 3542 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3543 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3544 3545 /* Allocate next ITD */ 3546 nsitd = ox->ox_sitds[j++]; 3547 KASSERT(nsitd != NULL); 3548 KASSERT(j < ox->ox_nsitd); 3549 3550 /* Fill current ITD */ 3551 sitd->itd.itd_flags = HTOO32( 3552 OHCI_ITD_NOCC | 3553 OHCI_ITD_SET_SF(isoc->next) | 3554 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3555 OHCI_ITD_SET_FC(ncur)); 3556 sitd->itd.itd_bp0 = HTOO32(bp0); 3557 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr); 3558 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3559 sitd->nextitd = nsitd; 3560 sitd->xfer = xfer; 3561 sitd->flags = 0; 3562 #ifdef DIAGNOSTIC 3563 sitd->isdone = false; 3564 #endif 3565 ohci_hash_add_itd(sc, sitd); 3566 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3567 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3568 3569 sitd = nsitd; 3570 isoc->next = isoc->next + ncur; 3571 bp0 = OHCI_PAGE(buf + offs); 3572 ncur = 0; 3573 } 3574 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs)); 3575 /* XXX Sync */ 3576 offs = noffs; 3577 } 3578 KASSERT(j <= ox->ox_nsitd); 3579 3580 /* point at sentinel */ 3581 tail = opipe->tail.itd; 3582 memset(&tail->itd, 0, sizeof(tail->itd)); 3583 tail->nextitd = NULL; 3584 tail->xfer = NULL; 3585 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->itd), 3586 BUS_DMASYNC_PREWRITE); 3587 3588 /* Fixup last used ITD */ 3589 sitd->itd.itd_flags = HTOO32( 3590 OHCI_ITD_NOCC | 3591 OHCI_ITD_SET_SF(isoc->next) | 3592 OHCI_ITD_SET_DI(0) | 3593 OHCI_ITD_SET_FC(ncur)); 3594 sitd->itd.itd_bp0 = HTOO32(bp0); 3595 sitd->itd.itd_nextitd = HTOO32(tail->physaddr); 3596 sitd->itd.itd_be = HTOO32(bp0 + offs - 1); 3597 sitd->nextitd = tail; 3598 sitd->xfer = xfer; 3599 sitd->flags = OHCI_CALL_DONE; 3600 #ifdef DIAGNOSTIC 3601 sitd->isdone = false; 3602 #endif 3603 ohci_hash_add_itd(sc, sitd); 3604 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd), 3605 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3606 3607 isoc->next = isoc->next + ncur; 3608 isoc->inuse += nframes; 3609 3610 /* XXX pretend we did it all */ 3611 xfer->ux_actlen = offs; 3612 xfer->ux_status = USBD_IN_PROGRESS; 3613 3614 #ifdef OHCI_DEBUG 3615 if (ohcidebug >= 5) { 3616 DPRINTF("frame=%jd", O32TOH(sc->sc_hcca->hcca_frame_number), 3617 0, 0, 0); 3618 ohci_dump_itds(sc, xfer->ux_hcpriv); 3619 ohci_dump_ed(sc, sed); 3620 } 3621 #endif 3622 3623 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3624 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3625 sed->ed.ed_tailp = HTOO32(tail->physaddr); 3626 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); 3627 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3628 sizeof(sed->ed.ed_flags), 3629 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3630 mutex_exit(&sc->sc_lock); 3631 } 3632 3633 void 3634 ohci_device_isoc_abort(struct usbd_xfer *xfer) 3635 { 3636 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe); 3637 ohci_softc_t *sc = OHCI_XFER2SC(xfer); 3638 ohci_soft_ed_t *sed; 3639 ohci_soft_itd_t *sitd; 3640 3641 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3642 DPRINTFN(1, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 3643 3644 KASSERT(mutex_owned(&sc->sc_lock)); 3645 3646 /* Transfer is already done. */ 3647 if (xfer->ux_status != USBD_NOT_STARTED && 3648 xfer->ux_status != USBD_IN_PROGRESS) { 3649 printf("ohci_device_isoc_abort: early return\n"); 3650 goto done; 3651 } 3652 3653 /* Give xfer the requested abort code. */ 3654 xfer->ux_status = USBD_CANCELLED; 3655 3656 sed = opipe->sed; 3657 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3658 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3659 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */ 3660 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags), 3661 sizeof(sed->ed.ed_flags), 3662 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3663 3664 sitd = xfer->ux_hcpriv; 3665 KASSERT(sitd); 3666 3667 usb_delay_ms_locked(&sc->sc_bus, OHCI_ITD_NOFFSET, &sc->sc_lock); 3668 3669 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3670 ohci_hash_rem_itd(sc, sitd); 3671 #ifdef DIAGNOSTIC 3672 DPRINTFN(1, "abort sets done sitd=%#jx", (uintptr_t)sitd, 3673 0, 0, 0); 3674 sitd->isdone = true; 3675 #endif 3676 } 3677 3678 /* Run callback. */ 3679 usb_transfer_complete(xfer); 3680 3681 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */ 3682 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */ 3683 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed), 3684 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3685 3686 done: 3687 KASSERT(mutex_owned(&sc->sc_lock)); 3688 } 3689 3690 void 3691 ohci_device_isoc_done(struct usbd_xfer *xfer) 3692 { 3693 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3694 DPRINTFN(1, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0); 3695 } 3696 3697 usbd_status 3698 ohci_setup_isoc(struct usbd_pipe *pipe) 3699 { 3700 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3701 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3702 struct isoc *isoc = &opipe->isoc; 3703 3704 isoc->next = -1; 3705 isoc->inuse = 0; 3706 3707 mutex_enter(&sc->sc_lock); 3708 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head); 3709 mutex_exit(&sc->sc_lock); 3710 3711 return USBD_NORMAL_COMPLETION; 3712 } 3713 3714 void 3715 ohci_device_isoc_close(struct usbd_pipe *pipe) 3716 { 3717 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe); 3718 ohci_softc_t *sc = OHCI_PIPE2SC(pipe); 3719 3720 KASSERT(mutex_owned(&sc->sc_lock)); 3721 3722 OHCIHIST_FUNC(); OHCIHIST_CALLED(); 3723 DPRINTF("pipe=%#jx", (uintptr_t)pipe, 0, 0, 0); 3724 ohci_close_pipe(pipe, sc->sc_isoc_head); 3725 #ifdef DIAGNOSTIC 3726 opipe->tail.itd->isdone = true; 3727 #endif 3728 ohci_free_sitd_locked(sc, opipe->tail.itd); 3729 } 3730
Indexes created Wed Sep 24 22:09:59 GMT 2025