ohci.c revision 1.289.4.4 1 /* $NetBSD: ohci.c,v 1.289.4.4 2020/02/25 18:50:29 martin Exp $ */
2
3 /*
4 * Copyright (c) 1998, 2004, 2005, 2012 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Lennart Augustsson (lennart (at) augustsson.net) at
9 * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca)
10 * and Matthew R. Green (mrg (at) eterna.com.au).
11 * This code is derived from software contributed to The NetBSD Foundation
12 * by Charles M. Hannum.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the distribution.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 * POSSIBILITY OF SUCH DAMAGE.
34 */
35
36 /*
37 * USB Open Host Controller driver.
38 *
39 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
40 * USB spec: http://www.usb.org/developers/docs/
41 */
42
43 #include <sys/cdefs.h>
44 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.289.4.4 2020/02/25 18:50:29 martin Exp $");
45
46 #ifdef _KERNEL_OPT
47 #include "opt_usb.h"
48 #endif
49
50 #include <sys/param.h>
51
52 #include <sys/cpu.h>
53 #include <sys/device.h>
54 #include <sys/kernel.h>
55 #include <sys/kmem.h>
56 #include <sys/proc.h>
57 #include <sys/queue.h>
58 #include <sys/select.h>
59 #include <sys/sysctl.h>
60 #include <sys/systm.h>
61
62 #include <machine/endian.h>
63
64 #include <dev/usb/usb.h>
65 #include <dev/usb/usbdi.h>
66 #include <dev/usb/usbdivar.h>
67 #include <dev/usb/usb_mem.h>
68 #include <dev/usb/usb_quirks.h>
69
70 #include <dev/usb/ohcireg.h>
71 #include <dev/usb/ohcivar.h>
72 #include <dev/usb/usbroothub.h>
73 #include <dev/usb/usbhist.h>
74
75 #ifdef USB_DEBUG
76 #ifndef OHCI_DEBUG
77 #define ohcidebug 0
78 #else
79 static int ohcidebug = 10;
80
81 SYSCTL_SETUP(sysctl_hw_ohci_setup, "sysctl hw.ohci setup")
82 {
83 int err;
84 const struct sysctlnode *rnode;
85 const struct sysctlnode *cnode;
86
87 err = sysctl_createv(clog, 0, NULL, &rnode,
88 CTLFLAG_PERMANENT, CTLTYPE_NODE, "ohci",
89 SYSCTL_DESCR("ohci global controls"),
90 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL);
91
92 if (err)
93 goto fail;
94
95 /* control debugging printfs */
96 err = sysctl_createv(clog, 0, &rnode, &cnode,
97 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT,
98 "debug", SYSCTL_DESCR("Enable debugging output"),
99 NULL, 0, &ohcidebug, sizeof(ohcidebug), CTL_CREATE, CTL_EOL);
100 if (err)
101 goto fail;
102
103 return;
104 fail:
105 aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err);
106 }
107
108 #endif /* OHCI_DEBUG */
109 #endif /* USB_DEBUG */
110
111 #define DPRINTF(FMT,A,B,C,D) USBHIST_LOG(ohcidebug,FMT,A,B,C,D)
112 #define DPRINTFN(N,FMT,A,B,C,D) USBHIST_LOGN(ohcidebug,N,FMT,A,B,C,D)
113 #define OHCIHIST_FUNC() USBHIST_FUNC()
114 #define OHCIHIST_CALLED(name) USBHIST_CALLED(ohcidebug)
115
116 #if BYTE_ORDER == BIG_ENDIAN
117 #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN
118 #else
119 #define SWAP_ENDIAN OHCI_BIG_ENDIAN
120 #endif
121
122 #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val)
123 #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val)
124 #define HTOO16(val) O16TOH(val)
125 #define HTOO32(val) O32TOH(val)
126
127 struct ohci_pipe;
128
129 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *);
130 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
131
132 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *);
133 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
134 Static void ohci_free_std_locked(ohci_softc_t *, ohci_soft_td_t *);
135
136 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
137 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
138 Static void ohci_free_sitd_locked(ohci_softc_t *,
139 ohci_soft_itd_t *);
140
141 Static int ohci_alloc_std_chain(ohci_softc_t *, struct usbd_xfer *,
142 int, int);
143 Static void ohci_free_stds(ohci_softc_t *, struct ohci_xfer *);
144
145 Static void ohci_reset_std_chain(ohci_softc_t *, struct usbd_xfer *,
146 int, int, ohci_soft_td_t *, ohci_soft_td_t **);
147
148 Static usbd_status ohci_open(struct usbd_pipe *);
149 Static void ohci_poll(struct usbd_bus *);
150 Static void ohci_softintr(void *);
151 Static void ohci_rhsc(ohci_softc_t *, struct usbd_xfer *);
152 Static void ohci_rhsc_softint(void *);
153
154 Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *,
155 ohci_soft_ed_t *);
156
157 Static void ohci_rem_ed(ohci_softc_t *, ohci_soft_ed_t *,
158 ohci_soft_ed_t *);
159 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
160 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
161 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
162 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
163 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
164 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
165
166 Static usbd_status ohci_setup_isoc(struct usbd_pipe *);
167 Static void ohci_device_isoc_enter(struct usbd_xfer *);
168
169 Static struct usbd_xfer *
170 ohci_allocx(struct usbd_bus *, unsigned int);
171 Static void ohci_freex(struct usbd_bus *, struct usbd_xfer *);
172 Static void ohci_get_lock(struct usbd_bus *, kmutex_t **);
173 Static int ohci_roothub_ctrl(struct usbd_bus *,
174 usb_device_request_t *, void *, int);
175
176 Static usbd_status ohci_root_intr_transfer(struct usbd_xfer *);
177 Static usbd_status ohci_root_intr_start(struct usbd_xfer *);
178 Static void ohci_root_intr_abort(struct usbd_xfer *);
179 Static void ohci_root_intr_close(struct usbd_pipe *);
180 Static void ohci_root_intr_done(struct usbd_xfer *);
181
182 Static int ohci_device_ctrl_init(struct usbd_xfer *);
183 Static void ohci_device_ctrl_fini(struct usbd_xfer *);
184 Static usbd_status ohci_device_ctrl_transfer(struct usbd_xfer *);
185 Static usbd_status ohci_device_ctrl_start(struct usbd_xfer *);
186 Static void ohci_device_ctrl_abort(struct usbd_xfer *);
187 Static void ohci_device_ctrl_close(struct usbd_pipe *);
188 Static void ohci_device_ctrl_done(struct usbd_xfer *);
189
190 Static int ohci_device_bulk_init(struct usbd_xfer *);
191 Static void ohci_device_bulk_fini(struct usbd_xfer *);
192 Static usbd_status ohci_device_bulk_transfer(struct usbd_xfer *);
193 Static usbd_status ohci_device_bulk_start(struct usbd_xfer *);
194 Static void ohci_device_bulk_abort(struct usbd_xfer *);
195 Static void ohci_device_bulk_close(struct usbd_pipe *);
196 Static void ohci_device_bulk_done(struct usbd_xfer *);
197
198 Static int ohci_device_intr_init(struct usbd_xfer *);
199 Static void ohci_device_intr_fini(struct usbd_xfer *);
200 Static usbd_status ohci_device_intr_transfer(struct usbd_xfer *);
201 Static usbd_status ohci_device_intr_start(struct usbd_xfer *);
202 Static void ohci_device_intr_abort(struct usbd_xfer *);
203 Static void ohci_device_intr_close(struct usbd_pipe *);
204 Static void ohci_device_intr_done(struct usbd_xfer *);
205
206 Static int ohci_device_isoc_init(struct usbd_xfer *);
207 Static void ohci_device_isoc_fini(struct usbd_xfer *);
208 Static usbd_status ohci_device_isoc_transfer(struct usbd_xfer *);
209 Static void ohci_device_isoc_abort(struct usbd_xfer *);
210 Static void ohci_device_isoc_close(struct usbd_pipe *);
211 Static void ohci_device_isoc_done(struct usbd_xfer *);
212
213 Static usbd_status ohci_device_setintr(ohci_softc_t *,
214 struct ohci_pipe *, int);
215
216 Static void ohci_timeout(void *);
217 Static void ohci_timeout_task(void *);
218 Static void ohci_rhsc_enable(void *);
219
220 Static void ohci_close_pipe(struct usbd_pipe *, ohci_soft_ed_t *);
221 Static void ohci_abort_xfer(struct usbd_xfer *, usbd_status);
222
223 Static void ohci_device_clear_toggle(struct usbd_pipe *);
224 Static void ohci_noop(struct usbd_pipe *);
225
226 #ifdef OHCI_DEBUG
227 Static void ohci_dumpregs(ohci_softc_t *);
228 Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *);
229 Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *);
230 Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *);
231 Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *);
232 Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *);
233 #endif
234
235 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
236 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
237 #define OWRITE1(sc, r, x) \
238 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
239 #define OWRITE2(sc, r, x) \
240 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
241 #define OWRITE4(sc, r, x) \
242 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
243
244 static __inline uint32_t
245 OREAD4(ohci_softc_t *sc, bus_size_t r)
246 {
247
248 OBARR(sc);
249 return bus_space_read_4(sc->iot, sc->ioh, r);
250 }
251
252 /* Reverse the bits in a value 0 .. 31 */
253 Static uint8_t revbits[OHCI_NO_INTRS] =
254 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
255 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
256 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
257 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
258
259 struct ohci_pipe {
260 struct usbd_pipe pipe;
261 ohci_soft_ed_t *sed;
262 union {
263 ohci_soft_td_t *td;
264 ohci_soft_itd_t *itd;
265 } tail;
266 /* Info needed for different pipe kinds. */
267 union {
268 /* Control pipe */
269 struct {
270 usb_dma_t reqdma;
271 } ctrl;
272 /* Interrupt pipe */
273 struct {
274 int nslots;
275 int pos;
276 } intr;
277 /* Isochronous pipe */
278 struct isoc {
279 int next, inuse;
280 } isoc;
281 };
282 };
283
284 Static const struct usbd_bus_methods ohci_bus_methods = {
285 .ubm_open = ohci_open,
286 .ubm_softint = ohci_softintr,
287 .ubm_dopoll = ohci_poll,
288 .ubm_allocx = ohci_allocx,
289 .ubm_freex = ohci_freex,
290 .ubm_getlock = ohci_get_lock,
291 .ubm_rhctrl = ohci_roothub_ctrl,
292 };
293
294 Static const struct usbd_pipe_methods ohci_root_intr_methods = {
295 .upm_transfer = ohci_root_intr_transfer,
296 .upm_start = ohci_root_intr_start,
297 .upm_abort = ohci_root_intr_abort,
298 .upm_close = ohci_root_intr_close,
299 .upm_cleartoggle = ohci_noop,
300 .upm_done = ohci_root_intr_done,
301 };
302
303 Static const struct usbd_pipe_methods ohci_device_ctrl_methods = {
304 .upm_init = ohci_device_ctrl_init,
305 .upm_fini = ohci_device_ctrl_fini,
306 .upm_transfer = ohci_device_ctrl_transfer,
307 .upm_start = ohci_device_ctrl_start,
308 .upm_abort = ohci_device_ctrl_abort,
309 .upm_close = ohci_device_ctrl_close,
310 .upm_cleartoggle = ohci_noop,
311 .upm_done = ohci_device_ctrl_done,
312 };
313
314 Static const struct usbd_pipe_methods ohci_device_intr_methods = {
315 .upm_init = ohci_device_intr_init,
316 .upm_fini = ohci_device_intr_fini,
317 .upm_transfer = ohci_device_intr_transfer,
318 .upm_start = ohci_device_intr_start,
319 .upm_abort = ohci_device_intr_abort,
320 .upm_close = ohci_device_intr_close,
321 .upm_cleartoggle = ohci_device_clear_toggle,
322 .upm_done = ohci_device_intr_done,
323 };
324
325 Static const struct usbd_pipe_methods ohci_device_bulk_methods = {
326 .upm_init = ohci_device_bulk_init,
327 .upm_fini = ohci_device_bulk_fini,
328 .upm_transfer = ohci_device_bulk_transfer,
329 .upm_start = ohci_device_bulk_start,
330 .upm_abort = ohci_device_bulk_abort,
331 .upm_close = ohci_device_bulk_close,
332 .upm_cleartoggle = ohci_device_clear_toggle,
333 .upm_done = ohci_device_bulk_done,
334 };
335
336 Static const struct usbd_pipe_methods ohci_device_isoc_methods = {
337 .upm_init = ohci_device_isoc_init,
338 .upm_fini = ohci_device_isoc_fini,
339 .upm_transfer = ohci_device_isoc_transfer,
340 .upm_abort = ohci_device_isoc_abort,
341 .upm_close = ohci_device_isoc_close,
342 .upm_cleartoggle = ohci_noop,
343 .upm_done = ohci_device_isoc_done,
344 };
345
346 int
347 ohci_activate(device_t self, enum devact act)
348 {
349 struct ohci_softc *sc = device_private(self);
350
351 switch (act) {
352 case DVACT_DEACTIVATE:
353 sc->sc_dying = 1;
354 return 0;
355 default:
356 return EOPNOTSUPP;
357 }
358 }
359
360 void
361 ohci_childdet(device_t self, device_t child)
362 {
363 struct ohci_softc *sc = device_private(self);
364
365 KASSERT(sc->sc_child == child);
366 sc->sc_child = NULL;
367 }
368
369 int
370 ohci_detach(struct ohci_softc *sc, int flags)
371 {
372 int rv = 0;
373
374 if (sc->sc_child != NULL)
375 rv = config_detach(sc->sc_child, flags);
376
377 if (rv != 0)
378 return rv;
379
380 softint_disestablish(sc->sc_rhsc_si);
381
382 callout_halt(&sc->sc_tmo_rhsc, NULL);
383 callout_destroy(&sc->sc_tmo_rhsc);
384
385 mutex_destroy(&sc->sc_lock);
386 mutex_destroy(&sc->sc_intr_lock);
387
388 if (sc->sc_hcca != NULL)
389 usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
390 pool_cache_destroy(sc->sc_xferpool);
391
392 return rv;
393 }
394
395 ohci_soft_ed_t *
396 ohci_alloc_sed(ohci_softc_t *sc)
397 {
398 ohci_soft_ed_t *sed;
399 usbd_status err;
400 int i, offs;
401 usb_dma_t dma;
402
403 OHCIHIST_FUNC(); OHCIHIST_CALLED();
404
405 mutex_enter(&sc->sc_lock);
406 if (sc->sc_freeeds == NULL) {
407 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0);
408 mutex_exit(&sc->sc_lock);
409
410 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
411 OHCI_ED_ALIGN, &dma);
412 if (err)
413 return 0;
414
415 mutex_enter(&sc->sc_lock);
416 for (i = 0; i < OHCI_SED_CHUNK; i++) {
417 offs = i * OHCI_SED_SIZE;
418 sed = KERNADDR(&dma, offs);
419 sed->physaddr = DMAADDR(&dma, offs);
420 sed->dma = dma;
421 sed->offs = offs;
422 sed->next = sc->sc_freeeds;
423 sc->sc_freeeds = sed;
424 }
425 }
426 sed = sc->sc_freeeds;
427 sc->sc_freeeds = sed->next;
428 mutex_exit(&sc->sc_lock);
429
430 memset(&sed->ed, 0, sizeof(ohci_ed_t));
431 sed->next = 0;
432 return sed;
433 }
434
435 static inline void
436 ohci_free_sed_locked(ohci_softc_t *sc, ohci_soft_ed_t *sed)
437 {
438
439 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
440
441 sed->next = sc->sc_freeeds;
442 sc->sc_freeeds = sed;
443 }
444
445 void
446 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
447 {
448
449 mutex_enter(&sc->sc_lock);
450 ohci_free_sed_locked(sc, sed);
451 mutex_exit(&sc->sc_lock);
452 }
453
454 ohci_soft_td_t *
455 ohci_alloc_std(ohci_softc_t *sc)
456 {
457 ohci_soft_td_t *std;
458 usbd_status err;
459 int i, offs;
460 usb_dma_t dma;
461
462 OHCIHIST_FUNC(); OHCIHIST_CALLED();
463
464 mutex_enter(&sc->sc_lock);
465 if (sc->sc_freetds == NULL) {
466 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0);
467 mutex_exit(&sc->sc_lock);
468
469 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
470 OHCI_TD_ALIGN, &dma);
471 if (err)
472 return NULL;
473
474 mutex_enter(&sc->sc_lock);
475 for (i = 0; i < OHCI_STD_CHUNK; i++) {
476 offs = i * OHCI_STD_SIZE;
477 std = KERNADDR(&dma, offs);
478 std->physaddr = DMAADDR(&dma, offs);
479 std->dma = dma;
480 std->offs = offs;
481 std->nexttd = sc->sc_freetds;
482 sc->sc_freetds = std;
483 }
484 }
485
486 std = sc->sc_freetds;
487 sc->sc_freetds = std->nexttd;
488 mutex_exit(&sc->sc_lock);
489
490 memset(&std->td, 0, sizeof(ohci_td_t));
491 std->nexttd = NULL;
492 std->xfer = NULL;
493
494 return std;
495 }
496
497 void
498 ohci_free_std_locked(ohci_softc_t *sc, ohci_soft_td_t *std)
499 {
500
501 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
502
503 std->nexttd = sc->sc_freetds;
504 sc->sc_freetds = std;
505 }
506
507 void
508 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
509 {
510
511 mutex_enter(&sc->sc_lock);
512 ohci_free_std_locked(sc, std);
513 mutex_exit(&sc->sc_lock);
514 }
515
516 Static int
517 ohci_alloc_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, int length, int rd)
518 {
519 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
520 uint16_t flags = xfer->ux_flags;
521
522 OHCIHIST_FUNC(); OHCIHIST_CALLED();
523
524 DPRINTFN(8, "addr=%jd endpt=%jd len=%jd speed=%jd",
525 xfer->ux_pipe->up_dev->ud_addr,
526 UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress),
527 length, xfer->ux_pipe->up_dev->ud_speed);
528
529 ASSERT_SLEEPABLE();
530 KASSERT(length != 0 || (!rd && (flags & USBD_FORCE_SHORT_XFER)));
531
532 size_t nstd = (!rd && (flags & USBD_FORCE_SHORT_XFER)) ? 1 : 0;
533 nstd += ((length + OHCI_PAGE_SIZE - 1) / OHCI_PAGE_SIZE);
534 ox->ox_stds = kmem_zalloc(sizeof(ohci_soft_td_t *) * nstd,
535 KM_SLEEP);
536 ox->ox_nstd = nstd;
537
538 DPRINTFN(8, "xfer %#jx nstd %jd", (uintptr_t)xfer, nstd, 0, 0);
539
540 for (size_t j = 0; j < ox->ox_nstd;) {
541 ohci_soft_td_t *cur = ohci_alloc_std(sc);
542 if (cur == NULL)
543 goto nomem;
544
545 ox->ox_stds[j++] = cur;
546 cur->xfer = xfer;
547 cur->flags = 0;
548 }
549
550 return 0;
551
552 nomem:
553 ohci_free_stds(sc, ox);
554 kmem_free(ox->ox_stds, sizeof(ohci_soft_td_t *) * nstd);
555
556 return ENOMEM;
557 }
558
559 Static void
560 ohci_free_stds(ohci_softc_t *sc, struct ohci_xfer *ox)
561 {
562 OHCIHIST_FUNC(); OHCIHIST_CALLED();
563 DPRINTF("ox=%#jx", (uintptr_t)ox, 0, 0, 0);
564
565 mutex_enter(&sc->sc_lock);
566 for (size_t i = 0; i < ox->ox_nstd; i++) {
567 ohci_soft_td_t *std = ox->ox_stds[i];
568 if (std == NULL)
569 break;
570 ohci_free_std_locked(sc, std);
571 }
572 mutex_exit(&sc->sc_lock);
573 }
574
575 void
576 ohci_reset_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer,
577 int alen, int rd, ohci_soft_td_t *sp, ohci_soft_td_t **ep)
578 {
579 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
580 ohci_soft_td_t *next, *cur;
581 int len, curlen;
582 usb_dma_t *dma = &xfer->ux_dmabuf;
583 uint16_t flags = xfer->ux_flags;
584
585 OHCIHIST_FUNC(); OHCIHIST_CALLED();
586 DPRINTF("start len=%jd", alen, 0, 0, 0);
587
588 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
589
590 DPRINTFN(8, "addr=%jd endpt=%jd len=%jd speed=%jd",
591 xfer->ux_pipe->up_dev->ud_addr,
592 UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress),
593 alen, xfer->ux_pipe->up_dev->ud_speed);
594
595 KASSERT(sp);
596
597 int mps = UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize);
598
599 /*
600 * Assign next for the len == 0 case where we don't go through the
601 * main loop.
602 */
603 len = alen;
604 cur = next = sp;
605
606 usb_syncmem(dma, 0, len,
607 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
608 const uint32_t tdflags = HTOO32(
609 (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
610 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
611
612 size_t curoffs = 0;
613 for (size_t j = 1; len != 0;) {
614 if (j == ox->ox_nstd)
615 next = NULL;
616 else
617 next = ox->ox_stds[j++];
618 KASSERT(next != cur);
619
620 curlen = 0;
621 const ohci_physaddr_t sdataphys = DMAADDR(dma, curoffs);
622 ohci_physaddr_t edataphys = DMAADDR(dma, curoffs + len - 1);
623
624 const ohci_physaddr_t sphyspg = OHCI_PAGE(sdataphys);
625 ohci_physaddr_t ephyspg = OHCI_PAGE(edataphys);
626 /*
627 * The OHCI hardware can handle at most one page
628 * crossing per TD
629 */
630 curlen = len;
631 if (sphyspg != ephyspg &&
632 sphyspg + OHCI_PAGE_SIZE != ephyspg) {
633 /* must use multiple TDs, fill as much as possible. */
634 curlen = 2 * OHCI_PAGE_SIZE -
635 OHCI_PAGE_OFFSET(sdataphys);
636 /* the length must be a multiple of the max size */
637 curlen -= curlen % mps;
638 edataphys = DMAADDR(dma, curoffs + curlen - 1);
639 }
640 KASSERT(curlen != 0);
641 DPRINTFN(4, "sdataphys=0x%08jx edataphys=0x%08jx "
642 "len=%jd curlen=%jd", sdataphys, edataphys, len, curlen);
643
644 cur->td.td_flags = tdflags;
645 cur->td.td_cbp = HTOO32(sdataphys);
646 cur->td.td_be = HTOO32(edataphys);
647 cur->td.td_nexttd = (next != NULL) ? HTOO32(next->physaddr) : 0;
648 cur->nexttd = next;
649 cur->len = curlen;
650 cur->flags = OHCI_ADD_LEN;
651 cur->xfer = xfer;
652 ohci_hash_add_td(sc, cur);
653
654 curoffs += curlen;
655 len -= curlen;
656
657 if (len != 0) {
658 KASSERT(next != NULL);
659 DPRINTFN(10, "extend chain", 0, 0, 0, 0);
660 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
661 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
662
663 cur = next;
664 }
665 }
666 cur->td.td_flags |=
667 HTOO32(xfer->ux_flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0);
668
669 if (!rd &&
670 (flags & USBD_FORCE_SHORT_XFER) &&
671 alen % mps == 0) {
672 /* We're adding a ZLP so sync the previous TD */
673 usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
674 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
675
676 /* Force a 0 length transfer at the end. */
677
678 KASSERT(next != NULL);
679 cur = next;
680
681 cur->td.td_flags = tdflags;
682 cur->td.td_cbp = 0; /* indicate 0 length packet */
683 cur->td.td_nexttd = 0;
684 cur->td.td_be = ~0;
685 cur->nexttd = NULL;
686 cur->len = 0;
687 cur->flags = 0;
688 cur->xfer = xfer;
689 ohci_hash_add_td(sc, cur);
690
691 DPRINTFN(2, "add 0 xfer", 0, 0, 0, 0);
692 }
693
694 /* Last TD gets usb_syncmem'ed by caller */
695 *ep = cur;
696 }
697
698 ohci_soft_itd_t *
699 ohci_alloc_sitd(ohci_softc_t *sc)
700 {
701 ohci_soft_itd_t *sitd;
702 usbd_status err;
703 int i, offs;
704 usb_dma_t dma;
705
706 OHCIHIST_FUNC(); OHCIHIST_CALLED();
707
708 mutex_enter(&sc->sc_lock);
709 if (sc->sc_freeitds == NULL) {
710 DPRINTFN(2, "allocating chunk", 0, 0, 0, 0);
711 mutex_exit(&sc->sc_lock);
712
713 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
714 OHCI_ITD_ALIGN, &dma);
715 if (err)
716 return NULL;
717 mutex_enter(&sc->sc_lock);
718 for (i = 0; i < OHCI_SITD_CHUNK; i++) {
719 offs = i * OHCI_SITD_SIZE;
720 sitd = KERNADDR(&dma, offs);
721 sitd->physaddr = DMAADDR(&dma, offs);
722 sitd->dma = dma;
723 sitd->offs = offs;
724 sitd->nextitd = sc->sc_freeitds;
725 sc->sc_freeitds = sitd;
726 }
727 }
728
729 sitd = sc->sc_freeitds;
730 sc->sc_freeitds = sitd->nextitd;
731 mutex_exit(&sc->sc_lock);
732
733 memset(&sitd->itd, 0, sizeof(ohci_itd_t));
734 sitd->nextitd = NULL;
735 sitd->xfer = NULL;
736
737 #ifdef DIAGNOSTIC
738 sitd->isdone = true;
739 #endif
740
741 return sitd;
742 }
743
744 Static void
745 ohci_free_sitd_locked(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
746 {
747
748 OHCIHIST_FUNC(); OHCIHIST_CALLED();
749 DPRINTFN(10, "sitd=%#jx", (uintptr_t)sitd, 0, 0, 0);
750
751 KASSERT(sitd->isdone);
752 #ifdef DIAGNOSTIC
753 /* Warn double free */
754 sitd->isdone = false;
755 #endif
756
757 sitd->nextitd = sc->sc_freeitds;
758 sc->sc_freeitds = sitd;
759 }
760
761 void
762 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
763 {
764
765 OHCIHIST_FUNC(); OHCIHIST_CALLED();
766
767 mutex_enter(&sc->sc_lock);
768 ohci_free_sitd_locked(sc, sitd);
769 mutex_exit(&sc->sc_lock);
770 }
771
772 int
773 ohci_init(ohci_softc_t *sc)
774 {
775 ohci_soft_ed_t *sed, *psed;
776 usbd_status err;
777 int i;
778 uint32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca /*, descb */;
779
780 OHCIHIST_FUNC(); OHCIHIST_CALLED();
781
782 aprint_normal_dev(sc->sc_dev, "");
783
784 sc->sc_hcca = NULL;
785 callout_init(&sc->sc_tmo_rhsc, CALLOUT_MPSAFE);
786
787 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB);
788 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_USB);
789
790 sc->sc_rhsc_si = softint_establish(SOFTINT_USB | SOFTINT_MPSAFE,
791 ohci_rhsc_softint, sc);
792
793 for (i = 0; i < OHCI_HASH_SIZE; i++)
794 LIST_INIT(&sc->sc_hash_tds[i]);
795 for (i = 0; i < OHCI_HASH_SIZE; i++)
796 LIST_INIT(&sc->sc_hash_itds[i]);
797
798 sc->sc_xferpool = pool_cache_init(sizeof(struct ohci_xfer), 0, 0, 0,
799 "ohcixfer", NULL, IPL_USB, NULL, NULL, NULL);
800
801 rev = OREAD4(sc, OHCI_REVISION);
802 aprint_normal("OHCI version %d.%d%s\n",
803 OHCI_REV_HI(rev), OHCI_REV_LO(rev),
804 OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
805
806 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
807 aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n");
808 sc->sc_bus.ub_revision = USBREV_UNKNOWN;
809 return -1;
810 }
811 sc->sc_bus.ub_revision = USBREV_1_0;
812 sc->sc_bus.ub_usedma = true;
813
814 /* XXX determine alignment by R/W */
815 /* Allocate the HCCA area. */
816 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
817 OHCI_HCCA_ALIGN, &sc->sc_hccadma);
818 if (err) {
819 sc->sc_hcca = NULL;
820 return err;
821 }
822 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
823 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
824
825 sc->sc_eintrs = OHCI_NORMAL_INTRS;
826
827 /* Allocate dummy ED that starts the control list. */
828 sc->sc_ctrl_head = ohci_alloc_sed(sc);
829 if (sc->sc_ctrl_head == NULL) {
830 err = ENOMEM;
831 goto bad1;
832 }
833 sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
834
835 /* Allocate dummy ED that starts the bulk list. */
836 sc->sc_bulk_head = ohci_alloc_sed(sc);
837 if (sc->sc_bulk_head == NULL) {
838 err = ENOMEM;
839 goto bad2;
840 }
841 sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
842 usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs,
843 sizeof(sc->sc_bulk_head->ed),
844 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
845
846 /* Allocate dummy ED that starts the isochronous list. */
847 sc->sc_isoc_head = ohci_alloc_sed(sc);
848 if (sc->sc_isoc_head == NULL) {
849 err = ENOMEM;
850 goto bad3;
851 }
852 sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
853 usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs,
854 sizeof(sc->sc_isoc_head->ed),
855 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
856
857 /* Allocate all the dummy EDs that make up the interrupt tree. */
858 for (i = 0; i < OHCI_NO_EDS; i++) {
859 sed = ohci_alloc_sed(sc);
860 if (sed == NULL) {
861 while (--i >= 0)
862 ohci_free_sed(sc, sc->sc_eds[i]);
863 err = ENOMEM;
864 goto bad4;
865 }
866 /* All ED fields are set to 0. */
867 sc->sc_eds[i] = sed;
868 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
869 if (i != 0)
870 psed = sc->sc_eds[(i-1) / 2];
871 else
872 psed= sc->sc_isoc_head;
873 sed->next = psed;
874 sed->ed.ed_nexted = HTOO32(psed->physaddr);
875 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
876 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
877 }
878 /*
879 * Fill HCCA interrupt table. The bit reversal is to get
880 * the tree set up properly to spread the interrupts.
881 */
882 for (i = 0; i < OHCI_NO_INTRS; i++)
883 sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
884 HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
885 usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE,
886 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
887
888 #ifdef OHCI_DEBUG
889 DPRINTFN(15, "--- dump start ---", 0, 0, 0 ,0);
890 if (ohcidebug >= 15) {
891 for (i = 0; i < OHCI_NO_EDS; i++) {
892 DPRINTFN(15, "ed#%jd ", i, 0, 0, 0);
893 ohci_dump_ed(sc, sc->sc_eds[i]);
894 }
895 DPRINTFN(15, "iso", 0, 0, 0 ,0);
896 ohci_dump_ed(sc, sc->sc_isoc_head);
897 }
898 DPRINTFN(15, "--- dump end ---", 0, 0, 0 ,0);
899 #endif
900
901 /* Preserve values programmed by SMM/BIOS but lost over reset. */
902 ctl = OREAD4(sc, OHCI_CONTROL);
903 rwc = ctl & OHCI_RWC;
904 fm = OREAD4(sc, OHCI_FM_INTERVAL);
905 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
906 /* descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); */
907
908 /* Determine in what context we are running. */
909 if (ctl & OHCI_IR) {
910 /* SMM active, request change */
911 DPRINTF("SMM active, request owner change", 0, 0, 0, 0);
912 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) ==
913 (OHCI_OC | OHCI_MIE))
914 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE);
915 s = OREAD4(sc, OHCI_COMMAND_STATUS);
916 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
917 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
918 usb_delay_ms(&sc->sc_bus, 1);
919 ctl = OREAD4(sc, OHCI_CONTROL);
920 }
921 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE);
922 if ((ctl & OHCI_IR) == 0) {
923 aprint_error_dev(sc->sc_dev,
924 "SMM does not respond, resetting\n");
925 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
926 goto reset;
927 }
928 #if 0
929 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
930 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
931 /* BIOS started controller. */
932 DPRINTF("BIOS active", 0, 0, 0, 0);
933 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
934 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc);
935 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
936 }
937 #endif
938 } else {
939 DPRINTF("cold started", 0 ,0 ,0 ,0);
940 reset:
941 /* Controller was cold started. */
942 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
943 }
944
945 /*
946 * This reset should not be necessary according to the OHCI spec, but
947 * without it some controllers do not start.
948 */
949 DPRINTF("sc %#jx: resetting", (uintptr_t)sc, 0, 0, 0);
950 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
951 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
952
953 /* We now own the host controller and the bus has been reset. */
954
955 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
956 /* Nominal time for a reset is 10 us. */
957 for (i = 0; i < 10; i++) {
958 delay(10);
959 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
960 if (!hcr)
961 break;
962 }
963 if (hcr) {
964 aprint_error_dev(sc->sc_dev, "reset timeout\n");
965 err = EIO;
966 goto bad5;
967 }
968 #ifdef OHCI_DEBUG
969 if (ohcidebug >= 15)
970 ohci_dumpregs(sc);
971 #endif
972
973 /* The controller is now in SUSPEND state, we have 2ms to finish. */
974
975 /* Set up HC registers. */
976 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
977 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
978 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
979 /* disable all interrupts and then switch on all desired interrupts */
980 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
981 /* switch on desired functional features */
982 ctl = OREAD4(sc, OHCI_CONTROL);
983 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
984 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
985 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc;
986 /* And finally start it! */
987 OWRITE4(sc, OHCI_CONTROL, ctl);
988
989 /*
990 * The controller is now OPERATIONAL. Set a some final
991 * registers that should be set earlier, but that the
992 * controller ignores when in the SUSPEND state.
993 */
994 ival = OHCI_GET_IVAL(fm);
995 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
996 fm |= OHCI_FSMPS(ival) | ival;
997 OWRITE4(sc, OHCI_FM_INTERVAL, fm);
998 per = OHCI_PERIODIC(ival); /* 90% periodic */
999 OWRITE4(sc, OHCI_PERIODIC_START, per);
1000
1001 if (sc->sc_flags & OHCIF_SUPERIO) {
1002 /* no overcurrent protection */
1003 desca |= OHCI_NOCP;
1004 /*
1005 * Clear NoPowerSwitching and PowerOnToPowerGoodTime meaning
1006 * that
1007 * - ports are always power switched
1008 * - don't wait for powered root hub port
1009 */
1010 desca &= ~(__SHIFTIN(0xff, OHCI_POTPGT_MASK) | OHCI_NPS);
1011 }
1012
1013 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
1014 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
1015 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
1016 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
1017 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
1018
1019 /*
1020 * The AMD756 requires a delay before re-reading the register,
1021 * otherwise it will occasionally report 0 ports.
1022 */
1023 sc->sc_noport = 0;
1024 for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
1025 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
1026 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
1027 }
1028
1029 #ifdef OHCI_DEBUG
1030 if (ohcidebug >= 5)
1031 ohci_dumpregs(sc);
1032 #endif
1033
1034 /* Set up the bus struct. */
1035 sc->sc_bus.ub_methods = &ohci_bus_methods;
1036 sc->sc_bus.ub_pipesize = sizeof(struct ohci_pipe);
1037
1038 sc->sc_control = sc->sc_intre = 0;
1039
1040 /* Finally, turn on interrupts. */
1041 DPRINTF("enabling %#jx", sc->sc_eintrs | OHCI_MIE, 0, 0, 0);
1042 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
1043
1044 return 0;
1045
1046 bad5:
1047 for (i = 0; i < OHCI_NO_EDS; i++)
1048 ohci_free_sed(sc, sc->sc_eds[i]);
1049 bad4:
1050 ohci_free_sed(sc, sc->sc_isoc_head);
1051 bad3:
1052 ohci_free_sed(sc, sc->sc_bulk_head);
1053 bad2:
1054 ohci_free_sed(sc, sc->sc_ctrl_head);
1055 bad1:
1056 usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
1057 sc->sc_hcca = NULL;
1058 return err;
1059 }
1060
1061 struct usbd_xfer *
1062 ohci_allocx(struct usbd_bus *bus, unsigned int nframes)
1063 {
1064 ohci_softc_t *sc = OHCI_BUS2SC(bus);
1065 struct usbd_xfer *xfer;
1066
1067 xfer = pool_cache_get(sc->sc_xferpool, PR_WAITOK);
1068 if (xfer != NULL) {
1069 memset(xfer, 0, sizeof(struct ohci_xfer));
1070
1071 /* Initialise this always so we can call remove on it. */
1072 usb_init_task(&xfer->ux_aborttask, ohci_timeout_task, xfer,
1073 USB_TASKQ_MPSAFE);
1074 #ifdef DIAGNOSTIC
1075 xfer->ux_state = XFER_BUSY;
1076 #endif
1077 }
1078 return xfer;
1079 }
1080
1081 void
1082 ohci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer)
1083 {
1084 ohci_softc_t *sc = OHCI_BUS2SC(bus);
1085
1086 KASSERTMSG(xfer->ux_state == XFER_BUSY ||
1087 xfer->ux_status == USBD_NOT_STARTED,
1088 "xfer=%p not busy, 0x%08x\n", xfer, xfer->ux_state);
1089 #ifdef DIAGNOSTIC
1090 xfer->ux_state = XFER_FREE;
1091 #endif
1092 pool_cache_put(sc->sc_xferpool, xfer);
1093 }
1094
1095 Static void
1096 ohci_get_lock(struct usbd_bus *bus, kmutex_t **lock)
1097 {
1098 ohci_softc_t *sc = OHCI_BUS2SC(bus);
1099
1100 *lock = &sc->sc_lock;
1101 }
1102
1103 /*
1104 * Shut down the controller when the system is going down.
1105 */
1106 bool
1107 ohci_shutdown(device_t self, int flags)
1108 {
1109 ohci_softc_t *sc = device_private(self);
1110
1111 OHCIHIST_FUNC(); OHCIHIST_CALLED();
1112
1113 DPRINTF("stopping the HC", 0, 0, 0, 0);
1114 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
1115 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1116 return true;
1117 }
1118
1119 bool
1120 ohci_resume(device_t dv, const pmf_qual_t *qual)
1121 {
1122 ohci_softc_t *sc = device_private(dv);
1123 uint32_t ctl;
1124
1125 mutex_spin_enter(&sc->sc_intr_lock);
1126 sc->sc_bus.ub_usepolling++;
1127 mutex_spin_exit(&sc->sc_intr_lock);
1128
1129 /* Some broken BIOSes do not recover these values */
1130 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
1131 OWRITE4(sc, OHCI_CONTROL_HEAD_ED,
1132 sc->sc_ctrl_head->physaddr);
1133 OWRITE4(sc, OHCI_BULK_HEAD_ED,
1134 sc->sc_bulk_head->physaddr);
1135 if (sc->sc_intre)
1136 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre &
1137 (OHCI_ALL_INTRS | OHCI_MIE));
1138 if (sc->sc_control)
1139 ctl = sc->sc_control;
1140 else
1141 ctl = OREAD4(sc, OHCI_CONTROL);
1142 ctl |= OHCI_HCFS_RESUME;
1143 OWRITE4(sc, OHCI_CONTROL, ctl);
1144 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
1145 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
1146 OWRITE4(sc, OHCI_CONTROL, ctl);
1147 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
1148 sc->sc_control = sc->sc_intre = 0;
1149
1150 mutex_spin_enter(&sc->sc_intr_lock);
1151 sc->sc_bus.ub_usepolling--;
1152 mutex_spin_exit(&sc->sc_intr_lock);
1153
1154 return true;
1155 }
1156
1157 bool
1158 ohci_suspend(device_t dv, const pmf_qual_t *qual)
1159 {
1160 ohci_softc_t *sc = device_private(dv);
1161 uint32_t ctl;
1162
1163 mutex_spin_enter(&sc->sc_intr_lock);
1164 sc->sc_bus.ub_usepolling++;
1165 mutex_spin_exit(&sc->sc_intr_lock);
1166
1167 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
1168 if (sc->sc_control == 0) {
1169 /*
1170 * Preserve register values, in case that BIOS
1171 * does not recover them.
1172 */
1173 sc->sc_control = ctl;
1174 sc->sc_intre = OREAD4(sc,
1175 OHCI_INTERRUPT_ENABLE);
1176 }
1177 ctl |= OHCI_HCFS_SUSPEND;
1178 OWRITE4(sc, OHCI_CONTROL, ctl);
1179 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1180
1181 mutex_spin_enter(&sc->sc_intr_lock);
1182 sc->sc_bus.ub_usepolling--;
1183 mutex_spin_exit(&sc->sc_intr_lock);
1184
1185 return true;
1186 }
1187
1188 #ifdef OHCI_DEBUG
1189 void
1190 ohci_dumpregs(ohci_softc_t *sc)
1191 {
1192 OHCIHIST_FUNC(); OHCIHIST_CALLED();
1193
1194 DPRINTF("rev=0x%08jx control=0x%08jx command=0x%08jx",
1195 OREAD4(sc, OHCI_REVISION),
1196 OREAD4(sc, OHCI_CONTROL),
1197 OREAD4(sc, OHCI_COMMAND_STATUS), 0);
1198 DPRINTF(" intrstat=0x%08jx intre=0x%08jx intrd=0x%08jx",
1199 OREAD4(sc, OHCI_INTERRUPT_STATUS),
1200 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
1201 OREAD4(sc, OHCI_INTERRUPT_DISABLE), 0);
1202 DPRINTF(" hcca=0x%08jx percur=0x%08jx ctrlhd=0x%08jx",
1203 OREAD4(sc, OHCI_HCCA),
1204 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
1205 OREAD4(sc, OHCI_CONTROL_HEAD_ED), 0);
1206 DPRINTF(" ctrlcur=0x%08jx bulkhd=0x%08jx bulkcur=0x%08jx",
1207 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
1208 OREAD4(sc, OHCI_BULK_HEAD_ED),
1209 OREAD4(sc, OHCI_BULK_CURRENT_ED) ,0);
1210 DPRINTF(" done=0x%08jx fmival=0x%08jx fmrem=0x%08jx",
1211 OREAD4(sc, OHCI_DONE_HEAD),
1212 OREAD4(sc, OHCI_FM_INTERVAL),
1213 OREAD4(sc, OHCI_FM_REMAINING), 0);
1214 DPRINTF(" fmnum=0x%08jx perst=0x%08jx lsthrs=0x%08jx",
1215 OREAD4(sc, OHCI_FM_NUMBER),
1216 OREAD4(sc, OHCI_PERIODIC_START),
1217 OREAD4(sc, OHCI_LS_THRESHOLD), 0);
1218 DPRINTF(" desca=0x%08jx descb=0x%08jx stat=0x%08jx",
1219 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
1220 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
1221 OREAD4(sc, OHCI_RH_STATUS), 0);
1222 DPRINTF(" port1=0x%08jx port2=0x%08jx",
1223 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
1224 OREAD4(sc, OHCI_RH_PORT_STATUS(2)), 0, 0);
1225 DPRINTF(" HCCA: frame_number=0x%04jx done_head=0x%08jx",
1226 O32TOH(sc->sc_hcca->hcca_frame_number),
1227 O32TOH(sc->sc_hcca->hcca_done_head), 0, 0);
1228 }
1229 #endif
1230
1231 Static int ohci_intr1(ohci_softc_t *);
1232
1233 int
1234 ohci_intr(void *p)
1235 {
1236 ohci_softc_t *sc = p;
1237 int ret = 0;
1238
1239 OHCIHIST_FUNC(); OHCIHIST_CALLED();
1240
1241 if (sc == NULL)
1242 return 0;
1243
1244 mutex_spin_enter(&sc->sc_intr_lock);
1245
1246 if (sc->sc_dying || !device_has_power(sc->sc_dev))
1247 goto done;
1248
1249 /* If we get an interrupt while polling, then just ignore it. */
1250 if (sc->sc_bus.ub_usepolling) {
1251 DPRINTFN(16, "ignored interrupt while polling", 0, 0, 0, 0);
1252 /* for level triggered intrs, should do something to ack */
1253 OWRITE4(sc, OHCI_INTERRUPT_STATUS,
1254 OREAD4(sc, OHCI_INTERRUPT_STATUS));
1255
1256 goto done;
1257 }
1258
1259 ret = ohci_intr1(sc);
1260
1261 done:
1262 mutex_spin_exit(&sc->sc_intr_lock);
1263 return ret;
1264 }
1265
1266 Static int
1267 ohci_intr1(ohci_softc_t *sc)
1268 {
1269 uint32_t intrs, eintrs;
1270
1271 OHCIHIST_FUNC(); OHCIHIST_CALLED();
1272
1273 /* In case the interrupt occurs before initialization has completed. */
1274 if (sc == NULL || sc->sc_hcca == NULL) {
1275 #ifdef DIAGNOSTIC
1276 printf("ohci_intr: sc->sc_hcca == NULL\n");
1277 #endif
1278 return 0;
1279 }
1280
1281 KASSERT(mutex_owned(&sc->sc_intr_lock));
1282
1283 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1284 if (!intrs)
1285 return 0;
1286
1287 /* Acknowledge */
1288 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH));
1289 eintrs = intrs & sc->sc_eintrs;
1290 DPRINTFN(7, "sc=%#jx", (uintptr_t)sc, 0, 0, 0);
1291 DPRINTFN(7, "intrs=%#jx(%#jx) eintrs=%#jx(%#jx)",
1292 intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), eintrs,
1293 sc->sc_eintrs);
1294
1295 if (!eintrs) {
1296 return 0;
1297 }
1298
1299 if (eintrs & OHCI_SO) {
1300 sc->sc_overrun_cnt++;
1301 if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
1302 printf("%s: %u scheduling overruns\n",
1303 device_xname(sc->sc_dev), sc->sc_overrun_cnt);
1304 sc->sc_overrun_cnt = 0;
1305 }
1306 /* XXX do what */
1307 eintrs &= ~OHCI_SO;
1308 }
1309 if (eintrs & OHCI_WDH) {
1310 /*
1311 * We block the interrupt below, and reenable it later from
1312 * ohci_softintr().
1313 */
1314 usb_schedsoftintr(&sc->sc_bus);
1315 }
1316 if (eintrs & OHCI_RD) {
1317 DPRINTFN(5, "resume detect sc=%#jx", (uintptr_t)sc, 0, 0, 0);
1318 printf("%s: resume detect\n", device_xname(sc->sc_dev));
1319 /* XXX process resume detect */
1320 }
1321 if (eintrs & OHCI_UE) {
1322 DPRINTFN(5, "unrecoverable error sc=%#jx", (uintptr_t)sc, 0, 0, 0);
1323 printf("%s: unrecoverable error, controller halted\n",
1324 device_xname(sc->sc_dev));
1325 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1326 /* XXX what else */
1327 }
1328 if (eintrs & OHCI_RHSC) {
1329 /*
1330 * We block the interrupt below, and reenable it later from
1331 * a timeout.
1332 */
1333 softint_schedule(sc->sc_rhsc_si);
1334 }
1335
1336 if (eintrs != 0) {
1337 /* Block unprocessed interrupts. */
1338 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
1339 sc->sc_eintrs &= ~eintrs;
1340 DPRINTF("sc %#jx blocking intrs 0x%jx", (uintptr_t)sc,
1341 eintrs, 0, 0);
1342 }
1343
1344 return 1;
1345 }
1346
1347 void
1348 ohci_rhsc_enable(void *v_sc)
1349 {
1350 ohci_softc_t *sc = v_sc;
1351
1352 OHCIHIST_FUNC(); OHCIHIST_CALLED();
1353 DPRINTF("sc %#jx", (uintptr_t)sc, 0, 0, 0);
1354 mutex_spin_enter(&sc->sc_intr_lock);
1355 sc->sc_eintrs |= OHCI_RHSC;
1356 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1357 mutex_spin_exit(&sc->sc_intr_lock);
1358 }
1359
1360 #ifdef OHCI_DEBUG
1361 const char *ohci_cc_strs[] = {
1362 "NO_ERROR",
1363 "CRC",
1364 "BIT_STUFFING",
1365 "DATA_TOGGLE_MISMATCH",
1366 "STALL",
1367 "DEVICE_NOT_RESPONDING",
1368 "PID_CHECK_FAILURE",
1369 "UNEXPECTED_PID",
1370 "DATA_OVERRUN",
1371 "DATA_UNDERRUN",
1372 "BUFFER_OVERRUN",
1373 "BUFFER_UNDERRUN",
1374 "reserved",
1375 "reserved",
1376 "NOT_ACCESSED",
1377 "NOT_ACCESSED",
1378 };
1379 #endif
1380
1381 void
1382 ohci_softintr(void *v)
1383 {
1384 struct usbd_bus *bus = v;
1385 ohci_softc_t *sc = OHCI_BUS2SC(bus);
1386 ohci_soft_itd_t *sitd, *sidone, *sitdnext;
1387 ohci_soft_td_t *std, *sdone, *stdnext;
1388 struct usbd_xfer *xfer;
1389 struct ohci_pipe *opipe;
1390 int len, cc;
1391 int i, j, actlen, iframes, uedir;
1392 ohci_physaddr_t done;
1393
1394 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
1395
1396 OHCIHIST_FUNC(); OHCIHIST_CALLED();
1397
1398 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
1399 sizeof(sc->sc_hcca->hcca_done_head),
1400 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1401 done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS;
1402 sc->sc_hcca->hcca_done_head = 0;
1403 usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
1404 sizeof(sc->sc_hcca->hcca_done_head),
1405 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1406 OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH);
1407 sc->sc_eintrs |= OHCI_WDH;
1408 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH);
1409
1410 /* Reverse the done list. */
1411 for (sdone = NULL, sidone = NULL; done != 0; ) {
1412 std = ohci_hash_find_td(sc, done);
1413 if (std != NULL) {
1414 usb_syncmem(&std->dma, std->offs, sizeof(std->td),
1415 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1416 std->dnext = sdone;
1417 done = O32TOH(std->td.td_nexttd);
1418 sdone = std;
1419 DPRINTFN(10, "add TD %#jx", (uintptr_t)std, 0, 0, 0);
1420 continue;
1421 }
1422 sitd = ohci_hash_find_itd(sc, done);
1423 if (sitd != NULL) {
1424 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
1425 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1426 sitd->dnext = sidone;
1427 done = O32TOH(sitd->itd.itd_nextitd);
1428 sidone = sitd;
1429 DPRINTFN(5, "add ITD %#jx", (uintptr_t)sitd, 0, 0, 0);
1430 continue;
1431 }
1432 DPRINTFN(10, "addr %#jx not found", (uintptr_t)done, 0, 0, 0);
1433 device_printf(sc->sc_dev, "WARNING: addr 0x%08lx not found\n",
1434 (u_long)done);
1435 break;
1436 }
1437
1438 DPRINTFN(10, "sdone=%#jx sidone=%#jx", (uintptr_t)sdone,
1439 (uintptr_t)sidone, 0, 0);
1440 DPRINTFN(10, "--- TD dump start ---", 0, 0, 0, 0);
1441 #ifdef OHCI_DEBUG
1442 if (ohcidebug >= 10) {
1443 for (std = sdone; std; std = std->dnext)
1444 ohci_dump_td(sc, std);
1445 }
1446 #endif
1447 DPRINTFN(10, "--- TD dump end ---", 0, 0, 0, 0);
1448
1449 for (std = sdone; std; std = stdnext) {
1450 xfer = std->xfer;
1451 stdnext = std->dnext;
1452 DPRINTFN(10, "std=%#jx xfer=%#jx hcpriv=%#jx", (uintptr_t)std,
1453 (uintptr_t)xfer, (uintptr_t)(xfer ? xfer->ux_hcpriv : 0),
1454 0);
1455 if (xfer == NULL) {
1456 /*
1457 * xfer == NULL: There seems to be no xfer associated
1458 * with this TD. It is tailp that happened to end up on
1459 * the done queue.
1460 * Shouldn't happen, but some chips are broken(?).
1461 */
1462 continue;
1463 }
1464
1465 /*
1466 * If software has completed it, either by cancellation
1467 * or timeout, drop it on the floor.
1468 */
1469 if (xfer->ux_status != USBD_IN_PROGRESS) {
1470 KASSERT(xfer->ux_status == USBD_CANCELLED ||
1471 xfer->ux_status == USBD_TIMEOUT);
1472 continue;
1473 }
1474
1475 /*
1476 * Cancel the timeout and the task, which have not yet
1477 * run. If they have already fired, at worst they are
1478 * waiting for the lock. They will see that the xfer
1479 * is no longer in progress and give up.
1480 */
1481 callout_stop(&xfer->ux_callout);
1482 usb_rem_task(xfer->ux_pipe->up_dev, &xfer->ux_aborttask);
1483
1484 len = std->len;
1485 if (std->td.td_cbp != 0)
1486 len -= O32TOH(std->td.td_be) -
1487 O32TOH(std->td.td_cbp) + 1;
1488 DPRINTFN(10, "len=%jd, flags=0x%jx", len, std->flags, 0, 0);
1489 if (std->flags & OHCI_ADD_LEN)
1490 xfer->ux_actlen += len;
1491
1492 cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags));
1493 if (cc == OHCI_CC_NO_ERROR) {
1494 ohci_hash_rem_td(sc, std);
1495 if (std->flags & OHCI_CALL_DONE) {
1496 xfer->ux_status = USBD_NORMAL_COMPLETION;
1497 usb_transfer_complete(xfer);
1498 }
1499 } else {
1500 /*
1501 * Endpoint is halted. First unlink all the TDs
1502 * belonging to the failed transfer, and then restart
1503 * the endpoint.
1504 */
1505 ohci_soft_td_t *p, *n;
1506 opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
1507
1508 DPRINTFN(10, "error cc=%jd", cc, 0, 0, 0);
1509
1510 /* remove xfer's TDs from the hash */
1511 for (p = std; p->xfer == xfer; p = n) {
1512 n = p->nexttd;
1513 ohci_hash_rem_td(sc, p);
1514 }
1515
1516 ohci_soft_ed_t *sed = opipe->sed;
1517
1518 /* clear halt and TD chain, preserving toggle carry */
1519 sed->ed.ed_headp = HTOO32(p->physaddr |
1520 (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY));
1521 usb_syncmem(&sed->dma,
1522 sed->offs + offsetof(ohci_ed_t, ed_headp),
1523 sizeof(sed->ed.ed_headp),
1524 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1525
1526 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1527
1528 if (cc == OHCI_CC_DATA_UNDERRUN)
1529 xfer->ux_status = USBD_NORMAL_COMPLETION;
1530 else if (cc == OHCI_CC_STALL)
1531 xfer->ux_status = USBD_STALLED;
1532 else
1533 xfer->ux_status = USBD_IOERROR;
1534 usb_transfer_complete(xfer);
1535 }
1536 }
1537 DPRINTFN(10, "--- ITD dump start ---", 0, 0, 0, 0);
1538 #ifdef OHCI_DEBUG
1539 if (ohcidebug >= 10) {
1540 for (sitd = sidone; sitd; sitd = sitd->dnext)
1541 ohci_dump_itd(sc, sitd);
1542 }
1543 #endif
1544 DPRINTFN(10, "--- ITD dump end ---", 0, 0, 0, 0);
1545
1546 for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
1547 xfer = sitd->xfer;
1548 sitdnext = sitd->dnext;
1549 DPRINTFN(1, "sitd=%#jx xfer=%#jx hcpriv=%#jx", (uintptr_t)sitd,
1550 (uintptr_t)xfer, (uintptr_t)(xfer ? xfer->ux_hcpriv : 0),
1551 0);
1552 if (xfer == NULL)
1553 continue;
1554
1555 /*
1556 * If software has completed it, either by cancellation
1557 * or timeout, drop it on the floor.
1558 */
1559 if (xfer->ux_status != USBD_IN_PROGRESS) {
1560 KASSERT(xfer->ux_status == USBD_CANCELLED ||
1561 xfer->ux_status == USBD_TIMEOUT);
1562 continue;
1563 }
1564
1565 /*
1566 * Cancel the timeout and the task, which have not yet
1567 * run. If they have already fired, at worst they are
1568 * waiting for the lock. They will see that the xfer
1569 * is no longer in progress and give up.
1570 */
1571 callout_stop(&xfer->ux_callout);
1572 usb_rem_task(xfer->ux_pipe->up_dev, &xfer->ux_aborttask);
1573
1574 KASSERT(!sitd->isdone);
1575 #ifdef DIAGNOSTIC
1576 sitd->isdone = true;
1577 #endif
1578 if (sitd->flags & OHCI_CALL_DONE) {
1579 ohci_soft_itd_t *next;
1580
1581 opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
1582 opipe->isoc.inuse -= xfer->ux_nframes;
1583 uedir = UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->
1584 bEndpointAddress);
1585 xfer->ux_status = USBD_NORMAL_COMPLETION;
1586 actlen = 0;
1587 for (i = 0, sitd = xfer->ux_hcpriv;;
1588 sitd = next) {
1589 next = sitd->nextitd;
1590 if (OHCI_ITD_GET_CC(O32TOH(sitd->
1591 itd.itd_flags)) != OHCI_CC_NO_ERROR)
1592 xfer->ux_status = USBD_IOERROR;
1593 /* For input, update frlengths with actual */
1594 /* XXX anything necessary for output? */
1595 if (uedir == UE_DIR_IN &&
1596 xfer->ux_status == USBD_NORMAL_COMPLETION) {
1597 iframes = OHCI_ITD_GET_FC(O32TOH(
1598 sitd->itd.itd_flags));
1599 for (j = 0; j < iframes; i++, j++) {
1600 len = O16TOH(sitd->
1601 itd.itd_offset[j]);
1602 if ((OHCI_ITD_PSW_GET_CC(len) &
1603 OHCI_CC_NOT_ACCESSED_MASK)
1604 == OHCI_CC_NOT_ACCESSED)
1605 len = 0;
1606 else
1607 len = OHCI_ITD_PSW_LENGTH(len);
1608 xfer->ux_frlengths[i] = len;
1609 actlen += len;
1610 }
1611 }
1612 if (sitd->flags & OHCI_CALL_DONE)
1613 break;
1614 ohci_hash_rem_itd(sc, sitd);
1615
1616 }
1617 ohci_hash_rem_itd(sc, sitd);
1618 if (uedir == UE_DIR_IN &&
1619 xfer->ux_status == USBD_NORMAL_COMPLETION)
1620 xfer->ux_actlen = actlen;
1621 xfer->ux_hcpriv = NULL;
1622
1623 usb_transfer_complete(xfer);
1624 }
1625 }
1626
1627 DPRINTFN(10, "done", 0, 0, 0, 0);
1628 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
1629 }
1630
1631 void
1632 ohci_device_ctrl_done(struct usbd_xfer *xfer)
1633 {
1634 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
1635 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer);
1636 int len = UGETW(xfer->ux_request.wLength);
1637 int isread = (xfer->ux_request.bmRequestType & UT_READ);
1638
1639 OHCIHIST_FUNC(); OHCIHIST_CALLED();
1640 DPRINTFN(10, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0);
1641
1642 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
1643 KASSERT(xfer->ux_rqflags & URQ_REQUEST);
1644
1645 if (len)
1646 usb_syncmem(&xfer->ux_dmabuf, 0, len,
1647 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1648 usb_syncmem(&opipe->ctrl.reqdma, 0,
1649 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE);
1650 }
1651
1652 void
1653 ohci_device_intr_done(struct usbd_xfer *xfer)
1654 {
1655 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer);
1656 int isread =
1657 (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN);
1658
1659 OHCIHIST_FUNC(); OHCIHIST_CALLED();
1660 DPRINTFN(10, "xfer=%#jx, actlen=%jd", (uintptr_t)xfer,
1661 xfer->ux_actlen, 0, 0);
1662
1663 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
1664
1665 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length,
1666 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1667 }
1668
1669 void
1670 ohci_device_bulk_done(struct usbd_xfer *xfer)
1671 {
1672 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer);
1673
1674 int isread =
1675 (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN);
1676
1677 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
1678
1679 OHCIHIST_FUNC(); OHCIHIST_CALLED();
1680 DPRINTFN(10, "xfer=%#jx, actlen=%jd", (uintptr_t)xfer, xfer->ux_actlen,
1681 0, 0);
1682 usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length,
1683 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1684 }
1685
1686 Static void
1687 ohci_rhsc_softint(void *arg)
1688 {
1689 ohci_softc_t *sc = arg;
1690
1691 mutex_enter(&sc->sc_lock);
1692
1693 ohci_rhsc(sc, sc->sc_intrxfer);
1694
1695 /* Do not allow RHSC interrupts > 1 per second */
1696 callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
1697
1698 mutex_exit(&sc->sc_lock);
1699 }
1700
1701 void
1702 ohci_rhsc(ohci_softc_t *sc, struct usbd_xfer *xfer)
1703 {
1704 u_char *p;
1705 int i, m;
1706 int hstatus __unused;
1707 OHCIHIST_FUNC(); OHCIHIST_CALLED();
1708
1709 KASSERT(mutex_owned(&sc->sc_lock));
1710
1711 hstatus = OREAD4(sc, OHCI_RH_STATUS);
1712 DPRINTF("sc=%#jx xfer=%#jx hstatus=0x%08jx", (uintptr_t)sc,
1713 (uintptr_t)xfer, hstatus, 0);
1714
1715 if (xfer == NULL) {
1716 /* Just ignore the change. */
1717 return;
1718 }
1719
1720 p = xfer->ux_buf;
1721 m = uimin(sc->sc_noport, xfer->ux_length * 8 - 1);
1722 memset(p, 0, xfer->ux_length);
1723 for (i = 1; i <= m; i++) {
1724 /* Pick out CHANGE bits from the status reg. */
1725 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1726 p[i/8] |= 1 << (i%8);
1727 }
1728 DPRINTF("change=0x%02jx", *p, 0, 0, 0);
1729 xfer->ux_actlen = xfer->ux_length;
1730 xfer->ux_status = USBD_NORMAL_COMPLETION;
1731
1732 usb_transfer_complete(xfer);
1733 }
1734
1735 void
1736 ohci_root_intr_done(struct usbd_xfer *xfer)
1737 {
1738 ohci_softc_t *sc = OHCI_XFER2SC(xfer);
1739
1740 KASSERT(mutex_owned(&sc->sc_lock));
1741
1742 KASSERT(sc->sc_intrxfer == xfer);
1743 sc->sc_intrxfer = NULL;
1744 }
1745
1746 void
1747 ohci_poll(struct usbd_bus *bus)
1748 {
1749 ohci_softc_t *sc = OHCI_BUS2SC(bus);
1750 OHCIHIST_FUNC(); OHCIHIST_CALLED();
1751
1752 #ifdef OHCI_DEBUG
1753 static int last;
1754 int new;
1755 new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1756 if (new != last) {
1757 DPRINTFN(10, "intrs=0x%04jx", new, 0, 0, 0);
1758 last = new;
1759 }
1760 #endif
1761 sc->sc_eintrs |= OHCI_WDH;
1762 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) {
1763 mutex_spin_enter(&sc->sc_intr_lock);
1764 ohci_intr1(sc);
1765 mutex_spin_exit(&sc->sc_intr_lock);
1766 }
1767 }
1768
1769 /*
1770 * Add an ED to the schedule. Called with USB lock held.
1771 */
1772 Static void
1773 ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1774 {
1775 OHCIHIST_FUNC(); OHCIHIST_CALLED();
1776 DPRINTFN(8, "sed=%#jx head=%#jx", (uintptr_t)sed, (uintptr_t)head, 0,
1777 0);
1778
1779 KASSERT(mutex_owned(&sc->sc_lock));
1780
1781 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
1782 sizeof(head->ed.ed_nexted),
1783 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1784 sed->next = head->next;
1785 sed->ed.ed_nexted = head->ed.ed_nexted;
1786 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
1787 sizeof(sed->ed.ed_nexted),
1788 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1789 head->next = sed;
1790 head->ed.ed_nexted = HTOO32(sed->physaddr);
1791 usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
1792 sizeof(head->ed.ed_nexted),
1793 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1794 }
1795
1796 /*
1797 * Remove an ED from the schedule. Called with USB lock held.
1798 */
1799 Static void
1800 ohci_rem_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1801 {
1802 ohci_soft_ed_t *p;
1803
1804 KASSERT(mutex_owned(&sc->sc_lock));
1805
1806 /* XXX */
1807 for (p = head; p != NULL && p->next != sed; p = p->next)
1808 ;
1809 KASSERT(p != NULL);
1810
1811 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
1812 sizeof(sed->ed.ed_nexted),
1813 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1814 p->next = sed->next;
1815 p->ed.ed_nexted = sed->ed.ed_nexted;
1816 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
1817 sizeof(p->ed.ed_nexted),
1818 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1819 }
1820
1821 /*
1822 * When a transfer is completed the TD is added to the done queue by
1823 * the host controller. This queue is the processed by software.
1824 * Unfortunately the queue contains the physical address of the TD
1825 * and we have no simple way to translate this back to a kernel address.
1826 * To make the translation possible (and fast) we use a hash table of
1827 * TDs currently in the schedule. The physical address is used as the
1828 * hash value.
1829 */
1830
1831 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1832 /* Called with USB lock held. */
1833 void
1834 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1835 {
1836 int h = HASH(std->physaddr);
1837
1838 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
1839
1840 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1841 }
1842
1843 /* Called with USB lock held. */
1844 void
1845 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1846 {
1847
1848 KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
1849
1850 LIST_REMOVE(std, hnext);
1851 }
1852
1853 ohci_soft_td_t *
1854 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
1855 {
1856 int h = HASH(a);
1857 ohci_soft_td_t *std;
1858
1859 for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1860 std != NULL;
1861 std = LIST_NEXT(std, hnext))
1862 if (std->physaddr == a)
1863 return std;
1864 return NULL;
1865 }
1866
1867 /* Called with USB lock held. */
1868 void
1869 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1870 {
1871 int h = HASH(sitd->physaddr);
1872
1873 OHCIHIST_FUNC(); OHCIHIST_CALLED();
1874
1875 KASSERT(mutex_owned(&sc->sc_lock));
1876
1877 DPRINTFN(10, "sitd=%#jx physaddr=0x%08jx",
1878 (uintptr_t)sitd, (u_long)sitd->physaddr, 0, 0);
1879
1880 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
1881 }
1882
1883 /* Called with USB lock held. */
1884 void
1885 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1886 {
1887
1888 OHCIHIST_FUNC(); OHCIHIST_CALLED();
1889
1890 KASSERT(mutex_owned(&sc->sc_lock));
1891
1892 DPRINTFN(10, "sitd=%#jx physaddr=0x%08jx", (uintptr_t)sitd,
1893 sitd->physaddr, 0, 0);
1894
1895 LIST_REMOVE(sitd, hnext);
1896 }
1897
1898 ohci_soft_itd_t *
1899 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
1900 {
1901 int h = HASH(a);
1902 ohci_soft_itd_t *sitd;
1903
1904 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
1905 sitd != NULL;
1906 sitd = LIST_NEXT(sitd, hnext))
1907 if (sitd->physaddr == a)
1908 return sitd;
1909 return NULL;
1910 }
1911
1912 void
1913 ohci_timeout(void *addr)
1914 {
1915 OHCIHIST_FUNC(); OHCIHIST_CALLED();
1916 struct usbd_xfer *xfer = addr;
1917 ohci_softc_t *sc = OHCI_XFER2SC(xfer);
1918 struct usbd_device *dev = xfer->ux_pipe->up_dev;
1919
1920 DPRINTF("xfer=%#jx", (uintptr_t)xfer, 0, 0, 0);
1921
1922 mutex_enter(&sc->sc_lock);
1923 if (!sc->sc_dying && xfer->ux_status == USBD_IN_PROGRESS)
1924 usb_add_task(dev, &xfer->ux_aborttask, USB_TASKQ_HC);
1925 mutex_exit(&sc->sc_lock);
1926 }
1927
1928 void
1929 ohci_timeout_task(void *addr)
1930 {
1931 struct usbd_xfer *xfer = addr;
1932 ohci_softc_t *sc = OHCI_XFER2SC(xfer);
1933
1934 OHCIHIST_FUNC(); OHCIHIST_CALLED();
1935
1936 DPRINTF("xfer=%#jx", (uintptr_t)xfer, 0, 0, 0);
1937
1938 mutex_enter(&sc->sc_lock);
1939 ohci_abort_xfer(xfer, USBD_TIMEOUT);
1940 mutex_exit(&sc->sc_lock);
1941 }
1942
1943 #ifdef OHCI_DEBUG
1944 void
1945 ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std)
1946 {
1947 for (; std; std = std->nexttd) {
1948 ohci_dump_td(sc, std);
1949 KASSERTMSG(std->nexttd == NULL || std != std->nexttd,
1950 "std %p next %p", std, std->nexttd);
1951 }
1952 }
1953
1954 void
1955 ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1956 {
1957 OHCIHIST_FUNC(); OHCIHIST_CALLED();
1958
1959 usb_syncmem(&std->dma, std->offs, sizeof(std->td),
1960 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1961
1962 uint32_t flags = O32TOH(std->td.td_flags);
1963 DPRINTF("TD(%#jx) at 0x%08jx:", (uintptr_t)std, std->physaddr, 0, 0);
1964 DPRINTF(" round=%jd DP=%jx DI=%jx T=%jx",
1965 !!(flags & OHCI_TD_R),
1966 __SHIFTOUT(flags, OHCI_TD_DP_MASK),
1967 OHCI_TD_GET_DI(flags),
1968 __SHIFTOUT(flags, OHCI_TD_TOGGLE_MASK));
1969 DPRINTF(" EC=%jd CC=%jd", OHCI_TD_GET_EC(flags),
1970 OHCI_TD_GET_CC(flags), 0, 0);
1971 DPRINTF(" td_cbp=0x%08jx td_nexttd=0x%08jx td_be=0x%08jx",
1972 (u_long)O32TOH(std->td.td_cbp),
1973 (u_long)O32TOH(std->td.td_nexttd),
1974 (u_long)O32TOH(std->td.td_be), 0);
1975 }
1976
1977 void
1978 ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1979 {
1980 OHCIHIST_FUNC(); OHCIHIST_CALLED();
1981
1982 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
1983 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1984
1985 uint32_t flags = O32TOH(sitd->itd.itd_flags);
1986 DPRINTF("ITD(%#jx) at 0x%08jx", (uintptr_t)sitd, sitd->physaddr, 0, 0);
1987 DPRINTF(" sf=%jd di=%jd fc=%jd cc=%jd",
1988 OHCI_ITD_GET_SF(flags), OHCI_ITD_GET_DI(flags),
1989 OHCI_ITD_GET_FC(flags), OHCI_ITD_GET_CC(flags));
1990 DPRINTF(" bp0=0x%08jx next=0x%08jx be=0x%08jx",
1991 O32TOH(sitd->itd.itd_bp0),
1992 O32TOH(sitd->itd.itd_nextitd),
1993 O32TOH(sitd->itd.itd_be), 0);
1994 CTASSERT(OHCI_ITD_NOFFSET == 8);
1995 DPRINTF(" offs[0] = 0x%04jx offs[1] = 0x%04jx "
1996 "offs[2] = 0x%04jx offs[3] = 0x%04jx",
1997 O16TOH(sitd->itd.itd_offset[0]),
1998 O16TOH(sitd->itd.itd_offset[1]),
1999 O16TOH(sitd->itd.itd_offset[2]),
2000 O16TOH(sitd->itd.itd_offset[3]));
2001 DPRINTF(" offs[4] = 0x%04jx offs[5] = 0x%04jx "
2002 "offs[6] = 0x%04jx offs[7] = 0x%04jx",
2003 O16TOH(sitd->itd.itd_offset[4]),
2004 O16TOH(sitd->itd.itd_offset[5]),
2005 O16TOH(sitd->itd.itd_offset[6]),
2006 O16TOH(sitd->itd.itd_offset[7]));
2007 }
2008
2009 void
2010 ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
2011 {
2012 for (; sitd; sitd = sitd->nextitd)
2013 ohci_dump_itd(sc, sitd);
2014 }
2015
2016 void
2017 ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
2018 {
2019 OHCIHIST_FUNC(); OHCIHIST_CALLED();
2020
2021 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2022 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2023
2024 uint32_t flags = O32TOH(sed->ed.ed_flags);
2025 DPRINTF("ED(%#jx) at 0x%08jx:", (uintptr_t)sed, sed->physaddr, 0, 0);
2026 DPRINTF(" addr=%jd endpt=%jd maxp=%jd",
2027 OHCI_ED_GET_FA(flags),
2028 OHCI_ED_GET_EN(flags),
2029 OHCI_ED_GET_MAXP(flags),
2030 0);
2031 DPRINTF(" dir=%jd speed=%jd skip=%jd iso=%jd",
2032 __SHIFTOUT(flags, OHCI_ED_DIR_MASK),
2033 !!(flags & OHCI_ED_SPEED),
2034 !!(flags & OHCI_ED_SKIP),
2035 !!(flags & OHCI_ED_FORMAT_ISO));
2036 DPRINTF(" tailp=0x%08jx", (u_long)O32TOH(sed->ed.ed_tailp),
2037 0, 0, 0);
2038 DPRINTF(" headp=0x%08jx nexted=0x%08jx halted=%jd carry=%jd",
2039 O32TOH(sed->ed.ed_headp), O32TOH(sed->ed.ed_nexted),
2040 !!(O32TOH(sed->ed.ed_headp) & OHCI_HALTED),
2041 !!(O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY));
2042 }
2043 #endif
2044
2045 usbd_status
2046 ohci_open(struct usbd_pipe *pipe)
2047 {
2048 struct usbd_device *dev = pipe->up_dev;
2049 struct usbd_bus *bus = dev->ud_bus;
2050 ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
2051 usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc;
2052 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
2053 uint8_t addr = dev->ud_addr;
2054 uint8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
2055 ohci_soft_ed_t *sed;
2056 ohci_soft_td_t *std;
2057 ohci_soft_itd_t *sitd;
2058 ohci_physaddr_t tdphys;
2059 uint32_t fmt;
2060 usbd_status err = USBD_NOMEM;
2061 int ival;
2062
2063 OHCIHIST_FUNC(); OHCIHIST_CALLED();
2064 DPRINTFN(1, "pipe=%#jx, addr=%jd, endpt=%jd (%jd)", (uintptr_t)pipe,
2065 addr, ed->bEndpointAddress, bus->ub_rhaddr);
2066
2067 if (sc->sc_dying) {
2068 return USBD_IOERROR;
2069 }
2070
2071 std = NULL;
2072 sed = NULL;
2073
2074 if (addr == bus->ub_rhaddr) {
2075 switch (ed->bEndpointAddress) {
2076 case USB_CONTROL_ENDPOINT:
2077 pipe->up_methods = &roothub_ctrl_methods;
2078 break;
2079 case UE_DIR_IN | USBROOTHUB_INTR_ENDPT:
2080 pipe->up_methods = &ohci_root_intr_methods;
2081 break;
2082 default:
2083 err = USBD_INVAL;
2084 goto bad;
2085 }
2086 } else {
2087 sed = ohci_alloc_sed(sc);
2088 if (sed == NULL)
2089 goto bad;
2090 opipe->sed = sed;
2091 if (xfertype == UE_ISOCHRONOUS) {
2092 sitd = ohci_alloc_sitd(sc);
2093 if (sitd == NULL)
2094 goto bad;
2095
2096 opipe->tail.itd = sitd;
2097 tdphys = sitd->physaddr;
2098 fmt = OHCI_ED_FORMAT_ISO;
2099 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
2100 fmt |= OHCI_ED_DIR_IN;
2101 else
2102 fmt |= OHCI_ED_DIR_OUT;
2103 } else {
2104 std = ohci_alloc_std(sc);
2105 if (std == NULL)
2106 goto bad;
2107
2108 opipe->tail.td = std;
2109 tdphys = std->physaddr;
2110 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
2111 }
2112 sed->ed.ed_flags = HTOO32(
2113 OHCI_ED_SET_FA(addr) |
2114 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
2115 (dev->ud_speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
2116 fmt |
2117 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
2118 sed->ed.ed_headp = HTOO32(tdphys |
2119 (pipe->up_endpoint->ue_toggle ? OHCI_TOGGLECARRY : 0));
2120 sed->ed.ed_tailp = HTOO32(tdphys);
2121 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2122 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2123
2124 switch (xfertype) {
2125 case UE_CONTROL:
2126 pipe->up_methods = &ohci_device_ctrl_methods;
2127 err = usb_allocmem(&sc->sc_bus,
2128 sizeof(usb_device_request_t),
2129 0, &opipe->ctrl.reqdma);
2130 if (err)
2131 goto bad;
2132 mutex_enter(&sc->sc_lock);
2133 ohci_add_ed(sc, sed, sc->sc_ctrl_head);
2134 mutex_exit(&sc->sc_lock);
2135 break;
2136 case UE_INTERRUPT:
2137 pipe->up_methods = &ohci_device_intr_methods;
2138 ival = pipe->up_interval;
2139 if (ival == USBD_DEFAULT_INTERVAL)
2140 ival = ed->bInterval;
2141 err = ohci_device_setintr(sc, opipe, ival);
2142 if (err)
2143 goto bad;
2144 break;
2145 case UE_ISOCHRONOUS:
2146 pipe->up_serialise = false;
2147 pipe->up_methods = &ohci_device_isoc_methods;
2148 return ohci_setup_isoc(pipe);
2149 case UE_BULK:
2150 pipe->up_methods = &ohci_device_bulk_methods;
2151 mutex_enter(&sc->sc_lock);
2152 ohci_add_ed(sc, sed, sc->sc_bulk_head);
2153 mutex_exit(&sc->sc_lock);
2154 break;
2155 }
2156 }
2157
2158 return USBD_NORMAL_COMPLETION;
2159
2160 bad:
2161 if (std != NULL) {
2162 ohci_free_std(sc, std);
2163 }
2164 if (sed != NULL)
2165 ohci_free_sed(sc, sed);
2166 return err;
2167
2168 }
2169
2170 /*
2171 * Close a reqular pipe.
2172 * Assumes that there are no pending transactions.
2173 */
2174 void
2175 ohci_close_pipe(struct usbd_pipe *pipe, ohci_soft_ed_t *head)
2176 {
2177 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
2178 ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
2179 ohci_soft_ed_t *sed = opipe->sed;
2180
2181 KASSERT(mutex_owned(&sc->sc_lock));
2182
2183 #ifdef DIAGNOSTIC
2184 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
2185 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2186 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) {
2187 ohci_soft_td_t *std;
2188 std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp));
2189 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
2190 "tl=0x%x pipe=%p, std=%p\n", sed,
2191 (int)O32TOH(sed->ed.ed_headp),
2192 (int)O32TOH(sed->ed.ed_tailp),
2193 pipe, std);
2194 #ifdef OHCI_DEBUG
2195 usbd_dump_pipe(&opipe->pipe);
2196 ohci_dump_ed(sc, sed);
2197 if (std)
2198 ohci_dump_td(sc, std);
2199 #endif
2200 usb_delay_ms(&sc->sc_bus, 2);
2201 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2202 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
2203 printf("ohci_close_pipe: pipe still not empty\n");
2204 }
2205 #endif
2206 ohci_rem_ed(sc, sed, head);
2207 /* Make sure the host controller is not touching this ED */
2208 usb_delay_ms(&sc->sc_bus, 1);
2209 pipe->up_endpoint->ue_toggle =
2210 (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0;
2211 ohci_free_sed_locked(sc, opipe->sed);
2212 }
2213
2214 /*
2215 * Cancel or timeout a device request. We have two cases to deal with
2216 *
2217 * 1) A driver wants to stop scheduled or inflight transfers
2218 * 2) A transfer has timed out
2219 *
2220 * It's impossible to guarantee that the requested transfer will not
2221 * have (partially) happened since the hardware runs concurrently.
2222 *
2223 * Transfer state is protected by the bus lock and we set the transfer status
2224 * as soon as either of the above happens (with bus lock held).
2225 *
2226 * Then we arrange for the hardware to tells us that it is not still
2227 * processing the TDs by setting the sKip bit and requesting a SOF interrupt
2228 *
2229 * Once we see the SOF interrupt we can check the transfer TDs/iTDs to see if
2230 * they've been processed and either
2231 * a) if they're unused recover them for later use, or
2232 * b) if they've been used allocate new TD/iTDs to replace those
2233 * used. The softint handler will free the old ones.
2234 */
2235 void
2236 ohci_abort_xfer(struct usbd_xfer *xfer, usbd_status status)
2237 {
2238 OHCIHIST_FUNC(); OHCIHIST_CALLED();
2239 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
2240 ohci_softc_t *sc = OHCI_XFER2SC(xfer);
2241 ohci_soft_ed_t *sed = opipe->sed;
2242 ohci_soft_td_t *p, *n;
2243 ohci_physaddr_t headp;
2244 int hit;
2245
2246 KASSERTMSG((status == USBD_CANCELLED || status == USBD_TIMEOUT),
2247 "invalid status for abort: %d", (int)status);
2248
2249 DPRINTF("xfer=%#jx pipe=%#jx sed=%#jx", (uintptr_t)xfer,
2250 (uintptr_t)opipe, (uintptr_t)sed, 0);
2251
2252 KASSERT(mutex_owned(&sc->sc_lock));
2253 ASSERT_SLEEPABLE();
2254
2255 if (status == USBD_CANCELLED) {
2256 /*
2257 * We are synchronously aborting. Try to stop the
2258 * callout and task, but if we can't, wait for them to
2259 * complete.
2260 */
2261 callout_halt(&xfer->ux_callout, &sc->sc_lock);
2262 usb_rem_task_wait(xfer->ux_pipe->up_dev, &xfer->ux_aborttask,
2263 USB_TASKQ_HC, &sc->sc_lock);
2264 } else {
2265 /* Otherwise, we are timing out. */
2266 KASSERT(status == USBD_TIMEOUT);
2267 }
2268
2269 /*
2270 * The xfer cannot have been cancelled already. It is the
2271 * responsibility of the caller of usbd_abort_pipe not to try
2272 * to abort a pipe multiple times, whether concurrently or
2273 * sequentially.
2274 */
2275 KASSERT(xfer->ux_status != USBD_CANCELLED);
2276
2277 /* Only the timeout, which runs only once, can time it out. */
2278 KASSERT(xfer->ux_status != USBD_TIMEOUT);
2279
2280 /* If anyone else beat us, we're done. */
2281 if (xfer->ux_status != USBD_IN_PROGRESS)
2282 return;
2283
2284 /* We beat everyone else. Claim the status. */
2285 xfer->ux_status = status;
2286
2287 /*
2288 * If we're dying, skip the hardware action and just notify the
2289 * software that we're done.
2290 */
2291 if (sc->sc_dying) {
2292 DPRINTFN(4, "xfer %#jx dying %ju", (uintptr_t)xfer,
2293 xfer->ux_status, 0, 0);
2294 goto dying;
2295 }
2296
2297 /*
2298 * HC Step 1: Unless the endpoint is already halted, we set the endpoint
2299 * descriptor sKip bit and wait for hardware to complete processing.
2300 *
2301 * This includes ensuring that any TDs of the transfer that got onto
2302 * the done list are also removed. We ensure this by waiting for
2303 * both a WDH and SOF interrupt.
2304 */
2305 DPRINTFN(1, "stop ed=%#jx", (uintptr_t)sed, 0, 0, 0);
2306 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2307 sizeof(sed->ed.ed_flags),
2308 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2309 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
2310 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2311 sizeof(sed->ed.ed_flags),
2312 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2313
2314 /*
2315 * HC Step 2: Wait until we know hardware has finished any possible
2316 * use of the xfer.
2317 */
2318 /* Hardware finishes in 1ms */
2319 usb_delay_ms_locked(opipe->pipe.up_dev->ud_bus, 20, &sc->sc_lock);
2320
2321 /*
2322 * HC Step 3: Remove any vestiges of the xfer from the hardware.
2323 * The complication here is that the hardware may have executed
2324 * beyond the xfer we're trying to abort. So as we're scanning
2325 * the TDs of this xfer we check if the hardware points to
2326 * any of them.
2327 */
2328 p = xfer->ux_hcpriv;
2329 KASSERT(p);
2330
2331 #ifdef OHCI_DEBUG
2332 DPRINTF("--- dump start ---", 0, 0, 0, 0);
2333
2334 if (ohcidebug >= 2) {
2335 DPRINTF("sed:", 0, 0, 0, 0);
2336 ohci_dump_ed(sc, sed);
2337 ohci_dump_tds(sc, p);
2338 }
2339 DPRINTF("--- dump end ---", 0, 0, 0, 0);
2340 #endif
2341 headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK;
2342 hit = 0;
2343 for (; p->xfer == xfer; p = n) {
2344 hit |= headp == p->physaddr;
2345 n = p->nexttd;
2346 ohci_hash_rem_td(sc, p);
2347 }
2348 /* Zap headp register if hardware pointed inside the xfer. */
2349 if (hit) {
2350 DPRINTFN(1, "set hd=0x%08jx, tl=0x%08jx", (int)p->physaddr,
2351 (int)O32TOH(sed->ed.ed_tailp), 0, 0);
2352 /* unlink TDs, preserving toggle carry */
2353 sed->ed.ed_headp = HTOO32(p->physaddr |
2354 (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY));
2355 usb_syncmem(&sed->dma,
2356 sed->offs + offsetof(ohci_ed_t, ed_headp),
2357 sizeof(sed->ed.ed_headp),
2358 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2359 } else {
2360 DPRINTFN(1, "no hit", 0, 0, 0, 0);
2361 }
2362
2363 /*
2364 * HC Step 4: Turn on hardware again.
2365 */
2366 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2367 sizeof(sed->ed.ed_flags),
2368 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2369 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
2370 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2371 sizeof(sed->ed.ed_flags),
2372 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2373
2374 /*
2375 * Final step: Notify completion to waiting xfers.
2376 */
2377 dying:
2378 usb_transfer_complete(xfer);
2379 DPRINTFN(14, "end", 0, 0, 0, 0);
2380
2381 KASSERT(mutex_owned(&sc->sc_lock));
2382 }
2383
2384 /*
2385 * Data structures and routines to emulate the root hub.
2386 */
2387 Static int
2388 ohci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req,
2389 void *buf, int buflen)
2390 {
2391 ohci_softc_t *sc = OHCI_BUS2SC(bus);
2392 usb_port_status_t ps;
2393 uint16_t len, value, index;
2394 int l, totlen = 0;
2395 int port, i;
2396 uint32_t v;
2397
2398 OHCIHIST_FUNC(); OHCIHIST_CALLED();
2399
2400 if (sc->sc_dying)
2401 return -1;
2402
2403 DPRINTFN(4, "type=0x%02jx request=%02jx", req->bmRequestType,
2404 req->bRequest, 0, 0);
2405
2406 len = UGETW(req->wLength);
2407 value = UGETW(req->wValue);
2408 index = UGETW(req->wIndex);
2409
2410 #define C(x,y) ((x) | ((y) << 8))
2411 switch (C(req->bRequest, req->bmRequestType)) {
2412 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2413 DPRINTFN(8, "wValue=0x%04jx", value, 0, 0, 0);
2414 if (len == 0)
2415 break;
2416 switch (value) {
2417 #define sd ((usb_string_descriptor_t *)buf)
2418 case C(2, UDESC_STRING):
2419 /* Product */
2420 totlen = usb_makestrdesc(sd, len, "OHCI root hub");
2421 break;
2422 #undef sd
2423 default:
2424 /* default from usbroothub */
2425 return buflen;
2426 }
2427 break;
2428
2429 /* Hub requests */
2430 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2431 break;
2432 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2433 DPRINTFN(8, "UR_CLEAR_PORT_FEATURE port=%jd feature=%jd",
2434 index, value, 0, 0);
2435 if (index < 1 || index > sc->sc_noport) {
2436 return -1;
2437 }
2438 port = OHCI_RH_PORT_STATUS(index);
2439 switch(value) {
2440 case UHF_PORT_ENABLE:
2441 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2442 break;
2443 case UHF_PORT_SUSPEND:
2444 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2445 break;
2446 case UHF_PORT_POWER:
2447 /* Yes, writing to the LOW_SPEED bit clears power. */
2448 OWRITE4(sc, port, UPS_LOW_SPEED);
2449 break;
2450 case UHF_C_PORT_CONNECTION:
2451 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2452 break;
2453 case UHF_C_PORT_ENABLE:
2454 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2455 break;
2456 case UHF_C_PORT_SUSPEND:
2457 OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2458 break;
2459 case UHF_C_PORT_OVER_CURRENT:
2460 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2461 break;
2462 case UHF_C_PORT_RESET:
2463 OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2464 break;
2465 default:
2466 return -1;
2467 }
2468 switch(value) {
2469 case UHF_C_PORT_CONNECTION:
2470 case UHF_C_PORT_ENABLE:
2471 case UHF_C_PORT_SUSPEND:
2472 case UHF_C_PORT_OVER_CURRENT:
2473 case UHF_C_PORT_RESET:
2474 /* Enable RHSC interrupt if condition is cleared. */
2475 if ((OREAD4(sc, port) >> 16) == 0)
2476 ohci_rhsc_enable(sc);
2477 break;
2478 default:
2479 break;
2480 }
2481 break;
2482 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2483 if (len == 0)
2484 break;
2485 if ((value & 0xff) != 0) {
2486 return -1;
2487 }
2488 usb_hub_descriptor_t hubd;
2489
2490 totlen = uimin(buflen, sizeof(hubd));
2491 memcpy(&hubd, buf, totlen);
2492
2493 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2494 hubd.bNbrPorts = sc->sc_noport;
2495 USETW(hubd.wHubCharacteristics,
2496 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2497 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2498 /* XXX overcurrent */
2499 );
2500 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2501 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2502 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2503 hubd.DeviceRemovable[i++] = (uint8_t)v;
2504 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2505 totlen = uimin(totlen, hubd.bDescLength);
2506 memcpy(buf, &hubd, totlen);
2507 break;
2508 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2509 if (len != 4) {
2510 return -1;
2511 }
2512 memset(buf, 0, len); /* ? XXX */
2513 totlen = len;
2514 break;
2515 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2516 DPRINTFN(8, "get port status i=%jd", index, 0, 0, 0);
2517 if (index < 1 || index > sc->sc_noport) {
2518 return -1;
2519 }
2520 if (len != 4) {
2521 return -1;
2522 }
2523 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2524 DPRINTFN(8, "port status=0x%04jx", v, 0, 0, 0);
2525 USETW(ps.wPortStatus, v);
2526 USETW(ps.wPortChange, v >> 16);
2527 totlen = uimin(len, sizeof(ps));
2528 memcpy(buf, &ps, totlen);
2529 break;
2530 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2531 return -1;
2532 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2533 break;
2534 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2535 if (index < 1 || index > sc->sc_noport) {
2536 return -1;
2537 }
2538 port = OHCI_RH_PORT_STATUS(index);
2539 switch(value) {
2540 case UHF_PORT_ENABLE:
2541 OWRITE4(sc, port, UPS_PORT_ENABLED);
2542 break;
2543 case UHF_PORT_SUSPEND:
2544 OWRITE4(sc, port, UPS_SUSPEND);
2545 break;
2546 case UHF_PORT_RESET:
2547 DPRINTFN(5, "reset port %jd", index, 0, 0, 0);
2548 OWRITE4(sc, port, UPS_RESET);
2549 for (i = 0; i < 5; i++) {
2550 usb_delay_ms(&sc->sc_bus,
2551 USB_PORT_ROOT_RESET_DELAY);
2552 if (sc->sc_dying) {
2553 return -1;
2554 }
2555 if ((OREAD4(sc, port) & UPS_RESET) == 0)
2556 break;
2557 }
2558 DPRINTFN(8, "port %jd reset, status = 0x%04jx", index,
2559 OREAD4(sc, port), 0, 0);
2560 break;
2561 case UHF_PORT_POWER:
2562 DPRINTFN(2, "set port power %jd", index, 0, 0, 0);
2563 OWRITE4(sc, port, UPS_PORT_POWER);
2564 break;
2565 default:
2566 return -1;
2567 }
2568 break;
2569 default:
2570 /* default from usbroothub */
2571 return buflen;
2572 }
2573
2574 return totlen;
2575 }
2576
2577 Static usbd_status
2578 ohci_root_intr_transfer(struct usbd_xfer *xfer)
2579 {
2580 ohci_softc_t *sc = OHCI_XFER2SC(xfer);
2581 usbd_status err;
2582
2583 /* Insert last in queue. */
2584 mutex_enter(&sc->sc_lock);
2585 err = usb_insert_transfer(xfer);
2586 mutex_exit(&sc->sc_lock);
2587 if (err)
2588 return err;
2589
2590 /* Pipe isn't running, start first */
2591 return ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
2592 }
2593
2594 Static usbd_status
2595 ohci_root_intr_start(struct usbd_xfer *xfer)
2596 {
2597 ohci_softc_t *sc = OHCI_XFER2SC(xfer);
2598 const bool polling = sc->sc_bus.ub_usepolling;
2599
2600 if (sc->sc_dying)
2601 return USBD_IOERROR;
2602
2603 if (!polling)
2604 mutex_enter(&sc->sc_lock);
2605 KASSERT(sc->sc_intrxfer == NULL);
2606 sc->sc_intrxfer = xfer;
2607 if (!polling)
2608 mutex_exit(&sc->sc_lock);
2609
2610 return USBD_IN_PROGRESS;
2611 }
2612
2613 /* Abort a root interrupt request. */
2614 Static void
2615 ohci_root_intr_abort(struct usbd_xfer *xfer)
2616 {
2617 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer);
2618
2619 KASSERT(mutex_owned(&sc->sc_lock));
2620 KASSERT(xfer->ux_pipe->up_intrxfer == xfer);
2621
2622 xfer->ux_status = USBD_CANCELLED;
2623 usb_transfer_complete(xfer);
2624 }
2625
2626 /* Close the root pipe. */
2627 Static void
2628 ohci_root_intr_close(struct usbd_pipe *pipe)
2629 {
2630 ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
2631
2632 KASSERT(mutex_owned(&sc->sc_lock));
2633
2634 OHCIHIST_FUNC(); OHCIHIST_CALLED();
2635
2636 sc->sc_intrxfer = NULL;
2637 }
2638
2639 /************************/
2640
2641 int
2642 ohci_device_ctrl_init(struct usbd_xfer *xfer)
2643 {
2644 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
2645 usb_device_request_t *req = &xfer->ux_request;
2646 ohci_softc_t *sc = OHCI_XFER2SC(xfer);
2647 ohci_soft_td_t *stat, *setup;
2648 int isread = req->bmRequestType & UT_READ;
2649 int len = xfer->ux_bufsize;
2650 int err = ENOMEM;
2651
2652 OHCIHIST_FUNC(); OHCIHIST_CALLED();
2653
2654 setup = ohci_alloc_std(sc);
2655 if (setup == NULL) {
2656 goto bad1;
2657 }
2658 stat = ohci_alloc_std(sc);
2659 if (stat == NULL) {
2660 goto bad2;
2661 }
2662
2663 ox->ox_setup = setup;
2664 ox->ox_stat = stat;
2665 ox->ox_nstd = 0;
2666
2667 /* Set up data transaction */
2668 if (len != 0) {
2669 err = ohci_alloc_std_chain(sc, xfer, len, isread);
2670 if (err) {
2671 goto bad3;
2672 }
2673 }
2674 return 0;
2675
2676 bad3:
2677 ohci_free_std(sc, stat);
2678 bad2:
2679 ohci_free_std(sc, setup);
2680 bad1:
2681 return err;
2682 }
2683
2684 void
2685 ohci_device_ctrl_fini(struct usbd_xfer *xfer)
2686 {
2687 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
2688 ohci_softc_t *sc = OHCI_XFER2SC(xfer);
2689 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
2690
2691 OHCIHIST_FUNC(); OHCIHIST_CALLED();
2692 DPRINTFN(8, "xfer %#jx nstd %jd", (uintptr_t)xfer, ox->ox_nstd, 0, 0);
2693
2694 mutex_enter(&sc->sc_lock);
2695 if (ox->ox_setup != opipe->tail.td) {
2696 ohci_free_std_locked(sc, ox->ox_setup);
2697 }
2698 for (size_t i = 0; i < ox->ox_nstd; i++) {
2699 ohci_soft_td_t *std = ox->ox_stds[i];
2700 if (std == NULL)
2701 break;
2702 ohci_free_std_locked(sc, std);
2703 }
2704 ohci_free_std_locked(sc, ox->ox_stat);
2705 mutex_exit(&sc->sc_lock);
2706
2707 if (ox->ox_nstd) {
2708 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd;
2709 kmem_free(ox->ox_stds, sz);
2710 }
2711 }
2712
2713 Static usbd_status
2714 ohci_device_ctrl_transfer(struct usbd_xfer *xfer)
2715 {
2716 ohci_softc_t *sc = OHCI_XFER2SC(xfer);
2717 usbd_status err;
2718
2719 /* Insert last in queue. */
2720 mutex_enter(&sc->sc_lock);
2721 err = usb_insert_transfer(xfer);
2722 mutex_exit(&sc->sc_lock);
2723 if (err)
2724 return err;
2725
2726 /* Pipe isn't running, start first */
2727 return ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
2728 }
2729
2730 Static usbd_status
2731 ohci_device_ctrl_start(struct usbd_xfer *xfer)
2732 {
2733 ohci_softc_t *sc = OHCI_XFER2SC(xfer);
2734 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
2735 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
2736 usb_device_request_t *req = &xfer->ux_request;
2737 struct usbd_device *dev __diagused = opipe->pipe.up_dev;
2738 ohci_soft_td_t *setup, *stat, *next, *tail;
2739 ohci_soft_ed_t *sed;
2740 int isread;
2741 int len;
2742 const bool polling = sc->sc_bus.ub_usepolling;
2743
2744 OHCIHIST_FUNC(); OHCIHIST_CALLED();
2745
2746 if (sc->sc_dying)
2747 return USBD_IOERROR;
2748
2749 KASSERT(xfer->ux_rqflags & URQ_REQUEST);
2750
2751 isread = req->bmRequestType & UT_READ;
2752 len = UGETW(req->wLength);
2753
2754 DPRINTF("xfer=%#jx len=%jd, addr=%jd, endpt=%jd", (uintptr_t)xfer, len,
2755 dev->ud_addr, opipe->pipe.up_endpoint->ue_edesc->bEndpointAddress);
2756 DPRINTF("type=0x%02jx, request=0x%02jx, wValue=0x%04jx, wIndex=0x%04jx",
2757 req->bmRequestType, req->bRequest, UGETW(req->wValue),
2758 UGETW(req->wIndex));
2759
2760 /* Need to take lock here for pipe->tail.td */
2761 if (!polling)
2762 mutex_enter(&sc->sc_lock);
2763
2764 /*
2765 * Use the pipe "tail" TD as our first and loan our first TD to the
2766 * next transfer
2767 */
2768 setup = opipe->tail.td;
2769 opipe->tail.td = ox->ox_setup;
2770 ox->ox_setup = setup;
2771
2772 stat = ox->ox_stat;
2773
2774 /* point at sentinel */
2775 tail = opipe->tail.td;
2776 sed = opipe->sed;
2777
2778 KASSERTMSG(OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)) == dev->ud_addr,
2779 "address ED %d pipe %d\n",
2780 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), dev->ud_addr);
2781 KASSERTMSG(OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)) ==
2782 UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize),
2783 "MPL ED %d pipe %d\n",
2784 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)),
2785 UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize));
2786
2787 /* next will point to data if len != 0 */
2788 next = stat;
2789
2790 /* Set up data transaction */
2791 if (len != 0) {
2792 ohci_soft_td_t *std;
2793 ohci_soft_td_t *end;
2794
2795 next = ox->ox_stds[0];
2796 ohci_reset_std_chain(sc, xfer, len, isread, next, &end);
2797
2798 end->td.td_nexttd = HTOO32(stat->physaddr);
2799 end->nexttd = stat;
2800
2801 usb_syncmem(&end->dma, end->offs, sizeof(end->td),
2802 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2803
2804 usb_syncmem(&xfer->ux_dmabuf, 0, len,
2805 isread ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
2806 std = ox->ox_stds[0];
2807 /* Start toggle at 1 and then use the carried toggle. */
2808 std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK);
2809 std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1);
2810 usb_syncmem(&std->dma,
2811 std->offs + offsetof(ohci_td_t, td_flags),
2812 sizeof(std->td.td_flags),
2813 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2814 }
2815
2816 DPRINTFN(8, "setup %#jx data %#jx stat %#jx tail %#jx",
2817 (uintptr_t)setup,
2818 (uintptr_t)(len != 0 ? ox->ox_stds[0] : NULL), (uintptr_t)stat,
2819 (uintptr_t)tail);
2820 KASSERT(opipe->tail.td == tail);
2821
2822 memcpy(KERNADDR(&opipe->ctrl.reqdma, 0), req, sizeof(*req));
2823 usb_syncmem(&opipe->ctrl.reqdma, 0, sizeof(*req), BUS_DMASYNC_PREWRITE);
2824
2825 setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC |
2826 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
2827 setup->td.td_cbp = HTOO32(DMAADDR(&opipe->ctrl.reqdma, 0));
2828 setup->td.td_nexttd = HTOO32(next->physaddr);
2829 setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof(*req) - 1);
2830 setup->nexttd = next;
2831 setup->len = 0;
2832 setup->xfer = xfer;
2833 setup->flags = 0;
2834 ohci_hash_add_td(sc, setup);
2835
2836 xfer->ux_hcpriv = setup;
2837 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td),
2838 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2839
2840 stat->td.td_flags = HTOO32(
2841 (isread ? OHCI_TD_OUT : OHCI_TD_IN) |
2842 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
2843 stat->td.td_cbp = 0;
2844 stat->td.td_nexttd = HTOO32(tail->physaddr);
2845 stat->td.td_be = 0;
2846 stat->nexttd = tail;
2847 stat->flags = OHCI_CALL_DONE;
2848 stat->len = 0;
2849 stat->xfer = xfer;
2850 ohci_hash_add_td(sc, stat);
2851
2852 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td),
2853 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2854
2855 memset(&tail->td, 0, sizeof(tail->td));
2856 tail->nexttd = NULL;
2857 tail->xfer = NULL;
2858
2859 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td),
2860 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2861
2862 #ifdef OHCI_DEBUG
2863 USBHIST_LOGN(ohcidebug, 5, "--- dump start ---", 0, 0, 0, 0);
2864 if (ohcidebug >= 5) {
2865 ohci_dump_ed(sc, sed);
2866 ohci_dump_tds(sc, setup);
2867 }
2868 USBHIST_LOGN(ohcidebug, 5, "--- dump end ---", 0, 0, 0, 0);
2869 #endif
2870
2871 /* Insert ED in schedule */
2872 sed->ed.ed_tailp = HTOO32(tail->physaddr);
2873 usb_syncmem(&sed->dma,
2874 sed->offs + offsetof(ohci_ed_t, ed_tailp),
2875 sizeof(sed->ed.ed_tailp),
2876 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2877 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
2878 if (xfer->ux_timeout && !polling) {
2879 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout),
2880 ohci_timeout, xfer);
2881 }
2882
2883 DPRINTF("done", 0, 0, 0, 0);
2884
2885 xfer->ux_status = USBD_IN_PROGRESS;
2886 if (!polling)
2887 mutex_exit(&sc->sc_lock);
2888
2889 return USBD_IN_PROGRESS;
2890 }
2891
2892 /* Abort a device control request. */
2893 Static void
2894 ohci_device_ctrl_abort(struct usbd_xfer *xfer)
2895 {
2896 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer);
2897
2898 KASSERT(mutex_owned(&sc->sc_lock));
2899
2900 OHCIHIST_FUNC(); OHCIHIST_CALLED();
2901 DPRINTF("xfer=%#jx", (uintptr_t)xfer, 0, 0, 0);
2902 ohci_abort_xfer(xfer, USBD_CANCELLED);
2903 }
2904
2905 /* Close a device control pipe. */
2906 Static void
2907 ohci_device_ctrl_close(struct usbd_pipe *pipe)
2908 {
2909 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
2910 ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
2911
2912 KASSERT(mutex_owned(&sc->sc_lock));
2913
2914 OHCIHIST_FUNC(); OHCIHIST_CALLED();
2915 DPRINTF("pipe=%#jx", (uintptr_t)pipe, 0, 0, 0);
2916 ohci_close_pipe(pipe, sc->sc_ctrl_head);
2917 ohci_free_std_locked(sc, opipe->tail.td);
2918
2919 usb_freemem(&sc->sc_bus, &opipe->ctrl.reqdma);
2920 }
2921
2922 /************************/
2923
2924 Static void
2925 ohci_device_clear_toggle(struct usbd_pipe *pipe)
2926 {
2927 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
2928 ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
2929
2930 opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY);
2931 }
2932
2933 Static void
2934 ohci_noop(struct usbd_pipe *pipe)
2935 {
2936 }
2937
2938 Static int
2939 ohci_device_bulk_init(struct usbd_xfer *xfer)
2940 {
2941 ohci_softc_t *sc = OHCI_XFER2SC(xfer);
2942 int len = xfer->ux_bufsize;
2943 int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;
2944 int isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2945 int err;
2946
2947 OHCIHIST_FUNC(); OHCIHIST_CALLED();
2948
2949 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
2950
2951 DPRINTFN(4, "xfer=%#jx len=%jd isread=%jd flags=%jd", (uintptr_t)xfer,
2952 len, isread, xfer->ux_flags);
2953 DPRINTFN(4, "endpt=%jd", endpt, 0, 0, 0);
2954
2955 /* Allocate a chain of new TDs (including a new tail). */
2956 err = ohci_alloc_std_chain(sc, xfer, len, isread);
2957 if (err)
2958 return err;
2959
2960 return 0;
2961 }
2962
2963 Static void
2964 ohci_device_bulk_fini(struct usbd_xfer *xfer)
2965 {
2966 ohci_softc_t *sc = OHCI_XFER2SC(xfer);
2967 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
2968 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
2969
2970 OHCIHIST_FUNC(); OHCIHIST_CALLED();
2971 DPRINTFN(8, "xfer %#jx nstd %jd", (uintptr_t)xfer, ox->ox_nstd, 0, 0);
2972
2973 mutex_enter(&sc->sc_lock);
2974 for (size_t i = 0; i < ox->ox_nstd; i++) {
2975 ohci_soft_td_t *std = ox->ox_stds[i];
2976 if (std == NULL)
2977 break;
2978 if (std != opipe->tail.td)
2979 ohci_free_std_locked(sc, std);
2980 }
2981 mutex_exit(&sc->sc_lock);
2982
2983 if (ox->ox_nstd) {
2984 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd;
2985 kmem_free(ox->ox_stds, sz);
2986 }
2987 }
2988
2989 Static usbd_status
2990 ohci_device_bulk_transfer(struct usbd_xfer *xfer)
2991 {
2992 ohci_softc_t *sc = OHCI_XFER2SC(xfer);
2993 usbd_status err;
2994
2995 /* Insert last in queue. */
2996 mutex_enter(&sc->sc_lock);
2997 err = usb_insert_transfer(xfer);
2998 mutex_exit(&sc->sc_lock);
2999 if (err)
3000 return err;
3001
3002 /* Pipe isn't running, start first */
3003 return ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
3004 }
3005
3006 Static usbd_status
3007 ohci_device_bulk_start(struct usbd_xfer *xfer)
3008 {
3009 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
3010 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
3011 ohci_softc_t *sc = OHCI_XFER2SC(xfer);
3012 ohci_soft_td_t *last;
3013 ohci_soft_td_t *data, *tail, *tdp;
3014 ohci_soft_ed_t *sed;
3015 int len, isread, endpt;
3016 const bool polling = sc->sc_bus.ub_usepolling;
3017
3018 OHCIHIST_FUNC(); OHCIHIST_CALLED();
3019
3020 if (sc->sc_dying)
3021 return USBD_IOERROR;
3022
3023 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
3024
3025 len = xfer->ux_length;
3026 endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;
3027 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3028 sed = opipe->sed;
3029
3030 DPRINTFN(4, "xfer=%#jx len=%jd isread=%jd flags=%jd", (uintptr_t)xfer,
3031 len, isread, xfer->ux_flags);
3032 DPRINTFN(4, "endpt=%jd", endpt, 0, 0, 0);
3033
3034 if (!polling)
3035 mutex_enter(&sc->sc_lock);
3036
3037 /*
3038 * Use the pipe "tail" TD as our first and loan our first TD to the
3039 * next transfer
3040 */
3041 data = opipe->tail.td;
3042 opipe->tail.td = ox->ox_stds[0];
3043 ox->ox_stds[0] = data;
3044 ohci_reset_std_chain(sc, xfer, len, isread, data, &last);
3045
3046 /* point at sentinel */
3047 tail = opipe->tail.td;
3048 memset(&tail->td, 0, sizeof(tail->td));
3049 tail->nexttd = NULL;
3050 tail->xfer = NULL;
3051 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td),
3052 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3053 xfer->ux_hcpriv = data;
3054
3055 DPRINTFN(8, "xfer %#jx data %#jx tail %#jx", (uintptr_t)xfer,
3056 (uintptr_t)ox->ox_stds[0], (uintptr_t)tail, 0);
3057 KASSERT(opipe->tail.td == tail);
3058
3059 /* We want interrupt at the end of the transfer. */
3060 last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK);
3061 last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1));
3062 last->td.td_nexttd = HTOO32(tail->physaddr);
3063 last->nexttd = tail;
3064 last->flags |= OHCI_CALL_DONE;
3065 usb_syncmem(&last->dma, last->offs, sizeof(last->td),
3066 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3067
3068 DPRINTFN(4, "ed_flags=0x%08jx td_flags=0x%08jx "
3069 "td_cbp=0x%08jx td_be=0x%08jx",
3070 (int)O32TOH(sed->ed.ed_flags),
3071 (int)O32TOH(data->td.td_flags),
3072 (int)O32TOH(data->td.td_cbp),
3073 (int)O32TOH(data->td.td_be));
3074
3075 #ifdef OHCI_DEBUG
3076 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0);
3077 if (ohcidebug >= 5) {
3078 ohci_dump_ed(sc, sed);
3079 ohci_dump_tds(sc, data);
3080 }
3081 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0);
3082 #endif
3083
3084 /* Insert ED in schedule */
3085 for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
3086 KASSERT(tdp->xfer == xfer);
3087 }
3088 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3089 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3090 sed->ed.ed_tailp = HTOO32(tail->physaddr);
3091 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3092 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3093 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3094 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
3095 if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) {
3096 callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout),
3097 ohci_timeout, xfer);
3098 }
3099
3100 xfer->ux_status = USBD_IN_PROGRESS;
3101 if (!polling)
3102 mutex_exit(&sc->sc_lock);
3103
3104 return USBD_IN_PROGRESS;
3105 }
3106
3107 Static void
3108 ohci_device_bulk_abort(struct usbd_xfer *xfer)
3109 {
3110 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer);
3111
3112 OHCIHIST_FUNC(); OHCIHIST_CALLED();
3113
3114 KASSERT(mutex_owned(&sc->sc_lock));
3115
3116 DPRINTF("xfer=%#jx", (uintptr_t)xfer, 0, 0, 0);
3117 ohci_abort_xfer(xfer, USBD_CANCELLED);
3118 }
3119
3120 /*
3121 * Close a device bulk pipe.
3122 */
3123 Static void
3124 ohci_device_bulk_close(struct usbd_pipe *pipe)
3125 {
3126 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
3127 ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
3128
3129 KASSERT(mutex_owned(&sc->sc_lock));
3130
3131 OHCIHIST_FUNC(); OHCIHIST_CALLED();
3132
3133 DPRINTF("pipe=%#jx", (uintptr_t)pipe, 0, 0, 0);
3134 ohci_close_pipe(pipe, sc->sc_bulk_head);
3135 ohci_free_std_locked(sc, opipe->tail.td);
3136 }
3137
3138 /************************/
3139
3140 Static int
3141 ohci_device_intr_init(struct usbd_xfer *xfer)
3142 {
3143 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
3144 ohci_softc_t *sc = OHCI_XFER2SC(xfer);
3145 int len = xfer->ux_bufsize;
3146 int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;
3147 int isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3148 int err;
3149
3150 OHCIHIST_FUNC(); OHCIHIST_CALLED();
3151
3152 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
3153 KASSERT(len != 0);
3154
3155 DPRINTFN(4, "xfer=%#jx len=%jd isread=%jd flags=%jd", (uintptr_t)xfer,
3156 len, isread, xfer->ux_flags);
3157 DPRINTFN(4, "endpt=%jd", endpt, 0, 0, 0);
3158
3159 ox->ox_nstd = 0;
3160
3161 err = ohci_alloc_std_chain(sc, xfer, len, isread);
3162 if (err) {
3163 return err;
3164 }
3165
3166 return 0;
3167 }
3168
3169 Static void
3170 ohci_device_intr_fini(struct usbd_xfer *xfer)
3171 {
3172 ohci_softc_t *sc = OHCI_XFER2SC(xfer);
3173 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
3174 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
3175
3176 OHCIHIST_FUNC(); OHCIHIST_CALLED();
3177 DPRINTFN(8, "xfer %#jx nstd %jd", (uintptr_t)xfer, ox->ox_nstd, 0, 0);
3178
3179 mutex_enter(&sc->sc_lock);
3180 for (size_t i = 0; i < ox->ox_nstd; i++) {
3181 ohci_soft_td_t *std = ox->ox_stds[i];
3182 if (std != NULL)
3183 break;
3184 if (std != opipe->tail.td)
3185 ohci_free_std_locked(sc, std);
3186 }
3187 mutex_exit(&sc->sc_lock);
3188
3189 if (ox->ox_nstd) {
3190 const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd;
3191 kmem_free(ox->ox_stds, sz);
3192 }
3193 }
3194
3195 Static usbd_status
3196 ohci_device_intr_transfer(struct usbd_xfer *xfer)
3197 {
3198 ohci_softc_t *sc = OHCI_XFER2SC(xfer);
3199 usbd_status err;
3200
3201 /* Insert last in queue. */
3202 mutex_enter(&sc->sc_lock);
3203 err = usb_insert_transfer(xfer);
3204 mutex_exit(&sc->sc_lock);
3205 if (err)
3206 return err;
3207
3208 /* Pipe isn't running, start first */
3209 return ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
3210 }
3211
3212 Static usbd_status
3213 ohci_device_intr_start(struct usbd_xfer *xfer)
3214 {
3215 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
3216 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
3217 ohci_softc_t *sc = OHCI_XFER2SC(xfer);
3218 ohci_soft_ed_t *sed = opipe->sed;
3219 ohci_soft_td_t *data, *last, *tail;
3220 int len, isread, endpt;
3221 const bool polling = sc->sc_bus.ub_usepolling;
3222
3223 OHCIHIST_FUNC(); OHCIHIST_CALLED();
3224
3225 if (sc->sc_dying)
3226 return USBD_IOERROR;
3227
3228 DPRINTFN(3, "xfer=%#jx len=%jd flags=%jd priv=%#jx", (uintptr_t)xfer,
3229 xfer->ux_length, xfer->ux_flags, (uintptr_t)xfer->ux_priv);
3230
3231 KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
3232
3233 len = xfer->ux_length;
3234 endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;
3235 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3236
3237 if (!polling)
3238 mutex_enter(&sc->sc_lock);
3239
3240 /*
3241 * Use the pipe "tail" TD as our first and loan our first TD to the
3242 * next transfer.
3243 */
3244 data = opipe->tail.td;
3245 opipe->tail.td = ox->ox_stds[0];
3246 ox->ox_stds[0] = data;
3247 ohci_reset_std_chain(sc, xfer, len, isread, data, &last);
3248
3249 /* point at sentinel */
3250 tail = opipe->tail.td;
3251 memset(&tail->td, 0, sizeof(tail->td));
3252 tail->nexttd = NULL;
3253 tail->xfer = NULL;
3254 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td),
3255 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3256 xfer->ux_hcpriv = data;
3257
3258 DPRINTFN(8, "data %#jx tail %#jx", (uintptr_t)ox->ox_stds[0],
3259 (uintptr_t)tail, 0, 0);
3260 KASSERT(opipe->tail.td == tail);
3261
3262 /* We want interrupt at the end of the transfer. */
3263 last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK);
3264 last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1));
3265
3266 last->td.td_nexttd = HTOO32(tail->physaddr);
3267 last->nexttd = tail;
3268 last->flags |= OHCI_CALL_DONE;
3269 usb_syncmem(&last->dma, last->offs, sizeof(last->td),
3270 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3271
3272 #ifdef OHCI_DEBUG
3273 DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0);
3274 if (ohcidebug >= 5) {
3275 ohci_dump_ed(sc, sed);
3276 ohci_dump_tds(sc, data);
3277 }
3278 DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0);
3279 #endif
3280
3281 /* Insert ED in schedule */
3282 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3283 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3284 sed->ed.ed_tailp = HTOO32(tail->physaddr);
3285 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3286 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3287 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3288
3289 xfer->ux_status = USBD_IN_PROGRESS;
3290 if (!polling)
3291 mutex_exit(&sc->sc_lock);
3292
3293 return USBD_IN_PROGRESS;
3294 }
3295
3296 /* Abort a device interrupt request. */
3297 Static void
3298 ohci_device_intr_abort(struct usbd_xfer *xfer)
3299 {
3300 ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer);
3301
3302 KASSERT(mutex_owned(&sc->sc_lock));
3303 KASSERT(xfer->ux_pipe->up_intrxfer == xfer);
3304
3305 ohci_abort_xfer(xfer, USBD_CANCELLED);
3306 }
3307
3308 /* Close a device interrupt pipe. */
3309 Static void
3310 ohci_device_intr_close(struct usbd_pipe *pipe)
3311 {
3312 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
3313 ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
3314 int nslots = opipe->intr.nslots;
3315 int pos = opipe->intr.pos;
3316 int j;
3317 ohci_soft_ed_t *p, *sed = opipe->sed;
3318
3319 OHCIHIST_FUNC(); OHCIHIST_CALLED();
3320
3321 KASSERT(mutex_owned(&sc->sc_lock));
3322
3323 DPRINTFN(1, "pipe=%#jx nslots=%jd pos=%jd", (uintptr_t)pipe, nslots,
3324 pos, 0);
3325 usb_syncmem(&sed->dma, sed->offs,
3326 sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3327 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
3328 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3329 sizeof(sed->ed.ed_flags),
3330 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3331 if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3332 (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
3333 usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock);
3334
3335 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
3336 continue;
3337 KASSERT(p);
3338 p->next = sed->next;
3339 p->ed.ed_nexted = sed->ed.ed_nexted;
3340 usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
3341 sizeof(p->ed.ed_nexted),
3342 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3343
3344 for (j = 0; j < nslots; j++)
3345 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
3346
3347 ohci_free_std_locked(sc, opipe->tail.td);
3348 ohci_free_sed_locked(sc, opipe->sed);
3349 }
3350
3351 Static usbd_status
3352 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
3353 {
3354 int i, j, best;
3355 u_int npoll, slow, shigh, nslots;
3356 u_int bestbw, bw;
3357 ohci_soft_ed_t *hsed, *sed = opipe->sed;
3358
3359 OHCIHIST_FUNC(); OHCIHIST_CALLED();
3360
3361 DPRINTFN(2, "pipe=%#jx", (uintptr_t)opipe, 0, 0, 0);
3362 if (ival == 0) {
3363 printf("ohci_setintr: 0 interval\n");
3364 return USBD_INVAL;
3365 }
3366
3367 npoll = OHCI_NO_INTRS;
3368 while (npoll > ival)
3369 npoll /= 2;
3370 DPRINTFN(2, "ival=%jd npoll=%jd", ival, npoll, 0, 0);
3371
3372 /*
3373 * We now know which level in the tree the ED must go into.
3374 * Figure out which slot has most bandwidth left over.
3375 * Slots to examine:
3376 * npoll
3377 * 1 0
3378 * 2 1 2
3379 * 4 3 4 5 6
3380 * 8 7 8 9 10 11 12 13 14
3381 * N (N-1) .. (N-1+N-1)
3382 */
3383 slow = npoll-1;
3384 shigh = slow + npoll;
3385 nslots = OHCI_NO_INTRS / npoll;
3386 for (best = i = slow, bestbw = ~0; i < shigh; i++) {
3387 bw = 0;
3388 for (j = 0; j < nslots; j++)
3389 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
3390 if (bw < bestbw) {
3391 best = i;
3392 bestbw = bw;
3393 }
3394 }
3395 DPRINTFN(2, "best=%jd(%jd..%jd) bestbw=%jd", best, slow, shigh, bestbw);
3396
3397 mutex_enter(&sc->sc_lock);
3398 hsed = sc->sc_eds[best];
3399 sed->next = hsed->next;
3400 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
3401 sizeof(hsed->ed.ed_flags),
3402 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3403 sed->ed.ed_nexted = hsed->ed.ed_nexted;
3404 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3405 sizeof(sed->ed.ed_flags),
3406 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3407 hsed->next = sed;
3408 hsed->ed.ed_nexted = HTOO32(sed->physaddr);
3409 usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
3410 sizeof(hsed->ed.ed_flags),
3411 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3412 mutex_exit(&sc->sc_lock);
3413
3414 for (j = 0; j < nslots; j++)
3415 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
3416 opipe->intr.nslots = nslots;
3417 opipe->intr.pos = best;
3418
3419 DPRINTFN(5, "returns %#jx", (uintptr_t)opipe, 0, 0, 0);
3420 return USBD_NORMAL_COMPLETION;
3421 }
3422
3423 /***********************/
3424
3425 Static int
3426 ohci_device_isoc_init(struct usbd_xfer *xfer)
3427 {
3428 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
3429 ohci_softc_t *sc = OHCI_XFER2SC(xfer);
3430 ohci_soft_itd_t *sitd;
3431 size_t i;
3432 int err;
3433
3434 OHCIHIST_FUNC(); OHCIHIST_CALLED();
3435
3436 DPRINTFN(1, "xfer %#jx len %jd flags %jd", (uintptr_t)xfer,
3437 xfer->ux_length, xfer->ux_flags, 0);
3438
3439 const size_t nfsitd =
3440 (xfer->ux_nframes + OHCI_ITD_NOFFSET - 1) / OHCI_ITD_NOFFSET;
3441 const size_t nbsitd = xfer->ux_bufsize / OHCI_PAGE_SIZE;
3442 const size_t nsitd = MAX(nfsitd, nbsitd) + 1;
3443
3444 ox->ox_sitds = kmem_zalloc(sizeof(ohci_soft_itd_t *) * nsitd,
3445 KM_SLEEP);
3446 ox->ox_nsitd = nsitd;
3447
3448 for (i = 0; i < nsitd; i++) {
3449 /* Allocate next ITD */
3450 sitd = ohci_alloc_sitd(sc);
3451 if (sitd == NULL) {
3452 err = ENOMEM;
3453 goto fail;
3454 }
3455 ox->ox_sitds[i] = sitd;
3456 sitd->xfer = xfer;
3457 sitd->flags = 0;
3458 }
3459
3460 return 0;
3461 fail:
3462 for (; i > 0;) {
3463 ohci_free_sitd(sc, ox->ox_sitds[--i]);
3464 }
3465 return err;
3466 }
3467
3468 Static void
3469 ohci_device_isoc_fini(struct usbd_xfer *xfer)
3470 {
3471 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
3472 ohci_softc_t *sc = OHCI_XFER2SC(xfer);
3473 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
3474
3475 OHCIHIST_FUNC(); OHCIHIST_CALLED();
3476
3477 mutex_enter(&sc->sc_lock);
3478 for (size_t i = 0; i < ox->ox_nsitd; i++) {
3479 if (ox->ox_sitds[i] != opipe->tail.itd) {
3480 ohci_free_sitd_locked(sc, ox->ox_sitds[i]);
3481 }
3482 }
3483 mutex_exit(&sc->sc_lock);
3484
3485 if (ox->ox_nsitd) {
3486 const size_t sz = sizeof(ohci_soft_itd_t *) * ox->ox_nsitd;
3487 kmem_free(ox->ox_sitds, sz);
3488 }
3489 }
3490
3491
3492 usbd_status
3493 ohci_device_isoc_transfer(struct usbd_xfer *xfer)
3494 {
3495 ohci_softc_t *sc = OHCI_XFER2SC(xfer);
3496 usbd_status __diagused err;
3497
3498 OHCIHIST_FUNC(); OHCIHIST_CALLED();
3499
3500 DPRINTFN(5, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0);
3501
3502 /* Put it on our queue, */
3503 mutex_enter(&sc->sc_lock);
3504 err = usb_insert_transfer(xfer);
3505 mutex_exit(&sc->sc_lock);
3506
3507 KASSERT(err == USBD_NORMAL_COMPLETION);
3508
3509 /* insert into schedule, */
3510 ohci_device_isoc_enter(xfer);
3511
3512 /* and start if the pipe wasn't running */
3513 return USBD_IN_PROGRESS;
3514 }
3515
3516 void
3517 ohci_device_isoc_enter(struct usbd_xfer *xfer)
3518 {
3519 struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
3520 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
3521 ohci_softc_t *sc = OHCI_XFER2SC(xfer);
3522 ohci_soft_ed_t *sed = opipe->sed;
3523 ohci_soft_itd_t *sitd, *nsitd, *tail;
3524 ohci_physaddr_t buf, offs, noffs, bp0;
3525 int i, ncur, nframes;
3526
3527 OHCIHIST_FUNC(); OHCIHIST_CALLED();
3528 DPRINTFN(5, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0);
3529
3530 mutex_enter(&sc->sc_lock);
3531
3532 if (sc->sc_dying) {
3533 mutex_exit(&sc->sc_lock);
3534 return;
3535 }
3536
3537 struct isoc *isoc = &opipe->isoc;
3538
3539 DPRINTFN(1, "used=%jd next=%jd xfer=%#jx nframes=%jd",
3540 isoc->inuse, isoc->next, (uintptr_t)xfer, xfer->ux_nframes);
3541
3542 if (isoc->next == -1) {
3543 /* Not in use yet, schedule it a few frames ahead. */
3544 isoc->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5;
3545 DPRINTFN(2,"start next=%jd", isoc->next, 0, 0, 0);
3546 }
3547
3548 sitd = opipe->tail.itd;
3549 opipe->tail.itd = ox->ox_sitds[0];
3550 ox->ox_sitds[0] = sitd;
3551
3552 buf = DMAADDR(&xfer->ux_dmabuf, 0);
3553 bp0 = OHCI_PAGE(buf);
3554 offs = OHCI_PAGE_OFFSET(buf);
3555 nframes = xfer->ux_nframes;
3556 xfer->ux_hcpriv = sitd;
3557 size_t j = 1;
3558 for (i = ncur = 0; i < nframes; i++, ncur++) {
3559 noffs = offs + xfer->ux_frlengths[i];
3560 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */
3561 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
3562
3563 /* Allocate next ITD */
3564 nsitd = ox->ox_sitds[j++];
3565 KASSERT(nsitd != NULL);
3566 KASSERT(j < ox->ox_nsitd);
3567
3568 /* Fill current ITD */
3569 sitd->itd.itd_flags = HTOO32(
3570 OHCI_ITD_NOCC |
3571 OHCI_ITD_SET_SF(isoc->next) |
3572 OHCI_ITD_SET_DI(6) | /* delay intr a little */
3573 OHCI_ITD_SET_FC(ncur));
3574 sitd->itd.itd_bp0 = HTOO32(bp0);
3575 sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
3576 sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
3577 sitd->nextitd = nsitd;
3578 sitd->xfer = xfer;
3579 sitd->flags = 0;
3580 #ifdef DIAGNOSTIC
3581 sitd->isdone = false;
3582 #endif
3583 ohci_hash_add_itd(sc, sitd);
3584 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
3585 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3586
3587 sitd = nsitd;
3588 isoc->next = isoc->next + ncur;
3589 bp0 = OHCI_PAGE(buf + offs);
3590 ncur = 0;
3591 }
3592 sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs));
3593 /* XXX Sync */
3594 offs = noffs;
3595 }
3596 KASSERT(j <= ox->ox_nsitd);
3597
3598 /* point at sentinel */
3599 tail = opipe->tail.itd;
3600 memset(&tail->itd, 0, sizeof(tail->itd));
3601 tail->nextitd = NULL;
3602 tail->xfer = NULL;
3603 usb_syncmem(&tail->dma, tail->offs, sizeof(tail->itd),
3604 BUS_DMASYNC_PREWRITE);
3605
3606 /* Fixup last used ITD */
3607 sitd->itd.itd_flags = HTOO32(
3608 OHCI_ITD_NOCC |
3609 OHCI_ITD_SET_SF(isoc->next) |
3610 OHCI_ITD_SET_DI(0) |
3611 OHCI_ITD_SET_FC(ncur));
3612 sitd->itd.itd_bp0 = HTOO32(bp0);
3613 sitd->itd.itd_nextitd = HTOO32(tail->physaddr);
3614 sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
3615 sitd->nextitd = tail;
3616 sitd->xfer = xfer;
3617 sitd->flags = OHCI_CALL_DONE;
3618 #ifdef DIAGNOSTIC
3619 sitd->isdone = false;
3620 #endif
3621 ohci_hash_add_itd(sc, sitd);
3622 usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
3623 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3624
3625 isoc->next = isoc->next + ncur;
3626 isoc->inuse += nframes;
3627
3628 /* XXX pretend we did it all */
3629 xfer->ux_actlen = offs;
3630 xfer->ux_status = USBD_IN_PROGRESS;
3631
3632 #ifdef OHCI_DEBUG
3633 if (ohcidebug >= 5) {
3634 DPRINTF("frame=%jd", O32TOH(sc->sc_hcca->hcca_frame_number),
3635 0, 0, 0);
3636 ohci_dump_itds(sc, xfer->ux_hcpriv);
3637 ohci_dump_ed(sc, sed);
3638 }
3639 #endif
3640
3641 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3642 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3643 sed->ed.ed_tailp = HTOO32(tail->physaddr);
3644 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3645 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3646 sizeof(sed->ed.ed_flags),
3647 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3648 mutex_exit(&sc->sc_lock);
3649 }
3650
3651 void
3652 ohci_device_isoc_abort(struct usbd_xfer *xfer)
3653 {
3654 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
3655 ohci_softc_t *sc = OHCI_XFER2SC(xfer);
3656 ohci_soft_ed_t *sed;
3657 ohci_soft_itd_t *sitd;
3658
3659 OHCIHIST_FUNC(); OHCIHIST_CALLED();
3660 DPRINTFN(1, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0);
3661
3662 KASSERT(mutex_owned(&sc->sc_lock));
3663
3664 /* Transfer is already done. */
3665 if (xfer->ux_status != USBD_NOT_STARTED &&
3666 xfer->ux_status != USBD_IN_PROGRESS) {
3667 printf("ohci_device_isoc_abort: early return\n");
3668 goto done;
3669 }
3670
3671 /* Give xfer the requested abort code. */
3672 xfer->ux_status = USBD_CANCELLED;
3673
3674 sed = opipe->sed;
3675 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3676 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3677 sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
3678 usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3679 sizeof(sed->ed.ed_flags),
3680 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3681
3682 sitd = xfer->ux_hcpriv;
3683 KASSERT(sitd);
3684
3685 usb_delay_ms_locked(&sc->sc_bus, OHCI_ITD_NOFFSET, &sc->sc_lock);
3686
3687 for (; sitd->xfer == xfer; sitd = sitd->nextitd) {
3688 ohci_hash_rem_itd(sc, sitd);
3689 #ifdef DIAGNOSTIC
3690 DPRINTFN(1, "abort sets done sitd=%#jx", (uintptr_t)sitd,
3691 0, 0, 0);
3692 sitd->isdone = true;
3693 #endif
3694 }
3695
3696 /* Run callback. */
3697 usb_transfer_complete(xfer);
3698
3699 sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */
3700 sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
3701 usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3702 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3703
3704 done:
3705 KASSERT(mutex_owned(&sc->sc_lock));
3706 }
3707
3708 void
3709 ohci_device_isoc_done(struct usbd_xfer *xfer)
3710 {
3711 OHCIHIST_FUNC(); OHCIHIST_CALLED();
3712 DPRINTFN(1, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0);
3713 }
3714
3715 usbd_status
3716 ohci_setup_isoc(struct usbd_pipe *pipe)
3717 {
3718 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
3719 ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
3720 struct isoc *isoc = &opipe->isoc;
3721
3722 isoc->next = -1;
3723 isoc->inuse = 0;
3724
3725 mutex_enter(&sc->sc_lock);
3726 ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head);
3727 mutex_exit(&sc->sc_lock);
3728
3729 return USBD_NORMAL_COMPLETION;
3730 }
3731
3732 void
3733 ohci_device_isoc_close(struct usbd_pipe *pipe)
3734 {
3735 struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
3736 ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
3737
3738 KASSERT(mutex_owned(&sc->sc_lock));
3739
3740 OHCIHIST_FUNC(); OHCIHIST_CALLED();
3741 DPRINTF("pipe=%#jx", (uintptr_t)pipe, 0, 0, 0);
3742 ohci_close_pipe(pipe, sc->sc_isoc_head);
3743 #ifdef DIAGNOSTIC
3744 opipe->tail.itd->isdone = true;
3745 #endif
3746 ohci_free_sitd_locked(sc, opipe->tail.itd);
3747 }
3748