ohci.c revision 1.33
1 /* $NetBSD: ohci.c,v 1.33 1999/06/30 06:44:23 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (augustss (at) carlstedt.se) at 9 * Carlstedt Research & Technology. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * USB Open Host Controller driver. 42 * 43 * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe 44 * USB spec: http://www.usb.org/developers/data/usb11.pdf 45 */ 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/kernel.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) 52 #include <sys/device.h> 53 #elif defined(__FreeBSD__) 54 #include <sys/module.h> 55 #include <sys/bus.h> 56 #endif 57 #include <sys/proc.h> 58 #include <sys/queue.h> 59 #include <sys/select.h> 60 61 #include <machine/bus.h> 62 #include <machine/endian.h> 63 64 #include <dev/usb/usb.h> 65 #include <dev/usb/usbdi.h> 66 #include <dev/usb/usbdivar.h> 67 #include <dev/usb/usb_quirks.h> 68 #include <dev/usb/usb_mem.h> 69 70 #include <dev/usb/ohcireg.h> 71 #include <dev/usb/ohcivar.h> 72 73 #if defined(__FreeBSD__) 74 #include <machine/clock.h> 75 76 #define delay(d) DELAY(d) 77 78 #endif 79 80 /* 81 * The OHCI controller is little endian, so on big endian machines 82 * the data strored in memory needs to be swapped. 83 */ 84 #if BYTE_ORDER == BIG_ENDIAN 85 #define LE(x) (bswap32(x)) 86 #else 87 #define LE(x) (x) 88 #endif 89 90 struct ohci_pipe; 91 92 ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *)); 93 void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *)); 94 95 ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *)); 96 void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *)); 97 98 void ohci_power __P((int, void *)); 99 usbd_status ohci_open __P((usbd_pipe_handle)); 100 void ohci_poll __P((struct usbd_bus *)); 101 void ohci_waitintr __P((ohci_softc_t *, usbd_request_handle)); 102 void ohci_rhsc __P((ohci_softc_t *, usbd_request_handle)); 103 void ohci_process_done __P((ohci_softc_t *, ohci_physaddr_t)); 104 void ohci_ii_done __P((ohci_softc_t *, usbd_request_handle)); 105 void ohci_ctrl_done __P((ohci_softc_t *, usbd_request_handle)); 106 void ohci_intr_done __P((ohci_softc_t *, usbd_request_handle)); 107 void ohci_bulk_done __P((ohci_softc_t *, usbd_request_handle)); 108 109 usbd_status ohci_device_request __P((usbd_request_handle reqh)); 110 void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 111 void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 112 void ohci_hash_add_td __P((ohci_softc_t *, ohci_soft_td_t *)); 113 void ohci_hash_rem_td __P((ohci_softc_t *, ohci_soft_td_t *)); 114 ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, ohci_physaddr_t)); 115 116 usbd_status ohci_root_ctrl_transfer __P((usbd_request_handle)); 117 usbd_status ohci_root_ctrl_start __P((usbd_request_handle)); 118 void ohci_root_ctrl_abort __P((usbd_request_handle)); 119 void ohci_root_ctrl_close __P((usbd_pipe_handle)); 120 121 usbd_status ohci_root_intr_transfer __P((usbd_request_handle)); 122 usbd_status ohci_root_intr_start __P((usbd_request_handle)); 123 void ohci_root_intr_abort __P((usbd_request_handle)); 124 void ohci_root_intr_close __P((usbd_pipe_handle)); 125 126 usbd_status ohci_device_ctrl_transfer __P((usbd_request_handle)); 127 usbd_status ohci_device_ctrl_start __P((usbd_request_handle)); 128 void ohci_device_ctrl_abort __P((usbd_request_handle)); 129 void ohci_device_ctrl_close __P((usbd_pipe_handle)); 130 131 usbd_status ohci_device_bulk_transfer __P((usbd_request_handle)); 132 usbd_status ohci_device_bulk_start __P((usbd_request_handle)); 133 void ohci_device_bulk_abort __P((usbd_request_handle)); 134 void ohci_device_bulk_close __P((usbd_pipe_handle)); 135 136 usbd_status ohci_device_intr_transfer __P((usbd_request_handle)); 137 usbd_status ohci_device_intr_start __P((usbd_request_handle)); 138 void ohci_device_intr_abort __P((usbd_request_handle)); 139 void ohci_device_intr_close __P((usbd_pipe_handle)); 140 usbd_status ohci_device_setintr __P((ohci_softc_t *sc, 141 struct ohci_pipe *pipe, int ival)); 142 143 int ohci_str __P((usb_string_descriptor_t *, int, char *)); 144 145 void ohci_timeout __P((void *)); 146 void ohci_rhsc_able __P((ohci_softc_t *, int)); 147 148 #ifdef USB_DEBUG 149 ohci_softc_t *thesc; 150 void ohci_dumpregs __P((ohci_softc_t *)); 151 void ohci_dump_tds __P((ohci_soft_td_t *)); 152 void ohci_dump_td __P((ohci_soft_td_t *)); 153 void ohci_dump_ed __P((ohci_soft_ed_t *)); 154 #endif 155 156 #if defined(__NetBSD__) 157 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 158 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 159 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 160 #elif defined(__FreeBSD__) 161 #define OWRITE4(sc, r, x) *(u_int32_t *) ((sc)->sc_iobase + (r)) = x 162 #define OREAD4(sc, r) (*(u_int32_t *) ((sc)->sc_iobase + (r))) 163 #define OREAD2(sc, r) (*(u_int16_t *) ((sc)->sc_iobase + (r))) 164 #endif 165 166 /* Reverse the bits in a value 0 .. 31 */ 167 static u_int8_t revbits[OHCI_NO_INTRS] = 168 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 169 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 170 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 171 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 172 173 struct ohci_pipe { 174 struct usbd_pipe pipe; 175 ohci_soft_ed_t *sed; 176 ohci_soft_td_t *tail; 177 /* Info needed for different pipe kinds. */ 178 union { 179 /* Control pipe */ 180 struct { 181 usb_dma_t datadma; 182 usb_dma_t reqdma; 183 u_int length; 184 ohci_soft_td_t *setup, *xfer, *stat; 185 } ctl; 186 /* Interrupt pipe */ 187 struct { 188 usb_dma_t datadma; 189 int nslots; 190 int pos; 191 } intr; 192 /* Bulk pipe */ 193 struct { 194 usb_dma_t datadma; 195 u_int length; 196 int isread; 197 } bulk; 198 } u; 199 }; 200 201 #define OHCI_INTR_ENDPT 1 202 203 struct usbd_methods ohci_root_ctrl_methods = { 204 ohci_root_ctrl_transfer, 205 ohci_root_ctrl_start, 206 ohci_root_ctrl_abort, 207 ohci_root_ctrl_close, 208 0, 209 }; 210 211 struct usbd_methods ohci_root_intr_methods = { 212 ohci_root_intr_transfer, 213 ohci_root_intr_start, 214 ohci_root_intr_abort, 215 ohci_root_intr_close, 216 0, 217 }; 218 219 struct usbd_methods ohci_device_ctrl_methods = { 220 ohci_device_ctrl_transfer, 221 ohci_device_ctrl_start, 222 ohci_device_ctrl_abort, 223 ohci_device_ctrl_close, 224 0, 225 }; 226 227 struct usbd_methods ohci_device_intr_methods = { 228 ohci_device_intr_transfer, 229 ohci_device_intr_start, 230 ohci_device_intr_abort, 231 ohci_device_intr_close, 232 }; 233 234 struct usbd_methods ohci_device_bulk_methods = { 235 ohci_device_bulk_transfer, 236 ohci_device_bulk_start, 237 ohci_device_bulk_abort, 238 ohci_device_bulk_close, 239 0, 240 }; 241 242 ohci_soft_ed_t * 243 ohci_alloc_sed(sc) 244 ohci_softc_t *sc; 245 { 246 ohci_soft_ed_t *sed; 247 usbd_status r; 248 int i, offs; 249 usb_dma_t dma; 250 251 if (!sc->sc_freeeds) { 252 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 253 sed = malloc(sizeof(ohci_soft_ed_t) * OHCI_ED_CHUNK, 254 M_USBHC, M_NOWAIT); 255 if (!sed) 256 return 0; 257 r = usb_allocmem(sc->sc_dmatag, OHCI_ED_SIZE * OHCI_ED_CHUNK, 258 OHCI_ED_ALIGN, &dma); 259 if (r != USBD_NORMAL_COMPLETION) { 260 free(sed, M_USBHC); 261 return 0; 262 } 263 for(i = 0; i < OHCI_ED_CHUNK; i++, sed++) { 264 offs = i * OHCI_ED_SIZE; 265 sed->physaddr = DMAADDR(&dma) + offs; 266 sed->ed = (ohci_ed_t *) 267 ((char *)KERNADDR(&dma) + offs); 268 sed->next = sc->sc_freeeds; 269 sc->sc_freeeds = sed; 270 } 271 } 272 sed = sc->sc_freeeds; 273 sc->sc_freeeds = sed->next; 274 memset(sed->ed, 0, OHCI_ED_SIZE); 275 sed->next = 0; 276 return sed; 277 } 278 279 void 280 ohci_free_sed(sc, sed) 281 ohci_softc_t *sc; 282 ohci_soft_ed_t *sed; 283 { 284 sed->next = sc->sc_freeeds; 285 sc->sc_freeeds = sed; 286 } 287 288 ohci_soft_td_t * 289 ohci_alloc_std(sc) 290 ohci_softc_t *sc; 291 { 292 ohci_soft_td_t *std; 293 usbd_status r; 294 int i, offs; 295 usb_dma_t dma; 296 297 if (!sc->sc_freetds) { 298 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 299 std = malloc(sizeof(ohci_soft_td_t) * OHCI_TD_CHUNK, 300 M_USBHC, M_NOWAIT); 301 if (!std) 302 return 0; 303 r = usb_allocmem(sc->sc_dmatag, OHCI_TD_SIZE * OHCI_TD_CHUNK, 304 OHCI_TD_ALIGN, &dma); 305 if (r != USBD_NORMAL_COMPLETION) { 306 free(std, M_USBHC); 307 return 0; 308 } 309 for(i = 0; i < OHCI_TD_CHUNK; i++, std++) { 310 offs = i * OHCI_TD_SIZE; 311 std->physaddr = DMAADDR(&dma) + offs; 312 std->td = (ohci_td_t *) 313 ((char *)KERNADDR(&dma) + offs); 314 std->nexttd = sc->sc_freetds; 315 sc->sc_freetds = std; 316 } 317 } 318 std = sc->sc_freetds; 319 sc->sc_freetds = std->nexttd; 320 memset(std->td, 0, OHCI_TD_SIZE); 321 std->nexttd = 0; 322 return (std); 323 } 324 325 void 326 ohci_free_std(sc, std) 327 ohci_softc_t *sc; 328 ohci_soft_td_t *std; 329 { 330 std->nexttd = sc->sc_freetds; 331 sc->sc_freetds = std; 332 } 333 334 usbd_status 335 ohci_init(sc) 336 ohci_softc_t *sc; 337 { 338 ohci_soft_ed_t *sed, *psed; 339 usbd_status r; 340 int rev; 341 int i; 342 u_int32_t s, ctl, ival, hcr, fm, per; 343 344 DPRINTF(("ohci_init: start\n")); 345 rev = OREAD4(sc, OHCI_REVISION); 346 printf("%s: OHCI version %d.%d%s\n", USBDEVNAME(sc->sc_bus.bdev), 347 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 348 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 349 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 350 printf("%s: unsupported OHCI revision\n", 351 USBDEVNAME(sc->sc_bus.bdev)); 352 return (USBD_INVAL); 353 } 354 355 for (i = 0; i < OHCI_HASH_SIZE; i++) 356 LIST_INIT(&sc->sc_hash_tds[i]); 357 358 /* Allocate the HCCA area. */ 359 r = usb_allocmem(sc->sc_dmatag, OHCI_HCCA_SIZE, 360 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 361 if (r != USBD_NORMAL_COMPLETION) 362 return (r); 363 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 364 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 365 366 sc->sc_eintrs = OHCI_NORMAL_INTRS; 367 368 sc->sc_ctrl_head = ohci_alloc_sed(sc); 369 if (!sc->sc_ctrl_head) { 370 r = USBD_NOMEM; 371 goto bad1; 372 } 373 sc->sc_ctrl_head->ed->ed_flags |= LE(OHCI_ED_SKIP); 374 sc->sc_bulk_head = ohci_alloc_sed(sc); 375 if (!sc->sc_bulk_head) { 376 r = USBD_NOMEM; 377 goto bad2; 378 } 379 sc->sc_bulk_head->ed->ed_flags |= LE(OHCI_ED_SKIP); 380 381 /* Allocate all the dummy EDs that make up the interrupt tree. */ 382 for (i = 0; i < OHCI_NO_EDS; i++) { 383 sed = ohci_alloc_sed(sc); 384 if (!sed) { 385 while (--i >= 0) 386 ohci_free_sed(sc, sc->sc_eds[i]); 387 r = USBD_NOMEM; 388 goto bad3; 389 } 390 /* All ED fields are set to 0. */ 391 sc->sc_eds[i] = sed; 392 sed->ed->ed_flags |= LE(OHCI_ED_SKIP); 393 if (i != 0) { 394 psed = sc->sc_eds[(i-1) / 2]; 395 sed->next = psed; 396 sed->ed->ed_nexted = LE(psed->physaddr); 397 } 398 } 399 /* 400 * Fill HCCA interrupt table. The bit reversal is to get 401 * the tree set up properly to spread the interrupts. 402 */ 403 for (i = 0; i < OHCI_NO_INTRS; i++) 404 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 405 LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 406 407 /* Determine in what context we are running. */ 408 ctl = OREAD4(sc, OHCI_CONTROL); 409 if (ctl & OHCI_IR) { 410 /* SMM active, request change */ 411 DPRINTF(("ohci_init: SMM active, request owner change\n")); 412 s = OREAD4(sc, OHCI_COMMAND_STATUS); 413 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 414 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 415 delay(1000); 416 ctl = OREAD4(sc, OHCI_CONTROL); 417 } 418 if ((ctl & OHCI_IR) == 0) { 419 printf("%s: SMM does not respond, resetting\n", 420 USBDEVNAME(sc->sc_bus.bdev)); 421 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 422 goto reset; 423 } 424 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 425 /* BIOS started controller. */ 426 DPRINTF(("ohci_init: BIOS active\n")); 427 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 428 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 429 delay(USB_RESUME_DELAY * 1000); 430 } 431 } else { 432 DPRINTF(("ohci_init: cold started\n")); 433 reset: 434 /* Controller was cold started. */ 435 delay(USB_BUS_RESET_DELAY * 1000); 436 } 437 438 /* 439 * This reset should not be necessary according to the OHCI spec, but 440 * without it some controllers do not start. 441 */ 442 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 443 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 444 delay(USB_BUS_RESET_DELAY * 1000); 445 446 /* We now own the host controller and the bus has been reset. */ 447 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 448 449 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 450 /* Nominal time for a reset is 10 us. */ 451 for (i = 0; i < 10; i++) { 452 delay(10); 453 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 454 if (!hcr) 455 break; 456 } 457 if (hcr) { 458 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 459 r = USBD_IOERROR; 460 goto bad3; 461 } 462 #ifdef USB_DEBUG 463 thesc = sc; 464 if (ohcidebug > 15) 465 ohci_dumpregs(sc); 466 #endif 467 468 /* The controller is now in suspend state, we have 2ms to finish. */ 469 470 /* Set up HC registers. */ 471 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 472 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 473 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 474 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 475 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 476 ctl = OREAD4(sc, OHCI_CONTROL); 477 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 478 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 479 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 480 /* And finally start it! */ 481 OWRITE4(sc, OHCI_CONTROL, ctl); 482 483 /* 484 * The controller is now OPERATIONAL. Set a some final 485 * registers that should be set earlier, but that the 486 * controller ignores when in the SUSPEND state. 487 */ 488 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 489 fm |= OHCI_FSMPS(ival) | ival; 490 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 491 per = OHCI_PERIODIC(ival); /* 90% periodic */ 492 OWRITE4(sc, OHCI_PERIODIC_START, per); 493 494 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 495 496 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 497 498 #ifdef USB_DEBUG 499 if (ohcidebug > 5) 500 ohci_dumpregs(sc); 501 #endif 502 503 /* Set up the bus struct. */ 504 sc->sc_bus.open_pipe = ohci_open; 505 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 506 sc->sc_bus.do_poll = ohci_poll; 507 508 (void)powerhook_establish(ohci_power, sc); 509 510 return (USBD_NORMAL_COMPLETION); 511 512 bad3: 513 ohci_free_sed(sc, sc->sc_ctrl_head); 514 bad2: 515 ohci_free_sed(sc, sc->sc_bulk_head); 516 bad1: 517 usb_freemem(sc->sc_dmatag, &sc->sc_hccadma); 518 return (r); 519 } 520 521 void 522 ohci_power(why, v) 523 int why; 524 void *v; 525 { 526 #ifdef USB_DEBUG 527 ohci_softc_t *sc = v; 528 529 printf("ohci_power: sc=%p, why=%d\n", sc, why); 530 /* XXX should suspend/resume */ 531 ohci_dumpregs(sc); 532 #endif 533 } 534 535 #ifdef USB_DEBUG 536 void ohcidump(void); 537 void ohcidump(void) { ohci_dumpregs(thesc); } 538 539 void 540 ohci_dumpregs(sc) 541 ohci_softc_t *sc; 542 { 543 printf("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 544 OREAD4(sc, OHCI_REVISION), 545 OREAD4(sc, OHCI_CONTROL), 546 OREAD4(sc, OHCI_COMMAND_STATUS)); 547 printf(" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 548 OREAD4(sc, OHCI_INTERRUPT_STATUS), 549 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 550 OREAD4(sc, OHCI_INTERRUPT_DISABLE)); 551 printf(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 552 OREAD4(sc, OHCI_HCCA), 553 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 554 OREAD4(sc, OHCI_CONTROL_HEAD_ED)); 555 printf(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 556 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 557 OREAD4(sc, OHCI_BULK_HEAD_ED), 558 OREAD4(sc, OHCI_BULK_CURRENT_ED)); 559 printf(" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 560 OREAD4(sc, OHCI_DONE_HEAD), 561 OREAD4(sc, OHCI_FM_INTERVAL), 562 OREAD4(sc, OHCI_FM_REMAINING)); 563 printf(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 564 OREAD4(sc, OHCI_FM_NUMBER), 565 OREAD4(sc, OHCI_PERIODIC_START), 566 OREAD4(sc, OHCI_LS_THRESHOLD)); 567 printf(" desca=0x%08x descb=0x%08x stat=0x%08x\n", 568 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 569 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 570 OREAD4(sc, OHCI_RH_STATUS)); 571 printf(" port1=0x%08x port2=0x%08x\n", 572 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 573 OREAD4(sc, OHCI_RH_PORT_STATUS(2))); 574 printf(" HCCA: frame_number=0x%04x done_head=0x%08x\n", 575 LE(sc->sc_hcca->hcca_frame_number), 576 LE(sc->sc_hcca->hcca_done_head)); 577 } 578 #endif 579 580 int 581 ohci_intr(p) 582 void *p; 583 { 584 ohci_softc_t *sc = p; 585 u_int32_t intrs, eintrs; 586 ohci_physaddr_t done; 587 588 /* In case the interrupt occurs before initialization has completed. */ 589 if (sc == NULL || sc->sc_hcca == NULL) { /* NWH added sc==0 */ 590 #ifdef DIAGNOSTIC 591 printf("ohci_intr: sc->sc_hcca == NULL\n"); 592 #endif 593 return (0); 594 } 595 596 intrs = 0; 597 done = LE(sc->sc_hcca->hcca_done_head); 598 if (done != 0) { 599 sc->sc_hcca->hcca_done_head = 0; 600 if (done & ~OHCI_DONE_INTRS) 601 intrs = OHCI_WDH; 602 if (done & OHCI_DONE_INTRS) 603 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 604 } else 605 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 606 if (!intrs) 607 return (0); 608 intrs &= ~OHCI_MIE; 609 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 610 eintrs = intrs & sc->sc_eintrs; 611 if (!eintrs) 612 return (0); 613 614 sc->sc_intrs++; 615 DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n", 616 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 617 (u_int)eintrs)); 618 619 if (eintrs & OHCI_SO) { 620 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev)); 621 /* XXX do what */ 622 intrs &= ~OHCI_SO; 623 } 624 if (eintrs & OHCI_WDH) { 625 ohci_process_done(sc, done &~ OHCI_DONE_INTRS); 626 intrs &= ~OHCI_WDH; 627 } 628 if (eintrs & OHCI_RD) { 629 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 630 /* XXX process resume detect */ 631 } 632 if (eintrs & OHCI_UE) { 633 printf("%s: unrecoverable error, controller halted\n", 634 USBDEVNAME(sc->sc_bus.bdev)); 635 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 636 /* XXX what else */ 637 } 638 if (eintrs & OHCI_RHSC) { 639 ohci_rhsc(sc, sc->sc_intrreqh); 640 intrs &= ~OHCI_RHSC; 641 642 /* 643 * Disable RHSC interrupt for now, because it will be 644 * on until the port has been reset. 645 */ 646 ohci_rhsc_able(sc, 0); 647 } 648 649 /* Block unprocessed interrupts. XXX */ 650 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 651 sc->sc_eintrs &= ~intrs; 652 653 return (1); 654 } 655 656 void 657 ohci_rhsc_able(sc, on) 658 ohci_softc_t *sc; 659 int on; 660 { 661 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 662 if (on) { 663 sc->sc_eintrs |= OHCI_RHSC; 664 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 665 } else { 666 sc->sc_eintrs &= ~OHCI_RHSC; 667 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 668 } 669 } 670 671 #ifdef USB_DEBUG 672 char *ohci_cc_strs[] = { 673 "NO_ERROR", 674 "CRC", 675 "BIT_STUFFING", 676 "DATA_TOGGLE_MISMATCH", 677 "STALL", 678 "DEVICE_NOT_RESPONDING", 679 "PID_CHECK_FAILURE", 680 "UNEXPECTED_PID", 681 "DATA_OVERRUN", 682 "DATA_UNDERRUN", 683 "BUFFER_OVERRUN", 684 "BUFFER_UNDERRUN", 685 "NOT_ACCESSED", 686 }; 687 #endif 688 689 void 690 ohci_process_done(sc, done) 691 ohci_softc_t *sc; 692 ohci_physaddr_t done; 693 { 694 ohci_soft_td_t *std, *sdone; 695 usbd_request_handle reqh; 696 int len, cc; 697 698 DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done)); 699 700 /* Reverse the done list. */ 701 for (sdone = 0; done; done = LE(std->td->td_nexttd)) { 702 std = ohci_hash_find_td(sc, done); 703 std->dnext = sdone; 704 sdone = std; 705 } 706 707 #ifdef USB_DEBUG 708 if (ohcidebug > 10) { 709 printf("ohci_process_done: TD done:\n"); 710 ohci_dump_tds(sdone); 711 } 712 #endif 713 714 for (std = sdone; std; std = std->dnext) { 715 reqh = std->reqh; 716 DPRINTFN(10, ("ohci_process_done: std=%p reqh=%p hcpriv=%p\n", 717 std, reqh, reqh->hcpriv)); 718 cc = OHCI_TD_GET_CC(LE(std->td->td_flags)); 719 if (cc == OHCI_CC_NO_ERROR) { 720 if (std->td->td_cbp == 0) 721 len = std->len; 722 else 723 len = LE(std->td->td_be) - 724 LE(std->td->td_cbp) + 1; 725 /* 726 * Only do a callback on the last stage of a transfer. 727 * Others have hcpriv = 0. 728 */ 729 if ((reqh->pipe->endpoint->edesc->bmAttributes & 730 UE_XFERTYPE) == UE_CONTROL) { 731 /* For a control transfer the length is in 732 * the xfer stage */ 733 if (reqh->hcpriv == std) { 734 reqh->status = USBD_NORMAL_COMPLETION; 735 ohci_ii_done(sc, reqh); 736 } else 737 reqh->actlen = len; 738 } else { 739 if (reqh->hcpriv == std) { 740 reqh->actlen = len; 741 reqh->status = USBD_NORMAL_COMPLETION; 742 ohci_ii_done(sc, reqh); 743 } 744 } 745 } else { 746 ohci_soft_td_t *p, *n; 747 struct ohci_pipe *opipe = 748 (struct ohci_pipe *)reqh->pipe; 749 DPRINTFN(-1,("ohci_process_done: error cc=%d (%s)\n", 750 OHCI_TD_GET_CC(LE(std->td->td_flags)), 751 ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td->td_flags))])); 752 /* 753 * Endpoint is halted. First unlink all the TDs 754 * belonging to the failed transfer, and then restart 755 * the endpoint. 756 */ 757 for (p = std->nexttd; p->reqh == reqh; p = n) { 758 n = p->nexttd; 759 ohci_hash_rem_td(sc, p); 760 ohci_free_std(sc, p); 761 } 762 /* clear halt */ 763 opipe->sed->ed->ed_headp = LE(p->physaddr); 764 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 765 766 if (cc == OHCI_CC_STALL) 767 reqh->status = USBD_STALLED; 768 else 769 reqh->status = USBD_IOERROR; 770 ohci_ii_done(sc, reqh); 771 } 772 ohci_hash_rem_td(sc, std); 773 ohci_free_std(sc, std); 774 } 775 } 776 777 void 778 ohci_ii_done(sc, reqh) 779 ohci_softc_t *sc; 780 usbd_request_handle reqh; 781 { 782 switch (reqh->pipe->endpoint->edesc->bmAttributes & UE_XFERTYPE) { 783 case UE_CONTROL: 784 ohci_ctrl_done(sc, reqh); 785 usb_start_next(reqh->pipe); 786 break; 787 case UE_INTERRUPT: 788 ohci_intr_done(sc, reqh); 789 break; 790 case UE_BULK: 791 ohci_bulk_done(sc, reqh); 792 usb_start_next(reqh->pipe); 793 break; 794 case UE_ISOCHRONOUS: 795 printf("ohci_process_done: ISO done?\n"); 796 usb_start_next(reqh->pipe); 797 break; 798 } 799 800 /* And finally execute callback. */ 801 reqh->xfercb(reqh); 802 } 803 804 void 805 ohci_ctrl_done(sc, reqh) 806 ohci_softc_t *sc; 807 usbd_request_handle reqh; 808 { 809 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 810 u_int len = opipe->u.ctl.length; 811 usb_dma_t *dma; 812 813 DPRINTFN(10,("ohci_ctrl_done: reqh=%p\n", reqh)); 814 815 if (!reqh->isreq) { 816 panic("ohci_ctrl_done: not a request\n"); 817 return; 818 } 819 820 if (len != 0) { 821 dma = &opipe->u.ctl.datadma; 822 if (reqh->request.bmRequestType & UT_READ) 823 memcpy(reqh->buffer, KERNADDR(dma), len); 824 usb_freemem(sc->sc_dmatag, dma); 825 } 826 usb_untimeout(ohci_timeout, reqh, reqh->timo_handle); 827 } 828 829 void 830 ohci_intr_done(sc, reqh) 831 ohci_softc_t *sc; 832 usbd_request_handle reqh; 833 { 834 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 835 usb_dma_t *dma; 836 ohci_soft_ed_t *sed = opipe->sed; 837 ohci_soft_td_t *xfer, *tail; 838 839 840 DPRINTFN(10,("ohci_intr_done: reqh=%p, actlen=%d\n", 841 reqh, reqh->actlen)); 842 843 dma = &opipe->u.intr.datadma; 844 memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen); 845 846 if (reqh->pipe->repeat) { 847 xfer = opipe->tail; 848 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 849 if (!tail) { 850 reqh->status = USBD_NOMEM; 851 return; 852 } 853 tail->reqh = 0; 854 855 xfer->td->td_flags = LE( 856 OHCI_TD_IN | OHCI_TD_NOCC | 857 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 858 if (reqh->flags & USBD_SHORT_XFER_OK) 859 xfer->td->td_flags |= LE(OHCI_TD_R); 860 xfer->td->td_cbp = LE(DMAADDR(dma)); 861 xfer->nexttd = tail; 862 xfer->td->td_nexttd = LE(tail->physaddr); 863 xfer->td->td_be = LE(LE(xfer->td->td_cbp) + reqh->length - 1); 864 xfer->len = reqh->length; 865 xfer->reqh = reqh; 866 867 reqh->hcpriv = xfer; 868 869 ohci_hash_add_td(sc, xfer); 870 sed->ed->ed_tailp = LE(tail->physaddr); 871 opipe->tail = tail; 872 } else { 873 usb_freemem(sc->sc_dmatag, dma); 874 usb_start_next(reqh->pipe); 875 } 876 } 877 878 void 879 ohci_bulk_done(sc, reqh) 880 ohci_softc_t *sc; 881 usbd_request_handle reqh; 882 { 883 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 884 u_int len = opipe->u.bulk.length; 885 usb_dma_t *dma; 886 887 888 DPRINTFN(10,("ohci_bulk_done: reqh=%p, actlen=%d\n", 889 reqh, reqh->actlen)); 890 891 if (len != 0) { 892 dma = &opipe->u.bulk.datadma; 893 if (opipe->u.bulk.isread) 894 memcpy(reqh->buffer, KERNADDR(dma), len); 895 usb_freemem(sc->sc_dmatag, dma); 896 } 897 usb_untimeout(ohci_timeout, reqh, reqh->timo_handle); 898 } 899 900 void 901 ohci_rhsc(sc, reqh) 902 ohci_softc_t *sc; 903 usbd_request_handle reqh; 904 { 905 usbd_pipe_handle pipe; 906 struct ohci_pipe *opipe; 907 u_char *p; 908 int i, m; 909 int hstatus; 910 911 hstatus = OREAD4(sc, OHCI_RH_STATUS); 912 DPRINTF(("ohci_rhsc: sc=%p reqh=%p hstatus=0x%08x\n", 913 sc, reqh, hstatus)); 914 915 if (reqh == 0) { 916 /* Just ignore the change. */ 917 return; 918 } 919 920 pipe = reqh->pipe; 921 opipe = (struct ohci_pipe *)pipe; 922 923 p = KERNADDR(&opipe->u.intr.datadma); 924 m = min(sc->sc_noport, reqh->length * 8 - 1); 925 memset(p, 0, reqh->length); 926 for (i = 1; i <= m; i++) { 927 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 928 p[i/8] |= 1 << (i%8); 929 } 930 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 931 reqh->actlen = reqh->length; 932 reqh->status = USBD_NORMAL_COMPLETION; 933 reqh->xfercb(reqh); 934 935 if (!reqh->pipe->repeat) { 936 sc->sc_intrreqh = 0; 937 usb_freemem(sc->sc_dmatag, &opipe->u.intr.datadma); 938 usb_start_next(reqh->pipe); 939 } 940 } 941 942 /* 943 * Wait here until controller claims to have an interrupt. 944 * Then call ohci_intr and return. Use timeout to avoid waiting 945 * too long. 946 */ 947 void 948 ohci_waitintr(sc, reqh) 949 ohci_softc_t *sc; 950 usbd_request_handle reqh; 951 { 952 int timo = reqh->timeout; 953 int usecs; 954 u_int32_t intrs; 955 956 reqh->status = USBD_IN_PROGRESS; 957 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 958 usb_delay_ms(&sc->sc_bus, 1); 959 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 960 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 961 #ifdef USB_DEBUG 962 if (ohcidebug > 15) 963 ohci_dumpregs(sc); 964 #endif 965 if (intrs) { 966 ohci_intr(sc); 967 if (reqh->status != USBD_IN_PROGRESS) 968 return; 969 } 970 } 971 972 /* Timeout */ 973 DPRINTF(("ohci_waitintr: timeout\n")); 974 reqh->status = USBD_TIMEOUT; 975 ohci_ii_done(sc, reqh); 976 /* XXX should free TD */ 977 } 978 979 void 980 ohci_poll(bus) 981 struct usbd_bus *bus; 982 { 983 ohci_softc_t *sc = (ohci_softc_t *)bus; 984 985 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 986 ohci_intr(sc); 987 } 988 989 usbd_status 990 ohci_device_request(reqh) 991 usbd_request_handle reqh; 992 { 993 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 994 usb_device_request_t *req = &reqh->request; 995 usbd_device_handle dev = opipe->pipe.device; 996 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 997 int addr = dev->address; 998 ohci_soft_td_t *setup, *xfer = 0, *stat, *next, *tail; 999 ohci_soft_ed_t *sed; 1000 usb_dma_t *dmap; 1001 int isread; 1002 int len; 1003 usbd_status r; 1004 int s; 1005 1006 isread = req->bmRequestType & UT_READ; 1007 len = UGETW(req->wLength); 1008 1009 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1010 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1011 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1012 UGETW(req->wIndex), len, addr, 1013 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1014 1015 setup = opipe->tail; 1016 stat = ohci_alloc_std(sc); 1017 if (!stat) { 1018 r = USBD_NOMEM; 1019 goto bad1; 1020 } 1021 tail = ohci_alloc_std(sc); 1022 if (!tail) { 1023 r = USBD_NOMEM; 1024 goto bad2; 1025 } 1026 tail->reqh = 0; 1027 1028 sed = opipe->sed; 1029 dmap = &opipe->u.ctl.datadma; 1030 opipe->u.ctl.length = len; 1031 1032 /* Update device address and length since they may have changed. */ 1033 /* XXX This only needs to be done once, but it's too early in open. */ 1034 sed->ed->ed_flags = LE( 1035 (LE(sed->ed->ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1036 OHCI_ED_SET_FA(addr) | 1037 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1038 1039 /* Set up data transaction */ 1040 if (len != 0) { 1041 xfer = ohci_alloc_std(sc); 1042 if (!xfer) { 1043 r = USBD_NOMEM; 1044 goto bad3; 1045 } 1046 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1047 if (r != USBD_NORMAL_COMPLETION) 1048 goto bad4; 1049 xfer->td->td_flags = LE( 1050 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 1051 OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR | 1052 (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0)); 1053 xfer->td->td_cbp = LE(DMAADDR(dmap)); 1054 xfer->nexttd = stat; 1055 xfer->td->td_nexttd = LE(stat->physaddr); 1056 xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1); 1057 xfer->len = len; 1058 xfer->reqh = reqh; 1059 1060 next = xfer; 1061 } else 1062 next = stat; 1063 1064 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1065 if (!isread && len != 0) 1066 memcpy(KERNADDR(dmap), reqh->buffer, len); 1067 1068 setup->td->td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC | 1069 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1070 setup->td->td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma)); 1071 setup->nexttd = next; 1072 setup->td->td_nexttd = LE(next->physaddr); 1073 setup->td->td_be = LE(LE(setup->td->td_cbp) + sizeof *req - 1); 1074 setup->len = 0; /* XXX The number of byte we count */ 1075 setup->reqh = reqh; 1076 1077 stat->td->td_flags = LE( 1078 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC | 1079 OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1080 stat->td->td_cbp = 0; 1081 stat->nexttd = tail; 1082 stat->td->td_nexttd = LE(tail->physaddr); 1083 stat->td->td_be = 0; 1084 stat->len = 0; 1085 stat->reqh = reqh; 1086 1087 reqh->hcpriv = stat; 1088 1089 #if USB_DEBUG 1090 if (ohcidebug > 5) { 1091 printf("ohci_device_request:\n"); 1092 ohci_dump_ed(sed); 1093 ohci_dump_tds(setup); 1094 } 1095 #endif 1096 1097 /* Insert ED in schedule */ 1098 s = splusb(); 1099 ohci_hash_add_td(sc, setup); 1100 if (len != 0) 1101 ohci_hash_add_td(sc, xfer); 1102 ohci_hash_add_td(sc, stat); 1103 sed->ed->ed_tailp = LE(tail->physaddr); 1104 opipe->tail = tail; 1105 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1106 if (reqh->timeout && !sc->sc_bus.use_polling) { 1107 usb_timeout(ohci_timeout, reqh, 1108 MS_TO_TICKS(reqh->timeout), reqh->timo_handle); 1109 } 1110 splx(s); 1111 1112 #if USB_DEBUG 1113 if (ohcidebug > 5) { 1114 delay(5000); 1115 printf("ohci_device_request: status=%x\n", 1116 OREAD4(sc, OHCI_COMMAND_STATUS)); 1117 ohci_dump_ed(sed); 1118 ohci_dump_tds(setup); 1119 } 1120 #endif 1121 1122 return (USBD_NORMAL_COMPLETION); 1123 1124 bad4: 1125 ohci_free_std(sc, xfer); 1126 bad3: 1127 ohci_free_std(sc, tail); 1128 bad2: 1129 ohci_free_std(sc, stat); 1130 bad1: 1131 return (r); 1132 } 1133 1134 /* 1135 * Add an ED to the schedule. Called at splusb(). 1136 */ 1137 void 1138 ohci_add_ed(sed, head) 1139 ohci_soft_ed_t *sed; 1140 ohci_soft_ed_t *head; 1141 { 1142 sed->next = head->next; 1143 sed->ed->ed_nexted = head->ed->ed_nexted; 1144 head->next = sed; 1145 head->ed->ed_nexted = LE(sed->physaddr); 1146 } 1147 1148 /* 1149 * Remove an ED from the schedule. Called at splusb(). 1150 */ 1151 void 1152 ohci_rem_ed(sed, head) 1153 ohci_soft_ed_t *sed; 1154 ohci_soft_ed_t *head; 1155 { 1156 ohci_soft_ed_t *p; 1157 1158 /* XXX */ 1159 for (p = head; p && p->next != sed; p = p->next) 1160 ; 1161 if (!p) 1162 panic("ohci_rem_ed: ED not found\n"); 1163 p->next = sed->next; 1164 p->ed->ed_nexted = sed->ed->ed_nexted; 1165 } 1166 1167 /* 1168 * When a transfer is completed the TD is added to the done queue by 1169 * the host controller. This queue is the processed by software. 1170 * Unfortunately the queue contains the physical address of the TD 1171 * and we have no simple way to translate this back to a kernel address. 1172 * To make the translation possible (and fast) we use a hash table of 1173 * TDs currently in the schedule. The physical address is used as the 1174 * hash value. 1175 */ 1176 1177 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1178 /* Called at splusb() */ 1179 void 1180 ohci_hash_add_td(sc, std) 1181 ohci_softc_t *sc; 1182 ohci_soft_td_t *std; 1183 { 1184 int h = HASH(std->physaddr); 1185 1186 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1187 } 1188 1189 /* Called at splusb() */ 1190 void 1191 ohci_hash_rem_td(sc, std) 1192 ohci_softc_t *sc; 1193 ohci_soft_td_t *std; 1194 { 1195 LIST_REMOVE(std, hnext); 1196 } 1197 1198 ohci_soft_td_t * 1199 ohci_hash_find_td(sc, a) 1200 ohci_softc_t *sc; 1201 ohci_physaddr_t a; 1202 { 1203 int h = HASH(a); 1204 ohci_soft_td_t *std; 1205 1206 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1207 std != 0; 1208 std = LIST_NEXT(std, hnext)) 1209 if (std->physaddr == a) 1210 return (std); 1211 panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a); 1212 } 1213 1214 void 1215 ohci_timeout(addr) 1216 void *addr; 1217 { 1218 #if 0 1219 usbd_request_handle *reqh = addr; 1220 int s; 1221 1222 DPRINTF(("ohci_timeout: reqh=%p\n", reqh)); 1223 s = splusb(); 1224 /* XXX need to inactivate TD before calling interrupt routine */ 1225 ohci_XXX_done(reqh); 1226 splx(s); 1227 #endif 1228 } 1229 1230 #ifdef USB_DEBUG 1231 void 1232 ohci_dump_tds(std) 1233 ohci_soft_td_t *std; 1234 { 1235 for (; std; std = std->nexttd) 1236 ohci_dump_td(std); 1237 } 1238 1239 void 1240 ohci_dump_td(std) 1241 ohci_soft_td_t *std; 1242 { 1243 printf("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1244 "nexttd=0x%08lx be=0x%08lx\n", 1245 std, (u_long)std->physaddr, 1246 (u_long)LE(std->td->td_flags), 1247 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1248 OHCI_TD_GET_DI(LE(std->td->td_flags)), 1249 OHCI_TD_GET_EC(LE(std->td->td_flags)), 1250 OHCI_TD_GET_CC(LE(std->td->td_flags)), 1251 (u_long)LE(std->td->td_cbp), 1252 (u_long)LE(std->td->td_nexttd), (u_long)LE(std->td->td_be)); 1253 } 1254 1255 void 1256 ohci_dump_ed(sed) 1257 ohci_soft_ed_t *sed; 1258 { 1259 printf("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx " 1260 "headp=%b nexted=0x%08lx\n", 1261 sed, (u_long)sed->physaddr, 1262 OHCI_ED_GET_FA(LE(sed->ed->ed_flags)), 1263 OHCI_ED_GET_EN(LE(sed->ed->ed_flags)), 1264 OHCI_ED_GET_MAXP(LE(sed->ed->ed_flags)), 1265 (u_long)LE(sed->ed->ed_flags), 1266 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1267 (u_long)LE(sed->ed->ed_tailp), 1268 (u_long)LE(sed->ed->ed_headp), "\20\1HALT\2CARRY", 1269 (u_long)LE(sed->ed->ed_nexted)); 1270 } 1271 #endif 1272 1273 usbd_status 1274 ohci_open(pipe) 1275 usbd_pipe_handle pipe; 1276 { 1277 usbd_device_handle dev = pipe->device; 1278 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1279 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1280 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1281 u_int8_t addr = dev->address; 1282 ohci_soft_ed_t *sed; 1283 ohci_soft_td_t *std; 1284 usbd_status r; 1285 int s; 1286 1287 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1288 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1289 if (addr == sc->sc_addr) { 1290 switch (ed->bEndpointAddress) { 1291 case USB_CONTROL_ENDPOINT: 1292 pipe->methods = &ohci_root_ctrl_methods; 1293 break; 1294 case UE_IN | OHCI_INTR_ENDPT: 1295 pipe->methods = &ohci_root_intr_methods; 1296 break; 1297 default: 1298 return (USBD_INVAL); 1299 } 1300 } else { 1301 sed = ohci_alloc_sed(sc); 1302 if (sed == 0) 1303 goto bad0; 1304 std = ohci_alloc_std(sc); 1305 if (std == 0) 1306 goto bad1; 1307 opipe->sed = sed; 1308 opipe->tail = std; 1309 sed->ed->ed_flags = LE( 1310 OHCI_ED_SET_FA(addr) | 1311 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1312 OHCI_ED_DIR_TD | 1313 (dev->lowspeed ? OHCI_ED_SPEED : 0) | 1314 ((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ? 1315 OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) | 1316 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1317 sed->ed->ed_headp = sed->ed->ed_tailp = LE(std->physaddr); 1318 1319 switch (ed->bmAttributes & UE_XFERTYPE) { 1320 case UE_CONTROL: 1321 pipe->methods = &ohci_device_ctrl_methods; 1322 r = usb_allocmem(sc->sc_dmatag, 1323 sizeof(usb_device_request_t), 1324 0, &opipe->u.ctl.reqdma); 1325 if (r != USBD_NORMAL_COMPLETION) 1326 goto bad; 1327 s = splusb(); 1328 ohci_add_ed(sed, sc->sc_ctrl_head); 1329 splx(s); 1330 break; 1331 case UE_INTERRUPT: 1332 pipe->methods = &ohci_device_intr_methods; 1333 return (ohci_device_setintr(sc, opipe, ed->bInterval)); 1334 case UE_ISOCHRONOUS: 1335 printf("ohci_open: open iso unimplemented\n"); 1336 return (USBD_XXX); 1337 case UE_BULK: 1338 pipe->methods = &ohci_device_bulk_methods; 1339 s = splusb(); 1340 ohci_add_ed(sed, sc->sc_bulk_head); 1341 splx(s); 1342 break; 1343 } 1344 } 1345 return (USBD_NORMAL_COMPLETION); 1346 1347 bad: 1348 ohci_free_std(sc, std); 1349 bad1: 1350 ohci_free_sed(sc, sed); 1351 bad0: 1352 return (USBD_NOMEM); 1353 1354 } 1355 1356 /* 1357 * Data structures and routines to emulate the root hub. 1358 */ 1359 usb_device_descriptor_t ohci_devd = { 1360 USB_DEVICE_DESCRIPTOR_SIZE, 1361 UDESC_DEVICE, /* type */ 1362 {0x00, 0x01}, /* USB version */ 1363 UCLASS_HUB, /* class */ 1364 USUBCLASS_HUB, /* subclass */ 1365 0, /* protocol */ 1366 64, /* max packet */ 1367 {0},{0},{0x00,0x01}, /* device id */ 1368 1,2,0, /* string indicies */ 1369 1 /* # of configurations */ 1370 }; 1371 1372 usb_config_descriptor_t ohci_confd = { 1373 USB_CONFIG_DESCRIPTOR_SIZE, 1374 UDESC_CONFIG, 1375 {USB_CONFIG_DESCRIPTOR_SIZE + 1376 USB_INTERFACE_DESCRIPTOR_SIZE + 1377 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1378 1, 1379 1, 1380 0, 1381 UC_SELF_POWERED, 1382 0 /* max power */ 1383 }; 1384 1385 usb_interface_descriptor_t ohci_ifcd = { 1386 USB_INTERFACE_DESCRIPTOR_SIZE, 1387 UDESC_INTERFACE, 1388 0, 1389 0, 1390 1, 1391 UCLASS_HUB, 1392 USUBCLASS_HUB, 1393 0, 1394 0 1395 }; 1396 1397 usb_endpoint_descriptor_t ohci_endpd = { 1398 USB_ENDPOINT_DESCRIPTOR_SIZE, 1399 UDESC_ENDPOINT, 1400 UE_IN | OHCI_INTR_ENDPT, 1401 UE_INTERRUPT, 1402 {8, 0}, /* max packet */ 1403 255 1404 }; 1405 1406 usb_hub_descriptor_t ohci_hubd = { 1407 USB_HUB_DESCRIPTOR_SIZE, 1408 UDESC_HUB, 1409 0, 1410 {0,0}, 1411 0, 1412 0, 1413 {0}, 1414 }; 1415 1416 int 1417 ohci_str(p, l, s) 1418 usb_string_descriptor_t *p; 1419 int l; 1420 char *s; 1421 { 1422 int i; 1423 1424 if (l == 0) 1425 return (0); 1426 p->bLength = 2 * strlen(s) + 2; 1427 if (l == 1) 1428 return (1); 1429 p->bDescriptorType = UDESC_STRING; 1430 l -= 2; 1431 for (i = 0; s[i] && l > 1; i++, l -= 2) 1432 USETW2(p->bString[i], 0, s[i]); 1433 return (2*i+2); 1434 } 1435 1436 /* 1437 * Simulate a hardware hub by handling all the necessary requests. 1438 */ 1439 usbd_status 1440 ohci_root_ctrl_transfer(reqh) 1441 usbd_request_handle reqh; 1442 { 1443 int s; 1444 usbd_status r; 1445 1446 s = splusb(); 1447 r = usb_insert_transfer(reqh); 1448 splx(s); 1449 if (r != USBD_NORMAL_COMPLETION) 1450 return (r); 1451 else 1452 return (ohci_root_ctrl_start(reqh)); 1453 } 1454 1455 usbd_status 1456 ohci_root_ctrl_start(reqh) 1457 usbd_request_handle reqh; 1458 { 1459 ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus; 1460 usb_device_request_t *req; 1461 void *buf; 1462 int port, i; 1463 int len, value, index, l, totlen = 0; 1464 usb_port_status_t ps; 1465 usb_hub_descriptor_t hubd; 1466 usbd_status r; 1467 u_int32_t v; 1468 1469 if (!reqh->isreq) 1470 /* XXX panic */ 1471 return (USBD_INVAL); 1472 req = &reqh->request; 1473 buf = reqh->buffer; 1474 1475 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 1476 req->bmRequestType, req->bRequest)); 1477 1478 len = UGETW(req->wLength); 1479 value = UGETW(req->wValue); 1480 index = UGETW(req->wIndex); 1481 #define C(x,y) ((x) | ((y) << 8)) 1482 switch(C(req->bRequest, req->bmRequestType)) { 1483 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1484 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1485 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1486 /* 1487 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1488 * for the integrated root hub. 1489 */ 1490 break; 1491 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1492 if (len > 0) { 1493 *(u_int8_t *)buf = sc->sc_conf; 1494 totlen = 1; 1495 } 1496 break; 1497 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1498 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 1499 switch(value >> 8) { 1500 case UDESC_DEVICE: 1501 if ((value & 0xff) != 0) { 1502 r = USBD_IOERROR; 1503 goto ret; 1504 } 1505 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1506 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 1507 memcpy(buf, &ohci_devd, l); 1508 break; 1509 case UDESC_CONFIG: 1510 if ((value & 0xff) != 0) { 1511 r = USBD_IOERROR; 1512 goto ret; 1513 } 1514 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1515 memcpy(buf, &ohci_confd, l); 1516 buf = (char *)buf + l; 1517 len -= l; 1518 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1519 totlen += l; 1520 memcpy(buf, &ohci_ifcd, l); 1521 buf = (char *)buf + l; 1522 len -= l; 1523 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1524 totlen += l; 1525 memcpy(buf, &ohci_endpd, l); 1526 break; 1527 case UDESC_STRING: 1528 if (len == 0) 1529 break; 1530 *(u_int8_t *)buf = 0; 1531 totlen = 1; 1532 switch (value & 0xff) { 1533 case 1: /* Vendor */ 1534 totlen = ohci_str(buf, len, sc->sc_vendor); 1535 break; 1536 case 2: /* Product */ 1537 totlen = ohci_str(buf, len, "OHCI root hub"); 1538 break; 1539 } 1540 break; 1541 default: 1542 r = USBD_IOERROR; 1543 goto ret; 1544 } 1545 break; 1546 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1547 if (len > 0) { 1548 *(u_int8_t *)buf = 0; 1549 totlen = 1; 1550 } 1551 break; 1552 case C(UR_GET_STATUS, UT_READ_DEVICE): 1553 if (len > 1) { 1554 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1555 totlen = 2; 1556 } 1557 break; 1558 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1559 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1560 if (len > 1) { 1561 USETW(((usb_status_t *)buf)->wStatus, 0); 1562 totlen = 2; 1563 } 1564 break; 1565 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1566 if (value >= USB_MAX_DEVICES) { 1567 r = USBD_IOERROR; 1568 goto ret; 1569 } 1570 sc->sc_addr = value; 1571 break; 1572 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1573 if (value != 0 && value != 1) { 1574 r = USBD_IOERROR; 1575 goto ret; 1576 } 1577 sc->sc_conf = value; 1578 break; 1579 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1580 break; 1581 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1582 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1583 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1584 r = USBD_IOERROR; 1585 goto ret; 1586 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1587 break; 1588 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1589 break; 1590 /* Hub requests */ 1591 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1592 break; 1593 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1594 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1595 "port=%d feature=%d\n", 1596 index, value)); 1597 if (index < 1 || index > sc->sc_noport) { 1598 r = USBD_IOERROR; 1599 goto ret; 1600 } 1601 port = OHCI_RH_PORT_STATUS(index); 1602 switch(value) { 1603 case UHF_PORT_ENABLE: 1604 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 1605 break; 1606 case UHF_PORT_SUSPEND: 1607 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 1608 break; 1609 case UHF_PORT_POWER: 1610 OWRITE4(sc, port, UPS_LOW_SPEED); 1611 break; 1612 case UHF_C_PORT_CONNECTION: 1613 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 1614 break; 1615 case UHF_C_PORT_ENABLE: 1616 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 1617 break; 1618 case UHF_C_PORT_SUSPEND: 1619 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 1620 break; 1621 case UHF_C_PORT_OVER_CURRENT: 1622 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 1623 break; 1624 case UHF_C_PORT_RESET: 1625 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 1626 break; 1627 default: 1628 r = USBD_IOERROR; 1629 goto ret; 1630 } 1631 switch(value) { 1632 case UHF_C_PORT_CONNECTION: 1633 case UHF_C_PORT_ENABLE: 1634 case UHF_C_PORT_SUSPEND: 1635 case UHF_C_PORT_OVER_CURRENT: 1636 case UHF_C_PORT_RESET: 1637 /* Enable RHSC interrupt if condition is cleared. */ 1638 if ((OREAD4(sc, port) >> 16) == 0) 1639 ohci_rhsc_able(sc, 1); 1640 break; 1641 default: 1642 break; 1643 } 1644 break; 1645 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1646 if (value != 0) { 1647 r = USBD_IOERROR; 1648 goto ret; 1649 } 1650 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 1651 hubd = ohci_hubd; 1652 hubd.bNbrPorts = sc->sc_noport; 1653 USETW(hubd.wHubCharacteristics, 1654 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 1655 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 1656 /* XXX overcurrent */ 1657 ); 1658 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 1659 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 1660 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1661 hubd.DeviceRemovable[i++] = (u_int8_t)v; 1662 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1663 l = min(len, hubd.bDescLength); 1664 totlen = l; 1665 memcpy(buf, &hubd, l); 1666 break; 1667 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1668 if (len != 4) { 1669 r = USBD_IOERROR; 1670 goto ret; 1671 } 1672 memset(buf, 0, len); /* ? XXX */ 1673 totlen = len; 1674 break; 1675 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1676 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 1677 index)); 1678 if (index < 1 || index > sc->sc_noport) { 1679 r = USBD_IOERROR; 1680 goto ret; 1681 } 1682 if (len != 4) { 1683 r = USBD_IOERROR; 1684 goto ret; 1685 } 1686 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 1687 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 1688 v)); 1689 USETW(ps.wPortStatus, v); 1690 USETW(ps.wPortChange, v >> 16); 1691 l = min(len, sizeof ps); 1692 memcpy(buf, &ps, l); 1693 totlen = l; 1694 break; 1695 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1696 r = USBD_IOERROR; 1697 goto ret; 1698 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1699 break; 1700 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1701 if (index < 1 || index > sc->sc_noport) { 1702 r = USBD_IOERROR; 1703 goto ret; 1704 } 1705 port = OHCI_RH_PORT_STATUS(index); 1706 switch(value) { 1707 case UHF_PORT_ENABLE: 1708 OWRITE4(sc, port, UPS_PORT_ENABLED); 1709 break; 1710 case UHF_PORT_SUSPEND: 1711 OWRITE4(sc, port, UPS_SUSPEND); 1712 break; 1713 case UHF_PORT_RESET: 1714 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 1715 index)); 1716 OWRITE4(sc, port, UPS_RESET); 1717 for (i = 0; i < 10; i++) { 1718 usb_delay_ms(&sc->sc_bus, 10); 1719 if ((OREAD4(sc, port) & UPS_RESET) == 0) 1720 break; 1721 } 1722 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 1723 index, OREAD4(sc, port))); 1724 break; 1725 case UHF_PORT_POWER: 1726 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 1727 "%d\n", index)); 1728 OWRITE4(sc, port, UPS_PORT_POWER); 1729 break; 1730 default: 1731 r = USBD_IOERROR; 1732 goto ret; 1733 } 1734 break; 1735 default: 1736 r = USBD_IOERROR; 1737 goto ret; 1738 } 1739 reqh->actlen = totlen; 1740 r = USBD_NORMAL_COMPLETION; 1741 ret: 1742 reqh->status = r; 1743 reqh->xfercb(reqh); 1744 usb_start_next(reqh->pipe); 1745 return (USBD_IN_PROGRESS); 1746 } 1747 1748 /* Abort a root control request. */ 1749 void 1750 ohci_root_ctrl_abort(reqh) 1751 usbd_request_handle reqh; 1752 { 1753 /* Nothing to do, all transfers are synchronous. */ 1754 } 1755 1756 /* Close the root pipe. */ 1757 void 1758 ohci_root_ctrl_close(pipe) 1759 usbd_pipe_handle pipe; 1760 { 1761 DPRINTF(("ohci_root_ctrl_close\n")); 1762 } 1763 1764 usbd_status 1765 ohci_root_intr_transfer(reqh) 1766 usbd_request_handle reqh; 1767 { 1768 int s; 1769 usbd_status r; 1770 1771 s = splusb(); 1772 r = usb_insert_transfer(reqh); 1773 splx(s); 1774 if (r != USBD_NORMAL_COMPLETION) 1775 return (r); 1776 else 1777 return (ohci_root_intr_start(reqh)); 1778 } 1779 1780 usbd_status 1781 ohci_root_intr_start(reqh) 1782 usbd_request_handle reqh; 1783 { 1784 usbd_pipe_handle pipe = reqh->pipe; 1785 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1786 struct ohci_pipe *upipe = (struct ohci_pipe *)pipe; 1787 usb_dma_t *dmap; 1788 usbd_status r; 1789 int len; 1790 1791 len = reqh->length; 1792 dmap = &upipe->u.intr.datadma; 1793 if (len == 0) 1794 return (USBD_INVAL); /* XXX should it be? */ 1795 1796 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1797 if (r != USBD_NORMAL_COMPLETION) 1798 return (r); 1799 sc->sc_intrreqh = reqh; 1800 1801 return (USBD_IN_PROGRESS); 1802 } 1803 1804 /* Abort a root interrupt request. */ 1805 void 1806 ohci_root_intr_abort(reqh) 1807 usbd_request_handle reqh; 1808 { 1809 /* No need to abort. */ 1810 } 1811 1812 /* Close the root pipe. */ 1813 void 1814 ohci_root_intr_close(pipe) 1815 usbd_pipe_handle pipe; 1816 { 1817 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1818 sc->sc_intrreqh = 0; 1819 1820 DPRINTF(("ohci_root_intr_close\n")); 1821 } 1822 1823 /************************/ 1824 1825 usbd_status 1826 ohci_device_ctrl_transfer(reqh) 1827 usbd_request_handle reqh; 1828 { 1829 int s; 1830 usbd_status r; 1831 1832 s = splusb(); 1833 r = usb_insert_transfer(reqh); 1834 splx(s); 1835 if (r != USBD_NORMAL_COMPLETION) 1836 return (r); 1837 else 1838 return (ohci_device_ctrl_start(reqh)); 1839 } 1840 1841 usbd_status 1842 ohci_device_ctrl_start(reqh) 1843 usbd_request_handle reqh; 1844 { 1845 ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus; 1846 usbd_status r; 1847 1848 if (!reqh->isreq) { 1849 /* XXX panic */ 1850 printf("ohci_device_ctrl_transfer: not a request\n"); 1851 return (USBD_INVAL); 1852 } 1853 1854 r = ohci_device_request(reqh); 1855 if (r != USBD_NORMAL_COMPLETION) 1856 return (r); 1857 1858 if (sc->sc_bus.use_polling) 1859 ohci_waitintr(sc, reqh); 1860 return (USBD_IN_PROGRESS); 1861 } 1862 1863 /* Abort a device control request. */ 1864 void 1865 ohci_device_ctrl_abort(reqh) 1866 usbd_request_handle reqh; 1867 { 1868 /* XXX inactivate */ 1869 usb_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is donw */ 1870 /* XXX call done */ 1871 } 1872 1873 /* Close a device control pipe. */ 1874 void 1875 ohci_device_ctrl_close(pipe) 1876 usbd_pipe_handle pipe; 1877 { 1878 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1879 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1880 ohci_soft_ed_t *sed = opipe->sed; 1881 int s; 1882 1883 s = splusb(); 1884 sed->ed->ed_flags |= LE(OHCI_ED_SKIP); 1885 if ((LE(sed->ed->ed_tailp) & OHCI_TAILMASK) != LE(sed->ed->ed_headp)) 1886 usb_delay_ms(&sc->sc_bus, 2); 1887 ohci_rem_ed(sed, sc->sc_ctrl_head); 1888 splx(s); 1889 ohci_free_std(sc, opipe->tail); 1890 ohci_free_sed(sc, opipe->sed); 1891 /* XXX free other resources */ 1892 } 1893 1894 /************************/ 1895 1896 usbd_status 1897 ohci_device_bulk_transfer(reqh) 1898 usbd_request_handle reqh; 1899 { 1900 int s; 1901 usbd_status r; 1902 1903 s = splusb(); 1904 r = usb_insert_transfer(reqh); 1905 splx(s); 1906 if (r != USBD_NORMAL_COMPLETION) 1907 return (r); 1908 else 1909 return (ohci_device_bulk_start(reqh)); 1910 } 1911 1912 usbd_status 1913 ohci_device_bulk_start(reqh) 1914 usbd_request_handle reqh; 1915 { 1916 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 1917 usbd_device_handle dev = opipe->pipe.device; 1918 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1919 int addr = dev->address; 1920 ohci_soft_td_t *xfer, *tail; 1921 ohci_soft_ed_t *sed; 1922 usb_dma_t *dmap; 1923 usbd_status r; 1924 int s, len, isread; 1925 1926 if (reqh->isreq) { 1927 /* XXX panic */ 1928 printf("ohci_device_bulk_transfer: a request\n"); 1929 return (USBD_INVAL); 1930 } 1931 1932 len = reqh->length; 1933 dmap = &opipe->u.bulk.datadma; 1934 isread = reqh->pipe->endpoint->edesc->bEndpointAddress & UE_IN; 1935 sed = opipe->sed; 1936 1937 opipe->u.bulk.isread = isread; 1938 opipe->u.bulk.length = len; 1939 1940 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1941 if (r != USBD_NORMAL_COMPLETION) 1942 goto ret1; 1943 1944 tail = ohci_alloc_std(sc); 1945 if (!tail) { 1946 r = USBD_NOMEM; 1947 goto ret2; 1948 } 1949 tail->reqh = 0; 1950 1951 /* Update device address */ 1952 sed->ed->ed_flags = LE( 1953 (LE(sed->ed->ed_flags) & ~OHCI_ED_ADDRMASK) | 1954 OHCI_ED_SET_FA(addr)); 1955 1956 /* Set up data transaction */ 1957 xfer = opipe->tail; 1958 xfer->td->td_flags = LE( 1959 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 1960 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY | 1961 (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0)); 1962 xfer->td->td_cbp = LE(DMAADDR(dmap)); 1963 xfer->nexttd = tail; 1964 xfer->td->td_nexttd = LE(tail->physaddr); 1965 xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1); 1966 xfer->len = len; 1967 xfer->reqh = reqh; 1968 1969 reqh->hcpriv = xfer; 1970 1971 if (!isread) 1972 memcpy(KERNADDR(dmap), reqh->buffer, len); 1973 1974 /* Insert ED in schedule */ 1975 s = splusb(); 1976 ohci_hash_add_td(sc, xfer); 1977 sed->ed->ed_tailp = LE(tail->physaddr); 1978 opipe->tail = tail; 1979 sed->ed->ed_flags &= LE(~OHCI_ED_SKIP); /* XXX why */ 1980 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 1981 if (reqh->timeout && !sc->sc_bus.use_polling) { 1982 usb_timeout(ohci_timeout, reqh, 1983 MS_TO_TICKS(reqh->timeout), reqh->timo_handle); 1984 } 1985 splx(s); 1986 1987 return (USBD_IN_PROGRESS); 1988 1989 ret2: 1990 usb_freemem(sc->sc_dmatag, dmap); 1991 ret1: 1992 return (r); 1993 } 1994 1995 /* Abort a device bulk request. */ 1996 void 1997 ohci_device_bulk_abort(reqh) 1998 usbd_request_handle reqh; 1999 { 2000 #if 0 2001 sed->ed->ed_flags |= LE(OHCI_ED_SKIP); 2002 if ((LE(sed->ed->ed_tailp) & OHCI_TAILMASK) != LE(sed->ed->ed_headp)) 2003 usb_delay_ms(reqh->pipe->device->bus, 2); 2004 #endif 2005 /* XXX inactivate */ 2006 usb_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is done */ 2007 /* XXX call done */ 2008 } 2009 2010 /* Close a device bulk pipe. */ 2011 void 2012 ohci_device_bulk_close(pipe) 2013 usbd_pipe_handle pipe; 2014 { 2015 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2016 usbd_device_handle dev = opipe->pipe.device; 2017 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2018 int s; 2019 2020 s = splusb(); 2021 ohci_rem_ed(opipe->sed, sc->sc_bulk_head); 2022 splx(s); 2023 ohci_free_std(sc, opipe->tail); 2024 ohci_free_sed(sc, opipe->sed); 2025 /* XXX free other resources */ 2026 } 2027 2028 /************************/ 2029 2030 usbd_status 2031 ohci_device_intr_transfer(reqh) 2032 usbd_request_handle reqh; 2033 { 2034 int s; 2035 usbd_status r; 2036 2037 s = splusb(); 2038 r = usb_insert_transfer(reqh); 2039 splx(s); 2040 if (r != USBD_NORMAL_COMPLETION) 2041 return (r); 2042 else 2043 return (ohci_device_intr_start(reqh)); 2044 } 2045 2046 usbd_status 2047 ohci_device_intr_start(reqh) 2048 usbd_request_handle reqh; 2049 { 2050 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 2051 usbd_device_handle dev = opipe->pipe.device; 2052 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2053 ohci_soft_ed_t *sed = opipe->sed; 2054 ohci_soft_td_t *xfer, *tail; 2055 usb_dma_t *dmap; 2056 usbd_status r; 2057 int len; 2058 int s; 2059 2060 DPRINTFN(3, ("ohci_device_intr_transfer: reqh=%p buf=%p len=%d " 2061 "flags=%d priv=%p\n", 2062 reqh, reqh->buffer, reqh->length, reqh->flags, reqh->priv)); 2063 2064 if (reqh->isreq) 2065 panic("ohci_device_intr_transfer: a request\n"); 2066 2067 len = reqh->length; 2068 dmap = &opipe->u.intr.datadma; 2069 if (len == 0) 2070 return (USBD_INVAL); /* XXX should it be? */ 2071 2072 xfer = opipe->tail; 2073 tail = ohci_alloc_std(sc); 2074 if (!tail) { 2075 r = USBD_NOMEM; 2076 goto ret1; 2077 } 2078 tail->reqh = 0; 2079 2080 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 2081 if (r != USBD_NORMAL_COMPLETION) 2082 goto ret2; 2083 2084 xfer->td->td_flags = LE( 2085 OHCI_TD_IN | OHCI_TD_NOCC | 2086 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2087 if (reqh->flags & USBD_SHORT_XFER_OK) 2088 xfer->td->td_flags |= LE(OHCI_TD_R); 2089 xfer->td->td_cbp = LE(DMAADDR(dmap)); 2090 xfer->nexttd = tail; 2091 xfer->td->td_nexttd = LE(tail->physaddr); 2092 xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1); 2093 xfer->len = len; 2094 xfer->reqh = reqh; 2095 2096 reqh->hcpriv = xfer; 2097 2098 #if USB_DEBUG 2099 if (ohcidebug > 5) { 2100 printf("ohci_device_intr_transfer:\n"); 2101 ohci_dump_ed(sed); 2102 ohci_dump_tds(xfer); 2103 } 2104 #endif 2105 2106 /* Insert ED in schedule */ 2107 s = splusb(); 2108 ohci_hash_add_td(sc, xfer); 2109 sed->ed->ed_tailp = LE(tail->physaddr); 2110 opipe->tail = tail; 2111 #if 0 2112 if (reqh->timeout && !sc->sc_bus.use_polling) { 2113 usb_timeout(ohci_timeout, reqh, 2114 MS_TO_TICKS(reqh->timeout), reqh->timo_handle); 2115 } 2116 #endif 2117 sed->ed->ed_flags &= LE(~OHCI_ED_SKIP); 2118 2119 #ifdef USB_DEBUG 2120 if (ohcidebug > 5) { 2121 delay(5000); 2122 printf("ohci_device_intr_transfer: status=%x\n", 2123 OREAD4(sc, OHCI_COMMAND_STATUS)); 2124 ohci_dump_ed(sed); 2125 ohci_dump_tds(xfer); 2126 } 2127 #endif 2128 splx(s); 2129 2130 return (USBD_IN_PROGRESS); 2131 2132 ret2: 2133 ohci_free_std(sc, xfer); 2134 ret1: 2135 return (r); 2136 } 2137 2138 /* Abort a device control request. */ 2139 void 2140 ohci_device_intr_abort(reqh) 2141 usbd_request_handle reqh; 2142 { 2143 /* XXX inactivate */ 2144 usb_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is done */ 2145 if (reqh->pipe->repeat) { 2146 DPRINTF(("ohci_device_intr_abort: remove\n")); 2147 reqh->pipe->repeat = 0; 2148 ohci_intr_done((ohci_softc_t *)reqh->pipe->device->bus, reqh); 2149 } 2150 } 2151 2152 /* Close a device interrupt pipe. */ 2153 void 2154 ohci_device_intr_close(pipe) 2155 usbd_pipe_handle pipe; 2156 { 2157 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2158 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2159 int nslots = opipe->u.intr.nslots; 2160 int pos = opipe->u.intr.pos; 2161 int j; 2162 ohci_soft_ed_t *p, *sed = opipe->sed; 2163 int s; 2164 2165 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2166 pipe, nslots, pos)); 2167 s = splusb(); 2168 sed->ed->ed_flags |= LE(OHCI_ED_SKIP); 2169 if ((sed->ed->ed_tailp & LE(OHCI_TAILMASK)) != sed->ed->ed_headp) 2170 usb_delay_ms(&sc->sc_bus, 2); 2171 2172 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2173 ; 2174 if (!p) 2175 panic("ohci_device_intr_close: ED not found\n"); 2176 p->next = sed->next; 2177 p->ed->ed_nexted = sed->ed->ed_nexted; 2178 splx(s); 2179 2180 for (j = 0; j < nslots; j++) 2181 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2182 2183 ohci_free_std(sc, opipe->tail); 2184 ohci_free_sed(sc, opipe->sed); 2185 /* XXX free other resources */ 2186 } 2187 2188 usbd_status 2189 ohci_device_setintr(sc, opipe, ival) 2190 ohci_softc_t *sc; 2191 struct ohci_pipe *opipe; 2192 int ival; 2193 { 2194 int i, j, s, best; 2195 u_int npoll, slow, shigh, nslots; 2196 u_int bestbw, bw; 2197 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2198 2199 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2200 if (ival == 0) { 2201 printf("ohci_setintr: 0 interval\n"); 2202 return (USBD_INVAL); 2203 } 2204 2205 npoll = OHCI_NO_INTRS; 2206 while (npoll > ival) 2207 npoll /= 2; 2208 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2209 2210 /* 2211 * We now know which level in the tree the ED must go into. 2212 * Figure out which slot has most bandwidth left over. 2213 * Slots to examine: 2214 * npoll 2215 * 1 0 2216 * 2 1 2 2217 * 4 3 4 5 6 2218 * 8 7 8 9 10 11 12 13 14 2219 * N (N-1) .. (N-1+N-1) 2220 */ 2221 slow = npoll-1; 2222 shigh = slow + npoll; 2223 nslots = OHCI_NO_INTRS / npoll; 2224 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2225 bw = 0; 2226 for (j = 0; j < nslots; j++) 2227 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 2228 if (bw < bestbw) { 2229 best = i; 2230 bestbw = bw; 2231 } 2232 } 2233 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2234 best, slow, shigh, bestbw)); 2235 2236 s = splusb(); 2237 hsed = sc->sc_eds[best]; 2238 sed->next = hsed->next; 2239 sed->ed->ed_nexted = hsed->ed->ed_nexted; 2240 hsed->next = sed; 2241 hsed->ed->ed_nexted = LE(sed->physaddr); 2242 splx(s); 2243 2244 for (j = 0; j < nslots; j++) 2245 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 2246 opipe->u.intr.nslots = nslots; 2247 opipe->u.intr.pos = best; 2248 2249 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 2250 return (USBD_NORMAL_COMPLETION); 2251 } 2252 2253
Indexes created Tue Sep 23 22:09:46 GMT 2025