ohci.c revision 1.34
1 /* $NetBSD: ohci.c,v 1.34 1999/08/14 08:56:09 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (augustss (at) carlstedt.se) at 9 * Carlstedt Research & Technology. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * USB Open Host Controller driver. 42 * 43 * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe 44 * USB spec: http://www.usb.org/developers/data/usb11.pdf 45 */ 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/kernel.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) 52 #include <sys/device.h> 53 #elif defined(__FreeBSD__) 54 #include <sys/module.h> 55 #include <sys/bus.h> 56 #endif 57 #include <sys/proc.h> 58 #include <sys/queue.h> 59 #include <sys/select.h> 60 61 #include <machine/bus.h> 62 #include <machine/endian.h> 63 64 #include <dev/usb/usb.h> 65 #include <dev/usb/usbdi.h> 66 #include <dev/usb/usbdivar.h> 67 #include <dev/usb/usb_quirks.h> 68 #include <dev/usb/usb_mem.h> 69 70 #include <dev/usb/ohcireg.h> 71 #include <dev/usb/ohcivar.h> 72 73 #if defined(__FreeBSD__) 74 #include <machine/clock.h> 75 76 #define delay(d) DELAY(d) 77 78 #endif 79 80 /* 81 * The OHCI controller is little endian, so on big endian machines 82 * the data strored in memory needs to be swapped. 83 */ 84 #if BYTE_ORDER == BIG_ENDIAN 85 #define LE(x) (bswap32(x)) 86 #else 87 #define LE(x) (x) 88 #endif 89 90 struct ohci_pipe; 91 92 ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *)); 93 void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *)); 94 95 ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *)); 96 void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *)); 97 98 void ohci_power __P((int, void *)); 99 usbd_status ohci_open __P((usbd_pipe_handle)); 100 void ohci_poll __P((struct usbd_bus *)); 101 void ohci_waitintr __P((ohci_softc_t *, usbd_request_handle)); 102 void ohci_rhsc __P((ohci_softc_t *, usbd_request_handle)); 103 void ohci_process_done __P((ohci_softc_t *, ohci_physaddr_t)); 104 void ohci_idone __P((ohci_softc_t *, usbd_request_handle)); 105 void ohci_done __P((ohci_softc_t *, usbd_request_handle)); 106 void ohci_ctrl_done __P((ohci_softc_t *, usbd_request_handle)); 107 void ohci_intr_done __P((ohci_softc_t *, usbd_request_handle)); 108 void ohci_bulk_done __P((ohci_softc_t *, usbd_request_handle)); 109 110 usbd_status ohci_device_request __P((usbd_request_handle reqh)); 111 void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 112 void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 113 void ohci_hash_add_td __P((ohci_softc_t *, ohci_soft_td_t *)); 114 void ohci_hash_rem_td __P((ohci_softc_t *, ohci_soft_td_t *)); 115 ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, ohci_physaddr_t)); 116 117 usbd_status ohci_root_ctrl_transfer __P((usbd_request_handle)); 118 usbd_status ohci_root_ctrl_start __P((usbd_request_handle)); 119 void ohci_root_ctrl_abort __P((usbd_request_handle)); 120 void ohci_root_ctrl_close __P((usbd_pipe_handle)); 121 122 usbd_status ohci_root_intr_transfer __P((usbd_request_handle)); 123 usbd_status ohci_root_intr_start __P((usbd_request_handle)); 124 void ohci_root_intr_abort __P((usbd_request_handle)); 125 void ohci_root_intr_close __P((usbd_pipe_handle)); 126 127 usbd_status ohci_device_ctrl_transfer __P((usbd_request_handle)); 128 usbd_status ohci_device_ctrl_start __P((usbd_request_handle)); 129 void ohci_device_ctrl_abort __P((usbd_request_handle)); 130 void ohci_device_ctrl_close __P((usbd_pipe_handle)); 131 132 usbd_status ohci_device_bulk_transfer __P((usbd_request_handle)); 133 usbd_status ohci_device_bulk_start __P((usbd_request_handle)); 134 void ohci_device_bulk_abort __P((usbd_request_handle)); 135 void ohci_device_bulk_close __P((usbd_pipe_handle)); 136 137 usbd_status ohci_device_intr_transfer __P((usbd_request_handle)); 138 usbd_status ohci_device_intr_start __P((usbd_request_handle)); 139 void ohci_device_intr_abort __P((usbd_request_handle)); 140 void ohci_device_intr_close __P((usbd_pipe_handle)); 141 usbd_status ohci_device_setintr __P((ohci_softc_t *sc, 142 struct ohci_pipe *pipe, int ival)); 143 144 int ohci_str __P((usb_string_descriptor_t *, int, char *)); 145 146 void ohci_timeout __P((void *)); 147 void ohci_rhsc_able __P((ohci_softc_t *, int)); 148 149 void ohci_close_pipe __P((usbd_pipe_handle pipe, 150 ohci_soft_ed_t *head)); 151 void ohci_abort_request __P((usbd_request_handle reqh)); 152 153 #ifdef USB_DEBUG 154 ohci_softc_t *thesc; 155 void ohci_dumpregs __P((ohci_softc_t *)); 156 void ohci_dump_tds __P((ohci_soft_td_t *)); 157 void ohci_dump_td __P((ohci_soft_td_t *)); 158 void ohci_dump_ed __P((ohci_soft_ed_t *)); 159 #endif 160 161 #if defined(__NetBSD__) 162 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 163 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 164 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 165 #elif defined(__FreeBSD__) 166 #define OWRITE4(sc, r, x) (*(u_int32_t *) ((sc)->sc_iobase + (r)) = (x)) 167 #define OREAD4(sc, r) (*(u_int32_t *) ((sc)->sc_iobase + (r))) 168 #define OREAD2(sc, r) (*(u_int16_t *) ((sc)->sc_iobase + (r))) 169 #endif 170 171 /* Reverse the bits in a value 0 .. 31 */ 172 static u_int8_t revbits[OHCI_NO_INTRS] = 173 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 174 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 175 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 176 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 177 178 struct ohci_pipe { 179 struct usbd_pipe pipe; 180 ohci_soft_ed_t *sed; 181 ohci_soft_td_t *tail; 182 /* Info needed for different pipe kinds. */ 183 union { 184 /* Control pipe */ 185 struct { 186 usb_dma_t datadma; 187 usb_dma_t reqdma; 188 u_int length; 189 ohci_soft_td_t *setup, *xfer, *stat; 190 } ctl; 191 /* Interrupt pipe */ 192 struct { 193 usb_dma_t datadma; 194 int nslots; 195 int pos; 196 } intr; 197 /* Bulk pipe */ 198 struct { 199 usb_dma_t datadma; 200 u_int length; 201 int isread; 202 } bulk; 203 } u; 204 }; 205 206 #define OHCI_INTR_ENDPT 1 207 208 struct usbd_methods ohci_root_ctrl_methods = { 209 ohci_root_ctrl_transfer, 210 ohci_root_ctrl_start, 211 ohci_root_ctrl_abort, 212 ohci_root_ctrl_close, 213 0, 214 }; 215 216 struct usbd_methods ohci_root_intr_methods = { 217 ohci_root_intr_transfer, 218 ohci_root_intr_start, 219 ohci_root_intr_abort, 220 ohci_root_intr_close, 221 0, 222 }; 223 224 struct usbd_methods ohci_device_ctrl_methods = { 225 ohci_device_ctrl_transfer, 226 ohci_device_ctrl_start, 227 ohci_device_ctrl_abort, 228 ohci_device_ctrl_close, 229 0, 230 }; 231 232 struct usbd_methods ohci_device_intr_methods = { 233 ohci_device_intr_transfer, 234 ohci_device_intr_start, 235 ohci_device_intr_abort, 236 ohci_device_intr_close, 237 }; 238 239 struct usbd_methods ohci_device_bulk_methods = { 240 ohci_device_bulk_transfer, 241 ohci_device_bulk_start, 242 ohci_device_bulk_abort, 243 ohci_device_bulk_close, 244 0, 245 }; 246 247 ohci_soft_ed_t * 248 ohci_alloc_sed(sc) 249 ohci_softc_t *sc; 250 { 251 ohci_soft_ed_t *sed; 252 usbd_status r; 253 int i, offs; 254 usb_dma_t dma; 255 256 if (!sc->sc_freeeds) { 257 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 258 sed = malloc(sizeof(ohci_soft_ed_t) * OHCI_ED_CHUNK, 259 M_USBHC, M_NOWAIT); 260 if (!sed) 261 return 0; 262 r = usb_allocmem(sc->sc_dmatag, OHCI_ED_SIZE * OHCI_ED_CHUNK, 263 OHCI_ED_ALIGN, &dma); 264 if (r != USBD_NORMAL_COMPLETION) { 265 free(sed, M_USBHC); 266 return 0; 267 } 268 for(i = 0; i < OHCI_ED_CHUNK; i++, sed++) { 269 offs = i * OHCI_ED_SIZE; 270 sed->physaddr = DMAADDR(&dma) + offs; 271 sed->ed = (ohci_ed_t *) 272 ((char *)KERNADDR(&dma) + offs); 273 sed->next = sc->sc_freeeds; 274 sc->sc_freeeds = sed; 275 } 276 } 277 sed = sc->sc_freeeds; 278 sc->sc_freeeds = sed->next; 279 memset(sed->ed, 0, OHCI_ED_SIZE); 280 sed->next = 0; 281 return sed; 282 } 283 284 void 285 ohci_free_sed(sc, sed) 286 ohci_softc_t *sc; 287 ohci_soft_ed_t *sed; 288 { 289 sed->next = sc->sc_freeeds; 290 sc->sc_freeeds = sed; 291 } 292 293 ohci_soft_td_t * 294 ohci_alloc_std(sc) 295 ohci_softc_t *sc; 296 { 297 ohci_soft_td_t *std; 298 usbd_status r; 299 int i, offs; 300 usb_dma_t dma; 301 302 if (!sc->sc_freetds) { 303 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 304 std = malloc(sizeof(ohci_soft_td_t) * OHCI_TD_CHUNK, 305 M_USBHC, M_NOWAIT); 306 if (!std) 307 return 0; 308 r = usb_allocmem(sc->sc_dmatag, OHCI_TD_SIZE * OHCI_TD_CHUNK, 309 OHCI_TD_ALIGN, &dma); 310 if (r != USBD_NORMAL_COMPLETION) { 311 free(std, M_USBHC); 312 return 0; 313 } 314 for(i = 0; i < OHCI_TD_CHUNK; i++, std++) { 315 offs = i * OHCI_TD_SIZE; 316 std->physaddr = DMAADDR(&dma) + offs; 317 std->td = (ohci_td_t *) 318 ((char *)KERNADDR(&dma) + offs); 319 std->nexttd = sc->sc_freetds; 320 sc->sc_freetds = std; 321 } 322 } 323 std = sc->sc_freetds; 324 sc->sc_freetds = std->nexttd; 325 memset(std->td, 0, OHCI_TD_SIZE); 326 std->nexttd = 0; 327 return (std); 328 } 329 330 void 331 ohci_free_std(sc, std) 332 ohci_softc_t *sc; 333 ohci_soft_td_t *std; 334 { 335 std->nexttd = sc->sc_freetds; 336 sc->sc_freetds = std; 337 } 338 339 usbd_status 340 ohci_init(sc) 341 ohci_softc_t *sc; 342 { 343 ohci_soft_ed_t *sed, *psed; 344 usbd_status r; 345 int rev; 346 int i; 347 u_int32_t s, ctl, ival, hcr, fm, per; 348 349 DPRINTF(("ohci_init: start\n")); 350 rev = OREAD4(sc, OHCI_REVISION); 351 printf("%s: OHCI version %d.%d%s\n", USBDEVNAME(sc->sc_bus.bdev), 352 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 353 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 354 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 355 printf("%s: unsupported OHCI revision\n", 356 USBDEVNAME(sc->sc_bus.bdev)); 357 return (USBD_INVAL); 358 } 359 360 for (i = 0; i < OHCI_HASH_SIZE; i++) 361 LIST_INIT(&sc->sc_hash_tds[i]); 362 363 /* Allocate the HCCA area. */ 364 r = usb_allocmem(sc->sc_dmatag, OHCI_HCCA_SIZE, 365 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 366 if (r != USBD_NORMAL_COMPLETION) 367 return (r); 368 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 369 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 370 371 sc->sc_eintrs = OHCI_NORMAL_INTRS; 372 373 sc->sc_ctrl_head = ohci_alloc_sed(sc); 374 if (!sc->sc_ctrl_head) { 375 r = USBD_NOMEM; 376 goto bad1; 377 } 378 sc->sc_ctrl_head->ed->ed_flags |= LE(OHCI_ED_SKIP); 379 380 sc->sc_bulk_head = ohci_alloc_sed(sc); 381 if (!sc->sc_bulk_head) { 382 r = USBD_NOMEM; 383 goto bad2; 384 } 385 sc->sc_bulk_head->ed->ed_flags |= LE(OHCI_ED_SKIP); 386 387 /* Allocate all the dummy EDs that make up the interrupt tree. */ 388 for (i = 0; i < OHCI_NO_EDS; i++) { 389 sed = ohci_alloc_sed(sc); 390 if (!sed) { 391 while (--i >= 0) 392 ohci_free_sed(sc, sc->sc_eds[i]); 393 r = USBD_NOMEM; 394 goto bad3; 395 } 396 /* All ED fields are set to 0. */ 397 sc->sc_eds[i] = sed; 398 sed->ed->ed_flags |= LE(OHCI_ED_SKIP); 399 if (i != 0) { 400 psed = sc->sc_eds[(i-1) / 2]; 401 sed->next = psed; 402 sed->ed->ed_nexted = LE(psed->physaddr); 403 } 404 } 405 /* 406 * Fill HCCA interrupt table. The bit reversal is to get 407 * the tree set up properly to spread the interrupts. 408 */ 409 for (i = 0; i < OHCI_NO_INTRS; i++) 410 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 411 LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 412 413 /* Determine in what context we are running. */ 414 ctl = OREAD4(sc, OHCI_CONTROL); 415 if (ctl & OHCI_IR) { 416 /* SMM active, request change */ 417 DPRINTF(("ohci_init: SMM active, request owner change\n")); 418 s = OREAD4(sc, OHCI_COMMAND_STATUS); 419 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 420 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 421 delay(1000); 422 ctl = OREAD4(sc, OHCI_CONTROL); 423 } 424 if ((ctl & OHCI_IR) == 0) { 425 printf("%s: SMM does not respond, resetting\n", 426 USBDEVNAME(sc->sc_bus.bdev)); 427 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 428 goto reset; 429 } 430 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 431 /* BIOS started controller. */ 432 DPRINTF(("ohci_init: BIOS active\n")); 433 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 434 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 435 delay(USB_RESUME_DELAY * 1000); 436 } 437 } else { 438 DPRINTF(("ohci_init: cold started\n")); 439 reset: 440 /* Controller was cold started. */ 441 delay(USB_BUS_RESET_DELAY * 1000); 442 } 443 444 /* 445 * This reset should not be necessary according to the OHCI spec, but 446 * without it some controllers do not start. 447 */ 448 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 449 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 450 delay(USB_BUS_RESET_DELAY * 1000); 451 452 /* We now own the host controller and the bus has been reset. */ 453 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 454 455 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 456 /* Nominal time for a reset is 10 us. */ 457 for (i = 0; i < 10; i++) { 458 delay(10); 459 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 460 if (!hcr) 461 break; 462 } 463 if (hcr) { 464 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 465 r = USBD_IOERROR; 466 goto bad3; 467 } 468 #ifdef USB_DEBUG 469 thesc = sc; 470 if (ohcidebug > 15) 471 ohci_dumpregs(sc); 472 #endif 473 474 /* The controller is now in suspend state, we have 2ms to finish. */ 475 476 /* Set up HC registers. */ 477 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 478 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 479 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 480 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 481 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 482 ctl = OREAD4(sc, OHCI_CONTROL); 483 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 484 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 485 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 486 /* And finally start it! */ 487 OWRITE4(sc, OHCI_CONTROL, ctl); 488 489 /* 490 * The controller is now OPERATIONAL. Set a some final 491 * registers that should be set earlier, but that the 492 * controller ignores when in the SUSPEND state. 493 */ 494 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 495 fm |= OHCI_FSMPS(ival) | ival; 496 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 497 per = OHCI_PERIODIC(ival); /* 90% periodic */ 498 OWRITE4(sc, OHCI_PERIODIC_START, per); 499 500 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 501 502 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 503 504 #ifdef USB_DEBUG 505 if (ohcidebug > 5) 506 ohci_dumpregs(sc); 507 #endif 508 509 /* Set up the bus struct. */ 510 sc->sc_bus.open_pipe = ohci_open; 511 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 512 sc->sc_bus.do_poll = ohci_poll; 513 514 (void)powerhook_establish(ohci_power, sc); 515 516 return (USBD_NORMAL_COMPLETION); 517 518 bad3: 519 ohci_free_sed(sc, sc->sc_ctrl_head); 520 bad2: 521 ohci_free_sed(sc, sc->sc_bulk_head); 522 bad1: 523 usb_freemem(sc->sc_dmatag, &sc->sc_hccadma); 524 return (r); 525 } 526 527 void 528 ohci_power(why, v) 529 int why; 530 void *v; 531 { 532 #ifdef USB_DEBUG 533 ohci_softc_t *sc = v; 534 535 printf("ohci_power: sc=%p, why=%d\n", sc, why); 536 /* XXX should suspend/resume */ 537 ohci_dumpregs(sc); 538 #endif 539 } 540 541 #ifdef USB_DEBUG 542 void ohcidump(void); 543 void ohcidump(void) { ohci_dumpregs(thesc); } 544 545 void 546 ohci_dumpregs(sc) 547 ohci_softc_t *sc; 548 { 549 printf("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 550 OREAD4(sc, OHCI_REVISION), 551 OREAD4(sc, OHCI_CONTROL), 552 OREAD4(sc, OHCI_COMMAND_STATUS)); 553 printf(" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 554 OREAD4(sc, OHCI_INTERRUPT_STATUS), 555 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 556 OREAD4(sc, OHCI_INTERRUPT_DISABLE)); 557 printf(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 558 OREAD4(sc, OHCI_HCCA), 559 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 560 OREAD4(sc, OHCI_CONTROL_HEAD_ED)); 561 printf(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 562 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 563 OREAD4(sc, OHCI_BULK_HEAD_ED), 564 OREAD4(sc, OHCI_BULK_CURRENT_ED)); 565 printf(" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 566 OREAD4(sc, OHCI_DONE_HEAD), 567 OREAD4(sc, OHCI_FM_INTERVAL), 568 OREAD4(sc, OHCI_FM_REMAINING)); 569 printf(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 570 OREAD4(sc, OHCI_FM_NUMBER), 571 OREAD4(sc, OHCI_PERIODIC_START), 572 OREAD4(sc, OHCI_LS_THRESHOLD)); 573 printf(" desca=0x%08x descb=0x%08x stat=0x%08x\n", 574 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 575 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 576 OREAD4(sc, OHCI_RH_STATUS)); 577 printf(" port1=0x%08x port2=0x%08x\n", 578 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 579 OREAD4(sc, OHCI_RH_PORT_STATUS(2))); 580 printf(" HCCA: frame_number=0x%04x done_head=0x%08x\n", 581 LE(sc->sc_hcca->hcca_frame_number), 582 LE(sc->sc_hcca->hcca_done_head)); 583 } 584 #endif 585 586 int 587 ohci_intr(p) 588 void *p; 589 { 590 ohci_softc_t *sc = p; 591 u_int32_t intrs, eintrs; 592 ohci_physaddr_t done; 593 594 /* In case the interrupt occurs before initialization has completed. */ 595 if (sc == NULL || sc->sc_hcca == NULL) { 596 #ifdef DIAGNOSTIC 597 printf("ohci_intr: sc->sc_hcca == NULL\n"); 598 #endif 599 return (0); 600 } 601 602 intrs = 0; 603 done = LE(sc->sc_hcca->hcca_done_head); 604 if (done != 0) { 605 sc->sc_hcca->hcca_done_head = 0; 606 if (done & ~OHCI_DONE_INTRS) 607 intrs = OHCI_WDH; 608 if (done & OHCI_DONE_INTRS) 609 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 610 } else 611 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 612 if (!intrs) 613 return (0); 614 intrs &= ~OHCI_MIE; 615 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 616 eintrs = intrs & sc->sc_eintrs; 617 if (!eintrs) 618 return (0); 619 620 sc->sc_intrs++; 621 DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n", 622 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 623 (u_int)eintrs)); 624 625 if (eintrs & OHCI_SO) { 626 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev)); 627 /* XXX do what */ 628 intrs &= ~OHCI_SO; 629 } 630 if (eintrs & OHCI_WDH) { 631 ohci_process_done(sc, done &~ OHCI_DONE_INTRS); 632 intrs &= ~OHCI_WDH; 633 } 634 if (eintrs & OHCI_RD) { 635 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 636 /* XXX process resume detect */ 637 } 638 if (eintrs & OHCI_UE) { 639 printf("%s: unrecoverable error, controller halted\n", 640 USBDEVNAME(sc->sc_bus.bdev)); 641 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 642 /* XXX what else */ 643 } 644 if (eintrs & OHCI_RHSC) { 645 ohci_rhsc(sc, sc->sc_intrreqh); 646 intrs &= ~OHCI_RHSC; 647 648 /* 649 * Disable RHSC interrupt for now, because it will be 650 * on until the port has been reset. 651 */ 652 ohci_rhsc_able(sc, 0); 653 } 654 655 /* Block unprocessed interrupts. XXX */ 656 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 657 sc->sc_eintrs &= ~intrs; 658 659 return (1); 660 } 661 662 void 663 ohci_rhsc_able(sc, on) 664 ohci_softc_t *sc; 665 int on; 666 { 667 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 668 if (on) { 669 sc->sc_eintrs |= OHCI_RHSC; 670 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 671 } else { 672 sc->sc_eintrs &= ~OHCI_RHSC; 673 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 674 } 675 } 676 677 #ifdef USB_DEBUG 678 char *ohci_cc_strs[] = { 679 "NO_ERROR", 680 "CRC", 681 "BIT_STUFFING", 682 "DATA_TOGGLE_MISMATCH", 683 "STALL", 684 "DEVICE_NOT_RESPONDING", 685 "PID_CHECK_FAILURE", 686 "UNEXPECTED_PID", 687 "DATA_OVERRUN", 688 "DATA_UNDERRUN", 689 "BUFFER_OVERRUN", 690 "BUFFER_UNDERRUN", 691 "NOT_ACCESSED", 692 }; 693 #endif 694 695 void 696 ohci_process_done(sc, done) 697 ohci_softc_t *sc; 698 ohci_physaddr_t done; 699 { 700 ohci_soft_td_t *std, *sdone; 701 usbd_request_handle reqh; 702 int len, cc; 703 704 DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done)); 705 706 /* Reverse the done list. */ 707 for (sdone = 0; done; done = LE(std->td->td_nexttd)) { 708 std = ohci_hash_find_td(sc, done); 709 std->dnext = sdone; 710 sdone = std; 711 } 712 713 #ifdef USB_DEBUG 714 if (ohcidebug > 10) { 715 printf("ohci_process_done: TD done:\n"); 716 ohci_dump_tds(sdone); 717 } 718 #endif 719 720 for (std = sdone; std; std = std->dnext) { 721 reqh = std->reqh; 722 DPRINTFN(10, ("ohci_process_done: std=%p reqh=%p hcpriv=%p\n", 723 std, reqh, reqh->hcpriv)); 724 cc = OHCI_TD_GET_CC(LE(std->td->td_flags)); 725 if (reqh->status == USBD_CANCELLED || 726 reqh->status == USBD_TIMEOUT) { 727 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 728 reqh)); 729 ohci_idone(sc, reqh); 730 } else if (cc == OHCI_CC_NO_ERROR) { 731 len = std->len; 732 if (std->td->td_cbp != 0) 733 len -= LE(std->td->td_be) - 734 LE(std->td->td_cbp) + 1; 735 if (std->flags & OHCI_SET_LEN) 736 reqh->actlen = len; 737 if (std->flags & OHCI_CALL_DONE) { 738 reqh->status = USBD_NORMAL_COMPLETION; 739 ohci_idone(sc, reqh); 740 } 741 } else { 742 ohci_soft_td_t *p, *n; 743 struct ohci_pipe *opipe = 744 (struct ohci_pipe *)reqh->pipe; 745 DPRINTFN(-1,("ohci_process_done: error cc=%d (%s)\n", 746 OHCI_TD_GET_CC(LE(std->td->td_flags)), 747 ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td->td_flags))])); 748 /* 749 * Endpoint is halted. First unlink all the TDs 750 * belonging to the failed transfer, and then restart 751 * the endpoint. 752 */ 753 for (p = std->nexttd; p->reqh == reqh; p = n) { 754 n = p->nexttd; 755 ohci_hash_rem_td(sc, p); 756 ohci_free_std(sc, p); 757 } 758 /* clear halt */ 759 opipe->sed->ed->ed_headp = LE(p->physaddr); 760 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 761 762 if (cc == OHCI_CC_STALL) 763 reqh->status = USBD_STALLED; 764 else 765 reqh->status = USBD_IOERROR; 766 ohci_idone(sc, reqh); 767 } 768 ohci_hash_rem_td(sc, std); 769 ohci_free_std(sc, std); 770 } 771 } 772 773 void 774 ohci_idone(sc, reqh) 775 ohci_softc_t *sc; 776 usbd_request_handle reqh; 777 { 778 ohci_done(sc, reqh); 779 if (reqh->pipe->intrreqh != reqh) 780 usb_start_next(reqh->pipe); 781 } 782 783 void 784 ohci_done(sc, reqh) 785 ohci_softc_t *sc; 786 usbd_request_handle reqh; 787 { 788 #ifdef DIAGNOSTIC 789 if (!reqh->hcpriv) 790 printf("ohci_done: reqh=%p, no hcpriv\n", reqh); 791 #endif 792 reqh->hcpriv = 0; 793 794 switch (reqh->pipe->endpoint->edesc->bmAttributes & UE_XFERTYPE) { 795 case UE_CONTROL: 796 ohci_ctrl_done(sc, reqh); 797 break; 798 case UE_INTERRUPT: 799 ohci_intr_done(sc, reqh); 800 break; 801 case UE_BULK: 802 ohci_bulk_done(sc, reqh); 803 break; 804 case UE_ISOCHRONOUS: 805 printf("ohci_process_done: ISO done?\n"); 806 break; 807 } 808 809 /* And finally execute callback. */ 810 reqh->xfercb(reqh); 811 } 812 813 void 814 ohci_ctrl_done(sc, reqh) 815 ohci_softc_t *sc; 816 usbd_request_handle reqh; 817 { 818 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 819 u_int len = opipe->u.ctl.length; 820 usb_dma_t *dma; 821 822 DPRINTFN(10,("ohci_ctrl_done: reqh=%p\n", reqh)); 823 824 if (!reqh->isreq) { 825 panic("ohci_ctrl_done: not a request\n"); 826 return; 827 } 828 829 if (len != 0) { 830 dma = &opipe->u.ctl.datadma; 831 if (reqh->request.bmRequestType & UT_READ) 832 memcpy(reqh->buffer, KERNADDR(dma), len); 833 usb_freemem(sc->sc_dmatag, dma); 834 } 835 usb_untimeout(ohci_timeout, reqh, reqh->timo_handle); 836 } 837 838 void 839 ohci_intr_done(sc, reqh) 840 ohci_softc_t *sc; 841 usbd_request_handle reqh; 842 { 843 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 844 usb_dma_t *dma; 845 ohci_soft_ed_t *sed = opipe->sed; 846 ohci_soft_td_t *xfer, *tail; 847 848 849 DPRINTFN(10,("ohci_intr_done: reqh=%p, actlen=%d\n", 850 reqh, reqh->actlen)); 851 852 dma = &opipe->u.intr.datadma; 853 memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen); 854 855 if (reqh->pipe->intrreqh == reqh) { 856 xfer = opipe->tail; 857 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 858 if (!tail) { 859 reqh->status = USBD_NOMEM; 860 return; 861 } 862 tail->reqh = 0; 863 864 xfer->td->td_flags = LE( 865 OHCI_TD_IN | OHCI_TD_NOCC | 866 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 867 if (reqh->flags & USBD_SHORT_XFER_OK) 868 xfer->td->td_flags |= LE(OHCI_TD_R); 869 xfer->td->td_cbp = LE(DMAADDR(dma)); 870 xfer->nexttd = tail; 871 xfer->td->td_nexttd = LE(tail->physaddr); 872 xfer->td->td_be = LE(LE(xfer->td->td_cbp) + reqh->length - 1); 873 xfer->len = reqh->length; 874 xfer->reqh = reqh; 875 xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN; 876 reqh->hcpriv = xfer; 877 878 ohci_hash_add_td(sc, xfer); 879 sed->ed->ed_tailp = LE(tail->physaddr); 880 opipe->tail = tail; 881 } else { 882 usb_freemem(sc->sc_dmatag, dma); 883 } 884 } 885 886 void 887 ohci_bulk_done(sc, reqh) 888 ohci_softc_t *sc; 889 usbd_request_handle reqh; 890 { 891 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 892 u_int len = opipe->u.bulk.length; 893 usb_dma_t *dma; 894 895 896 DPRINTFN(10,("ohci_bulk_done: reqh=%p, actlen=%d\n", 897 reqh, reqh->actlen)); 898 899 dma = &opipe->u.bulk.datadma; 900 if (opipe->u.bulk.isread) 901 memcpy(reqh->buffer, KERNADDR(dma), len); 902 usb_freemem(sc->sc_dmatag, dma); 903 usb_untimeout(ohci_timeout, reqh, reqh->timo_handle); 904 } 905 906 void 907 ohci_rhsc(sc, reqh) 908 ohci_softc_t *sc; 909 usbd_request_handle reqh; 910 { 911 usbd_pipe_handle pipe; 912 struct ohci_pipe *opipe; 913 u_char *p; 914 int i, m; 915 int hstatus; 916 917 hstatus = OREAD4(sc, OHCI_RH_STATUS); 918 DPRINTF(("ohci_rhsc: sc=%p reqh=%p hstatus=0x%08x\n", 919 sc, reqh, hstatus)); 920 921 if (reqh == 0) { 922 /* Just ignore the change. */ 923 return; 924 } 925 926 pipe = reqh->pipe; 927 opipe = (struct ohci_pipe *)pipe; 928 929 p = KERNADDR(&opipe->u.intr.datadma); 930 m = min(sc->sc_noport, reqh->length * 8 - 1); 931 memset(p, 0, reqh->length); 932 for (i = 1; i <= m; i++) { 933 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 934 p[i/8] |= 1 << (i%8); 935 } 936 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 937 reqh->actlen = reqh->length; 938 reqh->status = USBD_NORMAL_COMPLETION; 939 reqh->xfercb(reqh); 940 941 if (reqh->pipe->intrreqh != reqh) { 942 sc->sc_intrreqh = 0; 943 usb_freemem(sc->sc_dmatag, &opipe->u.intr.datadma); 944 usb_start_next(reqh->pipe); 945 } 946 } 947 948 /* 949 * Wait here until controller claims to have an interrupt. 950 * Then call ohci_intr and return. Use timeout to avoid waiting 951 * too long. 952 */ 953 void 954 ohci_waitintr(sc, reqh) 955 ohci_softc_t *sc; 956 usbd_request_handle reqh; 957 { 958 int timo = reqh->timeout; 959 int usecs; 960 u_int32_t intrs; 961 962 reqh->status = USBD_IN_PROGRESS; 963 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 964 usb_delay_ms(&sc->sc_bus, 1); 965 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 966 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 967 #ifdef USB_DEBUG 968 if (ohcidebug > 15) 969 ohci_dumpregs(sc); 970 #endif 971 if (intrs) { 972 ohci_intr(sc); 973 if (reqh->status != USBD_IN_PROGRESS) 974 return; 975 } 976 } 977 978 /* Timeout */ 979 DPRINTF(("ohci_waitintr: timeout\n")); 980 reqh->status = USBD_TIMEOUT; 981 ohci_idone(sc, reqh); 982 /* XXX should free TD */ 983 } 984 985 void 986 ohci_poll(bus) 987 struct usbd_bus *bus; 988 { 989 ohci_softc_t *sc = (ohci_softc_t *)bus; 990 991 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 992 ohci_intr(sc); 993 } 994 995 usbd_status 996 ohci_device_request(reqh) 997 usbd_request_handle reqh; 998 { 999 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 1000 usb_device_request_t *req = &reqh->request; 1001 usbd_device_handle dev = opipe->pipe.device; 1002 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1003 int addr = dev->address; 1004 ohci_soft_td_t *setup, *xfer = 0, *stat, *next, *tail; 1005 ohci_soft_ed_t *sed; 1006 usb_dma_t *dmap; 1007 int isread; 1008 int len; 1009 usbd_status r; 1010 int s; 1011 1012 isread = req->bmRequestType & UT_READ; 1013 len = UGETW(req->wLength); 1014 1015 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1016 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1017 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1018 UGETW(req->wIndex), len, addr, 1019 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1020 1021 setup = opipe->tail; 1022 stat = ohci_alloc_std(sc); 1023 if (!stat) { 1024 r = USBD_NOMEM; 1025 goto bad1; 1026 } 1027 tail = ohci_alloc_std(sc); 1028 if (!tail) { 1029 r = USBD_NOMEM; 1030 goto bad2; 1031 } 1032 tail->reqh = 0; 1033 1034 sed = opipe->sed; 1035 dmap = &opipe->u.ctl.datadma; 1036 opipe->u.ctl.length = len; 1037 1038 /* Update device address and length since they may have changed. */ 1039 /* XXX This only needs to be done once, but it's too early in open. */ 1040 sed->ed->ed_flags = LE( 1041 (LE(sed->ed->ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1042 OHCI_ED_SET_FA(addr) | 1043 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1044 1045 /* Set up data transaction */ 1046 if (len != 0) { 1047 xfer = ohci_alloc_std(sc); 1048 if (!xfer) { 1049 r = USBD_NOMEM; 1050 goto bad3; 1051 } 1052 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1053 if (r != USBD_NORMAL_COMPLETION) 1054 goto bad4; 1055 xfer->td->td_flags = LE( 1056 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 1057 OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR | 1058 (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0)); 1059 xfer->td->td_cbp = LE(DMAADDR(dmap)); 1060 xfer->nexttd = stat; 1061 xfer->td->td_nexttd = LE(stat->physaddr); 1062 xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1); 1063 xfer->len = len; 1064 xfer->reqh = reqh; 1065 xfer->flags = OHCI_SET_LEN; 1066 1067 next = xfer; 1068 stat->flags = OHCI_CALL_DONE; 1069 } else { 1070 next = stat; 1071 stat->flags = OHCI_CALL_DONE | OHCI_SET_LEN; 1072 } 1073 1074 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1075 if (!isread && len != 0) 1076 memcpy(KERNADDR(dmap), reqh->buffer, len); 1077 1078 setup->td->td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC | 1079 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1080 setup->td->td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma)); 1081 setup->nexttd = next; 1082 setup->td->td_nexttd = LE(next->physaddr); 1083 setup->td->td_be = LE(LE(setup->td->td_cbp) + sizeof *req - 1); 1084 setup->len = 0; /* XXX The number of byte we count */ 1085 setup->reqh = reqh; 1086 setup->flags = 0; 1087 reqh->hcpriv = setup; 1088 1089 stat->td->td_flags = LE( 1090 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC | 1091 OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1092 stat->td->td_cbp = 0; 1093 stat->nexttd = tail; 1094 stat->td->td_nexttd = LE(tail->physaddr); 1095 stat->td->td_be = 0; 1096 stat->len = 0; 1097 stat->reqh = reqh; 1098 1099 #if USB_DEBUG 1100 if (ohcidebug > 5) { 1101 printf("ohci_device_request:\n"); 1102 ohci_dump_ed(sed); 1103 ohci_dump_tds(setup); 1104 } 1105 #endif 1106 1107 /* Insert ED in schedule */ 1108 s = splusb(); 1109 ohci_hash_add_td(sc, setup); 1110 if (len != 0) 1111 ohci_hash_add_td(sc, xfer); 1112 ohci_hash_add_td(sc, stat); 1113 sed->ed->ed_tailp = LE(tail->physaddr); 1114 opipe->tail = tail; 1115 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1116 if (reqh->timeout && !sc->sc_bus.use_polling) { 1117 usb_timeout(ohci_timeout, reqh, 1118 MS_TO_TICKS(reqh->timeout), reqh->timo_handle); 1119 } 1120 splx(s); 1121 1122 #if USB_DEBUG 1123 if (ohcidebug > 5) { 1124 delay(5000); 1125 printf("ohci_device_request: status=%x\n", 1126 OREAD4(sc, OHCI_COMMAND_STATUS)); 1127 ohci_dump_ed(sed); 1128 ohci_dump_tds(setup); 1129 } 1130 #endif 1131 1132 return (USBD_NORMAL_COMPLETION); 1133 1134 bad4: 1135 ohci_free_std(sc, xfer); 1136 bad3: 1137 ohci_free_std(sc, tail); 1138 bad2: 1139 ohci_free_std(sc, stat); 1140 bad1: 1141 return (r); 1142 } 1143 1144 /* 1145 * Add an ED to the schedule. Called at splusb(). 1146 */ 1147 void 1148 ohci_add_ed(sed, head) 1149 ohci_soft_ed_t *sed; 1150 ohci_soft_ed_t *head; 1151 { 1152 sed->next = head->next; 1153 sed->ed->ed_nexted = head->ed->ed_nexted; 1154 head->next = sed; 1155 head->ed->ed_nexted = LE(sed->physaddr); 1156 } 1157 1158 /* 1159 * Remove an ED from the schedule. Called at splusb(). 1160 */ 1161 void 1162 ohci_rem_ed(sed, head) 1163 ohci_soft_ed_t *sed; 1164 ohci_soft_ed_t *head; 1165 { 1166 ohci_soft_ed_t *p; 1167 1168 /* XXX */ 1169 for (p = head; p && p->next != sed; p = p->next) 1170 ; 1171 if (!p) 1172 panic("ohci_rem_ed: ED not found\n"); 1173 p->next = sed->next; 1174 p->ed->ed_nexted = sed->ed->ed_nexted; 1175 } 1176 1177 /* 1178 * When a transfer is completed the TD is added to the done queue by 1179 * the host controller. This queue is the processed by software. 1180 * Unfortunately the queue contains the physical address of the TD 1181 * and we have no simple way to translate this back to a kernel address. 1182 * To make the translation possible (and fast) we use a hash table of 1183 * TDs currently in the schedule. The physical address is used as the 1184 * hash value. 1185 */ 1186 1187 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1188 /* Called at splusb() */ 1189 void 1190 ohci_hash_add_td(sc, std) 1191 ohci_softc_t *sc; 1192 ohci_soft_td_t *std; 1193 { 1194 int h = HASH(std->physaddr); 1195 1196 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1197 } 1198 1199 /* Called at splusb() */ 1200 void 1201 ohci_hash_rem_td(sc, std) 1202 ohci_softc_t *sc; 1203 ohci_soft_td_t *std; 1204 { 1205 LIST_REMOVE(std, hnext); 1206 } 1207 1208 ohci_soft_td_t * 1209 ohci_hash_find_td(sc, a) 1210 ohci_softc_t *sc; 1211 ohci_physaddr_t a; 1212 { 1213 int h = HASH(a); 1214 ohci_soft_td_t *std; 1215 1216 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1217 std != 0; 1218 std = LIST_NEXT(std, hnext)) 1219 if (std->physaddr == a) 1220 return (std); 1221 panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a); 1222 } 1223 1224 void 1225 ohci_timeout(addr) 1226 void *addr; 1227 { 1228 #if 0 1229 usbd_request_handle *reqh = addr; 1230 int s; 1231 1232 DPRINTF(("ohci_timeout: reqh=%p\n", reqh)); 1233 s = splusb(); 1234 /* XXX need to inactivate TD before calling interrupt routine */ 1235 ohci_XXX_done(reqh); 1236 splx(s); 1237 #endif 1238 } 1239 1240 #ifdef USB_DEBUG 1241 void 1242 ohci_dump_tds(std) 1243 ohci_soft_td_t *std; 1244 { 1245 for (; std; std = std->nexttd) 1246 ohci_dump_td(std); 1247 } 1248 1249 void 1250 ohci_dump_td(std) 1251 ohci_soft_td_t *std; 1252 { 1253 printf("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1254 "nexttd=0x%08lx be=0x%08lx\n", 1255 std, (u_long)std->physaddr, 1256 (int)LE(std->td->td_flags), 1257 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1258 OHCI_TD_GET_DI(LE(std->td->td_flags)), 1259 OHCI_TD_GET_EC(LE(std->td->td_flags)), 1260 OHCI_TD_GET_CC(LE(std->td->td_flags)), 1261 (u_long)LE(std->td->td_cbp), 1262 (u_long)LE(std->td->td_nexttd), (u_long)LE(std->td->td_be)); 1263 } 1264 1265 void 1266 ohci_dump_ed(sed) 1267 ohci_soft_ed_t *sed; 1268 { 1269 printf("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx " 1270 "headp=%b nexted=0x%08lx\n", 1271 sed, (u_long)sed->physaddr, 1272 OHCI_ED_GET_FA(LE(sed->ed->ed_flags)), 1273 OHCI_ED_GET_EN(LE(sed->ed->ed_flags)), 1274 OHCI_ED_GET_MAXP(LE(sed->ed->ed_flags)), 1275 (int)LE(sed->ed->ed_flags), 1276 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1277 (u_long)LE(sed->ed->ed_tailp), 1278 (u_long)LE(sed->ed->ed_headp), "\20\1HALT\2CARRY", 1279 (u_long)LE(sed->ed->ed_nexted)); 1280 } 1281 #endif 1282 1283 usbd_status 1284 ohci_open(pipe) 1285 usbd_pipe_handle pipe; 1286 { 1287 usbd_device_handle dev = pipe->device; 1288 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1289 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1290 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1291 u_int8_t addr = dev->address; 1292 ohci_soft_ed_t *sed; 1293 ohci_soft_td_t *std; 1294 usbd_status r; 1295 int s; 1296 1297 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1298 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1299 if (addr == sc->sc_addr) { 1300 switch (ed->bEndpointAddress) { 1301 case USB_CONTROL_ENDPOINT: 1302 pipe->methods = &ohci_root_ctrl_methods; 1303 break; 1304 case UE_IN | OHCI_INTR_ENDPT: 1305 pipe->methods = &ohci_root_intr_methods; 1306 break; 1307 default: 1308 return (USBD_INVAL); 1309 } 1310 } else { 1311 sed = ohci_alloc_sed(sc); 1312 if (sed == 0) 1313 goto bad0; 1314 std = ohci_alloc_std(sc); 1315 if (std == 0) 1316 goto bad1; 1317 opipe->sed = sed; 1318 opipe->tail = std; 1319 sed->ed->ed_flags = LE( 1320 OHCI_ED_SET_FA(addr) | 1321 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1322 OHCI_ED_DIR_TD | 1323 (dev->lowspeed ? OHCI_ED_SPEED : 0) | 1324 ((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ? 1325 OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) | 1326 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1327 sed->ed->ed_headp = sed->ed->ed_tailp = LE(std->physaddr); 1328 1329 switch (ed->bmAttributes & UE_XFERTYPE) { 1330 case UE_CONTROL: 1331 pipe->methods = &ohci_device_ctrl_methods; 1332 r = usb_allocmem(sc->sc_dmatag, 1333 sizeof(usb_device_request_t), 1334 0, &opipe->u.ctl.reqdma); 1335 if (r != USBD_NORMAL_COMPLETION) 1336 goto bad; 1337 s = splusb(); 1338 ohci_add_ed(sed, sc->sc_ctrl_head); 1339 splx(s); 1340 break; 1341 case UE_INTERRUPT: 1342 pipe->methods = &ohci_device_intr_methods; 1343 return (ohci_device_setintr(sc, opipe, ed->bInterval)); 1344 case UE_ISOCHRONOUS: 1345 printf("ohci_open: open iso unimplemented\n"); 1346 return (USBD_XXX); 1347 case UE_BULK: 1348 pipe->methods = &ohci_device_bulk_methods; 1349 s = splusb(); 1350 ohci_add_ed(sed, sc->sc_bulk_head); 1351 splx(s); 1352 break; 1353 } 1354 } 1355 return (USBD_NORMAL_COMPLETION); 1356 1357 bad: 1358 ohci_free_std(sc, std); 1359 bad1: 1360 ohci_free_sed(sc, sed); 1361 bad0: 1362 return (USBD_NOMEM); 1363 1364 } 1365 1366 /* 1367 * Close a reqular pipe. 1368 * Assumes that there are no pending transactions. 1369 */ 1370 void 1371 ohci_close_pipe(pipe, head) 1372 usbd_pipe_handle pipe; 1373 ohci_soft_ed_t *head; 1374 { 1375 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1376 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1377 ohci_soft_ed_t *sed = opipe->sed; 1378 int s; 1379 1380 s = splusb(); 1381 #ifdef DIAGNOSTIC 1382 sed->ed->ed_flags |= LE(OHCI_ED_SKIP); 1383 if ((sed->ed->ed_tailp & LE(OHCI_TAILMASK)) != 1384 (sed->ed->ed_headp & LE(OHCI_TAILMASK))) { 1385 ohci_physaddr_t td = sed->ed->ed_headp; 1386 ohci_soft_td_t *std; 1387 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]); 1388 std != 0; 1389 std = LIST_NEXT(std, hnext)) 1390 if (std->physaddr == td) 1391 break; 1392 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 1393 "tl=0x%x pipe=%p, std=%p\n", sed, 1394 (int)LE(sed->ed->ed_headp), (int)LE(sed->ed->ed_tailp), 1395 pipe, std); 1396 usb_delay_ms(&sc->sc_bus, 2); 1397 if ((sed->ed->ed_tailp & LE(OHCI_TAILMASK)) != 1398 (sed->ed->ed_headp & LE(OHCI_TAILMASK))) 1399 printf("ohci_close_pipe: pipe still not empty\n"); 1400 } 1401 #endif 1402 ohci_rem_ed(sed, head); 1403 splx(s); 1404 ohci_free_std(sc, opipe->tail); 1405 ohci_free_sed(sc, opipe->sed); 1406 } 1407 1408 /* 1409 * Abort a device request. 1410 * If this routine is called at splusb() it guarantees that the request 1411 * will be removed from the hardware scheduling and that the callback 1412 * for it will be called with USBD_CANCELLED status. 1413 * It's impossible to guarantee that the requested transfer will not 1414 * have happened since the hardware runs concurrently. 1415 * If the transaction has already happened we rely on the ordinary 1416 * interrupt processing to process it. 1417 */ 1418 void 1419 ohci_abort_request(reqh) 1420 usbd_request_handle reqh; 1421 { 1422 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 1423 usbd_device_handle dev = opipe->pipe.device; 1424 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1425 ohci_soft_ed_t *sed; 1426 ohci_soft_td_t *p, *n; 1427 int s; 1428 1429 DPRINTF(("ohci_abort_request: reqh=%p pipe=%p\n", reqh, opipe)); 1430 s = splusb(); 1431 1432 reqh->status = USBD_CANCELLED; /* mark as cancelled */ 1433 1434 if (!reqh->hcpriv) { 1435 /* Not scheduled */ 1436 reqh->xfercb(reqh); 1437 return; 1438 } 1439 1440 sed = opipe->sed; 1441 DPRINTFN(1,("ohci_abort_request: stop ed=%p\n", sed)); 1442 sed->ed->ed_flags |= LE(OHCI_ED_SKIP); /* force hardware skip */ 1443 delay(10); /* give HC hardware a little time */ 1444 1445 /* if already processed by hardware let interrupt routine handle it */ 1446 if ((sed->ed->ed_tailp & LE(OHCI_TAILMASK)) == 1447 (sed->ed->ed_headp & LE(OHCI_TAILMASK))) { 1448 DPRINTF(("ohci_abort_request: request processed\n")); 1449 usb_delay_ms(dev->bus, 2); 1450 } else { 1451 p = reqh->hcpriv; 1452 #ifdef DIAGNOSTIC 1453 if (!p) { 1454 printf("ohci_abort_request: hcpriv==0\n"); 1455 return; 1456 } 1457 #endif 1458 ohci_done(sc, reqh); 1459 for (; p->reqh == reqh; p = n) { 1460 n = p->nexttd; 1461 ohci_hash_rem_td(sc, p); 1462 ohci_free_std(sc, p); 1463 } 1464 DPRINTFN(2,("ohci_abort_request: set hd=%x, tl=%x\n", 1465 (int)LE(p->physaddr), (int)LE(sed->ed->ed_tailp))); 1466 sed->ed->ed_headp = p->physaddr; /* unlink TDs */ 1467 } 1468 1469 sed->ed->ed_flags &= LE(~OHCI_ED_SKIP); /* remove hardware skip */ 1470 splx(s); 1471 } 1472 1473 /* 1474 * Data structures and routines to emulate the root hub. 1475 */ 1476 usb_device_descriptor_t ohci_devd = { 1477 USB_DEVICE_DESCRIPTOR_SIZE, 1478 UDESC_DEVICE, /* type */ 1479 {0x00, 0x01}, /* USB version */ 1480 UCLASS_HUB, /* class */ 1481 USUBCLASS_HUB, /* subclass */ 1482 0, /* protocol */ 1483 64, /* max packet */ 1484 {0},{0},{0x00,0x01}, /* device id */ 1485 1,2,0, /* string indicies */ 1486 1 /* # of configurations */ 1487 }; 1488 1489 usb_config_descriptor_t ohci_confd = { 1490 USB_CONFIG_DESCRIPTOR_SIZE, 1491 UDESC_CONFIG, 1492 {USB_CONFIG_DESCRIPTOR_SIZE + 1493 USB_INTERFACE_DESCRIPTOR_SIZE + 1494 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1495 1, 1496 1, 1497 0, 1498 UC_SELF_POWERED, 1499 0 /* max power */ 1500 }; 1501 1502 usb_interface_descriptor_t ohci_ifcd = { 1503 USB_INTERFACE_DESCRIPTOR_SIZE, 1504 UDESC_INTERFACE, 1505 0, 1506 0, 1507 1, 1508 UCLASS_HUB, 1509 USUBCLASS_HUB, 1510 0, 1511 0 1512 }; 1513 1514 usb_endpoint_descriptor_t ohci_endpd = { 1515 USB_ENDPOINT_DESCRIPTOR_SIZE, 1516 UDESC_ENDPOINT, 1517 UE_IN | OHCI_INTR_ENDPT, 1518 UE_INTERRUPT, 1519 {8, 0}, /* max packet */ 1520 255 1521 }; 1522 1523 usb_hub_descriptor_t ohci_hubd = { 1524 USB_HUB_DESCRIPTOR_SIZE, 1525 UDESC_HUB, 1526 0, 1527 {0,0}, 1528 0, 1529 0, 1530 {0}, 1531 }; 1532 1533 int 1534 ohci_str(p, l, s) 1535 usb_string_descriptor_t *p; 1536 int l; 1537 char *s; 1538 { 1539 int i; 1540 1541 if (l == 0) 1542 return (0); 1543 p->bLength = 2 * strlen(s) + 2; 1544 if (l == 1) 1545 return (1); 1546 p->bDescriptorType = UDESC_STRING; 1547 l -= 2; 1548 for (i = 0; s[i] && l > 1; i++, l -= 2) 1549 USETW2(p->bString[i], 0, s[i]); 1550 return (2*i+2); 1551 } 1552 1553 /* 1554 * Simulate a hardware hub by handling all the necessary requests. 1555 */ 1556 usbd_status 1557 ohci_root_ctrl_transfer(reqh) 1558 usbd_request_handle reqh; 1559 { 1560 int s; 1561 usbd_status r; 1562 1563 s = splusb(); 1564 r = usb_insert_transfer(reqh); 1565 splx(s); 1566 if (r != USBD_NORMAL_COMPLETION) 1567 return (r); 1568 else 1569 return (ohci_root_ctrl_start(reqh)); 1570 } 1571 1572 usbd_status 1573 ohci_root_ctrl_start(reqh) 1574 usbd_request_handle reqh; 1575 { 1576 ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus; 1577 usb_device_request_t *req; 1578 void *buf; 1579 int port, i; 1580 int len, value, index, l, totlen = 0; 1581 usb_port_status_t ps; 1582 usb_hub_descriptor_t hubd; 1583 usbd_status r; 1584 u_int32_t v; 1585 1586 if (!reqh->isreq) 1587 /* XXX panic */ 1588 return (USBD_INVAL); 1589 req = &reqh->request; 1590 buf = reqh->buffer; 1591 1592 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 1593 req->bmRequestType, req->bRequest)); 1594 1595 len = UGETW(req->wLength); 1596 value = UGETW(req->wValue); 1597 index = UGETW(req->wIndex); 1598 #define C(x,y) ((x) | ((y) << 8)) 1599 switch(C(req->bRequest, req->bmRequestType)) { 1600 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1601 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1602 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1603 /* 1604 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1605 * for the integrated root hub. 1606 */ 1607 break; 1608 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1609 if (len > 0) { 1610 *(u_int8_t *)buf = sc->sc_conf; 1611 totlen = 1; 1612 } 1613 break; 1614 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1615 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 1616 switch(value >> 8) { 1617 case UDESC_DEVICE: 1618 if ((value & 0xff) != 0) { 1619 r = USBD_IOERROR; 1620 goto ret; 1621 } 1622 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1623 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 1624 memcpy(buf, &ohci_devd, l); 1625 break; 1626 case UDESC_CONFIG: 1627 if ((value & 0xff) != 0) { 1628 r = USBD_IOERROR; 1629 goto ret; 1630 } 1631 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1632 memcpy(buf, &ohci_confd, l); 1633 buf = (char *)buf + l; 1634 len -= l; 1635 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1636 totlen += l; 1637 memcpy(buf, &ohci_ifcd, l); 1638 buf = (char *)buf + l; 1639 len -= l; 1640 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1641 totlen += l; 1642 memcpy(buf, &ohci_endpd, l); 1643 break; 1644 case UDESC_STRING: 1645 if (len == 0) 1646 break; 1647 *(u_int8_t *)buf = 0; 1648 totlen = 1; 1649 switch (value & 0xff) { 1650 case 1: /* Vendor */ 1651 totlen = ohci_str(buf, len, sc->sc_vendor); 1652 break; 1653 case 2: /* Product */ 1654 totlen = ohci_str(buf, len, "OHCI root hub"); 1655 break; 1656 } 1657 break; 1658 default: 1659 r = USBD_IOERROR; 1660 goto ret; 1661 } 1662 break; 1663 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1664 if (len > 0) { 1665 *(u_int8_t *)buf = 0; 1666 totlen = 1; 1667 } 1668 break; 1669 case C(UR_GET_STATUS, UT_READ_DEVICE): 1670 if (len > 1) { 1671 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1672 totlen = 2; 1673 } 1674 break; 1675 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1676 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1677 if (len > 1) { 1678 USETW(((usb_status_t *)buf)->wStatus, 0); 1679 totlen = 2; 1680 } 1681 break; 1682 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1683 if (value >= USB_MAX_DEVICES) { 1684 r = USBD_IOERROR; 1685 goto ret; 1686 } 1687 sc->sc_addr = value; 1688 break; 1689 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1690 if (value != 0 && value != 1) { 1691 r = USBD_IOERROR; 1692 goto ret; 1693 } 1694 sc->sc_conf = value; 1695 break; 1696 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1697 break; 1698 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1699 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1700 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1701 r = USBD_IOERROR; 1702 goto ret; 1703 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1704 break; 1705 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1706 break; 1707 /* Hub requests */ 1708 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1709 break; 1710 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1711 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1712 "port=%d feature=%d\n", 1713 index, value)); 1714 if (index < 1 || index > sc->sc_noport) { 1715 r = USBD_IOERROR; 1716 goto ret; 1717 } 1718 port = OHCI_RH_PORT_STATUS(index); 1719 switch(value) { 1720 case UHF_PORT_ENABLE: 1721 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 1722 break; 1723 case UHF_PORT_SUSPEND: 1724 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 1725 break; 1726 case UHF_PORT_POWER: 1727 OWRITE4(sc, port, UPS_LOW_SPEED); 1728 break; 1729 case UHF_C_PORT_CONNECTION: 1730 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 1731 break; 1732 case UHF_C_PORT_ENABLE: 1733 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 1734 break; 1735 case UHF_C_PORT_SUSPEND: 1736 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 1737 break; 1738 case UHF_C_PORT_OVER_CURRENT: 1739 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 1740 break; 1741 case UHF_C_PORT_RESET: 1742 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 1743 break; 1744 default: 1745 r = USBD_IOERROR; 1746 goto ret; 1747 } 1748 switch(value) { 1749 case UHF_C_PORT_CONNECTION: 1750 case UHF_C_PORT_ENABLE: 1751 case UHF_C_PORT_SUSPEND: 1752 case UHF_C_PORT_OVER_CURRENT: 1753 case UHF_C_PORT_RESET: 1754 /* Enable RHSC interrupt if condition is cleared. */ 1755 if ((OREAD4(sc, port) >> 16) == 0) 1756 ohci_rhsc_able(sc, 1); 1757 break; 1758 default: 1759 break; 1760 } 1761 break; 1762 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1763 if (value != 0) { 1764 r = USBD_IOERROR; 1765 goto ret; 1766 } 1767 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 1768 hubd = ohci_hubd; 1769 hubd.bNbrPorts = sc->sc_noport; 1770 USETW(hubd.wHubCharacteristics, 1771 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 1772 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 1773 /* XXX overcurrent */ 1774 ); 1775 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 1776 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 1777 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1778 hubd.DeviceRemovable[i++] = (u_int8_t)v; 1779 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1780 l = min(len, hubd.bDescLength); 1781 totlen = l; 1782 memcpy(buf, &hubd, l); 1783 break; 1784 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1785 if (len != 4) { 1786 r = USBD_IOERROR; 1787 goto ret; 1788 } 1789 memset(buf, 0, len); /* ? XXX */ 1790 totlen = len; 1791 break; 1792 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1793 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 1794 index)); 1795 if (index < 1 || index > sc->sc_noport) { 1796 r = USBD_IOERROR; 1797 goto ret; 1798 } 1799 if (len != 4) { 1800 r = USBD_IOERROR; 1801 goto ret; 1802 } 1803 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 1804 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 1805 v)); 1806 USETW(ps.wPortStatus, v); 1807 USETW(ps.wPortChange, v >> 16); 1808 l = min(len, sizeof ps); 1809 memcpy(buf, &ps, l); 1810 totlen = l; 1811 break; 1812 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1813 r = USBD_IOERROR; 1814 goto ret; 1815 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1816 break; 1817 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1818 if (index < 1 || index > sc->sc_noport) { 1819 r = USBD_IOERROR; 1820 goto ret; 1821 } 1822 port = OHCI_RH_PORT_STATUS(index); 1823 switch(value) { 1824 case UHF_PORT_ENABLE: 1825 OWRITE4(sc, port, UPS_PORT_ENABLED); 1826 break; 1827 case UHF_PORT_SUSPEND: 1828 OWRITE4(sc, port, UPS_SUSPEND); 1829 break; 1830 case UHF_PORT_RESET: 1831 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 1832 index)); 1833 OWRITE4(sc, port, UPS_RESET); 1834 for (i = 0; i < 10; i++) { 1835 usb_delay_ms(&sc->sc_bus, 10); 1836 if ((OREAD4(sc, port) & UPS_RESET) == 0) 1837 break; 1838 } 1839 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 1840 index, OREAD4(sc, port))); 1841 break; 1842 case UHF_PORT_POWER: 1843 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 1844 "%d\n", index)); 1845 OWRITE4(sc, port, UPS_PORT_POWER); 1846 break; 1847 default: 1848 r = USBD_IOERROR; 1849 goto ret; 1850 } 1851 break; 1852 default: 1853 r = USBD_IOERROR; 1854 goto ret; 1855 } 1856 reqh->actlen = totlen; 1857 r = USBD_NORMAL_COMPLETION; 1858 ret: 1859 reqh->status = r; 1860 reqh->xfercb(reqh); 1861 usb_start_next(reqh->pipe); 1862 return (USBD_IN_PROGRESS); 1863 } 1864 1865 /* Abort a root control request. */ 1866 void 1867 ohci_root_ctrl_abort(reqh) 1868 usbd_request_handle reqh; 1869 { 1870 /* Nothing to do, all transfers are synchronous. */ 1871 } 1872 1873 /* Close the root pipe. */ 1874 void 1875 ohci_root_ctrl_close(pipe) 1876 usbd_pipe_handle pipe; 1877 { 1878 DPRINTF(("ohci_root_ctrl_close\n")); 1879 /* Nothing to do. */ 1880 } 1881 1882 usbd_status 1883 ohci_root_intr_transfer(reqh) 1884 usbd_request_handle reqh; 1885 { 1886 int s; 1887 usbd_status r; 1888 1889 s = splusb(); 1890 r = usb_insert_transfer(reqh); 1891 splx(s); 1892 if (r != USBD_NORMAL_COMPLETION) 1893 return (r); 1894 else 1895 return (ohci_root_intr_start(reqh)); 1896 } 1897 1898 usbd_status 1899 ohci_root_intr_start(reqh) 1900 usbd_request_handle reqh; 1901 { 1902 usbd_pipe_handle pipe = reqh->pipe; 1903 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1904 struct ohci_pipe *upipe = (struct ohci_pipe *)pipe; 1905 usb_dma_t *dmap; 1906 usbd_status r; 1907 int len; 1908 1909 len = reqh->length; 1910 dmap = &upipe->u.intr.datadma; 1911 if (len == 0) 1912 return (USBD_INVAL); /* XXX should it be? */ 1913 1914 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1915 if (r != USBD_NORMAL_COMPLETION) 1916 return (r); 1917 sc->sc_intrreqh = reqh; 1918 1919 return (USBD_IN_PROGRESS); 1920 } 1921 1922 /* Abort a root interrupt request. */ 1923 void 1924 ohci_root_intr_abort(reqh) 1925 usbd_request_handle reqh; 1926 { 1927 /* No need to abort. */ 1928 } 1929 1930 /* Close the root pipe. */ 1931 void 1932 ohci_root_intr_close(pipe) 1933 usbd_pipe_handle pipe; 1934 { 1935 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1936 1937 DPRINTF(("ohci_root_intr_close\n")); 1938 1939 sc->sc_intrreqh = 0; 1940 } 1941 1942 /************************/ 1943 1944 usbd_status 1945 ohci_device_ctrl_transfer(reqh) 1946 usbd_request_handle reqh; 1947 { 1948 int s; 1949 usbd_status r; 1950 1951 s = splusb(); 1952 r = usb_insert_transfer(reqh); 1953 splx(s); 1954 if (r != USBD_NORMAL_COMPLETION) 1955 return (r); 1956 else 1957 return (ohci_device_ctrl_start(reqh)); 1958 } 1959 1960 usbd_status 1961 ohci_device_ctrl_start(reqh) 1962 usbd_request_handle reqh; 1963 { 1964 ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus; 1965 usbd_status r; 1966 1967 if (!reqh->isreq) { 1968 /* XXX panic */ 1969 printf("ohci_device_ctrl_transfer: not a request\n"); 1970 return (USBD_INVAL); 1971 } 1972 1973 r = ohci_device_request(reqh); 1974 if (r != USBD_NORMAL_COMPLETION) 1975 return (r); 1976 1977 if (sc->sc_bus.use_polling) 1978 ohci_waitintr(sc, reqh); 1979 return (USBD_IN_PROGRESS); 1980 } 1981 1982 /* Abort a device control request. */ 1983 void 1984 ohci_device_ctrl_abort(reqh) 1985 usbd_request_handle reqh; 1986 { 1987 DPRINTF(("ohci_device_ctrl_abort: reqh=%p\n", reqh)); 1988 ohci_abort_request(reqh); 1989 } 1990 1991 /* Close a device control pipe. */ 1992 void 1993 ohci_device_ctrl_close(pipe) 1994 usbd_pipe_handle pipe; 1995 { 1996 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1997 1998 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 1999 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2000 } 2001 2002 /************************/ 2003 2004 usbd_status 2005 ohci_device_bulk_transfer(reqh) 2006 usbd_request_handle reqh; 2007 { 2008 int s; 2009 usbd_status r; 2010 2011 s = splusb(); 2012 r = usb_insert_transfer(reqh); 2013 splx(s); 2014 if (r != USBD_NORMAL_COMPLETION) 2015 return (r); 2016 else 2017 return (ohci_device_bulk_start(reqh)); 2018 } 2019 2020 usbd_status 2021 ohci_device_bulk_start(reqh) 2022 usbd_request_handle reqh; 2023 { 2024 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 2025 usbd_device_handle dev = opipe->pipe.device; 2026 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2027 int addr = dev->address; 2028 ohci_soft_td_t *xfer, *tail; 2029 ohci_soft_ed_t *sed; 2030 usb_dma_t *dmap; 2031 usbd_status r; 2032 int s, len, isread; 2033 2034 #ifdef DIAGNOSTIC 2035 if (reqh->isreq) { 2036 /* XXX panic */ 2037 printf("ohci_device_bulk_start: a request\n"); 2038 return (USBD_INVAL); 2039 } 2040 #endif 2041 2042 len = reqh->length; 2043 dmap = &opipe->u.bulk.datadma; 2044 isread = reqh->pipe->endpoint->edesc->bEndpointAddress & UE_IN; 2045 sed = opipe->sed; 2046 2047 DPRINTFN(4,("ohci_device_bulk_start: reqh=%p len=%d isread=%d " 2048 "flags=%d endpt=%d\n", reqh, len, isread, reqh->flags, 2049 reqh->pipe->endpoint->edesc->bEndpointAddress)); 2050 2051 opipe->u.bulk.isread = isread; 2052 opipe->u.bulk.length = len; 2053 2054 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 2055 if (r != USBD_NORMAL_COMPLETION) 2056 goto ret1; 2057 2058 tail = ohci_alloc_std(sc); 2059 if (!tail) { 2060 r = USBD_NOMEM; 2061 goto ret2; 2062 } 2063 tail->reqh = 0; 2064 2065 /* Update device address */ 2066 sed->ed->ed_flags = LE( 2067 (LE(sed->ed->ed_flags) & ~OHCI_ED_ADDRMASK) | 2068 OHCI_ED_SET_FA(addr)); 2069 2070 /* Set up data transaction */ 2071 xfer = opipe->tail; 2072 xfer->td->td_flags = LE( 2073 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 2074 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY | 2075 (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0)); 2076 xfer->td->td_cbp = LE(DMAADDR(dmap)); 2077 xfer->nexttd = tail; 2078 xfer->td->td_nexttd = LE(tail->physaddr); 2079 xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1); 2080 xfer->len = len; 2081 xfer->reqh = reqh; 2082 xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN; 2083 reqh->hcpriv = xfer; 2084 2085 if (!isread) 2086 memcpy(KERNADDR(dmap), reqh->buffer, len); 2087 2088 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2089 "td_cbp=0x%08x td_be=0x%08x\n", 2090 (int)LE(sed->ed->ed_flags), (int)LE(xfer->td->td_flags), 2091 (int)LE(xfer->td->td_cbp), (int)LE(xfer->td->td_be))); 2092 2093 #ifdef USB_DEBUG 2094 if (ohcidebug > 4) { 2095 ohci_dump_ed(sed); 2096 ohci_dump_tds(xfer); 2097 } 2098 #endif 2099 2100 /* Insert ED in schedule */ 2101 s = splusb(); 2102 ohci_hash_add_td(sc, xfer); 2103 sed->ed->ed_tailp = LE(tail->physaddr); 2104 opipe->tail = tail; 2105 sed->ed->ed_flags &= LE(~OHCI_ED_SKIP); 2106 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2107 if (reqh->timeout && !sc->sc_bus.use_polling) { 2108 usb_timeout(ohci_timeout, reqh, 2109 MS_TO_TICKS(reqh->timeout), reqh->timo_handle); 2110 } 2111 2112 #ifdef USB_DEBUG 2113 if (ohcidebug > 5) { 2114 delay(5000); 2115 printf("ohci_device_intr_transfer: status=%x\n", 2116 OREAD4(sc, OHCI_COMMAND_STATUS)); 2117 ohci_dump_ed(sed); 2118 ohci_dump_tds(xfer); 2119 } 2120 #endif 2121 2122 splx(s); 2123 2124 return (USBD_IN_PROGRESS); 2125 2126 ret2: 2127 usb_freemem(sc->sc_dmatag, dmap); 2128 ret1: 2129 return (r); 2130 } 2131 2132 void 2133 ohci_device_bulk_abort(reqh) 2134 usbd_request_handle reqh; 2135 { 2136 DPRINTF(("ohci_device_bulk_abort: reqh=%p\n", reqh)); 2137 ohci_abort_request(reqh); 2138 } 2139 2140 /* 2141 * Close a device bulk pipe. 2142 */ 2143 void 2144 ohci_device_bulk_close(pipe) 2145 usbd_pipe_handle pipe; 2146 { 2147 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2148 2149 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2150 ohci_close_pipe(pipe, sc->sc_bulk_head); 2151 } 2152 2153 /************************/ 2154 2155 usbd_status 2156 ohci_device_intr_transfer(reqh) 2157 usbd_request_handle reqh; 2158 { 2159 int s; 2160 usbd_status r; 2161 2162 s = splusb(); 2163 r = usb_insert_transfer(reqh); 2164 splx(s); 2165 if (r != USBD_NORMAL_COMPLETION) 2166 return (r); 2167 else 2168 return (ohci_device_intr_start(reqh)); 2169 } 2170 2171 usbd_status 2172 ohci_device_intr_start(reqh) 2173 usbd_request_handle reqh; 2174 { 2175 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 2176 usbd_device_handle dev = opipe->pipe.device; 2177 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2178 ohci_soft_ed_t *sed = opipe->sed; 2179 ohci_soft_td_t *xfer, *tail; 2180 usb_dma_t *dmap; 2181 usbd_status r; 2182 int len; 2183 int s; 2184 2185 DPRINTFN(3, ("ohci_device_intr_transfer: reqh=%p buf=%p len=%d " 2186 "flags=%d priv=%p\n", 2187 reqh, reqh->buffer, reqh->length, reqh->flags, reqh->priv)); 2188 2189 if (reqh->isreq) 2190 panic("ohci_device_intr_transfer: a request\n"); 2191 2192 len = reqh->length; 2193 dmap = &opipe->u.intr.datadma; 2194 if (len == 0) 2195 return (USBD_INVAL); /* XXX should it be? */ 2196 2197 xfer = opipe->tail; 2198 tail = ohci_alloc_std(sc); 2199 if (!tail) { 2200 r = USBD_NOMEM; 2201 goto ret1; 2202 } 2203 tail->reqh = 0; 2204 2205 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 2206 if (r != USBD_NORMAL_COMPLETION) 2207 goto ret2; 2208 2209 xfer->td->td_flags = LE( 2210 OHCI_TD_IN | OHCI_TD_NOCC | 2211 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2212 if (reqh->flags & USBD_SHORT_XFER_OK) 2213 xfer->td->td_flags |= LE(OHCI_TD_R); 2214 xfer->td->td_cbp = LE(DMAADDR(dmap)); 2215 xfer->nexttd = tail; 2216 xfer->td->td_nexttd = LE(tail->physaddr); 2217 xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1); 2218 xfer->len = len; 2219 xfer->reqh = reqh; 2220 xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN; 2221 reqh->hcpriv = xfer; 2222 2223 #if USB_DEBUG 2224 if (ohcidebug > 5) { 2225 printf("ohci_device_intr_transfer:\n"); 2226 ohci_dump_ed(sed); 2227 ohci_dump_tds(xfer); 2228 } 2229 #endif 2230 2231 /* Insert ED in schedule */ 2232 s = splusb(); 2233 ohci_hash_add_td(sc, xfer); 2234 sed->ed->ed_tailp = LE(tail->physaddr); 2235 opipe->tail = tail; 2236 #if 0 2237 if (reqh->timeout && !sc->sc_bus.use_polling) { 2238 usb_timeout(ohci_timeout, reqh, 2239 MS_TO_TICKS(reqh->timeout), reqh->timo_handle); 2240 } 2241 #endif 2242 sed->ed->ed_flags &= LE(~OHCI_ED_SKIP); 2243 2244 #ifdef USB_DEBUG 2245 if (ohcidebug > 5) { 2246 delay(5000); 2247 printf("ohci_device_intr_transfer: status=%x\n", 2248 OREAD4(sc, OHCI_COMMAND_STATUS)); 2249 ohci_dump_ed(sed); 2250 ohci_dump_tds(xfer); 2251 } 2252 #endif 2253 splx(s); 2254 2255 return (USBD_IN_PROGRESS); 2256 2257 ret2: 2258 ohci_free_std(sc, xfer); 2259 ret1: 2260 return (r); 2261 } 2262 2263 /* Abort a device control request. */ 2264 void 2265 ohci_device_intr_abort(reqh) 2266 usbd_request_handle reqh; 2267 { 2268 if (reqh->pipe->intrreqh == reqh) { 2269 DPRINTF(("ohci_device_intr_abort: remove\n")); 2270 reqh->pipe->intrreqh = 0; 2271 } 2272 ohci_abort_request(reqh); 2273 } 2274 2275 /* Close a device interrupt pipe. */ 2276 void 2277 ohci_device_intr_close(pipe) 2278 usbd_pipe_handle pipe; 2279 { 2280 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2281 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2282 int nslots = opipe->u.intr.nslots; 2283 int pos = opipe->u.intr.pos; 2284 int j; 2285 ohci_soft_ed_t *p, *sed = opipe->sed; 2286 int s; 2287 2288 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2289 pipe, nslots, pos)); 2290 s = splusb(); 2291 sed->ed->ed_flags |= LE(OHCI_ED_SKIP); 2292 if ((sed->ed->ed_tailp & LE(OHCI_TAILMASK)) != 2293 (sed->ed->ed_headp & LE(OHCI_TAILMASK))) 2294 usb_delay_ms(&sc->sc_bus, 2); 2295 2296 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2297 ; 2298 if (!p) 2299 panic("ohci_device_intr_close: ED not found\n"); 2300 p->next = sed->next; 2301 p->ed->ed_nexted = sed->ed->ed_nexted; 2302 splx(s); 2303 2304 for (j = 0; j < nslots; j++) 2305 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2306 2307 ohci_free_std(sc, opipe->tail); 2308 ohci_free_sed(sc, opipe->sed); 2309 } 2310 2311 usbd_status 2312 ohci_device_setintr(sc, opipe, ival) 2313 ohci_softc_t *sc; 2314 struct ohci_pipe *opipe; 2315 int ival; 2316 { 2317 int i, j, s, best; 2318 u_int npoll, slow, shigh, nslots; 2319 u_int bestbw, bw; 2320 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2321 2322 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2323 if (ival == 0) { 2324 printf("ohci_setintr: 0 interval\n"); 2325 return (USBD_INVAL); 2326 } 2327 2328 npoll = OHCI_NO_INTRS; 2329 while (npoll > ival) 2330 npoll /= 2; 2331 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2332 2333 /* 2334 * We now know which level in the tree the ED must go into. 2335 * Figure out which slot has most bandwidth left over. 2336 * Slots to examine: 2337 * npoll 2338 * 1 0 2339 * 2 1 2 2340 * 4 3 4 5 6 2341 * 8 7 8 9 10 11 12 13 14 2342 * N (N-1) .. (N-1+N-1) 2343 */ 2344 slow = npoll-1; 2345 shigh = slow + npoll; 2346 nslots = OHCI_NO_INTRS / npoll; 2347 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2348 bw = 0; 2349 for (j = 0; j < nslots; j++) 2350 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 2351 if (bw < bestbw) { 2352 best = i; 2353 bestbw = bw; 2354 } 2355 } 2356 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2357 best, slow, shigh, bestbw)); 2358 2359 s = splusb(); 2360 hsed = sc->sc_eds[best]; 2361 sed->next = hsed->next; 2362 sed->ed->ed_nexted = hsed->ed->ed_nexted; 2363 hsed->next = sed; 2364 hsed->ed->ed_nexted = LE(sed->physaddr); 2365 splx(s); 2366 2367 for (j = 0; j < nslots; j++) 2368 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 2369 opipe->u.intr.nslots = nslots; 2370 opipe->u.intr.pos = best; 2371 2372 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 2373 return (USBD_NORMAL_COMPLETION); 2374 } 2375 2376
Indexes created Fri Sep 26 20:09:58 GMT 2025