ohci.c revision 1.37 1 /* $NetBSD: ohci.c,v 1.37 1999/08/17 20:59:04 augustss Exp $ */
2
3 /*
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Lennart Augustsson (augustss (at) carlstedt.se) at
9 * Carlstedt Research & Technology.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * USB Open Host Controller driver.
42 *
43 * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe
44 * USB spec: http://www.usb.org/developers/data/usb11.pdf
45 */
46
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/kernel.h>
50 #include <sys/malloc.h>
51 #if defined(__NetBSD__) || defined(__OpenBSD__)
52 #include <sys/device.h>
53 #elif defined(__FreeBSD__)
54 #include <sys/module.h>
55 #include <sys/bus.h>
56 #endif
57 #include <sys/proc.h>
58 #include <sys/queue.h>
59 #include <sys/select.h>
60
61 #include <machine/bus.h>
62 #include <machine/endian.h>
63
64 #include <dev/usb/usb.h>
65 #include <dev/usb/usbdi.h>
66 #include <dev/usb/usbdivar.h>
67 #include <dev/usb/usb_quirks.h>
68 #include <dev/usb/usb_mem.h>
69
70 #include <dev/usb/ohcireg.h>
71 #include <dev/usb/ohcivar.h>
72
73 #if defined(__FreeBSD__)
74 #include <machine/clock.h>
75
76 #define delay(d) DELAY(d)
77
78 #endif
79
80 #if defined(__OpenBSD__)
81 struct cfdriver ohci_cd = {
82 NULL, "ohci", DV_DULL
83 };
84 #endif
85
86 /*
87 * The OHCI controller is little endian, so on big endian machines
88 * the data strored in memory needs to be swapped.
89 */
90 #if BYTE_ORDER == BIG_ENDIAN
91 #define LE(x) (bswap32(x))
92 #else
93 #define LE(x) (x)
94 #endif
95
96 struct ohci_pipe;
97
98 ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *));
99 void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *));
100
101 ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *));
102 void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *));
103
104 void ohci_power __P((int, void *));
105 usbd_status ohci_open __P((usbd_pipe_handle));
106 void ohci_poll __P((struct usbd_bus *));
107 void ohci_waitintr __P((ohci_softc_t *, usbd_request_handle));
108 void ohci_rhsc __P((ohci_softc_t *, usbd_request_handle));
109 void ohci_process_done __P((ohci_softc_t *, ohci_physaddr_t));
110 void ohci_idone __P((ohci_softc_t *, usbd_request_handle));
111 void ohci_done __P((ohci_softc_t *, usbd_request_handle));
112 void ohci_ctrl_done __P((ohci_softc_t *, usbd_request_handle));
113 void ohci_intr_done __P((ohci_softc_t *, usbd_request_handle));
114 void ohci_bulk_done __P((ohci_softc_t *, usbd_request_handle));
115
116 usbd_status ohci_device_request __P((usbd_request_handle reqh));
117 void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
118 void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
119 void ohci_hash_add_td __P((ohci_softc_t *, ohci_soft_td_t *));
120 void ohci_hash_rem_td __P((ohci_softc_t *, ohci_soft_td_t *));
121 ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, ohci_physaddr_t));
122
123 usbd_status ohci_root_ctrl_transfer __P((usbd_request_handle));
124 usbd_status ohci_root_ctrl_start __P((usbd_request_handle));
125 void ohci_root_ctrl_abort __P((usbd_request_handle));
126 void ohci_root_ctrl_close __P((usbd_pipe_handle));
127
128 usbd_status ohci_root_intr_transfer __P((usbd_request_handle));
129 usbd_status ohci_root_intr_start __P((usbd_request_handle));
130 void ohci_root_intr_abort __P((usbd_request_handle));
131 void ohci_root_intr_close __P((usbd_pipe_handle));
132
133 usbd_status ohci_device_ctrl_transfer __P((usbd_request_handle));
134 usbd_status ohci_device_ctrl_start __P((usbd_request_handle));
135 void ohci_device_ctrl_abort __P((usbd_request_handle));
136 void ohci_device_ctrl_close __P((usbd_pipe_handle));
137
138 usbd_status ohci_device_bulk_transfer __P((usbd_request_handle));
139 usbd_status ohci_device_bulk_start __P((usbd_request_handle));
140 void ohci_device_bulk_abort __P((usbd_request_handle));
141 void ohci_device_bulk_close __P((usbd_pipe_handle));
142
143 usbd_status ohci_device_intr_transfer __P((usbd_request_handle));
144 usbd_status ohci_device_intr_start __P((usbd_request_handle));
145 void ohci_device_intr_abort __P((usbd_request_handle));
146 void ohci_device_intr_close __P((usbd_pipe_handle));
147 usbd_status ohci_device_setintr __P((ohci_softc_t *sc,
148 struct ohci_pipe *pipe, int ival));
149
150 int ohci_str __P((usb_string_descriptor_t *, int, char *));
151
152 void ohci_timeout __P((void *));
153 void ohci_rhsc_able __P((ohci_softc_t *, int));
154
155 void ohci_close_pipe __P((usbd_pipe_handle pipe,
156 ohci_soft_ed_t *head));
157 void ohci_abort_request __P((usbd_request_handle reqh));
158
159 void ohci_device_clear_toggle __P((usbd_pipe_handle pipe));
160 void ohci_noop __P((usbd_pipe_handle pipe));
161
162 #ifdef USB_DEBUG
163 ohci_softc_t *thesc;
164 void ohci_dumpregs __P((ohci_softc_t *));
165 void ohci_dump_tds __P((ohci_soft_td_t *));
166 void ohci_dump_td __P((ohci_soft_td_t *));
167 void ohci_dump_ed __P((ohci_soft_ed_t *));
168 #endif
169
170 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
171 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
172 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
173
174 /* Reverse the bits in a value 0 .. 31 */
175 static u_int8_t revbits[OHCI_NO_INTRS] =
176 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
177 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
178 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
179 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
180
181 struct ohci_pipe {
182 struct usbd_pipe pipe;
183 ohci_soft_ed_t *sed;
184 ohci_soft_td_t *tail;
185 /* Info needed for different pipe kinds. */
186 union {
187 /* Control pipe */
188 struct {
189 usb_dma_t datadma;
190 usb_dma_t reqdma;
191 u_int length;
192 ohci_soft_td_t *setup, *xfer, *stat;
193 } ctl;
194 /* Interrupt pipe */
195 struct {
196 usb_dma_t datadma;
197 int nslots;
198 int pos;
199 } intr;
200 /* Bulk pipe */
201 struct {
202 usb_dma_t datadma;
203 u_int length;
204 int isread;
205 } bulk;
206 } u;
207 };
208
209 #define OHCI_INTR_ENDPT 1
210
211 struct usbd_methods ohci_root_ctrl_methods = {
212 ohci_root_ctrl_transfer,
213 ohci_root_ctrl_start,
214 ohci_root_ctrl_abort,
215 ohci_root_ctrl_close,
216 ohci_noop,
217 0,
218 };
219
220 struct usbd_methods ohci_root_intr_methods = {
221 ohci_root_intr_transfer,
222 ohci_root_intr_start,
223 ohci_root_intr_abort,
224 ohci_root_intr_close,
225 ohci_noop,
226 0,
227 };
228
229 struct usbd_methods ohci_device_ctrl_methods = {
230 ohci_device_ctrl_transfer,
231 ohci_device_ctrl_start,
232 ohci_device_ctrl_abort,
233 ohci_device_ctrl_close,
234 ohci_noop,
235 0,
236 };
237
238 struct usbd_methods ohci_device_intr_methods = {
239 ohci_device_intr_transfer,
240 ohci_device_intr_start,
241 ohci_device_intr_abort,
242 ohci_device_intr_close,
243 ohci_device_clear_toggle,
244 0,
245 };
246
247 struct usbd_methods ohci_device_bulk_methods = {
248 ohci_device_bulk_transfer,
249 ohci_device_bulk_start,
250 ohci_device_bulk_abort,
251 ohci_device_bulk_close,
252 ohci_device_clear_toggle,
253 0,
254 };
255
256 ohci_soft_ed_t *
257 ohci_alloc_sed(sc)
258 ohci_softc_t *sc;
259 {
260 ohci_soft_ed_t *sed;
261 usbd_status r;
262 int i, offs;
263 usb_dma_t dma;
264
265 if (!sc->sc_freeeds) {
266 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
267 sed = malloc(sizeof(ohci_soft_ed_t) * OHCI_ED_CHUNK,
268 M_USBHC, M_NOWAIT);
269 if (!sed)
270 return 0;
271 r = usb_allocmem(sc->sc_dmatag, OHCI_ED_SIZE * OHCI_ED_CHUNK,
272 OHCI_ED_ALIGN, &dma);
273 if (r != USBD_NORMAL_COMPLETION) {
274 free(sed, M_USBHC);
275 return 0;
276 }
277 for(i = 0; i < OHCI_ED_CHUNK; i++, sed++) {
278 offs = i * OHCI_ED_SIZE;
279 sed->physaddr = DMAADDR(&dma) + offs;
280 sed->ed = (ohci_ed_t *)
281 ((char *)KERNADDR(&dma) + offs);
282 sed->next = sc->sc_freeeds;
283 sc->sc_freeeds = sed;
284 }
285 }
286 sed = sc->sc_freeeds;
287 sc->sc_freeeds = sed->next;
288 memset(sed->ed, 0, OHCI_ED_SIZE);
289 sed->next = 0;
290 return sed;
291 }
292
293 void
294 ohci_free_sed(sc, sed)
295 ohci_softc_t *sc;
296 ohci_soft_ed_t *sed;
297 {
298 sed->next = sc->sc_freeeds;
299 sc->sc_freeeds = sed;
300 }
301
302 ohci_soft_td_t *
303 ohci_alloc_std(sc)
304 ohci_softc_t *sc;
305 {
306 ohci_soft_td_t *std;
307 usbd_status r;
308 int i, offs;
309 usb_dma_t dma;
310
311 if (!sc->sc_freetds) {
312 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
313 std = malloc(sizeof(ohci_soft_td_t) * OHCI_TD_CHUNK,
314 M_USBHC, M_NOWAIT);
315 if (!std)
316 return 0;
317 r = usb_allocmem(sc->sc_dmatag, OHCI_TD_SIZE * OHCI_TD_CHUNK,
318 OHCI_TD_ALIGN, &dma);
319 if (r != USBD_NORMAL_COMPLETION) {
320 free(std, M_USBHC);
321 return 0;
322 }
323 for(i = 0; i < OHCI_TD_CHUNK; i++, std++) {
324 offs = i * OHCI_TD_SIZE;
325 std->physaddr = DMAADDR(&dma) + offs;
326 std->td = (ohci_td_t *)
327 ((char *)KERNADDR(&dma) + offs);
328 std->nexttd = sc->sc_freetds;
329 sc->sc_freetds = std;
330 }
331 }
332 std = sc->sc_freetds;
333 sc->sc_freetds = std->nexttd;
334 memset(std->td, 0, OHCI_TD_SIZE);
335 std->nexttd = 0;
336 return (std);
337 }
338
339 void
340 ohci_free_std(sc, std)
341 ohci_softc_t *sc;
342 ohci_soft_td_t *std;
343 {
344 std->nexttd = sc->sc_freetds;
345 sc->sc_freetds = std;
346 }
347
348 usbd_status
349 ohci_init(sc)
350 ohci_softc_t *sc;
351 {
352 ohci_soft_ed_t *sed, *psed;
353 usbd_status r;
354 int rev;
355 int i;
356 u_int32_t s, ctl, ival, hcr, fm, per;
357
358 DPRINTF(("ohci_init: start\n"));
359 rev = OREAD4(sc, OHCI_REVISION);
360 #if defined(__OpenBSD__)
361 printf(", OHCI version %d.%d%s\n",
362 #else
363 printf("%s: OHCI version %d.%d%s\n", USBDEVNAME(sc->sc_bus.bdev),
364 #endif
365 OHCI_REV_HI(rev), OHCI_REV_LO(rev),
366 OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
367 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
368 printf("%s: unsupported OHCI revision\n",
369 USBDEVNAME(sc->sc_bus.bdev));
370 return (USBD_INVAL);
371 }
372
373 for (i = 0; i < OHCI_HASH_SIZE; i++)
374 LIST_INIT(&sc->sc_hash_tds[i]);
375
376 /* Allocate the HCCA area. */
377 r = usb_allocmem(sc->sc_dmatag, OHCI_HCCA_SIZE,
378 OHCI_HCCA_ALIGN, &sc->sc_hccadma);
379 if (r != USBD_NORMAL_COMPLETION)
380 return (r);
381 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma);
382 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
383
384 sc->sc_eintrs = OHCI_NORMAL_INTRS;
385
386 sc->sc_ctrl_head = ohci_alloc_sed(sc);
387 if (!sc->sc_ctrl_head) {
388 r = USBD_NOMEM;
389 goto bad1;
390 }
391 sc->sc_ctrl_head->ed->ed_flags |= LE(OHCI_ED_SKIP);
392
393 sc->sc_bulk_head = ohci_alloc_sed(sc);
394 if (!sc->sc_bulk_head) {
395 r = USBD_NOMEM;
396 goto bad2;
397 }
398 sc->sc_bulk_head->ed->ed_flags |= LE(OHCI_ED_SKIP);
399
400 /* Allocate all the dummy EDs that make up the interrupt tree. */
401 for (i = 0; i < OHCI_NO_EDS; i++) {
402 sed = ohci_alloc_sed(sc);
403 if (!sed) {
404 while (--i >= 0)
405 ohci_free_sed(sc, sc->sc_eds[i]);
406 r = USBD_NOMEM;
407 goto bad3;
408 }
409 /* All ED fields are set to 0. */
410 sc->sc_eds[i] = sed;
411 sed->ed->ed_flags |= LE(OHCI_ED_SKIP);
412 if (i != 0) {
413 psed = sc->sc_eds[(i-1) / 2];
414 sed->next = psed;
415 sed->ed->ed_nexted = LE(psed->physaddr);
416 }
417 }
418 /*
419 * Fill HCCA interrupt table. The bit reversal is to get
420 * the tree set up properly to spread the interrupts.
421 */
422 for (i = 0; i < OHCI_NO_INTRS; i++)
423 sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
424 LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
425
426 /* Determine in what context we are running. */
427 ctl = OREAD4(sc, OHCI_CONTROL);
428 if (ctl & OHCI_IR) {
429 /* SMM active, request change */
430 DPRINTF(("ohci_init: SMM active, request owner change\n"));
431 s = OREAD4(sc, OHCI_COMMAND_STATUS);
432 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
433 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
434 delay(1000);
435 ctl = OREAD4(sc, OHCI_CONTROL);
436 }
437 if ((ctl & OHCI_IR) == 0) {
438 printf("%s: SMM does not respond, resetting\n",
439 USBDEVNAME(sc->sc_bus.bdev));
440 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
441 goto reset;
442 }
443 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
444 /* BIOS started controller. */
445 DPRINTF(("ohci_init: BIOS active\n"));
446 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
447 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
448 delay(USB_RESUME_DELAY * 1000);
449 }
450 } else {
451 DPRINTF(("ohci_init: cold started\n"));
452 reset:
453 /* Controller was cold started. */
454 delay(USB_BUS_RESET_DELAY * 1000);
455 }
456
457 /*
458 * This reset should not be necessary according to the OHCI spec, but
459 * without it some controllers do not start.
460 */
461 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
462 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
463 delay(USB_BUS_RESET_DELAY * 1000);
464
465 /* We now own the host controller and the bus has been reset. */
466 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
467
468 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
469 /* Nominal time for a reset is 10 us. */
470 for (i = 0; i < 10; i++) {
471 delay(10);
472 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
473 if (!hcr)
474 break;
475 }
476 if (hcr) {
477 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
478 r = USBD_IOERROR;
479 goto bad3;
480 }
481 #ifdef USB_DEBUG
482 thesc = sc;
483 if (ohcidebug > 15)
484 ohci_dumpregs(sc);
485 #endif
486
487 /* The controller is now in suspend state, we have 2ms to finish. */
488
489 /* Set up HC registers. */
490 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma));
491 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
492 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
493 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
494 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
495 ctl = OREAD4(sc, OHCI_CONTROL);
496 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
497 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
498 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
499 /* And finally start it! */
500 OWRITE4(sc, OHCI_CONTROL, ctl);
501
502 /*
503 * The controller is now OPERATIONAL. Set a some final
504 * registers that should be set earlier, but that the
505 * controller ignores when in the SUSPEND state.
506 */
507 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
508 fm |= OHCI_FSMPS(ival) | ival;
509 OWRITE4(sc, OHCI_FM_INTERVAL, fm);
510 per = OHCI_PERIODIC(ival); /* 90% periodic */
511 OWRITE4(sc, OHCI_PERIODIC_START, per);
512
513 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
514
515 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
516
517 #ifdef USB_DEBUG
518 if (ohcidebug > 5)
519 ohci_dumpregs(sc);
520 #endif
521
522 /* Set up the bus struct. */
523 sc->sc_bus.open_pipe = ohci_open;
524 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
525 sc->sc_bus.do_poll = ohci_poll;
526
527 powerhook_establish(ohci_power, sc);
528
529 return (USBD_NORMAL_COMPLETION);
530
531 bad3:
532 ohci_free_sed(sc, sc->sc_ctrl_head);
533 bad2:
534 ohci_free_sed(sc, sc->sc_bulk_head);
535 bad1:
536 usb_freemem(sc->sc_dmatag, &sc->sc_hccadma);
537 return (r);
538 }
539
540 #if !defined(__OpenBSD__)
541 void
542 ohci_power(why, v)
543 int why;
544 void *v;
545 {
546 #ifdef USB_DEBUG
547 ohci_softc_t *sc = v;
548
549 printf("ohci_power: sc=%p, why=%d\n", sc, why);
550 /* XXX should suspend/resume */
551 ohci_dumpregs(sc);
552 #endif
553 }
554 #endif /* !defined(__OpenBSD__) */
555
556 #ifdef USB_DEBUG
557 void ohcidump(void);
558 void ohcidump(void) { ohci_dumpregs(thesc); }
559
560 void
561 ohci_dumpregs(sc)
562 ohci_softc_t *sc;
563 {
564 printf("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
565 OREAD4(sc, OHCI_REVISION),
566 OREAD4(sc, OHCI_CONTROL),
567 OREAD4(sc, OHCI_COMMAND_STATUS));
568 printf(" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
569 OREAD4(sc, OHCI_INTERRUPT_STATUS),
570 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
571 OREAD4(sc, OHCI_INTERRUPT_DISABLE));
572 printf(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
573 OREAD4(sc, OHCI_HCCA),
574 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
575 OREAD4(sc, OHCI_CONTROL_HEAD_ED));
576 printf(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
577 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
578 OREAD4(sc, OHCI_BULK_HEAD_ED),
579 OREAD4(sc, OHCI_BULK_CURRENT_ED));
580 printf(" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
581 OREAD4(sc, OHCI_DONE_HEAD),
582 OREAD4(sc, OHCI_FM_INTERVAL),
583 OREAD4(sc, OHCI_FM_REMAINING));
584 printf(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
585 OREAD4(sc, OHCI_FM_NUMBER),
586 OREAD4(sc, OHCI_PERIODIC_START),
587 OREAD4(sc, OHCI_LS_THRESHOLD));
588 printf(" desca=0x%08x descb=0x%08x stat=0x%08x\n",
589 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
590 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
591 OREAD4(sc, OHCI_RH_STATUS));
592 printf(" port1=0x%08x port2=0x%08x\n",
593 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
594 OREAD4(sc, OHCI_RH_PORT_STATUS(2)));
595 printf(" HCCA: frame_number=0x%04x done_head=0x%08x\n",
596 LE(sc->sc_hcca->hcca_frame_number),
597 LE(sc->sc_hcca->hcca_done_head));
598 }
599 #endif
600
601 int
602 ohci_intr(p)
603 void *p;
604 {
605 ohci_softc_t *sc = p;
606 u_int32_t intrs, eintrs;
607 ohci_physaddr_t done;
608
609 /* In case the interrupt occurs before initialization has completed. */
610 if (sc == NULL || sc->sc_hcca == NULL) {
611 #ifdef DIAGNOSTIC
612 printf("ohci_intr: sc->sc_hcca == NULL\n");
613 #endif
614 return (0);
615 }
616
617 intrs = 0;
618 done = LE(sc->sc_hcca->hcca_done_head);
619 if (done != 0) {
620 sc->sc_hcca->hcca_done_head = 0;
621 if (done & ~OHCI_DONE_INTRS)
622 intrs = OHCI_WDH;
623 if (done & OHCI_DONE_INTRS)
624 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
625 } else
626 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
627 if (!intrs)
628 return (0);
629 intrs &= ~OHCI_MIE;
630 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
631 eintrs = intrs & sc->sc_eintrs;
632 if (!eintrs)
633 return (0);
634
635 sc->sc_intrs++;
636 DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n",
637 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
638 (u_int)eintrs));
639
640 if (eintrs & OHCI_SO) {
641 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev));
642 /* XXX do what */
643 intrs &= ~OHCI_SO;
644 }
645 if (eintrs & OHCI_WDH) {
646 ohci_process_done(sc, done &~ OHCI_DONE_INTRS);
647 intrs &= ~OHCI_WDH;
648 }
649 if (eintrs & OHCI_RD) {
650 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
651 /* XXX process resume detect */
652 }
653 if (eintrs & OHCI_UE) {
654 printf("%s: unrecoverable error, controller halted\n",
655 USBDEVNAME(sc->sc_bus.bdev));
656 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
657 /* XXX what else */
658 }
659 if (eintrs & OHCI_RHSC) {
660 ohci_rhsc(sc, sc->sc_intrreqh);
661 intrs &= ~OHCI_RHSC;
662
663 /*
664 * Disable RHSC interrupt for now, because it will be
665 * on until the port has been reset.
666 */
667 ohci_rhsc_able(sc, 0);
668 }
669
670 /* Block unprocessed interrupts. XXX */
671 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs);
672 sc->sc_eintrs &= ~intrs;
673
674 return (1);
675 }
676
677 void
678 ohci_rhsc_able(sc, on)
679 ohci_softc_t *sc;
680 int on;
681 {
682 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
683 if (on) {
684 sc->sc_eintrs |= OHCI_RHSC;
685 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
686 } else {
687 sc->sc_eintrs &= ~OHCI_RHSC;
688 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
689 }
690 }
691
692 #ifdef USB_DEBUG
693 char *ohci_cc_strs[] = {
694 "NO_ERROR",
695 "CRC",
696 "BIT_STUFFING",
697 "DATA_TOGGLE_MISMATCH",
698 "STALL",
699 "DEVICE_NOT_RESPONDING",
700 "PID_CHECK_FAILURE",
701 "UNEXPECTED_PID",
702 "DATA_OVERRUN",
703 "DATA_UNDERRUN",
704 "BUFFER_OVERRUN",
705 "BUFFER_UNDERRUN",
706 "NOT_ACCESSED",
707 };
708 #endif
709
710 void
711 ohci_process_done(sc, done)
712 ohci_softc_t *sc;
713 ohci_physaddr_t done;
714 {
715 ohci_soft_td_t *std, *sdone;
716 usbd_request_handle reqh;
717 int len, cc;
718
719 DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done));
720
721 /* Reverse the done list. */
722 for (sdone = 0; done; done = LE(std->td->td_nexttd)) {
723 std = ohci_hash_find_td(sc, done);
724 std->dnext = sdone;
725 sdone = std;
726 }
727
728 #ifdef USB_DEBUG
729 if (ohcidebug > 10) {
730 printf("ohci_process_done: TD done:\n");
731 ohci_dump_tds(sdone);
732 }
733 #endif
734
735 for (std = sdone; std; std = std->dnext) {
736 reqh = std->reqh;
737 DPRINTFN(10, ("ohci_process_done: std=%p reqh=%p hcpriv=%p\n",
738 std, reqh, reqh->hcpriv));
739 cc = OHCI_TD_GET_CC(LE(std->td->td_flags));
740 if (reqh->status == USBD_CANCELLED ||
741 reqh->status == USBD_TIMEOUT) {
742 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
743 reqh));
744 ohci_idone(sc, reqh);
745 } else if (cc == OHCI_CC_NO_ERROR) {
746 len = std->len;
747 if (std->td->td_cbp != 0)
748 len -= LE(std->td->td_be) -
749 LE(std->td->td_cbp) + 1;
750 if (std->flags & OHCI_SET_LEN)
751 reqh->actlen = len;
752 if (std->flags & OHCI_CALL_DONE) {
753 reqh->status = USBD_NORMAL_COMPLETION;
754 ohci_idone(sc, reqh);
755 }
756 } else {
757 ohci_soft_td_t *p, *n;
758 struct ohci_pipe *opipe =
759 (struct ohci_pipe *)reqh->pipe;
760 DPRINTFN(-1,("ohci_process_done: error cc=%d (%s)\n",
761 OHCI_TD_GET_CC(LE(std->td->td_flags)),
762 ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td->td_flags))]));
763 /*
764 * Endpoint is halted. First unlink all the TDs
765 * belonging to the failed transfer, and then restart
766 * the endpoint.
767 */
768 for (p = std->nexttd; p->reqh == reqh; p = n) {
769 n = p->nexttd;
770 ohci_hash_rem_td(sc, p);
771 ohci_free_std(sc, p);
772 }
773 /* clear halt */
774 opipe->sed->ed->ed_headp = LE(p->physaddr);
775 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
776
777 if (cc == OHCI_CC_STALL)
778 reqh->status = USBD_STALLED;
779 else
780 reqh->status = USBD_IOERROR;
781 ohci_idone(sc, reqh);
782 }
783 ohci_hash_rem_td(sc, std);
784 ohci_free_std(sc, std);
785 }
786 }
787
788 void
789 ohci_idone(sc, reqh)
790 ohci_softc_t *sc;
791 usbd_request_handle reqh;
792 {
793 ohci_done(sc, reqh);
794 if (reqh->pipe->intrreqh != reqh)
795 usb_start_next(reqh->pipe);
796 }
797
798 void
799 ohci_done(sc, reqh)
800 ohci_softc_t *sc;
801 usbd_request_handle reqh;
802 {
803 usbd_pipe_handle pipe = reqh->pipe;
804
805 #ifdef DIAGNOSTIC
806 if (!reqh->hcpriv)
807 printf("ohci_done: reqh=%p, no hcpriv\n", reqh);
808 #endif
809 reqh->hcpriv = 0;
810
811 switch (pipe->endpoint->edesc->bmAttributes & UE_XFERTYPE) {
812 case UE_CONTROL:
813 ohci_ctrl_done(sc, reqh);
814 break;
815 case UE_INTERRUPT:
816 ohci_intr_done(sc, reqh);
817 break;
818 case UE_BULK:
819 ohci_bulk_done(sc, reqh);
820 break;
821 case UE_ISOCHRONOUS:
822 printf("ohci_process_done: ISO done?\n");
823 break;
824 }
825
826 /* Remove request from queue. */
827 SIMPLEQ_REMOVE_HEAD(&pipe->queue, reqh, next);
828
829 /* And finally execute callback. */
830 reqh->xfercb(reqh);
831 }
832
833 void
834 ohci_ctrl_done(sc, reqh)
835 ohci_softc_t *sc;
836 usbd_request_handle reqh;
837 {
838 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
839 u_int len = opipe->u.ctl.length;
840 usb_dma_t *dma;
841
842 DPRINTFN(10,("ohci_ctrl_done: reqh=%p\n", reqh));
843
844 if (!reqh->isreq) {
845 panic("ohci_ctrl_done: not a request\n");
846 return;
847 }
848
849 if (len != 0) {
850 dma = &opipe->u.ctl.datadma;
851 if (reqh->request.bmRequestType & UT_READ)
852 memcpy(reqh->buffer, KERNADDR(dma), len);
853 usb_freemem(sc->sc_dmatag, dma);
854 }
855 usb_untimeout(ohci_timeout, reqh, reqh->timo_handle);
856 }
857
858 void
859 ohci_intr_done(sc, reqh)
860 ohci_softc_t *sc;
861 usbd_request_handle reqh;
862 {
863 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
864 usb_dma_t *dma;
865 ohci_soft_ed_t *sed = opipe->sed;
866 ohci_soft_td_t *xfer, *tail;
867
868
869 DPRINTFN(10,("ohci_intr_done: reqh=%p, actlen=%d\n",
870 reqh, reqh->actlen));
871
872 dma = &opipe->u.intr.datadma;
873 memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen);
874
875 if (reqh->pipe->intrreqh == reqh) {
876 xfer = opipe->tail;
877 tail = ohci_alloc_std(sc); /* XXX should reuse TD */
878 if (!tail) {
879 reqh->status = USBD_NOMEM;
880 return;
881 }
882 tail->reqh = 0;
883
884 xfer->td->td_flags = LE(
885 OHCI_TD_IN | OHCI_TD_NOCC |
886 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
887 if (reqh->flags & USBD_SHORT_XFER_OK)
888 xfer->td->td_flags |= LE(OHCI_TD_R);
889 xfer->td->td_cbp = LE(DMAADDR(dma));
890 xfer->nexttd = tail;
891 xfer->td->td_nexttd = LE(tail->physaddr);
892 xfer->td->td_be = LE(LE(xfer->td->td_cbp) + reqh->length - 1);
893 xfer->len = reqh->length;
894 xfer->reqh = reqh;
895 xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN;
896 reqh->hcpriv = xfer;
897
898 ohci_hash_add_td(sc, xfer);
899 sed->ed->ed_tailp = LE(tail->physaddr);
900 opipe->tail = tail;
901 } else {
902 usb_freemem(sc->sc_dmatag, dma);
903 }
904 }
905
906 void
907 ohci_bulk_done(sc, reqh)
908 ohci_softc_t *sc;
909 usbd_request_handle reqh;
910 {
911 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
912 u_int len = opipe->u.bulk.length;
913 usb_dma_t *dma;
914
915
916 DPRINTFN(10,("ohci_bulk_done: reqh=%p, actlen=%d\n",
917 reqh, reqh->actlen));
918
919 dma = &opipe->u.bulk.datadma;
920 if (opipe->u.bulk.isread)
921 memcpy(reqh->buffer, KERNADDR(dma), len);
922 usb_freemem(sc->sc_dmatag, dma);
923 usb_untimeout(ohci_timeout, reqh, reqh->timo_handle);
924 }
925
926 void
927 ohci_rhsc(sc, reqh)
928 ohci_softc_t *sc;
929 usbd_request_handle reqh;
930 {
931 usbd_pipe_handle pipe;
932 struct ohci_pipe *opipe;
933 u_char *p;
934 int i, m;
935 int hstatus;
936
937 hstatus = OREAD4(sc, OHCI_RH_STATUS);
938 DPRINTF(("ohci_rhsc: sc=%p reqh=%p hstatus=0x%08x\n",
939 sc, reqh, hstatus));
940
941 if (reqh == 0) {
942 /* Just ignore the change. */
943 return;
944 }
945
946 pipe = reqh->pipe;
947 opipe = (struct ohci_pipe *)pipe;
948
949 p = KERNADDR(&opipe->u.intr.datadma);
950 m = min(sc->sc_noport, reqh->length * 8 - 1);
951 memset(p, 0, reqh->length);
952 for (i = 1; i <= m; i++) {
953 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
954 p[i/8] |= 1 << (i%8);
955 }
956 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
957 reqh->actlen = reqh->length;
958 reqh->status = USBD_NORMAL_COMPLETION;
959 reqh->xfercb(reqh);
960
961 if (reqh->pipe->intrreqh != reqh) {
962 sc->sc_intrreqh = 0;
963 usb_freemem(sc->sc_dmatag, &opipe->u.intr.datadma);
964 usb_start_next(reqh->pipe);
965 }
966 }
967
968 /*
969 * Wait here until controller claims to have an interrupt.
970 * Then call ohci_intr and return. Use timeout to avoid waiting
971 * too long.
972 */
973 void
974 ohci_waitintr(sc, reqh)
975 ohci_softc_t *sc;
976 usbd_request_handle reqh;
977 {
978 int timo = reqh->timeout;
979 int usecs;
980 u_int32_t intrs;
981
982 reqh->status = USBD_IN_PROGRESS;
983 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
984 usb_delay_ms(&sc->sc_bus, 1);
985 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
986 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
987 #ifdef USB_DEBUG
988 if (ohcidebug > 15)
989 ohci_dumpregs(sc);
990 #endif
991 if (intrs) {
992 ohci_intr(sc);
993 if (reqh->status != USBD_IN_PROGRESS)
994 return;
995 }
996 }
997
998 /* Timeout */
999 DPRINTF(("ohci_waitintr: timeout\n"));
1000 reqh->status = USBD_TIMEOUT;
1001 ohci_idone(sc, reqh);
1002 /* XXX should free TD */
1003 }
1004
1005 void
1006 ohci_poll(bus)
1007 struct usbd_bus *bus;
1008 {
1009 ohci_softc_t *sc = (ohci_softc_t *)bus;
1010
1011 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
1012 ohci_intr(sc);
1013 }
1014
1015 usbd_status
1016 ohci_device_request(reqh)
1017 usbd_request_handle reqh;
1018 {
1019 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
1020 usb_device_request_t *req = &reqh->request;
1021 usbd_device_handle dev = opipe->pipe.device;
1022 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1023 int addr = dev->address;
1024 ohci_soft_td_t *setup, *xfer = 0, *stat, *next, *tail;
1025 ohci_soft_ed_t *sed;
1026 usb_dma_t *dmap;
1027 int isread;
1028 int len;
1029 usbd_status r;
1030 int s;
1031
1032 isread = req->bmRequestType & UT_READ;
1033 len = UGETW(req->wLength);
1034
1035 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1036 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1037 req->bmRequestType, req->bRequest, UGETW(req->wValue),
1038 UGETW(req->wIndex), len, addr,
1039 opipe->pipe.endpoint->edesc->bEndpointAddress));
1040
1041 setup = opipe->tail;
1042 stat = ohci_alloc_std(sc);
1043 if (!stat) {
1044 r = USBD_NOMEM;
1045 goto bad1;
1046 }
1047 tail = ohci_alloc_std(sc);
1048 if (!tail) {
1049 r = USBD_NOMEM;
1050 goto bad2;
1051 }
1052 tail->reqh = 0;
1053
1054 sed = opipe->sed;
1055 dmap = &opipe->u.ctl.datadma;
1056 opipe->u.ctl.length = len;
1057
1058 /* Update device address and length since they may have changed. */
1059 /* XXX This only needs to be done once, but it's too early in open. */
1060 sed->ed->ed_flags = LE(
1061 (LE(sed->ed->ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1062 OHCI_ED_SET_FA(addr) |
1063 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1064
1065 /* Set up data transaction */
1066 if (len != 0) {
1067 xfer = ohci_alloc_std(sc);
1068 if (!xfer) {
1069 r = USBD_NOMEM;
1070 goto bad3;
1071 }
1072 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1073 if (r != USBD_NORMAL_COMPLETION)
1074 goto bad4;
1075 xfer->td->td_flags = LE(
1076 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
1077 OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR |
1078 (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0));
1079 xfer->td->td_cbp = LE(DMAADDR(dmap));
1080 xfer->nexttd = stat;
1081 xfer->td->td_nexttd = LE(stat->physaddr);
1082 xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1);
1083 xfer->len = len;
1084 xfer->reqh = reqh;
1085 xfer->flags = OHCI_SET_LEN;
1086
1087 next = xfer;
1088 stat->flags = OHCI_CALL_DONE;
1089 } else {
1090 next = stat;
1091 stat->flags = OHCI_CALL_DONE | OHCI_SET_LEN;
1092 }
1093
1094 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req);
1095 if (!isread && len != 0)
1096 memcpy(KERNADDR(dmap), reqh->buffer, len);
1097
1098 setup->td->td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC |
1099 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1100 setup->td->td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma));
1101 setup->nexttd = next;
1102 setup->td->td_nexttd = LE(next->physaddr);
1103 setup->td->td_be = LE(LE(setup->td->td_cbp) + sizeof *req - 1);
1104 setup->len = 0; /* XXX The number of byte we count */
1105 setup->reqh = reqh;
1106 setup->flags = 0;
1107 reqh->hcpriv = setup;
1108
1109 stat->td->td_flags = LE(
1110 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC |
1111 OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1112 stat->td->td_cbp = 0;
1113 stat->nexttd = tail;
1114 stat->td->td_nexttd = LE(tail->physaddr);
1115 stat->td->td_be = 0;
1116 stat->len = 0;
1117 stat->reqh = reqh;
1118
1119 #if USB_DEBUG
1120 if (ohcidebug > 5) {
1121 printf("ohci_device_request:\n");
1122 ohci_dump_ed(sed);
1123 ohci_dump_tds(setup);
1124 }
1125 #endif
1126
1127 /* Insert ED in schedule */
1128 s = splusb();
1129 ohci_hash_add_td(sc, setup);
1130 if (len != 0)
1131 ohci_hash_add_td(sc, xfer);
1132 ohci_hash_add_td(sc, stat);
1133 sed->ed->ed_tailp = LE(tail->physaddr);
1134 opipe->tail = tail;
1135 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1136 if (reqh->timeout && !sc->sc_bus.use_polling) {
1137 usb_timeout(ohci_timeout, reqh,
1138 MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
1139 }
1140 splx(s);
1141
1142 #if USB_DEBUG
1143 if (ohcidebug > 5) {
1144 delay(5000);
1145 printf("ohci_device_request: status=%x\n",
1146 OREAD4(sc, OHCI_COMMAND_STATUS));
1147 ohci_dump_ed(sed);
1148 ohci_dump_tds(setup);
1149 }
1150 #endif
1151
1152 return (USBD_NORMAL_COMPLETION);
1153
1154 bad4:
1155 ohci_free_std(sc, xfer);
1156 bad3:
1157 ohci_free_std(sc, tail);
1158 bad2:
1159 ohci_free_std(sc, stat);
1160 bad1:
1161 return (r);
1162 }
1163
1164 /*
1165 * Add an ED to the schedule. Called at splusb().
1166 */
1167 void
1168 ohci_add_ed(sed, head)
1169 ohci_soft_ed_t *sed;
1170 ohci_soft_ed_t *head;
1171 {
1172 sed->next = head->next;
1173 sed->ed->ed_nexted = head->ed->ed_nexted;
1174 head->next = sed;
1175 head->ed->ed_nexted = LE(sed->physaddr);
1176 }
1177
1178 /*
1179 * Remove an ED from the schedule. Called at splusb().
1180 */
1181 void
1182 ohci_rem_ed(sed, head)
1183 ohci_soft_ed_t *sed;
1184 ohci_soft_ed_t *head;
1185 {
1186 ohci_soft_ed_t *p;
1187
1188 /* XXX */
1189 for (p = head; p && p->next != sed; p = p->next)
1190 ;
1191 if (!p)
1192 panic("ohci_rem_ed: ED not found\n");
1193 p->next = sed->next;
1194 p->ed->ed_nexted = sed->ed->ed_nexted;
1195 }
1196
1197 /*
1198 * When a transfer is completed the TD is added to the done queue by
1199 * the host controller. This queue is the processed by software.
1200 * Unfortunately the queue contains the physical address of the TD
1201 * and we have no simple way to translate this back to a kernel address.
1202 * To make the translation possible (and fast) we use a hash table of
1203 * TDs currently in the schedule. The physical address is used as the
1204 * hash value.
1205 */
1206
1207 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1208 /* Called at splusb() */
1209 void
1210 ohci_hash_add_td(sc, std)
1211 ohci_softc_t *sc;
1212 ohci_soft_td_t *std;
1213 {
1214 int h = HASH(std->physaddr);
1215
1216 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1217 }
1218
1219 /* Called at splusb() */
1220 void
1221 ohci_hash_rem_td(sc, std)
1222 ohci_softc_t *sc;
1223 ohci_soft_td_t *std;
1224 {
1225 LIST_REMOVE(std, hnext);
1226 }
1227
1228 ohci_soft_td_t *
1229 ohci_hash_find_td(sc, a)
1230 ohci_softc_t *sc;
1231 ohci_physaddr_t a;
1232 {
1233 int h = HASH(a);
1234 ohci_soft_td_t *std;
1235
1236 for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1237 std != 0;
1238 std = LIST_NEXT(std, hnext))
1239 if (std->physaddr == a)
1240 return (std);
1241 panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a);
1242 }
1243
1244 void
1245 ohci_timeout(addr)
1246 void *addr;
1247 {
1248 #if 0
1249 usbd_request_handle *reqh = addr;
1250 int s;
1251
1252 DPRINTF(("ohci_timeout: reqh=%p\n", reqh));
1253 s = splusb();
1254 /* XXX need to inactivate TD before calling interrupt routine */
1255 ohci_XXX_done(reqh);
1256 splx(s);
1257 #endif
1258 }
1259
1260 #ifdef USB_DEBUG
1261 void
1262 ohci_dump_tds(std)
1263 ohci_soft_td_t *std;
1264 {
1265 for (; std; std = std->nexttd)
1266 ohci_dump_td(std);
1267 }
1268
1269 void
1270 ohci_dump_td(std)
1271 ohci_soft_td_t *std;
1272 {
1273 printf("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx "
1274 "nexttd=0x%08lx be=0x%08lx\n",
1275 std, (u_long)std->physaddr,
1276 (int)LE(std->td->td_flags),
1277 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1278 OHCI_TD_GET_DI(LE(std->td->td_flags)),
1279 OHCI_TD_GET_EC(LE(std->td->td_flags)),
1280 OHCI_TD_GET_CC(LE(std->td->td_flags)),
1281 (u_long)LE(std->td->td_cbp),
1282 (u_long)LE(std->td->td_nexttd), (u_long)LE(std->td->td_be));
1283 }
1284
1285 void
1286 ohci_dump_ed(sed)
1287 ohci_soft_ed_t *sed;
1288 {
1289 printf("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx "
1290 "headp=%b nexted=0x%08lx\n",
1291 sed, (u_long)sed->physaddr,
1292 OHCI_ED_GET_FA(LE(sed->ed->ed_flags)),
1293 OHCI_ED_GET_EN(LE(sed->ed->ed_flags)),
1294 OHCI_ED_GET_MAXP(LE(sed->ed->ed_flags)),
1295 (int)LE(sed->ed->ed_flags),
1296 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
1297 (u_long)LE(sed->ed->ed_tailp),
1298 (u_long)LE(sed->ed->ed_headp), "\20\1HALT\2CARRY",
1299 (u_long)LE(sed->ed->ed_nexted));
1300 }
1301 #endif
1302
1303 usbd_status
1304 ohci_open(pipe)
1305 usbd_pipe_handle pipe;
1306 {
1307 usbd_device_handle dev = pipe->device;
1308 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1309 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1310 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1311 u_int8_t addr = dev->address;
1312 ohci_soft_ed_t *sed;
1313 ohci_soft_td_t *std;
1314 usbd_status r;
1315 int s;
1316
1317 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1318 pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1319 if (addr == sc->sc_addr) {
1320 switch (ed->bEndpointAddress) {
1321 case USB_CONTROL_ENDPOINT:
1322 pipe->methods = &ohci_root_ctrl_methods;
1323 break;
1324 case UE_IN | OHCI_INTR_ENDPT:
1325 pipe->methods = &ohci_root_intr_methods;
1326 break;
1327 default:
1328 return (USBD_INVAL);
1329 }
1330 } else {
1331 sed = ohci_alloc_sed(sc);
1332 if (sed == 0)
1333 goto bad0;
1334 std = ohci_alloc_std(sc);
1335 if (std == 0)
1336 goto bad1;
1337 opipe->sed = sed;
1338 opipe->tail = std;
1339 sed->ed->ed_flags = LE(
1340 OHCI_ED_SET_FA(addr) |
1341 OHCI_ED_SET_EN(ed->bEndpointAddress) |
1342 OHCI_ED_DIR_TD |
1343 (dev->lowspeed ? OHCI_ED_SPEED : 0) |
1344 ((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ?
1345 OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) |
1346 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
1347 sed->ed->ed_headp = sed->ed->ed_tailp = LE(std->physaddr);
1348
1349 switch (ed->bmAttributes & UE_XFERTYPE) {
1350 case UE_CONTROL:
1351 pipe->methods = &ohci_device_ctrl_methods;
1352 r = usb_allocmem(sc->sc_dmatag,
1353 sizeof(usb_device_request_t),
1354 0, &opipe->u.ctl.reqdma);
1355 if (r != USBD_NORMAL_COMPLETION)
1356 goto bad;
1357 s = splusb();
1358 ohci_add_ed(sed, sc->sc_ctrl_head);
1359 splx(s);
1360 break;
1361 case UE_INTERRUPT:
1362 pipe->methods = &ohci_device_intr_methods;
1363 return (ohci_device_setintr(sc, opipe, ed->bInterval));
1364 case UE_ISOCHRONOUS:
1365 printf("ohci_open: open iso unimplemented\n");
1366 return (USBD_XXX);
1367 case UE_BULK:
1368 pipe->methods = &ohci_device_bulk_methods;
1369 s = splusb();
1370 ohci_add_ed(sed, sc->sc_bulk_head);
1371 splx(s);
1372 break;
1373 }
1374 }
1375 return (USBD_NORMAL_COMPLETION);
1376
1377 bad:
1378 ohci_free_std(sc, std);
1379 bad1:
1380 ohci_free_sed(sc, sed);
1381 bad0:
1382 return (USBD_NOMEM);
1383
1384 }
1385
1386 /*
1387 * Close a reqular pipe.
1388 * Assumes that there are no pending transactions.
1389 */
1390 void
1391 ohci_close_pipe(pipe, head)
1392 usbd_pipe_handle pipe;
1393 ohci_soft_ed_t *head;
1394 {
1395 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1396 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1397 ohci_soft_ed_t *sed = opipe->sed;
1398 int s;
1399
1400 s = splusb();
1401 #ifdef DIAGNOSTIC
1402 sed->ed->ed_flags |= LE(OHCI_ED_SKIP);
1403 if ((sed->ed->ed_tailp & LE(OHCI_TAILMASK)) !=
1404 (sed->ed->ed_headp & LE(OHCI_TAILMASK))) {
1405 ohci_physaddr_t td = sed->ed->ed_headp;
1406 ohci_soft_td_t *std;
1407 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]);
1408 std != 0;
1409 std = LIST_NEXT(std, hnext))
1410 if (std->physaddr == td)
1411 break;
1412 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
1413 "tl=0x%x pipe=%p, std=%p\n", sed,
1414 (int)LE(sed->ed->ed_headp), (int)LE(sed->ed->ed_tailp),
1415 pipe, std);
1416 usb_delay_ms(&sc->sc_bus, 2);
1417 if ((sed->ed->ed_tailp & LE(OHCI_TAILMASK)) !=
1418 (sed->ed->ed_headp & LE(OHCI_TAILMASK)))
1419 printf("ohci_close_pipe: pipe still not empty\n");
1420 }
1421 #endif
1422 ohci_rem_ed(sed, head);
1423 splx(s);
1424 ohci_free_std(sc, opipe->tail);
1425 ohci_free_sed(sc, opipe->sed);
1426 }
1427
1428 /*
1429 * Abort a device request.
1430 * If this routine is called at splusb() it guarantees that the request
1431 * will be removed from the hardware scheduling and that the callback
1432 * for it will be called with USBD_CANCELLED status.
1433 * It's impossible to guarantee that the requested transfer will not
1434 * have happened since the hardware runs concurrently.
1435 * If the transaction has already happened we rely on the ordinary
1436 * interrupt processing to process it.
1437 */
1438 void
1439 ohci_abort_request(reqh)
1440 usbd_request_handle reqh;
1441 {
1442 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
1443 usbd_device_handle dev = opipe->pipe.device;
1444 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1445 ohci_soft_ed_t *sed;
1446 ohci_soft_td_t *p, *n;
1447 int s;
1448
1449 DPRINTF(("ohci_abort_request: reqh=%p pipe=%p\n", reqh, opipe));
1450 s = splusb();
1451
1452 reqh->status = USBD_CANCELLED; /* mark as cancelled */
1453
1454 if (!reqh->hcpriv) {
1455 /* Not scheduled */
1456 reqh->xfercb(reqh);
1457 return;
1458 }
1459
1460 sed = opipe->sed;
1461 DPRINTFN(1,("ohci_abort_request: stop ed=%p\n", sed));
1462 sed->ed->ed_flags |= LE(OHCI_ED_SKIP); /* force hardware skip */
1463 delay(10); /* give HC hardware a little time */
1464
1465 /* if already processed by hardware let interrupt routine handle it */
1466 if ((sed->ed->ed_tailp & LE(OHCI_TAILMASK)) ==
1467 (sed->ed->ed_headp & LE(OHCI_TAILMASK))) {
1468 DPRINTF(("ohci_abort_request: request processed\n"));
1469 usb_delay_ms(dev->bus, 2);
1470 } else {
1471 p = reqh->hcpriv;
1472 #ifdef DIAGNOSTIC
1473 if (!p) {
1474 printf("ohci_abort_request: hcpriv==0\n");
1475 return;
1476 }
1477 #endif
1478 ohci_done(sc, reqh);
1479 for (; p->reqh == reqh; p = n) {
1480 n = p->nexttd;
1481 ohci_hash_rem_td(sc, p);
1482 ohci_free_std(sc, p);
1483 }
1484 DPRINTFN(2,("ohci_abort_request: set hd=%x, tl=%x\n",
1485 (int)LE(p->physaddr), (int)LE(sed->ed->ed_tailp)));
1486 sed->ed->ed_headp = p->physaddr; /* unlink TDs */
1487 }
1488
1489 sed->ed->ed_flags &= LE(~OHCI_ED_SKIP); /* remove hardware skip */
1490 splx(s);
1491 }
1492
1493 /*
1494 * Data structures and routines to emulate the root hub.
1495 */
1496 usb_device_descriptor_t ohci_devd = {
1497 USB_DEVICE_DESCRIPTOR_SIZE,
1498 UDESC_DEVICE, /* type */
1499 {0x00, 0x01}, /* USB version */
1500 UCLASS_HUB, /* class */
1501 USUBCLASS_HUB, /* subclass */
1502 0, /* protocol */
1503 64, /* max packet */
1504 {0},{0},{0x00,0x01}, /* device id */
1505 1,2,0, /* string indicies */
1506 1 /* # of configurations */
1507 };
1508
1509 usb_config_descriptor_t ohci_confd = {
1510 USB_CONFIG_DESCRIPTOR_SIZE,
1511 UDESC_CONFIG,
1512 {USB_CONFIG_DESCRIPTOR_SIZE +
1513 USB_INTERFACE_DESCRIPTOR_SIZE +
1514 USB_ENDPOINT_DESCRIPTOR_SIZE},
1515 1,
1516 1,
1517 0,
1518 UC_SELF_POWERED,
1519 0 /* max power */
1520 };
1521
1522 usb_interface_descriptor_t ohci_ifcd = {
1523 USB_INTERFACE_DESCRIPTOR_SIZE,
1524 UDESC_INTERFACE,
1525 0,
1526 0,
1527 1,
1528 UCLASS_HUB,
1529 USUBCLASS_HUB,
1530 0,
1531 0
1532 };
1533
1534 usb_endpoint_descriptor_t ohci_endpd = {
1535 USB_ENDPOINT_DESCRIPTOR_SIZE,
1536 UDESC_ENDPOINT,
1537 UE_IN | OHCI_INTR_ENDPT,
1538 UE_INTERRUPT,
1539 {8, 0}, /* max packet */
1540 255
1541 };
1542
1543 usb_hub_descriptor_t ohci_hubd = {
1544 USB_HUB_DESCRIPTOR_SIZE,
1545 UDESC_HUB,
1546 0,
1547 {0,0},
1548 0,
1549 0,
1550 {0},
1551 };
1552
1553 int
1554 ohci_str(p, l, s)
1555 usb_string_descriptor_t *p;
1556 int l;
1557 char *s;
1558 {
1559 int i;
1560
1561 if (l == 0)
1562 return (0);
1563 p->bLength = 2 * strlen(s) + 2;
1564 if (l == 1)
1565 return (1);
1566 p->bDescriptorType = UDESC_STRING;
1567 l -= 2;
1568 for (i = 0; s[i] && l > 1; i++, l -= 2)
1569 USETW2(p->bString[i], 0, s[i]);
1570 return (2*i+2);
1571 }
1572
1573 /*
1574 * Simulate a hardware hub by handling all the necessary requests.
1575 */
1576 usbd_status
1577 ohci_root_ctrl_transfer(reqh)
1578 usbd_request_handle reqh;
1579 {
1580 int s;
1581 usbd_status r;
1582
1583 s = splusb();
1584 r = usb_insert_transfer(reqh);
1585 splx(s);
1586 if (r != USBD_NORMAL_COMPLETION)
1587 return (r);
1588 else
1589 return (ohci_root_ctrl_start(reqh));
1590 }
1591
1592 usbd_status
1593 ohci_root_ctrl_start(reqh)
1594 usbd_request_handle reqh;
1595 {
1596 ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus;
1597 usb_device_request_t *req;
1598 void *buf;
1599 int port, i;
1600 int len, value, index, l, totlen = 0;
1601 usb_port_status_t ps;
1602 usb_hub_descriptor_t hubd;
1603 usbd_status r;
1604 u_int32_t v;
1605
1606 if (!reqh->isreq)
1607 /* XXX panic */
1608 return (USBD_INVAL);
1609 req = &reqh->request;
1610 buf = reqh->buffer;
1611
1612 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
1613 req->bmRequestType, req->bRequest));
1614
1615 len = UGETW(req->wLength);
1616 value = UGETW(req->wValue);
1617 index = UGETW(req->wIndex);
1618 #define C(x,y) ((x) | ((y) << 8))
1619 switch(C(req->bRequest, req->bmRequestType)) {
1620 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1621 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1622 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1623 /*
1624 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1625 * for the integrated root hub.
1626 */
1627 break;
1628 case C(UR_GET_CONFIG, UT_READ_DEVICE):
1629 if (len > 0) {
1630 *(u_int8_t *)buf = sc->sc_conf;
1631 totlen = 1;
1632 }
1633 break;
1634 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1635 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
1636 switch(value >> 8) {
1637 case UDESC_DEVICE:
1638 if ((value & 0xff) != 0) {
1639 r = USBD_IOERROR;
1640 goto ret;
1641 }
1642 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1643 USETW(ohci_devd.idVendor, sc->sc_id_vendor);
1644 memcpy(buf, &ohci_devd, l);
1645 break;
1646 case UDESC_CONFIG:
1647 if ((value & 0xff) != 0) {
1648 r = USBD_IOERROR;
1649 goto ret;
1650 }
1651 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1652 memcpy(buf, &ohci_confd, l);
1653 buf = (char *)buf + l;
1654 len -= l;
1655 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1656 totlen += l;
1657 memcpy(buf, &ohci_ifcd, l);
1658 buf = (char *)buf + l;
1659 len -= l;
1660 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1661 totlen += l;
1662 memcpy(buf, &ohci_endpd, l);
1663 break;
1664 case UDESC_STRING:
1665 if (len == 0)
1666 break;
1667 *(u_int8_t *)buf = 0;
1668 totlen = 1;
1669 switch (value & 0xff) {
1670 case 1: /* Vendor */
1671 totlen = ohci_str(buf, len, sc->sc_vendor);
1672 break;
1673 case 2: /* Product */
1674 totlen = ohci_str(buf, len, "OHCI root hub");
1675 break;
1676 }
1677 break;
1678 default:
1679 r = USBD_IOERROR;
1680 goto ret;
1681 }
1682 break;
1683 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1684 if (len > 0) {
1685 *(u_int8_t *)buf = 0;
1686 totlen = 1;
1687 }
1688 break;
1689 case C(UR_GET_STATUS, UT_READ_DEVICE):
1690 if (len > 1) {
1691 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1692 totlen = 2;
1693 }
1694 break;
1695 case C(UR_GET_STATUS, UT_READ_INTERFACE):
1696 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1697 if (len > 1) {
1698 USETW(((usb_status_t *)buf)->wStatus, 0);
1699 totlen = 2;
1700 }
1701 break;
1702 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1703 if (value >= USB_MAX_DEVICES) {
1704 r = USBD_IOERROR;
1705 goto ret;
1706 }
1707 sc->sc_addr = value;
1708 break;
1709 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1710 if (value != 0 && value != 1) {
1711 r = USBD_IOERROR;
1712 goto ret;
1713 }
1714 sc->sc_conf = value;
1715 break;
1716 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1717 break;
1718 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1719 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1720 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1721 r = USBD_IOERROR;
1722 goto ret;
1723 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1724 break;
1725 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1726 break;
1727 /* Hub requests */
1728 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1729 break;
1730 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1731 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
1732 "port=%d feature=%d\n",
1733 index, value));
1734 if (index < 1 || index > sc->sc_noport) {
1735 r = USBD_IOERROR;
1736 goto ret;
1737 }
1738 port = OHCI_RH_PORT_STATUS(index);
1739 switch(value) {
1740 case UHF_PORT_ENABLE:
1741 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
1742 break;
1743 case UHF_PORT_SUSPEND:
1744 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
1745 break;
1746 case UHF_PORT_POWER:
1747 OWRITE4(sc, port, UPS_LOW_SPEED);
1748 break;
1749 case UHF_C_PORT_CONNECTION:
1750 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
1751 break;
1752 case UHF_C_PORT_ENABLE:
1753 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
1754 break;
1755 case UHF_C_PORT_SUSPEND:
1756 OWRITE4(sc, port, UPS_C_SUSPEND << 16);
1757 break;
1758 case UHF_C_PORT_OVER_CURRENT:
1759 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
1760 break;
1761 case UHF_C_PORT_RESET:
1762 OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
1763 break;
1764 default:
1765 r = USBD_IOERROR;
1766 goto ret;
1767 }
1768 switch(value) {
1769 case UHF_C_PORT_CONNECTION:
1770 case UHF_C_PORT_ENABLE:
1771 case UHF_C_PORT_SUSPEND:
1772 case UHF_C_PORT_OVER_CURRENT:
1773 case UHF_C_PORT_RESET:
1774 /* Enable RHSC interrupt if condition is cleared. */
1775 if ((OREAD4(sc, port) >> 16) == 0)
1776 ohci_rhsc_able(sc, 1);
1777 break;
1778 default:
1779 break;
1780 }
1781 break;
1782 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1783 if (value != 0) {
1784 r = USBD_IOERROR;
1785 goto ret;
1786 }
1787 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
1788 hubd = ohci_hubd;
1789 hubd.bNbrPorts = sc->sc_noport;
1790 USETW(hubd.wHubCharacteristics,
1791 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
1792 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
1793 /* XXX overcurrent */
1794 );
1795 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
1796 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
1797 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1798 hubd.DeviceRemovable[i++] = (u_int8_t)v;
1799 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1800 l = min(len, hubd.bDescLength);
1801 totlen = l;
1802 memcpy(buf, &hubd, l);
1803 break;
1804 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1805 if (len != 4) {
1806 r = USBD_IOERROR;
1807 goto ret;
1808 }
1809 memset(buf, 0, len); /* ? XXX */
1810 totlen = len;
1811 break;
1812 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1813 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
1814 index));
1815 if (index < 1 || index > sc->sc_noport) {
1816 r = USBD_IOERROR;
1817 goto ret;
1818 }
1819 if (len != 4) {
1820 r = USBD_IOERROR;
1821 goto ret;
1822 }
1823 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
1824 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
1825 v));
1826 USETW(ps.wPortStatus, v);
1827 USETW(ps.wPortChange, v >> 16);
1828 l = min(len, sizeof ps);
1829 memcpy(buf, &ps, l);
1830 totlen = l;
1831 break;
1832 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1833 r = USBD_IOERROR;
1834 goto ret;
1835 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1836 break;
1837 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1838 if (index < 1 || index > sc->sc_noport) {
1839 r = USBD_IOERROR;
1840 goto ret;
1841 }
1842 port = OHCI_RH_PORT_STATUS(index);
1843 switch(value) {
1844 case UHF_PORT_ENABLE:
1845 OWRITE4(sc, port, UPS_PORT_ENABLED);
1846 break;
1847 case UHF_PORT_SUSPEND:
1848 OWRITE4(sc, port, UPS_SUSPEND);
1849 break;
1850 case UHF_PORT_RESET:
1851 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
1852 index));
1853 OWRITE4(sc, port, UPS_RESET);
1854 for (i = 0; i < 10; i++) {
1855 usb_delay_ms(&sc->sc_bus, 10);
1856 if ((OREAD4(sc, port) & UPS_RESET) == 0)
1857 break;
1858 }
1859 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
1860 index, OREAD4(sc, port)));
1861 break;
1862 case UHF_PORT_POWER:
1863 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
1864 "%d\n", index));
1865 OWRITE4(sc, port, UPS_PORT_POWER);
1866 break;
1867 default:
1868 r = USBD_IOERROR;
1869 goto ret;
1870 }
1871 break;
1872 default:
1873 r = USBD_IOERROR;
1874 goto ret;
1875 }
1876 reqh->actlen = totlen;
1877 r = USBD_NORMAL_COMPLETION;
1878 ret:
1879 SIMPLEQ_REMOVE_HEAD(&reqh->pipe->queue, reqh, next);
1880 reqh->status = r;
1881 reqh->xfercb(reqh);
1882 usb_start_next(reqh->pipe);
1883 return (USBD_IN_PROGRESS);
1884 }
1885
1886 /* Abort a root control request. */
1887 void
1888 ohci_root_ctrl_abort(reqh)
1889 usbd_request_handle reqh;
1890 {
1891 /* Nothing to do, all transfers are synchronous. */
1892 }
1893
1894 /* Close the root pipe. */
1895 void
1896 ohci_root_ctrl_close(pipe)
1897 usbd_pipe_handle pipe;
1898 {
1899 DPRINTF(("ohci_root_ctrl_close\n"));
1900 /* Nothing to do. */
1901 }
1902
1903 usbd_status
1904 ohci_root_intr_transfer(reqh)
1905 usbd_request_handle reqh;
1906 {
1907 int s;
1908 usbd_status r;
1909
1910 s = splusb();
1911 r = usb_insert_transfer(reqh);
1912 splx(s);
1913 if (r != USBD_NORMAL_COMPLETION)
1914 return (r);
1915 else
1916 return (ohci_root_intr_start(reqh));
1917 }
1918
1919 usbd_status
1920 ohci_root_intr_start(reqh)
1921 usbd_request_handle reqh;
1922 {
1923 usbd_pipe_handle pipe = reqh->pipe;
1924 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1925 struct ohci_pipe *upipe = (struct ohci_pipe *)pipe;
1926 usb_dma_t *dmap;
1927 usbd_status r;
1928 int len;
1929
1930 len = reqh->length;
1931 dmap = &upipe->u.intr.datadma;
1932 if (len == 0)
1933 return (USBD_INVAL); /* XXX should it be? */
1934
1935 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1936 if (r != USBD_NORMAL_COMPLETION)
1937 return (r);
1938 sc->sc_intrreqh = reqh;
1939
1940 return (USBD_IN_PROGRESS);
1941 }
1942
1943 /* Abort a root interrupt request. */
1944 void
1945 ohci_root_intr_abort(reqh)
1946 usbd_request_handle reqh;
1947 {
1948 /* No need to abort. */
1949 }
1950
1951 /* Close the root pipe. */
1952 void
1953 ohci_root_intr_close(pipe)
1954 usbd_pipe_handle pipe;
1955 {
1956 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1957
1958 DPRINTF(("ohci_root_intr_close\n"));
1959
1960 sc->sc_intrreqh = 0;
1961 }
1962
1963 /************************/
1964
1965 usbd_status
1966 ohci_device_ctrl_transfer(reqh)
1967 usbd_request_handle reqh;
1968 {
1969 int s;
1970 usbd_status r;
1971
1972 s = splusb();
1973 r = usb_insert_transfer(reqh);
1974 splx(s);
1975 if (r != USBD_NORMAL_COMPLETION)
1976 return (r);
1977 else
1978 return (ohci_device_ctrl_start(reqh));
1979 }
1980
1981 usbd_status
1982 ohci_device_ctrl_start(reqh)
1983 usbd_request_handle reqh;
1984 {
1985 ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus;
1986 usbd_status r;
1987
1988 if (!reqh->isreq) {
1989 /* XXX panic */
1990 printf("ohci_device_ctrl_transfer: not a request\n");
1991 return (USBD_INVAL);
1992 }
1993
1994 r = ohci_device_request(reqh);
1995 if (r != USBD_NORMAL_COMPLETION)
1996 return (r);
1997
1998 if (sc->sc_bus.use_polling)
1999 ohci_waitintr(sc, reqh);
2000 return (USBD_IN_PROGRESS);
2001 }
2002
2003 /* Abort a device control request. */
2004 void
2005 ohci_device_ctrl_abort(reqh)
2006 usbd_request_handle reqh;
2007 {
2008 DPRINTF(("ohci_device_ctrl_abort: reqh=%p\n", reqh));
2009 ohci_abort_request(reqh);
2010 }
2011
2012 /* Close a device control pipe. */
2013 void
2014 ohci_device_ctrl_close(pipe)
2015 usbd_pipe_handle pipe;
2016 {
2017 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2018
2019 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2020 ohci_close_pipe(pipe, sc->sc_ctrl_head);
2021 }
2022
2023 /************************/
2024
2025 void
2026 ohci_device_clear_toggle(pipe)
2027 usbd_pipe_handle pipe;
2028 {
2029 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2030
2031 opipe->sed->ed->ed_tailp &= LE(~OHCI_TOGGLECARRY);
2032 }
2033
2034 void
2035 ohci_noop(pipe)
2036 usbd_pipe_handle pipe;
2037 {
2038 }
2039
2040 usbd_status
2041 ohci_device_bulk_transfer(reqh)
2042 usbd_request_handle reqh;
2043 {
2044 int s;
2045 usbd_status r;
2046
2047 s = splusb();
2048 r = usb_insert_transfer(reqh);
2049 splx(s);
2050 if (r != USBD_NORMAL_COMPLETION)
2051 return (r);
2052 else
2053 return (ohci_device_bulk_start(reqh));
2054 }
2055
2056 usbd_status
2057 ohci_device_bulk_start(reqh)
2058 usbd_request_handle reqh;
2059 {
2060 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
2061 usbd_device_handle dev = opipe->pipe.device;
2062 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2063 int addr = dev->address;
2064 ohci_soft_td_t *xfer, *tail;
2065 ohci_soft_ed_t *sed;
2066 usb_dma_t *dmap;
2067 usbd_status r;
2068 int s, len, isread;
2069
2070 #ifdef DIAGNOSTIC
2071 if (reqh->isreq) {
2072 /* XXX panic */
2073 printf("ohci_device_bulk_start: a request\n");
2074 return (USBD_INVAL);
2075 }
2076 #endif
2077
2078 len = reqh->length;
2079 dmap = &opipe->u.bulk.datadma;
2080 isread = reqh->pipe->endpoint->edesc->bEndpointAddress & UE_IN;
2081 sed = opipe->sed;
2082
2083 DPRINTFN(4,("ohci_device_bulk_start: reqh=%p len=%d isread=%d "
2084 "flags=%d endpt=%d\n", reqh, len, isread, reqh->flags,
2085 reqh->pipe->endpoint->edesc->bEndpointAddress));
2086
2087 opipe->u.bulk.isread = isread;
2088 opipe->u.bulk.length = len;
2089
2090 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
2091 if (r != USBD_NORMAL_COMPLETION)
2092 goto ret1;
2093
2094 tail = ohci_alloc_std(sc);
2095 if (!tail) {
2096 r = USBD_NOMEM;
2097 goto ret2;
2098 }
2099 tail->reqh = 0;
2100
2101 /* Update device address */
2102 sed->ed->ed_flags = LE(
2103 (LE(sed->ed->ed_flags) & ~OHCI_ED_ADDRMASK) |
2104 OHCI_ED_SET_FA(addr));
2105
2106 /* Set up data transaction */
2107 xfer = opipe->tail;
2108 xfer->td->td_flags = LE(
2109 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
2110 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY |
2111 (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0));
2112 xfer->td->td_cbp = LE(DMAADDR(dmap));
2113 xfer->nexttd = tail;
2114 xfer->td->td_nexttd = LE(tail->physaddr);
2115 xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1);
2116 xfer->len = len;
2117 xfer->reqh = reqh;
2118 xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN;
2119 reqh->hcpriv = xfer;
2120
2121 if (!isread)
2122 memcpy(KERNADDR(dmap), reqh->buffer, len);
2123
2124 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2125 "td_cbp=0x%08x td_be=0x%08x\n",
2126 (int)LE(sed->ed->ed_flags), (int)LE(xfer->td->td_flags),
2127 (int)LE(xfer->td->td_cbp), (int)LE(xfer->td->td_be)));
2128
2129 #ifdef USB_DEBUG
2130 if (ohcidebug > 4) {
2131 ohci_dump_ed(sed);
2132 ohci_dump_tds(xfer);
2133 }
2134 #endif
2135
2136 /* Insert ED in schedule */
2137 s = splusb();
2138 ohci_hash_add_td(sc, xfer);
2139 sed->ed->ed_tailp = LE(tail->physaddr);
2140 opipe->tail = tail;
2141 sed->ed->ed_flags &= LE(~OHCI_ED_SKIP);
2142 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2143 if (reqh->timeout && !sc->sc_bus.use_polling) {
2144 usb_timeout(ohci_timeout, reqh,
2145 MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
2146 }
2147
2148 #ifdef USB_DEBUG
2149 if (ohcidebug > 5) {
2150 delay(5000);
2151 printf("ohci_device_intr_transfer: status=%x\n",
2152 OREAD4(sc, OHCI_COMMAND_STATUS));
2153 ohci_dump_ed(sed);
2154 ohci_dump_tds(xfer);
2155 }
2156 #endif
2157
2158 splx(s);
2159
2160 return (USBD_IN_PROGRESS);
2161
2162 ret2:
2163 usb_freemem(sc->sc_dmatag, dmap);
2164 ret1:
2165 return (r);
2166 }
2167
2168 void
2169 ohci_device_bulk_abort(reqh)
2170 usbd_request_handle reqh;
2171 {
2172 DPRINTF(("ohci_device_bulk_abort: reqh=%p\n", reqh));
2173 ohci_abort_request(reqh);
2174 }
2175
2176 /*
2177 * Close a device bulk pipe.
2178 */
2179 void
2180 ohci_device_bulk_close(pipe)
2181 usbd_pipe_handle pipe;
2182 {
2183 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2184
2185 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
2186 ohci_close_pipe(pipe, sc->sc_bulk_head);
2187 }
2188
2189 /************************/
2190
2191 usbd_status
2192 ohci_device_intr_transfer(reqh)
2193 usbd_request_handle reqh;
2194 {
2195 int s;
2196 usbd_status r;
2197
2198 s = splusb();
2199 r = usb_insert_transfer(reqh);
2200 splx(s);
2201 if (r != USBD_NORMAL_COMPLETION)
2202 return (r);
2203 else
2204 return (ohci_device_intr_start(reqh));
2205 }
2206
2207 usbd_status
2208 ohci_device_intr_start(reqh)
2209 usbd_request_handle reqh;
2210 {
2211 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
2212 usbd_device_handle dev = opipe->pipe.device;
2213 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2214 ohci_soft_ed_t *sed = opipe->sed;
2215 ohci_soft_td_t *xfer, *tail;
2216 usb_dma_t *dmap;
2217 usbd_status r;
2218 int len;
2219 int s;
2220
2221 DPRINTFN(3, ("ohci_device_intr_transfer: reqh=%p buf=%p len=%d "
2222 "flags=%d priv=%p\n",
2223 reqh, reqh->buffer, reqh->length, reqh->flags, reqh->priv));
2224
2225 if (reqh->isreq)
2226 panic("ohci_device_intr_transfer: a request\n");
2227
2228 len = reqh->length;
2229 dmap = &opipe->u.intr.datadma;
2230 if (len == 0)
2231 return (USBD_INVAL); /* XXX should it be? */
2232
2233 xfer = opipe->tail;
2234 tail = ohci_alloc_std(sc);
2235 if (!tail) {
2236 r = USBD_NOMEM;
2237 goto ret1;
2238 }
2239 tail->reqh = 0;
2240
2241 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
2242 if (r != USBD_NORMAL_COMPLETION)
2243 goto ret2;
2244
2245 xfer->td->td_flags = LE(
2246 OHCI_TD_IN | OHCI_TD_NOCC |
2247 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
2248 if (reqh->flags & USBD_SHORT_XFER_OK)
2249 xfer->td->td_flags |= LE(OHCI_TD_R);
2250 xfer->td->td_cbp = LE(DMAADDR(dmap));
2251 xfer->nexttd = tail;
2252 xfer->td->td_nexttd = LE(tail->physaddr);
2253 xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1);
2254 xfer->len = len;
2255 xfer->reqh = reqh;
2256 xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN;
2257 reqh->hcpriv = xfer;
2258
2259 #if USB_DEBUG
2260 if (ohcidebug > 5) {
2261 printf("ohci_device_intr_transfer:\n");
2262 ohci_dump_ed(sed);
2263 ohci_dump_tds(xfer);
2264 }
2265 #endif
2266
2267 /* Insert ED in schedule */
2268 s = splusb();
2269 ohci_hash_add_td(sc, xfer);
2270 sed->ed->ed_tailp = LE(tail->physaddr);
2271 opipe->tail = tail;
2272 #if 0
2273 if (reqh->timeout && !sc->sc_bus.use_polling) {
2274 usb_timeout(ohci_timeout, reqh,
2275 MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
2276 }
2277 #endif
2278 sed->ed->ed_flags &= LE(~OHCI_ED_SKIP);
2279
2280 #ifdef USB_DEBUG
2281 if (ohcidebug > 5) {
2282 delay(5000);
2283 printf("ohci_device_intr_transfer: status=%x\n",
2284 OREAD4(sc, OHCI_COMMAND_STATUS));
2285 ohci_dump_ed(sed);
2286 ohci_dump_tds(xfer);
2287 }
2288 #endif
2289 splx(s);
2290
2291 return (USBD_IN_PROGRESS);
2292
2293 ret2:
2294 ohci_free_std(sc, xfer);
2295 ret1:
2296 return (r);
2297 }
2298
2299 /* Abort a device control request. */
2300 void
2301 ohci_device_intr_abort(reqh)
2302 usbd_request_handle reqh;
2303 {
2304 if (reqh->pipe->intrreqh == reqh) {
2305 DPRINTF(("ohci_device_intr_abort: remove\n"));
2306 reqh->pipe->intrreqh = 0;
2307 }
2308 ohci_abort_request(reqh);
2309 }
2310
2311 /* Close a device interrupt pipe. */
2312 void
2313 ohci_device_intr_close(pipe)
2314 usbd_pipe_handle pipe;
2315 {
2316 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2317 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2318 int nslots = opipe->u.intr.nslots;
2319 int pos = opipe->u.intr.pos;
2320 int j;
2321 ohci_soft_ed_t *p, *sed = opipe->sed;
2322 int s;
2323
2324 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
2325 pipe, nslots, pos));
2326 s = splusb();
2327 sed->ed->ed_flags |= LE(OHCI_ED_SKIP);
2328 if ((sed->ed->ed_tailp & LE(OHCI_TAILMASK)) !=
2329 (sed->ed->ed_headp & LE(OHCI_TAILMASK)))
2330 usb_delay_ms(&sc->sc_bus, 2);
2331
2332 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
2333 ;
2334 if (!p)
2335 panic("ohci_device_intr_close: ED not found\n");
2336 p->next = sed->next;
2337 p->ed->ed_nexted = sed->ed->ed_nexted;
2338 splx(s);
2339
2340 for (j = 0; j < nslots; j++)
2341 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
2342
2343 ohci_free_std(sc, opipe->tail);
2344 ohci_free_sed(sc, opipe->sed);
2345 }
2346
2347 usbd_status
2348 ohci_device_setintr(sc, opipe, ival)
2349 ohci_softc_t *sc;
2350 struct ohci_pipe *opipe;
2351 int ival;
2352 {
2353 int i, j, s, best;
2354 u_int npoll, slow, shigh, nslots;
2355 u_int bestbw, bw;
2356 ohci_soft_ed_t *hsed, *sed = opipe->sed;
2357
2358 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
2359 if (ival == 0) {
2360 printf("ohci_setintr: 0 interval\n");
2361 return (USBD_INVAL);
2362 }
2363
2364 npoll = OHCI_NO_INTRS;
2365 while (npoll > ival)
2366 npoll /= 2;
2367 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
2368
2369 /*
2370 * We now know which level in the tree the ED must go into.
2371 * Figure out which slot has most bandwidth left over.
2372 * Slots to examine:
2373 * npoll
2374 * 1 0
2375 * 2 1 2
2376 * 4 3 4 5 6
2377 * 8 7 8 9 10 11 12 13 14
2378 * N (N-1) .. (N-1+N-1)
2379 */
2380 slow = npoll-1;
2381 shigh = slow + npoll;
2382 nslots = OHCI_NO_INTRS / npoll;
2383 for (best = i = slow, bestbw = ~0; i < shigh; i++) {
2384 bw = 0;
2385 for (j = 0; j < nslots; j++)
2386 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
2387 if (bw < bestbw) {
2388 best = i;
2389 bestbw = bw;
2390 }
2391 }
2392 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
2393 best, slow, shigh, bestbw));
2394
2395 s = splusb();
2396 hsed = sc->sc_eds[best];
2397 sed->next = hsed->next;
2398 sed->ed->ed_nexted = hsed->ed->ed_nexted;
2399 hsed->next = sed;
2400 hsed->ed->ed_nexted = LE(sed->physaddr);
2401 splx(s);
2402
2403 for (j = 0; j < nslots; j++)
2404 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
2405 opipe->u.intr.nslots = nslots;
2406 opipe->u.intr.pos = best;
2407
2408 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
2409 return (USBD_NORMAL_COMPLETION);
2410 }
2411
2412