ohci.c revision 1.38 1 /* $NetBSD: ohci.c,v 1.38 1999/08/22 20:12:39 augustss Exp $ */
2
3 /*
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Lennart Augustsson (augustss (at) carlstedt.se) at
9 * Carlstedt Research & Technology.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * USB Open Host Controller driver.
42 *
43 * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe
44 * USB spec: http://www.usb.org/developers/data/usb11.pdf
45 */
46
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/kernel.h>
50 #include <sys/malloc.h>
51 #if defined(__NetBSD__) || defined(__OpenBSD__)
52 #include <sys/device.h>
53 #elif defined(__FreeBSD__)
54 #include <sys/module.h>
55 #include <sys/bus.h>
56 #endif
57 #include <sys/proc.h>
58 #include <sys/queue.h>
59 #include <sys/select.h>
60
61 #include <machine/bus.h>
62 #include <machine/endian.h>
63
64 #include <dev/usb/usb.h>
65 #include <dev/usb/usbdi.h>
66 #include <dev/usb/usbdivar.h>
67 #include <dev/usb/usb_mem.h>
68 #include <dev/usb/usb_quirks.h>
69
70 #include <dev/usb/ohcireg.h>
71 #include <dev/usb/ohcivar.h>
72
73 #if defined(__FreeBSD__)
74 #include <machine/clock.h>
75
76 #define delay(d) DELAY(d)
77
78 #endif
79
80 #if defined(__OpenBSD__)
81 struct cfdriver ohci_cd = {
82 NULL, "ohci", DV_DULL
83 };
84 #endif
85
86 /*
87 * The OHCI controller is little endian, so on big endian machines
88 * the data strored in memory needs to be swapped.
89 */
90 #if BYTE_ORDER == BIG_ENDIAN
91 #define LE(x) (bswap32(x))
92 #else
93 #define LE(x) (x)
94 #endif
95
96 struct ohci_pipe;
97
98 ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *));
99 void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *));
100
101 ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *));
102 void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *));
103
104 void ohci_power __P((int, void *));
105 usbd_status ohci_open __P((usbd_pipe_handle));
106 void ohci_poll __P((struct usbd_bus *));
107 void ohci_waitintr __P((ohci_softc_t *, usbd_request_handle));
108 void ohci_rhsc __P((ohci_softc_t *, usbd_request_handle));
109 void ohci_process_done __P((ohci_softc_t *, ohci_physaddr_t));
110
111 usbd_status ohci_device_request __P((usbd_request_handle reqh));
112 void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
113 void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
114 void ohci_hash_add_td __P((ohci_softc_t *, ohci_soft_td_t *));
115 void ohci_hash_rem_td __P((ohci_softc_t *, ohci_soft_td_t *));
116 ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, ohci_physaddr_t));
117
118 usbd_status ohci_root_ctrl_transfer __P((usbd_request_handle));
119 usbd_status ohci_root_ctrl_start __P((usbd_request_handle));
120 void ohci_root_ctrl_abort __P((usbd_request_handle));
121 void ohci_root_ctrl_close __P((usbd_pipe_handle));
122
123 usbd_status ohci_root_intr_transfer __P((usbd_request_handle));
124 usbd_status ohci_root_intr_start __P((usbd_request_handle));
125 void ohci_root_intr_abort __P((usbd_request_handle));
126 void ohci_root_intr_close __P((usbd_pipe_handle));
127 void ohci_root_intr_done __P((usbd_request_handle));
128
129 usbd_status ohci_device_ctrl_transfer __P((usbd_request_handle));
130 usbd_status ohci_device_ctrl_start __P((usbd_request_handle));
131 void ohci_device_ctrl_abort __P((usbd_request_handle));
132 void ohci_device_ctrl_close __P((usbd_pipe_handle));
133 void ohci_device_ctrl_done __P((usbd_request_handle));
134
135 usbd_status ohci_device_bulk_transfer __P((usbd_request_handle));
136 usbd_status ohci_device_bulk_start __P((usbd_request_handle));
137 void ohci_device_bulk_abort __P((usbd_request_handle));
138 void ohci_device_bulk_close __P((usbd_pipe_handle));
139 void ohci_device_bulk_done __P((usbd_request_handle));
140
141 usbd_status ohci_device_intr_transfer __P((usbd_request_handle));
142 usbd_status ohci_device_intr_start __P((usbd_request_handle));
143 void ohci_device_intr_abort __P((usbd_request_handle));
144 void ohci_device_intr_close __P((usbd_pipe_handle));
145 void ohci_device_intr_done __P((usbd_request_handle));
146
147 usbd_status ohci_device_setintr __P((ohci_softc_t *sc,
148 struct ohci_pipe *pipe, int ival));
149
150 int ohci_str __P((usb_string_descriptor_t *, int, char *));
151
152 void ohci_timeout __P((void *));
153 void ohci_rhsc_able __P((ohci_softc_t *, int));
154
155 void ohci_close_pipe __P((usbd_pipe_handle pipe,
156 ohci_soft_ed_t *head));
157 void ohci_abort_req __P((usbd_request_handle reqh,
158 usbd_status status));
159 void ohci_abort_req_end __P((void *));
160
161 void ohci_device_clear_toggle __P((usbd_pipe_handle pipe));
162 void ohci_noop __P((usbd_pipe_handle pipe));
163
164 #ifdef USB_DEBUG
165 ohci_softc_t *thesc;
166 void ohci_dumpregs __P((ohci_softc_t *));
167 void ohci_dump_tds __P((ohci_soft_td_t *));
168 void ohci_dump_td __P((ohci_soft_td_t *));
169 void ohci_dump_ed __P((ohci_soft_ed_t *));
170 #endif
171
172 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
173 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
174 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
175
176 /* Reverse the bits in a value 0 .. 31 */
177 static u_int8_t revbits[OHCI_NO_INTRS] =
178 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
179 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
180 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
181 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
182
183 struct ohci_pipe {
184 struct usbd_pipe pipe;
185 ohci_soft_ed_t *sed;
186 ohci_soft_td_t *tail;
187 /* Info needed for different pipe kinds. */
188 union {
189 /* Control pipe */
190 struct {
191 usb_dma_t datadma;
192 usb_dma_t reqdma;
193 u_int length;
194 ohci_soft_td_t *setup, *xfer, *stat;
195 } ctl;
196 /* Interrupt pipe */
197 struct {
198 usb_dma_t datadma;
199 int nslots;
200 int pos;
201 } intr;
202 /* Bulk pipe */
203 struct {
204 usb_dma_t datadma;
205 u_int length;
206 int isread;
207 } bulk;
208 } u;
209 };
210
211 #define OHCI_INTR_ENDPT 1
212
213 struct usbd_methods ohci_root_ctrl_methods = {
214 ohci_root_ctrl_transfer,
215 ohci_root_ctrl_start,
216 ohci_root_ctrl_abort,
217 ohci_root_ctrl_close,
218 ohci_noop,
219 0,
220 0,
221 };
222
223 struct usbd_methods ohci_root_intr_methods = {
224 ohci_root_intr_transfer,
225 ohci_root_intr_start,
226 ohci_root_intr_abort,
227 ohci_root_intr_close,
228 ohci_noop,
229 ohci_root_intr_done,
230 0,
231 };
232
233 struct usbd_methods ohci_device_ctrl_methods = {
234 ohci_device_ctrl_transfer,
235 ohci_device_ctrl_start,
236 ohci_device_ctrl_abort,
237 ohci_device_ctrl_close,
238 ohci_noop,
239 ohci_device_ctrl_done,
240 0,
241 };
242
243 struct usbd_methods ohci_device_intr_methods = {
244 ohci_device_intr_transfer,
245 ohci_device_intr_start,
246 ohci_device_intr_abort,
247 ohci_device_intr_close,
248 ohci_device_clear_toggle,
249 ohci_device_intr_done,
250 0,
251 };
252
253 struct usbd_methods ohci_device_bulk_methods = {
254 ohci_device_bulk_transfer,
255 ohci_device_bulk_start,
256 ohci_device_bulk_abort,
257 ohci_device_bulk_close,
258 ohci_device_clear_toggle,
259 ohci_device_bulk_done,
260 0,
261 };
262
263 ohci_soft_ed_t *
264 ohci_alloc_sed(sc)
265 ohci_softc_t *sc;
266 {
267 ohci_soft_ed_t *sed;
268 usbd_status r;
269 int i, offs;
270 usb_dma_t dma;
271
272 if (!sc->sc_freeeds) {
273 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
274 sed = malloc(sizeof(ohci_soft_ed_t) * OHCI_ED_CHUNK,
275 M_USBHC, M_NOWAIT);
276 if (!sed)
277 return 0;
278 r = usb_allocmem(sc->sc_dmatag, OHCI_ED_SIZE * OHCI_ED_CHUNK,
279 OHCI_ED_ALIGN, &dma);
280 if (r != USBD_NORMAL_COMPLETION) {
281 free(sed, M_USBHC);
282 return 0;
283 }
284 for(i = 0; i < OHCI_ED_CHUNK; i++, sed++) {
285 offs = i * OHCI_ED_SIZE;
286 sed->physaddr = DMAADDR(&dma) + offs;
287 sed->ed = (ohci_ed_t *)
288 ((char *)KERNADDR(&dma) + offs);
289 sed->next = sc->sc_freeeds;
290 sc->sc_freeeds = sed;
291 }
292 }
293 sed = sc->sc_freeeds;
294 sc->sc_freeeds = sed->next;
295 memset(sed->ed, 0, OHCI_ED_SIZE);
296 sed->next = 0;
297 return sed;
298 }
299
300 void
301 ohci_free_sed(sc, sed)
302 ohci_softc_t *sc;
303 ohci_soft_ed_t *sed;
304 {
305 sed->next = sc->sc_freeeds;
306 sc->sc_freeeds = sed;
307 }
308
309 ohci_soft_td_t *
310 ohci_alloc_std(sc)
311 ohci_softc_t *sc;
312 {
313 ohci_soft_td_t *std;
314 usbd_status r;
315 int i, offs;
316 usb_dma_t dma;
317
318 if (!sc->sc_freetds) {
319 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
320 std = malloc(sizeof(ohci_soft_td_t) * OHCI_TD_CHUNK,
321 M_USBHC, M_NOWAIT);
322 if (!std)
323 return 0;
324 r = usb_allocmem(sc->sc_dmatag, OHCI_TD_SIZE * OHCI_TD_CHUNK,
325 OHCI_TD_ALIGN, &dma);
326 if (r != USBD_NORMAL_COMPLETION) {
327 free(std, M_USBHC);
328 return 0;
329 }
330 for(i = 0; i < OHCI_TD_CHUNK; i++, std++) {
331 offs = i * OHCI_TD_SIZE;
332 std->physaddr = DMAADDR(&dma) + offs;
333 std->td = (ohci_td_t *)
334 ((char *)KERNADDR(&dma) + offs);
335 std->nexttd = sc->sc_freetds;
336 sc->sc_freetds = std;
337 }
338 }
339 std = sc->sc_freetds;
340 sc->sc_freetds = std->nexttd;
341 memset(std->td, 0, OHCI_TD_SIZE);
342 std->nexttd = 0;
343 return (std);
344 }
345
346 void
347 ohci_free_std(sc, std)
348 ohci_softc_t *sc;
349 ohci_soft_td_t *std;
350 {
351 std->nexttd = sc->sc_freetds;
352 sc->sc_freetds = std;
353 }
354
355 usbd_status
356 ohci_init(sc)
357 ohci_softc_t *sc;
358 {
359 ohci_soft_ed_t *sed, *psed;
360 usbd_status r;
361 int rev;
362 int i;
363 u_int32_t s, ctl, ival, hcr, fm, per;
364
365 DPRINTF(("ohci_init: start\n"));
366 rev = OREAD4(sc, OHCI_REVISION);
367 #if defined(__OpenBSD__)
368 printf(", OHCI version %d.%d%s\n",
369 #else
370 printf("%s: OHCI version %d.%d%s\n", USBDEVNAME(sc->sc_bus.bdev),
371 #endif
372 OHCI_REV_HI(rev), OHCI_REV_LO(rev),
373 OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
374 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
375 printf("%s: unsupported OHCI revision\n",
376 USBDEVNAME(sc->sc_bus.bdev));
377 return (USBD_INVAL);
378 }
379
380 for (i = 0; i < OHCI_HASH_SIZE; i++)
381 LIST_INIT(&sc->sc_hash_tds[i]);
382
383 /* Allocate the HCCA area. */
384 r = usb_allocmem(sc->sc_dmatag, OHCI_HCCA_SIZE,
385 OHCI_HCCA_ALIGN, &sc->sc_hccadma);
386 if (r != USBD_NORMAL_COMPLETION)
387 return (r);
388 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma);
389 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
390
391 sc->sc_eintrs = OHCI_NORMAL_INTRS;
392
393 sc->sc_ctrl_head = ohci_alloc_sed(sc);
394 if (!sc->sc_ctrl_head) {
395 r = USBD_NOMEM;
396 goto bad1;
397 }
398 sc->sc_ctrl_head->ed->ed_flags |= LE(OHCI_ED_SKIP);
399
400 sc->sc_bulk_head = ohci_alloc_sed(sc);
401 if (!sc->sc_bulk_head) {
402 r = USBD_NOMEM;
403 goto bad2;
404 }
405 sc->sc_bulk_head->ed->ed_flags |= LE(OHCI_ED_SKIP);
406
407 /* Allocate all the dummy EDs that make up the interrupt tree. */
408 for (i = 0; i < OHCI_NO_EDS; i++) {
409 sed = ohci_alloc_sed(sc);
410 if (!sed) {
411 while (--i >= 0)
412 ohci_free_sed(sc, sc->sc_eds[i]);
413 r = USBD_NOMEM;
414 goto bad3;
415 }
416 /* All ED fields are set to 0. */
417 sc->sc_eds[i] = sed;
418 sed->ed->ed_flags |= LE(OHCI_ED_SKIP);
419 if (i != 0) {
420 psed = sc->sc_eds[(i-1) / 2];
421 sed->next = psed;
422 sed->ed->ed_nexted = LE(psed->physaddr);
423 }
424 }
425 /*
426 * Fill HCCA interrupt table. The bit reversal is to get
427 * the tree set up properly to spread the interrupts.
428 */
429 for (i = 0; i < OHCI_NO_INTRS; i++)
430 sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
431 LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
432
433 /* Determine in what context we are running. */
434 ctl = OREAD4(sc, OHCI_CONTROL);
435 if (ctl & OHCI_IR) {
436 /* SMM active, request change */
437 DPRINTF(("ohci_init: SMM active, request owner change\n"));
438 s = OREAD4(sc, OHCI_COMMAND_STATUS);
439 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
440 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
441 delay(1000);
442 ctl = OREAD4(sc, OHCI_CONTROL);
443 }
444 if ((ctl & OHCI_IR) == 0) {
445 printf("%s: SMM does not respond, resetting\n",
446 USBDEVNAME(sc->sc_bus.bdev));
447 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
448 goto reset;
449 }
450 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
451 /* BIOS started controller. */
452 DPRINTF(("ohci_init: BIOS active\n"));
453 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
454 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
455 delay(USB_RESUME_DELAY * 1000);
456 }
457 } else {
458 DPRINTF(("ohci_init: cold started\n"));
459 reset:
460 /* Controller was cold started. */
461 delay(USB_BUS_RESET_DELAY * 1000);
462 }
463
464 /*
465 * This reset should not be necessary according to the OHCI spec, but
466 * without it some controllers do not start.
467 */
468 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
469 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
470 delay(USB_BUS_RESET_DELAY * 1000);
471
472 /* We now own the host controller and the bus has been reset. */
473 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
474
475 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
476 /* Nominal time for a reset is 10 us. */
477 for (i = 0; i < 10; i++) {
478 delay(10);
479 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
480 if (!hcr)
481 break;
482 }
483 if (hcr) {
484 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
485 r = USBD_IOERROR;
486 goto bad3;
487 }
488 #ifdef USB_DEBUG
489 thesc = sc;
490 if (ohcidebug > 15)
491 ohci_dumpregs(sc);
492 #endif
493
494 /* The controller is now in suspend state, we have 2ms to finish. */
495
496 /* Set up HC registers. */
497 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma));
498 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
499 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
500 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
501 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
502 ctl = OREAD4(sc, OHCI_CONTROL);
503 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
504 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
505 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
506 /* And finally start it! */
507 OWRITE4(sc, OHCI_CONTROL, ctl);
508
509 /*
510 * The controller is now OPERATIONAL. Set a some final
511 * registers that should be set earlier, but that the
512 * controller ignores when in the SUSPEND state.
513 */
514 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
515 fm |= OHCI_FSMPS(ival) | ival;
516 OWRITE4(sc, OHCI_FM_INTERVAL, fm);
517 per = OHCI_PERIODIC(ival); /* 90% periodic */
518 OWRITE4(sc, OHCI_PERIODIC_START, per);
519
520 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
521
522 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
523
524 #ifdef USB_DEBUG
525 if (ohcidebug > 5)
526 ohci_dumpregs(sc);
527 #endif
528
529 /* Set up the bus struct. */
530 sc->sc_bus.open_pipe = ohci_open;
531 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
532 sc->sc_bus.do_poll = ohci_poll;
533
534 powerhook_establish(ohci_power, sc);
535
536 return (USBD_NORMAL_COMPLETION);
537
538 bad3:
539 ohci_free_sed(sc, sc->sc_ctrl_head);
540 bad2:
541 ohci_free_sed(sc, sc->sc_bulk_head);
542 bad1:
543 usb_freemem(sc->sc_dmatag, &sc->sc_hccadma);
544 return (r);
545 }
546
547 #if !defined(__OpenBSD__)
548 void
549 ohci_power(why, v)
550 int why;
551 void *v;
552 {
553 #ifdef USB_DEBUG
554 ohci_softc_t *sc = v;
555
556 printf("ohci_power: sc=%p, why=%d\n", sc, why);
557 /* XXX should suspend/resume */
558 ohci_dumpregs(sc);
559 #endif
560 }
561 #endif /* !defined(__OpenBSD__) */
562
563 #ifdef USB_DEBUG
564 void ohcidump(void);
565 void ohcidump(void) { ohci_dumpregs(thesc); }
566
567 void
568 ohci_dumpregs(sc)
569 ohci_softc_t *sc;
570 {
571 printf("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
572 OREAD4(sc, OHCI_REVISION),
573 OREAD4(sc, OHCI_CONTROL),
574 OREAD4(sc, OHCI_COMMAND_STATUS));
575 printf(" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
576 OREAD4(sc, OHCI_INTERRUPT_STATUS),
577 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
578 OREAD4(sc, OHCI_INTERRUPT_DISABLE));
579 printf(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
580 OREAD4(sc, OHCI_HCCA),
581 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
582 OREAD4(sc, OHCI_CONTROL_HEAD_ED));
583 printf(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
584 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
585 OREAD4(sc, OHCI_BULK_HEAD_ED),
586 OREAD4(sc, OHCI_BULK_CURRENT_ED));
587 printf(" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
588 OREAD4(sc, OHCI_DONE_HEAD),
589 OREAD4(sc, OHCI_FM_INTERVAL),
590 OREAD4(sc, OHCI_FM_REMAINING));
591 printf(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
592 OREAD4(sc, OHCI_FM_NUMBER),
593 OREAD4(sc, OHCI_PERIODIC_START),
594 OREAD4(sc, OHCI_LS_THRESHOLD));
595 printf(" desca=0x%08x descb=0x%08x stat=0x%08x\n",
596 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
597 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
598 OREAD4(sc, OHCI_RH_STATUS));
599 printf(" port1=0x%08x port2=0x%08x\n",
600 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
601 OREAD4(sc, OHCI_RH_PORT_STATUS(2)));
602 printf(" HCCA: frame_number=0x%04x done_head=0x%08x\n",
603 LE(sc->sc_hcca->hcca_frame_number),
604 LE(sc->sc_hcca->hcca_done_head));
605 }
606 #endif
607
608 int
609 ohci_intr(p)
610 void *p;
611 {
612 ohci_softc_t *sc = p;
613 u_int32_t intrs, eintrs;
614 ohci_physaddr_t done;
615
616 /* In case the interrupt occurs before initialization has completed. */
617 if (sc == NULL || sc->sc_hcca == NULL) {
618 #ifdef DIAGNOSTIC
619 printf("ohci_intr: sc->sc_hcca == NULL\n");
620 #endif
621 return (0);
622 }
623
624 intrs = 0;
625 done = LE(sc->sc_hcca->hcca_done_head);
626 if (done != 0) {
627 sc->sc_hcca->hcca_done_head = 0;
628 if (done & ~OHCI_DONE_INTRS)
629 intrs = OHCI_WDH;
630 if (done & OHCI_DONE_INTRS)
631 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
632 } else
633 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
634 if (!intrs)
635 return (0);
636 intrs &= ~OHCI_MIE;
637 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
638 eintrs = intrs & sc->sc_eintrs;
639 if (!eintrs)
640 return (0);
641
642 sc->sc_intrs++;
643 DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n",
644 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
645 (u_int)eintrs));
646
647 if (eintrs & OHCI_SO) {
648 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev));
649 /* XXX do what */
650 intrs &= ~OHCI_SO;
651 }
652 if (eintrs & OHCI_WDH) {
653 ohci_process_done(sc, done &~ OHCI_DONE_INTRS);
654 intrs &= ~OHCI_WDH;
655 }
656 if (eintrs & OHCI_RD) {
657 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
658 /* XXX process resume detect */
659 }
660 if (eintrs & OHCI_UE) {
661 printf("%s: unrecoverable error, controller halted\n",
662 USBDEVNAME(sc->sc_bus.bdev));
663 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
664 /* XXX what else */
665 }
666 if (eintrs & OHCI_RHSC) {
667 ohci_rhsc(sc, sc->sc_intrreqh);
668 intrs &= ~OHCI_RHSC;
669
670 /*
671 * Disable RHSC interrupt for now, because it will be
672 * on until the port has been reset.
673 */
674 ohci_rhsc_able(sc, 0);
675 }
676
677 /* Block unprocessed interrupts. XXX */
678 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs);
679 sc->sc_eintrs &= ~intrs;
680
681 return (1);
682 }
683
684 void
685 ohci_rhsc_able(sc, on)
686 ohci_softc_t *sc;
687 int on;
688 {
689 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
690 if (on) {
691 sc->sc_eintrs |= OHCI_RHSC;
692 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
693 } else {
694 sc->sc_eintrs &= ~OHCI_RHSC;
695 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
696 }
697 }
698
699 #ifdef USB_DEBUG
700 char *ohci_cc_strs[] = {
701 "NO_ERROR",
702 "CRC",
703 "BIT_STUFFING",
704 "DATA_TOGGLE_MISMATCH",
705 "STALL",
706 "DEVICE_NOT_RESPONDING",
707 "PID_CHECK_FAILURE",
708 "UNEXPECTED_PID",
709 "DATA_OVERRUN",
710 "DATA_UNDERRUN",
711 "BUFFER_OVERRUN",
712 "BUFFER_UNDERRUN",
713 "NOT_ACCESSED",
714 };
715 #endif
716
717 void
718 ohci_process_done(sc, done)
719 ohci_softc_t *sc;
720 ohci_physaddr_t done;
721 {
722 ohci_soft_td_t *std, *sdone;
723 usbd_request_handle reqh;
724 int len, cc;
725
726 DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done));
727
728 /* Reverse the done list. */
729 for (sdone = 0; done; done = LE(std->td->td_nexttd)) {
730 std = ohci_hash_find_td(sc, done);
731 std->dnext = sdone;
732 sdone = std;
733 }
734
735 #ifdef USB_DEBUG
736 if (ohcidebug > 10) {
737 printf("ohci_process_done: TD done:\n");
738 ohci_dump_tds(sdone);
739 }
740 #endif
741
742 for (std = sdone; std; std = std->dnext) {
743 reqh = std->reqh;
744 DPRINTFN(10, ("ohci_process_done: std=%p reqh=%p hcpriv=%p\n",
745 std, reqh, reqh->hcpriv));
746 cc = OHCI_TD_GET_CC(LE(std->td->td_flags));
747 usb_untimeout(ohci_timeout, reqh, reqh->timo_handle);
748 if (reqh->status == USBD_CANCELLED ||
749 reqh->status == USBD_TIMEOUT) {
750 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
751 reqh));
752 /* Handled by abort routine. */
753 continue;
754 } else if (cc == OHCI_CC_NO_ERROR) {
755 len = std->len;
756 if (std->td->td_cbp != 0)
757 len -= LE(std->td->td_be) -
758 LE(std->td->td_cbp) + 1;
759 if (std->flags & OHCI_SET_LEN)
760 reqh->actlen = len;
761 if (std->flags & OHCI_CALL_DONE) {
762 reqh->status = USBD_NORMAL_COMPLETION;
763 usb_transfer_complete(reqh);
764 }
765 } else {
766 ohci_soft_td_t *p, *n;
767 struct ohci_pipe *opipe =
768 (struct ohci_pipe *)reqh->pipe;
769 DPRINTFN(-1,("ohci_process_done: error cc=%d (%s)\n",
770 OHCI_TD_GET_CC(LE(std->td->td_flags)),
771 ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td->td_flags))]));
772 /*
773 * Endpoint is halted. First unlink all the TDs
774 * belonging to the failed transfer, and then restart
775 * the endpoint.
776 */
777 for (p = std->nexttd; p->reqh == reqh; p = n) {
778 n = p->nexttd;
779 ohci_hash_rem_td(sc, p);
780 ohci_free_std(sc, p);
781 }
782 /* clear halt */
783 opipe->sed->ed->ed_headp = LE(p->physaddr);
784 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
785
786 if (cc == OHCI_CC_STALL)
787 reqh->status = USBD_STALLED;
788 else
789 reqh->status = USBD_IOERROR;
790 usb_transfer_complete(reqh);
791 }
792 ohci_hash_rem_td(sc, std);
793 ohci_free_std(sc, std);
794 }
795 }
796
797 void
798 ohci_device_ctrl_done(reqh)
799 usbd_request_handle reqh;
800 {
801 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
802 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
803 u_int len = opipe->u.ctl.length;
804 usb_dma_t *dma;
805
806 DPRINTFN(10,("ohci_ctrl_done: reqh=%p\n", reqh));
807
808 #ifdef DIAGNOSTIC
809 if (!reqh->isreq) {
810 panic("ohci_ctrl_done: not a request\n");
811 }
812 #endif
813 reqh->hcpriv = 0;
814
815 if (len != 0) {
816 dma = &opipe->u.ctl.datadma;
817 if (reqh->request.bmRequestType & UT_READ)
818 memcpy(reqh->buffer, KERNADDR(dma), len);
819 usb_freemem(sc->sc_dmatag, dma);
820 }
821 }
822
823 void
824 ohci_device_intr_done(reqh)
825 usbd_request_handle reqh;
826 {
827 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
828 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
829 usb_dma_t *dma;
830 ohci_soft_ed_t *sed = opipe->sed;
831 ohci_soft_td_t *xfer, *tail;
832
833
834 DPRINTFN(10,("ohci_intr_done: reqh=%p, actlen=%d\n",
835 reqh, reqh->actlen));
836
837 reqh->hcpriv = 0;
838
839 dma = &opipe->u.intr.datadma;
840 memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen);
841
842 if (reqh->pipe->repeat) {
843 xfer = opipe->tail;
844 tail = ohci_alloc_std(sc); /* XXX should reuse TD */
845 if (!tail) {
846 reqh->status = USBD_NOMEM;
847 return;
848 }
849 tail->reqh = 0;
850
851 xfer->td->td_flags = LE(
852 OHCI_TD_IN | OHCI_TD_NOCC |
853 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
854 if (reqh->flags & USBD_SHORT_XFER_OK)
855 xfer->td->td_flags |= LE(OHCI_TD_R);
856 xfer->td->td_cbp = LE(DMAADDR(dma));
857 xfer->nexttd = tail;
858 xfer->td->td_nexttd = LE(tail->physaddr);
859 xfer->td->td_be = LE(LE(xfer->td->td_cbp) + reqh->length - 1);
860 xfer->len = reqh->length;
861 xfer->reqh = reqh;
862 xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN;
863 reqh->hcpriv = xfer;
864
865 ohci_hash_add_td(sc, xfer);
866 sed->ed->ed_tailp = LE(tail->physaddr);
867 opipe->tail = tail;
868 } else {
869 usb_freemem(sc->sc_dmatag, dma);
870 }
871 }
872
873 void
874 ohci_device_bulk_done(reqh)
875 usbd_request_handle reqh;
876 {
877 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
878 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
879 u_int len = opipe->u.bulk.length;
880 usb_dma_t *dma;
881
882 DPRINTFN(10,("ohci_bulk_done: reqh=%p, actlen=%d\n",
883 reqh, reqh->actlen));
884
885 reqh->hcpriv = 0;
886
887 dma = &opipe->u.bulk.datadma;
888 if (opipe->u.bulk.isread)
889 memcpy(reqh->buffer, KERNADDR(dma), len);
890 usb_freemem(sc->sc_dmatag, dma);
891 }
892
893 void
894 ohci_rhsc(sc, reqh)
895 ohci_softc_t *sc;
896 usbd_request_handle reqh;
897 {
898 usbd_pipe_handle pipe;
899 struct ohci_pipe *opipe;
900 u_char *p;
901 int i, m;
902 int hstatus;
903
904 hstatus = OREAD4(sc, OHCI_RH_STATUS);
905 DPRINTF(("ohci_rhsc: sc=%p reqh=%p hstatus=0x%08x\n",
906 sc, reqh, hstatus));
907
908 if (reqh == 0) {
909 /* Just ignore the change. */
910 return;
911 }
912
913 pipe = reqh->pipe;
914 opipe = (struct ohci_pipe *)pipe;
915
916 p = KERNADDR(&opipe->u.intr.datadma);
917 m = min(sc->sc_noport, reqh->length * 8 - 1);
918 memset(p, 0, reqh->length);
919 for (i = 1; i <= m; i++) {
920 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
921 p[i/8] |= 1 << (i%8);
922 }
923 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
924 reqh->actlen = reqh->length;
925 reqh->status = USBD_NORMAL_COMPLETION;
926
927 usb_transfer_complete(reqh);
928 }
929
930 void
931 ohci_root_intr_done(reqh)
932 usbd_request_handle reqh;
933 {
934 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
935 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
936
937 reqh->hcpriv = 0;
938
939 if (!reqh->pipe->repeat)
940 usb_freemem(sc->sc_dmatag, &opipe->u.intr.datadma);
941 }
942
943 /*
944 * Wait here until controller claims to have an interrupt.
945 * Then call ohci_intr and return. Use timeout to avoid waiting
946 * too long.
947 */
948 void
949 ohci_waitintr(sc, reqh)
950 ohci_softc_t *sc;
951 usbd_request_handle reqh;
952 {
953 int timo = reqh->timeout;
954 int usecs;
955 u_int32_t intrs;
956
957 reqh->status = USBD_IN_PROGRESS;
958 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
959 usb_delay_ms(&sc->sc_bus, 1);
960 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
961 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
962 #ifdef USB_DEBUG
963 if (ohcidebug > 15)
964 ohci_dumpregs(sc);
965 #endif
966 if (intrs) {
967 ohci_intr(sc);
968 if (reqh->status != USBD_IN_PROGRESS)
969 return;
970 }
971 }
972
973 /* Timeout */
974 DPRINTF(("ohci_waitintr: timeout\n"));
975 reqh->status = USBD_TIMEOUT;
976 usb_transfer_complete(reqh);
977 /* XXX should free TD */
978 }
979
980 void
981 ohci_poll(bus)
982 struct usbd_bus *bus;
983 {
984 ohci_softc_t *sc = (ohci_softc_t *)bus;
985
986 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
987 ohci_intr(sc);
988 }
989
990 usbd_status
991 ohci_device_request(reqh)
992 usbd_request_handle reqh;
993 {
994 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
995 usb_device_request_t *req = &reqh->request;
996 usbd_device_handle dev = opipe->pipe.device;
997 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
998 int addr = dev->address;
999 ohci_soft_td_t *setup, *xfer = 0, *stat, *next, *tail;
1000 ohci_soft_ed_t *sed;
1001 usb_dma_t *dmap;
1002 int isread;
1003 int len;
1004 usbd_status r;
1005 int s;
1006
1007 isread = req->bmRequestType & UT_READ;
1008 len = UGETW(req->wLength);
1009
1010 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1011 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1012 req->bmRequestType, req->bRequest, UGETW(req->wValue),
1013 UGETW(req->wIndex), len, addr,
1014 opipe->pipe.endpoint->edesc->bEndpointAddress));
1015
1016 setup = opipe->tail;
1017 stat = ohci_alloc_std(sc);
1018 if (!stat) {
1019 r = USBD_NOMEM;
1020 goto bad1;
1021 }
1022 tail = ohci_alloc_std(sc);
1023 if (!tail) {
1024 r = USBD_NOMEM;
1025 goto bad2;
1026 }
1027 tail->reqh = 0;
1028
1029 sed = opipe->sed;
1030 dmap = &opipe->u.ctl.datadma;
1031 opipe->u.ctl.length = len;
1032
1033 /* Update device address and length since they may have changed. */
1034 /* XXX This only needs to be done once, but it's too early in open. */
1035 sed->ed->ed_flags = LE(
1036 (LE(sed->ed->ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1037 OHCI_ED_SET_FA(addr) |
1038 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1039
1040 /* Set up data transaction */
1041 if (len != 0) {
1042 xfer = ohci_alloc_std(sc);
1043 if (!xfer) {
1044 r = USBD_NOMEM;
1045 goto bad3;
1046 }
1047 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1048 if (r != USBD_NORMAL_COMPLETION)
1049 goto bad4;
1050 xfer->td->td_flags = LE(
1051 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
1052 OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR |
1053 (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0));
1054 xfer->td->td_cbp = LE(DMAADDR(dmap));
1055 xfer->nexttd = stat;
1056 xfer->td->td_nexttd = LE(stat->physaddr);
1057 xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1);
1058 xfer->len = len;
1059 xfer->reqh = reqh;
1060 xfer->flags = OHCI_SET_LEN;
1061
1062 next = xfer;
1063 stat->flags = OHCI_CALL_DONE;
1064 } else {
1065 next = stat;
1066 stat->flags = OHCI_CALL_DONE | OHCI_SET_LEN;
1067 }
1068
1069 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req);
1070 if (!isread && len != 0)
1071 memcpy(KERNADDR(dmap), reqh->buffer, len);
1072
1073 setup->td->td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC |
1074 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1075 setup->td->td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma));
1076 setup->nexttd = next;
1077 setup->td->td_nexttd = LE(next->physaddr);
1078 setup->td->td_be = LE(LE(setup->td->td_cbp) + sizeof *req - 1);
1079 setup->len = 0; /* XXX The number of byte we count */
1080 setup->reqh = reqh;
1081 setup->flags = 0;
1082 reqh->hcpriv = setup;
1083
1084 stat->td->td_flags = LE(
1085 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC |
1086 OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1087 stat->td->td_cbp = 0;
1088 stat->nexttd = tail;
1089 stat->td->td_nexttd = LE(tail->physaddr);
1090 stat->td->td_be = 0;
1091 stat->len = 0;
1092 stat->reqh = reqh;
1093
1094 #if USB_DEBUG
1095 if (ohcidebug > 5) {
1096 printf("ohci_device_request:\n");
1097 ohci_dump_ed(sed);
1098 ohci_dump_tds(setup);
1099 }
1100 #endif
1101
1102 /* Insert ED in schedule */
1103 s = splusb();
1104 ohci_hash_add_td(sc, setup);
1105 if (len != 0)
1106 ohci_hash_add_td(sc, xfer);
1107 ohci_hash_add_td(sc, stat);
1108 sed->ed->ed_tailp = LE(tail->physaddr);
1109 opipe->tail = tail;
1110 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1111 if (reqh->timeout && !sc->sc_bus.use_polling) {
1112 usb_timeout(ohci_timeout, reqh,
1113 MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
1114 }
1115 splx(s);
1116
1117 #if USB_DEBUG
1118 if (ohcidebug > 5) {
1119 delay(5000);
1120 printf("ohci_device_request: status=%x\n",
1121 OREAD4(sc, OHCI_COMMAND_STATUS));
1122 ohci_dump_ed(sed);
1123 ohci_dump_tds(setup);
1124 }
1125 #endif
1126
1127 return (USBD_NORMAL_COMPLETION);
1128
1129 bad4:
1130 ohci_free_std(sc, xfer);
1131 bad3:
1132 ohci_free_std(sc, tail);
1133 bad2:
1134 ohci_free_std(sc, stat);
1135 bad1:
1136 return (r);
1137 }
1138
1139 /*
1140 * Add an ED to the schedule. Called at splusb().
1141 */
1142 void
1143 ohci_add_ed(sed, head)
1144 ohci_soft_ed_t *sed;
1145 ohci_soft_ed_t *head;
1146 {
1147 sed->next = head->next;
1148 sed->ed->ed_nexted = head->ed->ed_nexted;
1149 head->next = sed;
1150 head->ed->ed_nexted = LE(sed->physaddr);
1151 }
1152
1153 /*
1154 * Remove an ED from the schedule. Called at splusb().
1155 */
1156 void
1157 ohci_rem_ed(sed, head)
1158 ohci_soft_ed_t *sed;
1159 ohci_soft_ed_t *head;
1160 {
1161 ohci_soft_ed_t *p;
1162
1163 /* XXX */
1164 for (p = head; p && p->next != sed; p = p->next)
1165 ;
1166 if (!p)
1167 panic("ohci_rem_ed: ED not found\n");
1168 p->next = sed->next;
1169 p->ed->ed_nexted = sed->ed->ed_nexted;
1170 }
1171
1172 /*
1173 * When a transfer is completed the TD is added to the done queue by
1174 * the host controller. This queue is the processed by software.
1175 * Unfortunately the queue contains the physical address of the TD
1176 * and we have no simple way to translate this back to a kernel address.
1177 * To make the translation possible (and fast) we use a hash table of
1178 * TDs currently in the schedule. The physical address is used as the
1179 * hash value.
1180 */
1181
1182 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1183 /* Called at splusb() */
1184 void
1185 ohci_hash_add_td(sc, std)
1186 ohci_softc_t *sc;
1187 ohci_soft_td_t *std;
1188 {
1189 int h = HASH(std->physaddr);
1190
1191 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1192 }
1193
1194 /* Called at splusb() */
1195 void
1196 ohci_hash_rem_td(sc, std)
1197 ohci_softc_t *sc;
1198 ohci_soft_td_t *std;
1199 {
1200 LIST_REMOVE(std, hnext);
1201 }
1202
1203 ohci_soft_td_t *
1204 ohci_hash_find_td(sc, a)
1205 ohci_softc_t *sc;
1206 ohci_physaddr_t a;
1207 {
1208 int h = HASH(a);
1209 ohci_soft_td_t *std;
1210
1211 for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1212 std != 0;
1213 std = LIST_NEXT(std, hnext))
1214 if (std->physaddr == a)
1215 return (std);
1216 panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a);
1217 }
1218
1219 void
1220 ohci_timeout(addr)
1221 void *addr;
1222 {
1223 usbd_request_handle reqh = addr;
1224
1225 DPRINTF(("ohci_timeout: reqh=%p\n", reqh));
1226 ohci_abort_req(reqh, USBD_TIMEOUT);
1227 }
1228
1229 #ifdef USB_DEBUG
1230 void
1231 ohci_dump_tds(std)
1232 ohci_soft_td_t *std;
1233 {
1234 for (; std; std = std->nexttd)
1235 ohci_dump_td(std);
1236 }
1237
1238 void
1239 ohci_dump_td(std)
1240 ohci_soft_td_t *std;
1241 {
1242 printf("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx "
1243 "nexttd=0x%08lx be=0x%08lx\n",
1244 std, (u_long)std->physaddr,
1245 (int)LE(std->td->td_flags),
1246 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1247 OHCI_TD_GET_DI(LE(std->td->td_flags)),
1248 OHCI_TD_GET_EC(LE(std->td->td_flags)),
1249 OHCI_TD_GET_CC(LE(std->td->td_flags)),
1250 (u_long)LE(std->td->td_cbp),
1251 (u_long)LE(std->td->td_nexttd), (u_long)LE(std->td->td_be));
1252 }
1253
1254 void
1255 ohci_dump_ed(sed)
1256 ohci_soft_ed_t *sed;
1257 {
1258 printf("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx "
1259 "headp=%b nexted=0x%08lx\n",
1260 sed, (u_long)sed->physaddr,
1261 OHCI_ED_GET_FA(LE(sed->ed->ed_flags)),
1262 OHCI_ED_GET_EN(LE(sed->ed->ed_flags)),
1263 OHCI_ED_GET_MAXP(LE(sed->ed->ed_flags)),
1264 (int)LE(sed->ed->ed_flags),
1265 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
1266 (u_long)LE(sed->ed->ed_tailp),
1267 (u_long)LE(sed->ed->ed_headp), "\20\1HALT\2CARRY",
1268 (u_long)LE(sed->ed->ed_nexted));
1269 }
1270 #endif
1271
1272 usbd_status
1273 ohci_open(pipe)
1274 usbd_pipe_handle pipe;
1275 {
1276 usbd_device_handle dev = pipe->device;
1277 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1278 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1279 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1280 u_int8_t addr = dev->address;
1281 ohci_soft_ed_t *sed;
1282 ohci_soft_td_t *std;
1283 usbd_status r;
1284 int s;
1285
1286 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1287 pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1288 if (addr == sc->sc_addr) {
1289 switch (ed->bEndpointAddress) {
1290 case USB_CONTROL_ENDPOINT:
1291 pipe->methods = &ohci_root_ctrl_methods;
1292 break;
1293 case UE_IN | OHCI_INTR_ENDPT:
1294 pipe->methods = &ohci_root_intr_methods;
1295 break;
1296 default:
1297 return (USBD_INVAL);
1298 }
1299 } else {
1300 sed = ohci_alloc_sed(sc);
1301 if (sed == 0)
1302 goto bad0;
1303 std = ohci_alloc_std(sc);
1304 if (std == 0)
1305 goto bad1;
1306 opipe->sed = sed;
1307 opipe->tail = std;
1308 sed->ed->ed_flags = LE(
1309 OHCI_ED_SET_FA(addr) |
1310 OHCI_ED_SET_EN(ed->bEndpointAddress) |
1311 OHCI_ED_DIR_TD |
1312 (dev->lowspeed ? OHCI_ED_SPEED : 0) |
1313 ((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ?
1314 OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) |
1315 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
1316 sed->ed->ed_headp = sed->ed->ed_tailp = LE(std->physaddr);
1317
1318 switch (ed->bmAttributes & UE_XFERTYPE) {
1319 case UE_CONTROL:
1320 pipe->methods = &ohci_device_ctrl_methods;
1321 r = usb_allocmem(sc->sc_dmatag,
1322 sizeof(usb_device_request_t),
1323 0, &opipe->u.ctl.reqdma);
1324 if (r != USBD_NORMAL_COMPLETION)
1325 goto bad;
1326 s = splusb();
1327 ohci_add_ed(sed, sc->sc_ctrl_head);
1328 splx(s);
1329 break;
1330 case UE_INTERRUPT:
1331 pipe->methods = &ohci_device_intr_methods;
1332 return (ohci_device_setintr(sc, opipe, ed->bInterval));
1333 case UE_ISOCHRONOUS:
1334 printf("ohci_open: open iso unimplemented\n");
1335 return (USBD_XXX);
1336 case UE_BULK:
1337 pipe->methods = &ohci_device_bulk_methods;
1338 s = splusb();
1339 ohci_add_ed(sed, sc->sc_bulk_head);
1340 splx(s);
1341 break;
1342 }
1343 }
1344 return (USBD_NORMAL_COMPLETION);
1345
1346 bad:
1347 ohci_free_std(sc, std);
1348 bad1:
1349 ohci_free_sed(sc, sed);
1350 bad0:
1351 return (USBD_NOMEM);
1352
1353 }
1354
1355 /*
1356 * Close a reqular pipe.
1357 * Assumes that there are no pending transactions.
1358 */
1359 void
1360 ohci_close_pipe(pipe, head)
1361 usbd_pipe_handle pipe;
1362 ohci_soft_ed_t *head;
1363 {
1364 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1365 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1366 ohci_soft_ed_t *sed = opipe->sed;
1367 int s;
1368
1369 s = splusb();
1370 #ifdef DIAGNOSTIC
1371 sed->ed->ed_flags |= LE(OHCI_ED_SKIP);
1372 if ((sed->ed->ed_tailp & LE(OHCI_TAILMASK)) !=
1373 (sed->ed->ed_headp & LE(OHCI_TAILMASK))) {
1374 ohci_physaddr_t td = sed->ed->ed_headp;
1375 ohci_soft_td_t *std;
1376 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]);
1377 std != 0;
1378 std = LIST_NEXT(std, hnext))
1379 if (std->physaddr == td)
1380 break;
1381 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
1382 "tl=0x%x pipe=%p, std=%p\n", sed,
1383 (int)LE(sed->ed->ed_headp), (int)LE(sed->ed->ed_tailp),
1384 pipe, std);
1385 usb_delay_ms(&sc->sc_bus, 2);
1386 if ((sed->ed->ed_tailp & LE(OHCI_TAILMASK)) !=
1387 (sed->ed->ed_headp & LE(OHCI_TAILMASK)))
1388 printf("ohci_close_pipe: pipe still not empty\n");
1389 }
1390 #endif
1391 ohci_rem_ed(sed, head);
1392 splx(s);
1393 ohci_free_std(sc, opipe->tail);
1394 ohci_free_sed(sc, opipe->sed);
1395 }
1396
1397 /*
1398 * Abort a device request.
1399 * If this routine is called at splusb() it guarantees that the request
1400 * will be removed from the hardware scheduling and that the callback
1401 * for it will be called with USBD_CANCELLED status.
1402 * It's impossible to guarantee that the requested transfer will not
1403 * have happened since the hardware runs concurrently.
1404 * If the transaction has already happened we rely on the ordinary
1405 * interrupt processing to process it.
1406 */
1407 void
1408 ohci_abort_req(reqh, status)
1409 usbd_request_handle reqh;
1410 usbd_status status;
1411 {
1412 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
1413 ohci_soft_ed_t *sed;
1414
1415 DPRINTF(("ohci_abort_req: reqh=%p pipe=%p\n", reqh, opipe));
1416
1417 reqh->status = status;
1418
1419 usb_untimeout(ohci_timeout, reqh, reqh->timo_handle);
1420
1421 sed = opipe->sed;
1422 DPRINTFN(1,("ohci_abort_req: stop ed=%p\n", sed));
1423 sed->ed->ed_flags |= LE(OHCI_ED_SKIP); /* force hardware skip */
1424
1425 if (curproc) {
1426 usb_delay_ms(opipe->pipe.device->bus, 1);
1427 ohci_abort_req_end(reqh);
1428 } else {
1429 timeout(ohci_abort_req_end, reqh, hz / USB_FRAMES_PER_SECOND);
1430 }
1431 }
1432
1433 void
1434 ohci_abort_req_end(v)
1435 void *v;
1436 {
1437 usbd_request_handle reqh = v;
1438 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
1439 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1440 ohci_soft_ed_t *sed;
1441 ohci_soft_td_t *p, *n;
1442 int s;
1443
1444 s = splusb();
1445
1446 p = reqh->hcpriv;
1447 #ifdef DIAGNOSTIC
1448 if (!p) {
1449 printf("ohci_abort_req: hcpriv==0\n");
1450 return;
1451 }
1452 #endif
1453 for (; p->reqh == reqh; p = n) {
1454 n = p->nexttd;
1455 ohci_hash_rem_td(sc, p);
1456 ohci_free_std(sc, p);
1457 }
1458
1459 sed = opipe->sed;
1460 DPRINTFN(2,("ohci_abort_req: set hd=%x, tl=%x\n",
1461 (int)LE(p->physaddr), (int)LE(sed->ed->ed_tailp)));
1462 sed->ed->ed_headp = p->physaddr; /* unlink TDs */
1463 sed->ed->ed_flags &= LE(~OHCI_ED_SKIP); /* remove hardware skip */
1464
1465 usb_transfer_complete(reqh);
1466
1467 splx(s);
1468 }
1469
1470 /*
1471 * Data structures and routines to emulate the root hub.
1472 */
1473 usb_device_descriptor_t ohci_devd = {
1474 USB_DEVICE_DESCRIPTOR_SIZE,
1475 UDESC_DEVICE, /* type */
1476 {0x00, 0x01}, /* USB version */
1477 UCLASS_HUB, /* class */
1478 USUBCLASS_HUB, /* subclass */
1479 0, /* protocol */
1480 64, /* max packet */
1481 {0},{0},{0x00,0x01}, /* device id */
1482 1,2,0, /* string indicies */
1483 1 /* # of configurations */
1484 };
1485
1486 usb_config_descriptor_t ohci_confd = {
1487 USB_CONFIG_DESCRIPTOR_SIZE,
1488 UDESC_CONFIG,
1489 {USB_CONFIG_DESCRIPTOR_SIZE +
1490 USB_INTERFACE_DESCRIPTOR_SIZE +
1491 USB_ENDPOINT_DESCRIPTOR_SIZE},
1492 1,
1493 1,
1494 0,
1495 UC_SELF_POWERED,
1496 0 /* max power */
1497 };
1498
1499 usb_interface_descriptor_t ohci_ifcd = {
1500 USB_INTERFACE_DESCRIPTOR_SIZE,
1501 UDESC_INTERFACE,
1502 0,
1503 0,
1504 1,
1505 UCLASS_HUB,
1506 USUBCLASS_HUB,
1507 0,
1508 0
1509 };
1510
1511 usb_endpoint_descriptor_t ohci_endpd = {
1512 USB_ENDPOINT_DESCRIPTOR_SIZE,
1513 UDESC_ENDPOINT,
1514 UE_IN | OHCI_INTR_ENDPT,
1515 UE_INTERRUPT,
1516 {8, 0}, /* max packet */
1517 255
1518 };
1519
1520 usb_hub_descriptor_t ohci_hubd = {
1521 USB_HUB_DESCRIPTOR_SIZE,
1522 UDESC_HUB,
1523 0,
1524 {0,0},
1525 0,
1526 0,
1527 {0},
1528 };
1529
1530 int
1531 ohci_str(p, l, s)
1532 usb_string_descriptor_t *p;
1533 int l;
1534 char *s;
1535 {
1536 int i;
1537
1538 if (l == 0)
1539 return (0);
1540 p->bLength = 2 * strlen(s) + 2;
1541 if (l == 1)
1542 return (1);
1543 p->bDescriptorType = UDESC_STRING;
1544 l -= 2;
1545 for (i = 0; s[i] && l > 1; i++, l -= 2)
1546 USETW2(p->bString[i], 0, s[i]);
1547 return (2*i+2);
1548 }
1549
1550 /*
1551 * Simulate a hardware hub by handling all the necessary requests.
1552 */
1553 usbd_status
1554 ohci_root_ctrl_transfer(reqh)
1555 usbd_request_handle reqh;
1556 {
1557 int s;
1558 usbd_status r;
1559
1560 s = splusb();
1561 r = usb_insert_transfer(reqh);
1562 splx(s);
1563 if (r != USBD_NORMAL_COMPLETION)
1564 return (r);
1565 else
1566 return (ohci_root_ctrl_start(reqh));
1567 }
1568
1569 usbd_status
1570 ohci_root_ctrl_start(reqh)
1571 usbd_request_handle reqh;
1572 {
1573 ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus;
1574 usb_device_request_t *req;
1575 void *buf;
1576 int port, i;
1577 int len, value, index, l, totlen = 0;
1578 usb_port_status_t ps;
1579 usb_hub_descriptor_t hubd;
1580 usbd_status r;
1581 u_int32_t v;
1582
1583 if (!reqh->isreq)
1584 /* XXX panic */
1585 return (USBD_INVAL);
1586 req = &reqh->request;
1587 buf = reqh->buffer;
1588
1589 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
1590 req->bmRequestType, req->bRequest));
1591
1592 len = UGETW(req->wLength);
1593 value = UGETW(req->wValue);
1594 index = UGETW(req->wIndex);
1595 #define C(x,y) ((x) | ((y) << 8))
1596 switch(C(req->bRequest, req->bmRequestType)) {
1597 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1598 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1599 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1600 /*
1601 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1602 * for the integrated root hub.
1603 */
1604 break;
1605 case C(UR_GET_CONFIG, UT_READ_DEVICE):
1606 if (len > 0) {
1607 *(u_int8_t *)buf = sc->sc_conf;
1608 totlen = 1;
1609 }
1610 break;
1611 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1612 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
1613 switch(value >> 8) {
1614 case UDESC_DEVICE:
1615 if ((value & 0xff) != 0) {
1616 r = USBD_IOERROR;
1617 goto ret;
1618 }
1619 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1620 USETW(ohci_devd.idVendor, sc->sc_id_vendor);
1621 memcpy(buf, &ohci_devd, l);
1622 break;
1623 case UDESC_CONFIG:
1624 if ((value & 0xff) != 0) {
1625 r = USBD_IOERROR;
1626 goto ret;
1627 }
1628 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1629 memcpy(buf, &ohci_confd, l);
1630 buf = (char *)buf + l;
1631 len -= l;
1632 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1633 totlen += l;
1634 memcpy(buf, &ohci_ifcd, l);
1635 buf = (char *)buf + l;
1636 len -= l;
1637 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1638 totlen += l;
1639 memcpy(buf, &ohci_endpd, l);
1640 break;
1641 case UDESC_STRING:
1642 if (len == 0)
1643 break;
1644 *(u_int8_t *)buf = 0;
1645 totlen = 1;
1646 switch (value & 0xff) {
1647 case 1: /* Vendor */
1648 totlen = ohci_str(buf, len, sc->sc_vendor);
1649 break;
1650 case 2: /* Product */
1651 totlen = ohci_str(buf, len, "OHCI root hub");
1652 break;
1653 }
1654 break;
1655 default:
1656 r = USBD_IOERROR;
1657 goto ret;
1658 }
1659 break;
1660 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1661 if (len > 0) {
1662 *(u_int8_t *)buf = 0;
1663 totlen = 1;
1664 }
1665 break;
1666 case C(UR_GET_STATUS, UT_READ_DEVICE):
1667 if (len > 1) {
1668 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1669 totlen = 2;
1670 }
1671 break;
1672 case C(UR_GET_STATUS, UT_READ_INTERFACE):
1673 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1674 if (len > 1) {
1675 USETW(((usb_status_t *)buf)->wStatus, 0);
1676 totlen = 2;
1677 }
1678 break;
1679 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1680 if (value >= USB_MAX_DEVICES) {
1681 r = USBD_IOERROR;
1682 goto ret;
1683 }
1684 sc->sc_addr = value;
1685 break;
1686 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1687 if (value != 0 && value != 1) {
1688 r = USBD_IOERROR;
1689 goto ret;
1690 }
1691 sc->sc_conf = value;
1692 break;
1693 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1694 break;
1695 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1696 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1697 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1698 r = USBD_IOERROR;
1699 goto ret;
1700 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1701 break;
1702 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1703 break;
1704 /* Hub requests */
1705 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1706 break;
1707 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1708 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
1709 "port=%d feature=%d\n",
1710 index, value));
1711 if (index < 1 || index > sc->sc_noport) {
1712 r = USBD_IOERROR;
1713 goto ret;
1714 }
1715 port = OHCI_RH_PORT_STATUS(index);
1716 switch(value) {
1717 case UHF_PORT_ENABLE:
1718 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
1719 break;
1720 case UHF_PORT_SUSPEND:
1721 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
1722 break;
1723 case UHF_PORT_POWER:
1724 OWRITE4(sc, port, UPS_LOW_SPEED);
1725 break;
1726 case UHF_C_PORT_CONNECTION:
1727 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
1728 break;
1729 case UHF_C_PORT_ENABLE:
1730 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
1731 break;
1732 case UHF_C_PORT_SUSPEND:
1733 OWRITE4(sc, port, UPS_C_SUSPEND << 16);
1734 break;
1735 case UHF_C_PORT_OVER_CURRENT:
1736 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
1737 break;
1738 case UHF_C_PORT_RESET:
1739 OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
1740 break;
1741 default:
1742 r = USBD_IOERROR;
1743 goto ret;
1744 }
1745 switch(value) {
1746 case UHF_C_PORT_CONNECTION:
1747 case UHF_C_PORT_ENABLE:
1748 case UHF_C_PORT_SUSPEND:
1749 case UHF_C_PORT_OVER_CURRENT:
1750 case UHF_C_PORT_RESET:
1751 /* Enable RHSC interrupt if condition is cleared. */
1752 if ((OREAD4(sc, port) >> 16) == 0)
1753 ohci_rhsc_able(sc, 1);
1754 break;
1755 default:
1756 break;
1757 }
1758 break;
1759 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1760 if (value != 0) {
1761 r = USBD_IOERROR;
1762 goto ret;
1763 }
1764 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
1765 hubd = ohci_hubd;
1766 hubd.bNbrPorts = sc->sc_noport;
1767 USETW(hubd.wHubCharacteristics,
1768 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
1769 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
1770 /* XXX overcurrent */
1771 );
1772 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
1773 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
1774 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1775 hubd.DeviceRemovable[i++] = (u_int8_t)v;
1776 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1777 l = min(len, hubd.bDescLength);
1778 totlen = l;
1779 memcpy(buf, &hubd, l);
1780 break;
1781 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1782 if (len != 4) {
1783 r = USBD_IOERROR;
1784 goto ret;
1785 }
1786 memset(buf, 0, len); /* ? XXX */
1787 totlen = len;
1788 break;
1789 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1790 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
1791 index));
1792 if (index < 1 || index > sc->sc_noport) {
1793 r = USBD_IOERROR;
1794 goto ret;
1795 }
1796 if (len != 4) {
1797 r = USBD_IOERROR;
1798 goto ret;
1799 }
1800 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
1801 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
1802 v));
1803 USETW(ps.wPortStatus, v);
1804 USETW(ps.wPortChange, v >> 16);
1805 l = min(len, sizeof ps);
1806 memcpy(buf, &ps, l);
1807 totlen = l;
1808 break;
1809 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1810 r = USBD_IOERROR;
1811 goto ret;
1812 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1813 break;
1814 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1815 if (index < 1 || index > sc->sc_noport) {
1816 r = USBD_IOERROR;
1817 goto ret;
1818 }
1819 port = OHCI_RH_PORT_STATUS(index);
1820 switch(value) {
1821 case UHF_PORT_ENABLE:
1822 OWRITE4(sc, port, UPS_PORT_ENABLED);
1823 break;
1824 case UHF_PORT_SUSPEND:
1825 OWRITE4(sc, port, UPS_SUSPEND);
1826 break;
1827 case UHF_PORT_RESET:
1828 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
1829 index));
1830 OWRITE4(sc, port, UPS_RESET);
1831 for (i = 0; i < 10; i++) {
1832 usb_delay_ms(&sc->sc_bus, 10);
1833 if ((OREAD4(sc, port) & UPS_RESET) == 0)
1834 break;
1835 }
1836 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
1837 index, OREAD4(sc, port)));
1838 break;
1839 case UHF_PORT_POWER:
1840 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
1841 "%d\n", index));
1842 OWRITE4(sc, port, UPS_PORT_POWER);
1843 break;
1844 default:
1845 r = USBD_IOERROR;
1846 goto ret;
1847 }
1848 break;
1849 default:
1850 r = USBD_IOERROR;
1851 goto ret;
1852 }
1853 reqh->actlen = totlen;
1854 r = USBD_NORMAL_COMPLETION;
1855 ret:
1856 reqh->status = r;
1857 usb_transfer_complete(reqh);
1858 return (USBD_IN_PROGRESS);
1859 }
1860
1861 /* Abort a root control request. */
1862 void
1863 ohci_root_ctrl_abort(reqh)
1864 usbd_request_handle reqh;
1865 {
1866 /* Nothing to do, all transfers are synchronous. */
1867 }
1868
1869 /* Close the root pipe. */
1870 void
1871 ohci_root_ctrl_close(pipe)
1872 usbd_pipe_handle pipe;
1873 {
1874 DPRINTF(("ohci_root_ctrl_close\n"));
1875 /* Nothing to do. */
1876 }
1877
1878 usbd_status
1879 ohci_root_intr_transfer(reqh)
1880 usbd_request_handle reqh;
1881 {
1882 int s;
1883 usbd_status r;
1884
1885 s = splusb();
1886 r = usb_insert_transfer(reqh);
1887 splx(s);
1888 if (r != USBD_NORMAL_COMPLETION)
1889 return (r);
1890 else
1891 return (ohci_root_intr_start(reqh));
1892 }
1893
1894 usbd_status
1895 ohci_root_intr_start(reqh)
1896 usbd_request_handle reqh;
1897 {
1898 usbd_pipe_handle pipe = reqh->pipe;
1899 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1900 struct ohci_pipe *upipe = (struct ohci_pipe *)pipe;
1901 usb_dma_t *dmap;
1902 usbd_status r;
1903 int len;
1904
1905 len = reqh->length;
1906 dmap = &upipe->u.intr.datadma;
1907 if (len == 0)
1908 return (USBD_INVAL); /* XXX should it be? */
1909
1910 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1911 if (r != USBD_NORMAL_COMPLETION)
1912 return (r);
1913 sc->sc_intrreqh = reqh;
1914
1915 return (USBD_IN_PROGRESS);
1916 }
1917
1918 /* Abort a root interrupt request. */
1919 void
1920 ohci_root_intr_abort(reqh)
1921 usbd_request_handle reqh;
1922 {
1923 /* No need to abort. */
1924 }
1925
1926 /* Close the root pipe. */
1927 void
1928 ohci_root_intr_close(pipe)
1929 usbd_pipe_handle pipe;
1930 {
1931 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1932
1933 DPRINTF(("ohci_root_intr_close\n"));
1934
1935 sc->sc_intrreqh = 0;
1936 }
1937
1938 /************************/
1939
1940 usbd_status
1941 ohci_device_ctrl_transfer(reqh)
1942 usbd_request_handle reqh;
1943 {
1944 int s;
1945 usbd_status r;
1946
1947 s = splusb();
1948 r = usb_insert_transfer(reqh);
1949 splx(s);
1950 if (r != USBD_NORMAL_COMPLETION)
1951 return (r);
1952 else
1953 return (ohci_device_ctrl_start(reqh));
1954 }
1955
1956 usbd_status
1957 ohci_device_ctrl_start(reqh)
1958 usbd_request_handle reqh;
1959 {
1960 ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus;
1961 usbd_status r;
1962
1963 if (!reqh->isreq) {
1964 /* XXX panic */
1965 printf("ohci_device_ctrl_transfer: not a request\n");
1966 return (USBD_INVAL);
1967 }
1968
1969 r = ohci_device_request(reqh);
1970 if (r != USBD_NORMAL_COMPLETION)
1971 return (r);
1972
1973 if (sc->sc_bus.use_polling)
1974 ohci_waitintr(sc, reqh);
1975 return (USBD_IN_PROGRESS);
1976 }
1977
1978 /* Abort a device control request. */
1979 void
1980 ohci_device_ctrl_abort(reqh)
1981 usbd_request_handle reqh;
1982 {
1983 DPRINTF(("ohci_device_ctrl_abort: reqh=%p\n", reqh));
1984 ohci_abort_req(reqh, USBD_CANCELLED);
1985 }
1986
1987 /* Close a device control pipe. */
1988 void
1989 ohci_device_ctrl_close(pipe)
1990 usbd_pipe_handle pipe;
1991 {
1992 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1993
1994 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
1995 ohci_close_pipe(pipe, sc->sc_ctrl_head);
1996 }
1997
1998 /************************/
1999
2000 void
2001 ohci_device_clear_toggle(pipe)
2002 usbd_pipe_handle pipe;
2003 {
2004 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2005
2006 opipe->sed->ed->ed_tailp &= LE(~OHCI_TOGGLECARRY);
2007 }
2008
2009 void
2010 ohci_noop(pipe)
2011 usbd_pipe_handle pipe;
2012 {
2013 }
2014
2015 usbd_status
2016 ohci_device_bulk_transfer(reqh)
2017 usbd_request_handle reqh;
2018 {
2019 int s;
2020 usbd_status r;
2021
2022 s = splusb();
2023 r = usb_insert_transfer(reqh);
2024 splx(s);
2025 if (r != USBD_NORMAL_COMPLETION)
2026 return (r);
2027 else
2028 return (ohci_device_bulk_start(reqh));
2029 }
2030
2031 usbd_status
2032 ohci_device_bulk_start(reqh)
2033 usbd_request_handle reqh;
2034 {
2035 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
2036 usbd_device_handle dev = opipe->pipe.device;
2037 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2038 int addr = dev->address;
2039 ohci_soft_td_t *xfer, *tail;
2040 ohci_soft_ed_t *sed;
2041 usb_dma_t *dmap;
2042 usbd_status r;
2043 int s, len, isread;
2044
2045 #ifdef DIAGNOSTIC
2046 if (reqh->isreq) {
2047 /* XXX panic */
2048 printf("ohci_device_bulk_start: a request\n");
2049 return (USBD_INVAL);
2050 }
2051 #endif
2052
2053 len = reqh->length;
2054 dmap = &opipe->u.bulk.datadma;
2055 isread = reqh->pipe->endpoint->edesc->bEndpointAddress & UE_IN;
2056 sed = opipe->sed;
2057
2058 DPRINTFN(4,("ohci_device_bulk_start: reqh=%p len=%d isread=%d "
2059 "flags=%d endpt=%d\n", reqh, len, isread, reqh->flags,
2060 reqh->pipe->endpoint->edesc->bEndpointAddress));
2061
2062 opipe->u.bulk.isread = isread;
2063 opipe->u.bulk.length = len;
2064
2065 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
2066 if (r != USBD_NORMAL_COMPLETION)
2067 goto ret1;
2068
2069 tail = ohci_alloc_std(sc);
2070 if (!tail) {
2071 r = USBD_NOMEM;
2072 goto ret2;
2073 }
2074 tail->reqh = 0;
2075
2076 /* Update device address */
2077 sed->ed->ed_flags = LE(
2078 (LE(sed->ed->ed_flags) & ~OHCI_ED_ADDRMASK) |
2079 OHCI_ED_SET_FA(addr));
2080
2081 /* Set up data transaction */
2082 xfer = opipe->tail;
2083 xfer->td->td_flags = LE(
2084 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
2085 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY |
2086 (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0));
2087 xfer->td->td_cbp = LE(DMAADDR(dmap));
2088 xfer->nexttd = tail;
2089 xfer->td->td_nexttd = LE(tail->physaddr);
2090 xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1);
2091 xfer->len = len;
2092 xfer->reqh = reqh;
2093 xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN;
2094 reqh->hcpriv = xfer;
2095
2096 if (!isread)
2097 memcpy(KERNADDR(dmap), reqh->buffer, len);
2098
2099 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2100 "td_cbp=0x%08x td_be=0x%08x\n",
2101 (int)LE(sed->ed->ed_flags), (int)LE(xfer->td->td_flags),
2102 (int)LE(xfer->td->td_cbp), (int)LE(xfer->td->td_be)));
2103
2104 #ifdef USB_DEBUG
2105 if (ohcidebug > 4) {
2106 ohci_dump_ed(sed);
2107 ohci_dump_tds(xfer);
2108 }
2109 #endif
2110
2111 /* Insert ED in schedule */
2112 s = splusb();
2113 ohci_hash_add_td(sc, xfer);
2114 sed->ed->ed_tailp = LE(tail->physaddr);
2115 opipe->tail = tail;
2116 sed->ed->ed_flags &= LE(~OHCI_ED_SKIP);
2117 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2118 if (reqh->timeout && !sc->sc_bus.use_polling) {
2119 usb_timeout(ohci_timeout, reqh,
2120 MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
2121 }
2122
2123 #ifdef USB_DEBUG
2124 if (ohcidebug > 5) {
2125 delay(5000);
2126 printf("ohci_device_intr_transfer: status=%x\n",
2127 OREAD4(sc, OHCI_COMMAND_STATUS));
2128 ohci_dump_ed(sed);
2129 ohci_dump_tds(xfer);
2130 }
2131 #endif
2132
2133 splx(s);
2134
2135 return (USBD_IN_PROGRESS);
2136
2137 ret2:
2138 usb_freemem(sc->sc_dmatag, dmap);
2139 ret1:
2140 return (r);
2141 }
2142
2143 void
2144 ohci_device_bulk_abort(reqh)
2145 usbd_request_handle reqh;
2146 {
2147 DPRINTF(("ohci_device_bulk_abort: reqh=%p\n", reqh));
2148 ohci_abort_req(reqh, USBD_CANCELLED);
2149 }
2150
2151 /*
2152 * Close a device bulk pipe.
2153 */
2154 void
2155 ohci_device_bulk_close(pipe)
2156 usbd_pipe_handle pipe;
2157 {
2158 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2159
2160 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
2161 ohci_close_pipe(pipe, sc->sc_bulk_head);
2162 }
2163
2164 /************************/
2165
2166 usbd_status
2167 ohci_device_intr_transfer(reqh)
2168 usbd_request_handle reqh;
2169 {
2170 int s;
2171 usbd_status r;
2172
2173 s = splusb();
2174 r = usb_insert_transfer(reqh);
2175 splx(s);
2176 if (r != USBD_NORMAL_COMPLETION)
2177 return (r);
2178 else
2179 return (ohci_device_intr_start(reqh));
2180 }
2181
2182 usbd_status
2183 ohci_device_intr_start(reqh)
2184 usbd_request_handle reqh;
2185 {
2186 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
2187 usbd_device_handle dev = opipe->pipe.device;
2188 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2189 ohci_soft_ed_t *sed = opipe->sed;
2190 ohci_soft_td_t *xfer, *tail;
2191 usb_dma_t *dmap;
2192 usbd_status r;
2193 int len;
2194 int s;
2195
2196 DPRINTFN(3, ("ohci_device_intr_transfer: reqh=%p buf=%p len=%d "
2197 "flags=%d priv=%p\n",
2198 reqh, reqh->buffer, reqh->length, reqh->flags, reqh->priv));
2199
2200 if (reqh->isreq)
2201 panic("ohci_device_intr_transfer: a request\n");
2202
2203 len = reqh->length;
2204 dmap = &opipe->u.intr.datadma;
2205 if (len == 0)
2206 return (USBD_INVAL); /* XXX should it be? */
2207
2208 xfer = opipe->tail;
2209 tail = ohci_alloc_std(sc);
2210 if (!tail) {
2211 r = USBD_NOMEM;
2212 goto ret1;
2213 }
2214 tail->reqh = 0;
2215
2216 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
2217 if (r != USBD_NORMAL_COMPLETION)
2218 goto ret2;
2219
2220 xfer->td->td_flags = LE(
2221 OHCI_TD_IN | OHCI_TD_NOCC |
2222 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
2223 if (reqh->flags & USBD_SHORT_XFER_OK)
2224 xfer->td->td_flags |= LE(OHCI_TD_R);
2225 xfer->td->td_cbp = LE(DMAADDR(dmap));
2226 xfer->nexttd = tail;
2227 xfer->td->td_nexttd = LE(tail->physaddr);
2228 xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1);
2229 xfer->len = len;
2230 xfer->reqh = reqh;
2231 xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN;
2232 reqh->hcpriv = xfer;
2233
2234 #if USB_DEBUG
2235 if (ohcidebug > 5) {
2236 printf("ohci_device_intr_transfer:\n");
2237 ohci_dump_ed(sed);
2238 ohci_dump_tds(xfer);
2239 }
2240 #endif
2241
2242 /* Insert ED in schedule */
2243 s = splusb();
2244 ohci_hash_add_td(sc, xfer);
2245 sed->ed->ed_tailp = LE(tail->physaddr);
2246 opipe->tail = tail;
2247 sed->ed->ed_flags &= LE(~OHCI_ED_SKIP);
2248
2249 #ifdef USB_DEBUG
2250 if (ohcidebug > 5) {
2251 delay(5000);
2252 printf("ohci_device_intr_transfer: status=%x\n",
2253 OREAD4(sc, OHCI_COMMAND_STATUS));
2254 ohci_dump_ed(sed);
2255 ohci_dump_tds(xfer);
2256 }
2257 #endif
2258 splx(s);
2259
2260 return (USBD_IN_PROGRESS);
2261
2262 ret2:
2263 ohci_free_std(sc, xfer);
2264 ret1:
2265 return (r);
2266 }
2267
2268 /* Abort a device control request. */
2269 void
2270 ohci_device_intr_abort(reqh)
2271 usbd_request_handle reqh;
2272 {
2273 if (reqh->pipe->intrreqh == reqh) {
2274 DPRINTF(("ohci_device_intr_abort: remove\n"));
2275 reqh->pipe->intrreqh = 0;
2276 }
2277 ohci_abort_req(reqh, USBD_CANCELLED);
2278 }
2279
2280 /* Close a device interrupt pipe. */
2281 void
2282 ohci_device_intr_close(pipe)
2283 usbd_pipe_handle pipe;
2284 {
2285 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2286 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2287 int nslots = opipe->u.intr.nslots;
2288 int pos = opipe->u.intr.pos;
2289 int j;
2290 ohci_soft_ed_t *p, *sed = opipe->sed;
2291 int s;
2292
2293 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
2294 pipe, nslots, pos));
2295 s = splusb();
2296 sed->ed->ed_flags |= LE(OHCI_ED_SKIP);
2297 if ((sed->ed->ed_tailp & LE(OHCI_TAILMASK)) !=
2298 (sed->ed->ed_headp & LE(OHCI_TAILMASK)))
2299 usb_delay_ms(&sc->sc_bus, 2);
2300
2301 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
2302 ;
2303 if (!p)
2304 panic("ohci_device_intr_close: ED not found\n");
2305 p->next = sed->next;
2306 p->ed->ed_nexted = sed->ed->ed_nexted;
2307 splx(s);
2308
2309 for (j = 0; j < nslots; j++)
2310 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
2311
2312 ohci_free_std(sc, opipe->tail);
2313 ohci_free_sed(sc, opipe->sed);
2314 }
2315
2316 usbd_status
2317 ohci_device_setintr(sc, opipe, ival)
2318 ohci_softc_t *sc;
2319 struct ohci_pipe *opipe;
2320 int ival;
2321 {
2322 int i, j, s, best;
2323 u_int npoll, slow, shigh, nslots;
2324 u_int bestbw, bw;
2325 ohci_soft_ed_t *hsed, *sed = opipe->sed;
2326
2327 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
2328 if (ival == 0) {
2329 printf("ohci_setintr: 0 interval\n");
2330 return (USBD_INVAL);
2331 }
2332
2333 npoll = OHCI_NO_INTRS;
2334 while (npoll > ival)
2335 npoll /= 2;
2336 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
2337
2338 /*
2339 * We now know which level in the tree the ED must go into.
2340 * Figure out which slot has most bandwidth left over.
2341 * Slots to examine:
2342 * npoll
2343 * 1 0
2344 * 2 1 2
2345 * 4 3 4 5 6
2346 * 8 7 8 9 10 11 12 13 14
2347 * N (N-1) .. (N-1+N-1)
2348 */
2349 slow = npoll-1;
2350 shigh = slow + npoll;
2351 nslots = OHCI_NO_INTRS / npoll;
2352 for (best = i = slow, bestbw = ~0; i < shigh; i++) {
2353 bw = 0;
2354 for (j = 0; j < nslots; j++)
2355 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
2356 if (bw < bestbw) {
2357 best = i;
2358 bestbw = bw;
2359 }
2360 }
2361 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
2362 best, slow, shigh, bestbw));
2363
2364 s = splusb();
2365 hsed = sc->sc_eds[best];
2366 sed->next = hsed->next;
2367 sed->ed->ed_nexted = hsed->ed->ed_nexted;
2368 hsed->next = sed;
2369 hsed->ed->ed_nexted = LE(sed->physaddr);
2370 splx(s);
2371
2372 for (j = 0; j < nslots; j++)
2373 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
2374 opipe->u.intr.nslots = nslots;
2375 opipe->u.intr.pos = best;
2376
2377 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
2378 return (USBD_NORMAL_COMPLETION);
2379 }
2380
2381