ohci.c revision 1.4
1 /* $NetBSD: ohci.c,v 1.4 1998/07/24 21:09:07 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * Author: Lennart Augustsson <augustss (at) carlstedt.se> 8 * Carlstedt Research & Technology 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Open Host Controller driver. 41 * 42 * OHCI spec: http://www.intel.com/design/usb/ohci11d.pdf 43 * USB spec: http://www.teleport.com/cgi-bin/mailmerge.cgi/~usb/cgiform.tpl 44 */ 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/kernel.h> 49 #include <sys/malloc.h> 50 #include <sys/device.h> 51 #include <sys/proc.h> 52 #include <sys/queue.h> 53 #include <sys/select.h> 54 55 #include <machine/bus.h> 56 57 #include <dev/usb/usb.h> 58 #include <dev/usb/usbdi.h> 59 #include <dev/usb/usbdivar.h> 60 #include <dev/usb/usb_quirks.h> 61 #include <dev/usb/usb_mem.h> 62 63 #include <dev/usb/ohcireg.h> 64 #include <dev/usb/ohcivar.h> 65 66 int ohcidebug = 0; 67 68 struct ohci_pipe; 69 70 ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *)); 71 void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *)); 72 73 ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *)); 74 void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *)); 75 76 usbd_status ohci_open __P((usbd_pipe_handle)); 77 void ohci_waitintr __P((ohci_softc_t *, usbd_request_handle)); 78 void ohci_rhsc __P((ohci_softc_t *, usbd_request_handle)); 79 void ohci_process_done __P((ohci_softc_t *, ohci_physaddr_t)); 80 void ohci_ctrl_done __P((ohci_softc_t *, usbd_request_handle)); 81 void ohci_intr_done __P((ohci_softc_t *, usbd_request_handle)); 82 void ohci_bulk_done __P((ohci_softc_t *, usbd_request_handle)); 83 84 usbd_status ohci_device_request __P((usbd_request_handle reqh)); 85 void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 86 void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 87 void ohci_hash_add_td __P((ohci_softc_t *, ohci_soft_td_t *)); 88 void ohci_hash_rem_td __P((ohci_softc_t *, ohci_soft_td_t *)); 89 ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, ohci_physaddr_t)); 90 91 usbd_status ohci_root_ctrl_transfer __P((usbd_request_handle)); 92 void ohci_root_ctrl_abort __P((usbd_request_handle)); 93 void ohci_root_ctrl_close __P((usbd_pipe_handle)); 94 95 usbd_status ohci_root_intr_transfer __P((usbd_request_handle)); 96 void ohci_root_intr_abort __P((usbd_request_handle)); 97 void ohci_root_intr_close __P((usbd_pipe_handle)); 98 99 usbd_status ohci_device_ctrl_transfer __P((usbd_request_handle)); 100 void ohci_device_ctrl_abort __P((usbd_request_handle)); 101 void ohci_device_ctrl_close __P((usbd_pipe_handle)); 102 103 usbd_status ohci_device_bulk_transfer __P((usbd_request_handle)); 104 void ohci_device_bulk_abort __P((usbd_request_handle)); 105 void ohci_device_bulk_close __P((usbd_pipe_handle)); 106 107 usbd_status ohci_device_intr_transfer __P((usbd_request_handle)); 108 void ohci_device_intr_abort __P((usbd_request_handle)); 109 void ohci_device_intr_close __P((usbd_pipe_handle)); 110 usbd_status ohci_device_setintr __P((ohci_softc_t *sc, 111 struct ohci_pipe *pipe, int ival)); 112 113 int ohci_str __P((usb_string_descriptor_t *, int, char *)); 114 115 void ohci_timeout __P((void *)); 116 void ohci_rhsc_able __P((ohci_softc_t *, int)); 117 118 #ifdef USB_DEBUG 119 ohci_softc_t *thesc; 120 void ohci_dumpregs __P((ohci_softc_t *)); 121 void ohci_dump_tds __P((ohci_soft_td_t *)); 122 void ohci_dump_td __P((ohci_soft_td_t *)); 123 void ohci_dump_ed __P((ohci_soft_ed_t *)); 124 #endif 125 126 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 127 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 128 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 129 130 /* Reverse the bits in a value 0 .. 31 */ 131 static u_int8_t revbits[OHCI_NO_INTRS] = 132 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 133 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 134 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 135 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 136 137 struct ohci_pipe { 138 struct usbd_pipe pipe; 139 ohci_soft_ed_t *sed; 140 ohci_soft_td_t *tail; 141 /* Info needed for different pipe kinds. */ 142 union { 143 /* Control pipe */ 144 struct { 145 usb_dma_t datadma; 146 usb_dma_t reqdma; 147 u_int length; 148 ohci_soft_td_t *setup, *xfer, *stat; 149 } ctl; 150 /* Interrupt pipe */ 151 struct { 152 usb_dma_t datadma; 153 int nslots; 154 int pos; 155 } intr; 156 /* Bulk pipe */ 157 struct { 158 usb_dma_t datadma; 159 u_int length; 160 } bulk; 161 } u; 162 }; 163 164 #define OHCI_INTR_ENDPT 1 165 166 struct usbd_methods ohci_root_ctrl_methods = { 167 ohci_root_ctrl_transfer, 168 ohci_root_ctrl_abort, 169 ohci_root_ctrl_close, 170 }; 171 172 struct usbd_methods ohci_root_intr_methods = { 173 ohci_root_intr_transfer, 174 ohci_root_intr_abort, 175 ohci_root_intr_close, 176 }; 177 178 struct usbd_methods ohci_device_ctrl_methods = { 179 ohci_device_ctrl_transfer, 180 ohci_device_ctrl_abort, 181 ohci_device_ctrl_close, 182 }; 183 184 struct usbd_methods ohci_device_intr_methods = { 185 ohci_device_intr_transfer, 186 ohci_device_intr_abort, 187 ohci_device_intr_close, 188 }; 189 190 struct usbd_methods ohci_device_bulk_methods = { 191 ohci_device_bulk_transfer, 192 ohci_device_bulk_abort, 193 ohci_device_bulk_close, 194 }; 195 196 ohci_soft_ed_t * 197 ohci_alloc_sed(sc) 198 ohci_softc_t *sc; 199 { 200 ohci_soft_ed_t *sed; 201 usbd_status r; 202 int i, offs; 203 usb_dma_t dma; 204 205 if (!sc->sc_freeeds) { 206 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 207 sed = malloc(sizeof(ohci_soft_ed_t) * OHCI_ED_CHUNK, 208 M_USBDEV, M_NOWAIT); 209 if (!sed) 210 return 0; 211 r = usb_allocmem(sc->sc_dmatag, OHCI_ED_SIZE * OHCI_ED_CHUNK, 212 OHCI_ED_ALIGN, &dma); 213 if (r != USBD_NORMAL_COMPLETION) { 214 free(sed, M_USBDEV); 215 return 0; 216 } 217 for(i = 0; i < OHCI_ED_CHUNK; i++, sed++) { 218 offs = i * OHCI_ED_SIZE; 219 sed->physaddr = DMAADDR(&dma) + offs; 220 sed->ed = (ohci_ed_t *) 221 ((char *)KERNADDR(&dma) + offs); 222 sed->next = sc->sc_freeeds; 223 sc->sc_freeeds = sed; 224 } 225 } 226 sed = sc->sc_freeeds; 227 sc->sc_freeeds = sed->next; 228 memset(sed->ed, 0, OHCI_ED_SIZE); 229 sed->next = 0; 230 return sed; 231 } 232 233 void 234 ohci_free_sed(sc, sed) 235 ohci_softc_t *sc; 236 ohci_soft_ed_t *sed; 237 { 238 sed->next = sc->sc_freeeds; 239 sc->sc_freeeds = sed; 240 } 241 242 ohci_soft_td_t * 243 ohci_alloc_std(sc) 244 ohci_softc_t *sc; 245 { 246 ohci_soft_td_t *std; 247 usbd_status r; 248 int i, offs; 249 usb_dma_t dma; 250 251 if (!sc->sc_freetds) { 252 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 253 std = malloc(sizeof(ohci_soft_td_t) * OHCI_TD_CHUNK, 254 M_USBDEV, M_NOWAIT); 255 if (!std) 256 return 0; 257 r = usb_allocmem(sc->sc_dmatag, OHCI_TD_SIZE * OHCI_TD_CHUNK, 258 OHCI_TD_ALIGN, &dma); 259 if (r != USBD_NORMAL_COMPLETION) { 260 free(std, M_USBDEV); 261 return 0; 262 } 263 for(i = 0; i < OHCI_TD_CHUNK; i++, std++) { 264 offs = i * OHCI_TD_SIZE; 265 std->physaddr = DMAADDR(&dma) + offs; 266 std->td = (ohci_td_t *) 267 ((char *)KERNADDR(&dma) + offs); 268 std->nexttd = sc->sc_freetds; 269 sc->sc_freetds = std; 270 } 271 } 272 std = sc->sc_freetds; 273 sc->sc_freetds = std->nexttd; 274 memset(std->td, 0, OHCI_TD_SIZE); 275 std->nexttd = 0; 276 return (std); 277 } 278 279 void 280 ohci_free_std(sc, std) 281 ohci_softc_t *sc; 282 ohci_soft_td_t *std; 283 { 284 std->nexttd = sc->sc_freetds; 285 sc->sc_freetds = std; 286 } 287 288 usbd_status 289 ohci_init(sc) 290 ohci_softc_t *sc; 291 { 292 ohci_soft_ed_t *sed, *psed; 293 usbd_status r; 294 int rev; 295 int i; 296 u_int32_t s, ctl, ival, hcr, fm, per; 297 298 DPRINTF(("ohci_init: start\n")); 299 rev = OREAD4(sc, OHCI_REVISION); 300 printf("%s: OHCI version %d.%d%s\n", sc->sc_bus.bdev.dv_xname, 301 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 302 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 303 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 304 printf("%s: unsupported OHCI revision\n", 305 sc->sc_bus.bdev.dv_xname); 306 return (USBD_INVAL); 307 } 308 309 for (i = 0; i < OHCI_HASH_SIZE; i++) 310 LIST_INIT(&sc->sc_hash_tds[i]); 311 312 /* Allocate the HCCA area. */ 313 r = usb_allocmem(sc->sc_dmatag, OHCI_HCCA_SIZE, 314 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 315 if (r != USBD_NORMAL_COMPLETION) 316 return (r); 317 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 318 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 319 320 sc->sc_eintrs = OHCI_NORMAL_INTRS; 321 322 sc->sc_ctrl_head = ohci_alloc_sed(sc); 323 if (!sc->sc_ctrl_head) { 324 r = USBD_NOMEM; 325 goto bad1; 326 } 327 sc->sc_ctrl_head->ed->ed_flags |= OHCI_ED_SKIP; 328 sc->sc_bulk_head = ohci_alloc_sed(sc); 329 if (!sc->sc_bulk_head) { 330 r = USBD_NOMEM; 331 goto bad2; 332 } 333 sc->sc_bulk_head->ed->ed_flags |= OHCI_ED_SKIP; 334 335 /* Allocate all the dummy EDs that make up the interrupt tree. */ 336 for (i = 0; i < OHCI_NO_EDS; i++) { 337 sed = ohci_alloc_sed(sc); 338 if (!sed) { 339 while (--i >= 0) 340 ohci_free_sed(sc, sc->sc_eds[i]); 341 r = USBD_NOMEM; 342 goto bad3; 343 } 344 /* All ED fields are set to 0. */ 345 sc->sc_eds[i] = sed; 346 sed->ed->ed_flags |= OHCI_ED_SKIP; 347 if (i != 0) { 348 psed = sc->sc_eds[(i-1) / 2]; 349 sed->next = psed; 350 sed->ed->ed_nexted = psed->physaddr; 351 } 352 } 353 /* 354 * Fill HCCA interrupt table. The bit reversal is to get 355 * the tree set up properly to spread the interrupts. 356 */ 357 for (i = 0; i < OHCI_NO_INTRS; i++) 358 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 359 sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr; 360 361 /* Determine in what context we are running. */ 362 ctl = OREAD4(sc, OHCI_CONTROL); 363 if (ctl & OHCI_IR) { 364 /* SMM active, request change */ 365 DPRINTF(("ohci_init: SMM active, request owner change\n")); 366 s = OREAD4(sc, OHCI_COMMAND_STATUS); 367 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 368 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 369 delay(1000); 370 ctl = OREAD4(sc, OHCI_CONTROL); 371 } 372 if ((ctl & OHCI_IR) == 0) { 373 printf("%s: SMM does not respond, resetting\n", 374 sc->sc_bus.bdev.dv_xname); 375 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 376 goto reset; 377 } 378 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 379 /* BIOS started controller. */ 380 DPRINTF(("ohci_init: BIOS active\n")); 381 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 382 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 383 delay(USB_RESUME_DELAY * 1000); 384 } 385 } else { 386 DPRINTF(("ohci_init: cold started\n")); 387 reset: 388 /* Controller was cold started. */ 389 delay(USB_RESET_DELAY * 1000); 390 } 391 392 /* We now own the host controller and the bus has been reset. */ 393 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 394 395 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 396 /* Nominal time for a reset is 10 us. */ 397 for (i = 0; i < 10; i++) { 398 delay(10); 399 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 400 if (!hcr) 401 break; 402 } 403 if (hcr) { 404 printf("%s: reset timeout\n", sc->sc_bus.bdev.dv_xname); 405 r = USBD_IOERROR; 406 goto bad3; 407 } 408 #ifdef USB_DEBUG 409 thesc = sc; 410 if (ohcidebug > 15) 411 ohci_dumpregs(sc); 412 #endif 413 414 /* The controller is now in suspend state, we have 2ms to finish. */ 415 416 /* Set up HC registers. */ 417 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 418 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 419 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 420 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 421 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 422 ctl = OREAD4(sc, OHCI_CONTROL); 423 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 424 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 425 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 426 /* And finally start it! */ 427 OWRITE4(sc, OHCI_CONTROL, ctl); 428 429 /* 430 * The controller is now OPERATIONAL. Set a some final 431 * registers that should be set earlier, but that the 432 * controller ignores when in the SUSPEND state. 433 */ 434 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 435 fm |= OHCI_FSMPS(ival) | ival; 436 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 437 per = OHCI_PERIODIC(ival); /* 90% periodic */ 438 OWRITE4(sc, OHCI_PERIODIC_START, per); 439 440 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 441 442 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 443 printf("%s: %d downstream port%s\n", 444 sc->sc_bus.bdev.dv_xname, sc->sc_noport, 445 sc->sc_noport != 1 ? "s" : ""); 446 447 #ifdef USB_DEBUG 448 if (ohcidebug > 5) 449 ohci_dumpregs(sc); 450 #endif 451 452 /* Set up the bus struct. */ 453 sc->sc_bus.open_pipe = ohci_open; 454 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 455 456 return (USBD_NORMAL_COMPLETION); 457 458 bad3: 459 ohci_free_sed(sc, sc->sc_ctrl_head); 460 bad2: 461 ohci_free_sed(sc, sc->sc_bulk_head); 462 bad1: 463 usb_freemem(sc->sc_dmatag, &sc->sc_hccadma); 464 return (r); 465 } 466 467 #ifdef USB_DEBUG 468 void ohcidump(void); 469 void ohcidump(void) { ohci_dumpregs(thesc); } 470 471 void 472 ohci_dumpregs(sc) 473 ohci_softc_t *sc; 474 { 475 printf("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 476 OREAD4(sc, OHCI_REVISION), 477 OREAD4(sc, OHCI_CONTROL), 478 OREAD4(sc, OHCI_COMMAND_STATUS)); 479 printf(" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 480 OREAD4(sc, OHCI_INTERRUPT_STATUS), 481 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 482 OREAD4(sc, OHCI_INTERRUPT_DISABLE)); 483 printf(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 484 OREAD4(sc, OHCI_HCCA), 485 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 486 OREAD4(sc, OHCI_CONTROL_HEAD_ED)); 487 printf(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 488 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 489 OREAD4(sc, OHCI_BULK_HEAD_ED), 490 OREAD4(sc, OHCI_BULK_CURRENT_ED)); 491 printf(" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 492 OREAD4(sc, OHCI_DONE_HEAD), 493 OREAD4(sc, OHCI_FM_INTERVAL), 494 OREAD4(sc, OHCI_FM_REMAINING)); 495 printf(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 496 OREAD4(sc, OHCI_FM_NUMBER), 497 OREAD4(sc, OHCI_PERIODIC_START), 498 OREAD4(sc, OHCI_LS_THRESHOLD)); 499 printf(" desca=0x%08x descb=0x%08x stat=0x%08x\n", 500 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 501 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 502 OREAD4(sc, OHCI_RH_STATUS)); 503 printf(" port1=0x%08x port2=0x%08x\n", 504 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 505 OREAD4(sc, OHCI_RH_PORT_STATUS(2))); 506 printf(" HCCA: frame_number=0x%04x done_head=0x%08x\n", 507 sc->sc_hcca->hcca_frame_number, 508 sc->sc_hcca->hcca_done_head); 509 } 510 #endif 511 512 int 513 ohci_intr(p) 514 void *p; 515 { 516 ohci_softc_t *sc = p; 517 u_int32_t intrs, eintrs; 518 ohci_physaddr_t done; 519 520 done = sc->sc_hcca->hcca_done_head; 521 if (done != 0) { 522 intrs = OHCI_WDH; 523 if (done & OHCI_DONE_INTRS) 524 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 525 } else 526 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 527 if (!intrs) 528 return (0); 529 intrs &= ~OHCI_MIE; 530 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 531 eintrs = intrs & sc->sc_eintrs; 532 if (!eintrs) 533 return (0); 534 535 sc->sc_intrs++; 536 DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n", 537 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 538 (u_int)eintrs)); 539 540 if (eintrs & OHCI_SO) { 541 printf("%s: scheduling overrun\n", sc->sc_bus.bdev.dv_xname); 542 /* XXX do what */ 543 intrs &= ~OHCI_SO; 544 } 545 if (eintrs & OHCI_WDH) { 546 ohci_process_done(sc, done &~ OHCI_DONE_INTRS); 547 sc->sc_hcca->hcca_done_head = 0; 548 intrs &= ~OHCI_WDH; 549 } 550 if (eintrs & OHCI_RD) { 551 /* XXX process resume detect */ 552 } 553 if (eintrs & OHCI_UE) { 554 printf("%s: unrecoverable error, controller halted\n", 555 sc->sc_bus.bdev.dv_xname); 556 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 557 /* XXX what else */ 558 } 559 if (eintrs & OHCI_RHSC) { 560 ohci_rhsc(sc, sc->sc_intrreqh); 561 intrs &= ~OHCI_RHSC; 562 563 /* 564 * Disable RHSC interrupt for now, because it will be 565 * on until the port has been reset. 566 */ 567 ohci_rhsc_able(sc, 0); 568 } 569 570 /* Block unprocessed interrupts. XXX */ 571 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 572 sc->sc_eintrs &= ~intrs; 573 574 return (1); 575 } 576 577 void 578 ohci_rhsc_able(sc, on) 579 ohci_softc_t *sc; 580 int on; 581 { 582 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 583 if (on) { 584 sc->sc_eintrs |= OHCI_RHSC; 585 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 586 } else { 587 sc->sc_eintrs &= ~OHCI_RHSC; 588 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 589 } 590 } 591 592 void 593 ohci_process_done(sc, done) 594 ohci_softc_t *sc; 595 ohci_physaddr_t done; 596 { 597 ohci_soft_td_t *std, *sdone; 598 usbd_request_handle reqh; 599 int len, cc; 600 601 DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done)); 602 603 /* Reverse the done list. */ 604 for (sdone = 0; done; done = std->td->td_nexttd) { 605 std = ohci_hash_find_td(sc, done); 606 std->dnext = sdone; 607 sdone = std; 608 } 609 610 #ifdef USB_DEBUG 611 if (ohcidebug > 10) { 612 printf("ohci_process_done: TD done:\n"); 613 ohci_dump_tds(sdone); 614 } 615 #endif 616 617 for (std = sdone; std; std = std->dnext) { 618 reqh = std->reqh; 619 DPRINTFN(10, ("ohci_process_done: std=%p reqh=%p\n",std,reqh)); 620 cc = OHCI_TD_GET_CC(std->td->td_flags); 621 if (cc == OHCI_CC_NO_ERROR) { 622 if (std->td->td_cbp == 0) 623 len = std->len; 624 else 625 len = std->td->td_be - std->td->td_cbp + 1; 626 reqh->actlen += len; 627 if (reqh->hcpriv == std) { 628 switch (reqh->pipe->endpoint->edesc->bmAttributes & UE_XFERTYPE) { 629 case UE_CONTROL: 630 ohci_ctrl_done(sc, reqh); 631 break; 632 case UE_INTERRUPT: 633 ohci_intr_done(sc, reqh); 634 break; 635 case UE_BULK: 636 ohci_bulk_done(sc, reqh); 637 break; 638 case UE_ISOCHRONOUS: 639 printf("ohci_process_done: ISO done?\n"); 640 break; 641 } 642 /* And finally execute callback. */ 643 reqh->status = USBD_NORMAL_COMPLETION; 644 reqh->xfercb(reqh); 645 } 646 } else { 647 ohci_soft_td_t *p, *n; 648 struct ohci_pipe *opipe = 649 (struct ohci_pipe *)reqh->pipe; 650 DPRINTFN(-1,("ohci_process_done: error cc=%d\n", 651 OHCI_TD_GET_CC(std->td->td_flags))); 652 /* 653 * Endpoint is halted. First unlink all the TDs 654 * belonging to the failed transfer, and then restart 655 * the endpoint. 656 */ 657 for (p = std->nexttd; p->reqh == reqh; p = n) { 658 n = p->nexttd; 659 ohci_hash_rem_td(sc, p); 660 ohci_free_std(sc, p); 661 } 662 opipe->sed->ed->ed_headp = p->physaddr;/* clear halt */ 663 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 664 665 if (cc == OHCI_CC_STALL) 666 reqh->status = USBD_STALLED; 667 else 668 reqh->status = USBD_IOERROR; 669 reqh->xfercb(reqh); 670 } 671 ohci_hash_rem_td(sc, std); 672 ohci_free_std(sc, std); 673 } 674 } 675 676 void 677 ohci_ctrl_done(sc, reqh) 678 ohci_softc_t *sc; 679 usbd_request_handle reqh; 680 { 681 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 682 u_int len = opipe->u.ctl.length; 683 usb_dma_t *dma; 684 685 DPRINTFN(10,("ohci_ctrl_done: reqh=%p\n", reqh)); 686 687 if (!reqh->isreq) { 688 panic("uhci_ctrl_done: not a request\n"); 689 return; 690 } 691 692 if (len != 0) { 693 dma = &opipe->u.ctl.datadma; 694 if (reqh->request.bmRequestType & UT_READ) 695 memcpy(reqh->buffer, KERNADDR(dma), len); 696 usb_freemem(sc->sc_dmatag, dma); 697 } 698 } 699 700 void 701 ohci_intr_done(sc, reqh) 702 ohci_softc_t *sc; 703 usbd_request_handle reqh; 704 { 705 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 706 usb_dma_t *dma; 707 ohci_soft_ed_t *sed = opipe->sed; 708 ohci_soft_td_t *xfer, *tail; 709 710 711 DPRINTFN(10,("ohci_intr_done: reqh=%p, actlen=%d\n", 712 reqh, reqh->actlen)); 713 714 dma = &opipe->u.intr.datadma; 715 memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen); 716 717 if (reqh->pipe->intrreqh == reqh) { 718 xfer = opipe->tail; 719 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 720 if (!tail) { 721 reqh->status = USBD_NOMEM; 722 return; 723 } 724 tail->reqh = 0; 725 726 xfer->td->td_flags = OHCI_TD_IN | OHCI_TD_NOCC | 727 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY; 728 xfer->td->td_cbp = DMAADDR(dma); 729 xfer->nexttd = tail; 730 xfer->td->td_nexttd = tail->physaddr; 731 xfer->td->td_be = xfer->td->td_cbp + reqh->length - 1; 732 xfer->len = reqh->length; 733 xfer->reqh = reqh; 734 735 reqh->actlen = 0; 736 reqh->hcpriv = xfer; 737 738 ohci_hash_add_td(sc, xfer); 739 sed->ed->ed_tailp = tail->physaddr; 740 opipe->tail = tail; 741 } else { 742 usb_freemem(sc->sc_dmatag, dma); 743 } 744 } 745 746 void 747 ohci_bulk_done(sc, reqh) 748 ohci_softc_t *sc; 749 usbd_request_handle reqh; 750 { 751 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 752 usb_dma_t *dma; 753 754 755 DPRINTFN(10,("ohci_bulk_done: reqh=%p, actlen=%d\n", 756 reqh, reqh->actlen)); 757 758 dma = &opipe->u.bulk.datadma; 759 if (reqh->request.bmRequestType & UT_READ) 760 memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen); 761 usb_freemem(sc->sc_dmatag, dma); 762 } 763 764 void 765 ohci_rhsc(sc, reqh) 766 ohci_softc_t *sc; 767 usbd_request_handle reqh; 768 { 769 usbd_pipe_handle pipe; 770 struct ohci_pipe *opipe; 771 u_char *p; 772 int i, m; 773 int hstatus; 774 775 hstatus = OREAD4(sc, OHCI_RH_STATUS); 776 DPRINTF(("ohci_rhsc: sc=%p reqh=%p hstatus=0x%08x\n", 777 sc, reqh, hstatus)); 778 779 if (reqh == 0) { 780 /* Just ignore the change. */ 781 return; 782 } 783 784 pipe = reqh->pipe; 785 opipe = (struct ohci_pipe *)pipe; 786 787 p = KERNADDR(&opipe->u.intr.datadma); 788 m = min(sc->sc_noport, reqh->length * 8 - 1); 789 memset(p, 0, reqh->length); 790 for (i = 1; i <= m; i++) { 791 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 792 p[i/8] |= 1 << (i%8); 793 } 794 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 795 reqh->actlen = reqh->length; 796 reqh->status = USBD_NORMAL_COMPLETION; 797 reqh->xfercb(reqh); 798 799 if (reqh->pipe->intrreqh != reqh) { 800 sc->sc_intrreqh = 0; 801 usb_freemem(sc->sc_dmatag, &opipe->u.intr.datadma); 802 } 803 } 804 805 /* 806 * Wait here until controller claims to have an interrupt. 807 * Then call ohci_intr and return. Use timeout to avoid waiting 808 * too long. 809 */ 810 void 811 ohci_waitintr(sc, reqh) 812 ohci_softc_t *sc; 813 usbd_request_handle reqh; 814 { 815 int timo = reqh->timeout; 816 int usecs; 817 u_int32_t intrs; 818 819 reqh->status = USBD_IN_PROGRESS; 820 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 821 delay(1000); 822 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 823 DPRINTFN(10,("ohci_waitintr: 0x%04x\n", intrs)); 824 #ifdef USB_DEBUG 825 if (ohcidebug > 15) 826 ohci_dumpregs(sc); 827 #endif 828 if (intrs) { 829 ohci_intr(sc); 830 if (reqh->status != USBD_IN_PROGRESS) 831 return; 832 } 833 } 834 DPRINTF(("ohci_waitintr: timeout\n")); 835 reqh->status = USBD_TIMEOUT; 836 reqh->xfercb(reqh); 837 } 838 839 usbd_status 840 ohci_device_request(reqh) 841 usbd_request_handle reqh; 842 { 843 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 844 usb_device_request_t *req = &reqh->request; 845 usbd_device_handle dev = opipe->pipe.device; 846 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 847 int addr = dev->address; 848 ohci_soft_td_t *setup, *xfer = 0, *stat, *next, *tail; 849 ohci_soft_ed_t *sed; 850 usb_dma_t *dmap; 851 int isread; 852 int len; 853 usbd_status r; 854 int s; 855 856 isread = req->bmRequestType & UT_READ; 857 len = UGETW(req->wLength); 858 859 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 860 req->bmRequestType, req->bRequest, UGETW(req->wValue), 861 UGETW(req->wIndex), len, addr, 862 opipe->pipe.endpoint->edesc->bEndpointAddress)); 863 864 setup = opipe->tail; 865 stat = ohci_alloc_std(sc); 866 if (!stat) { 867 r = USBD_NOMEM; 868 goto bad1; 869 } 870 tail = ohci_alloc_std(sc); 871 if (!tail) { 872 r = USBD_NOMEM; 873 goto bad2; 874 } 875 tail->reqh = 0; 876 877 sed = opipe->sed; 878 dmap = &opipe->u.ctl.datadma; 879 opipe->u.ctl.length = len; 880 881 /* Update device address */ 882 sed->ed->ed_flags = 883 (sed->ed->ed_flags & ~OHCI_ED_ADDRMASK) | 884 OHCI_ED_SET_FA(addr); 885 886 /* Set up data transaction */ 887 if (len != 0) { 888 xfer = ohci_alloc_std(sc); 889 if (!xfer) { 890 r = USBD_NOMEM; 891 goto bad3; 892 } 893 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 894 if (r != USBD_NORMAL_COMPLETION) 895 goto bad4; 896 xfer->td->td_flags = 897 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 898 OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR; 899 xfer->td->td_cbp = DMAADDR(dmap); 900 xfer->nexttd = stat; 901 xfer->td->td_nexttd = stat->physaddr; 902 xfer->td->td_be = xfer->td->td_cbp + len - 1; 903 xfer->len = len; 904 xfer->reqh = reqh; 905 906 next = xfer; 907 } else 908 next = stat; 909 910 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 911 if (!isread && len != 0) 912 memcpy(KERNADDR(dmap), reqh->buffer, len); 913 914 setup->td->td_flags = OHCI_TD_SETUP | OHCI_TD_NOCC | 915 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR; 916 setup->td->td_cbp = DMAADDR(&opipe->u.ctl.reqdma); 917 setup->nexttd = next; 918 setup->td->td_nexttd = next->physaddr; 919 setup->td->td_be = setup->td->td_cbp + sizeof *req - 1; 920 setup->len = 0; /* XXX The number of byte we count */ 921 setup->reqh = reqh; 922 923 stat->td->td_flags = 924 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC | 925 OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1); 926 stat->td->td_cbp = 0; 927 stat->nexttd = tail; 928 stat->td->td_nexttd = tail->physaddr; 929 stat->td->td_be = 0; 930 stat->len = 0; 931 stat->reqh = reqh; 932 933 reqh->actlen = 0; 934 reqh->hcpriv = stat; 935 936 #if USB_DEBUG 937 if (ohcidebug > 5) { 938 printf("ohci_device_request:\n"); 939 ohci_dump_ed(sed); 940 ohci_dump_tds(setup); 941 } 942 #endif 943 944 /* Insert ED in schedule */ 945 s = splusb(); 946 ohci_hash_add_td(sc, setup); 947 if (len != 0) 948 ohci_hash_add_td(sc, xfer); 949 ohci_hash_add_td(sc, stat); 950 sed->ed->ed_tailp = tail->physaddr; 951 opipe->tail = tail; 952 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 953 if (reqh->timeout && !usbd_use_polling) 954 timeout(ohci_timeout, reqh, MS_TO_TICKS(reqh->timeout)); 955 splx(s); 956 957 #if USB_DEBUG 958 if (ohcidebug > 5) { 959 delay(5000); 960 printf("ohci_device_request: status=%x\n", 961 OREAD4(sc, OHCI_COMMAND_STATUS)); 962 ohci_dump_ed(sed); 963 ohci_dump_tds(setup); 964 } 965 #endif 966 967 return (USBD_NORMAL_COMPLETION); 968 969 bad4: 970 ohci_free_std(sc, xfer); 971 bad3: 972 ohci_free_std(sc, tail); 973 bad2: 974 ohci_free_std(sc, stat); 975 bad1: 976 return (r); 977 } 978 979 /* 980 * Add an ED to the schedule. Called at splusb(). 981 */ 982 void 983 ohci_add_ed(sed, head) 984 ohci_soft_ed_t *sed; 985 ohci_soft_ed_t *head; 986 { 987 sed->next = head->next; 988 sed->ed->ed_nexted = head->ed->ed_nexted; 989 head->next = sed; 990 head->ed->ed_nexted = sed->physaddr; 991 } 992 993 /* 994 * Remove an ED from the schedule. Called at splusb(). 995 */ 996 void 997 ohci_rem_ed(sed, head) 998 ohci_soft_ed_t *sed; 999 ohci_soft_ed_t *head; 1000 { 1001 ohci_soft_ed_t *p; 1002 1003 /* XXX */ 1004 for (p = head; p && p->next != sed; p = p->next) 1005 ; 1006 if (!p) 1007 panic("ohci_rem_ed: ED not found\n"); 1008 p->next = sed->next; 1009 p->ed->ed_nexted = sed->ed->ed_nexted; 1010 } 1011 1012 /* 1013 * When a transfer is completed the TD is added to the done queue by 1014 * the host controller. This queue is the processed by software. 1015 * Unfortunately the queue contains the physical address of the TD 1016 * and we have no simple way to translate this back a kernel address. 1017 * To make the translation possible (and fast) we use a hash table of 1018 * TDs currently in the schedule. The physical address is used as the 1019 * hash value. 1020 */ 1021 1022 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1023 /* Called at splusb() */ 1024 void 1025 ohci_hash_add_td(sc, std) 1026 ohci_softc_t *sc; 1027 ohci_soft_td_t *std; 1028 { 1029 int h = HASH(std->physaddr); 1030 1031 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1032 } 1033 1034 /* Called at splusb() */ 1035 void 1036 ohci_hash_rem_td(sc, std) 1037 ohci_softc_t *sc; 1038 ohci_soft_td_t *std; 1039 { 1040 LIST_REMOVE(std, hnext); 1041 } 1042 1043 ohci_soft_td_t * 1044 ohci_hash_find_td(sc, a) 1045 ohci_softc_t *sc; 1046 ohci_physaddr_t a; 1047 { 1048 int h = HASH(a); 1049 ohci_soft_td_t *std; 1050 1051 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1052 std != 0; 1053 std = LIST_NEXT(std, hnext)) 1054 if (std->physaddr == a) 1055 return (std); 1056 panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a); 1057 } 1058 1059 void 1060 ohci_timeout(addr) 1061 void *addr; 1062 { 1063 #if 0 1064 usbd_request_handle *reqh = addr; 1065 int s; 1066 1067 DPRINTF(("ohci_timeout: reqh=%p\n", reqh)); 1068 s = splusb(); 1069 /* XXX need to inactivate TD before calling interrupt routine */ 1070 ohci_XXX_done(reqh); 1071 splx(s); 1072 #endif 1073 } 1074 1075 #ifdef USB_DEBUG 1076 void 1077 ohci_dump_tds(std) 1078 ohci_soft_td_t *std; 1079 { 1080 for (; std; std = std->nexttd) 1081 ohci_dump_td(std); 1082 } 1083 1084 void 1085 ohci_dump_td(std) 1086 ohci_soft_td_t *std; 1087 { 1088 printf("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx nexttd=0x%08lx be=0x%08lx\n", 1089 std, (u_long)std->physaddr, 1090 (u_long)std->td->td_flags, 1091 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1092 OHCI_TD_GET_DI(std->td->td_flags), 1093 OHCI_TD_GET_EC(std->td->td_flags), 1094 OHCI_TD_GET_CC(std->td->td_flags), 1095 (u_long)std->td->td_cbp, 1096 (u_long)std->td->td_nexttd, (u_long)std->td->td_be); 1097 } 1098 1099 void 1100 ohci_dump_ed(sed) 1101 ohci_soft_ed_t *sed; 1102 { 1103 printf("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx headp=%b nexted=0x%08lx\n", 1104 sed, (u_long)sed->physaddr, 1105 OHCI_ED_GET_FA(sed->ed->ed_flags), 1106 OHCI_ED_GET_EN(sed->ed->ed_flags), 1107 OHCI_ED_GET_MAXP(sed->ed->ed_flags), 1108 (u_long)sed->ed->ed_flags, 1109 "\20\14OUT\15IN\16LOWSPEED\17SKIP\18ISO", 1110 (u_long)sed->ed->ed_tailp, 1111 (u_long)sed->ed->ed_headp, "\20\1HALT\2CARRY", 1112 (u_long)sed->ed->ed_nexted); 1113 } 1114 #endif 1115 1116 usbd_status 1117 ohci_open(pipe) 1118 usbd_pipe_handle pipe; 1119 { 1120 usbd_device_handle dev = pipe->device; 1121 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1122 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1123 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1124 u_int8_t addr = dev->address; 1125 ohci_soft_ed_t *sed; 1126 ohci_soft_td_t *std; 1127 usbd_status r; 1128 int s; 1129 1130 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1131 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1132 if (addr == sc->sc_addr) { 1133 switch (ed->bEndpointAddress) { 1134 case USB_CONTROL_ENDPOINT: 1135 pipe->methods = &ohci_root_ctrl_methods; 1136 break; 1137 case UE_IN | OHCI_INTR_ENDPT: 1138 pipe->methods = &ohci_root_intr_methods; 1139 break; 1140 default: 1141 return (USBD_INVAL); 1142 } 1143 } else { 1144 sed = ohci_alloc_sed(sc); 1145 if (sed == 0) 1146 goto bad0; 1147 std = ohci_alloc_std(sc); 1148 if (std == 0) 1149 goto bad1; 1150 opipe->sed = sed; 1151 opipe->tail = std; 1152 sed->ed->ed_flags = 1153 OHCI_ED_SET_FA(addr) | 1154 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1155 OHCI_ED_DIR_TD | 1156 (dev->lowspeed ? OHCI_ED_SPEED : 0) | 1157 ((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ? 1158 OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) | 1159 OHCI_ED_SET_MAXP(UGETW(pipe->endpoint->edesc->wMaxPacketSize)); 1160 sed->ed->ed_headp = sed->ed->ed_tailp = std->physaddr; 1161 1162 switch (ed->bmAttributes & UE_XFERTYPE) { 1163 case UE_CONTROL: 1164 pipe->methods = &ohci_device_ctrl_methods; 1165 r = usb_allocmem(sc->sc_dmatag, 1166 sizeof(usb_device_request_t), 1167 0, &opipe->u.ctl.reqdma); 1168 if (r != USBD_NORMAL_COMPLETION) 1169 goto bad; 1170 s = splusb(); 1171 ohci_add_ed(sed, sc->sc_ctrl_head); 1172 splx(s); 1173 break; 1174 case UE_INTERRUPT: 1175 pipe->methods = &ohci_device_intr_methods; 1176 return (ohci_device_setintr(sc, opipe, ed->bInterval)); 1177 case UE_ISOCHRONOUS: 1178 printf("ohci_open: open iso unimplemented\n"); 1179 return (USBD_XXX); 1180 case UE_BULK: 1181 pipe->methods = &ohci_device_bulk_methods; 1182 s = splusb(); 1183 ohci_add_ed(sed, sc->sc_bulk_head); 1184 splx(s); 1185 break; 1186 } 1187 } 1188 return (USBD_NORMAL_COMPLETION); 1189 1190 bad: 1191 ohci_free_std(sc, std); 1192 bad1: 1193 ohci_free_sed(sc, sed); 1194 bad0: 1195 return (USBD_NOMEM); 1196 1197 } 1198 1199 /* 1200 * Data structures and routines to emulate the root hub. 1201 */ 1202 usb_device_descriptor_t ohci_devd = { 1203 USB_DEVICE_DESCRIPTOR_SIZE, 1204 UDESC_DEVICE, /* type */ 1205 {0x00, 0x01}, /* USB version */ 1206 UCLASS_HUB, /* class */ 1207 USUBCLASS_HUB, /* subclass */ 1208 0, /* protocol */ 1209 64, /* max packet */ 1210 {0},{0},{0x00,0x01}, /* device id */ 1211 1,2,0, /* string indicies */ 1212 1 /* # of configurations */ 1213 }; 1214 1215 usb_config_descriptor_t ohci_confd = { 1216 USB_CONFIG_DESCRIPTOR_SIZE, 1217 UDESC_CONFIG, 1218 {USB_CONFIG_DESCRIPTOR_SIZE + 1219 USB_INTERFACE_DESCRIPTOR_SIZE + 1220 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1221 1, 1222 1, 1223 0, 1224 UC_SELF_POWERED, 1225 0 /* max power */ 1226 }; 1227 1228 usb_interface_descriptor_t ohci_ifcd = { 1229 USB_INTERFACE_DESCRIPTOR_SIZE, 1230 UDESC_INTERFACE, 1231 0, 1232 0, 1233 1, 1234 UCLASS_HUB, 1235 USUBCLASS_HUB, 1236 0, 1237 0 1238 }; 1239 1240 usb_endpoint_descriptor_t ohci_endpd = { 1241 USB_ENDPOINT_DESCRIPTOR_SIZE, 1242 UDESC_ENDPOINT, 1243 UE_IN | OHCI_INTR_ENDPT, 1244 UE_INTERRUPT, 1245 {8, 0}, /* max packet */ 1246 255 1247 }; 1248 1249 usb_hub_descriptor_t ohci_hubd = { 1250 USB_HUB_DESCRIPTOR_SIZE, 1251 UDESC_HUB, 1252 0, 1253 {0,0}, 1254 0, 1255 0, 1256 {0}, 1257 {0}, 1258 }; 1259 1260 int 1261 ohci_str(p, l, s) 1262 usb_string_descriptor_t *p; 1263 int l; 1264 char *s; 1265 { 1266 int i; 1267 1268 if (l == 0) 1269 return (0); 1270 p->bLength = 2 * strlen(s) + 2; 1271 if (l == 1) 1272 return (1); 1273 p->bDescriptorType = UDESC_STRING; 1274 l -= 2; 1275 for (i = 0; s[i] && l > 1; i++, l -= 2) 1276 USETW2(p->bString[i], 0, s[i]); 1277 return (2*i+2); 1278 } 1279 1280 /* 1281 * Simulate a hardware hub by handling all the necessary requests. 1282 */ 1283 usbd_status 1284 ohci_root_ctrl_transfer(reqh) 1285 usbd_request_handle reqh; 1286 { 1287 ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus; 1288 usb_device_request_t *req; 1289 void *buf; 1290 int port, i; 1291 int len, value, index, l, totlen = 0; 1292 usb_port_status_t ps; 1293 usb_hub_descriptor_t hubd; 1294 usbd_status r; 1295 u_int32_t v; 1296 1297 if (!reqh->isreq) 1298 /* XXX panic */ 1299 return (USBD_INVAL); 1300 req = &reqh->request; 1301 buf = reqh->buffer; 1302 1303 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 1304 req->bmRequestType, req->bRequest)); 1305 1306 len = UGETW(req->wLength); 1307 value = UGETW(req->wValue); 1308 index = UGETW(req->wIndex); 1309 #define C(x,y) ((x) | ((y) << 8)) 1310 switch(C(req->bRequest, req->bmRequestType)) { 1311 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1312 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1313 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1314 /* 1315 * DEVICE_REMOTE_WAKEUP and ENDPOINT_STALL are no-ops 1316 * for the integrated root hub. 1317 */ 1318 break; 1319 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1320 if (len > 0) { 1321 *(u_int8_t *)buf = sc->sc_conf; 1322 totlen = 1; 1323 } 1324 break; 1325 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1326 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 1327 switch(value >> 8) { 1328 case UDESC_DEVICE: 1329 if ((value & 0xff) != 0) { 1330 r = USBD_IOERROR; 1331 goto ret; 1332 } 1333 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1334 memcpy(buf, &ohci_devd, l); 1335 break; 1336 case UDESC_CONFIG: 1337 if ((value & 0xff) != 0) { 1338 r = USBD_IOERROR; 1339 goto ret; 1340 } 1341 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1342 memcpy(buf, &ohci_confd, l); 1343 buf = (char *)buf + l; 1344 len -= l; 1345 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1346 totlen += l; 1347 memcpy(buf, &ohci_ifcd, l); 1348 buf = (char *)buf + l; 1349 len -= l; 1350 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1351 totlen += l; 1352 memcpy(buf, &ohci_endpd, l); 1353 break; 1354 case UDESC_STRING: 1355 if (len == 0) 1356 break; 1357 *(u_int8_t *)buf = 0; 1358 totlen = 1; 1359 switch (value & 0xff) { 1360 case 1: /* Vendor */ 1361 totlen = ohci_str(buf, len, sc->sc_vendor); 1362 break; 1363 case 2: /* Product */ 1364 totlen = ohci_str(buf, len, "OHCI root hub"); 1365 break; 1366 } 1367 break; 1368 default: 1369 r = USBD_IOERROR; 1370 goto ret; 1371 } 1372 break; 1373 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1374 if (len > 0) { 1375 *(u_int8_t *)buf = 0; 1376 totlen = 1; 1377 } 1378 break; 1379 case C(UR_GET_STATUS, UT_READ_DEVICE): 1380 if (len > 1) { 1381 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1382 totlen = 2; 1383 } 1384 break; 1385 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1386 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1387 if (len > 1) { 1388 USETW(((usb_status_t *)buf)->wStatus, 0); 1389 totlen = 2; 1390 } 1391 break; 1392 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1393 if (value >= USB_MAX_DEVICES) { 1394 r = USBD_IOERROR; 1395 goto ret; 1396 } 1397 sc->sc_addr = value; 1398 break; 1399 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1400 if (value != 0 && value != 1) { 1401 r = USBD_IOERROR; 1402 goto ret; 1403 } 1404 sc->sc_conf = value; 1405 break; 1406 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1407 break; 1408 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1409 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1410 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1411 r = USBD_IOERROR; 1412 goto ret; 1413 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1414 break; 1415 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1416 break; 1417 /* Hub requests */ 1418 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1419 break; 1420 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1421 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE port=%d feature=%d\n", 1422 index, value)); 1423 if (index < 1 || index > sc->sc_noport) { 1424 r = USBD_IOERROR; 1425 goto ret; 1426 } 1427 port = OHCI_RH_PORT_STATUS(index); 1428 switch(value) { 1429 case UHF_PORT_ENABLE: 1430 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 1431 break; 1432 case UHF_PORT_SUSPEND: 1433 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 1434 break; 1435 case UHF_PORT_POWER: 1436 OWRITE4(sc, port, UPS_LOW_SPEED); 1437 break; 1438 case UHF_C_PORT_CONNECTION: 1439 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 1440 break; 1441 case UHF_C_PORT_ENABLE: 1442 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 1443 break; 1444 case UHF_C_PORT_SUSPEND: 1445 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 1446 break; 1447 case UHF_C_PORT_OVER_CURRENT: 1448 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 1449 break; 1450 case UHF_C_PORT_RESET: 1451 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 1452 break; 1453 default: 1454 r = USBD_IOERROR; 1455 goto ret; 1456 } 1457 switch(value) { 1458 case UHF_C_PORT_CONNECTION: 1459 case UHF_C_PORT_ENABLE: 1460 case UHF_C_PORT_SUSPEND: 1461 case UHF_C_PORT_OVER_CURRENT: 1462 case UHF_C_PORT_RESET: 1463 /* Enable RHSC interrupt if condition is cleared. */ 1464 if ((OREAD4(sc, port) >> 16) == 0) 1465 ohci_rhsc_able(sc, 1); 1466 break; 1467 default: 1468 break; 1469 } 1470 break; 1471 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1472 if (value != 0) { 1473 r = USBD_IOERROR; 1474 goto ret; 1475 } 1476 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 1477 hubd = ohci_hubd; 1478 hubd.bNbrPorts = sc->sc_noport; 1479 USETW(hubd.bHubCharacteristics, 1480 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 1481 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 1482 /* XXX overcurrent */ 1483 ); 1484 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 1485 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 1486 if (sc->sc_noport < 8) { 1487 hubd.DeviceRemovable[0] = (u_int8_t)v; 1488 hubd.PortPowerCtrlMask[0] = (u_int8_t)(v >> 16); 1489 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE; 1490 } else { 1491 hubd.DeviceRemovable[0] = (u_int8_t)v; 1492 hubd.DeviceRemovable[1] = (u_int8_t)(v>>8); 1493 hubd.PortPowerCtrlMask[1] = (u_int8_t)(v >> 16); 1494 hubd.PortPowerCtrlMask[2] = (u_int8_t)(v >> 24); 1495 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + 2; 1496 } 1497 l = min(len, hubd.bDescLength); 1498 totlen = l; 1499 memcpy(buf, &hubd, l); 1500 break; 1501 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1502 if (len != 4) { 1503 r = USBD_IOERROR; 1504 goto ret; 1505 } 1506 memset(buf, 0, len); /* ? XXX */ 1507 totlen = len; 1508 break; 1509 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1510 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 1511 index)); 1512 if (index < 1 || index > sc->sc_noport) { 1513 r = USBD_IOERROR; 1514 goto ret; 1515 } 1516 if (len != 4) { 1517 r = USBD_IOERROR; 1518 goto ret; 1519 } 1520 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 1521 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 1522 v)); 1523 USETW(ps.wPortStatus, v); 1524 USETW(ps.wPortChange, v >> 16); 1525 l = min(len, sizeof ps); 1526 memcpy(buf, &ps, l); 1527 totlen = l; 1528 break; 1529 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1530 r = USBD_IOERROR; 1531 goto ret; 1532 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1533 break; 1534 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1535 if (index < 1 || index > sc->sc_noport) { 1536 r = USBD_IOERROR; 1537 goto ret; 1538 } 1539 port = OHCI_RH_PORT_STATUS(index); 1540 switch(value) { 1541 case UHF_PORT_ENABLE: 1542 OWRITE4(sc, port, UPS_PORT_ENABLED); 1543 break; 1544 case UHF_PORT_SUSPEND: 1545 OWRITE4(sc, port, UPS_SUSPEND); 1546 break; 1547 case UHF_PORT_RESET: 1548 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", index)); 1549 OWRITE4(sc, port, UPS_RESET); 1550 for (i = 0; i < 10; i++) { 1551 usbd_delay_ms(10); 1552 if ((OREAD4(sc, port) & UPS_RESET) == 0) 1553 break; 1554 } 1555 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 1556 index, OREAD4(sc, port))); 1557 break; 1558 case UHF_PORT_POWER: 1559 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power %d\n", index)); 1560 OWRITE4(sc, port, UPS_PORT_POWER); 1561 break; 1562 default: 1563 r = USBD_IOERROR; 1564 goto ret; 1565 } 1566 break; 1567 default: 1568 r = USBD_IOERROR; 1569 goto ret; 1570 } 1571 reqh->actlen = totlen; 1572 r = USBD_NORMAL_COMPLETION; 1573 ret: 1574 reqh->status = r; 1575 reqh->xfercb(reqh); 1576 return (USBD_IN_PROGRESS); 1577 } 1578 1579 /* Abort a root control request. */ 1580 void 1581 ohci_root_ctrl_abort(reqh) 1582 usbd_request_handle reqh; 1583 { 1584 /* Nothing to do, all transfers are syncronous. */ 1585 } 1586 1587 /* Close the root pipe. */ 1588 void 1589 ohci_root_ctrl_close(pipe) 1590 usbd_pipe_handle pipe; 1591 { 1592 DPRINTF(("ohci_root_ctrl_close\n")); 1593 } 1594 1595 usbd_status 1596 ohci_root_intr_transfer(reqh) 1597 usbd_request_handle reqh; 1598 { 1599 usbd_pipe_handle pipe = reqh->pipe; 1600 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1601 struct ohci_pipe *upipe = (struct ohci_pipe *)pipe; 1602 usb_dma_t *dmap; 1603 usbd_status r; 1604 int len; 1605 1606 len = reqh->length; 1607 dmap = &upipe->u.intr.datadma; 1608 if (len == 0) 1609 return (USBD_INVAL); /* XXX should it be? */ 1610 1611 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1612 if (r != USBD_NORMAL_COMPLETION) 1613 return (r); 1614 sc->sc_intrreqh = reqh; 1615 1616 return (USBD_IN_PROGRESS); 1617 } 1618 1619 /* Abort a root interrupt request. */ 1620 void 1621 ohci_root_intr_abort(reqh) 1622 usbd_request_handle reqh; 1623 { 1624 /* No need to abort. */ 1625 } 1626 1627 /* Close the root pipe. */ 1628 void 1629 ohci_root_intr_close(pipe) 1630 usbd_pipe_handle pipe; 1631 { 1632 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1633 sc->sc_intrreqh = 0; 1634 1635 DPRINTF(("ohci_root_intr_close\n")); 1636 } 1637 1638 /************************/ 1639 1640 usbd_status 1641 ohci_device_ctrl_transfer(reqh) 1642 usbd_request_handle reqh; 1643 { 1644 usbd_status r; 1645 1646 if (!reqh->isreq) { 1647 /* XXX panic */ 1648 printf("ohci_device_ctrl_transfer: not a request\n"); 1649 return (USBD_INVAL); 1650 } 1651 1652 r = ohci_device_request(reqh); 1653 if (r != USBD_NORMAL_COMPLETION) 1654 return (r); 1655 1656 if (usbd_use_polling) 1657 ohci_waitintr((ohci_softc_t *)reqh->pipe->device->bus, reqh); 1658 return (USBD_IN_PROGRESS); 1659 } 1660 1661 /* Abort a device control request. */ 1662 void 1663 ohci_device_ctrl_abort(reqh) 1664 usbd_request_handle reqh; 1665 { 1666 /* XXX inactivate */ 1667 usbd_delay_ms(1); /* make sure it is finished */ 1668 /* XXX call done */ 1669 } 1670 1671 /* Close a device control pipe. */ 1672 void 1673 ohci_device_ctrl_close(pipe) 1674 usbd_pipe_handle pipe; 1675 { 1676 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1677 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1678 ohci_soft_ed_t *sed = opipe->sed; 1679 int s; 1680 1681 s = splusb(); 1682 sed->ed->ed_flags |= OHCI_ED_SKIP; 1683 if ((sed->ed->ed_tailp & OHCI_TAILMASK) != sed->ed->ed_headp) 1684 usbd_delay_ms(2); 1685 ohci_rem_ed(sed, sc->sc_ctrl_head); 1686 splx(s); 1687 ohci_free_std(sc, opipe->tail); 1688 ohci_free_sed(sc, opipe->sed); 1689 /* XXX free other resources */ 1690 } 1691 1692 /************************/ 1693 1694 usbd_status 1695 ohci_device_bulk_transfer(reqh) 1696 usbd_request_handle reqh; 1697 { 1698 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 1699 usbd_device_handle dev = opipe->pipe.device; 1700 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1701 int addr = dev->address; 1702 ohci_soft_td_t *xfer, *tail; 1703 ohci_soft_ed_t *sed; 1704 usb_dma_t *dmap; 1705 usbd_status r; 1706 int s, len, isread; 1707 1708 if (reqh->isreq) { 1709 /* XXX panic */ 1710 printf("ohci_device_bulk_transfer: a request\n"); 1711 return (USBD_INVAL); 1712 } 1713 1714 len = reqh->length; 1715 dmap = &opipe->u.bulk.datadma; 1716 isread = reqh->pipe->endpoint->edesc->bEndpointAddress & UE_IN; 1717 sed = opipe->sed; 1718 1719 opipe->u.bulk.length = len; 1720 1721 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1722 if (r != USBD_NORMAL_COMPLETION) 1723 goto ret1; 1724 1725 tail = ohci_alloc_std(sc); 1726 if (!tail) { 1727 r = USBD_NOMEM; 1728 goto ret2; 1729 } 1730 tail->reqh = 0; 1731 1732 /* Update device address */ 1733 sed->ed->ed_flags = 1734 (sed->ed->ed_flags & ~OHCI_ED_ADDRMASK) | 1735 OHCI_ED_SET_FA(addr); 1736 1737 /* Set up data transaction */ 1738 xfer = opipe->tail; 1739 xfer->td->td_flags = 1740 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 1741 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY; 1742 xfer->td->td_cbp = DMAADDR(dmap); 1743 xfer->nexttd = tail; 1744 xfer->td->td_nexttd = tail->physaddr; 1745 xfer->td->td_be = xfer->td->td_cbp + len - 1; 1746 xfer->len = len; 1747 xfer->reqh = reqh; 1748 1749 reqh->actlen = 0; 1750 reqh->hcpriv = xfer; 1751 1752 if (!isread) 1753 memcpy(KERNADDR(dmap), reqh->buffer, len); 1754 1755 /* Insert ED in schedule */ 1756 s = splusb(); 1757 ohci_hash_add_td(sc, xfer); 1758 sed->ed->ed_tailp = tail->physaddr; 1759 opipe->tail = tail; 1760 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 1761 if (reqh->timeout && !usbd_use_polling) 1762 timeout(ohci_timeout, reqh, MS_TO_TICKS(reqh->timeout)); 1763 splx(s); 1764 1765 return (USBD_IN_PROGRESS); 1766 1767 ret2: 1768 usb_freemem(sc->sc_dmatag, dmap); 1769 ret1: 1770 return (r); 1771 } 1772 1773 /* Abort a device bulk request. */ 1774 void 1775 ohci_device_bulk_abort(reqh) 1776 usbd_request_handle reqh; 1777 { 1778 #if 0 1779 sed->ed->ed_flags |= OHCI_ED_SKIP; 1780 if ((sed->ed->ed_tailp & OHCI_TAILMASK) != sed->ed->ed_headp) 1781 usbd_delay_ms(2); 1782 #endif 1783 /* XXX inactivate */ 1784 usbd_delay_ms(1); /* make sure it is finished */ 1785 /* XXX call done */ 1786 } 1787 1788 /* Close a device bulk pipe. */ 1789 void 1790 ohci_device_bulk_close(pipe) 1791 usbd_pipe_handle pipe; 1792 { 1793 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1794 usbd_device_handle dev = opipe->pipe.device; 1795 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1796 int s; 1797 1798 s = splusb(); 1799 ohci_rem_ed(opipe->sed, sc->sc_bulk_head); 1800 splx(s); 1801 ohci_free_std(sc, opipe->tail); 1802 ohci_free_sed(sc, opipe->sed); 1803 /* XXX free other resources */ 1804 } 1805 1806 /************************/ 1807 1808 usbd_status 1809 ohci_device_intr_transfer(reqh) 1810 usbd_request_handle reqh; 1811 { 1812 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 1813 usbd_device_handle dev = opipe->pipe.device; 1814 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1815 ohci_soft_ed_t *sed = opipe->sed; 1816 ohci_soft_td_t *xfer, *tail; 1817 usb_dma_t *dmap; 1818 usbd_status r; 1819 int len; 1820 int s; 1821 1822 DPRINTFN(3, ("ohci_device_intr_transfer: reqh=%p buf=%p len=%d flags=%d priv=%p\n", 1823 reqh, reqh->buffer, reqh->length, reqh->flags, reqh->priv)); 1824 1825 if (reqh->isreq) 1826 panic("ohci_device_intr_transfer: a request\n"); 1827 1828 len = reqh->length; 1829 dmap = &opipe->u.intr.datadma; 1830 if (len == 0) 1831 return (USBD_INVAL); /* XXX should it be? */ 1832 1833 xfer = opipe->tail; 1834 tail = ohci_alloc_std(sc); 1835 if (!tail) { 1836 r = USBD_NOMEM; 1837 goto ret1; 1838 } 1839 tail->reqh = 0; 1840 1841 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1842 if (r != USBD_NORMAL_COMPLETION) 1843 goto ret2; 1844 1845 xfer->td->td_flags = OHCI_TD_IN | OHCI_TD_NOCC | 1846 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY; 1847 xfer->td->td_cbp = DMAADDR(dmap); 1848 xfer->nexttd = tail; 1849 xfer->td->td_nexttd = tail->physaddr; 1850 xfer->td->td_be = xfer->td->td_cbp + len - 1; 1851 xfer->len = len; 1852 xfer->reqh = reqh; 1853 1854 reqh->actlen = 0; 1855 reqh->hcpriv = xfer; 1856 1857 #if USB_DEBUG 1858 if (ohcidebug > 5) { 1859 printf("ohci_device_intr_transfer:\n"); 1860 ohci_dump_ed(sed); 1861 ohci_dump_tds(xfer); 1862 } 1863 #endif 1864 1865 /* Insert ED in schedule */ 1866 s = splusb(); 1867 ohci_hash_add_td(sc, xfer); 1868 sed->ed->ed_tailp = tail->physaddr; 1869 opipe->tail = tail; 1870 #if 0 1871 if (reqh->timeout && !usbd_use_polling) 1872 timeout(ohci_timeout, reqh, MS_TO_TICKS(reqh->timeout)); 1873 #endif 1874 sed->ed->ed_flags &= ~OHCI_ED_SKIP; 1875 splx(s); 1876 1877 #ifdef USB_DEBUG 1878 if (ohcidebug > 5) { 1879 delay(5000); 1880 printf("ohci_device_intr_transfer: status=%x\n", 1881 OREAD4(sc, OHCI_COMMAND_STATUS)); 1882 ohci_dump_ed(sed); 1883 ohci_dump_tds(xfer); 1884 } 1885 #endif 1886 1887 return (USBD_IN_PROGRESS); 1888 1889 ret2: 1890 ohci_free_std(sc, xfer); 1891 ret1: 1892 return (r); 1893 } 1894 1895 /* Abort a device control request. */ 1896 void 1897 ohci_device_intr_abort(reqh) 1898 usbd_request_handle reqh; 1899 { 1900 struct uhci_pipe *opipe; 1901 1902 /* XXX inactivate */ 1903 usbd_delay_ms(1); /* make sure it is finished */ 1904 if (reqh->pipe->intrreqh == reqh) { 1905 DPRINTF(("ohci_device_intr_abort: remove\n")); 1906 reqh->pipe->intrreqh = 0; 1907 opipe = (struct uhci_pipe *)reqh->pipe; 1908 ohci_intr_done((ohci_softc_t *)reqh->pipe->device->bus, reqh); 1909 } 1910 } 1911 1912 /* Close a device interrupt pipe. */ 1913 void 1914 ohci_device_intr_close(pipe) 1915 usbd_pipe_handle pipe; 1916 { 1917 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1918 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1919 int nslots = opipe->u.intr.nslots; 1920 int pos = opipe->u.intr.pos; 1921 int j; 1922 ohci_soft_ed_t *p, *sed = opipe->sed; 1923 int s; 1924 1925 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 1926 pipe, nslots, pos)); 1927 s = splusb(); 1928 sed->ed->ed_flags |= OHCI_ED_SKIP; 1929 if ((sed->ed->ed_tailp & OHCI_TAILMASK) != sed->ed->ed_headp) 1930 usbd_delay_ms(2); 1931 1932 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 1933 ; 1934 if (!p) 1935 panic("ohci_device_intr_close: ED not found\n"); 1936 p->next = sed->next; 1937 p->ed->ed_nexted = sed->ed->ed_nexted; 1938 splx(s); 1939 1940 for (j = 0; j < nslots; j++) 1941 --sc->sc_bws[pos * nslots + j]; 1942 1943 ohci_free_std(sc, opipe->tail); 1944 ohci_free_sed(sc, opipe->sed); 1945 /* XXX free other resources */ 1946 } 1947 1948 usbd_status 1949 ohci_device_setintr(sc, opipe, ival) 1950 ohci_softc_t *sc; 1951 struct ohci_pipe *opipe; 1952 int ival; 1953 { 1954 int i, j, s, best; 1955 u_int npoll, slow, shigh, nslots; 1956 u_int bestbw, bw; 1957 ohci_soft_ed_t *hsed, *sed = opipe->sed; 1958 1959 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 1960 if (ival == 0) { 1961 printf("ohci_setintr: 0 interval\n"); 1962 return (USBD_INVAL); 1963 } 1964 1965 npoll = OHCI_NO_INTRS; 1966 while (npoll > ival) 1967 npoll /= 2; 1968 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 1969 1970 /* 1971 * We now know which level in the tree the ED must go into. 1972 * Figure out which slot has most bandwidth left over. 1973 * Slots to examine: 1974 * npoll 1975 * 1 0 1976 * 2 1 2 1977 * 4 3 4 5 6 1978 * 8 7 8 9 10 11 12 13 14 1979 * N (N-1) .. (N-1+N-1) 1980 */ 1981 slow = npoll-1; 1982 shigh = slow + npoll; 1983 nslots = OHCI_NO_INTRS / npoll; 1984 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 1985 bw = 0; 1986 for (j = 0; j < nslots; j++) 1987 bw += sc->sc_bws[i * nslots + j]; 1988 if (bw < bestbw) { 1989 best = i; 1990 bestbw = bw; 1991 } 1992 } 1993 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 1994 best, slow, shigh, bestbw)); 1995 1996 s = splusb(); 1997 hsed = sc->sc_eds[best]; 1998 sed->next = hsed->next; 1999 sed->ed->ed_nexted = hsed->ed->ed_nexted; 2000 hsed->next = sed; 2001 hsed->ed->ed_nexted = sed->physaddr; 2002 splx(s); 2003 2004 for (j = 0; j < nslots; j++) 2005 ++sc->sc_bws[best * nslots + j]; 2006 opipe->u.intr.nslots = nslots; 2007 opipe->u.intr.pos = best; 2008 2009 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 2010 return (USBD_NORMAL_COMPLETION); 2011 } 2012 2013
Indexes created Wed Sep 24 22:09:59 GMT 2025