ohci.c revision 1.41 1 /* $NetBSD: ohci.c,v 1.41 1999/09/05 21:22:38 augustss Exp $ */
2
3 /*
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Lennart Augustsson (augustss (at) carlstedt.se) at
9 * Carlstedt Research & Technology.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * USB Open Host Controller driver.
42 *
43 * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe
44 * USB spec: http://www.usb.org/developers/data/usb11.pdf
45 */
46
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/kernel.h>
50 #include <sys/malloc.h>
51 #if defined(__NetBSD__) || defined(__OpenBSD__)
52 #include <sys/device.h>
53 #elif defined(__FreeBSD__)
54 #include <sys/module.h>
55 #include <sys/bus.h>
56 #endif
57 #include <sys/proc.h>
58 #include <sys/queue.h>
59 #include <sys/select.h>
60
61 #include <machine/bus.h>
62 #include <machine/endian.h>
63
64 #include <dev/usb/usb.h>
65 #include <dev/usb/usbdi.h>
66 #include <dev/usb/usbdivar.h>
67 #include <dev/usb/usb_mem.h>
68 #include <dev/usb/usb_quirks.h>
69
70 #include <dev/usb/ohcireg.h>
71 #include <dev/usb/ohcivar.h>
72
73 #if defined(__FreeBSD__)
74 #include <machine/clock.h>
75
76 #define delay(d) DELAY(d)
77
78 #endif
79
80 #if defined(__OpenBSD__)
81 struct cfdriver ohci_cd = {
82 NULL, "ohci", DV_DULL
83 };
84 #endif
85
86 /*
87 * The OHCI controller is little endian, so on big endian machines
88 * the data strored in memory needs to be swapped.
89 */
90 #if BYTE_ORDER == BIG_ENDIAN
91 #define LE(x) (bswap32(x))
92 #else
93 #define LE(x) (x)
94 #endif
95
96 struct ohci_pipe;
97
98 ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *));
99 void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *));
100
101 ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *));
102 void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *));
103
104 void ohci_power __P((int, void *));
105 usbd_status ohci_open __P((usbd_pipe_handle));
106 void ohci_poll __P((struct usbd_bus *));
107 void ohci_waitintr __P((ohci_softc_t *, usbd_request_handle));
108 void ohci_rhsc __P((ohci_softc_t *, usbd_request_handle));
109 void ohci_process_done __P((ohci_softc_t *, ohci_physaddr_t));
110
111 usbd_status ohci_device_request __P((usbd_request_handle reqh));
112 void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
113 void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
114 void ohci_hash_add_td __P((ohci_softc_t *, ohci_soft_td_t *));
115 void ohci_hash_rem_td __P((ohci_softc_t *, ohci_soft_td_t *));
116 ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, ohci_physaddr_t));
117
118 usbd_status ohci_root_ctrl_transfer __P((usbd_request_handle));
119 usbd_status ohci_root_ctrl_start __P((usbd_request_handle));
120 void ohci_root_ctrl_abort __P((usbd_request_handle));
121 void ohci_root_ctrl_close __P((usbd_pipe_handle));
122
123 usbd_status ohci_root_intr_transfer __P((usbd_request_handle));
124 usbd_status ohci_root_intr_start __P((usbd_request_handle));
125 void ohci_root_intr_abort __P((usbd_request_handle));
126 void ohci_root_intr_close __P((usbd_pipe_handle));
127 void ohci_root_intr_done __P((usbd_request_handle));
128
129 usbd_status ohci_device_ctrl_transfer __P((usbd_request_handle));
130 usbd_status ohci_device_ctrl_start __P((usbd_request_handle));
131 void ohci_device_ctrl_abort __P((usbd_request_handle));
132 void ohci_device_ctrl_close __P((usbd_pipe_handle));
133 void ohci_device_ctrl_done __P((usbd_request_handle));
134
135 usbd_status ohci_device_bulk_transfer __P((usbd_request_handle));
136 usbd_status ohci_device_bulk_start __P((usbd_request_handle));
137 void ohci_device_bulk_abort __P((usbd_request_handle));
138 void ohci_device_bulk_close __P((usbd_pipe_handle));
139 void ohci_device_bulk_done __P((usbd_request_handle));
140
141 usbd_status ohci_device_intr_transfer __P((usbd_request_handle));
142 usbd_status ohci_device_intr_start __P((usbd_request_handle));
143 void ohci_device_intr_abort __P((usbd_request_handle));
144 void ohci_device_intr_close __P((usbd_pipe_handle));
145 void ohci_device_intr_done __P((usbd_request_handle));
146
147 usbd_status ohci_device_setintr __P((ohci_softc_t *sc,
148 struct ohci_pipe *pipe, int ival));
149
150 int ohci_str __P((usb_string_descriptor_t *, int, char *));
151
152 void ohci_timeout __P((void *));
153 void ohci_rhsc_able __P((ohci_softc_t *, int));
154
155 void ohci_close_pipe __P((usbd_pipe_handle pipe,
156 ohci_soft_ed_t *head));
157 void ohci_abort_req __P((usbd_request_handle reqh,
158 usbd_status status));
159 void ohci_abort_req_end __P((void *));
160
161 void ohci_device_clear_toggle __P((usbd_pipe_handle pipe));
162 void ohci_noop __P((usbd_pipe_handle pipe));
163
164 #ifdef USB_DEBUG
165 ohci_softc_t *thesc;
166 void ohci_dumpregs __P((ohci_softc_t *));
167 void ohci_dump_tds __P((ohci_soft_td_t *));
168 void ohci_dump_td __P((ohci_soft_td_t *));
169 void ohci_dump_ed __P((ohci_soft_ed_t *));
170 #endif
171
172 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
173 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
174 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
175
176 /* Reverse the bits in a value 0 .. 31 */
177 static u_int8_t revbits[OHCI_NO_INTRS] =
178 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
179 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
180 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
181 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
182
183 struct ohci_pipe {
184 struct usbd_pipe pipe;
185 ohci_soft_ed_t *sed;
186 ohci_soft_td_t *tail;
187 /* Info needed for different pipe kinds. */
188 union {
189 /* Control pipe */
190 struct {
191 usb_dma_t datadma;
192 usb_dma_t reqdma;
193 u_int length;
194 ohci_soft_td_t *setup, *xfer, *stat;
195 } ctl;
196 /* Interrupt pipe */
197 struct {
198 usb_dma_t datadma;
199 int nslots;
200 int pos;
201 } intr;
202 /* Bulk pipe */
203 struct {
204 usb_dma_t datadma;
205 u_int length;
206 int isread;
207 } bulk;
208 } u;
209 };
210
211 #define OHCI_INTR_ENDPT 1
212
213 struct usbd_methods ohci_root_ctrl_methods = {
214 ohci_root_ctrl_transfer,
215 ohci_root_ctrl_start,
216 ohci_root_ctrl_abort,
217 ohci_root_ctrl_close,
218 ohci_noop,
219 0,
220 0,
221 };
222
223 struct usbd_methods ohci_root_intr_methods = {
224 ohci_root_intr_transfer,
225 ohci_root_intr_start,
226 ohci_root_intr_abort,
227 ohci_root_intr_close,
228 ohci_noop,
229 ohci_root_intr_done,
230 0,
231 };
232
233 struct usbd_methods ohci_device_ctrl_methods = {
234 ohci_device_ctrl_transfer,
235 ohci_device_ctrl_start,
236 ohci_device_ctrl_abort,
237 ohci_device_ctrl_close,
238 ohci_noop,
239 ohci_device_ctrl_done,
240 0,
241 };
242
243 struct usbd_methods ohci_device_intr_methods = {
244 ohci_device_intr_transfer,
245 ohci_device_intr_start,
246 ohci_device_intr_abort,
247 ohci_device_intr_close,
248 ohci_device_clear_toggle,
249 ohci_device_intr_done,
250 0,
251 };
252
253 struct usbd_methods ohci_device_bulk_methods = {
254 ohci_device_bulk_transfer,
255 ohci_device_bulk_start,
256 ohci_device_bulk_abort,
257 ohci_device_bulk_close,
258 ohci_device_clear_toggle,
259 ohci_device_bulk_done,
260 0,
261 };
262
263 ohci_soft_ed_t *
264 ohci_alloc_sed(sc)
265 ohci_softc_t *sc;
266 {
267 ohci_soft_ed_t *sed;
268 usbd_status r;
269 int i, offs;
270 usb_dma_t dma;
271
272 if (!sc->sc_freeeds) {
273 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
274 r = usb_allocmem(sc->sc_dmatag, OHCI_SED_SIZE * OHCI_SED_CHUNK,
275 OHCI_ED_ALIGN, &dma);
276 if (r != USBD_NORMAL_COMPLETION)
277 return (0);
278 for(i = 0; i < OHCI_SED_CHUNK; i++) {
279 offs = i * OHCI_SED_SIZE;
280 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs);
281 sed->physaddr = DMAADDR(&dma) + offs;
282 sed->next = sc->sc_freeeds;
283 sc->sc_freeeds = sed;
284 }
285 }
286 sed = sc->sc_freeeds;
287 sc->sc_freeeds = sed->next;
288 memset(&sed->ed, 0, sizeof(ohci_ed_t));
289 sed->next = 0;
290 return (sed);
291 }
292
293 void
294 ohci_free_sed(sc, sed)
295 ohci_softc_t *sc;
296 ohci_soft_ed_t *sed;
297 {
298 sed->next = sc->sc_freeeds;
299 sc->sc_freeeds = sed;
300 }
301
302 ohci_soft_td_t *
303 ohci_alloc_std(sc)
304 ohci_softc_t *sc;
305 {
306 ohci_soft_td_t *std;
307 usbd_status r;
308 int i, offs;
309 usb_dma_t dma;
310
311 if (!sc->sc_freetds) {
312 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
313 r = usb_allocmem(sc->sc_dmatag, OHCI_STD_SIZE * OHCI_STD_CHUNK,
314 OHCI_TD_ALIGN, &dma);
315 if (r != USBD_NORMAL_COMPLETION)
316 return (0);
317 for(i = 0; i < OHCI_STD_CHUNK; i++) {
318 offs = i * OHCI_STD_SIZE;
319 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs);
320 std->physaddr = DMAADDR(&dma) + offs;
321 std->nexttd = sc->sc_freetds;
322 sc->sc_freetds = std;
323 }
324 }
325 std = sc->sc_freetds;
326 sc->sc_freetds = std->nexttd;
327 memset(&std->td, 0, sizeof(ohci_td_t));
328 std->nexttd = 0;
329 return (std);
330 }
331
332 void
333 ohci_free_std(sc, std)
334 ohci_softc_t *sc;
335 ohci_soft_td_t *std;
336 {
337 std->nexttd = sc->sc_freetds;
338 sc->sc_freetds = std;
339 }
340
341 usbd_status
342 ohci_init(sc)
343 ohci_softc_t *sc;
344 {
345 ohci_soft_ed_t *sed, *psed;
346 usbd_status r;
347 int rev;
348 int i;
349 u_int32_t s, ctl, ival, hcr, fm, per;
350
351 DPRINTF(("ohci_init: start\n"));
352 rev = OREAD4(sc, OHCI_REVISION);
353 #if defined(__OpenBSD__)
354 printf(", OHCI version %d.%d%s\n",
355 #else
356 printf("%s: OHCI version %d.%d%s\n", USBDEVNAME(sc->sc_bus.bdev),
357 #endif
358 OHCI_REV_HI(rev), OHCI_REV_LO(rev),
359 OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
360 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
361 printf("%s: unsupported OHCI revision\n",
362 USBDEVNAME(sc->sc_bus.bdev));
363 return (USBD_INVAL);
364 }
365
366 for (i = 0; i < OHCI_HASH_SIZE; i++)
367 LIST_INIT(&sc->sc_hash_tds[i]);
368
369 /* Allocate the HCCA area. */
370 r = usb_allocmem(sc->sc_dmatag, OHCI_HCCA_SIZE,
371 OHCI_HCCA_ALIGN, &sc->sc_hccadma);
372 if (r != USBD_NORMAL_COMPLETION)
373 return (r);
374 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma);
375 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
376
377 sc->sc_eintrs = OHCI_NORMAL_INTRS;
378
379 sc->sc_ctrl_head = ohci_alloc_sed(sc);
380 if (!sc->sc_ctrl_head) {
381 r = USBD_NOMEM;
382 goto bad1;
383 }
384 sc->sc_ctrl_head->ed.ed_flags |= LE(OHCI_ED_SKIP);
385
386 sc->sc_bulk_head = ohci_alloc_sed(sc);
387 if (!sc->sc_bulk_head) {
388 r = USBD_NOMEM;
389 goto bad2;
390 }
391 sc->sc_bulk_head->ed.ed_flags |= LE(OHCI_ED_SKIP);
392
393 /* Allocate all the dummy EDs that make up the interrupt tree. */
394 for (i = 0; i < OHCI_NO_EDS; i++) {
395 sed = ohci_alloc_sed(sc);
396 if (!sed) {
397 while (--i >= 0)
398 ohci_free_sed(sc, sc->sc_eds[i]);
399 r = USBD_NOMEM;
400 goto bad3;
401 }
402 /* All ED fields are set to 0. */
403 sc->sc_eds[i] = sed;
404 sed->ed.ed_flags |= LE(OHCI_ED_SKIP);
405 if (i != 0) {
406 psed = sc->sc_eds[(i-1) / 2];
407 sed->next = psed;
408 sed->ed.ed_nexted = LE(psed->physaddr);
409 }
410 }
411 /*
412 * Fill HCCA interrupt table. The bit reversal is to get
413 * the tree set up properly to spread the interrupts.
414 */
415 for (i = 0; i < OHCI_NO_INTRS; i++)
416 sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
417 LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
418
419 /* Determine in what context we are running. */
420 ctl = OREAD4(sc, OHCI_CONTROL);
421 if (ctl & OHCI_IR) {
422 /* SMM active, request change */
423 DPRINTF(("ohci_init: SMM active, request owner change\n"));
424 s = OREAD4(sc, OHCI_COMMAND_STATUS);
425 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
426 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
427 delay(1000);
428 ctl = OREAD4(sc, OHCI_CONTROL);
429 }
430 if ((ctl & OHCI_IR) == 0) {
431 printf("%s: SMM does not respond, resetting\n",
432 USBDEVNAME(sc->sc_bus.bdev));
433 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
434 goto reset;
435 }
436 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
437 /* BIOS started controller. */
438 DPRINTF(("ohci_init: BIOS active\n"));
439 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
440 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
441 delay(USB_RESUME_DELAY * 1000);
442 }
443 } else {
444 DPRINTF(("ohci_init: cold started\n"));
445 reset:
446 /* Controller was cold started. */
447 delay(USB_BUS_RESET_DELAY * 1000);
448 }
449
450 /*
451 * This reset should not be necessary according to the OHCI spec, but
452 * without it some controllers do not start.
453 */
454 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
455 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
456 delay(USB_BUS_RESET_DELAY * 1000);
457
458 /* We now own the host controller and the bus has been reset. */
459 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
460
461 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
462 /* Nominal time for a reset is 10 us. */
463 for (i = 0; i < 10; i++) {
464 delay(10);
465 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
466 if (!hcr)
467 break;
468 }
469 if (hcr) {
470 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
471 r = USBD_IOERROR;
472 goto bad3;
473 }
474 #ifdef USB_DEBUG
475 thesc = sc;
476 if (ohcidebug > 15)
477 ohci_dumpregs(sc);
478 #endif
479
480 /* The controller is now in suspend state, we have 2ms to finish. */
481
482 /* Set up HC registers. */
483 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma));
484 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
485 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
486 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
487 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
488 ctl = OREAD4(sc, OHCI_CONTROL);
489 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
490 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
491 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
492 /* And finally start it! */
493 OWRITE4(sc, OHCI_CONTROL, ctl);
494
495 /*
496 * The controller is now OPERATIONAL. Set a some final
497 * registers that should be set earlier, but that the
498 * controller ignores when in the SUSPEND state.
499 */
500 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
501 fm |= OHCI_FSMPS(ival) | ival;
502 OWRITE4(sc, OHCI_FM_INTERVAL, fm);
503 per = OHCI_PERIODIC(ival); /* 90% periodic */
504 OWRITE4(sc, OHCI_PERIODIC_START, per);
505
506 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
507
508 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
509
510 #ifdef USB_DEBUG
511 if (ohcidebug > 5)
512 ohci_dumpregs(sc);
513 #endif
514
515 /* Set up the bus struct. */
516 sc->sc_bus.open_pipe = ohci_open;
517 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
518 sc->sc_bus.do_poll = ohci_poll;
519
520 powerhook_establish(ohci_power, sc);
521
522 return (USBD_NORMAL_COMPLETION);
523
524 bad3:
525 ohci_free_sed(sc, sc->sc_ctrl_head);
526 bad2:
527 ohci_free_sed(sc, sc->sc_bulk_head);
528 bad1:
529 usb_freemem(sc->sc_dmatag, &sc->sc_hccadma);
530 return (r);
531 }
532
533 #if !defined(__OpenBSD__)
534 void
535 ohci_power(why, v)
536 int why;
537 void *v;
538 {
539 #ifdef USB_DEBUG
540 ohci_softc_t *sc = v;
541
542 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why));
543 /* XXX should suspend/resume */
544 ohci_dumpregs(sc);
545 #endif
546 }
547 #endif /* !defined(__OpenBSD__) */
548
549 #ifdef USB_DEBUG
550 void ohcidump(void);
551 void ohcidump(void) { ohci_dumpregs(thesc); }
552
553 void
554 ohci_dumpregs(sc)
555 ohci_softc_t *sc;
556 {
557 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
558 OREAD4(sc, OHCI_REVISION),
559 OREAD4(sc, OHCI_CONTROL),
560 OREAD4(sc, OHCI_COMMAND_STATUS)));
561 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
562 OREAD4(sc, OHCI_INTERRUPT_STATUS),
563 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
564 OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
565 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
566 OREAD4(sc, OHCI_HCCA),
567 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
568 OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
569 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
570 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
571 OREAD4(sc, OHCI_BULK_HEAD_ED),
572 OREAD4(sc, OHCI_BULK_CURRENT_ED)));
573 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
574 OREAD4(sc, OHCI_DONE_HEAD),
575 OREAD4(sc, OHCI_FM_INTERVAL),
576 OREAD4(sc, OHCI_FM_REMAINING)));
577 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
578 OREAD4(sc, OHCI_FM_NUMBER),
579 OREAD4(sc, OHCI_PERIODIC_START),
580 OREAD4(sc, OHCI_LS_THRESHOLD)));
581 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
582 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
583 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
584 OREAD4(sc, OHCI_RH_STATUS)));
585 DPRINTF((" port1=0x%08x port2=0x%08x\n",
586 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
587 OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
588 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
589 LE(sc->sc_hcca->hcca_frame_number),
590 LE(sc->sc_hcca->hcca_done_head)));
591 }
592 #endif
593
594 int
595 ohci_intr(p)
596 void *p;
597 {
598 ohci_softc_t *sc = p;
599 u_int32_t intrs, eintrs;
600 ohci_physaddr_t done;
601
602 /* In case the interrupt occurs before initialization has completed. */
603 if (sc == NULL || sc->sc_hcca == NULL) {
604 #ifdef DIAGNOSTIC
605 printf("ohci_intr: sc->sc_hcca == NULL\n");
606 #endif
607 return (0);
608 }
609
610 intrs = 0;
611 done = LE(sc->sc_hcca->hcca_done_head);
612 if (done != 0) {
613 sc->sc_hcca->hcca_done_head = 0;
614 if (done & ~OHCI_DONE_INTRS)
615 intrs = OHCI_WDH;
616 if (done & OHCI_DONE_INTRS)
617 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
618 } else
619 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
620 if (!intrs)
621 return (0);
622 intrs &= ~OHCI_MIE;
623 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
624 eintrs = intrs & sc->sc_eintrs;
625 if (!eintrs)
626 return (0);
627
628 sc->sc_intrs++;
629 DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n",
630 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
631 (u_int)eintrs));
632
633 if (eintrs & OHCI_SO) {
634 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev));
635 /* XXX do what */
636 intrs &= ~OHCI_SO;
637 }
638 if (eintrs & OHCI_WDH) {
639 ohci_process_done(sc, done &~ OHCI_DONE_INTRS);
640 intrs &= ~OHCI_WDH;
641 }
642 if (eintrs & OHCI_RD) {
643 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
644 /* XXX process resume detect */
645 }
646 if (eintrs & OHCI_UE) {
647 printf("%s: unrecoverable error, controller halted\n",
648 USBDEVNAME(sc->sc_bus.bdev));
649 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
650 /* XXX what else */
651 }
652 if (eintrs & OHCI_RHSC) {
653 ohci_rhsc(sc, sc->sc_intrreqh);
654 intrs &= ~OHCI_RHSC;
655
656 /*
657 * Disable RHSC interrupt for now, because it will be
658 * on until the port has been reset.
659 */
660 ohci_rhsc_able(sc, 0);
661 }
662
663 /* Block unprocessed interrupts. XXX */
664 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs);
665 sc->sc_eintrs &= ~intrs;
666
667 return (1);
668 }
669
670 void
671 ohci_rhsc_able(sc, on)
672 ohci_softc_t *sc;
673 int on;
674 {
675 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
676 if (on) {
677 sc->sc_eintrs |= OHCI_RHSC;
678 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
679 } else {
680 sc->sc_eintrs &= ~OHCI_RHSC;
681 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
682 }
683 }
684
685 #ifdef USB_DEBUG
686 char *ohci_cc_strs[] = {
687 "NO_ERROR",
688 "CRC",
689 "BIT_STUFFING",
690 "DATA_TOGGLE_MISMATCH",
691 "STALL",
692 "DEVICE_NOT_RESPONDING",
693 "PID_CHECK_FAILURE",
694 "UNEXPECTED_PID",
695 "DATA_OVERRUN",
696 "DATA_UNDERRUN",
697 "BUFFER_OVERRUN",
698 "BUFFER_UNDERRUN",
699 "NOT_ACCESSED",
700 };
701 #endif
702
703 void
704 ohci_process_done(sc, done)
705 ohci_softc_t *sc;
706 ohci_physaddr_t done;
707 {
708 ohci_soft_td_t *std, *sdone;
709 usbd_request_handle reqh;
710 int len, cc;
711
712 DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done));
713
714 /* Reverse the done list. */
715 for (sdone = 0; done; done = LE(std->td.td_nexttd)) {
716 std = ohci_hash_find_td(sc, done);
717 std->dnext = sdone;
718 sdone = std;
719 }
720
721 #ifdef USB_DEBUG
722 if (ohcidebug > 10) {
723 DPRINTF(("ohci_process_done: TD done:\n"));
724 ohci_dump_tds(sdone);
725 }
726 #endif
727
728 for (std = sdone; std; std = std->dnext) {
729 reqh = std->reqh;
730 DPRINTFN(10, ("ohci_process_done: std=%p reqh=%p hcpriv=%p\n",
731 std, reqh, reqh->hcpriv));
732 cc = OHCI_TD_GET_CC(LE(std->td.td_flags));
733 usb_untimeout(ohci_timeout, reqh, reqh->timo_handle);
734 if (reqh->status == USBD_CANCELLED ||
735 reqh->status == USBD_TIMEOUT) {
736 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
737 reqh));
738 /* Handled by abort routine. */
739 continue;
740 } else if (cc == OHCI_CC_NO_ERROR) {
741 len = std->len;
742 if (std->td.td_cbp != 0)
743 len -= LE(std->td.td_be) -
744 LE(std->td.td_cbp) + 1;
745 if (std->flags & OHCI_SET_LEN)
746 reqh->actlen = len;
747 if (std->flags & OHCI_CALL_DONE) {
748 reqh->status = USBD_NORMAL_COMPLETION;
749 usb_transfer_complete(reqh);
750 }
751 } else {
752 ohci_soft_td_t *p, *n;
753 struct ohci_pipe *opipe =
754 (struct ohci_pipe *)reqh->pipe;
755 DPRINTFN(-1,("ohci_process_done: error cc=%d (%s)\n",
756 OHCI_TD_GET_CC(LE(std->td.td_flags)),
757 ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td.td_flags))]));
758 /*
759 * Endpoint is halted. First unlink all the TDs
760 * belonging to the failed transfer, and then restart
761 * the endpoint.
762 */
763 for (p = std->nexttd; p->reqh == reqh; p = n) {
764 n = p->nexttd;
765 ohci_hash_rem_td(sc, p);
766 ohci_free_std(sc, p);
767 }
768 /* clear halt */
769 opipe->sed->ed.ed_headp = LE(p->physaddr);
770 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
771
772 if (cc == OHCI_CC_STALL)
773 reqh->status = USBD_STALLED;
774 else
775 reqh->status = USBD_IOERROR;
776 usb_transfer_complete(reqh);
777 }
778 ohci_hash_rem_td(sc, std);
779 ohci_free_std(sc, std);
780 }
781 }
782
783 void
784 ohci_device_ctrl_done(reqh)
785 usbd_request_handle reqh;
786 {
787 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
788 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
789 u_int len = opipe->u.ctl.length;
790 usb_dma_t *dma;
791
792 DPRINTFN(10,("ohci_ctrl_done: reqh=%p\n", reqh));
793
794 #ifdef DIAGNOSTIC
795 if (!reqh->isreq) {
796 panic("ohci_ctrl_done: not a request\n");
797 }
798 #endif
799 reqh->hcpriv = 0;
800
801 if (len != 0) {
802 dma = &opipe->u.ctl.datadma;
803 if (reqh->request.bmRequestType & UT_READ)
804 memcpy(reqh->buffer, KERNADDR(dma), len);
805 usb_freemem(sc->sc_dmatag, dma);
806 }
807 }
808
809 void
810 ohci_device_intr_done(reqh)
811 usbd_request_handle reqh;
812 {
813 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
814 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
815 usb_dma_t *dma;
816 ohci_soft_ed_t *sed = opipe->sed;
817 ohci_soft_td_t *xfer, *tail;
818
819
820 DPRINTFN(10,("ohci_intr_done: reqh=%p, actlen=%d\n",
821 reqh, reqh->actlen));
822
823 reqh->hcpriv = 0;
824
825 dma = &opipe->u.intr.datadma;
826 memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen);
827
828 if (reqh->pipe->repeat) {
829 xfer = opipe->tail;
830 tail = ohci_alloc_std(sc); /* XXX should reuse TD */
831 if (!tail) {
832 reqh->status = USBD_NOMEM;
833 return;
834 }
835 tail->reqh = 0;
836
837 xfer->td.td_flags = LE(
838 OHCI_TD_IN | OHCI_TD_NOCC |
839 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
840 if (reqh->flags & USBD_SHORT_XFER_OK)
841 xfer->td.td_flags |= LE(OHCI_TD_R);
842 xfer->td.td_cbp = LE(DMAADDR(dma));
843 xfer->nexttd = tail;
844 xfer->td.td_nexttd = LE(tail->physaddr);
845 xfer->td.td_be = LE(LE(xfer->td.td_cbp) + reqh->length - 1);
846 xfer->len = reqh->length;
847 xfer->reqh = reqh;
848 xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN;
849 reqh->hcpriv = xfer;
850
851 ohci_hash_add_td(sc, xfer);
852 sed->ed.ed_tailp = LE(tail->physaddr);
853 opipe->tail = tail;
854 } else {
855 usb_freemem(sc->sc_dmatag, dma);
856 }
857 }
858
859 void
860 ohci_device_bulk_done(reqh)
861 usbd_request_handle reqh;
862 {
863 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
864 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
865 u_int len = opipe->u.bulk.length;
866 usb_dma_t *dma;
867
868 DPRINTFN(10,("ohci_bulk_done: reqh=%p, actlen=%d\n",
869 reqh, reqh->actlen));
870
871 reqh->hcpriv = 0;
872
873 dma = &opipe->u.bulk.datadma;
874 if (opipe->u.bulk.isread)
875 memcpy(reqh->buffer, KERNADDR(dma), len);
876 usb_freemem(sc->sc_dmatag, dma);
877 }
878
879 void
880 ohci_rhsc(sc, reqh)
881 ohci_softc_t *sc;
882 usbd_request_handle reqh;
883 {
884 usbd_pipe_handle pipe;
885 struct ohci_pipe *opipe;
886 u_char *p;
887 int i, m;
888 int hstatus;
889
890 hstatus = OREAD4(sc, OHCI_RH_STATUS);
891 DPRINTF(("ohci_rhsc: sc=%p reqh=%p hstatus=0x%08x\n",
892 sc, reqh, hstatus));
893
894 if (reqh == 0) {
895 /* Just ignore the change. */
896 return;
897 }
898
899 pipe = reqh->pipe;
900 opipe = (struct ohci_pipe *)pipe;
901
902 p = KERNADDR(&opipe->u.intr.datadma);
903 m = min(sc->sc_noport, reqh->length * 8 - 1);
904 memset(p, 0, reqh->length);
905 for (i = 1; i <= m; i++) {
906 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
907 p[i/8] |= 1 << (i%8);
908 }
909 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
910 reqh->actlen = reqh->length;
911 reqh->status = USBD_NORMAL_COMPLETION;
912
913 usb_transfer_complete(reqh);
914 }
915
916 void
917 ohci_root_intr_done(reqh)
918 usbd_request_handle reqh;
919 {
920 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
921 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
922
923 reqh->hcpriv = 0;
924
925 if (!reqh->pipe->repeat)
926 usb_freemem(sc->sc_dmatag, &opipe->u.intr.datadma);
927 }
928
929 /*
930 * Wait here until controller claims to have an interrupt.
931 * Then call ohci_intr and return. Use timeout to avoid waiting
932 * too long.
933 */
934 void
935 ohci_waitintr(sc, reqh)
936 ohci_softc_t *sc;
937 usbd_request_handle reqh;
938 {
939 int timo = reqh->timeout;
940 int usecs;
941 u_int32_t intrs;
942
943 reqh->status = USBD_IN_PROGRESS;
944 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
945 usb_delay_ms(&sc->sc_bus, 1);
946 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
947 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
948 #ifdef USB_DEBUG
949 if (ohcidebug > 15)
950 ohci_dumpregs(sc);
951 #endif
952 if (intrs) {
953 ohci_intr(sc);
954 if (reqh->status != USBD_IN_PROGRESS)
955 return;
956 }
957 }
958
959 /* Timeout */
960 DPRINTF(("ohci_waitintr: timeout\n"));
961 reqh->status = USBD_TIMEOUT;
962 usb_transfer_complete(reqh);
963 /* XXX should free TD */
964 }
965
966 void
967 ohci_poll(bus)
968 struct usbd_bus *bus;
969 {
970 ohci_softc_t *sc = (ohci_softc_t *)bus;
971
972 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
973 ohci_intr(sc);
974 }
975
976 usbd_status
977 ohci_device_request(reqh)
978 usbd_request_handle reqh;
979 {
980 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
981 usb_device_request_t *req = &reqh->request;
982 usbd_device_handle dev = opipe->pipe.device;
983 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
984 int addr = dev->address;
985 ohci_soft_td_t *setup, *xfer = 0, *stat, *next, *tail;
986 ohci_soft_ed_t *sed;
987 usb_dma_t *dmap;
988 int isread;
989 int len;
990 usbd_status r;
991 int s;
992
993 isread = req->bmRequestType & UT_READ;
994 len = UGETW(req->wLength);
995
996 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
997 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
998 req->bmRequestType, req->bRequest, UGETW(req->wValue),
999 UGETW(req->wIndex), len, addr,
1000 opipe->pipe.endpoint->edesc->bEndpointAddress));
1001
1002 setup = opipe->tail;
1003 stat = ohci_alloc_std(sc);
1004 if (!stat) {
1005 r = USBD_NOMEM;
1006 goto bad1;
1007 }
1008 tail = ohci_alloc_std(sc);
1009 if (!tail) {
1010 r = USBD_NOMEM;
1011 goto bad2;
1012 }
1013 tail->reqh = 0;
1014
1015 sed = opipe->sed;
1016 dmap = &opipe->u.ctl.datadma;
1017 opipe->u.ctl.length = len;
1018
1019 /* Update device address and length since they may have changed. */
1020 /* XXX This only needs to be done once, but it's too early in open. */
1021 sed->ed.ed_flags = LE(
1022 (LE(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1023 OHCI_ED_SET_FA(addr) |
1024 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1025
1026 /* Set up data transaction */
1027 if (len != 0) {
1028 xfer = ohci_alloc_std(sc);
1029 if (!xfer) {
1030 r = USBD_NOMEM;
1031 goto bad3;
1032 }
1033 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1034 if (r != USBD_NORMAL_COMPLETION)
1035 goto bad4;
1036 xfer->td.td_flags = LE(
1037 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
1038 OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR |
1039 (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0));
1040 xfer->td.td_cbp = LE(DMAADDR(dmap));
1041 xfer->nexttd = stat;
1042 xfer->td.td_nexttd = LE(stat->physaddr);
1043 xfer->td.td_be = LE(LE(xfer->td.td_cbp) + len - 1);
1044 xfer->len = len;
1045 xfer->reqh = reqh;
1046 xfer->flags = OHCI_SET_LEN;
1047
1048 next = xfer;
1049 stat->flags = OHCI_CALL_DONE;
1050 } else {
1051 next = stat;
1052 stat->flags = OHCI_CALL_DONE | OHCI_SET_LEN;
1053 }
1054
1055 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req);
1056 if (!isread && len != 0)
1057 memcpy(KERNADDR(dmap), reqh->buffer, len);
1058
1059 setup->td.td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC |
1060 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1061 setup->td.td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma));
1062 setup->nexttd = next;
1063 setup->td.td_nexttd = LE(next->physaddr);
1064 setup->td.td_be = LE(LE(setup->td.td_cbp) + sizeof *req - 1);
1065 setup->len = 0; /* XXX The number of byte we count */
1066 setup->reqh = reqh;
1067 setup->flags = 0;
1068 reqh->hcpriv = setup;
1069
1070 stat->td.td_flags = LE(
1071 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC |
1072 OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1073 stat->td.td_cbp = 0;
1074 stat->nexttd = tail;
1075 stat->td.td_nexttd = LE(tail->physaddr);
1076 stat->td.td_be = 0;
1077 stat->len = 0;
1078 stat->reqh = reqh;
1079
1080 #if USB_DEBUG
1081 if (ohcidebug > 5) {
1082 DPRINTF(("ohci_device_request:\n"));
1083 ohci_dump_ed(sed);
1084 ohci_dump_tds(setup);
1085 }
1086 #endif
1087
1088 /* Insert ED in schedule */
1089 s = splusb();
1090 ohci_hash_add_td(sc, setup);
1091 if (len != 0)
1092 ohci_hash_add_td(sc, xfer);
1093 ohci_hash_add_td(sc, stat);
1094 sed->ed.ed_tailp = LE(tail->physaddr);
1095 opipe->tail = tail;
1096 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1097 if (reqh->timeout && !sc->sc_bus.use_polling) {
1098 usb_timeout(ohci_timeout, reqh,
1099 MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
1100 }
1101 splx(s);
1102
1103 #if USB_DEBUG
1104 if (ohcidebug > 5) {
1105 delay(5000);
1106 DPRINTF(("ohci_device_request: status=%x\n",
1107 OREAD4(sc, OHCI_COMMAND_STATUS)));
1108 ohci_dump_ed(sed);
1109 ohci_dump_tds(setup);
1110 }
1111 #endif
1112
1113 return (USBD_NORMAL_COMPLETION);
1114
1115 bad4:
1116 ohci_free_std(sc, xfer);
1117 bad3:
1118 ohci_free_std(sc, tail);
1119 bad2:
1120 ohci_free_std(sc, stat);
1121 bad1:
1122 return (r);
1123 }
1124
1125 /*
1126 * Add an ED to the schedule. Called at splusb().
1127 */
1128 void
1129 ohci_add_ed(sed, head)
1130 ohci_soft_ed_t *sed;
1131 ohci_soft_ed_t *head;
1132 {
1133 sed->next = head->next;
1134 sed->ed.ed_nexted = head->ed.ed_nexted;
1135 head->next = sed;
1136 head->ed.ed_nexted = LE(sed->physaddr);
1137 }
1138
1139 /*
1140 * Remove an ED from the schedule. Called at splusb().
1141 */
1142 void
1143 ohci_rem_ed(sed, head)
1144 ohci_soft_ed_t *sed;
1145 ohci_soft_ed_t *head;
1146 {
1147 ohci_soft_ed_t *p;
1148
1149 /* XXX */
1150 for (p = head; p && p->next != sed; p = p->next)
1151 ;
1152 if (!p)
1153 panic("ohci_rem_ed: ED not found\n");
1154 p->next = sed->next;
1155 p->ed.ed_nexted = sed->ed.ed_nexted;
1156 }
1157
1158 /*
1159 * When a transfer is completed the TD is added to the done queue by
1160 * the host controller. This queue is the processed by software.
1161 * Unfortunately the queue contains the physical address of the TD
1162 * and we have no simple way to translate this back to a kernel address.
1163 * To make the translation possible (and fast) we use a hash table of
1164 * TDs currently in the schedule. The physical address is used as the
1165 * hash value.
1166 */
1167
1168 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1169 /* Called at splusb() */
1170 void
1171 ohci_hash_add_td(sc, std)
1172 ohci_softc_t *sc;
1173 ohci_soft_td_t *std;
1174 {
1175 int h = HASH(std->physaddr);
1176
1177 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1178 }
1179
1180 /* Called at splusb() */
1181 void
1182 ohci_hash_rem_td(sc, std)
1183 ohci_softc_t *sc;
1184 ohci_soft_td_t *std;
1185 {
1186 LIST_REMOVE(std, hnext);
1187 }
1188
1189 ohci_soft_td_t *
1190 ohci_hash_find_td(sc, a)
1191 ohci_softc_t *sc;
1192 ohci_physaddr_t a;
1193 {
1194 int h = HASH(a);
1195 ohci_soft_td_t *std;
1196
1197 for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1198 std != 0;
1199 std = LIST_NEXT(std, hnext))
1200 if (std->physaddr == a)
1201 return (std);
1202 panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a);
1203 }
1204
1205 void
1206 ohci_timeout(addr)
1207 void *addr;
1208 {
1209 usbd_request_handle reqh = addr;
1210
1211 DPRINTF(("ohci_timeout: reqh=%p\n", reqh));
1212 ohci_abort_req(reqh, USBD_TIMEOUT);
1213 }
1214
1215 #ifdef USB_DEBUG
1216 void
1217 ohci_dump_tds(std)
1218 ohci_soft_td_t *std;
1219 {
1220 for (; std; std = std->nexttd)
1221 ohci_dump_td(std);
1222 }
1223
1224 void
1225 ohci_dump_td(std)
1226 ohci_soft_td_t *std;
1227 {
1228 DPRINTF(("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx "
1229 "nexttd=0x%08lx be=0x%08lx\n",
1230 std, (u_long)std->physaddr,
1231 (int)LE(std->td.td_flags),
1232 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1233 OHCI_TD_GET_DI(LE(std->td.td_flags)),
1234 OHCI_TD_GET_EC(LE(std->td.td_flags)),
1235 OHCI_TD_GET_CC(LE(std->td.td_flags)),
1236 (u_long)LE(std->td.td_cbp),
1237 (u_long)LE(std->td.td_nexttd), (u_long)LE(std->td.td_be)));
1238 }
1239
1240 void
1241 ohci_dump_ed(sed)
1242 ohci_soft_ed_t *sed;
1243 {
1244 DPRINTF(("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx "
1245 "headp=%b nexted=0x%08lx\n",
1246 sed, (u_long)sed->physaddr,
1247 OHCI_ED_GET_FA(LE(sed->ed.ed_flags)),
1248 OHCI_ED_GET_EN(LE(sed->ed.ed_flags)),
1249 OHCI_ED_GET_MAXP(LE(sed->ed.ed_flags)),
1250 (int)LE(sed->ed.ed_flags),
1251 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
1252 (u_long)LE(sed->ed.ed_tailp),
1253 (u_long)LE(sed->ed.ed_headp), "\20\1HALT\2CARRY",
1254 (u_long)LE(sed->ed.ed_nexted)));
1255 }
1256 #endif
1257
1258 usbd_status
1259 ohci_open(pipe)
1260 usbd_pipe_handle pipe;
1261 {
1262 usbd_device_handle dev = pipe->device;
1263 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1264 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1265 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1266 u_int8_t addr = dev->address;
1267 ohci_soft_ed_t *sed;
1268 ohci_soft_td_t *std;
1269 usbd_status r;
1270 int s;
1271
1272 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1273 pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1274 if (addr == sc->sc_addr) {
1275 switch (ed->bEndpointAddress) {
1276 case USB_CONTROL_ENDPOINT:
1277 pipe->methods = &ohci_root_ctrl_methods;
1278 break;
1279 case UE_DIR_IN | OHCI_INTR_ENDPT:
1280 pipe->methods = &ohci_root_intr_methods;
1281 break;
1282 default:
1283 return (USBD_INVAL);
1284 }
1285 } else {
1286 sed = ohci_alloc_sed(sc);
1287 if (sed == 0)
1288 goto bad0;
1289 std = ohci_alloc_std(sc);
1290 if (std == 0)
1291 goto bad1;
1292 opipe->sed = sed;
1293 opipe->tail = std;
1294 sed->ed.ed_flags = LE(
1295 OHCI_ED_SET_FA(addr) |
1296 OHCI_ED_SET_EN(ed->bEndpointAddress) |
1297 OHCI_ED_DIR_TD |
1298 (dev->lowspeed ? OHCI_ED_SPEED : 0) |
1299 ((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ?
1300 OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) |
1301 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
1302 sed->ed.ed_headp = sed->ed.ed_tailp = LE(std->physaddr);
1303
1304 switch (ed->bmAttributes & UE_XFERTYPE) {
1305 case UE_CONTROL:
1306 pipe->methods = &ohci_device_ctrl_methods;
1307 r = usb_allocmem(sc->sc_dmatag,
1308 sizeof(usb_device_request_t),
1309 0, &opipe->u.ctl.reqdma);
1310 if (r != USBD_NORMAL_COMPLETION)
1311 goto bad;
1312 s = splusb();
1313 ohci_add_ed(sed, sc->sc_ctrl_head);
1314 splx(s);
1315 break;
1316 case UE_INTERRUPT:
1317 pipe->methods = &ohci_device_intr_methods;
1318 return (ohci_device_setintr(sc, opipe, ed->bInterval));
1319 case UE_ISOCHRONOUS:
1320 printf("ohci_open: open iso unimplemented\n");
1321 return (USBD_XXX);
1322 case UE_BULK:
1323 pipe->methods = &ohci_device_bulk_methods;
1324 s = splusb();
1325 ohci_add_ed(sed, sc->sc_bulk_head);
1326 splx(s);
1327 break;
1328 }
1329 }
1330 return (USBD_NORMAL_COMPLETION);
1331
1332 bad:
1333 ohci_free_std(sc, std);
1334 bad1:
1335 ohci_free_sed(sc, sed);
1336 bad0:
1337 return (USBD_NOMEM);
1338
1339 }
1340
1341 /*
1342 * Close a reqular pipe.
1343 * Assumes that there are no pending transactions.
1344 */
1345 void
1346 ohci_close_pipe(pipe, head)
1347 usbd_pipe_handle pipe;
1348 ohci_soft_ed_t *head;
1349 {
1350 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1351 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1352 ohci_soft_ed_t *sed = opipe->sed;
1353 int s;
1354
1355 s = splusb();
1356 #ifdef DIAGNOSTIC
1357 sed->ed.ed_flags |= LE(OHCI_ED_SKIP);
1358 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) !=
1359 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) {
1360 ohci_physaddr_t td = sed->ed.ed_headp;
1361 ohci_soft_td_t *std;
1362 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]);
1363 std != 0;
1364 std = LIST_NEXT(std, hnext))
1365 if (std->physaddr == td)
1366 break;
1367 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
1368 "tl=0x%x pipe=%p, std=%p\n", sed,
1369 (int)LE(sed->ed.ed_headp), (int)LE(sed->ed.ed_tailp),
1370 pipe, std);
1371 usb_delay_ms(&sc->sc_bus, 2);
1372 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) !=
1373 (sed->ed.ed_headp & LE(OHCI_TAILMASK)))
1374 printf("ohci_close_pipe: pipe still not empty\n");
1375 }
1376 #endif
1377 ohci_rem_ed(sed, head);
1378 splx(s);
1379 ohci_free_std(sc, opipe->tail);
1380 ohci_free_sed(sc, opipe->sed);
1381 }
1382
1383 /*
1384 * Abort a device request.
1385 * If this routine is called at splusb() it guarantees that the request
1386 * will be removed from the hardware scheduling and that the callback
1387 * for it will be called with USBD_CANCELLED status.
1388 * It's impossible to guarantee that the requested transfer will not
1389 * have happened since the hardware runs concurrently.
1390 * If the transaction has already happened we rely on the ordinary
1391 * interrupt processing to process it.
1392 */
1393 void
1394 ohci_abort_req(reqh, status)
1395 usbd_request_handle reqh;
1396 usbd_status status;
1397 {
1398 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
1399 ohci_soft_ed_t *sed;
1400
1401 DPRINTF(("ohci_abort_req: reqh=%p pipe=%p\n", reqh, opipe));
1402
1403 reqh->status = status;
1404
1405 usb_untimeout(ohci_timeout, reqh, reqh->timo_handle);
1406
1407 sed = opipe->sed;
1408 DPRINTFN(1,("ohci_abort_req: stop ed=%p\n", sed));
1409 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); /* force hardware skip */
1410
1411 if (curproc) {
1412 usb_delay_ms(opipe->pipe.device->bus, 1);
1413 ohci_abort_req_end(reqh);
1414 } else {
1415 timeout(ohci_abort_req_end, reqh, hz / USB_FRAMES_PER_SECOND);
1416 }
1417 }
1418
1419 void
1420 ohci_abort_req_end(v)
1421 void *v;
1422 {
1423 usbd_request_handle reqh = v;
1424 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
1425 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1426 ohci_soft_ed_t *sed;
1427 ohci_soft_td_t *p, *n;
1428 int s;
1429
1430 s = splusb();
1431
1432 p = reqh->hcpriv;
1433 #ifdef DIAGNOSTIC
1434 if (!p) {
1435 printf("ohci_abort_req: hcpriv==0\n");
1436 return;
1437 }
1438 #endif
1439 for (; p->reqh == reqh; p = n) {
1440 n = p->nexttd;
1441 ohci_hash_rem_td(sc, p);
1442 ohci_free_std(sc, p);
1443 }
1444
1445 sed = opipe->sed;
1446 DPRINTFN(2,("ohci_abort_req: set hd=%x, tl=%x\n",
1447 (int)LE(p->physaddr), (int)LE(sed->ed.ed_tailp)));
1448 sed->ed.ed_headp = p->physaddr; /* unlink TDs */
1449 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); /* remove hardware skip */
1450
1451 usb_transfer_complete(reqh);
1452
1453 splx(s);
1454 }
1455
1456 /*
1457 * Data structures and routines to emulate the root hub.
1458 */
1459 usb_device_descriptor_t ohci_devd = {
1460 USB_DEVICE_DESCRIPTOR_SIZE,
1461 UDESC_DEVICE, /* type */
1462 {0x00, 0x01}, /* USB version */
1463 UCLASS_HUB, /* class */
1464 USUBCLASS_HUB, /* subclass */
1465 0, /* protocol */
1466 64, /* max packet */
1467 {0},{0},{0x00,0x01}, /* device id */
1468 1,2,0, /* string indicies */
1469 1 /* # of configurations */
1470 };
1471
1472 usb_config_descriptor_t ohci_confd = {
1473 USB_CONFIG_DESCRIPTOR_SIZE,
1474 UDESC_CONFIG,
1475 {USB_CONFIG_DESCRIPTOR_SIZE +
1476 USB_INTERFACE_DESCRIPTOR_SIZE +
1477 USB_ENDPOINT_DESCRIPTOR_SIZE},
1478 1,
1479 1,
1480 0,
1481 UC_SELF_POWERED,
1482 0 /* max power */
1483 };
1484
1485 usb_interface_descriptor_t ohci_ifcd = {
1486 USB_INTERFACE_DESCRIPTOR_SIZE,
1487 UDESC_INTERFACE,
1488 0,
1489 0,
1490 1,
1491 UCLASS_HUB,
1492 USUBCLASS_HUB,
1493 0,
1494 0
1495 };
1496
1497 usb_endpoint_descriptor_t ohci_endpd = {
1498 USB_ENDPOINT_DESCRIPTOR_SIZE,
1499 UDESC_ENDPOINT,
1500 UE_DIR_IN | OHCI_INTR_ENDPT,
1501 UE_INTERRUPT,
1502 {8, 0}, /* max packet */
1503 255
1504 };
1505
1506 usb_hub_descriptor_t ohci_hubd = {
1507 USB_HUB_DESCRIPTOR_SIZE,
1508 UDESC_HUB,
1509 0,
1510 {0,0},
1511 0,
1512 0,
1513 {0},
1514 };
1515
1516 int
1517 ohci_str(p, l, s)
1518 usb_string_descriptor_t *p;
1519 int l;
1520 char *s;
1521 {
1522 int i;
1523
1524 if (l == 0)
1525 return (0);
1526 p->bLength = 2 * strlen(s) + 2;
1527 if (l == 1)
1528 return (1);
1529 p->bDescriptorType = UDESC_STRING;
1530 l -= 2;
1531 for (i = 0; s[i] && l > 1; i++, l -= 2)
1532 USETW2(p->bString[i], 0, s[i]);
1533 return (2*i+2);
1534 }
1535
1536 /*
1537 * Simulate a hardware hub by handling all the necessary requests.
1538 */
1539 usbd_status
1540 ohci_root_ctrl_transfer(reqh)
1541 usbd_request_handle reqh;
1542 {
1543 int s;
1544 usbd_status r;
1545
1546 s = splusb();
1547 r = usb_insert_transfer(reqh);
1548 splx(s);
1549 if (r != USBD_NORMAL_COMPLETION)
1550 return (r);
1551 else
1552 return (ohci_root_ctrl_start(reqh));
1553 }
1554
1555 usbd_status
1556 ohci_root_ctrl_start(reqh)
1557 usbd_request_handle reqh;
1558 {
1559 ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus;
1560 usb_device_request_t *req;
1561 void *buf;
1562 int port, i;
1563 int len, value, index, l, totlen = 0;
1564 usb_port_status_t ps;
1565 usb_hub_descriptor_t hubd;
1566 usbd_status r;
1567 u_int32_t v;
1568
1569 if (!reqh->isreq)
1570 /* XXX panic */
1571 return (USBD_INVAL);
1572 req = &reqh->request;
1573 buf = reqh->buffer;
1574
1575 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
1576 req->bmRequestType, req->bRequest));
1577
1578 len = UGETW(req->wLength);
1579 value = UGETW(req->wValue);
1580 index = UGETW(req->wIndex);
1581 #define C(x,y) ((x) | ((y) << 8))
1582 switch(C(req->bRequest, req->bmRequestType)) {
1583 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1584 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1585 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1586 /*
1587 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1588 * for the integrated root hub.
1589 */
1590 break;
1591 case C(UR_GET_CONFIG, UT_READ_DEVICE):
1592 if (len > 0) {
1593 *(u_int8_t *)buf = sc->sc_conf;
1594 totlen = 1;
1595 }
1596 break;
1597 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1598 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
1599 switch(value >> 8) {
1600 case UDESC_DEVICE:
1601 if ((value & 0xff) != 0) {
1602 r = USBD_IOERROR;
1603 goto ret;
1604 }
1605 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1606 USETW(ohci_devd.idVendor, sc->sc_id_vendor);
1607 memcpy(buf, &ohci_devd, l);
1608 break;
1609 case UDESC_CONFIG:
1610 if ((value & 0xff) != 0) {
1611 r = USBD_IOERROR;
1612 goto ret;
1613 }
1614 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1615 memcpy(buf, &ohci_confd, l);
1616 buf = (char *)buf + l;
1617 len -= l;
1618 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1619 totlen += l;
1620 memcpy(buf, &ohci_ifcd, l);
1621 buf = (char *)buf + l;
1622 len -= l;
1623 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1624 totlen += l;
1625 memcpy(buf, &ohci_endpd, l);
1626 break;
1627 case UDESC_STRING:
1628 if (len == 0)
1629 break;
1630 *(u_int8_t *)buf = 0;
1631 totlen = 1;
1632 switch (value & 0xff) {
1633 case 1: /* Vendor */
1634 totlen = ohci_str(buf, len, sc->sc_vendor);
1635 break;
1636 case 2: /* Product */
1637 totlen = ohci_str(buf, len, "OHCI root hub");
1638 break;
1639 }
1640 break;
1641 default:
1642 r = USBD_IOERROR;
1643 goto ret;
1644 }
1645 break;
1646 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1647 if (len > 0) {
1648 *(u_int8_t *)buf = 0;
1649 totlen = 1;
1650 }
1651 break;
1652 case C(UR_GET_STATUS, UT_READ_DEVICE):
1653 if (len > 1) {
1654 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1655 totlen = 2;
1656 }
1657 break;
1658 case C(UR_GET_STATUS, UT_READ_INTERFACE):
1659 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1660 if (len > 1) {
1661 USETW(((usb_status_t *)buf)->wStatus, 0);
1662 totlen = 2;
1663 }
1664 break;
1665 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1666 if (value >= USB_MAX_DEVICES) {
1667 r = USBD_IOERROR;
1668 goto ret;
1669 }
1670 sc->sc_addr = value;
1671 break;
1672 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1673 if (value != 0 && value != 1) {
1674 r = USBD_IOERROR;
1675 goto ret;
1676 }
1677 sc->sc_conf = value;
1678 break;
1679 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1680 break;
1681 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1682 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1683 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1684 r = USBD_IOERROR;
1685 goto ret;
1686 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1687 break;
1688 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1689 break;
1690 /* Hub requests */
1691 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1692 break;
1693 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1694 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
1695 "port=%d feature=%d\n",
1696 index, value));
1697 if (index < 1 || index > sc->sc_noport) {
1698 r = USBD_IOERROR;
1699 goto ret;
1700 }
1701 port = OHCI_RH_PORT_STATUS(index);
1702 switch(value) {
1703 case UHF_PORT_ENABLE:
1704 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
1705 break;
1706 case UHF_PORT_SUSPEND:
1707 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
1708 break;
1709 case UHF_PORT_POWER:
1710 OWRITE4(sc, port, UPS_LOW_SPEED);
1711 break;
1712 case UHF_C_PORT_CONNECTION:
1713 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
1714 break;
1715 case UHF_C_PORT_ENABLE:
1716 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
1717 break;
1718 case UHF_C_PORT_SUSPEND:
1719 OWRITE4(sc, port, UPS_C_SUSPEND << 16);
1720 break;
1721 case UHF_C_PORT_OVER_CURRENT:
1722 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
1723 break;
1724 case UHF_C_PORT_RESET:
1725 OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
1726 break;
1727 default:
1728 r = USBD_IOERROR;
1729 goto ret;
1730 }
1731 switch(value) {
1732 case UHF_C_PORT_CONNECTION:
1733 case UHF_C_PORT_ENABLE:
1734 case UHF_C_PORT_SUSPEND:
1735 case UHF_C_PORT_OVER_CURRENT:
1736 case UHF_C_PORT_RESET:
1737 /* Enable RHSC interrupt if condition is cleared. */
1738 if ((OREAD4(sc, port) >> 16) == 0)
1739 ohci_rhsc_able(sc, 1);
1740 break;
1741 default:
1742 break;
1743 }
1744 break;
1745 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1746 if (value != 0) {
1747 r = USBD_IOERROR;
1748 goto ret;
1749 }
1750 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
1751 hubd = ohci_hubd;
1752 hubd.bNbrPorts = sc->sc_noport;
1753 USETW(hubd.wHubCharacteristics,
1754 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
1755 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
1756 /* XXX overcurrent */
1757 );
1758 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
1759 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
1760 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1761 hubd.DeviceRemovable[i++] = (u_int8_t)v;
1762 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1763 l = min(len, hubd.bDescLength);
1764 totlen = l;
1765 memcpy(buf, &hubd, l);
1766 break;
1767 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1768 if (len != 4) {
1769 r = USBD_IOERROR;
1770 goto ret;
1771 }
1772 memset(buf, 0, len); /* ? XXX */
1773 totlen = len;
1774 break;
1775 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1776 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
1777 index));
1778 if (index < 1 || index > sc->sc_noport) {
1779 r = USBD_IOERROR;
1780 goto ret;
1781 }
1782 if (len != 4) {
1783 r = USBD_IOERROR;
1784 goto ret;
1785 }
1786 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
1787 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
1788 v));
1789 USETW(ps.wPortStatus, v);
1790 USETW(ps.wPortChange, v >> 16);
1791 l = min(len, sizeof ps);
1792 memcpy(buf, &ps, l);
1793 totlen = l;
1794 break;
1795 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1796 r = USBD_IOERROR;
1797 goto ret;
1798 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1799 break;
1800 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1801 if (index < 1 || index > sc->sc_noport) {
1802 r = USBD_IOERROR;
1803 goto ret;
1804 }
1805 port = OHCI_RH_PORT_STATUS(index);
1806 switch(value) {
1807 case UHF_PORT_ENABLE:
1808 OWRITE4(sc, port, UPS_PORT_ENABLED);
1809 break;
1810 case UHF_PORT_SUSPEND:
1811 OWRITE4(sc, port, UPS_SUSPEND);
1812 break;
1813 case UHF_PORT_RESET:
1814 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
1815 index));
1816 OWRITE4(sc, port, UPS_RESET);
1817 for (i = 0; i < 10; i++) {
1818 usb_delay_ms(&sc->sc_bus, 10);
1819 if ((OREAD4(sc, port) & UPS_RESET) == 0)
1820 break;
1821 }
1822 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
1823 index, OREAD4(sc, port)));
1824 break;
1825 case UHF_PORT_POWER:
1826 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
1827 "%d\n", index));
1828 OWRITE4(sc, port, UPS_PORT_POWER);
1829 break;
1830 default:
1831 r = USBD_IOERROR;
1832 goto ret;
1833 }
1834 break;
1835 default:
1836 r = USBD_IOERROR;
1837 goto ret;
1838 }
1839 reqh->actlen = totlen;
1840 r = USBD_NORMAL_COMPLETION;
1841 ret:
1842 reqh->status = r;
1843 usb_transfer_complete(reqh);
1844 return (USBD_IN_PROGRESS);
1845 }
1846
1847 /* Abort a root control request. */
1848 void
1849 ohci_root_ctrl_abort(reqh)
1850 usbd_request_handle reqh;
1851 {
1852 /* Nothing to do, all transfers are synchronous. */
1853 }
1854
1855 /* Close the root pipe. */
1856 void
1857 ohci_root_ctrl_close(pipe)
1858 usbd_pipe_handle pipe;
1859 {
1860 DPRINTF(("ohci_root_ctrl_close\n"));
1861 /* Nothing to do. */
1862 }
1863
1864 usbd_status
1865 ohci_root_intr_transfer(reqh)
1866 usbd_request_handle reqh;
1867 {
1868 int s;
1869 usbd_status r;
1870
1871 s = splusb();
1872 r = usb_insert_transfer(reqh);
1873 splx(s);
1874 if (r != USBD_NORMAL_COMPLETION)
1875 return (r);
1876 else
1877 return (ohci_root_intr_start(reqh));
1878 }
1879
1880 usbd_status
1881 ohci_root_intr_start(reqh)
1882 usbd_request_handle reqh;
1883 {
1884 usbd_pipe_handle pipe = reqh->pipe;
1885 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1886 struct ohci_pipe *upipe = (struct ohci_pipe *)pipe;
1887 usb_dma_t *dmap;
1888 usbd_status r;
1889 int len;
1890
1891 len = reqh->length;
1892 dmap = &upipe->u.intr.datadma;
1893 if (len == 0)
1894 return (USBD_INVAL); /* XXX should it be? */
1895
1896 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1897 if (r != USBD_NORMAL_COMPLETION)
1898 return (r);
1899 sc->sc_intrreqh = reqh;
1900
1901 return (USBD_IN_PROGRESS);
1902 }
1903
1904 /* Abort a root interrupt request. */
1905 void
1906 ohci_root_intr_abort(reqh)
1907 usbd_request_handle reqh;
1908 {
1909 /* No need to abort. */
1910 }
1911
1912 /* Close the root pipe. */
1913 void
1914 ohci_root_intr_close(pipe)
1915 usbd_pipe_handle pipe;
1916 {
1917 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1918
1919 DPRINTF(("ohci_root_intr_close\n"));
1920
1921 sc->sc_intrreqh = 0;
1922 }
1923
1924 /************************/
1925
1926 usbd_status
1927 ohci_device_ctrl_transfer(reqh)
1928 usbd_request_handle reqh;
1929 {
1930 int s;
1931 usbd_status r;
1932
1933 s = splusb();
1934 r = usb_insert_transfer(reqh);
1935 splx(s);
1936 if (r != USBD_NORMAL_COMPLETION)
1937 return (r);
1938 else
1939 return (ohci_device_ctrl_start(reqh));
1940 }
1941
1942 usbd_status
1943 ohci_device_ctrl_start(reqh)
1944 usbd_request_handle reqh;
1945 {
1946 ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus;
1947 usbd_status r;
1948
1949 if (!reqh->isreq) {
1950 /* XXX panic */
1951 printf("ohci_device_ctrl_transfer: not a request\n");
1952 return (USBD_INVAL);
1953 }
1954
1955 r = ohci_device_request(reqh);
1956 if (r != USBD_NORMAL_COMPLETION)
1957 return (r);
1958
1959 if (sc->sc_bus.use_polling)
1960 ohci_waitintr(sc, reqh);
1961 return (USBD_IN_PROGRESS);
1962 }
1963
1964 /* Abort a device control request. */
1965 void
1966 ohci_device_ctrl_abort(reqh)
1967 usbd_request_handle reqh;
1968 {
1969 DPRINTF(("ohci_device_ctrl_abort: reqh=%p\n", reqh));
1970 ohci_abort_req(reqh, USBD_CANCELLED);
1971 }
1972
1973 /* Close a device control pipe. */
1974 void
1975 ohci_device_ctrl_close(pipe)
1976 usbd_pipe_handle pipe;
1977 {
1978 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1979
1980 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
1981 ohci_close_pipe(pipe, sc->sc_ctrl_head);
1982 }
1983
1984 /************************/
1985
1986 void
1987 ohci_device_clear_toggle(pipe)
1988 usbd_pipe_handle pipe;
1989 {
1990 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1991
1992 opipe->sed->ed.ed_tailp &= LE(~OHCI_TOGGLECARRY);
1993 }
1994
1995 void
1996 ohci_noop(pipe)
1997 usbd_pipe_handle pipe;
1998 {
1999 }
2000
2001 usbd_status
2002 ohci_device_bulk_transfer(reqh)
2003 usbd_request_handle reqh;
2004 {
2005 int s;
2006 usbd_status r;
2007
2008 s = splusb();
2009 r = usb_insert_transfer(reqh);
2010 splx(s);
2011 if (r != USBD_NORMAL_COMPLETION)
2012 return (r);
2013 else
2014 return (ohci_device_bulk_start(reqh));
2015 }
2016
2017 usbd_status
2018 ohci_device_bulk_start(reqh)
2019 usbd_request_handle reqh;
2020 {
2021 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
2022 usbd_device_handle dev = opipe->pipe.device;
2023 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2024 int addr = dev->address;
2025 ohci_soft_td_t *xfer, *tail;
2026 ohci_soft_ed_t *sed;
2027 usb_dma_t *dmap;
2028 usbd_status r;
2029 int s, len, isread, endpt;
2030
2031 #ifdef DIAGNOSTIC
2032 if (reqh->isreq) {
2033 /* XXX panic */
2034 printf("ohci_device_bulk_start: a request\n");
2035 return (USBD_INVAL);
2036 }
2037 #endif
2038
2039 len = reqh->length;
2040 dmap = &opipe->u.bulk.datadma;
2041 endpt = reqh->pipe->endpoint->edesc->bEndpointAddress;
2042 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2043 sed = opipe->sed;
2044
2045 DPRINTFN(4,("ohci_device_bulk_start: reqh=%p len=%d isread=%d "
2046 "flags=%d endpt=%d\n", reqh, len, isread, reqh->flags,
2047 endpt));
2048
2049 opipe->u.bulk.isread = isread;
2050 opipe->u.bulk.length = len;
2051
2052 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
2053 if (r != USBD_NORMAL_COMPLETION)
2054 goto ret1;
2055
2056 tail = ohci_alloc_std(sc);
2057 if (!tail) {
2058 r = USBD_NOMEM;
2059 goto ret2;
2060 }
2061 tail->reqh = 0;
2062
2063 /* Update device address */
2064 sed->ed.ed_flags = LE(
2065 (LE(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2066 OHCI_ED_SET_FA(addr));
2067
2068 /* Set up data transaction */
2069 xfer = opipe->tail;
2070 xfer->td.td_flags = LE(
2071 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
2072 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY |
2073 (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0));
2074 xfer->td.td_cbp = LE(DMAADDR(dmap));
2075 xfer->nexttd = tail;
2076 xfer->td.td_nexttd = LE(tail->physaddr);
2077 xfer->td.td_be = LE(LE(xfer->td.td_cbp) + len - 1);
2078 xfer->len = len;
2079 xfer->reqh = reqh;
2080 xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN;
2081 reqh->hcpriv = xfer;
2082
2083 if (!isread)
2084 memcpy(KERNADDR(dmap), reqh->buffer, len);
2085
2086 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2087 "td_cbp=0x%08x td_be=0x%08x\n",
2088 (int)LE(sed->ed.ed_flags), (int)LE(xfer->td.td_flags),
2089 (int)LE(xfer->td.td_cbp), (int)LE(xfer->td.td_be)));
2090
2091 #ifdef USB_DEBUG
2092 if (ohcidebug > 4) {
2093 ohci_dump_ed(sed);
2094 ohci_dump_tds(xfer);
2095 }
2096 #endif
2097
2098 /* Insert ED in schedule */
2099 s = splusb();
2100 ohci_hash_add_td(sc, xfer);
2101 sed->ed.ed_tailp = LE(tail->physaddr);
2102 opipe->tail = tail;
2103 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP);
2104 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2105 if (reqh->timeout && !sc->sc_bus.use_polling) {
2106 usb_timeout(ohci_timeout, reqh,
2107 MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
2108 }
2109
2110 #ifdef USB_DEBUG
2111 if (ohcidebug > 5) {
2112 delay(5000);
2113 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2114 OREAD4(sc, OHCI_COMMAND_STATUS)));
2115 ohci_dump_ed(sed);
2116 ohci_dump_tds(xfer);
2117 }
2118 #endif
2119
2120 splx(s);
2121
2122 return (USBD_IN_PROGRESS);
2123
2124 ret2:
2125 usb_freemem(sc->sc_dmatag, dmap);
2126 ret1:
2127 return (r);
2128 }
2129
2130 void
2131 ohci_device_bulk_abort(reqh)
2132 usbd_request_handle reqh;
2133 {
2134 DPRINTF(("ohci_device_bulk_abort: reqh=%p\n", reqh));
2135 ohci_abort_req(reqh, USBD_CANCELLED);
2136 }
2137
2138 /*
2139 * Close a device bulk pipe.
2140 */
2141 void
2142 ohci_device_bulk_close(pipe)
2143 usbd_pipe_handle pipe;
2144 {
2145 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2146
2147 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
2148 ohci_close_pipe(pipe, sc->sc_bulk_head);
2149 }
2150
2151 /************************/
2152
2153 usbd_status
2154 ohci_device_intr_transfer(reqh)
2155 usbd_request_handle reqh;
2156 {
2157 int s;
2158 usbd_status r;
2159
2160 s = splusb();
2161 r = usb_insert_transfer(reqh);
2162 splx(s);
2163 if (r != USBD_NORMAL_COMPLETION)
2164 return (r);
2165 else
2166 return (ohci_device_intr_start(reqh));
2167 }
2168
2169 usbd_status
2170 ohci_device_intr_start(reqh)
2171 usbd_request_handle reqh;
2172 {
2173 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
2174 usbd_device_handle dev = opipe->pipe.device;
2175 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2176 ohci_soft_ed_t *sed = opipe->sed;
2177 ohci_soft_td_t *xfer, *tail;
2178 usb_dma_t *dmap;
2179 usbd_status r;
2180 int len;
2181 int s;
2182
2183 DPRINTFN(3, ("ohci_device_intr_transfer: reqh=%p buf=%p len=%d "
2184 "flags=%d priv=%p\n",
2185 reqh, reqh->buffer, reqh->length, reqh->flags, reqh->priv));
2186
2187 if (reqh->isreq)
2188 panic("ohci_device_intr_transfer: a request\n");
2189
2190 len = reqh->length;
2191 dmap = &opipe->u.intr.datadma;
2192 if (len == 0)
2193 return (USBD_INVAL); /* XXX should it be? */
2194
2195 xfer = opipe->tail;
2196 tail = ohci_alloc_std(sc);
2197 if (!tail) {
2198 r = USBD_NOMEM;
2199 goto ret1;
2200 }
2201 tail->reqh = 0;
2202
2203 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
2204 if (r != USBD_NORMAL_COMPLETION)
2205 goto ret2;
2206
2207 xfer->td.td_flags = LE(
2208 OHCI_TD_IN | OHCI_TD_NOCC |
2209 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
2210 if (reqh->flags & USBD_SHORT_XFER_OK)
2211 xfer->td.td_flags |= LE(OHCI_TD_R);
2212 xfer->td.td_cbp = LE(DMAADDR(dmap));
2213 xfer->nexttd = tail;
2214 xfer->td.td_nexttd = LE(tail->physaddr);
2215 xfer->td.td_be = LE(LE(xfer->td.td_cbp) + len - 1);
2216 xfer->len = len;
2217 xfer->reqh = reqh;
2218 xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN;
2219 reqh->hcpriv = xfer;
2220
2221 #if USB_DEBUG
2222 if (ohcidebug > 5) {
2223 DPRINTF(("ohci_device_intr_transfer:\n"));
2224 ohci_dump_ed(sed);
2225 ohci_dump_tds(xfer);
2226 }
2227 #endif
2228
2229 /* Insert ED in schedule */
2230 s = splusb();
2231 ohci_hash_add_td(sc, xfer);
2232 sed->ed.ed_tailp = LE(tail->physaddr);
2233 opipe->tail = tail;
2234 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP);
2235
2236 #ifdef USB_DEBUG
2237 if (ohcidebug > 5) {
2238 delay(5000);
2239 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2240 OREAD4(sc, OHCI_COMMAND_STATUS)));
2241 ohci_dump_ed(sed);
2242 ohci_dump_tds(xfer);
2243 }
2244 #endif
2245 splx(s);
2246
2247 return (USBD_IN_PROGRESS);
2248
2249 ret2:
2250 ohci_free_std(sc, xfer);
2251 ret1:
2252 return (r);
2253 }
2254
2255 /* Abort a device control request. */
2256 void
2257 ohci_device_intr_abort(reqh)
2258 usbd_request_handle reqh;
2259 {
2260 if (reqh->pipe->intrreqh == reqh) {
2261 DPRINTF(("ohci_device_intr_abort: remove\n"));
2262 reqh->pipe->intrreqh = 0;
2263 }
2264 ohci_abort_req(reqh, USBD_CANCELLED);
2265 }
2266
2267 /* Close a device interrupt pipe. */
2268 void
2269 ohci_device_intr_close(pipe)
2270 usbd_pipe_handle pipe;
2271 {
2272 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2273 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2274 int nslots = opipe->u.intr.nslots;
2275 int pos = opipe->u.intr.pos;
2276 int j;
2277 ohci_soft_ed_t *p, *sed = opipe->sed;
2278 int s;
2279
2280 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
2281 pipe, nslots, pos));
2282 s = splusb();
2283 sed->ed.ed_flags |= LE(OHCI_ED_SKIP);
2284 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) !=
2285 (sed->ed.ed_headp & LE(OHCI_TAILMASK)))
2286 usb_delay_ms(&sc->sc_bus, 2);
2287
2288 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
2289 ;
2290 if (!p)
2291 panic("ohci_device_intr_close: ED not found\n");
2292 p->next = sed->next;
2293 p->ed.ed_nexted = sed->ed.ed_nexted;
2294 splx(s);
2295
2296 for (j = 0; j < nslots; j++)
2297 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
2298
2299 ohci_free_std(sc, opipe->tail);
2300 ohci_free_sed(sc, opipe->sed);
2301 }
2302
2303 usbd_status
2304 ohci_device_setintr(sc, opipe, ival)
2305 ohci_softc_t *sc;
2306 struct ohci_pipe *opipe;
2307 int ival;
2308 {
2309 int i, j, s, best;
2310 u_int npoll, slow, shigh, nslots;
2311 u_int bestbw, bw;
2312 ohci_soft_ed_t *hsed, *sed = opipe->sed;
2313
2314 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
2315 if (ival == 0) {
2316 printf("ohci_setintr: 0 interval\n");
2317 return (USBD_INVAL);
2318 }
2319
2320 npoll = OHCI_NO_INTRS;
2321 while (npoll > ival)
2322 npoll /= 2;
2323 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
2324
2325 /*
2326 * We now know which level in the tree the ED must go into.
2327 * Figure out which slot has most bandwidth left over.
2328 * Slots to examine:
2329 * npoll
2330 * 1 0
2331 * 2 1 2
2332 * 4 3 4 5 6
2333 * 8 7 8 9 10 11 12 13 14
2334 * N (N-1) .. (N-1+N-1)
2335 */
2336 slow = npoll-1;
2337 shigh = slow + npoll;
2338 nslots = OHCI_NO_INTRS / npoll;
2339 for (best = i = slow, bestbw = ~0; i < shigh; i++) {
2340 bw = 0;
2341 for (j = 0; j < nslots; j++)
2342 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
2343 if (bw < bestbw) {
2344 best = i;
2345 bestbw = bw;
2346 }
2347 }
2348 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
2349 best, slow, shigh, bestbw));
2350
2351 s = splusb();
2352 hsed = sc->sc_eds[best];
2353 sed->next = hsed->next;
2354 sed->ed.ed_nexted = hsed->ed.ed_nexted;
2355 hsed->next = sed;
2356 hsed->ed.ed_nexted = LE(sed->physaddr);
2357 splx(s);
2358
2359 for (j = 0; j < nslots; j++)
2360 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
2361 opipe->u.intr.nslots = nslots;
2362 opipe->u.intr.pos = best;
2363
2364 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
2365 return (USBD_NORMAL_COMPLETION);
2366 }
2367
2368