ohci.c revision 1.42
1 /* $NetBSD: ohci.c,v 1.42 1999/09/09 12:26:44 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (augustss (at) carlstedt.se) at 9 * Carlstedt Research & Technology. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * USB Open Host Controller driver. 42 * 43 * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe 44 * USB spec: http://www.usb.org/developers/data/usb11.pdf 45 */ 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/kernel.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/device.h> 53 #elif defined(__FreeBSD__) 54 #include <sys/module.h> 55 #include <sys/bus.h> 56 #endif 57 #include <sys/proc.h> 58 #include <sys/queue.h> 59 #include <sys/select.h> 60 61 #include <machine/bus.h> 62 #include <machine/endian.h> 63 64 #include <dev/usb/usb.h> 65 #include <dev/usb/usbdi.h> 66 #include <dev/usb/usbdivar.h> 67 #include <dev/usb/usb_mem.h> 68 #include <dev/usb/usb_quirks.h> 69 70 #include <dev/usb/ohcireg.h> 71 #include <dev/usb/ohcivar.h> 72 73 #if defined(__FreeBSD__) 74 #include <machine/clock.h> 75 76 #define delay(d) DELAY(d) 77 78 #endif 79 80 #if defined(__OpenBSD__) 81 struct cfdriver ohci_cd = { 82 NULL, "ohci", DV_DULL 83 }; 84 #endif 85 86 /* 87 * The OHCI controller is little endian, so on big endian machines 88 * the data strored in memory needs to be swapped. 89 */ 90 #if BYTE_ORDER == BIG_ENDIAN 91 #define LE(x) (bswap32(x)) 92 #else 93 #define LE(x) (x) 94 #endif 95 96 struct ohci_pipe; 97 98 ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *)); 99 void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *)); 100 101 ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *)); 102 void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *)); 103 104 void ohci_power __P((int, void *)); 105 usbd_status ohci_open __P((usbd_pipe_handle)); 106 void ohci_poll __P((struct usbd_bus *)); 107 void ohci_waitintr __P((ohci_softc_t *, usbd_request_handle)); 108 void ohci_rhsc __P((ohci_softc_t *, usbd_request_handle)); 109 void ohci_process_done __P((ohci_softc_t *, ohci_physaddr_t)); 110 111 usbd_status ohci_device_request __P((usbd_request_handle reqh)); 112 void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 113 void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 114 void ohci_hash_add_td __P((ohci_softc_t *, ohci_soft_td_t *)); 115 void ohci_hash_rem_td __P((ohci_softc_t *, ohci_soft_td_t *)); 116 ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, ohci_physaddr_t)); 117 118 usbd_status ohci_allocm __P((struct usbd_bus *, usb_dma_t *, u_int32_t)); 119 void ohci_freem __P((struct usbd_bus *, usb_dma_t *)); 120 121 usbd_status ohci_root_ctrl_transfer __P((usbd_request_handle)); 122 usbd_status ohci_root_ctrl_start __P((usbd_request_handle)); 123 void ohci_root_ctrl_abort __P((usbd_request_handle)); 124 void ohci_root_ctrl_close __P((usbd_pipe_handle)); 125 126 usbd_status ohci_root_intr_transfer __P((usbd_request_handle)); 127 usbd_status ohci_root_intr_start __P((usbd_request_handle)); 128 void ohci_root_intr_abort __P((usbd_request_handle)); 129 void ohci_root_intr_close __P((usbd_pipe_handle)); 130 void ohci_root_intr_done __P((usbd_request_handle)); 131 132 usbd_status ohci_device_ctrl_transfer __P((usbd_request_handle)); 133 usbd_status ohci_device_ctrl_start __P((usbd_request_handle)); 134 void ohci_device_ctrl_abort __P((usbd_request_handle)); 135 void ohci_device_ctrl_close __P((usbd_pipe_handle)); 136 void ohci_device_ctrl_done __P((usbd_request_handle)); 137 138 usbd_status ohci_device_bulk_transfer __P((usbd_request_handle)); 139 usbd_status ohci_device_bulk_start __P((usbd_request_handle)); 140 void ohci_device_bulk_abort __P((usbd_request_handle)); 141 void ohci_device_bulk_close __P((usbd_pipe_handle)); 142 void ohci_device_bulk_done __P((usbd_request_handle)); 143 144 usbd_status ohci_device_intr_transfer __P((usbd_request_handle)); 145 usbd_status ohci_device_intr_start __P((usbd_request_handle)); 146 void ohci_device_intr_abort __P((usbd_request_handle)); 147 void ohci_device_intr_close __P((usbd_pipe_handle)); 148 void ohci_device_intr_done __P((usbd_request_handle)); 149 150 usbd_status ohci_device_setintr __P((ohci_softc_t *sc, 151 struct ohci_pipe *pipe, int ival)); 152 153 int ohci_str __P((usb_string_descriptor_t *, int, char *)); 154 155 void ohci_timeout __P((void *)); 156 void ohci_rhsc_able __P((ohci_softc_t *, int)); 157 158 void ohci_close_pipe __P((usbd_pipe_handle pipe, 159 ohci_soft_ed_t *head)); 160 void ohci_abort_req __P((usbd_request_handle reqh, 161 usbd_status status)); 162 void ohci_abort_req_end __P((void *)); 163 164 void ohci_device_clear_toggle __P((usbd_pipe_handle pipe)); 165 void ohci_noop __P((usbd_pipe_handle pipe)); 166 167 #ifdef USB_DEBUG 168 ohci_softc_t *thesc; 169 void ohci_dumpregs __P((ohci_softc_t *)); 170 void ohci_dump_tds __P((ohci_soft_td_t *)); 171 void ohci_dump_td __P((ohci_soft_td_t *)); 172 void ohci_dump_ed __P((ohci_soft_ed_t *)); 173 #endif 174 175 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 176 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 177 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 178 179 /* Reverse the bits in a value 0 .. 31 */ 180 static u_int8_t revbits[OHCI_NO_INTRS] = 181 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 182 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 183 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 184 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 185 186 struct ohci_pipe { 187 struct usbd_pipe pipe; 188 ohci_soft_ed_t *sed; 189 ohci_soft_td_t *tail; 190 /* Info needed for different pipe kinds. */ 191 union { 192 /* Control pipe */ 193 struct { 194 usb_dma_t datadma; 195 usb_dma_t reqdma; 196 u_int length; 197 ohci_soft_td_t *setup, *xfer, *stat; 198 } ctl; 199 /* Interrupt pipe */ 200 struct { 201 usb_dma_t datadma; 202 int nslots; 203 int pos; 204 } intr; 205 /* Bulk pipe */ 206 struct { 207 usb_dma_t datadma; 208 u_int length; 209 int isread; 210 } bulk; 211 } u; 212 }; 213 214 #define OHCI_INTR_ENDPT 1 215 216 struct usbd_bus_methods ohci_bus_methods = { 217 ohci_open, 218 ohci_poll, 219 ohci_allocm, 220 ohci_freem, 221 }; 222 223 struct usbd_pipe_methods ohci_root_ctrl_methods = { 224 ohci_root_ctrl_transfer, 225 ohci_root_ctrl_start, 226 ohci_root_ctrl_abort, 227 ohci_root_ctrl_close, 228 ohci_noop, 229 0, 230 }; 231 232 struct usbd_pipe_methods ohci_root_intr_methods = { 233 ohci_root_intr_transfer, 234 ohci_root_intr_start, 235 ohci_root_intr_abort, 236 ohci_root_intr_close, 237 ohci_noop, 238 ohci_root_intr_done, 239 }; 240 241 struct usbd_pipe_methods ohci_device_ctrl_methods = { 242 ohci_device_ctrl_transfer, 243 ohci_device_ctrl_start, 244 ohci_device_ctrl_abort, 245 ohci_device_ctrl_close, 246 ohci_noop, 247 ohci_device_ctrl_done, 248 }; 249 250 struct usbd_pipe_methods ohci_device_intr_methods = { 251 ohci_device_intr_transfer, 252 ohci_device_intr_start, 253 ohci_device_intr_abort, 254 ohci_device_intr_close, 255 ohci_device_clear_toggle, 256 ohci_device_intr_done, 257 }; 258 259 struct usbd_pipe_methods ohci_device_bulk_methods = { 260 ohci_device_bulk_transfer, 261 ohci_device_bulk_start, 262 ohci_device_bulk_abort, 263 ohci_device_bulk_close, 264 ohci_device_clear_toggle, 265 ohci_device_bulk_done, 266 }; 267 268 ohci_soft_ed_t * 269 ohci_alloc_sed(sc) 270 ohci_softc_t *sc; 271 { 272 ohci_soft_ed_t *sed; 273 usbd_status r; 274 int i, offs; 275 usb_dma_t dma; 276 277 if (!sc->sc_freeeds) { 278 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 279 r = usb_allocmem(sc->sc_dmatag, OHCI_SED_SIZE * OHCI_SED_CHUNK, 280 OHCI_ED_ALIGN, &dma); 281 if (r != USBD_NORMAL_COMPLETION) 282 return (0); 283 for(i = 0; i < OHCI_SED_CHUNK; i++) { 284 offs = i * OHCI_SED_SIZE; 285 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 286 sed->physaddr = DMAADDR(&dma) + offs; 287 sed->next = sc->sc_freeeds; 288 sc->sc_freeeds = sed; 289 } 290 } 291 sed = sc->sc_freeeds; 292 sc->sc_freeeds = sed->next; 293 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 294 sed->next = 0; 295 return (sed); 296 } 297 298 void 299 ohci_free_sed(sc, sed) 300 ohci_softc_t *sc; 301 ohci_soft_ed_t *sed; 302 { 303 sed->next = sc->sc_freeeds; 304 sc->sc_freeeds = sed; 305 } 306 307 ohci_soft_td_t * 308 ohci_alloc_std(sc) 309 ohci_softc_t *sc; 310 { 311 ohci_soft_td_t *std; 312 usbd_status r; 313 int i, offs; 314 usb_dma_t dma; 315 316 if (!sc->sc_freetds) { 317 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 318 r = usb_allocmem(sc->sc_dmatag, OHCI_STD_SIZE * OHCI_STD_CHUNK, 319 OHCI_TD_ALIGN, &dma); 320 if (r != USBD_NORMAL_COMPLETION) 321 return (0); 322 for(i = 0; i < OHCI_STD_CHUNK; i++) { 323 offs = i * OHCI_STD_SIZE; 324 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 325 std->physaddr = DMAADDR(&dma) + offs; 326 std->nexttd = sc->sc_freetds; 327 sc->sc_freetds = std; 328 } 329 } 330 std = sc->sc_freetds; 331 sc->sc_freetds = std->nexttd; 332 memset(&std->td, 0, sizeof(ohci_td_t)); 333 std->nexttd = 0; 334 return (std); 335 } 336 337 void 338 ohci_free_std(sc, std) 339 ohci_softc_t *sc; 340 ohci_soft_td_t *std; 341 { 342 std->nexttd = sc->sc_freetds; 343 sc->sc_freetds = std; 344 } 345 346 usbd_status 347 ohci_init(sc) 348 ohci_softc_t *sc; 349 { 350 ohci_soft_ed_t *sed, *psed; 351 usbd_status r; 352 int rev; 353 int i; 354 u_int32_t s, ctl, ival, hcr, fm, per; 355 356 DPRINTF(("ohci_init: start\n")); 357 rev = OREAD4(sc, OHCI_REVISION); 358 #if defined(__OpenBSD__) 359 printf(", OHCI version %d.%d%s\n", 360 #else 361 printf("%s: OHCI version %d.%d%s\n", USBDEVNAME(sc->sc_bus.bdev), 362 #endif 363 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 364 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 365 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 366 printf("%s: unsupported OHCI revision\n", 367 USBDEVNAME(sc->sc_bus.bdev)); 368 return (USBD_INVAL); 369 } 370 371 for (i = 0; i < OHCI_HASH_SIZE; i++) 372 LIST_INIT(&sc->sc_hash_tds[i]); 373 374 /* Allocate the HCCA area. */ 375 r = usb_allocmem(sc->sc_dmatag, OHCI_HCCA_SIZE, 376 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 377 if (r != USBD_NORMAL_COMPLETION) 378 return (r); 379 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 380 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 381 382 sc->sc_eintrs = OHCI_NORMAL_INTRS; 383 384 sc->sc_ctrl_head = ohci_alloc_sed(sc); 385 if (!sc->sc_ctrl_head) { 386 r = USBD_NOMEM; 387 goto bad1; 388 } 389 sc->sc_ctrl_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 390 391 sc->sc_bulk_head = ohci_alloc_sed(sc); 392 if (!sc->sc_bulk_head) { 393 r = USBD_NOMEM; 394 goto bad2; 395 } 396 sc->sc_bulk_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 397 398 /* Allocate all the dummy EDs that make up the interrupt tree. */ 399 for (i = 0; i < OHCI_NO_EDS; i++) { 400 sed = ohci_alloc_sed(sc); 401 if (!sed) { 402 while (--i >= 0) 403 ohci_free_sed(sc, sc->sc_eds[i]); 404 r = USBD_NOMEM; 405 goto bad3; 406 } 407 /* All ED fields are set to 0. */ 408 sc->sc_eds[i] = sed; 409 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 410 if (i != 0) { 411 psed = sc->sc_eds[(i-1) / 2]; 412 sed->next = psed; 413 sed->ed.ed_nexted = LE(psed->physaddr); 414 } 415 } 416 /* 417 * Fill HCCA interrupt table. The bit reversal is to get 418 * the tree set up properly to spread the interrupts. 419 */ 420 for (i = 0; i < OHCI_NO_INTRS; i++) 421 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 422 LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 423 424 /* Determine in what context we are running. */ 425 ctl = OREAD4(sc, OHCI_CONTROL); 426 if (ctl & OHCI_IR) { 427 /* SMM active, request change */ 428 DPRINTF(("ohci_init: SMM active, request owner change\n")); 429 s = OREAD4(sc, OHCI_COMMAND_STATUS); 430 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 431 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 432 delay(1000); 433 ctl = OREAD4(sc, OHCI_CONTROL); 434 } 435 if ((ctl & OHCI_IR) == 0) { 436 printf("%s: SMM does not respond, resetting\n", 437 USBDEVNAME(sc->sc_bus.bdev)); 438 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 439 goto reset; 440 } 441 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 442 /* BIOS started controller. */ 443 DPRINTF(("ohci_init: BIOS active\n")); 444 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 445 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 446 delay(USB_RESUME_DELAY * 1000); 447 } 448 } else { 449 DPRINTF(("ohci_init: cold started\n")); 450 reset: 451 /* Controller was cold started. */ 452 delay(USB_BUS_RESET_DELAY * 1000); 453 } 454 455 /* 456 * This reset should not be necessary according to the OHCI spec, but 457 * without it some controllers do not start. 458 */ 459 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 460 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 461 delay(USB_BUS_RESET_DELAY * 1000); 462 463 /* We now own the host controller and the bus has been reset. */ 464 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 465 466 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 467 /* Nominal time for a reset is 10 us. */ 468 for (i = 0; i < 10; i++) { 469 delay(10); 470 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 471 if (!hcr) 472 break; 473 } 474 if (hcr) { 475 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 476 r = USBD_IOERROR; 477 goto bad3; 478 } 479 #ifdef USB_DEBUG 480 thesc = sc; 481 if (ohcidebug > 15) 482 ohci_dumpregs(sc); 483 #endif 484 485 /* The controller is now in suspend state, we have 2ms to finish. */ 486 487 /* Set up HC registers. */ 488 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 489 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 490 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 491 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 492 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 493 ctl = OREAD4(sc, OHCI_CONTROL); 494 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 495 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 496 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 497 /* And finally start it! */ 498 OWRITE4(sc, OHCI_CONTROL, ctl); 499 500 /* 501 * The controller is now OPERATIONAL. Set a some final 502 * registers that should be set earlier, but that the 503 * controller ignores when in the SUSPEND state. 504 */ 505 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 506 fm |= OHCI_FSMPS(ival) | ival; 507 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 508 per = OHCI_PERIODIC(ival); /* 90% periodic */ 509 OWRITE4(sc, OHCI_PERIODIC_START, per); 510 511 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 512 513 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 514 515 #ifdef USB_DEBUG 516 if (ohcidebug > 5) 517 ohci_dumpregs(sc); 518 #endif 519 520 /* Set up the bus struct. */ 521 sc->sc_bus.methods = &ohci_bus_methods; 522 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 523 524 powerhook_establish(ohci_power, sc); 525 526 return (USBD_NORMAL_COMPLETION); 527 528 bad3: 529 ohci_free_sed(sc, sc->sc_ctrl_head); 530 bad2: 531 ohci_free_sed(sc, sc->sc_bulk_head); 532 bad1: 533 usb_freemem(sc->sc_dmatag, &sc->sc_hccadma); 534 return (r); 535 } 536 537 usbd_status 538 ohci_allocm(bus, dma, size) 539 struct usbd_bus *bus; 540 usb_dma_t *dma; 541 u_int32_t size; 542 { 543 struct ohci_softc *sc = (struct ohci_softc *)bus; 544 545 return (usb_allocmem(sc->sc_dmatag, size, 0, dma)); 546 } 547 548 void 549 ohci_freem(bus, dma) 550 struct usbd_bus *bus; 551 usb_dma_t *dma; 552 { 553 struct ohci_softc *sc = (struct ohci_softc *)bus; 554 555 usb_freemem(sc->sc_dmatag, dma); 556 } 557 558 #if !defined(__OpenBSD__) 559 void 560 ohci_power(why, v) 561 int why; 562 void *v; 563 { 564 #ifdef USB_DEBUG 565 ohci_softc_t *sc = v; 566 567 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 568 /* XXX should suspend/resume */ 569 ohci_dumpregs(sc); 570 #endif 571 } 572 #endif /* !defined(__OpenBSD__) */ 573 574 #ifdef USB_DEBUG 575 void ohcidump(void); 576 void ohcidump(void) { ohci_dumpregs(thesc); } 577 578 void 579 ohci_dumpregs(sc) 580 ohci_softc_t *sc; 581 { 582 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 583 OREAD4(sc, OHCI_REVISION), 584 OREAD4(sc, OHCI_CONTROL), 585 OREAD4(sc, OHCI_COMMAND_STATUS))); 586 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 587 OREAD4(sc, OHCI_INTERRUPT_STATUS), 588 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 589 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 590 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 591 OREAD4(sc, OHCI_HCCA), 592 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 593 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 594 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 595 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 596 OREAD4(sc, OHCI_BULK_HEAD_ED), 597 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 598 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 599 OREAD4(sc, OHCI_DONE_HEAD), 600 OREAD4(sc, OHCI_FM_INTERVAL), 601 OREAD4(sc, OHCI_FM_REMAINING))); 602 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 603 OREAD4(sc, OHCI_FM_NUMBER), 604 OREAD4(sc, OHCI_PERIODIC_START), 605 OREAD4(sc, OHCI_LS_THRESHOLD))); 606 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 607 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 608 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 609 OREAD4(sc, OHCI_RH_STATUS))); 610 DPRINTF((" port1=0x%08x port2=0x%08x\n", 611 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 612 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 613 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 614 LE(sc->sc_hcca->hcca_frame_number), 615 LE(sc->sc_hcca->hcca_done_head))); 616 } 617 #endif 618 619 int 620 ohci_intr(p) 621 void *p; 622 { 623 ohci_softc_t *sc = p; 624 u_int32_t intrs, eintrs; 625 ohci_physaddr_t done; 626 627 /* In case the interrupt occurs before initialization has completed. */ 628 if (sc == NULL || sc->sc_hcca == NULL) { 629 #ifdef DIAGNOSTIC 630 printf("ohci_intr: sc->sc_hcca == NULL\n"); 631 #endif 632 return (0); 633 } 634 635 intrs = 0; 636 done = LE(sc->sc_hcca->hcca_done_head); 637 if (done != 0) { 638 sc->sc_hcca->hcca_done_head = 0; 639 if (done & ~OHCI_DONE_INTRS) 640 intrs = OHCI_WDH; 641 if (done & OHCI_DONE_INTRS) 642 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 643 } else 644 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 645 if (!intrs) 646 return (0); 647 intrs &= ~OHCI_MIE; 648 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 649 eintrs = intrs & sc->sc_eintrs; 650 if (!eintrs) 651 return (0); 652 653 sc->sc_intrs++; 654 DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n", 655 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 656 (u_int)eintrs)); 657 658 if (eintrs & OHCI_SO) { 659 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev)); 660 /* XXX do what */ 661 intrs &= ~OHCI_SO; 662 } 663 if (eintrs & OHCI_WDH) { 664 ohci_process_done(sc, done &~ OHCI_DONE_INTRS); 665 intrs &= ~OHCI_WDH; 666 } 667 if (eintrs & OHCI_RD) { 668 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 669 /* XXX process resume detect */ 670 } 671 if (eintrs & OHCI_UE) { 672 printf("%s: unrecoverable error, controller halted\n", 673 USBDEVNAME(sc->sc_bus.bdev)); 674 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 675 /* XXX what else */ 676 } 677 if (eintrs & OHCI_RHSC) { 678 ohci_rhsc(sc, sc->sc_intrreqh); 679 intrs &= ~OHCI_RHSC; 680 681 /* 682 * Disable RHSC interrupt for now, because it will be 683 * on until the port has been reset. 684 */ 685 ohci_rhsc_able(sc, 0); 686 } 687 688 /* Block unprocessed interrupts. XXX */ 689 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 690 sc->sc_eintrs &= ~intrs; 691 692 return (1); 693 } 694 695 void 696 ohci_rhsc_able(sc, on) 697 ohci_softc_t *sc; 698 int on; 699 { 700 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 701 if (on) { 702 sc->sc_eintrs |= OHCI_RHSC; 703 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 704 } else { 705 sc->sc_eintrs &= ~OHCI_RHSC; 706 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 707 } 708 } 709 710 #ifdef USB_DEBUG 711 char *ohci_cc_strs[] = { 712 "NO_ERROR", 713 "CRC", 714 "BIT_STUFFING", 715 "DATA_TOGGLE_MISMATCH", 716 "STALL", 717 "DEVICE_NOT_RESPONDING", 718 "PID_CHECK_FAILURE", 719 "UNEXPECTED_PID", 720 "DATA_OVERRUN", 721 "DATA_UNDERRUN", 722 "BUFFER_OVERRUN", 723 "BUFFER_UNDERRUN", 724 "NOT_ACCESSED", 725 }; 726 #endif 727 728 void 729 ohci_process_done(sc, done) 730 ohci_softc_t *sc; 731 ohci_physaddr_t done; 732 { 733 ohci_soft_td_t *std, *sdone; 734 usbd_request_handle reqh; 735 int len, cc; 736 737 DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done)); 738 739 /* Reverse the done list. */ 740 for (sdone = 0; done; done = LE(std->td.td_nexttd)) { 741 std = ohci_hash_find_td(sc, done); 742 std->dnext = sdone; 743 sdone = std; 744 } 745 746 #ifdef USB_DEBUG 747 if (ohcidebug > 10) { 748 DPRINTF(("ohci_process_done: TD done:\n")); 749 ohci_dump_tds(sdone); 750 } 751 #endif 752 753 for (std = sdone; std; std = std->dnext) { 754 reqh = std->reqh; 755 DPRINTFN(10, ("ohci_process_done: std=%p reqh=%p hcpriv=%p\n", 756 std, reqh, reqh->hcpriv)); 757 cc = OHCI_TD_GET_CC(LE(std->td.td_flags)); 758 usb_untimeout(ohci_timeout, reqh, reqh->timo_handle); 759 if (reqh->status == USBD_CANCELLED || 760 reqh->status == USBD_TIMEOUT) { 761 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 762 reqh)); 763 /* Handled by abort routine. */ 764 continue; 765 } else if (cc == OHCI_CC_NO_ERROR) { 766 len = std->len; 767 if (std->td.td_cbp != 0) 768 len -= LE(std->td.td_be) - 769 LE(std->td.td_cbp) + 1; 770 if (std->flags & OHCI_SET_LEN) 771 reqh->actlen = len; 772 if (std->flags & OHCI_CALL_DONE) { 773 reqh->status = USBD_NORMAL_COMPLETION; 774 usb_transfer_complete(reqh); 775 } 776 } else { 777 ohci_soft_td_t *p, *n; 778 struct ohci_pipe *opipe = 779 (struct ohci_pipe *)reqh->pipe; 780 DPRINTFN(-1,("ohci_process_done: error cc=%d (%s)\n", 781 OHCI_TD_GET_CC(LE(std->td.td_flags)), 782 ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td.td_flags))])); 783 /* 784 * Endpoint is halted. First unlink all the TDs 785 * belonging to the failed transfer, and then restart 786 * the endpoint. 787 */ 788 for (p = std->nexttd; p->reqh == reqh; p = n) { 789 n = p->nexttd; 790 ohci_hash_rem_td(sc, p); 791 ohci_free_std(sc, p); 792 } 793 /* clear halt */ 794 opipe->sed->ed.ed_headp = LE(p->physaddr); 795 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 796 797 if (cc == OHCI_CC_STALL) 798 reqh->status = USBD_STALLED; 799 else 800 reqh->status = USBD_IOERROR; 801 usb_transfer_complete(reqh); 802 } 803 ohci_hash_rem_td(sc, std); 804 ohci_free_std(sc, std); 805 } 806 } 807 808 void 809 ohci_device_ctrl_done(reqh) 810 usbd_request_handle reqh; 811 { 812 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 813 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 814 u_int len = opipe->u.ctl.length; 815 usb_dma_t *dma; 816 817 DPRINTFN(10,("ohci_ctrl_done: reqh=%p\n", reqh)); 818 819 #ifdef DIAGNOSTIC 820 if (!(reqh->rqflags & URQ_REQUEST)) { 821 panic("ohci_ctrl_done: not a request\n"); 822 } 823 #endif 824 reqh->hcpriv = 0; 825 826 if (len != 0) { 827 dma = &opipe->u.ctl.datadma; 828 if (reqh->request.bmRequestType & UT_READ) 829 memcpy(reqh->buffer, KERNADDR(dma), len); 830 usb_freemem(sc->sc_dmatag, dma); 831 } 832 } 833 834 void 835 ohci_device_intr_done(reqh) 836 usbd_request_handle reqh; 837 { 838 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 839 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 840 usb_dma_t *dma; 841 ohci_soft_ed_t *sed = opipe->sed; 842 ohci_soft_td_t *xfer, *tail; 843 844 845 DPRINTFN(10,("ohci_intr_done: reqh=%p, actlen=%d\n", 846 reqh, reqh->actlen)); 847 848 reqh->hcpriv = 0; 849 850 dma = &opipe->u.intr.datadma; 851 memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen); 852 853 if (reqh->pipe->repeat) { 854 xfer = opipe->tail; 855 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 856 if (!tail) { 857 reqh->status = USBD_NOMEM; 858 return; 859 } 860 tail->reqh = 0; 861 862 xfer->td.td_flags = LE( 863 OHCI_TD_IN | OHCI_TD_NOCC | 864 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 865 if (reqh->flags & USBD_SHORT_XFER_OK) 866 xfer->td.td_flags |= LE(OHCI_TD_R); 867 xfer->td.td_cbp = LE(DMAADDR(dma)); 868 xfer->nexttd = tail; 869 xfer->td.td_nexttd = LE(tail->physaddr); 870 xfer->td.td_be = LE(LE(xfer->td.td_cbp) + reqh->length - 1); 871 xfer->len = reqh->length; 872 xfer->reqh = reqh; 873 xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN; 874 reqh->hcpriv = xfer; 875 876 ohci_hash_add_td(sc, xfer); 877 sed->ed.ed_tailp = LE(tail->physaddr); 878 opipe->tail = tail; 879 } else { 880 usb_freemem(sc->sc_dmatag, dma); 881 } 882 } 883 884 void 885 ohci_device_bulk_done(reqh) 886 usbd_request_handle reqh; 887 { 888 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 889 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 890 u_int len = opipe->u.bulk.length; 891 usb_dma_t *dma; 892 893 DPRINTFN(10,("ohci_bulk_done: reqh=%p, actlen=%d\n", 894 reqh, reqh->actlen)); 895 896 reqh->hcpriv = 0; 897 898 dma = &opipe->u.bulk.datadma; 899 if (opipe->u.bulk.isread) 900 memcpy(reqh->buffer, KERNADDR(dma), len); 901 usb_freemem(sc->sc_dmatag, dma); 902 } 903 904 void 905 ohci_rhsc(sc, reqh) 906 ohci_softc_t *sc; 907 usbd_request_handle reqh; 908 { 909 usbd_pipe_handle pipe; 910 struct ohci_pipe *opipe; 911 u_char *p; 912 int i, m; 913 int hstatus; 914 915 hstatus = OREAD4(sc, OHCI_RH_STATUS); 916 DPRINTF(("ohci_rhsc: sc=%p reqh=%p hstatus=0x%08x\n", 917 sc, reqh, hstatus)); 918 919 if (reqh == 0) { 920 /* Just ignore the change. */ 921 return; 922 } 923 924 pipe = reqh->pipe; 925 opipe = (struct ohci_pipe *)pipe; 926 927 p = KERNADDR(&opipe->u.intr.datadma); 928 m = min(sc->sc_noport, reqh->length * 8 - 1); 929 memset(p, 0, reqh->length); 930 for (i = 1; i <= m; i++) { 931 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 932 p[i/8] |= 1 << (i%8); 933 } 934 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 935 reqh->actlen = reqh->length; 936 reqh->status = USBD_NORMAL_COMPLETION; 937 938 usb_transfer_complete(reqh); 939 } 940 941 void 942 ohci_root_intr_done(reqh) 943 usbd_request_handle reqh; 944 { 945 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 946 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 947 948 reqh->hcpriv = 0; 949 950 if (!reqh->pipe->repeat) 951 usb_freemem(sc->sc_dmatag, &opipe->u.intr.datadma); 952 } 953 954 /* 955 * Wait here until controller claims to have an interrupt. 956 * Then call ohci_intr and return. Use timeout to avoid waiting 957 * too long. 958 */ 959 void 960 ohci_waitintr(sc, reqh) 961 ohci_softc_t *sc; 962 usbd_request_handle reqh; 963 { 964 int timo = reqh->timeout; 965 int usecs; 966 u_int32_t intrs; 967 968 reqh->status = USBD_IN_PROGRESS; 969 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 970 usb_delay_ms(&sc->sc_bus, 1); 971 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 972 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 973 #ifdef USB_DEBUG 974 if (ohcidebug > 15) 975 ohci_dumpregs(sc); 976 #endif 977 if (intrs) { 978 ohci_intr(sc); 979 if (reqh->status != USBD_IN_PROGRESS) 980 return; 981 } 982 } 983 984 /* Timeout */ 985 DPRINTF(("ohci_waitintr: timeout\n")); 986 reqh->status = USBD_TIMEOUT; 987 usb_transfer_complete(reqh); 988 /* XXX should free TD */ 989 } 990 991 void 992 ohci_poll(bus) 993 struct usbd_bus *bus; 994 { 995 ohci_softc_t *sc = (ohci_softc_t *)bus; 996 997 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 998 ohci_intr(sc); 999 } 1000 1001 usbd_status 1002 ohci_device_request(reqh) 1003 usbd_request_handle reqh; 1004 { 1005 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 1006 usb_device_request_t *req = &reqh->request; 1007 usbd_device_handle dev = opipe->pipe.device; 1008 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1009 int addr = dev->address; 1010 ohci_soft_td_t *setup, *xfer = 0, *stat, *next, *tail; 1011 ohci_soft_ed_t *sed; 1012 usb_dma_t *dmap; 1013 int isread; 1014 int len; 1015 usbd_status r; 1016 int s; 1017 1018 isread = req->bmRequestType & UT_READ; 1019 len = UGETW(req->wLength); 1020 1021 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1022 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1023 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1024 UGETW(req->wIndex), len, addr, 1025 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1026 1027 setup = opipe->tail; 1028 stat = ohci_alloc_std(sc); 1029 if (!stat) { 1030 r = USBD_NOMEM; 1031 goto bad1; 1032 } 1033 tail = ohci_alloc_std(sc); 1034 if (!tail) { 1035 r = USBD_NOMEM; 1036 goto bad2; 1037 } 1038 tail->reqh = 0; 1039 1040 sed = opipe->sed; 1041 dmap = &opipe->u.ctl.datadma; 1042 opipe->u.ctl.length = len; 1043 1044 /* Update device address and length since they may have changed. */ 1045 /* XXX This only needs to be done once, but it's too early in open. */ 1046 sed->ed.ed_flags = LE( 1047 (LE(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1048 OHCI_ED_SET_FA(addr) | 1049 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1050 1051 /* Set up data transaction */ 1052 if (len != 0) { 1053 xfer = ohci_alloc_std(sc); 1054 if (!xfer) { 1055 r = USBD_NOMEM; 1056 goto bad3; 1057 } 1058 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1059 if (r != USBD_NORMAL_COMPLETION) 1060 goto bad4; 1061 xfer->td.td_flags = LE( 1062 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 1063 OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR | 1064 (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0)); 1065 xfer->td.td_cbp = LE(DMAADDR(dmap)); 1066 xfer->nexttd = stat; 1067 xfer->td.td_nexttd = LE(stat->physaddr); 1068 xfer->td.td_be = LE(LE(xfer->td.td_cbp) + len - 1); 1069 xfer->len = len; 1070 xfer->reqh = reqh; 1071 xfer->flags = OHCI_SET_LEN; 1072 1073 next = xfer; 1074 stat->flags = OHCI_CALL_DONE; 1075 } else { 1076 next = stat; 1077 stat->flags = OHCI_CALL_DONE | OHCI_SET_LEN; 1078 } 1079 1080 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1081 if (!isread && len != 0) 1082 memcpy(KERNADDR(dmap), reqh->buffer, len); 1083 1084 setup->td.td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC | 1085 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1086 setup->td.td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma)); 1087 setup->nexttd = next; 1088 setup->td.td_nexttd = LE(next->physaddr); 1089 setup->td.td_be = LE(LE(setup->td.td_cbp) + sizeof *req - 1); 1090 setup->len = 0; /* XXX The number of byte we count */ 1091 setup->reqh = reqh; 1092 setup->flags = 0; 1093 reqh->hcpriv = setup; 1094 1095 stat->td.td_flags = LE( 1096 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC | 1097 OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1098 stat->td.td_cbp = 0; 1099 stat->nexttd = tail; 1100 stat->td.td_nexttd = LE(tail->physaddr); 1101 stat->td.td_be = 0; 1102 stat->len = 0; 1103 stat->reqh = reqh; 1104 1105 #if USB_DEBUG 1106 if (ohcidebug > 5) { 1107 DPRINTF(("ohci_device_request:\n")); 1108 ohci_dump_ed(sed); 1109 ohci_dump_tds(setup); 1110 } 1111 #endif 1112 1113 /* Insert ED in schedule */ 1114 s = splusb(); 1115 ohci_hash_add_td(sc, setup); 1116 if (len != 0) 1117 ohci_hash_add_td(sc, xfer); 1118 ohci_hash_add_td(sc, stat); 1119 sed->ed.ed_tailp = LE(tail->physaddr); 1120 opipe->tail = tail; 1121 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1122 if (reqh->timeout && !sc->sc_bus.use_polling) { 1123 usb_timeout(ohci_timeout, reqh, 1124 MS_TO_TICKS(reqh->timeout), reqh->timo_handle); 1125 } 1126 splx(s); 1127 1128 #if USB_DEBUG 1129 if (ohcidebug > 5) { 1130 delay(5000); 1131 DPRINTF(("ohci_device_request: status=%x\n", 1132 OREAD4(sc, OHCI_COMMAND_STATUS))); 1133 ohci_dump_ed(sed); 1134 ohci_dump_tds(setup); 1135 } 1136 #endif 1137 1138 return (USBD_NORMAL_COMPLETION); 1139 1140 bad4: 1141 ohci_free_std(sc, xfer); 1142 bad3: 1143 ohci_free_std(sc, tail); 1144 bad2: 1145 ohci_free_std(sc, stat); 1146 bad1: 1147 return (r); 1148 } 1149 1150 /* 1151 * Add an ED to the schedule. Called at splusb(). 1152 */ 1153 void 1154 ohci_add_ed(sed, head) 1155 ohci_soft_ed_t *sed; 1156 ohci_soft_ed_t *head; 1157 { 1158 sed->next = head->next; 1159 sed->ed.ed_nexted = head->ed.ed_nexted; 1160 head->next = sed; 1161 head->ed.ed_nexted = LE(sed->physaddr); 1162 } 1163 1164 /* 1165 * Remove an ED from the schedule. Called at splusb(). 1166 */ 1167 void 1168 ohci_rem_ed(sed, head) 1169 ohci_soft_ed_t *sed; 1170 ohci_soft_ed_t *head; 1171 { 1172 ohci_soft_ed_t *p; 1173 1174 /* XXX */ 1175 for (p = head; p && p->next != sed; p = p->next) 1176 ; 1177 if (!p) 1178 panic("ohci_rem_ed: ED not found\n"); 1179 p->next = sed->next; 1180 p->ed.ed_nexted = sed->ed.ed_nexted; 1181 } 1182 1183 /* 1184 * When a transfer is completed the TD is added to the done queue by 1185 * the host controller. This queue is the processed by software. 1186 * Unfortunately the queue contains the physical address of the TD 1187 * and we have no simple way to translate this back to a kernel address. 1188 * To make the translation possible (and fast) we use a hash table of 1189 * TDs currently in the schedule. The physical address is used as the 1190 * hash value. 1191 */ 1192 1193 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1194 /* Called at splusb() */ 1195 void 1196 ohci_hash_add_td(sc, std) 1197 ohci_softc_t *sc; 1198 ohci_soft_td_t *std; 1199 { 1200 int h = HASH(std->physaddr); 1201 1202 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1203 } 1204 1205 /* Called at splusb() */ 1206 void 1207 ohci_hash_rem_td(sc, std) 1208 ohci_softc_t *sc; 1209 ohci_soft_td_t *std; 1210 { 1211 LIST_REMOVE(std, hnext); 1212 } 1213 1214 ohci_soft_td_t * 1215 ohci_hash_find_td(sc, a) 1216 ohci_softc_t *sc; 1217 ohci_physaddr_t a; 1218 { 1219 int h = HASH(a); 1220 ohci_soft_td_t *std; 1221 1222 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1223 std != 0; 1224 std = LIST_NEXT(std, hnext)) 1225 if (std->physaddr == a) 1226 return (std); 1227 panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a); 1228 } 1229 1230 void 1231 ohci_timeout(addr) 1232 void *addr; 1233 { 1234 usbd_request_handle reqh = addr; 1235 1236 DPRINTF(("ohci_timeout: reqh=%p\n", reqh)); 1237 ohci_abort_req(reqh, USBD_TIMEOUT); 1238 } 1239 1240 #ifdef USB_DEBUG 1241 void 1242 ohci_dump_tds(std) 1243 ohci_soft_td_t *std; 1244 { 1245 for (; std; std = std->nexttd) 1246 ohci_dump_td(std); 1247 } 1248 1249 void 1250 ohci_dump_td(std) 1251 ohci_soft_td_t *std; 1252 { 1253 DPRINTF(("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1254 "nexttd=0x%08lx be=0x%08lx\n", 1255 std, (u_long)std->physaddr, 1256 (int)LE(std->td.td_flags), 1257 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1258 OHCI_TD_GET_DI(LE(std->td.td_flags)), 1259 OHCI_TD_GET_EC(LE(std->td.td_flags)), 1260 OHCI_TD_GET_CC(LE(std->td.td_flags)), 1261 (u_long)LE(std->td.td_cbp), 1262 (u_long)LE(std->td.td_nexttd), (u_long)LE(std->td.td_be))); 1263 } 1264 1265 void 1266 ohci_dump_ed(sed) 1267 ohci_soft_ed_t *sed; 1268 { 1269 DPRINTF(("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx " 1270 "headp=%b nexted=0x%08lx\n", 1271 sed, (u_long)sed->physaddr, 1272 OHCI_ED_GET_FA(LE(sed->ed.ed_flags)), 1273 OHCI_ED_GET_EN(LE(sed->ed.ed_flags)), 1274 OHCI_ED_GET_MAXP(LE(sed->ed.ed_flags)), 1275 (int)LE(sed->ed.ed_flags), 1276 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1277 (u_long)LE(sed->ed.ed_tailp), 1278 (u_long)LE(sed->ed.ed_headp), "\20\1HALT\2CARRY", 1279 (u_long)LE(sed->ed.ed_nexted))); 1280 } 1281 #endif 1282 1283 usbd_status 1284 ohci_open(pipe) 1285 usbd_pipe_handle pipe; 1286 { 1287 usbd_device_handle dev = pipe->device; 1288 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1289 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1290 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1291 u_int8_t addr = dev->address; 1292 ohci_soft_ed_t *sed; 1293 ohci_soft_td_t *std; 1294 usbd_status r; 1295 int s; 1296 1297 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1298 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1299 if (addr == sc->sc_addr) { 1300 switch (ed->bEndpointAddress) { 1301 case USB_CONTROL_ENDPOINT: 1302 pipe->methods = &ohci_root_ctrl_methods; 1303 break; 1304 case UE_DIR_IN | OHCI_INTR_ENDPT: 1305 pipe->methods = &ohci_root_intr_methods; 1306 break; 1307 default: 1308 return (USBD_INVAL); 1309 } 1310 } else { 1311 sed = ohci_alloc_sed(sc); 1312 if (sed == 0) 1313 goto bad0; 1314 std = ohci_alloc_std(sc); 1315 if (std == 0) 1316 goto bad1; 1317 opipe->sed = sed; 1318 opipe->tail = std; 1319 sed->ed.ed_flags = LE( 1320 OHCI_ED_SET_FA(addr) | 1321 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1322 OHCI_ED_DIR_TD | 1323 (dev->lowspeed ? OHCI_ED_SPEED : 0) | 1324 ((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ? 1325 OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) | 1326 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1327 sed->ed.ed_headp = sed->ed.ed_tailp = LE(std->physaddr); 1328 1329 switch (ed->bmAttributes & UE_XFERTYPE) { 1330 case UE_CONTROL: 1331 pipe->methods = &ohci_device_ctrl_methods; 1332 r = usb_allocmem(sc->sc_dmatag, 1333 sizeof(usb_device_request_t), 1334 0, &opipe->u.ctl.reqdma); 1335 if (r != USBD_NORMAL_COMPLETION) 1336 goto bad; 1337 s = splusb(); 1338 ohci_add_ed(sed, sc->sc_ctrl_head); 1339 splx(s); 1340 break; 1341 case UE_INTERRUPT: 1342 pipe->methods = &ohci_device_intr_methods; 1343 return (ohci_device_setintr(sc, opipe, ed->bInterval)); 1344 case UE_ISOCHRONOUS: 1345 printf("ohci_open: open iso unimplemented\n"); 1346 return (USBD_XXX); 1347 case UE_BULK: 1348 pipe->methods = &ohci_device_bulk_methods; 1349 s = splusb(); 1350 ohci_add_ed(sed, sc->sc_bulk_head); 1351 splx(s); 1352 break; 1353 } 1354 } 1355 return (USBD_NORMAL_COMPLETION); 1356 1357 bad: 1358 ohci_free_std(sc, std); 1359 bad1: 1360 ohci_free_sed(sc, sed); 1361 bad0: 1362 return (USBD_NOMEM); 1363 1364 } 1365 1366 /* 1367 * Close a reqular pipe. 1368 * Assumes that there are no pending transactions. 1369 */ 1370 void 1371 ohci_close_pipe(pipe, head) 1372 usbd_pipe_handle pipe; 1373 ohci_soft_ed_t *head; 1374 { 1375 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1376 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1377 ohci_soft_ed_t *sed = opipe->sed; 1378 int s; 1379 1380 s = splusb(); 1381 #ifdef DIAGNOSTIC 1382 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 1383 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 1384 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) { 1385 ohci_physaddr_t td = sed->ed.ed_headp; 1386 ohci_soft_td_t *std; 1387 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]); 1388 std != 0; 1389 std = LIST_NEXT(std, hnext)) 1390 if (std->physaddr == td) 1391 break; 1392 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 1393 "tl=0x%x pipe=%p, std=%p\n", sed, 1394 (int)LE(sed->ed.ed_headp), (int)LE(sed->ed.ed_tailp), 1395 pipe, std); 1396 usb_delay_ms(&sc->sc_bus, 2); 1397 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 1398 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) 1399 printf("ohci_close_pipe: pipe still not empty\n"); 1400 } 1401 #endif 1402 ohci_rem_ed(sed, head); 1403 splx(s); 1404 ohci_free_std(sc, opipe->tail); 1405 ohci_free_sed(sc, opipe->sed); 1406 } 1407 1408 /* 1409 * Abort a device request. 1410 * If this routine is called at splusb() it guarantees that the request 1411 * will be removed from the hardware scheduling and that the callback 1412 * for it will be called with USBD_CANCELLED status. 1413 * It's impossible to guarantee that the requested transfer will not 1414 * have happened since the hardware runs concurrently. 1415 * If the transaction has already happened we rely on the ordinary 1416 * interrupt processing to process it. 1417 */ 1418 void 1419 ohci_abort_req(reqh, status) 1420 usbd_request_handle reqh; 1421 usbd_status status; 1422 { 1423 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 1424 ohci_soft_ed_t *sed; 1425 1426 DPRINTF(("ohci_abort_req: reqh=%p pipe=%p\n", reqh, opipe)); 1427 1428 reqh->status = status; 1429 1430 usb_untimeout(ohci_timeout, reqh, reqh->timo_handle); 1431 1432 sed = opipe->sed; 1433 DPRINTFN(1,("ohci_abort_req: stop ed=%p\n", sed)); 1434 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); /* force hardware skip */ 1435 1436 if (curproc) { 1437 usb_delay_ms(opipe->pipe.device->bus, 1); 1438 ohci_abort_req_end(reqh); 1439 } else { 1440 timeout(ohci_abort_req_end, reqh, hz / USB_FRAMES_PER_SECOND); 1441 } 1442 } 1443 1444 void 1445 ohci_abort_req_end(v) 1446 void *v; 1447 { 1448 usbd_request_handle reqh = v; 1449 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 1450 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1451 ohci_soft_ed_t *sed; 1452 ohci_soft_td_t *p, *n; 1453 int s; 1454 1455 s = splusb(); 1456 1457 p = reqh->hcpriv; 1458 #ifdef DIAGNOSTIC 1459 if (!p) { 1460 printf("ohci_abort_req: hcpriv==0\n"); 1461 return; 1462 } 1463 #endif 1464 for (; p->reqh == reqh; p = n) { 1465 n = p->nexttd; 1466 ohci_hash_rem_td(sc, p); 1467 ohci_free_std(sc, p); 1468 } 1469 1470 sed = opipe->sed; 1471 DPRINTFN(2,("ohci_abort_req: set hd=%x, tl=%x\n", 1472 (int)LE(p->physaddr), (int)LE(sed->ed.ed_tailp))); 1473 sed->ed.ed_headp = p->physaddr; /* unlink TDs */ 1474 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); /* remove hardware skip */ 1475 1476 usb_transfer_complete(reqh); 1477 1478 splx(s); 1479 } 1480 1481 /* 1482 * Data structures and routines to emulate the root hub. 1483 */ 1484 usb_device_descriptor_t ohci_devd = { 1485 USB_DEVICE_DESCRIPTOR_SIZE, 1486 UDESC_DEVICE, /* type */ 1487 {0x00, 0x01}, /* USB version */ 1488 UCLASS_HUB, /* class */ 1489 USUBCLASS_HUB, /* subclass */ 1490 0, /* protocol */ 1491 64, /* max packet */ 1492 {0},{0},{0x00,0x01}, /* device id */ 1493 1,2,0, /* string indicies */ 1494 1 /* # of configurations */ 1495 }; 1496 1497 usb_config_descriptor_t ohci_confd = { 1498 USB_CONFIG_DESCRIPTOR_SIZE, 1499 UDESC_CONFIG, 1500 {USB_CONFIG_DESCRIPTOR_SIZE + 1501 USB_INTERFACE_DESCRIPTOR_SIZE + 1502 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1503 1, 1504 1, 1505 0, 1506 UC_SELF_POWERED, 1507 0 /* max power */ 1508 }; 1509 1510 usb_interface_descriptor_t ohci_ifcd = { 1511 USB_INTERFACE_DESCRIPTOR_SIZE, 1512 UDESC_INTERFACE, 1513 0, 1514 0, 1515 1, 1516 UCLASS_HUB, 1517 USUBCLASS_HUB, 1518 0, 1519 0 1520 }; 1521 1522 usb_endpoint_descriptor_t ohci_endpd = { 1523 USB_ENDPOINT_DESCRIPTOR_SIZE, 1524 UDESC_ENDPOINT, 1525 UE_DIR_IN | OHCI_INTR_ENDPT, 1526 UE_INTERRUPT, 1527 {8, 0}, /* max packet */ 1528 255 1529 }; 1530 1531 usb_hub_descriptor_t ohci_hubd = { 1532 USB_HUB_DESCRIPTOR_SIZE, 1533 UDESC_HUB, 1534 0, 1535 {0,0}, 1536 0, 1537 0, 1538 {0}, 1539 }; 1540 1541 int 1542 ohci_str(p, l, s) 1543 usb_string_descriptor_t *p; 1544 int l; 1545 char *s; 1546 { 1547 int i; 1548 1549 if (l == 0) 1550 return (0); 1551 p->bLength = 2 * strlen(s) + 2; 1552 if (l == 1) 1553 return (1); 1554 p->bDescriptorType = UDESC_STRING; 1555 l -= 2; 1556 for (i = 0; s[i] && l > 1; i++, l -= 2) 1557 USETW2(p->bString[i], 0, s[i]); 1558 return (2*i+2); 1559 } 1560 1561 /* 1562 * Simulate a hardware hub by handling all the necessary requests. 1563 */ 1564 usbd_status 1565 ohci_root_ctrl_transfer(reqh) 1566 usbd_request_handle reqh; 1567 { 1568 int s; 1569 usbd_status r; 1570 1571 s = splusb(); 1572 r = usb_insert_transfer(reqh); 1573 splx(s); 1574 if (r != USBD_NORMAL_COMPLETION) 1575 return (r); 1576 else 1577 return (ohci_root_ctrl_start(reqh)); 1578 } 1579 1580 usbd_status 1581 ohci_root_ctrl_start(reqh) 1582 usbd_request_handle reqh; 1583 { 1584 ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus; 1585 usb_device_request_t *req; 1586 void *buf; 1587 int port, i; 1588 int len, value, index, l, totlen = 0; 1589 usb_port_status_t ps; 1590 usb_hub_descriptor_t hubd; 1591 usbd_status r; 1592 u_int32_t v; 1593 1594 #ifdef DIAGNOSTIC 1595 if (!(reqh->rqflags & URQ_REQUEST)) 1596 /* XXX panic */ 1597 return (USBD_INVAL); 1598 #endif 1599 req = &reqh->request; 1600 buf = reqh->buffer; 1601 1602 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 1603 req->bmRequestType, req->bRequest)); 1604 1605 len = UGETW(req->wLength); 1606 value = UGETW(req->wValue); 1607 index = UGETW(req->wIndex); 1608 #define C(x,y) ((x) | ((y) << 8)) 1609 switch(C(req->bRequest, req->bmRequestType)) { 1610 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1611 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1612 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1613 /* 1614 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1615 * for the integrated root hub. 1616 */ 1617 break; 1618 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1619 if (len > 0) { 1620 *(u_int8_t *)buf = sc->sc_conf; 1621 totlen = 1; 1622 } 1623 break; 1624 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1625 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 1626 switch(value >> 8) { 1627 case UDESC_DEVICE: 1628 if ((value & 0xff) != 0) { 1629 r = USBD_IOERROR; 1630 goto ret; 1631 } 1632 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1633 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 1634 memcpy(buf, &ohci_devd, l); 1635 break; 1636 case UDESC_CONFIG: 1637 if ((value & 0xff) != 0) { 1638 r = USBD_IOERROR; 1639 goto ret; 1640 } 1641 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1642 memcpy(buf, &ohci_confd, l); 1643 buf = (char *)buf + l; 1644 len -= l; 1645 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1646 totlen += l; 1647 memcpy(buf, &ohci_ifcd, l); 1648 buf = (char *)buf + l; 1649 len -= l; 1650 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1651 totlen += l; 1652 memcpy(buf, &ohci_endpd, l); 1653 break; 1654 case UDESC_STRING: 1655 if (len == 0) 1656 break; 1657 *(u_int8_t *)buf = 0; 1658 totlen = 1; 1659 switch (value & 0xff) { 1660 case 1: /* Vendor */ 1661 totlen = ohci_str(buf, len, sc->sc_vendor); 1662 break; 1663 case 2: /* Product */ 1664 totlen = ohci_str(buf, len, "OHCI root hub"); 1665 break; 1666 } 1667 break; 1668 default: 1669 r = USBD_IOERROR; 1670 goto ret; 1671 } 1672 break; 1673 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1674 if (len > 0) { 1675 *(u_int8_t *)buf = 0; 1676 totlen = 1; 1677 } 1678 break; 1679 case C(UR_GET_STATUS, UT_READ_DEVICE): 1680 if (len > 1) { 1681 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1682 totlen = 2; 1683 } 1684 break; 1685 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1686 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1687 if (len > 1) { 1688 USETW(((usb_status_t *)buf)->wStatus, 0); 1689 totlen = 2; 1690 } 1691 break; 1692 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1693 if (value >= USB_MAX_DEVICES) { 1694 r = USBD_IOERROR; 1695 goto ret; 1696 } 1697 sc->sc_addr = value; 1698 break; 1699 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1700 if (value != 0 && value != 1) { 1701 r = USBD_IOERROR; 1702 goto ret; 1703 } 1704 sc->sc_conf = value; 1705 break; 1706 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1707 break; 1708 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1709 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1710 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1711 r = USBD_IOERROR; 1712 goto ret; 1713 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1714 break; 1715 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1716 break; 1717 /* Hub requests */ 1718 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1719 break; 1720 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1721 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1722 "port=%d feature=%d\n", 1723 index, value)); 1724 if (index < 1 || index > sc->sc_noport) { 1725 r = USBD_IOERROR; 1726 goto ret; 1727 } 1728 port = OHCI_RH_PORT_STATUS(index); 1729 switch(value) { 1730 case UHF_PORT_ENABLE: 1731 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 1732 break; 1733 case UHF_PORT_SUSPEND: 1734 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 1735 break; 1736 case UHF_PORT_POWER: 1737 OWRITE4(sc, port, UPS_LOW_SPEED); 1738 break; 1739 case UHF_C_PORT_CONNECTION: 1740 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 1741 break; 1742 case UHF_C_PORT_ENABLE: 1743 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 1744 break; 1745 case UHF_C_PORT_SUSPEND: 1746 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 1747 break; 1748 case UHF_C_PORT_OVER_CURRENT: 1749 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 1750 break; 1751 case UHF_C_PORT_RESET: 1752 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 1753 break; 1754 default: 1755 r = USBD_IOERROR; 1756 goto ret; 1757 } 1758 switch(value) { 1759 case UHF_C_PORT_CONNECTION: 1760 case UHF_C_PORT_ENABLE: 1761 case UHF_C_PORT_SUSPEND: 1762 case UHF_C_PORT_OVER_CURRENT: 1763 case UHF_C_PORT_RESET: 1764 /* Enable RHSC interrupt if condition is cleared. */ 1765 if ((OREAD4(sc, port) >> 16) == 0) 1766 ohci_rhsc_able(sc, 1); 1767 break; 1768 default: 1769 break; 1770 } 1771 break; 1772 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1773 if (value != 0) { 1774 r = USBD_IOERROR; 1775 goto ret; 1776 } 1777 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 1778 hubd = ohci_hubd; 1779 hubd.bNbrPorts = sc->sc_noport; 1780 USETW(hubd.wHubCharacteristics, 1781 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 1782 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 1783 /* XXX overcurrent */ 1784 ); 1785 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 1786 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 1787 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1788 hubd.DeviceRemovable[i++] = (u_int8_t)v; 1789 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1790 l = min(len, hubd.bDescLength); 1791 totlen = l; 1792 memcpy(buf, &hubd, l); 1793 break; 1794 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1795 if (len != 4) { 1796 r = USBD_IOERROR; 1797 goto ret; 1798 } 1799 memset(buf, 0, len); /* ? XXX */ 1800 totlen = len; 1801 break; 1802 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1803 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 1804 index)); 1805 if (index < 1 || index > sc->sc_noport) { 1806 r = USBD_IOERROR; 1807 goto ret; 1808 } 1809 if (len != 4) { 1810 r = USBD_IOERROR; 1811 goto ret; 1812 } 1813 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 1814 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 1815 v)); 1816 USETW(ps.wPortStatus, v); 1817 USETW(ps.wPortChange, v >> 16); 1818 l = min(len, sizeof ps); 1819 memcpy(buf, &ps, l); 1820 totlen = l; 1821 break; 1822 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1823 r = USBD_IOERROR; 1824 goto ret; 1825 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1826 break; 1827 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1828 if (index < 1 || index > sc->sc_noport) { 1829 r = USBD_IOERROR; 1830 goto ret; 1831 } 1832 port = OHCI_RH_PORT_STATUS(index); 1833 switch(value) { 1834 case UHF_PORT_ENABLE: 1835 OWRITE4(sc, port, UPS_PORT_ENABLED); 1836 break; 1837 case UHF_PORT_SUSPEND: 1838 OWRITE4(sc, port, UPS_SUSPEND); 1839 break; 1840 case UHF_PORT_RESET: 1841 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 1842 index)); 1843 OWRITE4(sc, port, UPS_RESET); 1844 for (i = 0; i < 10; i++) { 1845 usb_delay_ms(&sc->sc_bus, 10); 1846 if ((OREAD4(sc, port) & UPS_RESET) == 0) 1847 break; 1848 } 1849 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 1850 index, OREAD4(sc, port))); 1851 break; 1852 case UHF_PORT_POWER: 1853 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 1854 "%d\n", index)); 1855 OWRITE4(sc, port, UPS_PORT_POWER); 1856 break; 1857 default: 1858 r = USBD_IOERROR; 1859 goto ret; 1860 } 1861 break; 1862 default: 1863 r = USBD_IOERROR; 1864 goto ret; 1865 } 1866 reqh->actlen = totlen; 1867 r = USBD_NORMAL_COMPLETION; 1868 ret: 1869 reqh->status = r; 1870 usb_transfer_complete(reqh); 1871 return (USBD_IN_PROGRESS); 1872 } 1873 1874 /* Abort a root control request. */ 1875 void 1876 ohci_root_ctrl_abort(reqh) 1877 usbd_request_handle reqh; 1878 { 1879 /* Nothing to do, all transfers are synchronous. */ 1880 } 1881 1882 /* Close the root pipe. */ 1883 void 1884 ohci_root_ctrl_close(pipe) 1885 usbd_pipe_handle pipe; 1886 { 1887 DPRINTF(("ohci_root_ctrl_close\n")); 1888 /* Nothing to do. */ 1889 } 1890 1891 usbd_status 1892 ohci_root_intr_transfer(reqh) 1893 usbd_request_handle reqh; 1894 { 1895 int s; 1896 usbd_status r; 1897 1898 s = splusb(); 1899 r = usb_insert_transfer(reqh); 1900 splx(s); 1901 if (r != USBD_NORMAL_COMPLETION) 1902 return (r); 1903 else 1904 return (ohci_root_intr_start(reqh)); 1905 } 1906 1907 usbd_status 1908 ohci_root_intr_start(reqh) 1909 usbd_request_handle reqh; 1910 { 1911 usbd_pipe_handle pipe = reqh->pipe; 1912 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1913 struct ohci_pipe *upipe = (struct ohci_pipe *)pipe; 1914 usb_dma_t *dmap; 1915 usbd_status r; 1916 int len; 1917 1918 len = reqh->length; 1919 dmap = &upipe->u.intr.datadma; 1920 if (len == 0) 1921 return (USBD_INVAL); /* XXX should it be? */ 1922 1923 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 1924 if (r != USBD_NORMAL_COMPLETION) 1925 return (r); 1926 sc->sc_intrreqh = reqh; 1927 1928 return (USBD_IN_PROGRESS); 1929 } 1930 1931 /* Abort a root interrupt request. */ 1932 void 1933 ohci_root_intr_abort(reqh) 1934 usbd_request_handle reqh; 1935 { 1936 /* No need to abort. */ 1937 } 1938 1939 /* Close the root pipe. */ 1940 void 1941 ohci_root_intr_close(pipe) 1942 usbd_pipe_handle pipe; 1943 { 1944 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1945 1946 DPRINTF(("ohci_root_intr_close\n")); 1947 1948 sc->sc_intrreqh = 0; 1949 } 1950 1951 /************************/ 1952 1953 usbd_status 1954 ohci_device_ctrl_transfer(reqh) 1955 usbd_request_handle reqh; 1956 { 1957 int s; 1958 usbd_status r; 1959 1960 s = splusb(); 1961 r = usb_insert_transfer(reqh); 1962 splx(s); 1963 if (r != USBD_NORMAL_COMPLETION) 1964 return (r); 1965 else 1966 return (ohci_device_ctrl_start(reqh)); 1967 } 1968 1969 usbd_status 1970 ohci_device_ctrl_start(reqh) 1971 usbd_request_handle reqh; 1972 { 1973 ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus; 1974 usbd_status r; 1975 1976 #ifdef DIAGNOSTIC 1977 if (!(reqh->rqflags & URQ_REQUEST)) { 1978 /* XXX panic */ 1979 printf("ohci_device_ctrl_transfer: not a request\n"); 1980 return (USBD_INVAL); 1981 } 1982 #endif 1983 1984 r = ohci_device_request(reqh); 1985 if (r != USBD_NORMAL_COMPLETION) 1986 return (r); 1987 1988 if (sc->sc_bus.use_polling) 1989 ohci_waitintr(sc, reqh); 1990 return (USBD_IN_PROGRESS); 1991 } 1992 1993 /* Abort a device control request. */ 1994 void 1995 ohci_device_ctrl_abort(reqh) 1996 usbd_request_handle reqh; 1997 { 1998 DPRINTF(("ohci_device_ctrl_abort: reqh=%p\n", reqh)); 1999 ohci_abort_req(reqh, USBD_CANCELLED); 2000 } 2001 2002 /* Close a device control pipe. */ 2003 void 2004 ohci_device_ctrl_close(pipe) 2005 usbd_pipe_handle pipe; 2006 { 2007 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2008 2009 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2010 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2011 } 2012 2013 /************************/ 2014 2015 void 2016 ohci_device_clear_toggle(pipe) 2017 usbd_pipe_handle pipe; 2018 { 2019 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2020 2021 opipe->sed->ed.ed_tailp &= LE(~OHCI_TOGGLECARRY); 2022 } 2023 2024 void 2025 ohci_noop(pipe) 2026 usbd_pipe_handle pipe; 2027 { 2028 } 2029 2030 usbd_status 2031 ohci_device_bulk_transfer(reqh) 2032 usbd_request_handle reqh; 2033 { 2034 int s; 2035 usbd_status r; 2036 2037 s = splusb(); 2038 r = usb_insert_transfer(reqh); 2039 splx(s); 2040 if (r != USBD_NORMAL_COMPLETION) 2041 return (r); 2042 else 2043 return (ohci_device_bulk_start(reqh)); 2044 } 2045 2046 usbd_status 2047 ohci_device_bulk_start(reqh) 2048 usbd_request_handle reqh; 2049 { 2050 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 2051 usbd_device_handle dev = opipe->pipe.device; 2052 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2053 int addr = dev->address; 2054 ohci_soft_td_t *xfer, *tail; 2055 ohci_soft_ed_t *sed; 2056 usb_dma_t *dmap; 2057 usbd_status r; 2058 int s, len, isread, endpt; 2059 2060 #ifdef DIAGNOSTIC 2061 if (reqh->rqflags & URQ_REQUEST) { 2062 /* XXX panic */ 2063 printf("ohci_device_bulk_start: a request\n"); 2064 return (USBD_INVAL); 2065 } 2066 #endif 2067 2068 len = reqh->length; 2069 dmap = &opipe->u.bulk.datadma; 2070 endpt = reqh->pipe->endpoint->edesc->bEndpointAddress; 2071 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2072 sed = opipe->sed; 2073 2074 DPRINTFN(4,("ohci_device_bulk_start: reqh=%p len=%d isread=%d " 2075 "flags=%d endpt=%d\n", reqh, len, isread, reqh->flags, 2076 endpt)); 2077 2078 opipe->u.bulk.isread = isread; 2079 opipe->u.bulk.length = len; 2080 2081 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 2082 if (r != USBD_NORMAL_COMPLETION) 2083 goto ret1; 2084 2085 tail = ohci_alloc_std(sc); 2086 if (!tail) { 2087 r = USBD_NOMEM; 2088 goto ret2; 2089 } 2090 tail->reqh = 0; 2091 2092 /* Update device address */ 2093 sed->ed.ed_flags = LE( 2094 (LE(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2095 OHCI_ED_SET_FA(addr)); 2096 2097 /* Set up data transaction */ 2098 xfer = opipe->tail; 2099 xfer->td.td_flags = LE( 2100 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 2101 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY | 2102 (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0)); 2103 xfer->td.td_cbp = LE(DMAADDR(dmap)); 2104 xfer->nexttd = tail; 2105 xfer->td.td_nexttd = LE(tail->physaddr); 2106 xfer->td.td_be = LE(LE(xfer->td.td_cbp) + len - 1); 2107 xfer->len = len; 2108 xfer->reqh = reqh; 2109 xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN; 2110 reqh->hcpriv = xfer; 2111 2112 if (!isread) 2113 memcpy(KERNADDR(dmap), reqh->buffer, len); 2114 2115 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2116 "td_cbp=0x%08x td_be=0x%08x\n", 2117 (int)LE(sed->ed.ed_flags), (int)LE(xfer->td.td_flags), 2118 (int)LE(xfer->td.td_cbp), (int)LE(xfer->td.td_be))); 2119 2120 #ifdef USB_DEBUG 2121 if (ohcidebug > 4) { 2122 ohci_dump_ed(sed); 2123 ohci_dump_tds(xfer); 2124 } 2125 #endif 2126 2127 /* Insert ED in schedule */ 2128 s = splusb(); 2129 ohci_hash_add_td(sc, xfer); 2130 sed->ed.ed_tailp = LE(tail->physaddr); 2131 opipe->tail = tail; 2132 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); 2133 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2134 if (reqh->timeout && !sc->sc_bus.use_polling) { 2135 usb_timeout(ohci_timeout, reqh, 2136 MS_TO_TICKS(reqh->timeout), reqh->timo_handle); 2137 } 2138 2139 #ifdef USB_DEBUG 2140 if (ohcidebug > 5) { 2141 delay(5000); 2142 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2143 OREAD4(sc, OHCI_COMMAND_STATUS))); 2144 ohci_dump_ed(sed); 2145 ohci_dump_tds(xfer); 2146 } 2147 #endif 2148 2149 splx(s); 2150 2151 return (USBD_IN_PROGRESS); 2152 2153 ret2: 2154 usb_freemem(sc->sc_dmatag, dmap); 2155 ret1: 2156 return (r); 2157 } 2158 2159 void 2160 ohci_device_bulk_abort(reqh) 2161 usbd_request_handle reqh; 2162 { 2163 DPRINTF(("ohci_device_bulk_abort: reqh=%p\n", reqh)); 2164 ohci_abort_req(reqh, USBD_CANCELLED); 2165 } 2166 2167 /* 2168 * Close a device bulk pipe. 2169 */ 2170 void 2171 ohci_device_bulk_close(pipe) 2172 usbd_pipe_handle pipe; 2173 { 2174 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2175 2176 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2177 ohci_close_pipe(pipe, sc->sc_bulk_head); 2178 } 2179 2180 /************************/ 2181 2182 usbd_status 2183 ohci_device_intr_transfer(reqh) 2184 usbd_request_handle reqh; 2185 { 2186 int s; 2187 usbd_status r; 2188 2189 s = splusb(); 2190 r = usb_insert_transfer(reqh); 2191 splx(s); 2192 if (r != USBD_NORMAL_COMPLETION) 2193 return (r); 2194 else 2195 return (ohci_device_intr_start(reqh)); 2196 } 2197 2198 usbd_status 2199 ohci_device_intr_start(reqh) 2200 usbd_request_handle reqh; 2201 { 2202 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 2203 usbd_device_handle dev = opipe->pipe.device; 2204 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2205 ohci_soft_ed_t *sed = opipe->sed; 2206 ohci_soft_td_t *xfer, *tail; 2207 usb_dma_t *dmap; 2208 usbd_status r; 2209 int len; 2210 int s; 2211 2212 DPRINTFN(3, ("ohci_device_intr_transfer: reqh=%p buf=%p len=%d " 2213 "flags=%d priv=%p\n", 2214 reqh, reqh->buffer, reqh->length, reqh->flags, reqh->priv)); 2215 2216 #ifdef DIAGNOSTIC 2217 if (reqh->rqflags & URQ_REQUEST) 2218 panic("ohci_device_intr_transfer: a request\n"); 2219 #endif 2220 2221 len = reqh->length; 2222 dmap = &opipe->u.intr.datadma; 2223 if (len == 0) 2224 return (USBD_INVAL); /* XXX should it be? */ 2225 2226 xfer = opipe->tail; 2227 tail = ohci_alloc_std(sc); 2228 if (!tail) { 2229 r = USBD_NOMEM; 2230 goto ret1; 2231 } 2232 tail->reqh = 0; 2233 2234 r = usb_allocmem(sc->sc_dmatag, len, 0, dmap); 2235 if (r != USBD_NORMAL_COMPLETION) 2236 goto ret2; 2237 2238 xfer->td.td_flags = LE( 2239 OHCI_TD_IN | OHCI_TD_NOCC | 2240 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2241 if (reqh->flags & USBD_SHORT_XFER_OK) 2242 xfer->td.td_flags |= LE(OHCI_TD_R); 2243 xfer->td.td_cbp = LE(DMAADDR(dmap)); 2244 xfer->nexttd = tail; 2245 xfer->td.td_nexttd = LE(tail->physaddr); 2246 xfer->td.td_be = LE(LE(xfer->td.td_cbp) + len - 1); 2247 xfer->len = len; 2248 xfer->reqh = reqh; 2249 xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN; 2250 reqh->hcpriv = xfer; 2251 2252 #if USB_DEBUG 2253 if (ohcidebug > 5) { 2254 DPRINTF(("ohci_device_intr_transfer:\n")); 2255 ohci_dump_ed(sed); 2256 ohci_dump_tds(xfer); 2257 } 2258 #endif 2259 2260 /* Insert ED in schedule */ 2261 s = splusb(); 2262 ohci_hash_add_td(sc, xfer); 2263 sed->ed.ed_tailp = LE(tail->physaddr); 2264 opipe->tail = tail; 2265 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); 2266 2267 #ifdef USB_DEBUG 2268 if (ohcidebug > 5) { 2269 delay(5000); 2270 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2271 OREAD4(sc, OHCI_COMMAND_STATUS))); 2272 ohci_dump_ed(sed); 2273 ohci_dump_tds(xfer); 2274 } 2275 #endif 2276 splx(s); 2277 2278 return (USBD_IN_PROGRESS); 2279 2280 ret2: 2281 ohci_free_std(sc, xfer); 2282 ret1: 2283 return (r); 2284 } 2285 2286 /* Abort a device control request. */ 2287 void 2288 ohci_device_intr_abort(reqh) 2289 usbd_request_handle reqh; 2290 { 2291 if (reqh->pipe->intrreqh == reqh) { 2292 DPRINTF(("ohci_device_intr_abort: remove\n")); 2293 reqh->pipe->intrreqh = 0; 2294 } 2295 ohci_abort_req(reqh, USBD_CANCELLED); 2296 } 2297 2298 /* Close a device interrupt pipe. */ 2299 void 2300 ohci_device_intr_close(pipe) 2301 usbd_pipe_handle pipe; 2302 { 2303 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2304 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2305 int nslots = opipe->u.intr.nslots; 2306 int pos = opipe->u.intr.pos; 2307 int j; 2308 ohci_soft_ed_t *p, *sed = opipe->sed; 2309 int s; 2310 2311 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2312 pipe, nslots, pos)); 2313 s = splusb(); 2314 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 2315 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 2316 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) 2317 usb_delay_ms(&sc->sc_bus, 2); 2318 2319 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2320 ; 2321 if (!p) 2322 panic("ohci_device_intr_close: ED not found\n"); 2323 p->next = sed->next; 2324 p->ed.ed_nexted = sed->ed.ed_nexted; 2325 splx(s); 2326 2327 for (j = 0; j < nslots; j++) 2328 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2329 2330 ohci_free_std(sc, opipe->tail); 2331 ohci_free_sed(sc, opipe->sed); 2332 } 2333 2334 usbd_status 2335 ohci_device_setintr(sc, opipe, ival) 2336 ohci_softc_t *sc; 2337 struct ohci_pipe *opipe; 2338 int ival; 2339 { 2340 int i, j, s, best; 2341 u_int npoll, slow, shigh, nslots; 2342 u_int bestbw, bw; 2343 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2344 2345 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2346 if (ival == 0) { 2347 printf("ohci_setintr: 0 interval\n"); 2348 return (USBD_INVAL); 2349 } 2350 2351 npoll = OHCI_NO_INTRS; 2352 while (npoll > ival) 2353 npoll /= 2; 2354 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2355 2356 /* 2357 * We now know which level in the tree the ED must go into. 2358 * Figure out which slot has most bandwidth left over. 2359 * Slots to examine: 2360 * npoll 2361 * 1 0 2362 * 2 1 2 2363 * 4 3 4 5 6 2364 * 8 7 8 9 10 11 12 13 14 2365 * N (N-1) .. (N-1+N-1) 2366 */ 2367 slow = npoll-1; 2368 shigh = slow + npoll; 2369 nslots = OHCI_NO_INTRS / npoll; 2370 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2371 bw = 0; 2372 for (j = 0; j < nslots; j++) 2373 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 2374 if (bw < bestbw) { 2375 best = i; 2376 bestbw = bw; 2377 } 2378 } 2379 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2380 best, slow, shigh, bestbw)); 2381 2382 s = splusb(); 2383 hsed = sc->sc_eds[best]; 2384 sed->next = hsed->next; 2385 sed->ed.ed_nexted = hsed->ed.ed_nexted; 2386 hsed->next = sed; 2387 hsed->ed.ed_nexted = LE(sed->physaddr); 2388 splx(s); 2389 2390 for (j = 0; j < nslots; j++) 2391 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 2392 opipe->u.intr.nslots = nslots; 2393 opipe->u.intr.pos = best; 2394 2395 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 2396 return (USBD_NORMAL_COMPLETION); 2397 } 2398 2399
Indexes created Wed Sep 24 14:09:57 GMT 2025