ohci.c revision 1.43
1 /* $NetBSD: ohci.c,v 1.43 1999/09/11 08:19:26 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (augustss (at) carlstedt.se) at 9 * Carlstedt Research & Technology. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * USB Open Host Controller driver. 42 * 43 * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe 44 * USB spec: http://www.usb.org/developers/data/usb11.pdf 45 */ 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/kernel.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/device.h> 53 #elif defined(__FreeBSD__) 54 #include <sys/module.h> 55 #include <sys/bus.h> 56 #endif 57 #include <sys/proc.h> 58 #include <sys/queue.h> 59 #include <sys/select.h> 60 61 #include <machine/bus.h> 62 #include <machine/endian.h> 63 64 #include <dev/usb/usb.h> 65 #include <dev/usb/usbdi.h> 66 #include <dev/usb/usbdivar.h> 67 #include <dev/usb/usb_mem.h> 68 #include <dev/usb/usb_quirks.h> 69 70 #include <dev/usb/ohcireg.h> 71 #include <dev/usb/ohcivar.h> 72 73 #if defined(__FreeBSD__) 74 #include <machine/clock.h> 75 76 #define delay(d) DELAY(d) 77 78 #endif 79 80 #if defined(__OpenBSD__) 81 struct cfdriver ohci_cd = { 82 NULL, "ohci", DV_DULL 83 }; 84 #endif 85 86 /* 87 * The OHCI controller is little endian, so on big endian machines 88 * the data strored in memory needs to be swapped. 89 */ 90 #if BYTE_ORDER == BIG_ENDIAN 91 #define LE(x) (bswap32(x)) 92 #else 93 #define LE(x) (x) 94 #endif 95 96 struct ohci_pipe; 97 98 ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *)); 99 void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *)); 100 101 ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *)); 102 void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *)); 103 104 void ohci_power __P((int, void *)); 105 usbd_status ohci_open __P((usbd_pipe_handle)); 106 void ohci_poll __P((struct usbd_bus *)); 107 void ohci_waitintr __P((ohci_softc_t *, usbd_request_handle)); 108 void ohci_rhsc __P((ohci_softc_t *, usbd_request_handle)); 109 void ohci_process_done __P((ohci_softc_t *, ohci_physaddr_t)); 110 111 usbd_status ohci_device_request __P((usbd_request_handle reqh)); 112 void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 113 void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 114 void ohci_hash_add_td __P((ohci_softc_t *, ohci_soft_td_t *)); 115 void ohci_hash_rem_td __P((ohci_softc_t *, ohci_soft_td_t *)); 116 ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, ohci_physaddr_t)); 117 118 usbd_status ohci_allocm __P((struct usbd_bus *, usb_dma_t *, u_int32_t)); 119 void ohci_freem __P((struct usbd_bus *, usb_dma_t *)); 120 121 usbd_status ohci_root_ctrl_transfer __P((usbd_request_handle)); 122 usbd_status ohci_root_ctrl_start __P((usbd_request_handle)); 123 void ohci_root_ctrl_abort __P((usbd_request_handle)); 124 void ohci_root_ctrl_close __P((usbd_pipe_handle)); 125 126 usbd_status ohci_root_intr_transfer __P((usbd_request_handle)); 127 usbd_status ohci_root_intr_start __P((usbd_request_handle)); 128 void ohci_root_intr_abort __P((usbd_request_handle)); 129 void ohci_root_intr_close __P((usbd_pipe_handle)); 130 void ohci_root_intr_done __P((usbd_request_handle)); 131 132 usbd_status ohci_device_ctrl_transfer __P((usbd_request_handle)); 133 usbd_status ohci_device_ctrl_start __P((usbd_request_handle)); 134 void ohci_device_ctrl_abort __P((usbd_request_handle)); 135 void ohci_device_ctrl_close __P((usbd_pipe_handle)); 136 void ohci_device_ctrl_done __P((usbd_request_handle)); 137 138 usbd_status ohci_device_bulk_transfer __P((usbd_request_handle)); 139 usbd_status ohci_device_bulk_start __P((usbd_request_handle)); 140 void ohci_device_bulk_abort __P((usbd_request_handle)); 141 void ohci_device_bulk_close __P((usbd_pipe_handle)); 142 void ohci_device_bulk_done __P((usbd_request_handle)); 143 144 usbd_status ohci_device_intr_transfer __P((usbd_request_handle)); 145 usbd_status ohci_device_intr_start __P((usbd_request_handle)); 146 void ohci_device_intr_abort __P((usbd_request_handle)); 147 void ohci_device_intr_close __P((usbd_pipe_handle)); 148 void ohci_device_intr_done __P((usbd_request_handle)); 149 150 usbd_status ohci_device_isoc_transfer __P((usbd_request_handle)); 151 usbd_status ohci_device_isoc_start __P((usbd_request_handle)); 152 void ohci_device_isoc_abort __P((usbd_request_handle)); 153 void ohci_device_isoc_close __P((usbd_pipe_handle)); 154 void ohci_device_isoc_done __P((usbd_request_handle)); 155 156 usbd_status ohci_device_setintr __P((ohci_softc_t *sc, 157 struct ohci_pipe *pipe, int ival)); 158 159 int ohci_str __P((usb_string_descriptor_t *, int, char *)); 160 161 void ohci_timeout __P((void *)); 162 void ohci_rhsc_able __P((ohci_softc_t *, int)); 163 164 void ohci_close_pipe __P((usbd_pipe_handle pipe, 165 ohci_soft_ed_t *head)); 166 void ohci_abort_req __P((usbd_request_handle reqh, 167 usbd_status status)); 168 void ohci_abort_req_end __P((void *)); 169 170 void ohci_device_clear_toggle __P((usbd_pipe_handle pipe)); 171 void ohci_noop __P((usbd_pipe_handle pipe)); 172 173 #ifdef USB_DEBUG 174 ohci_softc_t *thesc; 175 void ohci_dumpregs __P((ohci_softc_t *)); 176 void ohci_dump_tds __P((ohci_soft_td_t *)); 177 void ohci_dump_td __P((ohci_soft_td_t *)); 178 void ohci_dump_ed __P((ohci_soft_ed_t *)); 179 #endif 180 181 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 182 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 183 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 184 185 /* Reverse the bits in a value 0 .. 31 */ 186 static u_int8_t revbits[OHCI_NO_INTRS] = 187 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 188 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 189 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 190 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 191 192 struct ohci_pipe { 193 struct usbd_pipe pipe; 194 ohci_soft_ed_t *sed; 195 ohci_soft_td_t *tail; 196 /* Info needed for different pipe kinds. */ 197 union { 198 /* Control pipe */ 199 struct { 200 usb_dma_t reqdma; 201 u_int length; 202 ohci_soft_td_t *setup, *xfer, *stat; 203 } ctl; 204 /* Interrupt pipe */ 205 struct { 206 int nslots; 207 int pos; 208 } intr; 209 /* Bulk pipe */ 210 struct { 211 u_int length; 212 int isread; 213 } bulk; 214 /* Iso pipe */ 215 struct iso { 216 int xxxxx; 217 } iso; 218 } u; 219 }; 220 221 #define OHCI_INTR_ENDPT 1 222 223 struct usbd_bus_methods ohci_bus_methods = { 224 ohci_open, 225 ohci_poll, 226 ohci_allocm, 227 ohci_freem, 228 }; 229 230 struct usbd_pipe_methods ohci_root_ctrl_methods = { 231 ohci_root_ctrl_transfer, 232 ohci_root_ctrl_start, 233 ohci_root_ctrl_abort, 234 ohci_root_ctrl_close, 235 ohci_noop, 236 0, 237 }; 238 239 struct usbd_pipe_methods ohci_root_intr_methods = { 240 ohci_root_intr_transfer, 241 ohci_root_intr_start, 242 ohci_root_intr_abort, 243 ohci_root_intr_close, 244 ohci_noop, 245 ohci_root_intr_done, 246 }; 247 248 struct usbd_pipe_methods ohci_device_ctrl_methods = { 249 ohci_device_ctrl_transfer, 250 ohci_device_ctrl_start, 251 ohci_device_ctrl_abort, 252 ohci_device_ctrl_close, 253 ohci_noop, 254 ohci_device_ctrl_done, 255 }; 256 257 struct usbd_pipe_methods ohci_device_intr_methods = { 258 ohci_device_intr_transfer, 259 ohci_device_intr_start, 260 ohci_device_intr_abort, 261 ohci_device_intr_close, 262 ohci_device_clear_toggle, 263 ohci_device_intr_done, 264 }; 265 266 struct usbd_pipe_methods ohci_device_bulk_methods = { 267 ohci_device_bulk_transfer, 268 ohci_device_bulk_start, 269 ohci_device_bulk_abort, 270 ohci_device_bulk_close, 271 ohci_device_clear_toggle, 272 ohci_device_bulk_done, 273 }; 274 275 #if 0 276 struct usbd_pipe_methods ohci_device_isoc_methods = { 277 ohci_device_isoc_transfer, 278 ohci_device_isoc_start, 279 ohci_device_isoc_abort, 280 ohci_device_isoc_close, 281 ohci_noop, 282 ohci_device_isoc_done, 283 }; 284 #endif 285 286 ohci_soft_ed_t * 287 ohci_alloc_sed(sc) 288 ohci_softc_t *sc; 289 { 290 ohci_soft_ed_t *sed; 291 usbd_status r; 292 int i, offs; 293 usb_dma_t dma; 294 295 if (!sc->sc_freeeds) { 296 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 297 r = usb_allocmem(sc->sc_dmatag, OHCI_SED_SIZE * OHCI_SED_CHUNK, 298 OHCI_ED_ALIGN, &dma); 299 if (r != USBD_NORMAL_COMPLETION) 300 return (0); 301 for(i = 0; i < OHCI_SED_CHUNK; i++) { 302 offs = i * OHCI_SED_SIZE; 303 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 304 sed->physaddr = DMAADDR(&dma) + offs; 305 sed->next = sc->sc_freeeds; 306 sc->sc_freeeds = sed; 307 } 308 } 309 sed = sc->sc_freeeds; 310 sc->sc_freeeds = sed->next; 311 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 312 sed->next = 0; 313 return (sed); 314 } 315 316 void 317 ohci_free_sed(sc, sed) 318 ohci_softc_t *sc; 319 ohci_soft_ed_t *sed; 320 { 321 sed->next = sc->sc_freeeds; 322 sc->sc_freeeds = sed; 323 } 324 325 ohci_soft_td_t * 326 ohci_alloc_std(sc) 327 ohci_softc_t *sc; 328 { 329 ohci_soft_td_t *std; 330 usbd_status r; 331 int i, offs; 332 usb_dma_t dma; 333 334 if (!sc->sc_freetds) { 335 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 336 r = usb_allocmem(sc->sc_dmatag, OHCI_STD_SIZE * OHCI_STD_CHUNK, 337 OHCI_TD_ALIGN, &dma); 338 if (r != USBD_NORMAL_COMPLETION) 339 return (0); 340 for(i = 0; i < OHCI_STD_CHUNK; i++) { 341 offs = i * OHCI_STD_SIZE; 342 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 343 std->physaddr = DMAADDR(&dma) + offs; 344 std->nexttd = sc->sc_freetds; 345 sc->sc_freetds = std; 346 } 347 } 348 std = sc->sc_freetds; 349 sc->sc_freetds = std->nexttd; 350 memset(&std->td, 0, sizeof(ohci_td_t)); 351 std->nexttd = 0; 352 return (std); 353 } 354 355 void 356 ohci_free_std(sc, std) 357 ohci_softc_t *sc; 358 ohci_soft_td_t *std; 359 { 360 std->nexttd = sc->sc_freetds; 361 sc->sc_freetds = std; 362 } 363 364 usbd_status 365 ohci_init(sc) 366 ohci_softc_t *sc; 367 { 368 ohci_soft_ed_t *sed, *psed; 369 usbd_status r; 370 int rev; 371 int i; 372 u_int32_t s, ctl, ival, hcr, fm, per; 373 374 DPRINTF(("ohci_init: start\n")); 375 rev = OREAD4(sc, OHCI_REVISION); 376 #if defined(__OpenBSD__) 377 printf(", OHCI version %d.%d%s\n", 378 #else 379 printf("%s: OHCI version %d.%d%s\n", USBDEVNAME(sc->sc_bus.bdev), 380 #endif 381 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 382 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 383 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 384 printf("%s: unsupported OHCI revision\n", 385 USBDEVNAME(sc->sc_bus.bdev)); 386 return (USBD_INVAL); 387 } 388 389 for (i = 0; i < OHCI_HASH_SIZE; i++) 390 LIST_INIT(&sc->sc_hash_tds[i]); 391 392 /* Allocate the HCCA area. */ 393 r = usb_allocmem(sc->sc_dmatag, OHCI_HCCA_SIZE, 394 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 395 if (r != USBD_NORMAL_COMPLETION) 396 return (r); 397 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 398 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 399 400 sc->sc_eintrs = OHCI_NORMAL_INTRS; 401 402 sc->sc_ctrl_head = ohci_alloc_sed(sc); 403 if (!sc->sc_ctrl_head) { 404 r = USBD_NOMEM; 405 goto bad1; 406 } 407 sc->sc_ctrl_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 408 409 sc->sc_bulk_head = ohci_alloc_sed(sc); 410 if (!sc->sc_bulk_head) { 411 r = USBD_NOMEM; 412 goto bad2; 413 } 414 sc->sc_bulk_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 415 416 /* Allocate all the dummy EDs that make up the interrupt tree. */ 417 for (i = 0; i < OHCI_NO_EDS; i++) { 418 sed = ohci_alloc_sed(sc); 419 if (!sed) { 420 while (--i >= 0) 421 ohci_free_sed(sc, sc->sc_eds[i]); 422 r = USBD_NOMEM; 423 goto bad3; 424 } 425 /* All ED fields are set to 0. */ 426 sc->sc_eds[i] = sed; 427 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 428 if (i != 0) { 429 psed = sc->sc_eds[(i-1) / 2]; 430 sed->next = psed; 431 sed->ed.ed_nexted = LE(psed->physaddr); 432 } 433 } 434 /* 435 * Fill HCCA interrupt table. The bit reversal is to get 436 * the tree set up properly to spread the interrupts. 437 */ 438 for (i = 0; i < OHCI_NO_INTRS; i++) 439 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 440 LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 441 442 /* Determine in what context we are running. */ 443 ctl = OREAD4(sc, OHCI_CONTROL); 444 if (ctl & OHCI_IR) { 445 /* SMM active, request change */ 446 DPRINTF(("ohci_init: SMM active, request owner change\n")); 447 s = OREAD4(sc, OHCI_COMMAND_STATUS); 448 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 449 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 450 delay(1000); 451 ctl = OREAD4(sc, OHCI_CONTROL); 452 } 453 if ((ctl & OHCI_IR) == 0) { 454 printf("%s: SMM does not respond, resetting\n", 455 USBDEVNAME(sc->sc_bus.bdev)); 456 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 457 goto reset; 458 } 459 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 460 /* BIOS started controller. */ 461 DPRINTF(("ohci_init: BIOS active\n")); 462 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 463 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 464 delay(USB_RESUME_DELAY * 1000); 465 } 466 } else { 467 DPRINTF(("ohci_init: cold started\n")); 468 reset: 469 /* Controller was cold started. */ 470 delay(USB_BUS_RESET_DELAY * 1000); 471 } 472 473 /* 474 * This reset should not be necessary according to the OHCI spec, but 475 * without it some controllers do not start. 476 */ 477 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 478 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 479 delay(USB_BUS_RESET_DELAY * 1000); 480 481 /* We now own the host controller and the bus has been reset. */ 482 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 483 484 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 485 /* Nominal time for a reset is 10 us. */ 486 for (i = 0; i < 10; i++) { 487 delay(10); 488 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 489 if (!hcr) 490 break; 491 } 492 if (hcr) { 493 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 494 r = USBD_IOERROR; 495 goto bad3; 496 } 497 #ifdef USB_DEBUG 498 thesc = sc; 499 if (ohcidebug > 15) 500 ohci_dumpregs(sc); 501 #endif 502 503 /* The controller is now in suspend state, we have 2ms to finish. */ 504 505 /* Set up HC registers. */ 506 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 507 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 508 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 509 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 510 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 511 ctl = OREAD4(sc, OHCI_CONTROL); 512 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 513 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 514 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 515 /* And finally start it! */ 516 OWRITE4(sc, OHCI_CONTROL, ctl); 517 518 /* 519 * The controller is now OPERATIONAL. Set a some final 520 * registers that should be set earlier, but that the 521 * controller ignores when in the SUSPEND state. 522 */ 523 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 524 fm |= OHCI_FSMPS(ival) | ival; 525 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 526 per = OHCI_PERIODIC(ival); /* 90% periodic */ 527 OWRITE4(sc, OHCI_PERIODIC_START, per); 528 529 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 530 531 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 532 533 #ifdef USB_DEBUG 534 if (ohcidebug > 5) 535 ohci_dumpregs(sc); 536 #endif 537 538 /* Set up the bus struct. */ 539 sc->sc_bus.methods = &ohci_bus_methods; 540 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 541 542 powerhook_establish(ohci_power, sc); 543 544 return (USBD_NORMAL_COMPLETION); 545 546 bad3: 547 ohci_free_sed(sc, sc->sc_ctrl_head); 548 bad2: 549 ohci_free_sed(sc, sc->sc_bulk_head); 550 bad1: 551 usb_freemem(sc->sc_dmatag, &sc->sc_hccadma); 552 return (r); 553 } 554 555 usbd_status 556 ohci_allocm(bus, dma, size) 557 struct usbd_bus *bus; 558 usb_dma_t *dma; 559 u_int32_t size; 560 { 561 struct ohci_softc *sc = (struct ohci_softc *)bus; 562 563 return (usb_allocmem(sc->sc_dmatag, size, 0, dma)); 564 } 565 566 void 567 ohci_freem(bus, dma) 568 struct usbd_bus *bus; 569 usb_dma_t *dma; 570 { 571 struct ohci_softc *sc = (struct ohci_softc *)bus; 572 573 usb_freemem(sc->sc_dmatag, dma); 574 } 575 576 #if !defined(__OpenBSD__) 577 void 578 ohci_power(why, v) 579 int why; 580 void *v; 581 { 582 #ifdef USB_DEBUG 583 ohci_softc_t *sc = v; 584 585 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 586 /* XXX should suspend/resume */ 587 ohci_dumpregs(sc); 588 #endif 589 } 590 #endif /* !defined(__OpenBSD__) */ 591 592 #ifdef USB_DEBUG 593 void ohcidump(void); 594 void ohcidump(void) { ohci_dumpregs(thesc); } 595 596 void 597 ohci_dumpregs(sc) 598 ohci_softc_t *sc; 599 { 600 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 601 OREAD4(sc, OHCI_REVISION), 602 OREAD4(sc, OHCI_CONTROL), 603 OREAD4(sc, OHCI_COMMAND_STATUS))); 604 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 605 OREAD4(sc, OHCI_INTERRUPT_STATUS), 606 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 607 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 608 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 609 OREAD4(sc, OHCI_HCCA), 610 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 611 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 612 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 613 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 614 OREAD4(sc, OHCI_BULK_HEAD_ED), 615 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 616 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 617 OREAD4(sc, OHCI_DONE_HEAD), 618 OREAD4(sc, OHCI_FM_INTERVAL), 619 OREAD4(sc, OHCI_FM_REMAINING))); 620 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 621 OREAD4(sc, OHCI_FM_NUMBER), 622 OREAD4(sc, OHCI_PERIODIC_START), 623 OREAD4(sc, OHCI_LS_THRESHOLD))); 624 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 625 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 626 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 627 OREAD4(sc, OHCI_RH_STATUS))); 628 DPRINTF((" port1=0x%08x port2=0x%08x\n", 629 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 630 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 631 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 632 LE(sc->sc_hcca->hcca_frame_number), 633 LE(sc->sc_hcca->hcca_done_head))); 634 } 635 #endif 636 637 int 638 ohci_intr(p) 639 void *p; 640 { 641 ohci_softc_t *sc = p; 642 u_int32_t intrs, eintrs; 643 ohci_physaddr_t done; 644 645 /* In case the interrupt occurs before initialization has completed. */ 646 if (sc == NULL || sc->sc_hcca == NULL) { 647 #ifdef DIAGNOSTIC 648 printf("ohci_intr: sc->sc_hcca == NULL\n"); 649 #endif 650 return (0); 651 } 652 653 intrs = 0; 654 done = LE(sc->sc_hcca->hcca_done_head); 655 if (done != 0) { 656 sc->sc_hcca->hcca_done_head = 0; 657 if (done & ~OHCI_DONE_INTRS) 658 intrs = OHCI_WDH; 659 if (done & OHCI_DONE_INTRS) 660 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 661 } else 662 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 663 if (!intrs) 664 return (0); 665 intrs &= ~OHCI_MIE; 666 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 667 eintrs = intrs & sc->sc_eintrs; 668 if (!eintrs) 669 return (0); 670 671 sc->sc_intrs++; 672 DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n", 673 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 674 (u_int)eintrs)); 675 676 if (eintrs & OHCI_SO) { 677 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev)); 678 /* XXX do what */ 679 intrs &= ~OHCI_SO; 680 } 681 if (eintrs & OHCI_WDH) { 682 ohci_process_done(sc, done &~ OHCI_DONE_INTRS); 683 intrs &= ~OHCI_WDH; 684 } 685 if (eintrs & OHCI_RD) { 686 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 687 /* XXX process resume detect */ 688 } 689 if (eintrs & OHCI_UE) { 690 printf("%s: unrecoverable error, controller halted\n", 691 USBDEVNAME(sc->sc_bus.bdev)); 692 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 693 /* XXX what else */ 694 } 695 if (eintrs & OHCI_RHSC) { 696 ohci_rhsc(sc, sc->sc_intrreqh); 697 intrs &= ~OHCI_RHSC; 698 699 /* 700 * Disable RHSC interrupt for now, because it will be 701 * on until the port has been reset. 702 */ 703 ohci_rhsc_able(sc, 0); 704 } 705 706 /* Block unprocessed interrupts. XXX */ 707 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 708 sc->sc_eintrs &= ~intrs; 709 710 return (1); 711 } 712 713 void 714 ohci_rhsc_able(sc, on) 715 ohci_softc_t *sc; 716 int on; 717 { 718 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 719 if (on) { 720 sc->sc_eintrs |= OHCI_RHSC; 721 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 722 } else { 723 sc->sc_eintrs &= ~OHCI_RHSC; 724 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 725 } 726 } 727 728 #ifdef USB_DEBUG 729 char *ohci_cc_strs[] = { 730 "NO_ERROR", 731 "CRC", 732 "BIT_STUFFING", 733 "DATA_TOGGLE_MISMATCH", 734 "STALL", 735 "DEVICE_NOT_RESPONDING", 736 "PID_CHECK_FAILURE", 737 "UNEXPECTED_PID", 738 "DATA_OVERRUN", 739 "DATA_UNDERRUN", 740 "BUFFER_OVERRUN", 741 "BUFFER_UNDERRUN", 742 "NOT_ACCESSED", 743 }; 744 #endif 745 746 void 747 ohci_process_done(sc, done) 748 ohci_softc_t *sc; 749 ohci_physaddr_t done; 750 { 751 ohci_soft_td_t *std, *sdone; 752 usbd_request_handle reqh; 753 int len, cc; 754 755 DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done)); 756 757 /* Reverse the done list. */ 758 for (sdone = 0; done; done = LE(std->td.td_nexttd)) { 759 std = ohci_hash_find_td(sc, done); 760 std->dnext = sdone; 761 sdone = std; 762 } 763 764 #ifdef USB_DEBUG 765 if (ohcidebug > 10) { 766 DPRINTF(("ohci_process_done: TD done:\n")); 767 ohci_dump_tds(sdone); 768 } 769 #endif 770 771 for (std = sdone; std; std = std->dnext) { 772 reqh = std->reqh; 773 DPRINTFN(10, ("ohci_process_done: std=%p reqh=%p hcpriv=%p\n", 774 std, reqh, reqh->hcpriv)); 775 cc = OHCI_TD_GET_CC(LE(std->td.td_flags)); 776 usb_untimeout(ohci_timeout, reqh, reqh->timo_handle); 777 if (reqh->status == USBD_CANCELLED || 778 reqh->status == USBD_TIMEOUT) { 779 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 780 reqh)); 781 /* Handled by abort routine. */ 782 continue; 783 } else if (cc == OHCI_CC_NO_ERROR) { 784 len = std->len; 785 if (std->td.td_cbp != 0) 786 len -= LE(std->td.td_be) - 787 LE(std->td.td_cbp) + 1; 788 if (std->flags & OHCI_SET_LEN) 789 reqh->actlen = len; 790 if (std->flags & OHCI_CALL_DONE) { 791 reqh->status = USBD_NORMAL_COMPLETION; 792 usb_transfer_complete(reqh); 793 } 794 } else { 795 ohci_soft_td_t *p, *n; 796 struct ohci_pipe *opipe = 797 (struct ohci_pipe *)reqh->pipe; 798 DPRINTFN(-1,("ohci_process_done: error cc=%d (%s)\n", 799 OHCI_TD_GET_CC(LE(std->td.td_flags)), 800 ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td.td_flags))])); 801 /* 802 * Endpoint is halted. First unlink all the TDs 803 * belonging to the failed transfer, and then restart 804 * the endpoint. 805 */ 806 for (p = std->nexttd; p->reqh == reqh; p = n) { 807 n = p->nexttd; 808 ohci_hash_rem_td(sc, p); 809 ohci_free_std(sc, p); 810 } 811 /* clear halt */ 812 opipe->sed->ed.ed_headp = LE(p->physaddr); 813 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 814 815 if (cc == OHCI_CC_STALL) 816 reqh->status = USBD_STALLED; 817 else 818 reqh->status = USBD_IOERROR; 819 usb_transfer_complete(reqh); 820 } 821 ohci_hash_rem_td(sc, std); 822 ohci_free_std(sc, std); 823 } 824 } 825 826 void 827 ohci_device_ctrl_done(reqh) 828 usbd_request_handle reqh; 829 { 830 DPRINTFN(10,("ohci_ctrl_done: reqh=%p\n", reqh)); 831 832 #ifdef DIAGNOSTIC 833 if (!(reqh->rqflags & URQ_REQUEST)) { 834 panic("ohci_ctrl_done: not a request\n"); 835 } 836 #endif 837 reqh->hcpriv = 0; 838 } 839 840 void 841 ohci_device_intr_done(reqh) 842 usbd_request_handle reqh; 843 { 844 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 845 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 846 ohci_soft_ed_t *sed = opipe->sed; 847 ohci_soft_td_t *xfer, *tail; 848 849 850 DPRINTFN(10,("ohci_intr_done: reqh=%p, actlen=%d\n", 851 reqh, reqh->actlen)); 852 853 reqh->hcpriv = 0; 854 855 if (reqh->pipe->repeat) { 856 xfer = opipe->tail; 857 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 858 if (!tail) { 859 reqh->status = USBD_NOMEM; 860 return; 861 } 862 tail->reqh = 0; 863 864 xfer->td.td_flags = LE( 865 OHCI_TD_IN | OHCI_TD_NOCC | 866 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 867 if (reqh->flags & USBD_SHORT_XFER_OK) 868 xfer->td.td_flags |= LE(OHCI_TD_R); 869 xfer->td.td_cbp = LE(DMAADDR(&reqh->dmabuf)); 870 xfer->nexttd = tail; 871 xfer->td.td_nexttd = LE(tail->physaddr); 872 xfer->td.td_be = LE(LE(xfer->td.td_cbp) + reqh->length - 1); 873 xfer->len = reqh->length; 874 xfer->reqh = reqh; 875 xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN; 876 reqh->hcpriv = xfer; 877 878 ohci_hash_add_td(sc, xfer); 879 sed->ed.ed_tailp = LE(tail->physaddr); 880 opipe->tail = tail; 881 } 882 } 883 884 void 885 ohci_device_bulk_done(reqh) 886 usbd_request_handle reqh; 887 { 888 DPRINTFN(10,("ohci_bulk_done: reqh=%p, actlen=%d\n", 889 reqh, reqh->actlen)); 890 891 reqh->hcpriv = 0; 892 } 893 894 void 895 ohci_rhsc(sc, reqh) 896 ohci_softc_t *sc; 897 usbd_request_handle reqh; 898 { 899 usbd_pipe_handle pipe; 900 struct ohci_pipe *opipe; 901 u_char *p; 902 int i, m; 903 int hstatus; 904 905 hstatus = OREAD4(sc, OHCI_RH_STATUS); 906 DPRINTF(("ohci_rhsc: sc=%p reqh=%p hstatus=0x%08x\n", 907 sc, reqh, hstatus)); 908 909 if (reqh == 0) { 910 /* Just ignore the change. */ 911 return; 912 } 913 914 pipe = reqh->pipe; 915 opipe = (struct ohci_pipe *)pipe; 916 917 p = KERNADDR(&reqh->dmabuf); 918 m = min(sc->sc_noport, reqh->length * 8 - 1); 919 memset(p, 0, reqh->length); 920 for (i = 1; i <= m; i++) { 921 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 922 p[i/8] |= 1 << (i%8); 923 } 924 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 925 reqh->actlen = reqh->length; 926 reqh->status = USBD_NORMAL_COMPLETION; 927 928 usb_transfer_complete(reqh); 929 } 930 931 void 932 ohci_root_intr_done(reqh) 933 usbd_request_handle reqh; 934 { 935 reqh->hcpriv = 0; 936 } 937 938 /* 939 * Wait here until controller claims to have an interrupt. 940 * Then call ohci_intr and return. Use timeout to avoid waiting 941 * too long. 942 */ 943 void 944 ohci_waitintr(sc, reqh) 945 ohci_softc_t *sc; 946 usbd_request_handle reqh; 947 { 948 int timo = reqh->timeout; 949 int usecs; 950 u_int32_t intrs; 951 952 reqh->status = USBD_IN_PROGRESS; 953 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 954 usb_delay_ms(&sc->sc_bus, 1); 955 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 956 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 957 #ifdef USB_DEBUG 958 if (ohcidebug > 15) 959 ohci_dumpregs(sc); 960 #endif 961 if (intrs) { 962 ohci_intr(sc); 963 if (reqh->status != USBD_IN_PROGRESS) 964 return; 965 } 966 } 967 968 /* Timeout */ 969 DPRINTF(("ohci_waitintr: timeout\n")); 970 reqh->status = USBD_TIMEOUT; 971 usb_transfer_complete(reqh); 972 /* XXX should free TD */ 973 } 974 975 void 976 ohci_poll(bus) 977 struct usbd_bus *bus; 978 { 979 ohci_softc_t *sc = (ohci_softc_t *)bus; 980 981 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 982 ohci_intr(sc); 983 } 984 985 usbd_status 986 ohci_device_request(reqh) 987 usbd_request_handle reqh; 988 { 989 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 990 usb_device_request_t *req = &reqh->request; 991 usbd_device_handle dev = opipe->pipe.device; 992 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 993 int addr = dev->address; 994 ohci_soft_td_t *setup, *xfer = 0, *stat, *next, *tail; 995 ohci_soft_ed_t *sed; 996 int isread; 997 int len; 998 usbd_status r; 999 int s; 1000 1001 isread = req->bmRequestType & UT_READ; 1002 len = UGETW(req->wLength); 1003 1004 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1005 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1006 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1007 UGETW(req->wIndex), len, addr, 1008 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1009 1010 setup = opipe->tail; 1011 stat = ohci_alloc_std(sc); 1012 if (!stat) { 1013 r = USBD_NOMEM; 1014 goto bad1; 1015 } 1016 tail = ohci_alloc_std(sc); 1017 if (!tail) { 1018 r = USBD_NOMEM; 1019 goto bad2; 1020 } 1021 tail->reqh = 0; 1022 1023 sed = opipe->sed; 1024 opipe->u.ctl.length = len; 1025 1026 /* Update device address and length since they may have changed. */ 1027 /* XXX This only needs to be done once, but it's too early in open. */ 1028 sed->ed.ed_flags = LE( 1029 (LE(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1030 OHCI_ED_SET_FA(addr) | 1031 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1032 1033 /* Set up data transaction */ 1034 if (len != 0) { 1035 xfer = ohci_alloc_std(sc); 1036 if (!xfer) { 1037 r = USBD_NOMEM; 1038 goto bad3; 1039 } 1040 xfer->td.td_flags = LE( 1041 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 1042 OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR | 1043 (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0)); 1044 xfer->td.td_cbp = LE(DMAADDR(&reqh->dmabuf)); 1045 xfer->nexttd = stat; 1046 xfer->td.td_nexttd = LE(stat->physaddr); 1047 xfer->td.td_be = LE(LE(xfer->td.td_cbp) + len - 1); 1048 xfer->len = len; 1049 xfer->reqh = reqh; 1050 xfer->flags = OHCI_SET_LEN; 1051 1052 next = xfer; 1053 stat->flags = OHCI_CALL_DONE; 1054 } else { 1055 next = stat; 1056 stat->flags = OHCI_CALL_DONE | OHCI_SET_LEN; 1057 } 1058 1059 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1060 1061 setup->td.td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC | 1062 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1063 setup->td.td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma)); 1064 setup->nexttd = next; 1065 setup->td.td_nexttd = LE(next->physaddr); 1066 setup->td.td_be = LE(LE(setup->td.td_cbp) + sizeof *req - 1); 1067 setup->len = 0; /* XXX The number of byte we count */ 1068 setup->reqh = reqh; 1069 setup->flags = 0; 1070 reqh->hcpriv = setup; 1071 1072 stat->td.td_flags = LE( 1073 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC | 1074 OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1075 stat->td.td_cbp = 0; 1076 stat->nexttd = tail; 1077 stat->td.td_nexttd = LE(tail->physaddr); 1078 stat->td.td_be = 0; 1079 stat->len = 0; 1080 stat->reqh = reqh; 1081 1082 #if USB_DEBUG 1083 if (ohcidebug > 5) { 1084 DPRINTF(("ohci_device_request:\n")); 1085 ohci_dump_ed(sed); 1086 ohci_dump_tds(setup); 1087 } 1088 #endif 1089 1090 /* Insert ED in schedule */ 1091 s = splusb(); 1092 ohci_hash_add_td(sc, setup); 1093 if (len != 0) 1094 ohci_hash_add_td(sc, xfer); 1095 ohci_hash_add_td(sc, stat); 1096 sed->ed.ed_tailp = LE(tail->physaddr); 1097 opipe->tail = tail; 1098 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1099 if (reqh->timeout && !sc->sc_bus.use_polling) { 1100 usb_timeout(ohci_timeout, reqh, 1101 MS_TO_TICKS(reqh->timeout), reqh->timo_handle); 1102 } 1103 splx(s); 1104 1105 #if USB_DEBUG 1106 if (ohcidebug > 5) { 1107 delay(5000); 1108 DPRINTF(("ohci_device_request: status=%x\n", 1109 OREAD4(sc, OHCI_COMMAND_STATUS))); 1110 ohci_dump_ed(sed); 1111 ohci_dump_tds(setup); 1112 } 1113 #endif 1114 1115 return (USBD_NORMAL_COMPLETION); 1116 1117 bad3: 1118 ohci_free_std(sc, tail); 1119 bad2: 1120 ohci_free_std(sc, stat); 1121 bad1: 1122 return (r); 1123 } 1124 1125 /* 1126 * Add an ED to the schedule. Called at splusb(). 1127 */ 1128 void 1129 ohci_add_ed(sed, head) 1130 ohci_soft_ed_t *sed; 1131 ohci_soft_ed_t *head; 1132 { 1133 sed->next = head->next; 1134 sed->ed.ed_nexted = head->ed.ed_nexted; 1135 head->next = sed; 1136 head->ed.ed_nexted = LE(sed->physaddr); 1137 } 1138 1139 /* 1140 * Remove an ED from the schedule. Called at splusb(). 1141 */ 1142 void 1143 ohci_rem_ed(sed, head) 1144 ohci_soft_ed_t *sed; 1145 ohci_soft_ed_t *head; 1146 { 1147 ohci_soft_ed_t *p; 1148 1149 /* XXX */ 1150 for (p = head; p && p->next != sed; p = p->next) 1151 ; 1152 if (!p) 1153 panic("ohci_rem_ed: ED not found\n"); 1154 p->next = sed->next; 1155 p->ed.ed_nexted = sed->ed.ed_nexted; 1156 } 1157 1158 /* 1159 * When a transfer is completed the TD is added to the done queue by 1160 * the host controller. This queue is the processed by software. 1161 * Unfortunately the queue contains the physical address of the TD 1162 * and we have no simple way to translate this back to a kernel address. 1163 * To make the translation possible (and fast) we use a hash table of 1164 * TDs currently in the schedule. The physical address is used as the 1165 * hash value. 1166 */ 1167 1168 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1169 /* Called at splusb() */ 1170 void 1171 ohci_hash_add_td(sc, std) 1172 ohci_softc_t *sc; 1173 ohci_soft_td_t *std; 1174 { 1175 int h = HASH(std->physaddr); 1176 1177 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1178 } 1179 1180 /* Called at splusb() */ 1181 void 1182 ohci_hash_rem_td(sc, std) 1183 ohci_softc_t *sc; 1184 ohci_soft_td_t *std; 1185 { 1186 LIST_REMOVE(std, hnext); 1187 } 1188 1189 ohci_soft_td_t * 1190 ohci_hash_find_td(sc, a) 1191 ohci_softc_t *sc; 1192 ohci_physaddr_t a; 1193 { 1194 int h = HASH(a); 1195 ohci_soft_td_t *std; 1196 1197 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1198 std != 0; 1199 std = LIST_NEXT(std, hnext)) 1200 if (std->physaddr == a) 1201 return (std); 1202 panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a); 1203 } 1204 1205 void 1206 ohci_timeout(addr) 1207 void *addr; 1208 { 1209 usbd_request_handle reqh = addr; 1210 1211 DPRINTF(("ohci_timeout: reqh=%p\n", reqh)); 1212 ohci_abort_req(reqh, USBD_TIMEOUT); 1213 } 1214 1215 #ifdef USB_DEBUG 1216 void 1217 ohci_dump_tds(std) 1218 ohci_soft_td_t *std; 1219 { 1220 for (; std; std = std->nexttd) 1221 ohci_dump_td(std); 1222 } 1223 1224 void 1225 ohci_dump_td(std) 1226 ohci_soft_td_t *std; 1227 { 1228 DPRINTF(("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1229 "nexttd=0x%08lx be=0x%08lx\n", 1230 std, (u_long)std->physaddr, 1231 (int)LE(std->td.td_flags), 1232 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1233 OHCI_TD_GET_DI(LE(std->td.td_flags)), 1234 OHCI_TD_GET_EC(LE(std->td.td_flags)), 1235 OHCI_TD_GET_CC(LE(std->td.td_flags)), 1236 (u_long)LE(std->td.td_cbp), 1237 (u_long)LE(std->td.td_nexttd), (u_long)LE(std->td.td_be))); 1238 } 1239 1240 void 1241 ohci_dump_ed(sed) 1242 ohci_soft_ed_t *sed; 1243 { 1244 DPRINTF(("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx " 1245 "headp=%b nexted=0x%08lx\n", 1246 sed, (u_long)sed->physaddr, 1247 OHCI_ED_GET_FA(LE(sed->ed.ed_flags)), 1248 OHCI_ED_GET_EN(LE(sed->ed.ed_flags)), 1249 OHCI_ED_GET_MAXP(LE(sed->ed.ed_flags)), 1250 (int)LE(sed->ed.ed_flags), 1251 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1252 (u_long)LE(sed->ed.ed_tailp), 1253 (u_long)LE(sed->ed.ed_headp), "\20\1HALT\2CARRY", 1254 (u_long)LE(sed->ed.ed_nexted))); 1255 } 1256 #endif 1257 1258 usbd_status 1259 ohci_open(pipe) 1260 usbd_pipe_handle pipe; 1261 { 1262 usbd_device_handle dev = pipe->device; 1263 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1264 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1265 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1266 u_int8_t addr = dev->address; 1267 ohci_soft_ed_t *sed; 1268 ohci_soft_td_t *std; 1269 usbd_status r; 1270 int s; 1271 1272 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1273 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1274 if (addr == sc->sc_addr) { 1275 switch (ed->bEndpointAddress) { 1276 case USB_CONTROL_ENDPOINT: 1277 pipe->methods = &ohci_root_ctrl_methods; 1278 break; 1279 case UE_DIR_IN | OHCI_INTR_ENDPT: 1280 pipe->methods = &ohci_root_intr_methods; 1281 break; 1282 default: 1283 return (USBD_INVAL); 1284 } 1285 } else { 1286 sed = ohci_alloc_sed(sc); 1287 if (sed == 0) 1288 goto bad0; 1289 std = ohci_alloc_std(sc); 1290 if (std == 0) 1291 goto bad1; 1292 opipe->sed = sed; 1293 opipe->tail = std; 1294 sed->ed.ed_flags = LE( 1295 OHCI_ED_SET_FA(addr) | 1296 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1297 OHCI_ED_DIR_TD | 1298 (dev->lowspeed ? OHCI_ED_SPEED : 0) | 1299 ((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ? 1300 OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) | 1301 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1302 sed->ed.ed_headp = sed->ed.ed_tailp = LE(std->physaddr); 1303 1304 switch (ed->bmAttributes & UE_XFERTYPE) { 1305 case UE_CONTROL: 1306 pipe->methods = &ohci_device_ctrl_methods; 1307 r = usb_allocmem(sc->sc_dmatag, 1308 sizeof(usb_device_request_t), 1309 0, &opipe->u.ctl.reqdma); 1310 if (r != USBD_NORMAL_COMPLETION) 1311 goto bad; 1312 s = splusb(); 1313 ohci_add_ed(sed, sc->sc_ctrl_head); 1314 splx(s); 1315 break; 1316 case UE_INTERRUPT: 1317 pipe->methods = &ohci_device_intr_methods; 1318 return (ohci_device_setintr(sc, opipe, ed->bInterval)); 1319 case UE_ISOCHRONOUS: 1320 printf("ohci_open: open iso unimplemented\n"); 1321 return (USBD_INVAL); 1322 case UE_BULK: 1323 pipe->methods = &ohci_device_bulk_methods; 1324 s = splusb(); 1325 ohci_add_ed(sed, sc->sc_bulk_head); 1326 splx(s); 1327 break; 1328 } 1329 } 1330 return (USBD_NORMAL_COMPLETION); 1331 1332 bad: 1333 ohci_free_std(sc, std); 1334 bad1: 1335 ohci_free_sed(sc, sed); 1336 bad0: 1337 return (USBD_NOMEM); 1338 1339 } 1340 1341 /* 1342 * Close a reqular pipe. 1343 * Assumes that there are no pending transactions. 1344 */ 1345 void 1346 ohci_close_pipe(pipe, head) 1347 usbd_pipe_handle pipe; 1348 ohci_soft_ed_t *head; 1349 { 1350 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1351 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1352 ohci_soft_ed_t *sed = opipe->sed; 1353 int s; 1354 1355 s = splusb(); 1356 #ifdef DIAGNOSTIC 1357 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 1358 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 1359 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) { 1360 ohci_physaddr_t td = sed->ed.ed_headp; 1361 ohci_soft_td_t *std; 1362 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]); 1363 std != 0; 1364 std = LIST_NEXT(std, hnext)) 1365 if (std->physaddr == td) 1366 break; 1367 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 1368 "tl=0x%x pipe=%p, std=%p\n", sed, 1369 (int)LE(sed->ed.ed_headp), (int)LE(sed->ed.ed_tailp), 1370 pipe, std); 1371 usb_delay_ms(&sc->sc_bus, 2); 1372 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 1373 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) 1374 printf("ohci_close_pipe: pipe still not empty\n"); 1375 } 1376 #endif 1377 ohci_rem_ed(sed, head); 1378 splx(s); 1379 ohci_free_std(sc, opipe->tail); 1380 ohci_free_sed(sc, opipe->sed); 1381 } 1382 1383 /* 1384 * Abort a device request. 1385 * If this routine is called at splusb() it guarantees that the request 1386 * will be removed from the hardware scheduling and that the callback 1387 * for it will be called with USBD_CANCELLED status. 1388 * It's impossible to guarantee that the requested transfer will not 1389 * have happened since the hardware runs concurrently. 1390 * If the transaction has already happened we rely on the ordinary 1391 * interrupt processing to process it. 1392 */ 1393 void 1394 ohci_abort_req(reqh, status) 1395 usbd_request_handle reqh; 1396 usbd_status status; 1397 { 1398 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 1399 ohci_soft_ed_t *sed; 1400 1401 DPRINTF(("ohci_abort_req: reqh=%p pipe=%p\n", reqh, opipe)); 1402 1403 reqh->status = status; 1404 1405 usb_untimeout(ohci_timeout, reqh, reqh->timo_handle); 1406 1407 sed = opipe->sed; 1408 DPRINTFN(1,("ohci_abort_req: stop ed=%p\n", sed)); 1409 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); /* force hardware skip */ 1410 1411 if (curproc) { 1412 usb_delay_ms(opipe->pipe.device->bus, 1); 1413 ohci_abort_req_end(reqh); 1414 } else { 1415 timeout(ohci_abort_req_end, reqh, hz / USB_FRAMES_PER_SECOND); 1416 } 1417 } 1418 1419 void 1420 ohci_abort_req_end(v) 1421 void *v; 1422 { 1423 usbd_request_handle reqh = v; 1424 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 1425 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1426 ohci_soft_ed_t *sed; 1427 ohci_soft_td_t *p, *n; 1428 int s; 1429 1430 s = splusb(); 1431 1432 p = reqh->hcpriv; 1433 #ifdef DIAGNOSTIC 1434 if (!p) { 1435 printf("ohci_abort_req: hcpriv==0\n"); 1436 return; 1437 } 1438 #endif 1439 for (; p->reqh == reqh; p = n) { 1440 n = p->nexttd; 1441 ohci_hash_rem_td(sc, p); 1442 ohci_free_std(sc, p); 1443 } 1444 1445 sed = opipe->sed; 1446 DPRINTFN(2,("ohci_abort_req: set hd=%x, tl=%x\n", 1447 (int)LE(p->physaddr), (int)LE(sed->ed.ed_tailp))); 1448 sed->ed.ed_headp = p->physaddr; /* unlink TDs */ 1449 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); /* remove hardware skip */ 1450 1451 usb_transfer_complete(reqh); 1452 1453 splx(s); 1454 } 1455 1456 /* 1457 * Data structures and routines to emulate the root hub. 1458 */ 1459 usb_device_descriptor_t ohci_devd = { 1460 USB_DEVICE_DESCRIPTOR_SIZE, 1461 UDESC_DEVICE, /* type */ 1462 {0x00, 0x01}, /* USB version */ 1463 UCLASS_HUB, /* class */ 1464 USUBCLASS_HUB, /* subclass */ 1465 0, /* protocol */ 1466 64, /* max packet */ 1467 {0},{0},{0x00,0x01}, /* device id */ 1468 1,2,0, /* string indicies */ 1469 1 /* # of configurations */ 1470 }; 1471 1472 usb_config_descriptor_t ohci_confd = { 1473 USB_CONFIG_DESCRIPTOR_SIZE, 1474 UDESC_CONFIG, 1475 {USB_CONFIG_DESCRIPTOR_SIZE + 1476 USB_INTERFACE_DESCRIPTOR_SIZE + 1477 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1478 1, 1479 1, 1480 0, 1481 UC_SELF_POWERED, 1482 0 /* max power */ 1483 }; 1484 1485 usb_interface_descriptor_t ohci_ifcd = { 1486 USB_INTERFACE_DESCRIPTOR_SIZE, 1487 UDESC_INTERFACE, 1488 0, 1489 0, 1490 1, 1491 UCLASS_HUB, 1492 USUBCLASS_HUB, 1493 0, 1494 0 1495 }; 1496 1497 usb_endpoint_descriptor_t ohci_endpd = { 1498 USB_ENDPOINT_DESCRIPTOR_SIZE, 1499 UDESC_ENDPOINT, 1500 UE_DIR_IN | OHCI_INTR_ENDPT, 1501 UE_INTERRUPT, 1502 {8, 0}, /* max packet */ 1503 255 1504 }; 1505 1506 usb_hub_descriptor_t ohci_hubd = { 1507 USB_HUB_DESCRIPTOR_SIZE, 1508 UDESC_HUB, 1509 0, 1510 {0,0}, 1511 0, 1512 0, 1513 {0}, 1514 }; 1515 1516 int 1517 ohci_str(p, l, s) 1518 usb_string_descriptor_t *p; 1519 int l; 1520 char *s; 1521 { 1522 int i; 1523 1524 if (l == 0) 1525 return (0); 1526 p->bLength = 2 * strlen(s) + 2; 1527 if (l == 1) 1528 return (1); 1529 p->bDescriptorType = UDESC_STRING; 1530 l -= 2; 1531 for (i = 0; s[i] && l > 1; i++, l -= 2) 1532 USETW2(p->bString[i], 0, s[i]); 1533 return (2*i+2); 1534 } 1535 1536 /* 1537 * Simulate a hardware hub by handling all the necessary requests. 1538 */ 1539 usbd_status 1540 ohci_root_ctrl_transfer(reqh) 1541 usbd_request_handle reqh; 1542 { 1543 usbd_status r; 1544 1545 r = usb_insert_transfer(reqh); 1546 if (r != USBD_NORMAL_COMPLETION) 1547 return (r); 1548 else 1549 return (ohci_root_ctrl_start(reqh)); 1550 } 1551 1552 usbd_status 1553 ohci_root_ctrl_start(reqh) 1554 usbd_request_handle reqh; 1555 { 1556 ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus; 1557 usb_device_request_t *req; 1558 void *buf; 1559 int port, i; 1560 int len, value, index, l, totlen = 0; 1561 usb_port_status_t ps; 1562 usb_hub_descriptor_t hubd; 1563 usbd_status r; 1564 u_int32_t v; 1565 1566 #ifdef DIAGNOSTIC 1567 if (!(reqh->rqflags & URQ_REQUEST)) 1568 /* XXX panic */ 1569 return (USBD_INVAL); 1570 #endif 1571 req = &reqh->request; 1572 1573 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 1574 req->bmRequestType, req->bRequest)); 1575 1576 len = UGETW(req->wLength); 1577 value = UGETW(req->wValue); 1578 index = UGETW(req->wIndex); 1579 1580 if (len != 0) 1581 buf = KERNADDR(&reqh->dmabuf); 1582 #ifdef DIAGNOSTIC 1583 else 1584 buf = 0; 1585 #endif 1586 1587 #define C(x,y) ((x) | ((y) << 8)) 1588 switch(C(req->bRequest, req->bmRequestType)) { 1589 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1590 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1591 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1592 /* 1593 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1594 * for the integrated root hub. 1595 */ 1596 break; 1597 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1598 if (len > 0) { 1599 *(u_int8_t *)buf = sc->sc_conf; 1600 totlen = 1; 1601 } 1602 break; 1603 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1604 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 1605 switch(value >> 8) { 1606 case UDESC_DEVICE: 1607 if ((value & 0xff) != 0) { 1608 r = USBD_IOERROR; 1609 goto ret; 1610 } 1611 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1612 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 1613 memcpy(buf, &ohci_devd, l); 1614 break; 1615 case UDESC_CONFIG: 1616 if ((value & 0xff) != 0) { 1617 r = USBD_IOERROR; 1618 goto ret; 1619 } 1620 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1621 memcpy(buf, &ohci_confd, l); 1622 buf = (char *)buf + l; 1623 len -= l; 1624 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1625 totlen += l; 1626 memcpy(buf, &ohci_ifcd, l); 1627 buf = (char *)buf + l; 1628 len -= l; 1629 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1630 totlen += l; 1631 memcpy(buf, &ohci_endpd, l); 1632 break; 1633 case UDESC_STRING: 1634 if (len == 0) 1635 break; 1636 *(u_int8_t *)buf = 0; 1637 totlen = 1; 1638 switch (value & 0xff) { 1639 case 1: /* Vendor */ 1640 totlen = ohci_str(buf, len, sc->sc_vendor); 1641 break; 1642 case 2: /* Product */ 1643 totlen = ohci_str(buf, len, "OHCI root hub"); 1644 break; 1645 } 1646 break; 1647 default: 1648 r = USBD_IOERROR; 1649 goto ret; 1650 } 1651 break; 1652 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1653 if (len > 0) { 1654 *(u_int8_t *)buf = 0; 1655 totlen = 1; 1656 } 1657 break; 1658 case C(UR_GET_STATUS, UT_READ_DEVICE): 1659 if (len > 1) { 1660 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1661 totlen = 2; 1662 } 1663 break; 1664 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1665 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1666 if (len > 1) { 1667 USETW(((usb_status_t *)buf)->wStatus, 0); 1668 totlen = 2; 1669 } 1670 break; 1671 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1672 if (value >= USB_MAX_DEVICES) { 1673 r = USBD_IOERROR; 1674 goto ret; 1675 } 1676 sc->sc_addr = value; 1677 break; 1678 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1679 if (value != 0 && value != 1) { 1680 r = USBD_IOERROR; 1681 goto ret; 1682 } 1683 sc->sc_conf = value; 1684 break; 1685 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1686 break; 1687 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1688 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1689 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1690 r = USBD_IOERROR; 1691 goto ret; 1692 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1693 break; 1694 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1695 break; 1696 /* Hub requests */ 1697 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1698 break; 1699 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1700 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1701 "port=%d feature=%d\n", 1702 index, value)); 1703 if (index < 1 || index > sc->sc_noport) { 1704 r = USBD_IOERROR; 1705 goto ret; 1706 } 1707 port = OHCI_RH_PORT_STATUS(index); 1708 switch(value) { 1709 case UHF_PORT_ENABLE: 1710 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 1711 break; 1712 case UHF_PORT_SUSPEND: 1713 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 1714 break; 1715 case UHF_PORT_POWER: 1716 OWRITE4(sc, port, UPS_LOW_SPEED); 1717 break; 1718 case UHF_C_PORT_CONNECTION: 1719 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 1720 break; 1721 case UHF_C_PORT_ENABLE: 1722 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 1723 break; 1724 case UHF_C_PORT_SUSPEND: 1725 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 1726 break; 1727 case UHF_C_PORT_OVER_CURRENT: 1728 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 1729 break; 1730 case UHF_C_PORT_RESET: 1731 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 1732 break; 1733 default: 1734 r = USBD_IOERROR; 1735 goto ret; 1736 } 1737 switch(value) { 1738 case UHF_C_PORT_CONNECTION: 1739 case UHF_C_PORT_ENABLE: 1740 case UHF_C_PORT_SUSPEND: 1741 case UHF_C_PORT_OVER_CURRENT: 1742 case UHF_C_PORT_RESET: 1743 /* Enable RHSC interrupt if condition is cleared. */ 1744 if ((OREAD4(sc, port) >> 16) == 0) 1745 ohci_rhsc_able(sc, 1); 1746 break; 1747 default: 1748 break; 1749 } 1750 break; 1751 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1752 if (value != 0) { 1753 r = USBD_IOERROR; 1754 goto ret; 1755 } 1756 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 1757 hubd = ohci_hubd; 1758 hubd.bNbrPorts = sc->sc_noport; 1759 USETW(hubd.wHubCharacteristics, 1760 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 1761 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 1762 /* XXX overcurrent */ 1763 ); 1764 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 1765 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 1766 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1767 hubd.DeviceRemovable[i++] = (u_int8_t)v; 1768 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1769 l = min(len, hubd.bDescLength); 1770 totlen = l; 1771 memcpy(buf, &hubd, l); 1772 break; 1773 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1774 if (len != 4) { 1775 r = USBD_IOERROR; 1776 goto ret; 1777 } 1778 memset(buf, 0, len); /* ? XXX */ 1779 totlen = len; 1780 break; 1781 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1782 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 1783 index)); 1784 if (index < 1 || index > sc->sc_noport) { 1785 r = USBD_IOERROR; 1786 goto ret; 1787 } 1788 if (len != 4) { 1789 r = USBD_IOERROR; 1790 goto ret; 1791 } 1792 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 1793 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 1794 v)); 1795 USETW(ps.wPortStatus, v); 1796 USETW(ps.wPortChange, v >> 16); 1797 l = min(len, sizeof ps); 1798 memcpy(buf, &ps, l); 1799 totlen = l; 1800 break; 1801 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1802 r = USBD_IOERROR; 1803 goto ret; 1804 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1805 break; 1806 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1807 if (index < 1 || index > sc->sc_noport) { 1808 r = USBD_IOERROR; 1809 goto ret; 1810 } 1811 port = OHCI_RH_PORT_STATUS(index); 1812 switch(value) { 1813 case UHF_PORT_ENABLE: 1814 OWRITE4(sc, port, UPS_PORT_ENABLED); 1815 break; 1816 case UHF_PORT_SUSPEND: 1817 OWRITE4(sc, port, UPS_SUSPEND); 1818 break; 1819 case UHF_PORT_RESET: 1820 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 1821 index)); 1822 OWRITE4(sc, port, UPS_RESET); 1823 for (i = 0; i < 10; i++) { 1824 usb_delay_ms(&sc->sc_bus, 10); 1825 if ((OREAD4(sc, port) & UPS_RESET) == 0) 1826 break; 1827 } 1828 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 1829 index, OREAD4(sc, port))); 1830 break; 1831 case UHF_PORT_POWER: 1832 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 1833 "%d\n", index)); 1834 OWRITE4(sc, port, UPS_PORT_POWER); 1835 break; 1836 default: 1837 r = USBD_IOERROR; 1838 goto ret; 1839 } 1840 break; 1841 default: 1842 r = USBD_IOERROR; 1843 goto ret; 1844 } 1845 reqh->actlen = totlen; 1846 r = USBD_NORMAL_COMPLETION; 1847 ret: 1848 reqh->status = r; 1849 usb_transfer_complete(reqh); 1850 return (USBD_IN_PROGRESS); 1851 } 1852 1853 /* Abort a root control request. */ 1854 void 1855 ohci_root_ctrl_abort(reqh) 1856 usbd_request_handle reqh; 1857 { 1858 /* Nothing to do, all transfers are synchronous. */ 1859 } 1860 1861 /* Close the root pipe. */ 1862 void 1863 ohci_root_ctrl_close(pipe) 1864 usbd_pipe_handle pipe; 1865 { 1866 DPRINTF(("ohci_root_ctrl_close\n")); 1867 /* Nothing to do. */ 1868 } 1869 1870 usbd_status 1871 ohci_root_intr_transfer(reqh) 1872 usbd_request_handle reqh; 1873 { 1874 usbd_status r; 1875 1876 r = usb_insert_transfer(reqh); 1877 if (r != USBD_NORMAL_COMPLETION) 1878 return (r); 1879 else 1880 return (ohci_root_intr_start(reqh)); 1881 } 1882 1883 usbd_status 1884 ohci_root_intr_start(reqh) 1885 usbd_request_handle reqh; 1886 { 1887 usbd_pipe_handle pipe = reqh->pipe; 1888 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1889 1890 sc->sc_intrreqh = reqh; 1891 1892 return (USBD_IN_PROGRESS); 1893 } 1894 1895 /* Abort a root interrupt request. */ 1896 void 1897 ohci_root_intr_abort(reqh) 1898 usbd_request_handle reqh; 1899 { 1900 /* No need to abort. */ 1901 } 1902 1903 /* Close the root pipe. */ 1904 void 1905 ohci_root_intr_close(pipe) 1906 usbd_pipe_handle pipe; 1907 { 1908 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1909 1910 DPRINTF(("ohci_root_intr_close\n")); 1911 1912 sc->sc_intrreqh = 0; 1913 } 1914 1915 /************************/ 1916 1917 usbd_status 1918 ohci_device_ctrl_transfer(reqh) 1919 usbd_request_handle reqh; 1920 { 1921 usbd_status r; 1922 1923 r = usb_insert_transfer(reqh); 1924 if (r != USBD_NORMAL_COMPLETION) 1925 return (r); 1926 else 1927 return (ohci_device_ctrl_start(reqh)); 1928 } 1929 1930 usbd_status 1931 ohci_device_ctrl_start(reqh) 1932 usbd_request_handle reqh; 1933 { 1934 ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus; 1935 usbd_status r; 1936 1937 #ifdef DIAGNOSTIC 1938 if (!(reqh->rqflags & URQ_REQUEST)) { 1939 /* XXX panic */ 1940 printf("ohci_device_ctrl_transfer: not a request\n"); 1941 return (USBD_INVAL); 1942 } 1943 #endif 1944 1945 r = ohci_device_request(reqh); 1946 if (r != USBD_NORMAL_COMPLETION) 1947 return (r); 1948 1949 if (sc->sc_bus.use_polling) 1950 ohci_waitintr(sc, reqh); 1951 return (USBD_IN_PROGRESS); 1952 } 1953 1954 /* Abort a device control request. */ 1955 void 1956 ohci_device_ctrl_abort(reqh) 1957 usbd_request_handle reqh; 1958 { 1959 DPRINTF(("ohci_device_ctrl_abort: reqh=%p\n", reqh)); 1960 ohci_abort_req(reqh, USBD_CANCELLED); 1961 } 1962 1963 /* Close a device control pipe. */ 1964 void 1965 ohci_device_ctrl_close(pipe) 1966 usbd_pipe_handle pipe; 1967 { 1968 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1969 1970 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 1971 ohci_close_pipe(pipe, sc->sc_ctrl_head); 1972 } 1973 1974 /************************/ 1975 1976 void 1977 ohci_device_clear_toggle(pipe) 1978 usbd_pipe_handle pipe; 1979 { 1980 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1981 1982 opipe->sed->ed.ed_tailp &= LE(~OHCI_TOGGLECARRY); 1983 } 1984 1985 void 1986 ohci_noop(pipe) 1987 usbd_pipe_handle pipe; 1988 { 1989 } 1990 1991 usbd_status 1992 ohci_device_bulk_transfer(reqh) 1993 usbd_request_handle reqh; 1994 { 1995 usbd_status r; 1996 1997 r = usb_insert_transfer(reqh); 1998 if (r != USBD_NORMAL_COMPLETION) 1999 return (r); 2000 else 2001 return (ohci_device_bulk_start(reqh)); 2002 } 2003 2004 usbd_status 2005 ohci_device_bulk_start(reqh) 2006 usbd_request_handle reqh; 2007 { 2008 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 2009 usbd_device_handle dev = opipe->pipe.device; 2010 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2011 int addr = dev->address; 2012 ohci_soft_td_t *xfer, *tail; 2013 ohci_soft_ed_t *sed; 2014 int s, len, isread, endpt; 2015 2016 #ifdef DIAGNOSTIC 2017 if (reqh->rqflags & URQ_REQUEST) { 2018 /* XXX panic */ 2019 printf("ohci_device_bulk_start: a request\n"); 2020 return (USBD_INVAL); 2021 } 2022 #endif 2023 2024 len = reqh->length; 2025 endpt = reqh->pipe->endpoint->edesc->bEndpointAddress; 2026 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2027 sed = opipe->sed; 2028 2029 DPRINTFN(4,("ohci_device_bulk_start: reqh=%p len=%d isread=%d " 2030 "flags=%d endpt=%d\n", reqh, len, isread, reqh->flags, 2031 endpt)); 2032 2033 opipe->u.bulk.isread = isread; 2034 opipe->u.bulk.length = len; 2035 2036 tail = ohci_alloc_std(sc); 2037 if (!tail) 2038 return (USBD_NOMEM); 2039 tail->reqh = 0; 2040 2041 /* Update device address */ 2042 sed->ed.ed_flags = LE( 2043 (LE(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2044 OHCI_ED_SET_FA(addr)); 2045 2046 /* Set up data transaction */ 2047 xfer = opipe->tail; 2048 xfer->td.td_flags = LE( 2049 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 2050 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY | 2051 (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0)); 2052 xfer->td.td_cbp = LE(DMAADDR(&reqh->dmabuf)); 2053 xfer->nexttd = tail; 2054 xfer->td.td_nexttd = LE(tail->physaddr); 2055 xfer->td.td_be = LE(LE(xfer->td.td_cbp) + len - 1); 2056 xfer->len = len; 2057 xfer->reqh = reqh; 2058 xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN; 2059 reqh->hcpriv = xfer; 2060 2061 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2062 "td_cbp=0x%08x td_be=0x%08x\n", 2063 (int)LE(sed->ed.ed_flags), (int)LE(xfer->td.td_flags), 2064 (int)LE(xfer->td.td_cbp), (int)LE(xfer->td.td_be))); 2065 2066 #ifdef USB_DEBUG 2067 if (ohcidebug > 4) { 2068 ohci_dump_ed(sed); 2069 ohci_dump_tds(xfer); 2070 } 2071 #endif 2072 2073 /* Insert ED in schedule */ 2074 s = splusb(); 2075 ohci_hash_add_td(sc, xfer); 2076 sed->ed.ed_tailp = LE(tail->physaddr); 2077 opipe->tail = tail; 2078 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); 2079 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2080 if (reqh->timeout && !sc->sc_bus.use_polling) { 2081 usb_timeout(ohci_timeout, reqh, 2082 MS_TO_TICKS(reqh->timeout), reqh->timo_handle); 2083 } 2084 2085 #ifdef USB_DEBUG 2086 if (ohcidebug > 5) { 2087 delay(5000); 2088 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2089 OREAD4(sc, OHCI_COMMAND_STATUS))); 2090 ohci_dump_ed(sed); 2091 ohci_dump_tds(xfer); 2092 } 2093 #endif 2094 2095 splx(s); 2096 2097 return (USBD_IN_PROGRESS); 2098 } 2099 2100 void 2101 ohci_device_bulk_abort(reqh) 2102 usbd_request_handle reqh; 2103 { 2104 DPRINTF(("ohci_device_bulk_abort: reqh=%p\n", reqh)); 2105 ohci_abort_req(reqh, USBD_CANCELLED); 2106 } 2107 2108 /* 2109 * Close a device bulk pipe. 2110 */ 2111 void 2112 ohci_device_bulk_close(pipe) 2113 usbd_pipe_handle pipe; 2114 { 2115 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2116 2117 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2118 ohci_close_pipe(pipe, sc->sc_bulk_head); 2119 } 2120 2121 /************************/ 2122 2123 usbd_status 2124 ohci_device_intr_transfer(reqh) 2125 usbd_request_handle reqh; 2126 { 2127 usbd_status r; 2128 2129 r = usb_insert_transfer(reqh); 2130 if (r != USBD_NORMAL_COMPLETION) 2131 return (r); 2132 else 2133 return (ohci_device_intr_start(reqh)); 2134 } 2135 2136 usbd_status 2137 ohci_device_intr_start(reqh) 2138 usbd_request_handle reqh; 2139 { 2140 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 2141 usbd_device_handle dev = opipe->pipe.device; 2142 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2143 ohci_soft_ed_t *sed = opipe->sed; 2144 ohci_soft_td_t *xfer, *tail; 2145 int len; 2146 int s; 2147 2148 DPRINTFN(3, ("ohci_device_intr_transfer: reqh=%p len=%d " 2149 "flags=%d priv=%p\n", 2150 reqh, reqh->length, reqh->flags, reqh->priv)); 2151 2152 #ifdef DIAGNOSTIC 2153 if (reqh->rqflags & URQ_REQUEST) 2154 panic("ohci_device_intr_transfer: a request\n"); 2155 #endif 2156 2157 len = reqh->length; 2158 2159 xfer = opipe->tail; 2160 tail = ohci_alloc_std(sc); 2161 if (!tail) 2162 return (USBD_NOMEM); 2163 tail->reqh = 0; 2164 2165 xfer->td.td_flags = LE( 2166 OHCI_TD_IN | OHCI_TD_NOCC | 2167 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2168 if (reqh->flags & USBD_SHORT_XFER_OK) 2169 xfer->td.td_flags |= LE(OHCI_TD_R); 2170 xfer->td.td_cbp = LE(DMAADDR(&reqh->dmabuf)); 2171 xfer->nexttd = tail; 2172 xfer->td.td_nexttd = LE(tail->physaddr); 2173 xfer->td.td_be = LE(LE(xfer->td.td_cbp) + len - 1); 2174 xfer->len = len; 2175 xfer->reqh = reqh; 2176 xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN; 2177 reqh->hcpriv = xfer; 2178 2179 #if USB_DEBUG 2180 if (ohcidebug > 5) { 2181 DPRINTF(("ohci_device_intr_transfer:\n")); 2182 ohci_dump_ed(sed); 2183 ohci_dump_tds(xfer); 2184 } 2185 #endif 2186 2187 /* Insert ED in schedule */ 2188 s = splusb(); 2189 ohci_hash_add_td(sc, xfer); 2190 sed->ed.ed_tailp = LE(tail->physaddr); 2191 opipe->tail = tail; 2192 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); 2193 2194 #ifdef USB_DEBUG 2195 if (ohcidebug > 5) { 2196 delay(5000); 2197 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2198 OREAD4(sc, OHCI_COMMAND_STATUS))); 2199 ohci_dump_ed(sed); 2200 ohci_dump_tds(xfer); 2201 } 2202 #endif 2203 splx(s); 2204 2205 return (USBD_IN_PROGRESS); 2206 } 2207 2208 /* Abort a device control request. */ 2209 void 2210 ohci_device_intr_abort(reqh) 2211 usbd_request_handle reqh; 2212 { 2213 if (reqh->pipe->intrreqh == reqh) { 2214 DPRINTF(("ohci_device_intr_abort: remove\n")); 2215 reqh->pipe->intrreqh = 0; 2216 } 2217 ohci_abort_req(reqh, USBD_CANCELLED); 2218 } 2219 2220 /* Close a device interrupt pipe. */ 2221 void 2222 ohci_device_intr_close(pipe) 2223 usbd_pipe_handle pipe; 2224 { 2225 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2226 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2227 int nslots = opipe->u.intr.nslots; 2228 int pos = opipe->u.intr.pos; 2229 int j; 2230 ohci_soft_ed_t *p, *sed = opipe->sed; 2231 int s; 2232 2233 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2234 pipe, nslots, pos)); 2235 s = splusb(); 2236 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 2237 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 2238 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) 2239 usb_delay_ms(&sc->sc_bus, 2); 2240 2241 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2242 ; 2243 if (!p) 2244 panic("ohci_device_intr_close: ED not found\n"); 2245 p->next = sed->next; 2246 p->ed.ed_nexted = sed->ed.ed_nexted; 2247 splx(s); 2248 2249 for (j = 0; j < nslots; j++) 2250 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2251 2252 ohci_free_std(sc, opipe->tail); 2253 ohci_free_sed(sc, opipe->sed); 2254 } 2255 2256 usbd_status 2257 ohci_device_setintr(sc, opipe, ival) 2258 ohci_softc_t *sc; 2259 struct ohci_pipe *opipe; 2260 int ival; 2261 { 2262 int i, j, s, best; 2263 u_int npoll, slow, shigh, nslots; 2264 u_int bestbw, bw; 2265 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2266 2267 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2268 if (ival == 0) { 2269 printf("ohci_setintr: 0 interval\n"); 2270 return (USBD_INVAL); 2271 } 2272 2273 npoll = OHCI_NO_INTRS; 2274 while (npoll > ival) 2275 npoll /= 2; 2276 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2277 2278 /* 2279 * We now know which level in the tree the ED must go into. 2280 * Figure out which slot has most bandwidth left over. 2281 * Slots to examine: 2282 * npoll 2283 * 1 0 2284 * 2 1 2 2285 * 4 3 4 5 6 2286 * 8 7 8 9 10 11 12 13 14 2287 * N (N-1) .. (N-1+N-1) 2288 */ 2289 slow = npoll-1; 2290 shigh = slow + npoll; 2291 nslots = OHCI_NO_INTRS / npoll; 2292 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2293 bw = 0; 2294 for (j = 0; j < nslots; j++) 2295 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 2296 if (bw < bestbw) { 2297 best = i; 2298 bestbw = bw; 2299 } 2300 } 2301 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2302 best, slow, shigh, bestbw)); 2303 2304 s = splusb(); 2305 hsed = sc->sc_eds[best]; 2306 sed->next = hsed->next; 2307 sed->ed.ed_nexted = hsed->ed.ed_nexted; 2308 hsed->next = sed; 2309 hsed->ed.ed_nexted = LE(sed->physaddr); 2310 splx(s); 2311 2312 for (j = 0; j < nslots; j++) 2313 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 2314 opipe->u.intr.nslots = nslots; 2315 opipe->u.intr.pos = best; 2316 2317 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 2318 return (USBD_NORMAL_COMPLETION); 2319 } 2320 2321
Indexes created Fri Sep 26 20:09:58 GMT 2025