ohci.c revision 1.44
1 /* $NetBSD: ohci.c,v 1.44 1999/09/13 19:18:17 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (augustss (at) carlstedt.se) at 9 * Carlstedt Research & Technology. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * USB Open Host Controller driver. 42 * 43 * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe 44 * USB spec: http://www.usb.org/developers/data/usb11.pdf 45 */ 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/kernel.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/device.h> 53 #elif defined(__FreeBSD__) 54 #include <sys/module.h> 55 #include <sys/bus.h> 56 #endif 57 #include <sys/proc.h> 58 #include <sys/queue.h> 59 #include <sys/select.h> 60 61 #include <machine/bus.h> 62 #include <machine/endian.h> 63 64 #include <dev/usb/usb.h> 65 #include <dev/usb/usbdi.h> 66 #include <dev/usb/usbdivar.h> 67 #include <dev/usb/usb_mem.h> 68 #include <dev/usb/usb_quirks.h> 69 70 #include <dev/usb/ohcireg.h> 71 #include <dev/usb/ohcivar.h> 72 73 #if defined(__FreeBSD__) 74 #include <machine/clock.h> 75 76 #define delay(d) DELAY(d) 77 78 #endif 79 80 #if defined(__OpenBSD__) 81 struct cfdriver ohci_cd = { 82 NULL, "ohci", DV_DULL 83 }; 84 #endif 85 86 /* 87 * The OHCI controller is little endian, so on big endian machines 88 * the data strored in memory needs to be swapped. 89 */ 90 #if BYTE_ORDER == BIG_ENDIAN 91 #define LE(x) (bswap32(x)) 92 #else 93 #define LE(x) (x) 94 #endif 95 96 struct ohci_pipe; 97 98 ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *)); 99 void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *)); 100 101 ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *)); 102 void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *)); 103 104 void ohci_power __P((int, void *)); 105 usbd_status ohci_open __P((usbd_pipe_handle)); 106 void ohci_poll __P((struct usbd_bus *)); 107 void ohci_waitintr __P((ohci_softc_t *, usbd_request_handle)); 108 void ohci_rhsc __P((ohci_softc_t *, usbd_request_handle)); 109 void ohci_process_done __P((ohci_softc_t *, ohci_physaddr_t)); 110 111 usbd_status ohci_device_request __P((usbd_request_handle reqh)); 112 void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 113 void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 114 void ohci_hash_add_td __P((ohci_softc_t *, ohci_soft_td_t *)); 115 void ohci_hash_rem_td __P((ohci_softc_t *, ohci_soft_td_t *)); 116 ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, ohci_physaddr_t)); 117 118 usbd_status ohci_allocm __P((struct usbd_bus *, usb_dma_t *, u_int32_t)); 119 void ohci_freem __P((struct usbd_bus *, usb_dma_t *)); 120 121 usbd_status ohci_root_ctrl_transfer __P((usbd_request_handle)); 122 usbd_status ohci_root_ctrl_start __P((usbd_request_handle)); 123 void ohci_root_ctrl_abort __P((usbd_request_handle)); 124 void ohci_root_ctrl_close __P((usbd_pipe_handle)); 125 126 usbd_status ohci_root_intr_transfer __P((usbd_request_handle)); 127 usbd_status ohci_root_intr_start __P((usbd_request_handle)); 128 void ohci_root_intr_abort __P((usbd_request_handle)); 129 void ohci_root_intr_close __P((usbd_pipe_handle)); 130 void ohci_root_intr_done __P((usbd_request_handle)); 131 132 usbd_status ohci_device_ctrl_transfer __P((usbd_request_handle)); 133 usbd_status ohci_device_ctrl_start __P((usbd_request_handle)); 134 void ohci_device_ctrl_abort __P((usbd_request_handle)); 135 void ohci_device_ctrl_close __P((usbd_pipe_handle)); 136 void ohci_device_ctrl_done __P((usbd_request_handle)); 137 138 usbd_status ohci_device_bulk_transfer __P((usbd_request_handle)); 139 usbd_status ohci_device_bulk_start __P((usbd_request_handle)); 140 void ohci_device_bulk_abort __P((usbd_request_handle)); 141 void ohci_device_bulk_close __P((usbd_pipe_handle)); 142 void ohci_device_bulk_done __P((usbd_request_handle)); 143 144 usbd_status ohci_device_intr_transfer __P((usbd_request_handle)); 145 usbd_status ohci_device_intr_start __P((usbd_request_handle)); 146 void ohci_device_intr_abort __P((usbd_request_handle)); 147 void ohci_device_intr_close __P((usbd_pipe_handle)); 148 void ohci_device_intr_done __P((usbd_request_handle)); 149 150 usbd_status ohci_device_isoc_transfer __P((usbd_request_handle)); 151 usbd_status ohci_device_isoc_start __P((usbd_request_handle)); 152 void ohci_device_isoc_abort __P((usbd_request_handle)); 153 void ohci_device_isoc_close __P((usbd_pipe_handle)); 154 void ohci_device_isoc_done __P((usbd_request_handle)); 155 156 usbd_status ohci_device_setintr __P((ohci_softc_t *sc, 157 struct ohci_pipe *pipe, int ival)); 158 159 int ohci_str __P((usb_string_descriptor_t *, int, char *)); 160 161 void ohci_timeout __P((void *)); 162 void ohci_rhsc_able __P((ohci_softc_t *, int)); 163 164 void ohci_close_pipe __P((usbd_pipe_handle pipe, 165 ohci_soft_ed_t *head)); 166 void ohci_abort_req __P((usbd_request_handle reqh, 167 usbd_status status)); 168 void ohci_abort_req_end __P((void *)); 169 170 void ohci_device_clear_toggle __P((usbd_pipe_handle pipe)); 171 void ohci_noop __P((usbd_pipe_handle pipe)); 172 173 #ifdef USB_DEBUG 174 ohci_softc_t *thesc; 175 void ohci_dumpregs __P((ohci_softc_t *)); 176 void ohci_dump_tds __P((ohci_soft_td_t *)); 177 void ohci_dump_td __P((ohci_soft_td_t *)); 178 void ohci_dump_ed __P((ohci_soft_ed_t *)); 179 #endif 180 181 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 182 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 183 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 184 185 /* Reverse the bits in a value 0 .. 31 */ 186 static u_int8_t revbits[OHCI_NO_INTRS] = 187 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 188 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 189 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 190 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 191 192 struct ohci_pipe { 193 struct usbd_pipe pipe; 194 ohci_soft_ed_t *sed; 195 ohci_soft_td_t *tail; 196 /* Info needed for different pipe kinds. */ 197 union { 198 /* Control pipe */ 199 struct { 200 usb_dma_t reqdma; 201 u_int length; 202 ohci_soft_td_t *setup, *xfer, *stat; 203 } ctl; 204 /* Interrupt pipe */ 205 struct { 206 int nslots; 207 int pos; 208 } intr; 209 /* Bulk pipe */ 210 struct { 211 u_int length; 212 int isread; 213 } bulk; 214 /* Iso pipe */ 215 struct iso { 216 int xxxxx; 217 } iso; 218 } u; 219 }; 220 221 #define OHCI_INTR_ENDPT 1 222 223 struct usbd_bus_methods ohci_bus_methods = { 224 ohci_open, 225 ohci_poll, 226 ohci_allocm, 227 ohci_freem, 228 }; 229 230 struct usbd_pipe_methods ohci_root_ctrl_methods = { 231 ohci_root_ctrl_transfer, 232 ohci_root_ctrl_start, 233 ohci_root_ctrl_abort, 234 ohci_root_ctrl_close, 235 ohci_noop, 236 0, 237 }; 238 239 struct usbd_pipe_methods ohci_root_intr_methods = { 240 ohci_root_intr_transfer, 241 ohci_root_intr_start, 242 ohci_root_intr_abort, 243 ohci_root_intr_close, 244 ohci_noop, 245 ohci_root_intr_done, 246 }; 247 248 struct usbd_pipe_methods ohci_device_ctrl_methods = { 249 ohci_device_ctrl_transfer, 250 ohci_device_ctrl_start, 251 ohci_device_ctrl_abort, 252 ohci_device_ctrl_close, 253 ohci_noop, 254 ohci_device_ctrl_done, 255 }; 256 257 struct usbd_pipe_methods ohci_device_intr_methods = { 258 ohci_device_intr_transfer, 259 ohci_device_intr_start, 260 ohci_device_intr_abort, 261 ohci_device_intr_close, 262 ohci_device_clear_toggle, 263 ohci_device_intr_done, 264 }; 265 266 struct usbd_pipe_methods ohci_device_bulk_methods = { 267 ohci_device_bulk_transfer, 268 ohci_device_bulk_start, 269 ohci_device_bulk_abort, 270 ohci_device_bulk_close, 271 ohci_device_clear_toggle, 272 ohci_device_bulk_done, 273 }; 274 275 #if 0 276 struct usbd_pipe_methods ohci_device_isoc_methods = { 277 ohci_device_isoc_transfer, 278 ohci_device_isoc_start, 279 ohci_device_isoc_abort, 280 ohci_device_isoc_close, 281 ohci_noop, 282 ohci_device_isoc_done, 283 }; 284 #endif 285 286 ohci_soft_ed_t * 287 ohci_alloc_sed(sc) 288 ohci_softc_t *sc; 289 { 290 ohci_soft_ed_t *sed; 291 usbd_status r; 292 int i, offs; 293 usb_dma_t dma; 294 295 if (!sc->sc_freeeds) { 296 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 297 r = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 298 OHCI_ED_ALIGN, &dma); 299 if (r != USBD_NORMAL_COMPLETION) 300 return (0); 301 for(i = 0; i < OHCI_SED_CHUNK; i++) { 302 offs = i * OHCI_SED_SIZE; 303 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 304 sed->physaddr = DMAADDR(&dma) + offs; 305 sed->next = sc->sc_freeeds; 306 sc->sc_freeeds = sed; 307 } 308 } 309 sed = sc->sc_freeeds; 310 sc->sc_freeeds = sed->next; 311 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 312 sed->next = 0; 313 return (sed); 314 } 315 316 void 317 ohci_free_sed(sc, sed) 318 ohci_softc_t *sc; 319 ohci_soft_ed_t *sed; 320 { 321 sed->next = sc->sc_freeeds; 322 sc->sc_freeeds = sed; 323 } 324 325 ohci_soft_td_t * 326 ohci_alloc_std(sc) 327 ohci_softc_t *sc; 328 { 329 ohci_soft_td_t *std; 330 usbd_status r; 331 int i, offs; 332 usb_dma_t dma; 333 334 if (!sc->sc_freetds) { 335 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 336 r = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 337 OHCI_TD_ALIGN, &dma); 338 if (r != USBD_NORMAL_COMPLETION) 339 return (0); 340 for(i = 0; i < OHCI_STD_CHUNK; i++) { 341 offs = i * OHCI_STD_SIZE; 342 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 343 std->physaddr = DMAADDR(&dma) + offs; 344 std->nexttd = sc->sc_freetds; 345 sc->sc_freetds = std; 346 } 347 } 348 std = sc->sc_freetds; 349 sc->sc_freetds = std->nexttd; 350 memset(&std->td, 0, sizeof(ohci_td_t)); 351 std->nexttd = 0; 352 return (std); 353 } 354 355 void 356 ohci_free_std(sc, std) 357 ohci_softc_t *sc; 358 ohci_soft_td_t *std; 359 { 360 std->nexttd = sc->sc_freetds; 361 sc->sc_freetds = std; 362 } 363 364 usbd_status 365 ohci_init(sc) 366 ohci_softc_t *sc; 367 { 368 ohci_soft_ed_t *sed, *psed; 369 usbd_status r; 370 int rev; 371 int i; 372 u_int32_t s, ctl, ival, hcr, fm, per; 373 374 DPRINTF(("ohci_init: start\n")); 375 rev = OREAD4(sc, OHCI_REVISION); 376 #if defined(__OpenBSD__) 377 printf(", OHCI version %d.%d%s\n", 378 #else 379 printf("%s: OHCI version %d.%d%s\n", USBDEVNAME(sc->sc_bus.bdev), 380 #endif 381 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 382 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 383 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 384 printf("%s: unsupported OHCI revision\n", 385 USBDEVNAME(sc->sc_bus.bdev)); 386 return (USBD_INVAL); 387 } 388 389 for (i = 0; i < OHCI_HASH_SIZE; i++) 390 LIST_INIT(&sc->sc_hash_tds[i]); 391 392 /* Allocate the HCCA area. */ 393 r = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 394 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 395 if (r != USBD_NORMAL_COMPLETION) 396 return (r); 397 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 398 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 399 400 sc->sc_eintrs = OHCI_NORMAL_INTRS; 401 402 sc->sc_ctrl_head = ohci_alloc_sed(sc); 403 if (!sc->sc_ctrl_head) { 404 r = USBD_NOMEM; 405 goto bad1; 406 } 407 sc->sc_ctrl_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 408 409 sc->sc_bulk_head = ohci_alloc_sed(sc); 410 if (!sc->sc_bulk_head) { 411 r = USBD_NOMEM; 412 goto bad2; 413 } 414 sc->sc_bulk_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 415 416 /* Allocate all the dummy EDs that make up the interrupt tree. */ 417 for (i = 0; i < OHCI_NO_EDS; i++) { 418 sed = ohci_alloc_sed(sc); 419 if (!sed) { 420 while (--i >= 0) 421 ohci_free_sed(sc, sc->sc_eds[i]); 422 r = USBD_NOMEM; 423 goto bad3; 424 } 425 /* All ED fields are set to 0. */ 426 sc->sc_eds[i] = sed; 427 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 428 if (i != 0) { 429 psed = sc->sc_eds[(i-1) / 2]; 430 sed->next = psed; 431 sed->ed.ed_nexted = LE(psed->physaddr); 432 } 433 } 434 /* 435 * Fill HCCA interrupt table. The bit reversal is to get 436 * the tree set up properly to spread the interrupts. 437 */ 438 for (i = 0; i < OHCI_NO_INTRS; i++) 439 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 440 LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 441 442 /* Determine in what context we are running. */ 443 ctl = OREAD4(sc, OHCI_CONTROL); 444 if (ctl & OHCI_IR) { 445 /* SMM active, request change */ 446 DPRINTF(("ohci_init: SMM active, request owner change\n")); 447 s = OREAD4(sc, OHCI_COMMAND_STATUS); 448 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 449 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 450 delay(1000); 451 ctl = OREAD4(sc, OHCI_CONTROL); 452 } 453 if ((ctl & OHCI_IR) == 0) { 454 printf("%s: SMM does not respond, resetting\n", 455 USBDEVNAME(sc->sc_bus.bdev)); 456 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 457 goto reset; 458 } 459 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 460 /* BIOS started controller. */ 461 DPRINTF(("ohci_init: BIOS active\n")); 462 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 463 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 464 delay(USB_RESUME_DELAY * 1000); 465 } 466 } else { 467 DPRINTF(("ohci_init: cold started\n")); 468 reset: 469 /* Controller was cold started. */ 470 delay(USB_BUS_RESET_DELAY * 1000); 471 } 472 473 /* 474 * This reset should not be necessary according to the OHCI spec, but 475 * without it some controllers do not start. 476 */ 477 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 478 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 479 delay(USB_BUS_RESET_DELAY * 1000); 480 481 /* We now own the host controller and the bus has been reset. */ 482 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 483 484 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 485 /* Nominal time for a reset is 10 us. */ 486 for (i = 0; i < 10; i++) { 487 delay(10); 488 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 489 if (!hcr) 490 break; 491 } 492 if (hcr) { 493 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 494 r = USBD_IOERROR; 495 goto bad3; 496 } 497 #ifdef USB_DEBUG 498 thesc = sc; 499 if (ohcidebug > 15) 500 ohci_dumpregs(sc); 501 #endif 502 503 /* The controller is now in suspend state, we have 2ms to finish. */ 504 505 /* Set up HC registers. */ 506 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 507 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 508 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 509 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 510 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 511 ctl = OREAD4(sc, OHCI_CONTROL); 512 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 513 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 514 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 515 /* And finally start it! */ 516 OWRITE4(sc, OHCI_CONTROL, ctl); 517 518 /* 519 * The controller is now OPERATIONAL. Set a some final 520 * registers that should be set earlier, but that the 521 * controller ignores when in the SUSPEND state. 522 */ 523 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 524 fm |= OHCI_FSMPS(ival) | ival; 525 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 526 per = OHCI_PERIODIC(ival); /* 90% periodic */ 527 OWRITE4(sc, OHCI_PERIODIC_START, per); 528 529 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 530 531 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 532 533 #ifdef USB_DEBUG 534 if (ohcidebug > 5) 535 ohci_dumpregs(sc); 536 #endif 537 538 /* Set up the bus struct. */ 539 sc->sc_bus.methods = &ohci_bus_methods; 540 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 541 542 powerhook_establish(ohci_power, sc); 543 544 return (USBD_NORMAL_COMPLETION); 545 546 bad3: 547 ohci_free_sed(sc, sc->sc_ctrl_head); 548 bad2: 549 ohci_free_sed(sc, sc->sc_bulk_head); 550 bad1: 551 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 552 return (r); 553 } 554 555 usbd_status 556 ohci_allocm(bus, dma, size) 557 struct usbd_bus *bus; 558 usb_dma_t *dma; 559 u_int32_t size; 560 { 561 struct ohci_softc *sc = (struct ohci_softc *)bus; 562 563 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 564 } 565 566 void 567 ohci_freem(bus, dma) 568 struct usbd_bus *bus; 569 usb_dma_t *dma; 570 { 571 struct ohci_softc *sc = (struct ohci_softc *)bus; 572 573 usb_freemem(&sc->sc_bus, dma); 574 } 575 576 #if !defined(__OpenBSD__) 577 void 578 ohci_power(why, v) 579 int why; 580 void *v; 581 { 582 #ifdef USB_DEBUG 583 ohci_softc_t *sc = v; 584 585 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 586 /* XXX should suspend/resume */ 587 ohci_dumpregs(sc); 588 #endif 589 } 590 #endif /* !defined(__OpenBSD__) */ 591 592 #ifdef USB_DEBUG 593 void ohcidump(void); 594 void ohcidump(void) { ohci_dumpregs(thesc); } 595 596 void 597 ohci_dumpregs(sc) 598 ohci_softc_t *sc; 599 { 600 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 601 OREAD4(sc, OHCI_REVISION), 602 OREAD4(sc, OHCI_CONTROL), 603 OREAD4(sc, OHCI_COMMAND_STATUS))); 604 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 605 OREAD4(sc, OHCI_INTERRUPT_STATUS), 606 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 607 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 608 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 609 OREAD4(sc, OHCI_HCCA), 610 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 611 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 612 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 613 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 614 OREAD4(sc, OHCI_BULK_HEAD_ED), 615 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 616 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 617 OREAD4(sc, OHCI_DONE_HEAD), 618 OREAD4(sc, OHCI_FM_INTERVAL), 619 OREAD4(sc, OHCI_FM_REMAINING))); 620 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 621 OREAD4(sc, OHCI_FM_NUMBER), 622 OREAD4(sc, OHCI_PERIODIC_START), 623 OREAD4(sc, OHCI_LS_THRESHOLD))); 624 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 625 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 626 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 627 OREAD4(sc, OHCI_RH_STATUS))); 628 DPRINTF((" port1=0x%08x port2=0x%08x\n", 629 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 630 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 631 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 632 LE(sc->sc_hcca->hcca_frame_number), 633 LE(sc->sc_hcca->hcca_done_head))); 634 } 635 #endif 636 637 int 638 ohci_intr(p) 639 void *p; 640 { 641 ohci_softc_t *sc = p; 642 u_int32_t intrs, eintrs; 643 ohci_physaddr_t done; 644 645 /* In case the interrupt occurs before initialization has completed. */ 646 if (sc == NULL || sc->sc_hcca == NULL) { 647 #ifdef DIAGNOSTIC 648 printf("ohci_intr: sc->sc_hcca == NULL\n"); 649 #endif 650 return (0); 651 } 652 653 intrs = 0; 654 done = LE(sc->sc_hcca->hcca_done_head); 655 if (done != 0) { 656 sc->sc_hcca->hcca_done_head = 0; 657 if (done & ~OHCI_DONE_INTRS) 658 intrs = OHCI_WDH; 659 if (done & OHCI_DONE_INTRS) 660 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 661 } else 662 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 663 if (!intrs) 664 return (0); 665 intrs &= ~OHCI_MIE; 666 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 667 eintrs = intrs & sc->sc_eintrs; 668 if (!eintrs) 669 return (0); 670 671 sc->sc_bus.intr_context = 1; 672 sc->sc_bus.no_intrs++; 673 DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n", 674 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 675 (u_int)eintrs)); 676 677 if (eintrs & OHCI_SO) { 678 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev)); 679 /* XXX do what */ 680 intrs &= ~OHCI_SO; 681 } 682 if (eintrs & OHCI_WDH) { 683 ohci_process_done(sc, done &~ OHCI_DONE_INTRS); 684 intrs &= ~OHCI_WDH; 685 } 686 if (eintrs & OHCI_RD) { 687 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 688 /* XXX process resume detect */ 689 } 690 if (eintrs & OHCI_UE) { 691 printf("%s: unrecoverable error, controller halted\n", 692 USBDEVNAME(sc->sc_bus.bdev)); 693 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 694 /* XXX what else */ 695 } 696 if (eintrs & OHCI_RHSC) { 697 ohci_rhsc(sc, sc->sc_intrreqh); 698 intrs &= ~OHCI_RHSC; 699 700 /* 701 * Disable RHSC interrupt for now, because it will be 702 * on until the port has been reset. 703 */ 704 ohci_rhsc_able(sc, 0); 705 } 706 707 sc->sc_bus.intr_context = 0; 708 709 /* Block unprocessed interrupts. XXX */ 710 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 711 sc->sc_eintrs &= ~intrs; 712 713 return (1); 714 } 715 716 void 717 ohci_rhsc_able(sc, on) 718 ohci_softc_t *sc; 719 int on; 720 { 721 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 722 if (on) { 723 sc->sc_eintrs |= OHCI_RHSC; 724 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 725 } else { 726 sc->sc_eintrs &= ~OHCI_RHSC; 727 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 728 } 729 } 730 731 #ifdef USB_DEBUG 732 char *ohci_cc_strs[] = { 733 "NO_ERROR", 734 "CRC", 735 "BIT_STUFFING", 736 "DATA_TOGGLE_MISMATCH", 737 "STALL", 738 "DEVICE_NOT_RESPONDING", 739 "PID_CHECK_FAILURE", 740 "UNEXPECTED_PID", 741 "DATA_OVERRUN", 742 "DATA_UNDERRUN", 743 "BUFFER_OVERRUN", 744 "BUFFER_UNDERRUN", 745 "NOT_ACCESSED", 746 }; 747 #endif 748 749 void 750 ohci_process_done(sc, done) 751 ohci_softc_t *sc; 752 ohci_physaddr_t done; 753 { 754 ohci_soft_td_t *std, *sdone; 755 usbd_request_handle reqh; 756 int len, cc; 757 758 DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done)); 759 760 /* Reverse the done list. */ 761 for (sdone = 0; done; done = LE(std->td.td_nexttd)) { 762 std = ohci_hash_find_td(sc, done); 763 std->dnext = sdone; 764 sdone = std; 765 } 766 767 #ifdef USB_DEBUG 768 if (ohcidebug > 10) { 769 DPRINTF(("ohci_process_done: TD done:\n")); 770 ohci_dump_tds(sdone); 771 } 772 #endif 773 774 for (std = sdone; std; std = std->dnext) { 775 reqh = std->reqh; 776 DPRINTFN(10, ("ohci_process_done: std=%p reqh=%p hcpriv=%p\n", 777 std, reqh, reqh->hcpriv)); 778 cc = OHCI_TD_GET_CC(LE(std->td.td_flags)); 779 usb_untimeout(ohci_timeout, reqh, reqh->timo_handle); 780 if (reqh->status == USBD_CANCELLED || 781 reqh->status == USBD_TIMEOUT) { 782 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 783 reqh)); 784 /* Handled by abort routine. */ 785 continue; 786 } else if (cc == OHCI_CC_NO_ERROR) { 787 len = std->len; 788 if (std->td.td_cbp != 0) 789 len -= LE(std->td.td_be) - 790 LE(std->td.td_cbp) + 1; 791 if (std->flags & OHCI_SET_LEN) 792 reqh->actlen = len; 793 if (std->flags & OHCI_CALL_DONE) { 794 reqh->status = USBD_NORMAL_COMPLETION; 795 usb_transfer_complete(reqh); 796 } 797 } else { 798 ohci_soft_td_t *p, *n; 799 struct ohci_pipe *opipe = 800 (struct ohci_pipe *)reqh->pipe; 801 DPRINTFN(-1,("ohci_process_done: error cc=%d (%s)\n", 802 OHCI_TD_GET_CC(LE(std->td.td_flags)), 803 ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td.td_flags))])); 804 /* 805 * Endpoint is halted. First unlink all the TDs 806 * belonging to the failed transfer, and then restart 807 * the endpoint. 808 */ 809 for (p = std->nexttd; p->reqh == reqh; p = n) { 810 n = p->nexttd; 811 ohci_hash_rem_td(sc, p); 812 ohci_free_std(sc, p); 813 } 814 /* clear halt */ 815 opipe->sed->ed.ed_headp = LE(p->physaddr); 816 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 817 818 if (cc == OHCI_CC_STALL) 819 reqh->status = USBD_STALLED; 820 else 821 reqh->status = USBD_IOERROR; 822 usb_transfer_complete(reqh); 823 } 824 ohci_hash_rem_td(sc, std); 825 ohci_free_std(sc, std); 826 } 827 } 828 829 void 830 ohci_device_ctrl_done(reqh) 831 usbd_request_handle reqh; 832 { 833 DPRINTFN(10,("ohci_ctrl_done: reqh=%p\n", reqh)); 834 835 #ifdef DIAGNOSTIC 836 if (!(reqh->rqflags & URQ_REQUEST)) { 837 panic("ohci_ctrl_done: not a request\n"); 838 } 839 #endif 840 reqh->hcpriv = 0; 841 } 842 843 void 844 ohci_device_intr_done(reqh) 845 usbd_request_handle reqh; 846 { 847 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 848 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 849 ohci_soft_ed_t *sed = opipe->sed; 850 ohci_soft_td_t *xfer, *tail; 851 852 853 DPRINTFN(10,("ohci_intr_done: reqh=%p, actlen=%d\n", 854 reqh, reqh->actlen)); 855 856 reqh->hcpriv = 0; 857 858 if (reqh->pipe->repeat) { 859 xfer = opipe->tail; 860 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 861 if (!tail) { 862 reqh->status = USBD_NOMEM; 863 return; 864 } 865 tail->reqh = 0; 866 867 xfer->td.td_flags = LE( 868 OHCI_TD_IN | OHCI_TD_NOCC | 869 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 870 if (reqh->flags & USBD_SHORT_XFER_OK) 871 xfer->td.td_flags |= LE(OHCI_TD_R); 872 xfer->td.td_cbp = LE(DMAADDR(&reqh->dmabuf)); 873 xfer->nexttd = tail; 874 xfer->td.td_nexttd = LE(tail->physaddr); 875 xfer->td.td_be = LE(LE(xfer->td.td_cbp) + reqh->length - 1); 876 xfer->len = reqh->length; 877 xfer->reqh = reqh; 878 xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN; 879 reqh->hcpriv = xfer; 880 881 ohci_hash_add_td(sc, xfer); 882 sed->ed.ed_tailp = LE(tail->physaddr); 883 opipe->tail = tail; 884 } 885 } 886 887 void 888 ohci_device_bulk_done(reqh) 889 usbd_request_handle reqh; 890 { 891 DPRINTFN(10,("ohci_bulk_done: reqh=%p, actlen=%d\n", 892 reqh, reqh->actlen)); 893 894 reqh->hcpriv = 0; 895 } 896 897 void 898 ohci_rhsc(sc, reqh) 899 ohci_softc_t *sc; 900 usbd_request_handle reqh; 901 { 902 usbd_pipe_handle pipe; 903 struct ohci_pipe *opipe; 904 u_char *p; 905 int i, m; 906 int hstatus; 907 908 hstatus = OREAD4(sc, OHCI_RH_STATUS); 909 DPRINTF(("ohci_rhsc: sc=%p reqh=%p hstatus=0x%08x\n", 910 sc, reqh, hstatus)); 911 912 if (reqh == 0) { 913 /* Just ignore the change. */ 914 return; 915 } 916 917 pipe = reqh->pipe; 918 opipe = (struct ohci_pipe *)pipe; 919 920 p = KERNADDR(&reqh->dmabuf); 921 m = min(sc->sc_noport, reqh->length * 8 - 1); 922 memset(p, 0, reqh->length); 923 for (i = 1; i <= m; i++) { 924 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 925 p[i/8] |= 1 << (i%8); 926 } 927 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 928 reqh->actlen = reqh->length; 929 reqh->status = USBD_NORMAL_COMPLETION; 930 931 usb_transfer_complete(reqh); 932 } 933 934 void 935 ohci_root_intr_done(reqh) 936 usbd_request_handle reqh; 937 { 938 reqh->hcpriv = 0; 939 } 940 941 /* 942 * Wait here until controller claims to have an interrupt. 943 * Then call ohci_intr and return. Use timeout to avoid waiting 944 * too long. 945 */ 946 void 947 ohci_waitintr(sc, reqh) 948 ohci_softc_t *sc; 949 usbd_request_handle reqh; 950 { 951 int timo = reqh->timeout; 952 int usecs; 953 u_int32_t intrs; 954 955 reqh->status = USBD_IN_PROGRESS; 956 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 957 usb_delay_ms(&sc->sc_bus, 1); 958 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 959 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 960 #ifdef USB_DEBUG 961 if (ohcidebug > 15) 962 ohci_dumpregs(sc); 963 #endif 964 if (intrs) { 965 ohci_intr(sc); 966 if (reqh->status != USBD_IN_PROGRESS) 967 return; 968 } 969 } 970 971 /* Timeout */ 972 DPRINTF(("ohci_waitintr: timeout\n")); 973 reqh->status = USBD_TIMEOUT; 974 usb_transfer_complete(reqh); 975 /* XXX should free TD */ 976 } 977 978 void 979 ohci_poll(bus) 980 struct usbd_bus *bus; 981 { 982 ohci_softc_t *sc = (ohci_softc_t *)bus; 983 984 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 985 ohci_intr(sc); 986 } 987 988 usbd_status 989 ohci_device_request(reqh) 990 usbd_request_handle reqh; 991 { 992 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 993 usb_device_request_t *req = &reqh->request; 994 usbd_device_handle dev = opipe->pipe.device; 995 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 996 int addr = dev->address; 997 ohci_soft_td_t *setup, *xfer = 0, *stat, *next, *tail; 998 ohci_soft_ed_t *sed; 999 int isread; 1000 int len; 1001 usbd_status r; 1002 int s; 1003 1004 isread = req->bmRequestType & UT_READ; 1005 len = UGETW(req->wLength); 1006 1007 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1008 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1009 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1010 UGETW(req->wIndex), len, addr, 1011 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1012 1013 setup = opipe->tail; 1014 stat = ohci_alloc_std(sc); 1015 if (!stat) { 1016 r = USBD_NOMEM; 1017 goto bad1; 1018 } 1019 tail = ohci_alloc_std(sc); 1020 if (!tail) { 1021 r = USBD_NOMEM; 1022 goto bad2; 1023 } 1024 tail->reqh = 0; 1025 1026 sed = opipe->sed; 1027 opipe->u.ctl.length = len; 1028 1029 /* Update device address and length since they may have changed. */ 1030 /* XXX This only needs to be done once, but it's too early in open. */ 1031 sed->ed.ed_flags = LE( 1032 (LE(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1033 OHCI_ED_SET_FA(addr) | 1034 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1035 1036 /* Set up data transaction */ 1037 if (len != 0) { 1038 xfer = ohci_alloc_std(sc); 1039 if (!xfer) { 1040 r = USBD_NOMEM; 1041 goto bad3; 1042 } 1043 xfer->td.td_flags = LE( 1044 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 1045 OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR | 1046 (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0)); 1047 xfer->td.td_cbp = LE(DMAADDR(&reqh->dmabuf)); 1048 xfer->nexttd = stat; 1049 xfer->td.td_nexttd = LE(stat->physaddr); 1050 xfer->td.td_be = LE(LE(xfer->td.td_cbp) + len - 1); 1051 xfer->len = len; 1052 xfer->reqh = reqh; 1053 xfer->flags = OHCI_SET_LEN; 1054 1055 next = xfer; 1056 stat->flags = OHCI_CALL_DONE; 1057 } else { 1058 next = stat; 1059 stat->flags = OHCI_CALL_DONE | OHCI_SET_LEN; 1060 } 1061 1062 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1063 1064 setup->td.td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC | 1065 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1066 setup->td.td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma)); 1067 setup->nexttd = next; 1068 setup->td.td_nexttd = LE(next->physaddr); 1069 setup->td.td_be = LE(LE(setup->td.td_cbp) + sizeof *req - 1); 1070 setup->len = 0; /* XXX The number of byte we count */ 1071 setup->reqh = reqh; 1072 setup->flags = 0; 1073 reqh->hcpriv = setup; 1074 1075 stat->td.td_flags = LE( 1076 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC | 1077 OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1078 stat->td.td_cbp = 0; 1079 stat->nexttd = tail; 1080 stat->td.td_nexttd = LE(tail->physaddr); 1081 stat->td.td_be = 0; 1082 stat->len = 0; 1083 stat->reqh = reqh; 1084 1085 #if USB_DEBUG 1086 if (ohcidebug > 5) { 1087 DPRINTF(("ohci_device_request:\n")); 1088 ohci_dump_ed(sed); 1089 ohci_dump_tds(setup); 1090 } 1091 #endif 1092 1093 /* Insert ED in schedule */ 1094 s = splusb(); 1095 ohci_hash_add_td(sc, setup); 1096 if (len != 0) 1097 ohci_hash_add_td(sc, xfer); 1098 ohci_hash_add_td(sc, stat); 1099 sed->ed.ed_tailp = LE(tail->physaddr); 1100 opipe->tail = tail; 1101 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1102 if (reqh->timeout && !sc->sc_bus.use_polling) { 1103 usb_timeout(ohci_timeout, reqh, 1104 MS_TO_TICKS(reqh->timeout), reqh->timo_handle); 1105 } 1106 splx(s); 1107 1108 #if USB_DEBUG 1109 if (ohcidebug > 5) { 1110 delay(5000); 1111 DPRINTF(("ohci_device_request: status=%x\n", 1112 OREAD4(sc, OHCI_COMMAND_STATUS))); 1113 ohci_dump_ed(sed); 1114 ohci_dump_tds(setup); 1115 } 1116 #endif 1117 1118 return (USBD_NORMAL_COMPLETION); 1119 1120 bad3: 1121 ohci_free_std(sc, tail); 1122 bad2: 1123 ohci_free_std(sc, stat); 1124 bad1: 1125 return (r); 1126 } 1127 1128 /* 1129 * Add an ED to the schedule. Called at splusb(). 1130 */ 1131 void 1132 ohci_add_ed(sed, head) 1133 ohci_soft_ed_t *sed; 1134 ohci_soft_ed_t *head; 1135 { 1136 sed->next = head->next; 1137 sed->ed.ed_nexted = head->ed.ed_nexted; 1138 head->next = sed; 1139 head->ed.ed_nexted = LE(sed->physaddr); 1140 } 1141 1142 /* 1143 * Remove an ED from the schedule. Called at splusb(). 1144 */ 1145 void 1146 ohci_rem_ed(sed, head) 1147 ohci_soft_ed_t *sed; 1148 ohci_soft_ed_t *head; 1149 { 1150 ohci_soft_ed_t *p; 1151 1152 /* XXX */ 1153 for (p = head; p && p->next != sed; p = p->next) 1154 ; 1155 if (!p) 1156 panic("ohci_rem_ed: ED not found\n"); 1157 p->next = sed->next; 1158 p->ed.ed_nexted = sed->ed.ed_nexted; 1159 } 1160 1161 /* 1162 * When a transfer is completed the TD is added to the done queue by 1163 * the host controller. This queue is the processed by software. 1164 * Unfortunately the queue contains the physical address of the TD 1165 * and we have no simple way to translate this back to a kernel address. 1166 * To make the translation possible (and fast) we use a hash table of 1167 * TDs currently in the schedule. The physical address is used as the 1168 * hash value. 1169 */ 1170 1171 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1172 /* Called at splusb() */ 1173 void 1174 ohci_hash_add_td(sc, std) 1175 ohci_softc_t *sc; 1176 ohci_soft_td_t *std; 1177 { 1178 int h = HASH(std->physaddr); 1179 1180 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1181 } 1182 1183 /* Called at splusb() */ 1184 void 1185 ohci_hash_rem_td(sc, std) 1186 ohci_softc_t *sc; 1187 ohci_soft_td_t *std; 1188 { 1189 LIST_REMOVE(std, hnext); 1190 } 1191 1192 ohci_soft_td_t * 1193 ohci_hash_find_td(sc, a) 1194 ohci_softc_t *sc; 1195 ohci_physaddr_t a; 1196 { 1197 int h = HASH(a); 1198 ohci_soft_td_t *std; 1199 1200 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1201 std != 0; 1202 std = LIST_NEXT(std, hnext)) 1203 if (std->physaddr == a) 1204 return (std); 1205 panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a); 1206 } 1207 1208 void 1209 ohci_timeout(addr) 1210 void *addr; 1211 { 1212 usbd_request_handle reqh = addr; 1213 1214 DPRINTF(("ohci_timeout: reqh=%p\n", reqh)); 1215 ohci_abort_req(reqh, USBD_TIMEOUT); 1216 } 1217 1218 #ifdef USB_DEBUG 1219 void 1220 ohci_dump_tds(std) 1221 ohci_soft_td_t *std; 1222 { 1223 for (; std; std = std->nexttd) 1224 ohci_dump_td(std); 1225 } 1226 1227 void 1228 ohci_dump_td(std) 1229 ohci_soft_td_t *std; 1230 { 1231 DPRINTF(("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1232 "nexttd=0x%08lx be=0x%08lx\n", 1233 std, (u_long)std->physaddr, 1234 (int)LE(std->td.td_flags), 1235 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1236 OHCI_TD_GET_DI(LE(std->td.td_flags)), 1237 OHCI_TD_GET_EC(LE(std->td.td_flags)), 1238 OHCI_TD_GET_CC(LE(std->td.td_flags)), 1239 (u_long)LE(std->td.td_cbp), 1240 (u_long)LE(std->td.td_nexttd), (u_long)LE(std->td.td_be))); 1241 } 1242 1243 void 1244 ohci_dump_ed(sed) 1245 ohci_soft_ed_t *sed; 1246 { 1247 DPRINTF(("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx " 1248 "headp=%b nexted=0x%08lx\n", 1249 sed, (u_long)sed->physaddr, 1250 OHCI_ED_GET_FA(LE(sed->ed.ed_flags)), 1251 OHCI_ED_GET_EN(LE(sed->ed.ed_flags)), 1252 OHCI_ED_GET_MAXP(LE(sed->ed.ed_flags)), 1253 (int)LE(sed->ed.ed_flags), 1254 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1255 (u_long)LE(sed->ed.ed_tailp), 1256 (u_long)LE(sed->ed.ed_headp), "\20\1HALT\2CARRY", 1257 (u_long)LE(sed->ed.ed_nexted))); 1258 } 1259 #endif 1260 1261 usbd_status 1262 ohci_open(pipe) 1263 usbd_pipe_handle pipe; 1264 { 1265 usbd_device_handle dev = pipe->device; 1266 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1267 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1268 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1269 u_int8_t addr = dev->address; 1270 ohci_soft_ed_t *sed; 1271 ohci_soft_td_t *std; 1272 usbd_status r; 1273 int s; 1274 1275 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1276 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1277 if (addr == sc->sc_addr) { 1278 switch (ed->bEndpointAddress) { 1279 case USB_CONTROL_ENDPOINT: 1280 pipe->methods = &ohci_root_ctrl_methods; 1281 break; 1282 case UE_DIR_IN | OHCI_INTR_ENDPT: 1283 pipe->methods = &ohci_root_intr_methods; 1284 break; 1285 default: 1286 return (USBD_INVAL); 1287 } 1288 } else { 1289 sed = ohci_alloc_sed(sc); 1290 if (sed == 0) 1291 goto bad0; 1292 std = ohci_alloc_std(sc); 1293 if (std == 0) 1294 goto bad1; 1295 opipe->sed = sed; 1296 opipe->tail = std; 1297 sed->ed.ed_flags = LE( 1298 OHCI_ED_SET_FA(addr) | 1299 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1300 OHCI_ED_DIR_TD | 1301 (dev->lowspeed ? OHCI_ED_SPEED : 0) | 1302 ((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ? 1303 OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) | 1304 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1305 sed->ed.ed_headp = sed->ed.ed_tailp = LE(std->physaddr); 1306 1307 switch (ed->bmAttributes & UE_XFERTYPE) { 1308 case UE_CONTROL: 1309 pipe->methods = &ohci_device_ctrl_methods; 1310 r = usb_allocmem(&sc->sc_bus, 1311 sizeof(usb_device_request_t), 1312 0, &opipe->u.ctl.reqdma); 1313 if (r != USBD_NORMAL_COMPLETION) 1314 goto bad; 1315 s = splusb(); 1316 ohci_add_ed(sed, sc->sc_ctrl_head); 1317 splx(s); 1318 break; 1319 case UE_INTERRUPT: 1320 pipe->methods = &ohci_device_intr_methods; 1321 return (ohci_device_setintr(sc, opipe, ed->bInterval)); 1322 case UE_ISOCHRONOUS: 1323 printf("ohci_open: open iso unimplemented\n"); 1324 return (USBD_INVAL); 1325 case UE_BULK: 1326 pipe->methods = &ohci_device_bulk_methods; 1327 s = splusb(); 1328 ohci_add_ed(sed, sc->sc_bulk_head); 1329 splx(s); 1330 break; 1331 } 1332 } 1333 return (USBD_NORMAL_COMPLETION); 1334 1335 bad: 1336 ohci_free_std(sc, std); 1337 bad1: 1338 ohci_free_sed(sc, sed); 1339 bad0: 1340 return (USBD_NOMEM); 1341 1342 } 1343 1344 /* 1345 * Close a reqular pipe. 1346 * Assumes that there are no pending transactions. 1347 */ 1348 void 1349 ohci_close_pipe(pipe, head) 1350 usbd_pipe_handle pipe; 1351 ohci_soft_ed_t *head; 1352 { 1353 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1354 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1355 ohci_soft_ed_t *sed = opipe->sed; 1356 int s; 1357 1358 s = splusb(); 1359 #ifdef DIAGNOSTIC 1360 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 1361 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 1362 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) { 1363 ohci_physaddr_t td = sed->ed.ed_headp; 1364 ohci_soft_td_t *std; 1365 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]); 1366 std != 0; 1367 std = LIST_NEXT(std, hnext)) 1368 if (std->physaddr == td) 1369 break; 1370 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 1371 "tl=0x%x pipe=%p, std=%p\n", sed, 1372 (int)LE(sed->ed.ed_headp), (int)LE(sed->ed.ed_tailp), 1373 pipe, std); 1374 usb_delay_ms(&sc->sc_bus, 2); 1375 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 1376 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) 1377 printf("ohci_close_pipe: pipe still not empty\n"); 1378 } 1379 #endif 1380 ohci_rem_ed(sed, head); 1381 splx(s); 1382 ohci_free_std(sc, opipe->tail); 1383 ohci_free_sed(sc, opipe->sed); 1384 } 1385 1386 /* 1387 * Abort a device request. 1388 * If this routine is called at splusb() it guarantees that the request 1389 * will be removed from the hardware scheduling and that the callback 1390 * for it will be called with USBD_CANCELLED status. 1391 * It's impossible to guarantee that the requested transfer will not 1392 * have happened since the hardware runs concurrently. 1393 * If the transaction has already happened we rely on the ordinary 1394 * interrupt processing to process it. 1395 */ 1396 void 1397 ohci_abort_req(reqh, status) 1398 usbd_request_handle reqh; 1399 usbd_status status; 1400 { 1401 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 1402 ohci_soft_ed_t *sed; 1403 1404 DPRINTF(("ohci_abort_req: reqh=%p pipe=%p\n", reqh, opipe)); 1405 1406 reqh->status = status; 1407 1408 usb_untimeout(ohci_timeout, reqh, reqh->timo_handle); 1409 1410 sed = opipe->sed; 1411 DPRINTFN(1,("ohci_abort_req: stop ed=%p\n", sed)); 1412 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); /* force hardware skip */ 1413 1414 if (reqh->device->bus->intr_context) { 1415 /* We have no process context, so we can't use tsleep(). */ 1416 timeout(ohci_abort_req_end, reqh, hz / USB_FRAMES_PER_SECOND); 1417 } else { 1418 usb_delay_ms(opipe->pipe.device->bus, 1); 1419 ohci_abort_req_end(reqh); 1420 } 1421 } 1422 1423 void 1424 ohci_abort_req_end(v) 1425 void *v; 1426 { 1427 usbd_request_handle reqh = v; 1428 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 1429 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1430 ohci_soft_ed_t *sed; 1431 ohci_soft_td_t *p, *n; 1432 int s; 1433 1434 s = splusb(); 1435 1436 p = reqh->hcpriv; 1437 #ifdef DIAGNOSTIC 1438 if (!p) { 1439 printf("ohci_abort_req: hcpriv==0\n"); 1440 return; 1441 } 1442 #endif 1443 for (; p->reqh == reqh; p = n) { 1444 n = p->nexttd; 1445 ohci_hash_rem_td(sc, p); 1446 ohci_free_std(sc, p); 1447 } 1448 1449 sed = opipe->sed; 1450 DPRINTFN(2,("ohci_abort_req: set hd=%x, tl=%x\n", 1451 (int)LE(p->physaddr), (int)LE(sed->ed.ed_tailp))); 1452 sed->ed.ed_headp = p->physaddr; /* unlink TDs */ 1453 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); /* remove hardware skip */ 1454 1455 usb_transfer_complete(reqh); 1456 1457 splx(s); 1458 } 1459 1460 /* 1461 * Data structures and routines to emulate the root hub. 1462 */ 1463 usb_device_descriptor_t ohci_devd = { 1464 USB_DEVICE_DESCRIPTOR_SIZE, 1465 UDESC_DEVICE, /* type */ 1466 {0x00, 0x01}, /* USB version */ 1467 UCLASS_HUB, /* class */ 1468 USUBCLASS_HUB, /* subclass */ 1469 0, /* protocol */ 1470 64, /* max packet */ 1471 {0},{0},{0x00,0x01}, /* device id */ 1472 1,2,0, /* string indicies */ 1473 1 /* # of configurations */ 1474 }; 1475 1476 usb_config_descriptor_t ohci_confd = { 1477 USB_CONFIG_DESCRIPTOR_SIZE, 1478 UDESC_CONFIG, 1479 {USB_CONFIG_DESCRIPTOR_SIZE + 1480 USB_INTERFACE_DESCRIPTOR_SIZE + 1481 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1482 1, 1483 1, 1484 0, 1485 UC_SELF_POWERED, 1486 0 /* max power */ 1487 }; 1488 1489 usb_interface_descriptor_t ohci_ifcd = { 1490 USB_INTERFACE_DESCRIPTOR_SIZE, 1491 UDESC_INTERFACE, 1492 0, 1493 0, 1494 1, 1495 UCLASS_HUB, 1496 USUBCLASS_HUB, 1497 0, 1498 0 1499 }; 1500 1501 usb_endpoint_descriptor_t ohci_endpd = { 1502 USB_ENDPOINT_DESCRIPTOR_SIZE, 1503 UDESC_ENDPOINT, 1504 UE_DIR_IN | OHCI_INTR_ENDPT, 1505 UE_INTERRUPT, 1506 {8, 0}, /* max packet */ 1507 255 1508 }; 1509 1510 usb_hub_descriptor_t ohci_hubd = { 1511 USB_HUB_DESCRIPTOR_SIZE, 1512 UDESC_HUB, 1513 0, 1514 {0,0}, 1515 0, 1516 0, 1517 {0}, 1518 }; 1519 1520 int 1521 ohci_str(p, l, s) 1522 usb_string_descriptor_t *p; 1523 int l; 1524 char *s; 1525 { 1526 int i; 1527 1528 if (l == 0) 1529 return (0); 1530 p->bLength = 2 * strlen(s) + 2; 1531 if (l == 1) 1532 return (1); 1533 p->bDescriptorType = UDESC_STRING; 1534 l -= 2; 1535 for (i = 0; s[i] && l > 1; i++, l -= 2) 1536 USETW2(p->bString[i], 0, s[i]); 1537 return (2*i+2); 1538 } 1539 1540 /* 1541 * Simulate a hardware hub by handling all the necessary requests. 1542 */ 1543 usbd_status 1544 ohci_root_ctrl_transfer(reqh) 1545 usbd_request_handle reqh; 1546 { 1547 usbd_status r; 1548 1549 r = usb_insert_transfer(reqh); 1550 if (r != USBD_NORMAL_COMPLETION) 1551 return (r); 1552 else 1553 return (ohci_root_ctrl_start(reqh)); 1554 } 1555 1556 usbd_status 1557 ohci_root_ctrl_start(reqh) 1558 usbd_request_handle reqh; 1559 { 1560 ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus; 1561 usb_device_request_t *req; 1562 void *buf; 1563 int port, i; 1564 int len, value, index, l, totlen = 0; 1565 usb_port_status_t ps; 1566 usb_hub_descriptor_t hubd; 1567 usbd_status r; 1568 u_int32_t v; 1569 1570 #ifdef DIAGNOSTIC 1571 if (!(reqh->rqflags & URQ_REQUEST)) 1572 /* XXX panic */ 1573 return (USBD_INVAL); 1574 #endif 1575 req = &reqh->request; 1576 1577 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 1578 req->bmRequestType, req->bRequest)); 1579 1580 len = UGETW(req->wLength); 1581 value = UGETW(req->wValue); 1582 index = UGETW(req->wIndex); 1583 1584 if (len != 0) 1585 buf = KERNADDR(&reqh->dmabuf); 1586 #ifdef DIAGNOSTIC 1587 else 1588 buf = 0; 1589 #endif 1590 1591 #define C(x,y) ((x) | ((y) << 8)) 1592 switch(C(req->bRequest, req->bmRequestType)) { 1593 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1594 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1595 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1596 /* 1597 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1598 * for the integrated root hub. 1599 */ 1600 break; 1601 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1602 if (len > 0) { 1603 *(u_int8_t *)buf = sc->sc_conf; 1604 totlen = 1; 1605 } 1606 break; 1607 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1608 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 1609 switch(value >> 8) { 1610 case UDESC_DEVICE: 1611 if ((value & 0xff) != 0) { 1612 r = USBD_IOERROR; 1613 goto ret; 1614 } 1615 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1616 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 1617 memcpy(buf, &ohci_devd, l); 1618 break; 1619 case UDESC_CONFIG: 1620 if ((value & 0xff) != 0) { 1621 r = USBD_IOERROR; 1622 goto ret; 1623 } 1624 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1625 memcpy(buf, &ohci_confd, l); 1626 buf = (char *)buf + l; 1627 len -= l; 1628 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1629 totlen += l; 1630 memcpy(buf, &ohci_ifcd, l); 1631 buf = (char *)buf + l; 1632 len -= l; 1633 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1634 totlen += l; 1635 memcpy(buf, &ohci_endpd, l); 1636 break; 1637 case UDESC_STRING: 1638 if (len == 0) 1639 break; 1640 *(u_int8_t *)buf = 0; 1641 totlen = 1; 1642 switch (value & 0xff) { 1643 case 1: /* Vendor */ 1644 totlen = ohci_str(buf, len, sc->sc_vendor); 1645 break; 1646 case 2: /* Product */ 1647 totlen = ohci_str(buf, len, "OHCI root hub"); 1648 break; 1649 } 1650 break; 1651 default: 1652 r = USBD_IOERROR; 1653 goto ret; 1654 } 1655 break; 1656 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1657 if (len > 0) { 1658 *(u_int8_t *)buf = 0; 1659 totlen = 1; 1660 } 1661 break; 1662 case C(UR_GET_STATUS, UT_READ_DEVICE): 1663 if (len > 1) { 1664 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1665 totlen = 2; 1666 } 1667 break; 1668 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1669 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1670 if (len > 1) { 1671 USETW(((usb_status_t *)buf)->wStatus, 0); 1672 totlen = 2; 1673 } 1674 break; 1675 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1676 if (value >= USB_MAX_DEVICES) { 1677 r = USBD_IOERROR; 1678 goto ret; 1679 } 1680 sc->sc_addr = value; 1681 break; 1682 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1683 if (value != 0 && value != 1) { 1684 r = USBD_IOERROR; 1685 goto ret; 1686 } 1687 sc->sc_conf = value; 1688 break; 1689 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1690 break; 1691 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1692 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1693 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1694 r = USBD_IOERROR; 1695 goto ret; 1696 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1697 break; 1698 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1699 break; 1700 /* Hub requests */ 1701 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1702 break; 1703 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1704 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1705 "port=%d feature=%d\n", 1706 index, value)); 1707 if (index < 1 || index > sc->sc_noport) { 1708 r = USBD_IOERROR; 1709 goto ret; 1710 } 1711 port = OHCI_RH_PORT_STATUS(index); 1712 switch(value) { 1713 case UHF_PORT_ENABLE: 1714 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 1715 break; 1716 case UHF_PORT_SUSPEND: 1717 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 1718 break; 1719 case UHF_PORT_POWER: 1720 OWRITE4(sc, port, UPS_LOW_SPEED); 1721 break; 1722 case UHF_C_PORT_CONNECTION: 1723 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 1724 break; 1725 case UHF_C_PORT_ENABLE: 1726 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 1727 break; 1728 case UHF_C_PORT_SUSPEND: 1729 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 1730 break; 1731 case UHF_C_PORT_OVER_CURRENT: 1732 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 1733 break; 1734 case UHF_C_PORT_RESET: 1735 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 1736 break; 1737 default: 1738 r = USBD_IOERROR; 1739 goto ret; 1740 } 1741 switch(value) { 1742 case UHF_C_PORT_CONNECTION: 1743 case UHF_C_PORT_ENABLE: 1744 case UHF_C_PORT_SUSPEND: 1745 case UHF_C_PORT_OVER_CURRENT: 1746 case UHF_C_PORT_RESET: 1747 /* Enable RHSC interrupt if condition is cleared. */ 1748 if ((OREAD4(sc, port) >> 16) == 0) 1749 ohci_rhsc_able(sc, 1); 1750 break; 1751 default: 1752 break; 1753 } 1754 break; 1755 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1756 if (value != 0) { 1757 r = USBD_IOERROR; 1758 goto ret; 1759 } 1760 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 1761 hubd = ohci_hubd; 1762 hubd.bNbrPorts = sc->sc_noport; 1763 USETW(hubd.wHubCharacteristics, 1764 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 1765 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 1766 /* XXX overcurrent */ 1767 ); 1768 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 1769 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 1770 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1771 hubd.DeviceRemovable[i++] = (u_int8_t)v; 1772 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1773 l = min(len, hubd.bDescLength); 1774 totlen = l; 1775 memcpy(buf, &hubd, l); 1776 break; 1777 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1778 if (len != 4) { 1779 r = USBD_IOERROR; 1780 goto ret; 1781 } 1782 memset(buf, 0, len); /* ? XXX */ 1783 totlen = len; 1784 break; 1785 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1786 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 1787 index)); 1788 if (index < 1 || index > sc->sc_noport) { 1789 r = USBD_IOERROR; 1790 goto ret; 1791 } 1792 if (len != 4) { 1793 r = USBD_IOERROR; 1794 goto ret; 1795 } 1796 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 1797 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 1798 v)); 1799 USETW(ps.wPortStatus, v); 1800 USETW(ps.wPortChange, v >> 16); 1801 l = min(len, sizeof ps); 1802 memcpy(buf, &ps, l); 1803 totlen = l; 1804 break; 1805 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1806 r = USBD_IOERROR; 1807 goto ret; 1808 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1809 break; 1810 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1811 if (index < 1 || index > sc->sc_noport) { 1812 r = USBD_IOERROR; 1813 goto ret; 1814 } 1815 port = OHCI_RH_PORT_STATUS(index); 1816 switch(value) { 1817 case UHF_PORT_ENABLE: 1818 OWRITE4(sc, port, UPS_PORT_ENABLED); 1819 break; 1820 case UHF_PORT_SUSPEND: 1821 OWRITE4(sc, port, UPS_SUSPEND); 1822 break; 1823 case UHF_PORT_RESET: 1824 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 1825 index)); 1826 OWRITE4(sc, port, UPS_RESET); 1827 for (i = 0; i < 10; i++) { 1828 usb_delay_ms(&sc->sc_bus, 10); 1829 if ((OREAD4(sc, port) & UPS_RESET) == 0) 1830 break; 1831 } 1832 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 1833 index, OREAD4(sc, port))); 1834 break; 1835 case UHF_PORT_POWER: 1836 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 1837 "%d\n", index)); 1838 OWRITE4(sc, port, UPS_PORT_POWER); 1839 break; 1840 default: 1841 r = USBD_IOERROR; 1842 goto ret; 1843 } 1844 break; 1845 default: 1846 r = USBD_IOERROR; 1847 goto ret; 1848 } 1849 reqh->actlen = totlen; 1850 r = USBD_NORMAL_COMPLETION; 1851 ret: 1852 reqh->status = r; 1853 usb_transfer_complete(reqh); 1854 return (USBD_IN_PROGRESS); 1855 } 1856 1857 /* Abort a root control request. */ 1858 void 1859 ohci_root_ctrl_abort(reqh) 1860 usbd_request_handle reqh; 1861 { 1862 /* Nothing to do, all transfers are synchronous. */ 1863 } 1864 1865 /* Close the root pipe. */ 1866 void 1867 ohci_root_ctrl_close(pipe) 1868 usbd_pipe_handle pipe; 1869 { 1870 DPRINTF(("ohci_root_ctrl_close\n")); 1871 /* Nothing to do. */ 1872 } 1873 1874 usbd_status 1875 ohci_root_intr_transfer(reqh) 1876 usbd_request_handle reqh; 1877 { 1878 usbd_status r; 1879 1880 r = usb_insert_transfer(reqh); 1881 if (r != USBD_NORMAL_COMPLETION) 1882 return (r); 1883 else 1884 return (ohci_root_intr_start(reqh)); 1885 } 1886 1887 usbd_status 1888 ohci_root_intr_start(reqh) 1889 usbd_request_handle reqh; 1890 { 1891 usbd_pipe_handle pipe = reqh->pipe; 1892 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1893 1894 sc->sc_intrreqh = reqh; 1895 1896 return (USBD_IN_PROGRESS); 1897 } 1898 1899 /* Abort a root interrupt request. */ 1900 void 1901 ohci_root_intr_abort(reqh) 1902 usbd_request_handle reqh; 1903 { 1904 /* No need to abort. */ 1905 } 1906 1907 /* Close the root pipe. */ 1908 void 1909 ohci_root_intr_close(pipe) 1910 usbd_pipe_handle pipe; 1911 { 1912 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1913 1914 DPRINTF(("ohci_root_intr_close\n")); 1915 1916 sc->sc_intrreqh = 0; 1917 } 1918 1919 /************************/ 1920 1921 usbd_status 1922 ohci_device_ctrl_transfer(reqh) 1923 usbd_request_handle reqh; 1924 { 1925 usbd_status r; 1926 1927 r = usb_insert_transfer(reqh); 1928 if (r != USBD_NORMAL_COMPLETION) 1929 return (r); 1930 else 1931 return (ohci_device_ctrl_start(reqh)); 1932 } 1933 1934 usbd_status 1935 ohci_device_ctrl_start(reqh) 1936 usbd_request_handle reqh; 1937 { 1938 ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus; 1939 usbd_status r; 1940 1941 #ifdef DIAGNOSTIC 1942 if (!(reqh->rqflags & URQ_REQUEST)) { 1943 /* XXX panic */ 1944 printf("ohci_device_ctrl_transfer: not a request\n"); 1945 return (USBD_INVAL); 1946 } 1947 #endif 1948 1949 r = ohci_device_request(reqh); 1950 if (r != USBD_NORMAL_COMPLETION) 1951 return (r); 1952 1953 if (sc->sc_bus.use_polling) 1954 ohci_waitintr(sc, reqh); 1955 return (USBD_IN_PROGRESS); 1956 } 1957 1958 /* Abort a device control request. */ 1959 void 1960 ohci_device_ctrl_abort(reqh) 1961 usbd_request_handle reqh; 1962 { 1963 DPRINTF(("ohci_device_ctrl_abort: reqh=%p\n", reqh)); 1964 ohci_abort_req(reqh, USBD_CANCELLED); 1965 } 1966 1967 /* Close a device control pipe. */ 1968 void 1969 ohci_device_ctrl_close(pipe) 1970 usbd_pipe_handle pipe; 1971 { 1972 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1973 1974 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 1975 ohci_close_pipe(pipe, sc->sc_ctrl_head); 1976 } 1977 1978 /************************/ 1979 1980 void 1981 ohci_device_clear_toggle(pipe) 1982 usbd_pipe_handle pipe; 1983 { 1984 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1985 1986 opipe->sed->ed.ed_tailp &= LE(~OHCI_TOGGLECARRY); 1987 } 1988 1989 void 1990 ohci_noop(pipe) 1991 usbd_pipe_handle pipe; 1992 { 1993 } 1994 1995 usbd_status 1996 ohci_device_bulk_transfer(reqh) 1997 usbd_request_handle reqh; 1998 { 1999 usbd_status r; 2000 2001 r = usb_insert_transfer(reqh); 2002 if (r != USBD_NORMAL_COMPLETION) 2003 return (r); 2004 else 2005 return (ohci_device_bulk_start(reqh)); 2006 } 2007 2008 usbd_status 2009 ohci_device_bulk_start(reqh) 2010 usbd_request_handle reqh; 2011 { 2012 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 2013 usbd_device_handle dev = opipe->pipe.device; 2014 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2015 int addr = dev->address; 2016 ohci_soft_td_t *xfer, *tail; 2017 ohci_soft_ed_t *sed; 2018 int s, len, isread, endpt; 2019 2020 #ifdef DIAGNOSTIC 2021 if (reqh->rqflags & URQ_REQUEST) { 2022 /* XXX panic */ 2023 printf("ohci_device_bulk_start: a request\n"); 2024 return (USBD_INVAL); 2025 } 2026 #endif 2027 2028 len = reqh->length; 2029 endpt = reqh->pipe->endpoint->edesc->bEndpointAddress; 2030 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2031 sed = opipe->sed; 2032 2033 DPRINTFN(4,("ohci_device_bulk_start: reqh=%p len=%d isread=%d " 2034 "flags=%d endpt=%d\n", reqh, len, isread, reqh->flags, 2035 endpt)); 2036 2037 opipe->u.bulk.isread = isread; 2038 opipe->u.bulk.length = len; 2039 2040 tail = ohci_alloc_std(sc); 2041 if (!tail) 2042 return (USBD_NOMEM); 2043 tail->reqh = 0; 2044 2045 /* Update device address */ 2046 sed->ed.ed_flags = LE( 2047 (LE(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2048 OHCI_ED_SET_FA(addr)); 2049 2050 /* Set up data transaction */ 2051 xfer = opipe->tail; 2052 xfer->td.td_flags = LE( 2053 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 2054 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY | 2055 (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0)); 2056 xfer->td.td_cbp = LE(DMAADDR(&reqh->dmabuf)); 2057 xfer->nexttd = tail; 2058 xfer->td.td_nexttd = LE(tail->physaddr); 2059 xfer->td.td_be = LE(LE(xfer->td.td_cbp) + len - 1); 2060 xfer->len = len; 2061 xfer->reqh = reqh; 2062 xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN; 2063 reqh->hcpriv = xfer; 2064 2065 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2066 "td_cbp=0x%08x td_be=0x%08x\n", 2067 (int)LE(sed->ed.ed_flags), (int)LE(xfer->td.td_flags), 2068 (int)LE(xfer->td.td_cbp), (int)LE(xfer->td.td_be))); 2069 2070 #ifdef USB_DEBUG 2071 if (ohcidebug > 4) { 2072 ohci_dump_ed(sed); 2073 ohci_dump_tds(xfer); 2074 } 2075 #endif 2076 2077 /* Insert ED in schedule */ 2078 s = splusb(); 2079 ohci_hash_add_td(sc, xfer); 2080 sed->ed.ed_tailp = LE(tail->physaddr); 2081 opipe->tail = tail; 2082 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); 2083 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2084 if (reqh->timeout && !sc->sc_bus.use_polling) { 2085 usb_timeout(ohci_timeout, reqh, 2086 MS_TO_TICKS(reqh->timeout), reqh->timo_handle); 2087 } 2088 2089 #ifdef USB_DEBUG 2090 if (ohcidebug > 5) { 2091 delay(5000); 2092 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2093 OREAD4(sc, OHCI_COMMAND_STATUS))); 2094 ohci_dump_ed(sed); 2095 ohci_dump_tds(xfer); 2096 } 2097 #endif 2098 2099 splx(s); 2100 2101 return (USBD_IN_PROGRESS); 2102 } 2103 2104 void 2105 ohci_device_bulk_abort(reqh) 2106 usbd_request_handle reqh; 2107 { 2108 DPRINTF(("ohci_device_bulk_abort: reqh=%p\n", reqh)); 2109 ohci_abort_req(reqh, USBD_CANCELLED); 2110 } 2111 2112 /* 2113 * Close a device bulk pipe. 2114 */ 2115 void 2116 ohci_device_bulk_close(pipe) 2117 usbd_pipe_handle pipe; 2118 { 2119 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2120 2121 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2122 ohci_close_pipe(pipe, sc->sc_bulk_head); 2123 } 2124 2125 /************************/ 2126 2127 usbd_status 2128 ohci_device_intr_transfer(reqh) 2129 usbd_request_handle reqh; 2130 { 2131 usbd_status r; 2132 2133 r = usb_insert_transfer(reqh); 2134 if (r != USBD_NORMAL_COMPLETION) 2135 return (r); 2136 else 2137 return (ohci_device_intr_start(reqh)); 2138 } 2139 2140 usbd_status 2141 ohci_device_intr_start(reqh) 2142 usbd_request_handle reqh; 2143 { 2144 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 2145 usbd_device_handle dev = opipe->pipe.device; 2146 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2147 ohci_soft_ed_t *sed = opipe->sed; 2148 ohci_soft_td_t *xfer, *tail; 2149 int len; 2150 int s; 2151 2152 DPRINTFN(3, ("ohci_device_intr_transfer: reqh=%p len=%d " 2153 "flags=%d priv=%p\n", 2154 reqh, reqh->length, reqh->flags, reqh->priv)); 2155 2156 #ifdef DIAGNOSTIC 2157 if (reqh->rqflags & URQ_REQUEST) 2158 panic("ohci_device_intr_transfer: a request\n"); 2159 #endif 2160 2161 len = reqh->length; 2162 2163 xfer = opipe->tail; 2164 tail = ohci_alloc_std(sc); 2165 if (!tail) 2166 return (USBD_NOMEM); 2167 tail->reqh = 0; 2168 2169 xfer->td.td_flags = LE( 2170 OHCI_TD_IN | OHCI_TD_NOCC | 2171 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2172 if (reqh->flags & USBD_SHORT_XFER_OK) 2173 xfer->td.td_flags |= LE(OHCI_TD_R); 2174 xfer->td.td_cbp = LE(DMAADDR(&reqh->dmabuf)); 2175 xfer->nexttd = tail; 2176 xfer->td.td_nexttd = LE(tail->physaddr); 2177 xfer->td.td_be = LE(LE(xfer->td.td_cbp) + len - 1); 2178 xfer->len = len; 2179 xfer->reqh = reqh; 2180 xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN; 2181 reqh->hcpriv = xfer; 2182 2183 #if USB_DEBUG 2184 if (ohcidebug > 5) { 2185 DPRINTF(("ohci_device_intr_transfer:\n")); 2186 ohci_dump_ed(sed); 2187 ohci_dump_tds(xfer); 2188 } 2189 #endif 2190 2191 /* Insert ED in schedule */ 2192 s = splusb(); 2193 ohci_hash_add_td(sc, xfer); 2194 sed->ed.ed_tailp = LE(tail->physaddr); 2195 opipe->tail = tail; 2196 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); 2197 2198 #ifdef USB_DEBUG 2199 if (ohcidebug > 5) { 2200 delay(5000); 2201 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2202 OREAD4(sc, OHCI_COMMAND_STATUS))); 2203 ohci_dump_ed(sed); 2204 ohci_dump_tds(xfer); 2205 } 2206 #endif 2207 splx(s); 2208 2209 return (USBD_IN_PROGRESS); 2210 } 2211 2212 /* Abort a device control request. */ 2213 void 2214 ohci_device_intr_abort(reqh) 2215 usbd_request_handle reqh; 2216 { 2217 if (reqh->pipe->intrreqh == reqh) { 2218 DPRINTF(("ohci_device_intr_abort: remove\n")); 2219 reqh->pipe->intrreqh = 0; 2220 } 2221 ohci_abort_req(reqh, USBD_CANCELLED); 2222 } 2223 2224 /* Close a device interrupt pipe. */ 2225 void 2226 ohci_device_intr_close(pipe) 2227 usbd_pipe_handle pipe; 2228 { 2229 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2230 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2231 int nslots = opipe->u.intr.nslots; 2232 int pos = opipe->u.intr.pos; 2233 int j; 2234 ohci_soft_ed_t *p, *sed = opipe->sed; 2235 int s; 2236 2237 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2238 pipe, nslots, pos)); 2239 s = splusb(); 2240 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 2241 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 2242 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) 2243 usb_delay_ms(&sc->sc_bus, 2); 2244 2245 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2246 ; 2247 if (!p) 2248 panic("ohci_device_intr_close: ED not found\n"); 2249 p->next = sed->next; 2250 p->ed.ed_nexted = sed->ed.ed_nexted; 2251 splx(s); 2252 2253 for (j = 0; j < nslots; j++) 2254 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2255 2256 ohci_free_std(sc, opipe->tail); 2257 ohci_free_sed(sc, opipe->sed); 2258 } 2259 2260 usbd_status 2261 ohci_device_setintr(sc, opipe, ival) 2262 ohci_softc_t *sc; 2263 struct ohci_pipe *opipe; 2264 int ival; 2265 { 2266 int i, j, s, best; 2267 u_int npoll, slow, shigh, nslots; 2268 u_int bestbw, bw; 2269 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2270 2271 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2272 if (ival == 0) { 2273 printf("ohci_setintr: 0 interval\n"); 2274 return (USBD_INVAL); 2275 } 2276 2277 npoll = OHCI_NO_INTRS; 2278 while (npoll > ival) 2279 npoll /= 2; 2280 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2281 2282 /* 2283 * We now know which level in the tree the ED must go into. 2284 * Figure out which slot has most bandwidth left over. 2285 * Slots to examine: 2286 * npoll 2287 * 1 0 2288 * 2 1 2 2289 * 4 3 4 5 6 2290 * 8 7 8 9 10 11 12 13 14 2291 * N (N-1) .. (N-1+N-1) 2292 */ 2293 slow = npoll-1; 2294 shigh = slow + npoll; 2295 nslots = OHCI_NO_INTRS / npoll; 2296 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2297 bw = 0; 2298 for (j = 0; j < nslots; j++) 2299 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 2300 if (bw < bestbw) { 2301 best = i; 2302 bestbw = bw; 2303 } 2304 } 2305 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2306 best, slow, shigh, bestbw)); 2307 2308 s = splusb(); 2309 hsed = sc->sc_eds[best]; 2310 sed->next = hsed->next; 2311 sed->ed.ed_nexted = hsed->ed.ed_nexted; 2312 hsed->next = sed; 2313 hsed->ed.ed_nexted = LE(sed->physaddr); 2314 splx(s); 2315 2316 for (j = 0; j < nslots; j++) 2317 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 2318 opipe->u.intr.nslots = nslots; 2319 opipe->u.intr.pos = best; 2320 2321 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 2322 return (USBD_NORMAL_COMPLETION); 2323 } 2324 2325
Indexes created Wed Sep 24 15:09:51 GMT 2025