ohci.c revision 1.47
1 /* $NetBSD: ohci.c,v 1.47 1999/09/15 10:25:31 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (augustss (at) carlstedt.se) at 9 * Carlstedt Research & Technology. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * USB Open Host Controller driver. 42 * 43 * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe 44 * USB spec: http://www.usb.org/developers/data/usb11.pdf 45 */ 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/kernel.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/device.h> 53 #elif defined(__FreeBSD__) 54 #include <sys/module.h> 55 #include <sys/bus.h> 56 #endif 57 #include <sys/proc.h> 58 #include <sys/queue.h> 59 #include <sys/select.h> 60 61 #include <machine/bus.h> 62 #include <machine/endian.h> 63 64 #include <dev/usb/usb.h> 65 #include <dev/usb/usbdi.h> 66 #include <dev/usb/usbdivar.h> 67 #include <dev/usb/usb_mem.h> 68 #include <dev/usb/usb_quirks.h> 69 70 #include <dev/usb/ohcireg.h> 71 #include <dev/usb/ohcivar.h> 72 73 #if defined(__FreeBSD__) 74 #include <machine/clock.h> 75 76 #define delay(d) DELAY(d) 77 78 #endif 79 80 #if defined(__OpenBSD__) 81 struct cfdriver ohci_cd = { 82 NULL, "ohci", DV_DULL 83 }; 84 #endif 85 86 /* 87 * The OHCI controller is little endian, so on big endian machines 88 * the data strored in memory needs to be swapped. 89 */ 90 #if BYTE_ORDER == BIG_ENDIAN 91 #define LE(x) (bswap32(x)) 92 #else 93 #define LE(x) (x) 94 #endif 95 96 struct ohci_pipe; 97 98 ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *)); 99 void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *)); 100 101 ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *)); 102 void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *)); 103 104 void ohci_power __P((int, void *)); 105 usbd_status ohci_open __P((usbd_pipe_handle)); 106 void ohci_poll __P((struct usbd_bus *)); 107 void ohci_waitintr __P((ohci_softc_t *, usbd_request_handle)); 108 void ohci_rhsc __P((ohci_softc_t *, usbd_request_handle)); 109 void ohci_process_done __P((ohci_softc_t *, ohci_physaddr_t)); 110 111 usbd_status ohci_device_request __P((usbd_request_handle reqh)); 112 void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 113 void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 114 void ohci_hash_add_td __P((ohci_softc_t *, ohci_soft_td_t *)); 115 void ohci_hash_rem_td __P((ohci_softc_t *, ohci_soft_td_t *)); 116 ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, ohci_physaddr_t)); 117 118 usbd_status ohci_allocm __P((struct usbd_bus *, usb_dma_t *, u_int32_t)); 119 void ohci_freem __P((struct usbd_bus *, usb_dma_t *)); 120 121 usbd_status ohci_root_ctrl_transfer __P((usbd_request_handle)); 122 usbd_status ohci_root_ctrl_start __P((usbd_request_handle)); 123 void ohci_root_ctrl_abort __P((usbd_request_handle)); 124 void ohci_root_ctrl_close __P((usbd_pipe_handle)); 125 126 usbd_status ohci_root_intr_transfer __P((usbd_request_handle)); 127 usbd_status ohci_root_intr_start __P((usbd_request_handle)); 128 void ohci_root_intr_abort __P((usbd_request_handle)); 129 void ohci_root_intr_close __P((usbd_pipe_handle)); 130 void ohci_root_intr_done __P((usbd_request_handle)); 131 132 usbd_status ohci_device_ctrl_transfer __P((usbd_request_handle)); 133 usbd_status ohci_device_ctrl_start __P((usbd_request_handle)); 134 void ohci_device_ctrl_abort __P((usbd_request_handle)); 135 void ohci_device_ctrl_close __P((usbd_pipe_handle)); 136 void ohci_device_ctrl_done __P((usbd_request_handle)); 137 138 usbd_status ohci_device_bulk_transfer __P((usbd_request_handle)); 139 usbd_status ohci_device_bulk_start __P((usbd_request_handle)); 140 void ohci_device_bulk_abort __P((usbd_request_handle)); 141 void ohci_device_bulk_close __P((usbd_pipe_handle)); 142 void ohci_device_bulk_done __P((usbd_request_handle)); 143 144 usbd_status ohci_device_intr_transfer __P((usbd_request_handle)); 145 usbd_status ohci_device_intr_start __P((usbd_request_handle)); 146 void ohci_device_intr_abort __P((usbd_request_handle)); 147 void ohci_device_intr_close __P((usbd_pipe_handle)); 148 void ohci_device_intr_done __P((usbd_request_handle)); 149 150 usbd_status ohci_device_isoc_transfer __P((usbd_request_handle)); 151 usbd_status ohci_device_isoc_start __P((usbd_request_handle)); 152 void ohci_device_isoc_abort __P((usbd_request_handle)); 153 void ohci_device_isoc_close __P((usbd_pipe_handle)); 154 void ohci_device_isoc_done __P((usbd_request_handle)); 155 156 usbd_status ohci_device_setintr __P((ohci_softc_t *sc, 157 struct ohci_pipe *pipe, int ival)); 158 159 int ohci_str __P((usb_string_descriptor_t *, int, char *)); 160 161 void ohci_timeout __P((void *)); 162 void ohci_rhsc_able __P((ohci_softc_t *, int)); 163 164 void ohci_close_pipe __P((usbd_pipe_handle pipe, 165 ohci_soft_ed_t *head)); 166 void ohci_abort_req __P((usbd_request_handle reqh, 167 usbd_status status)); 168 void ohci_abort_req_end __P((void *)); 169 170 void ohci_device_clear_toggle __P((usbd_pipe_handle pipe)); 171 void ohci_noop __P((usbd_pipe_handle pipe)); 172 173 #ifdef USB_DEBUG 174 ohci_softc_t *thesc; 175 void ohci_dumpregs __P((ohci_softc_t *)); 176 void ohci_dump_tds __P((ohci_soft_td_t *)); 177 void ohci_dump_td __P((ohci_soft_td_t *)); 178 void ohci_dump_ed __P((ohci_soft_ed_t *)); 179 #endif 180 181 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 182 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 183 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 184 185 /* Reverse the bits in a value 0 .. 31 */ 186 static u_int8_t revbits[OHCI_NO_INTRS] = 187 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 188 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 189 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 190 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 191 192 struct ohci_pipe { 193 struct usbd_pipe pipe; 194 ohci_soft_ed_t *sed; 195 ohci_soft_td_t *tail; 196 /* Info needed for different pipe kinds. */ 197 union { 198 /* Control pipe */ 199 struct { 200 usb_dma_t reqdma; 201 u_int length; 202 ohci_soft_td_t *setup, *xfer, *stat; 203 } ctl; 204 /* Interrupt pipe */ 205 struct { 206 int nslots; 207 int pos; 208 } intr; 209 /* Bulk pipe */ 210 struct { 211 u_int length; 212 int isread; 213 } bulk; 214 /* Iso pipe */ 215 struct iso { 216 int xxxxx; 217 } iso; 218 } u; 219 }; 220 221 #define OHCI_INTR_ENDPT 1 222 223 struct usbd_bus_methods ohci_bus_methods = { 224 ohci_open, 225 ohci_poll, 226 ohci_allocm, 227 ohci_freem, 228 }; 229 230 struct usbd_pipe_methods ohci_root_ctrl_methods = { 231 ohci_root_ctrl_transfer, 232 ohci_root_ctrl_start, 233 ohci_root_ctrl_abort, 234 ohci_root_ctrl_close, 235 ohci_noop, 236 0, 237 }; 238 239 struct usbd_pipe_methods ohci_root_intr_methods = { 240 ohci_root_intr_transfer, 241 ohci_root_intr_start, 242 ohci_root_intr_abort, 243 ohci_root_intr_close, 244 ohci_noop, 245 ohci_root_intr_done, 246 }; 247 248 struct usbd_pipe_methods ohci_device_ctrl_methods = { 249 ohci_device_ctrl_transfer, 250 ohci_device_ctrl_start, 251 ohci_device_ctrl_abort, 252 ohci_device_ctrl_close, 253 ohci_noop, 254 ohci_device_ctrl_done, 255 }; 256 257 struct usbd_pipe_methods ohci_device_intr_methods = { 258 ohci_device_intr_transfer, 259 ohci_device_intr_start, 260 ohci_device_intr_abort, 261 ohci_device_intr_close, 262 ohci_device_clear_toggle, 263 ohci_device_intr_done, 264 }; 265 266 struct usbd_pipe_methods ohci_device_bulk_methods = { 267 ohci_device_bulk_transfer, 268 ohci_device_bulk_start, 269 ohci_device_bulk_abort, 270 ohci_device_bulk_close, 271 ohci_device_clear_toggle, 272 ohci_device_bulk_done, 273 }; 274 275 #if 0 276 struct usbd_pipe_methods ohci_device_isoc_methods = { 277 ohci_device_isoc_transfer, 278 ohci_device_isoc_start, 279 ohci_device_isoc_abort, 280 ohci_device_isoc_close, 281 ohci_noop, 282 ohci_device_isoc_done, 283 }; 284 #endif 285 286 int 287 ohci_activate(self, act) 288 device_ptr_t self; 289 enum devact act; 290 { 291 /*struct ohci_softc *sc = (struct ohci_softc *)self;*/ 292 int rv = 0; 293 294 switch (act) { 295 case DVACT_ACTIVATE: 296 return (EOPNOTSUPP); 297 break; 298 299 case DVACT_DEACTIVATE: 300 break; 301 } 302 return (rv); 303 } 304 305 int 306 ohci_detach(self, flags) 307 device_ptr_t self; 308 int flags; 309 { 310 struct ohci_softc *sc = (struct ohci_softc *)self; 311 int rv = 0; 312 313 if (sc->sc_child != NULL) 314 rv = config_detach(sc->sc_child, flags); 315 316 if (rv != 0) 317 return (rv); 318 319 powerhook_disestablish(sc->sc_powerhook); 320 /* free data structures XXX */ 321 322 return (rv); 323 } 324 325 ohci_soft_ed_t * 326 ohci_alloc_sed(sc) 327 ohci_softc_t *sc; 328 { 329 ohci_soft_ed_t *sed; 330 usbd_status r; 331 int i, offs; 332 usb_dma_t dma; 333 334 if (!sc->sc_freeeds) { 335 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 336 r = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 337 OHCI_ED_ALIGN, &dma); 338 if (r != USBD_NORMAL_COMPLETION) 339 return (0); 340 for(i = 0; i < OHCI_SED_CHUNK; i++) { 341 offs = i * OHCI_SED_SIZE; 342 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 343 sed->physaddr = DMAADDR(&dma) + offs; 344 sed->next = sc->sc_freeeds; 345 sc->sc_freeeds = sed; 346 } 347 } 348 sed = sc->sc_freeeds; 349 sc->sc_freeeds = sed->next; 350 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 351 sed->next = 0; 352 return (sed); 353 } 354 355 void 356 ohci_free_sed(sc, sed) 357 ohci_softc_t *sc; 358 ohci_soft_ed_t *sed; 359 { 360 sed->next = sc->sc_freeeds; 361 sc->sc_freeeds = sed; 362 } 363 364 ohci_soft_td_t * 365 ohci_alloc_std(sc) 366 ohci_softc_t *sc; 367 { 368 ohci_soft_td_t *std; 369 usbd_status r; 370 int i, offs; 371 usb_dma_t dma; 372 373 if (!sc->sc_freetds) { 374 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 375 r = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 376 OHCI_TD_ALIGN, &dma); 377 if (r != USBD_NORMAL_COMPLETION) 378 return (0); 379 for(i = 0; i < OHCI_STD_CHUNK; i++) { 380 offs = i * OHCI_STD_SIZE; 381 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 382 std->physaddr = DMAADDR(&dma) + offs; 383 std->nexttd = sc->sc_freetds; 384 sc->sc_freetds = std; 385 } 386 } 387 std = sc->sc_freetds; 388 sc->sc_freetds = std->nexttd; 389 memset(&std->td, 0, sizeof(ohci_td_t)); 390 std->nexttd = 0; 391 return (std); 392 } 393 394 void 395 ohci_free_std(sc, std) 396 ohci_softc_t *sc; 397 ohci_soft_td_t *std; 398 { 399 std->nexttd = sc->sc_freetds; 400 sc->sc_freetds = std; 401 } 402 403 usbd_status 404 ohci_init(sc) 405 ohci_softc_t *sc; 406 { 407 ohci_soft_ed_t *sed, *psed; 408 usbd_status r; 409 int rev; 410 int i; 411 u_int32_t s, ctl, ival, hcr, fm, per; 412 413 DPRINTF(("ohci_init: start\n")); 414 rev = OREAD4(sc, OHCI_REVISION); 415 #if defined(__OpenBSD__) 416 printf(", OHCI version %d.%d%s\n", 417 #else 418 printf("%s: OHCI version %d.%d%s\n", USBDEVNAME(sc->sc_bus.bdev), 419 #endif 420 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 421 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 422 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 423 printf("%s: unsupported OHCI revision\n", 424 USBDEVNAME(sc->sc_bus.bdev)); 425 return (USBD_INVAL); 426 } 427 428 for (i = 0; i < OHCI_HASH_SIZE; i++) 429 LIST_INIT(&sc->sc_hash_tds[i]); 430 431 /* Allocate the HCCA area. */ 432 r = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 433 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 434 if (r != USBD_NORMAL_COMPLETION) 435 return (r); 436 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 437 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 438 439 sc->sc_eintrs = OHCI_NORMAL_INTRS; 440 441 sc->sc_ctrl_head = ohci_alloc_sed(sc); 442 if (!sc->sc_ctrl_head) { 443 r = USBD_NOMEM; 444 goto bad1; 445 } 446 sc->sc_ctrl_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 447 448 sc->sc_bulk_head = ohci_alloc_sed(sc); 449 if (!sc->sc_bulk_head) { 450 r = USBD_NOMEM; 451 goto bad2; 452 } 453 sc->sc_bulk_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 454 455 /* Allocate all the dummy EDs that make up the interrupt tree. */ 456 for (i = 0; i < OHCI_NO_EDS; i++) { 457 sed = ohci_alloc_sed(sc); 458 if (!sed) { 459 while (--i >= 0) 460 ohci_free_sed(sc, sc->sc_eds[i]); 461 r = USBD_NOMEM; 462 goto bad3; 463 } 464 /* All ED fields are set to 0. */ 465 sc->sc_eds[i] = sed; 466 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 467 if (i != 0) { 468 psed = sc->sc_eds[(i-1) / 2]; 469 sed->next = psed; 470 sed->ed.ed_nexted = LE(psed->physaddr); 471 } 472 } 473 /* 474 * Fill HCCA interrupt table. The bit reversal is to get 475 * the tree set up properly to spread the interrupts. 476 */ 477 for (i = 0; i < OHCI_NO_INTRS; i++) 478 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 479 LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 480 481 /* Determine in what context we are running. */ 482 ctl = OREAD4(sc, OHCI_CONTROL); 483 if (ctl & OHCI_IR) { 484 /* SMM active, request change */ 485 DPRINTF(("ohci_init: SMM active, request owner change\n")); 486 s = OREAD4(sc, OHCI_COMMAND_STATUS); 487 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 488 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 489 delay(1000); 490 ctl = OREAD4(sc, OHCI_CONTROL); 491 } 492 if ((ctl & OHCI_IR) == 0) { 493 printf("%s: SMM does not respond, resetting\n", 494 USBDEVNAME(sc->sc_bus.bdev)); 495 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 496 goto reset; 497 } 498 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 499 /* BIOS started controller. */ 500 DPRINTF(("ohci_init: BIOS active\n")); 501 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 502 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 503 delay(USB_RESUME_DELAY * 1000); 504 } 505 } else { 506 DPRINTF(("ohci_init: cold started\n")); 507 reset: 508 /* Controller was cold started. */ 509 delay(USB_BUS_RESET_DELAY * 1000); 510 } 511 512 /* 513 * This reset should not be necessary according to the OHCI spec, but 514 * without it some controllers do not start. 515 */ 516 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 517 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 518 delay(USB_BUS_RESET_DELAY * 1000); 519 520 /* We now own the host controller and the bus has been reset. */ 521 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 522 523 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 524 /* Nominal time for a reset is 10 us. */ 525 for (i = 0; i < 10; i++) { 526 delay(10); 527 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 528 if (!hcr) 529 break; 530 } 531 if (hcr) { 532 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 533 r = USBD_IOERROR; 534 goto bad3; 535 } 536 #ifdef USB_DEBUG 537 thesc = sc; 538 if (ohcidebug > 15) 539 ohci_dumpregs(sc); 540 #endif 541 542 /* The controller is now in suspend state, we have 2ms to finish. */ 543 544 /* Set up HC registers. */ 545 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 546 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 547 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 548 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 549 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 550 ctl = OREAD4(sc, OHCI_CONTROL); 551 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 552 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 553 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 554 /* And finally start it! */ 555 OWRITE4(sc, OHCI_CONTROL, ctl); 556 557 /* 558 * The controller is now OPERATIONAL. Set a some final 559 * registers that should be set earlier, but that the 560 * controller ignores when in the SUSPEND state. 561 */ 562 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 563 fm |= OHCI_FSMPS(ival) | ival; 564 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 565 per = OHCI_PERIODIC(ival); /* 90% periodic */ 566 OWRITE4(sc, OHCI_PERIODIC_START, per); 567 568 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 569 570 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 571 572 #ifdef USB_DEBUG 573 if (ohcidebug > 5) 574 ohci_dumpregs(sc); 575 #endif 576 577 /* Set up the bus struct. */ 578 sc->sc_bus.methods = &ohci_bus_methods; 579 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 580 581 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 582 583 return (USBD_NORMAL_COMPLETION); 584 585 bad3: 586 ohci_free_sed(sc, sc->sc_ctrl_head); 587 bad2: 588 ohci_free_sed(sc, sc->sc_bulk_head); 589 bad1: 590 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 591 return (r); 592 } 593 594 usbd_status 595 ohci_allocm(bus, dma, size) 596 struct usbd_bus *bus; 597 usb_dma_t *dma; 598 u_int32_t size; 599 { 600 struct ohci_softc *sc = (struct ohci_softc *)bus; 601 602 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 603 } 604 605 void 606 ohci_freem(bus, dma) 607 struct usbd_bus *bus; 608 usb_dma_t *dma; 609 { 610 struct ohci_softc *sc = (struct ohci_softc *)bus; 611 612 usb_freemem(&sc->sc_bus, dma); 613 } 614 615 #if !defined(__OpenBSD__) 616 void 617 ohci_power(why, v) 618 int why; 619 void *v; 620 { 621 #ifdef USB_DEBUG 622 ohci_softc_t *sc = v; 623 624 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 625 /* XXX should suspend/resume */ 626 ohci_dumpregs(sc); 627 #endif 628 } 629 #endif /* !defined(__OpenBSD__) */ 630 631 #ifdef USB_DEBUG 632 void ohcidump(void); 633 void ohcidump(void) { ohci_dumpregs(thesc); } 634 635 void 636 ohci_dumpregs(sc) 637 ohci_softc_t *sc; 638 { 639 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 640 OREAD4(sc, OHCI_REVISION), 641 OREAD4(sc, OHCI_CONTROL), 642 OREAD4(sc, OHCI_COMMAND_STATUS))); 643 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 644 OREAD4(sc, OHCI_INTERRUPT_STATUS), 645 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 646 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 647 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 648 OREAD4(sc, OHCI_HCCA), 649 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 650 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 651 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 652 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 653 OREAD4(sc, OHCI_BULK_HEAD_ED), 654 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 655 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 656 OREAD4(sc, OHCI_DONE_HEAD), 657 OREAD4(sc, OHCI_FM_INTERVAL), 658 OREAD4(sc, OHCI_FM_REMAINING))); 659 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 660 OREAD4(sc, OHCI_FM_NUMBER), 661 OREAD4(sc, OHCI_PERIODIC_START), 662 OREAD4(sc, OHCI_LS_THRESHOLD))); 663 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 664 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 665 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 666 OREAD4(sc, OHCI_RH_STATUS))); 667 DPRINTF((" port1=0x%08x port2=0x%08x\n", 668 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 669 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 670 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 671 LE(sc->sc_hcca->hcca_frame_number), 672 LE(sc->sc_hcca->hcca_done_head))); 673 } 674 #endif 675 676 int 677 ohci_intr(p) 678 void *p; 679 { 680 ohci_softc_t *sc = p; 681 u_int32_t intrs, eintrs; 682 ohci_physaddr_t done; 683 684 /* In case the interrupt occurs before initialization has completed. */ 685 if (sc == NULL || sc->sc_hcca == NULL) { 686 #ifdef DIAGNOSTIC 687 printf("ohci_intr: sc->sc_hcca == NULL\n"); 688 #endif 689 return (0); 690 } 691 692 intrs = 0; 693 done = LE(sc->sc_hcca->hcca_done_head); 694 if (done != 0) { 695 sc->sc_hcca->hcca_done_head = 0; 696 if (done & ~OHCI_DONE_INTRS) 697 intrs = OHCI_WDH; 698 if (done & OHCI_DONE_INTRS) 699 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 700 } else 701 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 702 if (!intrs) 703 return (0); 704 intrs &= ~OHCI_MIE; 705 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 706 eintrs = intrs & sc->sc_eintrs; 707 if (!eintrs) 708 return (0); 709 710 sc->sc_bus.intr_context++; 711 sc->sc_bus.no_intrs++; 712 DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n", 713 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 714 (u_int)eintrs)); 715 716 if (eintrs & OHCI_SO) { 717 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev)); 718 /* XXX do what */ 719 intrs &= ~OHCI_SO; 720 } 721 if (eintrs & OHCI_WDH) { 722 ohci_process_done(sc, done &~ OHCI_DONE_INTRS); 723 intrs &= ~OHCI_WDH; 724 } 725 if (eintrs & OHCI_RD) { 726 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 727 /* XXX process resume detect */ 728 } 729 if (eintrs & OHCI_UE) { 730 printf("%s: unrecoverable error, controller halted\n", 731 USBDEVNAME(sc->sc_bus.bdev)); 732 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 733 /* XXX what else */ 734 } 735 if (eintrs & OHCI_RHSC) { 736 ohci_rhsc(sc, sc->sc_intrreqh); 737 intrs &= ~OHCI_RHSC; 738 739 /* 740 * Disable RHSC interrupt for now, because it will be 741 * on until the port has been reset. 742 */ 743 ohci_rhsc_able(sc, 0); 744 } 745 746 sc->sc_bus.intr_context--; 747 748 /* Block unprocessed interrupts. XXX */ 749 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 750 sc->sc_eintrs &= ~intrs; 751 752 return (1); 753 } 754 755 void 756 ohci_rhsc_able(sc, on) 757 ohci_softc_t *sc; 758 int on; 759 { 760 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 761 if (on) { 762 sc->sc_eintrs |= OHCI_RHSC; 763 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 764 } else { 765 sc->sc_eintrs &= ~OHCI_RHSC; 766 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 767 } 768 } 769 770 #ifdef USB_DEBUG 771 char *ohci_cc_strs[] = { 772 "NO_ERROR", 773 "CRC", 774 "BIT_STUFFING", 775 "DATA_TOGGLE_MISMATCH", 776 "STALL", 777 "DEVICE_NOT_RESPONDING", 778 "PID_CHECK_FAILURE", 779 "UNEXPECTED_PID", 780 "DATA_OVERRUN", 781 "DATA_UNDERRUN", 782 "BUFFER_OVERRUN", 783 "BUFFER_UNDERRUN", 784 "NOT_ACCESSED", 785 }; 786 #endif 787 788 void 789 ohci_process_done(sc, done) 790 ohci_softc_t *sc; 791 ohci_physaddr_t done; 792 { 793 ohci_soft_td_t *std, *sdone; 794 usbd_request_handle reqh; 795 int len, cc; 796 797 DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done)); 798 799 /* Reverse the done list. */ 800 for (sdone = 0; done; done = LE(std->td.td_nexttd)) { 801 std = ohci_hash_find_td(sc, done); 802 std->dnext = sdone; 803 sdone = std; 804 } 805 806 #ifdef USB_DEBUG 807 if (ohcidebug > 10) { 808 DPRINTF(("ohci_process_done: TD done:\n")); 809 ohci_dump_tds(sdone); 810 } 811 #endif 812 813 for (std = sdone; std; std = std->dnext) { 814 reqh = std->reqh; 815 DPRINTFN(10, ("ohci_process_done: std=%p reqh=%p hcpriv=%p\n", 816 std, reqh, reqh->hcpriv)); 817 cc = OHCI_TD_GET_CC(LE(std->td.td_flags)); 818 usb_untimeout(ohci_timeout, reqh, reqh->timo_handle); 819 if (reqh->status == USBD_CANCELLED || 820 reqh->status == USBD_TIMEOUT) { 821 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 822 reqh)); 823 /* Handled by abort routine. */ 824 continue; 825 } else if (cc == OHCI_CC_NO_ERROR) { 826 len = std->len; 827 if (std->td.td_cbp != 0) 828 len -= LE(std->td.td_be) - 829 LE(std->td.td_cbp) + 1; 830 if (std->flags & OHCI_SET_LEN) 831 reqh->actlen = len; 832 if (std->flags & OHCI_CALL_DONE) { 833 reqh->status = USBD_NORMAL_COMPLETION; 834 usb_transfer_complete(reqh); 835 } 836 } else { 837 ohci_soft_td_t *p, *n; 838 struct ohci_pipe *opipe = 839 (struct ohci_pipe *)reqh->pipe; 840 DPRINTFN(-1,("ohci_process_done: error cc=%d (%s)\n", 841 OHCI_TD_GET_CC(LE(std->td.td_flags)), 842 ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td.td_flags))])); 843 /* 844 * Endpoint is halted. First unlink all the TDs 845 * belonging to the failed transfer, and then restart 846 * the endpoint. 847 */ 848 for (p = std->nexttd; p->reqh == reqh; p = n) { 849 n = p->nexttd; 850 ohci_hash_rem_td(sc, p); 851 ohci_free_std(sc, p); 852 } 853 /* clear halt */ 854 opipe->sed->ed.ed_headp = LE(p->physaddr); 855 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 856 857 if (cc == OHCI_CC_STALL) 858 reqh->status = USBD_STALLED; 859 else 860 reqh->status = USBD_IOERROR; 861 usb_transfer_complete(reqh); 862 } 863 ohci_hash_rem_td(sc, std); 864 ohci_free_std(sc, std); 865 } 866 } 867 868 void 869 ohci_device_ctrl_done(reqh) 870 usbd_request_handle reqh; 871 { 872 DPRINTFN(10,("ohci_ctrl_done: reqh=%p\n", reqh)); 873 874 #ifdef DIAGNOSTIC 875 if (!(reqh->rqflags & URQ_REQUEST)) { 876 panic("ohci_ctrl_done: not a request\n"); 877 } 878 #endif 879 reqh->hcpriv = 0; 880 } 881 882 void 883 ohci_device_intr_done(reqh) 884 usbd_request_handle reqh; 885 { 886 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 887 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 888 ohci_soft_ed_t *sed = opipe->sed; 889 ohci_soft_td_t *xfer, *tail; 890 891 892 DPRINTFN(10,("ohci_intr_done: reqh=%p, actlen=%d\n", 893 reqh, reqh->actlen)); 894 895 reqh->hcpriv = 0; 896 897 if (reqh->pipe->repeat) { 898 xfer = opipe->tail; 899 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 900 if (!tail) { 901 reqh->status = USBD_NOMEM; 902 return; 903 } 904 tail->reqh = 0; 905 906 xfer->td.td_flags = LE( 907 OHCI_TD_IN | OHCI_TD_NOCC | 908 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 909 if (reqh->flags & USBD_SHORT_XFER_OK) 910 xfer->td.td_flags |= LE(OHCI_TD_R); 911 xfer->td.td_cbp = LE(DMAADDR(&reqh->dmabuf)); 912 xfer->nexttd = tail; 913 xfer->td.td_nexttd = LE(tail->physaddr); 914 xfer->td.td_be = LE(LE(xfer->td.td_cbp) + reqh->length - 1); 915 xfer->len = reqh->length; 916 xfer->reqh = reqh; 917 xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN; 918 reqh->hcpriv = xfer; 919 920 ohci_hash_add_td(sc, xfer); 921 sed->ed.ed_tailp = LE(tail->physaddr); 922 opipe->tail = tail; 923 } 924 } 925 926 void 927 ohci_device_bulk_done(reqh) 928 usbd_request_handle reqh; 929 { 930 DPRINTFN(10,("ohci_bulk_done: reqh=%p, actlen=%d\n", 931 reqh, reqh->actlen)); 932 933 reqh->hcpriv = 0; 934 } 935 936 void 937 ohci_rhsc(sc, reqh) 938 ohci_softc_t *sc; 939 usbd_request_handle reqh; 940 { 941 usbd_pipe_handle pipe; 942 struct ohci_pipe *opipe; 943 u_char *p; 944 int i, m; 945 int hstatus; 946 947 hstatus = OREAD4(sc, OHCI_RH_STATUS); 948 DPRINTF(("ohci_rhsc: sc=%p reqh=%p hstatus=0x%08x\n", 949 sc, reqh, hstatus)); 950 951 if (reqh == 0) { 952 /* Just ignore the change. */ 953 return; 954 } 955 956 pipe = reqh->pipe; 957 opipe = (struct ohci_pipe *)pipe; 958 959 p = KERNADDR(&reqh->dmabuf); 960 m = min(sc->sc_noport, reqh->length * 8 - 1); 961 memset(p, 0, reqh->length); 962 for (i = 1; i <= m; i++) { 963 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 964 p[i/8] |= 1 << (i%8); 965 } 966 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 967 reqh->actlen = reqh->length; 968 reqh->status = USBD_NORMAL_COMPLETION; 969 970 usb_transfer_complete(reqh); 971 } 972 973 void 974 ohci_root_intr_done(reqh) 975 usbd_request_handle reqh; 976 { 977 reqh->hcpriv = 0; 978 } 979 980 /* 981 * Wait here until controller claims to have an interrupt. 982 * Then call ohci_intr and return. Use timeout to avoid waiting 983 * too long. 984 */ 985 void 986 ohci_waitintr(sc, reqh) 987 ohci_softc_t *sc; 988 usbd_request_handle reqh; 989 { 990 int timo = reqh->timeout; 991 int usecs; 992 u_int32_t intrs; 993 994 reqh->status = USBD_IN_PROGRESS; 995 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 996 usb_delay_ms(&sc->sc_bus, 1); 997 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 998 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 999 #ifdef USB_DEBUG 1000 if (ohcidebug > 15) 1001 ohci_dumpregs(sc); 1002 #endif 1003 if (intrs) { 1004 ohci_intr(sc); 1005 if (reqh->status != USBD_IN_PROGRESS) 1006 return; 1007 } 1008 } 1009 1010 /* Timeout */ 1011 DPRINTF(("ohci_waitintr: timeout\n")); 1012 reqh->status = USBD_TIMEOUT; 1013 usb_transfer_complete(reqh); 1014 /* XXX should free TD */ 1015 } 1016 1017 void 1018 ohci_poll(bus) 1019 struct usbd_bus *bus; 1020 { 1021 ohci_softc_t *sc = (ohci_softc_t *)bus; 1022 1023 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1024 ohci_intr(sc); 1025 } 1026 1027 usbd_status 1028 ohci_device_request(reqh) 1029 usbd_request_handle reqh; 1030 { 1031 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 1032 usb_device_request_t *req = &reqh->request; 1033 usbd_device_handle dev = opipe->pipe.device; 1034 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1035 int addr = dev->address; 1036 ohci_soft_td_t *setup, *xfer = 0, *stat, *next, *tail; 1037 ohci_soft_ed_t *sed; 1038 int isread; 1039 int len; 1040 usbd_status r; 1041 int s; 1042 1043 isread = req->bmRequestType & UT_READ; 1044 len = UGETW(req->wLength); 1045 1046 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1047 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1048 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1049 UGETW(req->wIndex), len, addr, 1050 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1051 1052 setup = opipe->tail; 1053 stat = ohci_alloc_std(sc); 1054 if (!stat) { 1055 r = USBD_NOMEM; 1056 goto bad1; 1057 } 1058 tail = ohci_alloc_std(sc); 1059 if (!tail) { 1060 r = USBD_NOMEM; 1061 goto bad2; 1062 } 1063 tail->reqh = 0; 1064 1065 sed = opipe->sed; 1066 opipe->u.ctl.length = len; 1067 1068 /* Update device address and length since they may have changed. */ 1069 /* XXX This only needs to be done once, but it's too early in open. */ 1070 sed->ed.ed_flags = LE( 1071 (LE(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1072 OHCI_ED_SET_FA(addr) | 1073 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1074 1075 /* Set up data transaction */ 1076 if (len != 0) { 1077 xfer = ohci_alloc_std(sc); 1078 if (!xfer) { 1079 r = USBD_NOMEM; 1080 goto bad3; 1081 } 1082 xfer->td.td_flags = LE( 1083 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 1084 OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR | 1085 (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0)); 1086 xfer->td.td_cbp = LE(DMAADDR(&reqh->dmabuf)); 1087 xfer->nexttd = stat; 1088 xfer->td.td_nexttd = LE(stat->physaddr); 1089 xfer->td.td_be = LE(LE(xfer->td.td_cbp) + len - 1); 1090 xfer->len = len; 1091 xfer->reqh = reqh; 1092 xfer->flags = OHCI_SET_LEN; 1093 1094 next = xfer; 1095 stat->flags = OHCI_CALL_DONE; 1096 } else { 1097 next = stat; 1098 stat->flags = OHCI_CALL_DONE | OHCI_SET_LEN; 1099 } 1100 1101 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1102 1103 setup->td.td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC | 1104 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1105 setup->td.td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma)); 1106 setup->nexttd = next; 1107 setup->td.td_nexttd = LE(next->physaddr); 1108 setup->td.td_be = LE(LE(setup->td.td_cbp) + sizeof *req - 1); 1109 setup->len = 0; /* XXX The number of byte we count */ 1110 setup->reqh = reqh; 1111 setup->flags = 0; 1112 reqh->hcpriv = setup; 1113 1114 stat->td.td_flags = LE( 1115 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC | 1116 OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1117 stat->td.td_cbp = 0; 1118 stat->nexttd = tail; 1119 stat->td.td_nexttd = LE(tail->physaddr); 1120 stat->td.td_be = 0; 1121 stat->len = 0; 1122 stat->reqh = reqh; 1123 1124 #if USB_DEBUG 1125 if (ohcidebug > 5) { 1126 DPRINTF(("ohci_device_request:\n")); 1127 ohci_dump_ed(sed); 1128 ohci_dump_tds(setup); 1129 } 1130 #endif 1131 1132 /* Insert ED in schedule */ 1133 s = splusb(); 1134 ohci_hash_add_td(sc, setup); 1135 if (len != 0) 1136 ohci_hash_add_td(sc, xfer); 1137 ohci_hash_add_td(sc, stat); 1138 sed->ed.ed_tailp = LE(tail->physaddr); 1139 opipe->tail = tail; 1140 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1141 if (reqh->timeout && !sc->sc_bus.use_polling) { 1142 usb_timeout(ohci_timeout, reqh, 1143 MS_TO_TICKS(reqh->timeout), reqh->timo_handle); 1144 } 1145 splx(s); 1146 1147 #if USB_DEBUG 1148 if (ohcidebug > 5) { 1149 delay(5000); 1150 DPRINTF(("ohci_device_request: status=%x\n", 1151 OREAD4(sc, OHCI_COMMAND_STATUS))); 1152 ohci_dump_ed(sed); 1153 ohci_dump_tds(setup); 1154 } 1155 #endif 1156 1157 return (USBD_NORMAL_COMPLETION); 1158 1159 bad3: 1160 ohci_free_std(sc, tail); 1161 bad2: 1162 ohci_free_std(sc, stat); 1163 bad1: 1164 return (r); 1165 } 1166 1167 /* 1168 * Add an ED to the schedule. Called at splusb(). 1169 */ 1170 void 1171 ohci_add_ed(sed, head) 1172 ohci_soft_ed_t *sed; 1173 ohci_soft_ed_t *head; 1174 { 1175 SPLUSBCHECK; 1176 sed->next = head->next; 1177 sed->ed.ed_nexted = head->ed.ed_nexted; 1178 head->next = sed; 1179 head->ed.ed_nexted = LE(sed->physaddr); 1180 } 1181 1182 /* 1183 * Remove an ED from the schedule. Called at splusb(). 1184 */ 1185 void 1186 ohci_rem_ed(sed, head) 1187 ohci_soft_ed_t *sed; 1188 ohci_soft_ed_t *head; 1189 { 1190 ohci_soft_ed_t *p; 1191 1192 SPLUSBCHECK; 1193 1194 /* XXX */ 1195 for (p = head; p && p->next != sed; p = p->next) 1196 ; 1197 if (!p) 1198 panic("ohci_rem_ed: ED not found\n"); 1199 p->next = sed->next; 1200 p->ed.ed_nexted = sed->ed.ed_nexted; 1201 } 1202 1203 /* 1204 * When a transfer is completed the TD is added to the done queue by 1205 * the host controller. This queue is the processed by software. 1206 * Unfortunately the queue contains the physical address of the TD 1207 * and we have no simple way to translate this back to a kernel address. 1208 * To make the translation possible (and fast) we use a hash table of 1209 * TDs currently in the schedule. The physical address is used as the 1210 * hash value. 1211 */ 1212 1213 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1214 /* Called at splusb() */ 1215 void 1216 ohci_hash_add_td(sc, std) 1217 ohci_softc_t *sc; 1218 ohci_soft_td_t *std; 1219 { 1220 int h = HASH(std->physaddr); 1221 1222 SPLUSBCHECK; 1223 1224 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1225 } 1226 1227 /* Called at splusb() */ 1228 void 1229 ohci_hash_rem_td(sc, std) 1230 ohci_softc_t *sc; 1231 ohci_soft_td_t *std; 1232 { 1233 SPLUSBCHECK; 1234 1235 LIST_REMOVE(std, hnext); 1236 } 1237 1238 ohci_soft_td_t * 1239 ohci_hash_find_td(sc, a) 1240 ohci_softc_t *sc; 1241 ohci_physaddr_t a; 1242 { 1243 int h = HASH(a); 1244 ohci_soft_td_t *std; 1245 1246 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1247 std != 0; 1248 std = LIST_NEXT(std, hnext)) 1249 if (std->physaddr == a) 1250 return (std); 1251 panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a); 1252 } 1253 1254 void 1255 ohci_timeout(addr) 1256 void *addr; 1257 { 1258 usbd_request_handle reqh = addr; 1259 1260 DPRINTF(("ohci_timeout: reqh=%p\n", reqh)); 1261 1262 reqh->device->bus->intr_context++; 1263 ohci_abort_req(reqh, USBD_TIMEOUT); 1264 reqh->device->bus->intr_context--; 1265 } 1266 1267 #ifdef USB_DEBUG 1268 void 1269 ohci_dump_tds(std) 1270 ohci_soft_td_t *std; 1271 { 1272 for (; std; std = std->nexttd) 1273 ohci_dump_td(std); 1274 } 1275 1276 void 1277 ohci_dump_td(std) 1278 ohci_soft_td_t *std; 1279 { 1280 DPRINTF(("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1281 "nexttd=0x%08lx be=0x%08lx\n", 1282 std, (u_long)std->physaddr, 1283 (int)LE(std->td.td_flags), 1284 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1285 OHCI_TD_GET_DI(LE(std->td.td_flags)), 1286 OHCI_TD_GET_EC(LE(std->td.td_flags)), 1287 OHCI_TD_GET_CC(LE(std->td.td_flags)), 1288 (u_long)LE(std->td.td_cbp), 1289 (u_long)LE(std->td.td_nexttd), (u_long)LE(std->td.td_be))); 1290 } 1291 1292 void 1293 ohci_dump_ed(sed) 1294 ohci_soft_ed_t *sed; 1295 { 1296 DPRINTF(("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx " 1297 "headp=%b nexted=0x%08lx\n", 1298 sed, (u_long)sed->physaddr, 1299 OHCI_ED_GET_FA(LE(sed->ed.ed_flags)), 1300 OHCI_ED_GET_EN(LE(sed->ed.ed_flags)), 1301 OHCI_ED_GET_MAXP(LE(sed->ed.ed_flags)), 1302 (int)LE(sed->ed.ed_flags), 1303 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1304 (u_long)LE(sed->ed.ed_tailp), 1305 (u_long)LE(sed->ed.ed_headp), "\20\1HALT\2CARRY", 1306 (u_long)LE(sed->ed.ed_nexted))); 1307 } 1308 #endif 1309 1310 usbd_status 1311 ohci_open(pipe) 1312 usbd_pipe_handle pipe; 1313 { 1314 usbd_device_handle dev = pipe->device; 1315 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1316 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1317 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1318 u_int8_t addr = dev->address; 1319 ohci_soft_ed_t *sed; 1320 ohci_soft_td_t *std; 1321 usbd_status r; 1322 int s; 1323 1324 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1325 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1326 if (addr == sc->sc_addr) { 1327 switch (ed->bEndpointAddress) { 1328 case USB_CONTROL_ENDPOINT: 1329 pipe->methods = &ohci_root_ctrl_methods; 1330 break; 1331 case UE_DIR_IN | OHCI_INTR_ENDPT: 1332 pipe->methods = &ohci_root_intr_methods; 1333 break; 1334 default: 1335 return (USBD_INVAL); 1336 } 1337 } else { 1338 sed = ohci_alloc_sed(sc); 1339 if (sed == 0) 1340 goto bad0; 1341 std = ohci_alloc_std(sc); 1342 if (std == 0) 1343 goto bad1; 1344 opipe->sed = sed; 1345 opipe->tail = std; 1346 sed->ed.ed_flags = LE( 1347 OHCI_ED_SET_FA(addr) | 1348 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1349 OHCI_ED_DIR_TD | 1350 (dev->lowspeed ? OHCI_ED_SPEED : 0) | 1351 ((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ? 1352 OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) | 1353 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1354 sed->ed.ed_headp = sed->ed.ed_tailp = LE(std->physaddr); 1355 1356 switch (ed->bmAttributes & UE_XFERTYPE) { 1357 case UE_CONTROL: 1358 pipe->methods = &ohci_device_ctrl_methods; 1359 r = usb_allocmem(&sc->sc_bus, 1360 sizeof(usb_device_request_t), 1361 0, &opipe->u.ctl.reqdma); 1362 if (r != USBD_NORMAL_COMPLETION) 1363 goto bad; 1364 s = splusb(); 1365 ohci_add_ed(sed, sc->sc_ctrl_head); 1366 splx(s); 1367 break; 1368 case UE_INTERRUPT: 1369 pipe->methods = &ohci_device_intr_methods; 1370 return (ohci_device_setintr(sc, opipe, ed->bInterval)); 1371 case UE_ISOCHRONOUS: 1372 printf("ohci_open: open iso unimplemented\n"); 1373 return (USBD_INVAL); 1374 case UE_BULK: 1375 pipe->methods = &ohci_device_bulk_methods; 1376 s = splusb(); 1377 ohci_add_ed(sed, sc->sc_bulk_head); 1378 splx(s); 1379 break; 1380 } 1381 } 1382 return (USBD_NORMAL_COMPLETION); 1383 1384 bad: 1385 ohci_free_std(sc, std); 1386 bad1: 1387 ohci_free_sed(sc, sed); 1388 bad0: 1389 return (USBD_NOMEM); 1390 1391 } 1392 1393 /* 1394 * Close a reqular pipe. 1395 * Assumes that there are no pending transactions. 1396 */ 1397 void 1398 ohci_close_pipe(pipe, head) 1399 usbd_pipe_handle pipe; 1400 ohci_soft_ed_t *head; 1401 { 1402 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1403 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1404 ohci_soft_ed_t *sed = opipe->sed; 1405 int s; 1406 1407 s = splusb(); 1408 #ifdef DIAGNOSTIC 1409 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 1410 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 1411 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) { 1412 ohci_physaddr_t td = sed->ed.ed_headp; 1413 ohci_soft_td_t *std; 1414 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]); 1415 std != 0; 1416 std = LIST_NEXT(std, hnext)) 1417 if (std->physaddr == td) 1418 break; 1419 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 1420 "tl=0x%x pipe=%p, std=%p\n", sed, 1421 (int)LE(sed->ed.ed_headp), (int)LE(sed->ed.ed_tailp), 1422 pipe, std); 1423 usb_delay_ms(&sc->sc_bus, 2); 1424 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 1425 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) 1426 printf("ohci_close_pipe: pipe still not empty\n"); 1427 } 1428 #endif 1429 ohci_rem_ed(sed, head); 1430 splx(s); 1431 ohci_free_std(sc, opipe->tail); 1432 ohci_free_sed(sc, opipe->sed); 1433 } 1434 1435 /* 1436 * Abort a device request. 1437 * If this routine is called at splusb() it guarantees that the request 1438 * will be removed from the hardware scheduling and that the callback 1439 * for it will be called with USBD_CANCELLED status. 1440 * It's impossible to guarantee that the requested transfer will not 1441 * have happened since the hardware runs concurrently. 1442 * If the transaction has already happened we rely on the ordinary 1443 * interrupt processing to process it. 1444 */ 1445 void 1446 ohci_abort_req(reqh, status) 1447 usbd_request_handle reqh; 1448 usbd_status status; 1449 { 1450 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 1451 ohci_soft_ed_t *sed; 1452 1453 SPLUSBCHECK; 1454 1455 DPRINTF(("ohci_abort_req: reqh=%p pipe=%p\n", reqh, opipe)); 1456 1457 reqh->status = status; 1458 1459 usb_untimeout(ohci_timeout, reqh, reqh->timo_handle); 1460 1461 sed = opipe->sed; 1462 DPRINTFN(1,("ohci_abort_req: stop ed=%p\n", sed)); 1463 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); /* force hardware skip */ 1464 1465 if (reqh->device->bus->intr_context) { 1466 /* We have no process context, so we can't use tsleep(). */ 1467 timeout(ohci_abort_req_end, reqh, hz / USB_FRAMES_PER_SECOND); 1468 } else { 1469 usb_delay_ms(opipe->pipe.device->bus, 1); 1470 ohci_abort_req_end(reqh); 1471 } 1472 } 1473 1474 void 1475 ohci_abort_req_end(v) 1476 void *v; 1477 { 1478 usbd_request_handle reqh = v; 1479 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 1480 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1481 ohci_soft_ed_t *sed; 1482 ohci_soft_td_t *p, *n; 1483 int s; 1484 1485 s = splusb(); 1486 1487 p = reqh->hcpriv; 1488 #ifdef DIAGNOSTIC 1489 if (!p) { 1490 printf("ohci_abort_req: hcpriv==0\n"); 1491 return; 1492 } 1493 #endif 1494 for (; p->reqh == reqh; p = n) { 1495 n = p->nexttd; 1496 ohci_hash_rem_td(sc, p); 1497 ohci_free_std(sc, p); 1498 } 1499 1500 sed = opipe->sed; 1501 DPRINTFN(2,("ohci_abort_req: set hd=%x, tl=%x\n", 1502 (int)LE(p->physaddr), (int)LE(sed->ed.ed_tailp))); 1503 sed->ed.ed_headp = p->physaddr; /* unlink TDs */ 1504 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); /* remove hardware skip */ 1505 1506 usb_transfer_complete(reqh); 1507 1508 splx(s); 1509 } 1510 1511 /* 1512 * Data structures and routines to emulate the root hub. 1513 */ 1514 usb_device_descriptor_t ohci_devd = { 1515 USB_DEVICE_DESCRIPTOR_SIZE, 1516 UDESC_DEVICE, /* type */ 1517 {0x00, 0x01}, /* USB version */ 1518 UCLASS_HUB, /* class */ 1519 USUBCLASS_HUB, /* subclass */ 1520 0, /* protocol */ 1521 64, /* max packet */ 1522 {0},{0},{0x00,0x01}, /* device id */ 1523 1,2,0, /* string indicies */ 1524 1 /* # of configurations */ 1525 }; 1526 1527 usb_config_descriptor_t ohci_confd = { 1528 USB_CONFIG_DESCRIPTOR_SIZE, 1529 UDESC_CONFIG, 1530 {USB_CONFIG_DESCRIPTOR_SIZE + 1531 USB_INTERFACE_DESCRIPTOR_SIZE + 1532 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1533 1, 1534 1, 1535 0, 1536 UC_SELF_POWERED, 1537 0 /* max power */ 1538 }; 1539 1540 usb_interface_descriptor_t ohci_ifcd = { 1541 USB_INTERFACE_DESCRIPTOR_SIZE, 1542 UDESC_INTERFACE, 1543 0, 1544 0, 1545 1, 1546 UCLASS_HUB, 1547 USUBCLASS_HUB, 1548 0, 1549 0 1550 }; 1551 1552 usb_endpoint_descriptor_t ohci_endpd = { 1553 USB_ENDPOINT_DESCRIPTOR_SIZE, 1554 UDESC_ENDPOINT, 1555 UE_DIR_IN | OHCI_INTR_ENDPT, 1556 UE_INTERRUPT, 1557 {8, 0}, /* max packet */ 1558 255 1559 }; 1560 1561 usb_hub_descriptor_t ohci_hubd = { 1562 USB_HUB_DESCRIPTOR_SIZE, 1563 UDESC_HUB, 1564 0, 1565 {0,0}, 1566 0, 1567 0, 1568 {0}, 1569 }; 1570 1571 int 1572 ohci_str(p, l, s) 1573 usb_string_descriptor_t *p; 1574 int l; 1575 char *s; 1576 { 1577 int i; 1578 1579 if (l == 0) 1580 return (0); 1581 p->bLength = 2 * strlen(s) + 2; 1582 if (l == 1) 1583 return (1); 1584 p->bDescriptorType = UDESC_STRING; 1585 l -= 2; 1586 for (i = 0; s[i] && l > 1; i++, l -= 2) 1587 USETW2(p->bString[i], 0, s[i]); 1588 return (2*i+2); 1589 } 1590 1591 /* 1592 * Simulate a hardware hub by handling all the necessary requests. 1593 */ 1594 usbd_status 1595 ohci_root_ctrl_transfer(reqh) 1596 usbd_request_handle reqh; 1597 { 1598 usbd_status r; 1599 1600 /* Insert last in queue. */ 1601 r = usb_insert_transfer(reqh); 1602 if (r != USBD_NORMAL_COMPLETION) 1603 return (r); 1604 1605 /* Pipe isn't running, start first */ 1606 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&reqh->pipe->queue))); 1607 } 1608 1609 usbd_status 1610 ohci_root_ctrl_start(reqh) 1611 usbd_request_handle reqh; 1612 { 1613 ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus; 1614 usb_device_request_t *req; 1615 void *buf; 1616 int port, i; 1617 int s, len, value, index, l, totlen = 0; 1618 usb_port_status_t ps; 1619 usb_hub_descriptor_t hubd; 1620 usbd_status r; 1621 u_int32_t v; 1622 1623 #ifdef DIAGNOSTIC 1624 if (!(reqh->rqflags & URQ_REQUEST)) 1625 /* XXX panic */ 1626 return (USBD_INVAL); 1627 #endif 1628 req = &reqh->request; 1629 1630 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 1631 req->bmRequestType, req->bRequest)); 1632 1633 len = UGETW(req->wLength); 1634 value = UGETW(req->wValue); 1635 index = UGETW(req->wIndex); 1636 1637 if (len != 0) 1638 buf = KERNADDR(&reqh->dmabuf); 1639 #ifdef DIAGNOSTIC 1640 else 1641 buf = 0; 1642 #endif 1643 1644 #define C(x,y) ((x) | ((y) << 8)) 1645 switch(C(req->bRequest, req->bmRequestType)) { 1646 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1647 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1648 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1649 /* 1650 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1651 * for the integrated root hub. 1652 */ 1653 break; 1654 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1655 if (len > 0) { 1656 *(u_int8_t *)buf = sc->sc_conf; 1657 totlen = 1; 1658 } 1659 break; 1660 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1661 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 1662 switch(value >> 8) { 1663 case UDESC_DEVICE: 1664 if ((value & 0xff) != 0) { 1665 r = USBD_IOERROR; 1666 goto ret; 1667 } 1668 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1669 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 1670 memcpy(buf, &ohci_devd, l); 1671 break; 1672 case UDESC_CONFIG: 1673 if ((value & 0xff) != 0) { 1674 r = USBD_IOERROR; 1675 goto ret; 1676 } 1677 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1678 memcpy(buf, &ohci_confd, l); 1679 buf = (char *)buf + l; 1680 len -= l; 1681 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1682 totlen += l; 1683 memcpy(buf, &ohci_ifcd, l); 1684 buf = (char *)buf + l; 1685 len -= l; 1686 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1687 totlen += l; 1688 memcpy(buf, &ohci_endpd, l); 1689 break; 1690 case UDESC_STRING: 1691 if (len == 0) 1692 break; 1693 *(u_int8_t *)buf = 0; 1694 totlen = 1; 1695 switch (value & 0xff) { 1696 case 1: /* Vendor */ 1697 totlen = ohci_str(buf, len, sc->sc_vendor); 1698 break; 1699 case 2: /* Product */ 1700 totlen = ohci_str(buf, len, "OHCI root hub"); 1701 break; 1702 } 1703 break; 1704 default: 1705 r = USBD_IOERROR; 1706 goto ret; 1707 } 1708 break; 1709 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1710 if (len > 0) { 1711 *(u_int8_t *)buf = 0; 1712 totlen = 1; 1713 } 1714 break; 1715 case C(UR_GET_STATUS, UT_READ_DEVICE): 1716 if (len > 1) { 1717 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1718 totlen = 2; 1719 } 1720 break; 1721 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1722 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1723 if (len > 1) { 1724 USETW(((usb_status_t *)buf)->wStatus, 0); 1725 totlen = 2; 1726 } 1727 break; 1728 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1729 if (value >= USB_MAX_DEVICES) { 1730 r = USBD_IOERROR; 1731 goto ret; 1732 } 1733 sc->sc_addr = value; 1734 break; 1735 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1736 if (value != 0 && value != 1) { 1737 r = USBD_IOERROR; 1738 goto ret; 1739 } 1740 sc->sc_conf = value; 1741 break; 1742 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1743 break; 1744 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1745 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1746 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1747 r = USBD_IOERROR; 1748 goto ret; 1749 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1750 break; 1751 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1752 break; 1753 /* Hub requests */ 1754 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1755 break; 1756 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1757 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1758 "port=%d feature=%d\n", 1759 index, value)); 1760 if (index < 1 || index > sc->sc_noport) { 1761 r = USBD_IOERROR; 1762 goto ret; 1763 } 1764 port = OHCI_RH_PORT_STATUS(index); 1765 switch(value) { 1766 case UHF_PORT_ENABLE: 1767 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 1768 break; 1769 case UHF_PORT_SUSPEND: 1770 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 1771 break; 1772 case UHF_PORT_POWER: 1773 OWRITE4(sc, port, UPS_LOW_SPEED); 1774 break; 1775 case UHF_C_PORT_CONNECTION: 1776 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 1777 break; 1778 case UHF_C_PORT_ENABLE: 1779 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 1780 break; 1781 case UHF_C_PORT_SUSPEND: 1782 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 1783 break; 1784 case UHF_C_PORT_OVER_CURRENT: 1785 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 1786 break; 1787 case UHF_C_PORT_RESET: 1788 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 1789 break; 1790 default: 1791 r = USBD_IOERROR; 1792 goto ret; 1793 } 1794 switch(value) { 1795 case UHF_C_PORT_CONNECTION: 1796 case UHF_C_PORT_ENABLE: 1797 case UHF_C_PORT_SUSPEND: 1798 case UHF_C_PORT_OVER_CURRENT: 1799 case UHF_C_PORT_RESET: 1800 /* Enable RHSC interrupt if condition is cleared. */ 1801 if ((OREAD4(sc, port) >> 16) == 0) 1802 ohci_rhsc_able(sc, 1); 1803 break; 1804 default: 1805 break; 1806 } 1807 break; 1808 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1809 if (value != 0) { 1810 r = USBD_IOERROR; 1811 goto ret; 1812 } 1813 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 1814 hubd = ohci_hubd; 1815 hubd.bNbrPorts = sc->sc_noport; 1816 USETW(hubd.wHubCharacteristics, 1817 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 1818 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 1819 /* XXX overcurrent */ 1820 ); 1821 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 1822 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 1823 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1824 hubd.DeviceRemovable[i++] = (u_int8_t)v; 1825 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1826 l = min(len, hubd.bDescLength); 1827 totlen = l; 1828 memcpy(buf, &hubd, l); 1829 break; 1830 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1831 if (len != 4) { 1832 r = USBD_IOERROR; 1833 goto ret; 1834 } 1835 memset(buf, 0, len); /* ? XXX */ 1836 totlen = len; 1837 break; 1838 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1839 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 1840 index)); 1841 if (index < 1 || index > sc->sc_noport) { 1842 r = USBD_IOERROR; 1843 goto ret; 1844 } 1845 if (len != 4) { 1846 r = USBD_IOERROR; 1847 goto ret; 1848 } 1849 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 1850 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 1851 v)); 1852 USETW(ps.wPortStatus, v); 1853 USETW(ps.wPortChange, v >> 16); 1854 l = min(len, sizeof ps); 1855 memcpy(buf, &ps, l); 1856 totlen = l; 1857 break; 1858 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1859 r = USBD_IOERROR; 1860 goto ret; 1861 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1862 break; 1863 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1864 if (index < 1 || index > sc->sc_noport) { 1865 r = USBD_IOERROR; 1866 goto ret; 1867 } 1868 port = OHCI_RH_PORT_STATUS(index); 1869 switch(value) { 1870 case UHF_PORT_ENABLE: 1871 OWRITE4(sc, port, UPS_PORT_ENABLED); 1872 break; 1873 case UHF_PORT_SUSPEND: 1874 OWRITE4(sc, port, UPS_SUSPEND); 1875 break; 1876 case UHF_PORT_RESET: 1877 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 1878 index)); 1879 OWRITE4(sc, port, UPS_RESET); 1880 for (i = 0; i < 10; i++) { 1881 usb_delay_ms(&sc->sc_bus, 10); 1882 if ((OREAD4(sc, port) & UPS_RESET) == 0) 1883 break; 1884 } 1885 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 1886 index, OREAD4(sc, port))); 1887 break; 1888 case UHF_PORT_POWER: 1889 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 1890 "%d\n", index)); 1891 OWRITE4(sc, port, UPS_PORT_POWER); 1892 break; 1893 default: 1894 r = USBD_IOERROR; 1895 goto ret; 1896 } 1897 break; 1898 default: 1899 r = USBD_IOERROR; 1900 goto ret; 1901 } 1902 reqh->actlen = totlen; 1903 r = USBD_NORMAL_COMPLETION; 1904 ret: 1905 reqh->status = r; 1906 s = splusb(); 1907 usb_transfer_complete(reqh); 1908 splx(s); 1909 return (USBD_IN_PROGRESS); 1910 } 1911 1912 /* Abort a root control request. */ 1913 void 1914 ohci_root_ctrl_abort(reqh) 1915 usbd_request_handle reqh; 1916 { 1917 /* Nothing to do, all transfers are synchronous. */ 1918 } 1919 1920 /* Close the root pipe. */ 1921 void 1922 ohci_root_ctrl_close(pipe) 1923 usbd_pipe_handle pipe; 1924 { 1925 DPRINTF(("ohci_root_ctrl_close\n")); 1926 /* Nothing to do. */ 1927 } 1928 1929 usbd_status 1930 ohci_root_intr_transfer(reqh) 1931 usbd_request_handle reqh; 1932 { 1933 usbd_status r; 1934 1935 /* Insert last in queue. */ 1936 r = usb_insert_transfer(reqh); 1937 if (r != USBD_NORMAL_COMPLETION) 1938 return (r); 1939 1940 /* Pipe isn't running, start first */ 1941 return (ohci_root_intr_start(SIMPLEQ_FIRST(&reqh->pipe->queue))); 1942 } 1943 1944 usbd_status 1945 ohci_root_intr_start(reqh) 1946 usbd_request_handle reqh; 1947 { 1948 usbd_pipe_handle pipe = reqh->pipe; 1949 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1950 1951 sc->sc_intrreqh = reqh; 1952 1953 return (USBD_IN_PROGRESS); 1954 } 1955 1956 /* Abort a root interrupt request. */ 1957 void 1958 ohci_root_intr_abort(reqh) 1959 usbd_request_handle reqh; 1960 { 1961 /* No need to abort. */ 1962 } 1963 1964 /* Close the root pipe. */ 1965 void 1966 ohci_root_intr_close(pipe) 1967 usbd_pipe_handle pipe; 1968 { 1969 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1970 1971 DPRINTF(("ohci_root_intr_close\n")); 1972 1973 sc->sc_intrreqh = 0; 1974 } 1975 1976 /************************/ 1977 1978 usbd_status 1979 ohci_device_ctrl_transfer(reqh) 1980 usbd_request_handle reqh; 1981 { 1982 usbd_status r; 1983 1984 /* Insert last in queue. */ 1985 r = usb_insert_transfer(reqh); 1986 if (r != USBD_NORMAL_COMPLETION) 1987 return (r); 1988 1989 /* Pipe isn't running, start first */ 1990 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&reqh->pipe->queue))); 1991 } 1992 1993 usbd_status 1994 ohci_device_ctrl_start(reqh) 1995 usbd_request_handle reqh; 1996 { 1997 ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus; 1998 usbd_status r; 1999 2000 #ifdef DIAGNOSTIC 2001 if (!(reqh->rqflags & URQ_REQUEST)) { 2002 /* XXX panic */ 2003 printf("ohci_device_ctrl_transfer: not a request\n"); 2004 return (USBD_INVAL); 2005 } 2006 #endif 2007 2008 r = ohci_device_request(reqh); 2009 if (r != USBD_NORMAL_COMPLETION) 2010 return (r); 2011 2012 if (sc->sc_bus.use_polling) 2013 ohci_waitintr(sc, reqh); 2014 return (USBD_IN_PROGRESS); 2015 } 2016 2017 /* Abort a device control request. */ 2018 void 2019 ohci_device_ctrl_abort(reqh) 2020 usbd_request_handle reqh; 2021 { 2022 DPRINTF(("ohci_device_ctrl_abort: reqh=%p\n", reqh)); 2023 ohci_abort_req(reqh, USBD_CANCELLED); 2024 } 2025 2026 /* Close a device control pipe. */ 2027 void 2028 ohci_device_ctrl_close(pipe) 2029 usbd_pipe_handle pipe; 2030 { 2031 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2032 2033 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2034 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2035 } 2036 2037 /************************/ 2038 2039 void 2040 ohci_device_clear_toggle(pipe) 2041 usbd_pipe_handle pipe; 2042 { 2043 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2044 2045 opipe->sed->ed.ed_tailp &= LE(~OHCI_TOGGLECARRY); 2046 } 2047 2048 void 2049 ohci_noop(pipe) 2050 usbd_pipe_handle pipe; 2051 { 2052 } 2053 2054 usbd_status 2055 ohci_device_bulk_transfer(reqh) 2056 usbd_request_handle reqh; 2057 { 2058 usbd_status r; 2059 2060 /* Insert last in queue. */ 2061 r = usb_insert_transfer(reqh); 2062 if (r != USBD_NORMAL_COMPLETION) 2063 return (r); 2064 2065 /* Pipe isn't running, start first */ 2066 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&reqh->pipe->queue))); 2067 } 2068 2069 usbd_status 2070 ohci_device_bulk_start(reqh) 2071 usbd_request_handle reqh; 2072 { 2073 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 2074 usbd_device_handle dev = opipe->pipe.device; 2075 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2076 int addr = dev->address; 2077 ohci_soft_td_t *xfer, *tail; 2078 ohci_soft_ed_t *sed; 2079 int s, len, isread, endpt; 2080 2081 #ifdef DIAGNOSTIC 2082 if (reqh->rqflags & URQ_REQUEST) { 2083 /* XXX panic */ 2084 printf("ohci_device_bulk_start: a request\n"); 2085 return (USBD_INVAL); 2086 } 2087 #endif 2088 2089 len = reqh->length; 2090 endpt = reqh->pipe->endpoint->edesc->bEndpointAddress; 2091 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2092 sed = opipe->sed; 2093 2094 DPRINTFN(4,("ohci_device_bulk_start: reqh=%p len=%d isread=%d " 2095 "flags=%d endpt=%d\n", reqh, len, isread, reqh->flags, 2096 endpt)); 2097 2098 opipe->u.bulk.isread = isread; 2099 opipe->u.bulk.length = len; 2100 2101 tail = ohci_alloc_std(sc); 2102 if (!tail) 2103 return (USBD_NOMEM); 2104 tail->reqh = 0; 2105 2106 /* Update device address */ 2107 sed->ed.ed_flags = LE( 2108 (LE(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2109 OHCI_ED_SET_FA(addr)); 2110 2111 /* Set up data transaction */ 2112 xfer = opipe->tail; 2113 xfer->td.td_flags = LE( 2114 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 2115 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY | 2116 (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0)); 2117 xfer->td.td_cbp = LE(DMAADDR(&reqh->dmabuf)); 2118 xfer->nexttd = tail; 2119 xfer->td.td_nexttd = LE(tail->physaddr); 2120 xfer->td.td_be = LE(LE(xfer->td.td_cbp) + len - 1); 2121 xfer->len = len; 2122 xfer->reqh = reqh; 2123 xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN; 2124 reqh->hcpriv = xfer; 2125 2126 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2127 "td_cbp=0x%08x td_be=0x%08x\n", 2128 (int)LE(sed->ed.ed_flags), (int)LE(xfer->td.td_flags), 2129 (int)LE(xfer->td.td_cbp), (int)LE(xfer->td.td_be))); 2130 2131 #ifdef USB_DEBUG 2132 if (ohcidebug > 4) { 2133 ohci_dump_ed(sed); 2134 ohci_dump_tds(xfer); 2135 } 2136 #endif 2137 2138 /* Insert ED in schedule */ 2139 s = splusb(); 2140 ohci_hash_add_td(sc, xfer); 2141 sed->ed.ed_tailp = LE(tail->physaddr); 2142 opipe->tail = tail; 2143 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); 2144 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2145 if (reqh->timeout && !sc->sc_bus.use_polling) { 2146 usb_timeout(ohci_timeout, reqh, 2147 MS_TO_TICKS(reqh->timeout), reqh->timo_handle); 2148 } 2149 2150 #ifdef USB_DEBUG 2151 if (ohcidebug > 5) { 2152 delay(5000); 2153 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2154 OREAD4(sc, OHCI_COMMAND_STATUS))); 2155 ohci_dump_ed(sed); 2156 ohci_dump_tds(xfer); 2157 } 2158 #endif 2159 2160 splx(s); 2161 2162 return (USBD_IN_PROGRESS); 2163 } 2164 2165 void 2166 ohci_device_bulk_abort(reqh) 2167 usbd_request_handle reqh; 2168 { 2169 DPRINTF(("ohci_device_bulk_abort: reqh=%p\n", reqh)); 2170 ohci_abort_req(reqh, USBD_CANCELLED); 2171 } 2172 2173 /* 2174 * Close a device bulk pipe. 2175 */ 2176 void 2177 ohci_device_bulk_close(pipe) 2178 usbd_pipe_handle pipe; 2179 { 2180 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2181 2182 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2183 ohci_close_pipe(pipe, sc->sc_bulk_head); 2184 } 2185 2186 /************************/ 2187 2188 usbd_status 2189 ohci_device_intr_transfer(reqh) 2190 usbd_request_handle reqh; 2191 { 2192 usbd_status r; 2193 2194 /* Insert last in queue. */ 2195 r = usb_insert_transfer(reqh); 2196 if (r != USBD_NORMAL_COMPLETION) 2197 return (r); 2198 2199 /* Pipe isn't running, start first */ 2200 return (ohci_device_intr_start(SIMPLEQ_FIRST(&reqh->pipe->queue))); 2201 } 2202 2203 usbd_status 2204 ohci_device_intr_start(reqh) 2205 usbd_request_handle reqh; 2206 { 2207 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 2208 usbd_device_handle dev = opipe->pipe.device; 2209 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2210 ohci_soft_ed_t *sed = opipe->sed; 2211 ohci_soft_td_t *xfer, *tail; 2212 int len; 2213 int s; 2214 2215 DPRINTFN(3, ("ohci_device_intr_transfer: reqh=%p len=%d " 2216 "flags=%d priv=%p\n", 2217 reqh, reqh->length, reqh->flags, reqh->priv)); 2218 2219 #ifdef DIAGNOSTIC 2220 if (reqh->rqflags & URQ_REQUEST) 2221 panic("ohci_device_intr_transfer: a request\n"); 2222 #endif 2223 2224 len = reqh->length; 2225 2226 xfer = opipe->tail; 2227 tail = ohci_alloc_std(sc); 2228 if (!tail) 2229 return (USBD_NOMEM); 2230 tail->reqh = 0; 2231 2232 xfer->td.td_flags = LE( 2233 OHCI_TD_IN | OHCI_TD_NOCC | 2234 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2235 if (reqh->flags & USBD_SHORT_XFER_OK) 2236 xfer->td.td_flags |= LE(OHCI_TD_R); 2237 xfer->td.td_cbp = LE(DMAADDR(&reqh->dmabuf)); 2238 xfer->nexttd = tail; 2239 xfer->td.td_nexttd = LE(tail->physaddr); 2240 xfer->td.td_be = LE(LE(xfer->td.td_cbp) + len - 1); 2241 xfer->len = len; 2242 xfer->reqh = reqh; 2243 xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN; 2244 reqh->hcpriv = xfer; 2245 2246 #if USB_DEBUG 2247 if (ohcidebug > 5) { 2248 DPRINTF(("ohci_device_intr_transfer:\n")); 2249 ohci_dump_ed(sed); 2250 ohci_dump_tds(xfer); 2251 } 2252 #endif 2253 2254 /* Insert ED in schedule */ 2255 s = splusb(); 2256 ohci_hash_add_td(sc, xfer); 2257 sed->ed.ed_tailp = LE(tail->physaddr); 2258 opipe->tail = tail; 2259 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); 2260 2261 #ifdef USB_DEBUG 2262 if (ohcidebug > 5) { 2263 delay(5000); 2264 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2265 OREAD4(sc, OHCI_COMMAND_STATUS))); 2266 ohci_dump_ed(sed); 2267 ohci_dump_tds(xfer); 2268 } 2269 #endif 2270 splx(s); 2271 2272 return (USBD_IN_PROGRESS); 2273 } 2274 2275 /* Abort a device control request. */ 2276 void 2277 ohci_device_intr_abort(reqh) 2278 usbd_request_handle reqh; 2279 { 2280 if (reqh->pipe->intrreqh == reqh) { 2281 DPRINTF(("ohci_device_intr_abort: remove\n")); 2282 reqh->pipe->intrreqh = 0; 2283 } 2284 ohci_abort_req(reqh, USBD_CANCELLED); 2285 } 2286 2287 /* Close a device interrupt pipe. */ 2288 void 2289 ohci_device_intr_close(pipe) 2290 usbd_pipe_handle pipe; 2291 { 2292 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2293 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2294 int nslots = opipe->u.intr.nslots; 2295 int pos = opipe->u.intr.pos; 2296 int j; 2297 ohci_soft_ed_t *p, *sed = opipe->sed; 2298 int s; 2299 2300 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2301 pipe, nslots, pos)); 2302 s = splusb(); 2303 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 2304 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 2305 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) 2306 usb_delay_ms(&sc->sc_bus, 2); 2307 2308 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2309 ; 2310 if (!p) 2311 panic("ohci_device_intr_close: ED not found\n"); 2312 p->next = sed->next; 2313 p->ed.ed_nexted = sed->ed.ed_nexted; 2314 splx(s); 2315 2316 for (j = 0; j < nslots; j++) 2317 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2318 2319 ohci_free_std(sc, opipe->tail); 2320 ohci_free_sed(sc, opipe->sed); 2321 } 2322 2323 usbd_status 2324 ohci_device_setintr(sc, opipe, ival) 2325 ohci_softc_t *sc; 2326 struct ohci_pipe *opipe; 2327 int ival; 2328 { 2329 int i, j, s, best; 2330 u_int npoll, slow, shigh, nslots; 2331 u_int bestbw, bw; 2332 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2333 2334 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2335 if (ival == 0) { 2336 printf("ohci_setintr: 0 interval\n"); 2337 return (USBD_INVAL); 2338 } 2339 2340 npoll = OHCI_NO_INTRS; 2341 while (npoll > ival) 2342 npoll /= 2; 2343 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2344 2345 /* 2346 * We now know which level in the tree the ED must go into. 2347 * Figure out which slot has most bandwidth left over. 2348 * Slots to examine: 2349 * npoll 2350 * 1 0 2351 * 2 1 2 2352 * 4 3 4 5 6 2353 * 8 7 8 9 10 11 12 13 14 2354 * N (N-1) .. (N-1+N-1) 2355 */ 2356 slow = npoll-1; 2357 shigh = slow + npoll; 2358 nslots = OHCI_NO_INTRS / npoll; 2359 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2360 bw = 0; 2361 for (j = 0; j < nslots; j++) 2362 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 2363 if (bw < bestbw) { 2364 best = i; 2365 bestbw = bw; 2366 } 2367 } 2368 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2369 best, slow, shigh, bestbw)); 2370 2371 s = splusb(); 2372 hsed = sc->sc_eds[best]; 2373 sed->next = hsed->next; 2374 sed->ed.ed_nexted = hsed->ed.ed_nexted; 2375 hsed->next = sed; 2376 hsed->ed.ed_nexted = LE(sed->physaddr); 2377 splx(s); 2378 2379 for (j = 0; j < nslots; j++) 2380 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 2381 opipe->u.intr.nslots = nslots; 2382 opipe->u.intr.pos = best; 2383 2384 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 2385 return (USBD_NORMAL_COMPLETION); 2386 } 2387 2388
Indexes created Thu Sep 25 16:09:42 GMT 2025