ohci.c revision 1.50
1 /* $NetBSD: ohci.c,v 1.50 1999/10/12 11:21:25 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (augustss (at) carlstedt.se) at 9 * Carlstedt Research & Technology. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * USB Open Host Controller driver. 42 * 43 * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe 44 * USB spec: http://www.usb.org/developers/data/usb11.pdf 45 */ 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/kernel.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/device.h> 53 #elif defined(__FreeBSD__) 54 #include <sys/module.h> 55 #include <sys/bus.h> 56 #endif 57 #include <sys/proc.h> 58 #include <sys/queue.h> 59 #include <sys/select.h> 60 61 #include <machine/bus.h> 62 #include <machine/endian.h> 63 64 #include <dev/usb/usb.h> 65 #include <dev/usb/usbdi.h> 66 #include <dev/usb/usbdivar.h> 67 #include <dev/usb/usb_mem.h> 68 #include <dev/usb/usb_quirks.h> 69 70 #include <dev/usb/ohcireg.h> 71 #include <dev/usb/ohcivar.h> 72 73 #if defined(__FreeBSD__) 74 #include <machine/clock.h> 75 76 #define delay(d) DELAY(d) 77 78 #endif 79 80 #if defined(__OpenBSD__) 81 struct cfdriver ohci_cd = { 82 NULL, "ohci", DV_DULL 83 }; 84 #endif 85 86 /* 87 * The OHCI controller is little endian, so on big endian machines 88 * the data strored in memory needs to be swapped. 89 */ 90 #if BYTE_ORDER == BIG_ENDIAN 91 #define LE(x) (bswap32(x)) 92 #else 93 #define LE(x) (x) 94 #endif 95 96 struct ohci_pipe; 97 98 ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *)); 99 void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *)); 100 101 ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *)); 102 void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *)); 103 104 void ohci_free_std_chain __P((ohci_softc_t *, 105 ohci_soft_td_t *, ohci_soft_td_t *)); 106 usbd_status ohci_alloc_std_chain __P((struct ohci_pipe *, ohci_softc_t *, 107 int, int, int, usb_dma_t *, 108 ohci_soft_td_t *, 109 ohci_soft_td_t **)); 110 111 void ohci_power __P((int, void *)); 112 usbd_status ohci_open __P((usbd_pipe_handle)); 113 void ohci_poll __P((struct usbd_bus *)); 114 void ohci_waitintr __P((ohci_softc_t *, usbd_request_handle)); 115 void ohci_rhsc __P((ohci_softc_t *, usbd_request_handle)); 116 void ohci_process_done __P((ohci_softc_t *, ohci_physaddr_t)); 117 118 usbd_status ohci_device_request __P((usbd_request_handle reqh)); 119 void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 120 void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 121 void ohci_hash_add_td __P((ohci_softc_t *, ohci_soft_td_t *)); 122 void ohci_hash_rem_td __P((ohci_softc_t *, ohci_soft_td_t *)); 123 ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, ohci_physaddr_t)); 124 125 usbd_status ohci_allocm __P((struct usbd_bus *, usb_dma_t *, u_int32_t)); 126 void ohci_freem __P((struct usbd_bus *, usb_dma_t *)); 127 128 usbd_status ohci_root_ctrl_transfer __P((usbd_request_handle)); 129 usbd_status ohci_root_ctrl_start __P((usbd_request_handle)); 130 void ohci_root_ctrl_abort __P((usbd_request_handle)); 131 void ohci_root_ctrl_close __P((usbd_pipe_handle)); 132 133 usbd_status ohci_root_intr_transfer __P((usbd_request_handle)); 134 usbd_status ohci_root_intr_start __P((usbd_request_handle)); 135 void ohci_root_intr_abort __P((usbd_request_handle)); 136 void ohci_root_intr_close __P((usbd_pipe_handle)); 137 void ohci_root_intr_done __P((usbd_request_handle)); 138 139 usbd_status ohci_device_ctrl_transfer __P((usbd_request_handle)); 140 usbd_status ohci_device_ctrl_start __P((usbd_request_handle)); 141 void ohci_device_ctrl_abort __P((usbd_request_handle)); 142 void ohci_device_ctrl_close __P((usbd_pipe_handle)); 143 void ohci_device_ctrl_done __P((usbd_request_handle)); 144 145 usbd_status ohci_device_bulk_transfer __P((usbd_request_handle)); 146 usbd_status ohci_device_bulk_start __P((usbd_request_handle)); 147 void ohci_device_bulk_abort __P((usbd_request_handle)); 148 void ohci_device_bulk_close __P((usbd_pipe_handle)); 149 void ohci_device_bulk_done __P((usbd_request_handle)); 150 151 usbd_status ohci_device_intr_transfer __P((usbd_request_handle)); 152 usbd_status ohci_device_intr_start __P((usbd_request_handle)); 153 void ohci_device_intr_abort __P((usbd_request_handle)); 154 void ohci_device_intr_close __P((usbd_pipe_handle)); 155 void ohci_device_intr_done __P((usbd_request_handle)); 156 157 usbd_status ohci_device_isoc_transfer __P((usbd_request_handle)); 158 usbd_status ohci_device_isoc_start __P((usbd_request_handle)); 159 void ohci_device_isoc_abort __P((usbd_request_handle)); 160 void ohci_device_isoc_close __P((usbd_pipe_handle)); 161 void ohci_device_isoc_done __P((usbd_request_handle)); 162 163 usbd_status ohci_device_setintr __P((ohci_softc_t *sc, 164 struct ohci_pipe *pipe, int ival)); 165 166 int ohci_str __P((usb_string_descriptor_t *, int, char *)); 167 168 void ohci_timeout __P((void *)); 169 void ohci_rhsc_able __P((ohci_softc_t *, int)); 170 171 void ohci_close_pipe __P((usbd_pipe_handle pipe, 172 ohci_soft_ed_t *head)); 173 void ohci_abort_req __P((usbd_request_handle reqh, 174 usbd_status status)); 175 void ohci_abort_req_end __P((void *)); 176 177 void ohci_device_clear_toggle __P((usbd_pipe_handle pipe)); 178 void ohci_noop __P((usbd_pipe_handle pipe)); 179 180 #ifdef USB_DEBUG 181 ohci_softc_t *thesc; 182 void ohci_dumpregs __P((ohci_softc_t *)); 183 void ohci_dump_tds __P((ohci_soft_td_t *)); 184 void ohci_dump_td __P((ohci_soft_td_t *)); 185 void ohci_dump_ed __P((ohci_soft_ed_t *)); 186 #endif 187 188 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 189 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 190 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 191 192 /* Reverse the bits in a value 0 .. 31 */ 193 static u_int8_t revbits[OHCI_NO_INTRS] = 194 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 195 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 196 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 197 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 198 199 struct ohci_pipe { 200 struct usbd_pipe pipe; 201 ohci_soft_ed_t *sed; 202 ohci_soft_td_t *tail; 203 /* Info needed for different pipe kinds. */ 204 union { 205 /* Control pipe */ 206 struct { 207 usb_dma_t reqdma; 208 u_int length; 209 ohci_soft_td_t *setup, *data, *stat; 210 } ctl; 211 /* Interrupt pipe */ 212 struct { 213 int nslots; 214 int pos; 215 } intr; 216 /* Bulk pipe */ 217 struct { 218 u_int length; 219 int isread; 220 } bulk; 221 /* Iso pipe */ 222 struct iso { 223 int xxxxx; 224 } iso; 225 } u; 226 }; 227 228 #define OHCI_INTR_ENDPT 1 229 230 struct usbd_bus_methods ohci_bus_methods = { 231 ohci_open, 232 ohci_poll, 233 ohci_allocm, 234 ohci_freem, 235 }; 236 237 struct usbd_pipe_methods ohci_root_ctrl_methods = { 238 ohci_root_ctrl_transfer, 239 ohci_root_ctrl_start, 240 ohci_root_ctrl_abort, 241 ohci_root_ctrl_close, 242 ohci_noop, 243 0, 244 }; 245 246 struct usbd_pipe_methods ohci_root_intr_methods = { 247 ohci_root_intr_transfer, 248 ohci_root_intr_start, 249 ohci_root_intr_abort, 250 ohci_root_intr_close, 251 ohci_noop, 252 ohci_root_intr_done, 253 }; 254 255 struct usbd_pipe_methods ohci_device_ctrl_methods = { 256 ohci_device_ctrl_transfer, 257 ohci_device_ctrl_start, 258 ohci_device_ctrl_abort, 259 ohci_device_ctrl_close, 260 ohci_noop, 261 ohci_device_ctrl_done, 262 }; 263 264 struct usbd_pipe_methods ohci_device_intr_methods = { 265 ohci_device_intr_transfer, 266 ohci_device_intr_start, 267 ohci_device_intr_abort, 268 ohci_device_intr_close, 269 ohci_device_clear_toggle, 270 ohci_device_intr_done, 271 }; 272 273 struct usbd_pipe_methods ohci_device_bulk_methods = { 274 ohci_device_bulk_transfer, 275 ohci_device_bulk_start, 276 ohci_device_bulk_abort, 277 ohci_device_bulk_close, 278 ohci_device_clear_toggle, 279 ohci_device_bulk_done, 280 }; 281 282 #if 0 283 struct usbd_pipe_methods ohci_device_isoc_methods = { 284 ohci_device_isoc_transfer, 285 ohci_device_isoc_start, 286 ohci_device_isoc_abort, 287 ohci_device_isoc_close, 288 ohci_noop, 289 ohci_device_isoc_done, 290 }; 291 #endif 292 293 int 294 ohci_activate(self, act) 295 device_ptr_t self; 296 enum devact act; 297 { 298 struct ohci_softc *sc = (struct ohci_softc *)self; 299 int rv = 0; 300 301 switch (act) { 302 case DVACT_ACTIVATE: 303 return (EOPNOTSUPP); 304 break; 305 306 case DVACT_DEACTIVATE: 307 if (sc->sc_child != NULL) 308 rv = config_deactivate(sc->sc_child); 309 break; 310 } 311 return (rv); 312 } 313 314 int 315 ohci_detach(sc, flags) 316 struct ohci_softc *sc; 317 int flags; 318 { 319 int rv = 0; 320 321 if (sc->sc_child != NULL) 322 rv = config_detach(sc->sc_child, flags); 323 324 if (rv != 0) 325 return (rv); 326 327 powerhook_disestablish(sc->sc_powerhook); 328 /* free data structures XXX */ 329 330 return (rv); 331 } 332 333 ohci_soft_ed_t * 334 ohci_alloc_sed(sc) 335 ohci_softc_t *sc; 336 { 337 ohci_soft_ed_t *sed; 338 usbd_status r; 339 int i, offs; 340 usb_dma_t dma; 341 342 if (!sc->sc_freeeds) { 343 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 344 r = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 345 OHCI_ED_ALIGN, &dma); 346 if (r != USBD_NORMAL_COMPLETION) 347 return (0); 348 for(i = 0; i < OHCI_SED_CHUNK; i++) { 349 offs = i * OHCI_SED_SIZE; 350 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 351 sed->physaddr = DMAADDR(&dma) + offs; 352 sed->next = sc->sc_freeeds; 353 sc->sc_freeeds = sed; 354 } 355 } 356 sed = sc->sc_freeeds; 357 sc->sc_freeeds = sed->next; 358 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 359 sed->next = 0; 360 return (sed); 361 } 362 363 void 364 ohci_free_sed(sc, sed) 365 ohci_softc_t *sc; 366 ohci_soft_ed_t *sed; 367 { 368 sed->next = sc->sc_freeeds; 369 sc->sc_freeeds = sed; 370 } 371 372 ohci_soft_td_t * 373 ohci_alloc_std(sc) 374 ohci_softc_t *sc; 375 { 376 ohci_soft_td_t *std; 377 usbd_status r; 378 int i, offs; 379 usb_dma_t dma; 380 381 if (!sc->sc_freetds) { 382 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 383 r = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 384 OHCI_TD_ALIGN, &dma); 385 if (r != USBD_NORMAL_COMPLETION) 386 return (0); 387 for(i = 0; i < OHCI_STD_CHUNK; i++) { 388 offs = i * OHCI_STD_SIZE; 389 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 390 std->physaddr = DMAADDR(&dma) + offs; 391 std->nexttd = sc->sc_freetds; 392 sc->sc_freetds = std; 393 } 394 } 395 std = sc->sc_freetds; 396 sc->sc_freetds = std->nexttd; 397 memset(&std->td, 0, sizeof(ohci_td_t)); 398 std->nexttd = 0; 399 return (std); 400 } 401 402 void 403 ohci_free_std(sc, std) 404 ohci_softc_t *sc; 405 ohci_soft_td_t *std; 406 { 407 std->nexttd = sc->sc_freetds; 408 sc->sc_freetds = std; 409 } 410 411 usbd_status 412 ohci_alloc_std_chain(upipe, sc, len, rd, shortok, dma, sp, ep) 413 struct ohci_pipe *upipe; 414 ohci_softc_t *sc; 415 int len, rd, shortok; 416 usb_dma_t *dma; 417 ohci_soft_td_t *sp, **ep; 418 { 419 ohci_soft_td_t *next, *cur; 420 ohci_physaddr_t dataphys, dataphysend; 421 u_int32_t intr; 422 int curlen; 423 424 DPRINTFN(len >= 4096,("ohci_alloc_std_chain: start len=%d\n", len)); 425 cur = sp; 426 dataphys = DMAADDR(dma); 427 dataphysend = OHCI_PAGE(dataphys + len - 1); 428 for (;;) { 429 next = ohci_alloc_std(sc); 430 if (next == 0) { 431 /* XXX free chain */ 432 return (USBD_NOMEM); 433 } 434 435 /* The OHCI hardware can handle at most one page crossing. */ 436 if (OHCI_PAGE(dataphys) == dataphysend || 437 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 438 /* we can handle it in this TD */ 439 curlen = len; 440 } else { 441 /* must use multiple TDs, fill as much as possible. */ 442 curlen = 2 * OHCI_PAGE_SIZE - 443 (dataphys & (OHCI_PAGE_SIZE-1)); 444 } 445 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 446 "dataphysend=0x%08x len=%d curlen=%d\n", 447 dataphys, dataphysend, 448 len, curlen)); 449 len -= curlen; 450 451 intr = len == 0 ? OHCI_TD_SET_DI(1) : OHCI_TD_NOINTR; 452 cur->td.td_flags = LE( 453 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 454 intr | OHCI_TD_TOGGLE_CARRY | 455 (shortok ? OHCI_TD_R : 0)); 456 cur->td.td_cbp = LE(dataphys); 457 cur->nexttd = next; 458 cur->td.td_nexttd = LE(next->physaddr); 459 cur->td.td_be = LE(dataphys + curlen - 1); 460 cur->len = curlen; 461 cur->flags = OHCI_ADD_LEN; 462 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 463 dataphys, dataphys + curlen - 1)); 464 if (len == 0) 465 break; 466 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 467 dataphys += curlen; 468 cur = next; 469 } 470 cur->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 471 *ep = next; 472 473 return (USBD_NORMAL_COMPLETION); 474 } 475 476 void 477 ohci_free_std_chain(sc, std, stdend) 478 ohci_softc_t *sc; 479 ohci_soft_td_t *std; 480 ohci_soft_td_t *stdend; 481 { 482 ohci_soft_td_t *p; 483 484 for (; std != stdend; std = p) { 485 p = std->nexttd; 486 ohci_free_std(sc, std); 487 } 488 } 489 490 usbd_status 491 ohci_init(sc) 492 ohci_softc_t *sc; 493 { 494 ohci_soft_ed_t *sed, *psed; 495 usbd_status r; 496 int rev; 497 int i; 498 u_int32_t s, ctl, ival, hcr, fm, per; 499 500 DPRINTF(("ohci_init: start\n")); 501 rev = OREAD4(sc, OHCI_REVISION); 502 #if defined(__OpenBSD__) 503 printf(", OHCI version %d.%d%s\n", 504 #else 505 printf("%s: OHCI version %d.%d%s\n", USBDEVNAME(sc->sc_bus.bdev), 506 #endif 507 OHCI_REV_HI(rev), OHCI_REV_LO(rev), 508 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 509 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 510 printf("%s: unsupported OHCI revision\n", 511 USBDEVNAME(sc->sc_bus.bdev)); 512 return (USBD_INVAL); 513 } 514 515 for (i = 0; i < OHCI_HASH_SIZE; i++) 516 LIST_INIT(&sc->sc_hash_tds[i]); 517 518 /* Allocate the HCCA area. */ 519 r = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 520 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 521 if (r != USBD_NORMAL_COMPLETION) 522 return (r); 523 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 524 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 525 526 sc->sc_eintrs = OHCI_NORMAL_INTRS; 527 528 sc->sc_ctrl_head = ohci_alloc_sed(sc); 529 if (!sc->sc_ctrl_head) { 530 r = USBD_NOMEM; 531 goto bad1; 532 } 533 sc->sc_ctrl_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 534 535 sc->sc_bulk_head = ohci_alloc_sed(sc); 536 if (!sc->sc_bulk_head) { 537 r = USBD_NOMEM; 538 goto bad2; 539 } 540 sc->sc_bulk_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 541 542 /* Allocate all the dummy EDs that make up the interrupt tree. */ 543 for (i = 0; i < OHCI_NO_EDS; i++) { 544 sed = ohci_alloc_sed(sc); 545 if (!sed) { 546 while (--i >= 0) 547 ohci_free_sed(sc, sc->sc_eds[i]); 548 r = USBD_NOMEM; 549 goto bad3; 550 } 551 /* All ED fields are set to 0. */ 552 sc->sc_eds[i] = sed; 553 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 554 if (i != 0) { 555 psed = sc->sc_eds[(i-1) / 2]; 556 sed->next = psed; 557 sed->ed.ed_nexted = LE(psed->physaddr); 558 } 559 } 560 /* 561 * Fill HCCA interrupt table. The bit reversal is to get 562 * the tree set up properly to spread the interrupts. 563 */ 564 for (i = 0; i < OHCI_NO_INTRS; i++) 565 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 566 LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 567 568 /* Determine in what context we are running. */ 569 ctl = OREAD4(sc, OHCI_CONTROL); 570 if (ctl & OHCI_IR) { 571 /* SMM active, request change */ 572 DPRINTF(("ohci_init: SMM active, request owner change\n")); 573 s = OREAD4(sc, OHCI_COMMAND_STATUS); 574 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 575 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 576 delay(1000); 577 ctl = OREAD4(sc, OHCI_CONTROL); 578 } 579 if ((ctl & OHCI_IR) == 0) { 580 printf("%s: SMM does not respond, resetting\n", 581 USBDEVNAME(sc->sc_bus.bdev)); 582 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 583 goto reset; 584 } 585 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 586 /* BIOS started controller. */ 587 DPRINTF(("ohci_init: BIOS active\n")); 588 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 589 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 590 delay(USB_RESUME_DELAY * 1000); 591 } 592 } else { 593 DPRINTF(("ohci_init: cold started\n")); 594 reset: 595 /* Controller was cold started. */ 596 delay(USB_BUS_RESET_DELAY * 1000); 597 } 598 599 /* 600 * This reset should not be necessary according to the OHCI spec, but 601 * without it some controllers do not start. 602 */ 603 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 604 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 605 delay(USB_BUS_RESET_DELAY * 1000); 606 607 /* We now own the host controller and the bus has been reset. */ 608 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 609 610 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 611 /* Nominal time for a reset is 10 us. */ 612 for (i = 0; i < 10; i++) { 613 delay(10); 614 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 615 if (!hcr) 616 break; 617 } 618 if (hcr) { 619 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 620 r = USBD_IOERROR; 621 goto bad3; 622 } 623 #ifdef USB_DEBUG 624 thesc = sc; 625 if (ohcidebug > 15) 626 ohci_dumpregs(sc); 627 #endif 628 629 /* The controller is now in suspend state, we have 2ms to finish. */ 630 631 /* Set up HC registers. */ 632 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 633 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 634 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 635 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 636 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 637 ctl = OREAD4(sc, OHCI_CONTROL); 638 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 639 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 640 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 641 /* And finally start it! */ 642 OWRITE4(sc, OHCI_CONTROL, ctl); 643 644 /* 645 * The controller is now OPERATIONAL. Set a some final 646 * registers that should be set earlier, but that the 647 * controller ignores when in the SUSPEND state. 648 */ 649 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 650 fm |= OHCI_FSMPS(ival) | ival; 651 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 652 per = OHCI_PERIODIC(ival); /* 90% periodic */ 653 OWRITE4(sc, OHCI_PERIODIC_START, per); 654 655 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 656 657 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 658 659 #ifdef USB_DEBUG 660 if (ohcidebug > 5) 661 ohci_dumpregs(sc); 662 #endif 663 664 /* Set up the bus struct. */ 665 sc->sc_bus.methods = &ohci_bus_methods; 666 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 667 668 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 669 670 return (USBD_NORMAL_COMPLETION); 671 672 bad3: 673 ohci_free_sed(sc, sc->sc_ctrl_head); 674 bad2: 675 ohci_free_sed(sc, sc->sc_bulk_head); 676 bad1: 677 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 678 return (r); 679 } 680 681 usbd_status 682 ohci_allocm(bus, dma, size) 683 struct usbd_bus *bus; 684 usb_dma_t *dma; 685 u_int32_t size; 686 { 687 struct ohci_softc *sc = (struct ohci_softc *)bus; 688 689 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 690 } 691 692 void 693 ohci_freem(bus, dma) 694 struct usbd_bus *bus; 695 usb_dma_t *dma; 696 { 697 struct ohci_softc *sc = (struct ohci_softc *)bus; 698 699 usb_freemem(&sc->sc_bus, dma); 700 } 701 702 #if !defined(__OpenBSD__) 703 void 704 ohci_power(why, v) 705 int why; 706 void *v; 707 { 708 #ifdef USB_DEBUG 709 ohci_softc_t *sc = v; 710 711 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 712 /* XXX should suspend/resume */ 713 ohci_dumpregs(sc); 714 #endif 715 } 716 #endif /* !defined(__OpenBSD__) */ 717 718 #ifdef USB_DEBUG 719 void ohcidump(void); 720 void ohcidump(void) { ohci_dumpregs(thesc); } 721 722 void 723 ohci_dumpregs(sc) 724 ohci_softc_t *sc; 725 { 726 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 727 OREAD4(sc, OHCI_REVISION), 728 OREAD4(sc, OHCI_CONTROL), 729 OREAD4(sc, OHCI_COMMAND_STATUS))); 730 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 731 OREAD4(sc, OHCI_INTERRUPT_STATUS), 732 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 733 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 734 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 735 OREAD4(sc, OHCI_HCCA), 736 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 737 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 738 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 739 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 740 OREAD4(sc, OHCI_BULK_HEAD_ED), 741 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 742 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 743 OREAD4(sc, OHCI_DONE_HEAD), 744 OREAD4(sc, OHCI_FM_INTERVAL), 745 OREAD4(sc, OHCI_FM_REMAINING))); 746 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 747 OREAD4(sc, OHCI_FM_NUMBER), 748 OREAD4(sc, OHCI_PERIODIC_START), 749 OREAD4(sc, OHCI_LS_THRESHOLD))); 750 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 751 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 752 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 753 OREAD4(sc, OHCI_RH_STATUS))); 754 DPRINTF((" port1=0x%08x port2=0x%08x\n", 755 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 756 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 757 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 758 LE(sc->sc_hcca->hcca_frame_number), 759 LE(sc->sc_hcca->hcca_done_head))); 760 } 761 #endif 762 763 int 764 ohci_intr(p) 765 void *p; 766 { 767 ohci_softc_t *sc = p; 768 u_int32_t intrs, eintrs; 769 ohci_physaddr_t done; 770 771 /* In case the interrupt occurs before initialization has completed. */ 772 if (sc == NULL || sc->sc_hcca == NULL) { 773 #ifdef DIAGNOSTIC 774 printf("ohci_intr: sc->sc_hcca == NULL\n"); 775 #endif 776 return (0); 777 } 778 779 intrs = 0; 780 done = LE(sc->sc_hcca->hcca_done_head); 781 if (done != 0) { 782 sc->sc_hcca->hcca_done_head = 0; 783 if (done & ~OHCI_DONE_INTRS) 784 intrs = OHCI_WDH; 785 if (done & OHCI_DONE_INTRS) 786 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 787 } else 788 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 789 if (!intrs) 790 return (0); 791 intrs &= ~OHCI_MIE; 792 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 793 eintrs = intrs & sc->sc_eintrs; 794 if (!eintrs) 795 return (0); 796 797 sc->sc_bus.intr_context++; 798 sc->sc_bus.no_intrs++; 799 DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n", 800 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 801 (u_int)eintrs)); 802 803 if (eintrs & OHCI_SO) { 804 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev)); 805 /* XXX do what */ 806 intrs &= ~OHCI_SO; 807 } 808 if (eintrs & OHCI_WDH) { 809 ohci_process_done(sc, done &~ OHCI_DONE_INTRS); 810 intrs &= ~OHCI_WDH; 811 } 812 if (eintrs & OHCI_RD) { 813 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 814 /* XXX process resume detect */ 815 } 816 if (eintrs & OHCI_UE) { 817 printf("%s: unrecoverable error, controller halted\n", 818 USBDEVNAME(sc->sc_bus.bdev)); 819 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 820 /* XXX what else */ 821 } 822 if (eintrs & OHCI_RHSC) { 823 ohci_rhsc(sc, sc->sc_intrreqh); 824 intrs &= ~OHCI_RHSC; 825 826 /* 827 * Disable RHSC interrupt for now, because it will be 828 * on until the port has been reset. 829 */ 830 ohci_rhsc_able(sc, 0); 831 } 832 833 sc->sc_bus.intr_context--; 834 835 /* Block unprocessed interrupts. XXX */ 836 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 837 sc->sc_eintrs &= ~intrs; 838 839 return (1); 840 } 841 842 void 843 ohci_rhsc_able(sc, on) 844 ohci_softc_t *sc; 845 int on; 846 { 847 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 848 if (on) { 849 sc->sc_eintrs |= OHCI_RHSC; 850 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 851 } else { 852 sc->sc_eintrs &= ~OHCI_RHSC; 853 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 854 } 855 } 856 857 #ifdef USB_DEBUG 858 char *ohci_cc_strs[] = { 859 "NO_ERROR", 860 "CRC", 861 "BIT_STUFFING", 862 "DATA_TOGGLE_MISMATCH", 863 "STALL", 864 "DEVICE_NOT_RESPONDING", 865 "PID_CHECK_FAILURE", 866 "UNEXPECTED_PID", 867 "DATA_OVERRUN", 868 "DATA_UNDERRUN", 869 "BUFFER_OVERRUN", 870 "BUFFER_UNDERRUN", 871 "NOT_ACCESSED", 872 }; 873 #endif 874 875 void 876 ohci_process_done(sc, done) 877 ohci_softc_t *sc; 878 ohci_physaddr_t done; 879 { 880 ohci_soft_td_t *std, *sdone, *stdnext; 881 usbd_request_handle reqh; 882 int len, cc; 883 884 DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done)); 885 886 /* Reverse the done list. */ 887 for (sdone = 0; done; done = LE(std->td.td_nexttd)) { 888 std = ohci_hash_find_td(sc, done); 889 std->dnext = sdone; 890 sdone = std; 891 } 892 893 #ifdef USB_DEBUG 894 if (ohcidebug > 10) { 895 DPRINTF(("ohci_process_done: TD done:\n")); 896 ohci_dump_tds(sdone); 897 } 898 #endif 899 900 for (std = sdone; std; std = stdnext) { 901 reqh = std->reqh; 902 stdnext = std->dnext; 903 DPRINTFN(10, ("ohci_process_done: std=%p reqh=%p hcpriv=%p\n", 904 std, reqh, reqh->hcpriv)); 905 cc = OHCI_TD_GET_CC(LE(std->td.td_flags)); 906 usb_untimeout(ohci_timeout, reqh, reqh->timo_handle); 907 if (reqh->status == USBD_CANCELLED || 908 reqh->status == USBD_TIMEOUT) { 909 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 910 reqh)); 911 /* Handled by abort routine. */ 912 } else if (cc == OHCI_CC_NO_ERROR) { 913 len = std->len; 914 if (std->td.td_cbp != 0) 915 len -= LE(std->td.td_be) - 916 LE(std->td.td_cbp) + 1; 917 if (std->flags & OHCI_ADD_LEN) 918 reqh->actlen += len; 919 if (std->flags & OHCI_CALL_DONE) { 920 reqh->status = USBD_NORMAL_COMPLETION; 921 usb_transfer_complete(reqh); 922 } 923 ohci_hash_rem_td(sc, std); 924 ohci_free_std(sc, std); 925 } else { 926 /* 927 * Endpoint is halted. First unlink all the TDs 928 * belonging to the failed transfer, and then restart 929 * the endpoint. 930 */ 931 ohci_soft_td_t *p, *n; 932 struct ohci_pipe *opipe = 933 (struct ohci_pipe *)reqh->pipe; 934 935 DPRINTFN(-1,("ohci_process_done: error cc=%d (%s)\n", 936 OHCI_TD_GET_CC(LE(std->td.td_flags)), 937 ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td.td_flags))])); 938 939 /* remove TDs */ 940 for (p = std; p->reqh == reqh; p = n) { 941 n = p->nexttd; 942 ohci_hash_rem_td(sc, p); 943 ohci_free_std(sc, p); 944 } 945 946 /* clear halt */ 947 opipe->sed->ed.ed_headp = LE(p->physaddr); 948 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 949 950 if (cc == OHCI_CC_STALL) 951 reqh->status = USBD_STALLED; 952 else 953 reqh->status = USBD_IOERROR; 954 usb_transfer_complete(reqh); 955 } 956 } 957 } 958 959 void 960 ohci_device_ctrl_done(reqh) 961 usbd_request_handle reqh; 962 { 963 DPRINTFN(10,("ohci_ctrl_done: reqh=%p\n", reqh)); 964 965 #ifdef DIAGNOSTIC 966 if (!(reqh->rqflags & URQ_REQUEST)) { 967 panic("ohci_ctrl_done: not a request\n"); 968 } 969 #endif 970 reqh->hcpriv = 0; 971 } 972 973 void 974 ohci_device_intr_done(reqh) 975 usbd_request_handle reqh; 976 { 977 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 978 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 979 ohci_soft_ed_t *sed = opipe->sed; 980 ohci_soft_td_t *data, *tail; 981 982 983 DPRINTFN(10,("ohci_intr_done: reqh=%p, actlen=%d\n", 984 reqh, reqh->actlen)); 985 986 reqh->hcpriv = 0; 987 988 if (reqh->pipe->repeat) { 989 data = opipe->tail; 990 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 991 if (!tail) { 992 reqh->status = USBD_NOMEM; 993 return; 994 } 995 tail->reqh = 0; 996 997 data->td.td_flags = LE( 998 OHCI_TD_IN | OHCI_TD_NOCC | 999 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1000 if (reqh->flags & USBD_SHORT_XFER_OK) 1001 data->td.td_flags |= LE(OHCI_TD_R); 1002 data->td.td_cbp = LE(DMAADDR(&reqh->dmabuf)); 1003 data->nexttd = tail; 1004 data->td.td_nexttd = LE(tail->physaddr); 1005 data->td.td_be = LE(LE(data->td.td_cbp) + reqh->length - 1); 1006 data->len = reqh->length; 1007 data->reqh = reqh; 1008 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1009 reqh->hcpriv = data; 1010 reqh->actlen = 0; 1011 1012 ohci_hash_add_td(sc, data); 1013 sed->ed.ed_tailp = LE(tail->physaddr); 1014 opipe->tail = tail; 1015 } 1016 } 1017 1018 void 1019 ohci_device_bulk_done(reqh) 1020 usbd_request_handle reqh; 1021 { 1022 DPRINTFN(10,("ohci_bulk_done: reqh=%p, actlen=%d\n", 1023 reqh, reqh->actlen)); 1024 1025 reqh->hcpriv = 0; 1026 } 1027 1028 void 1029 ohci_rhsc(sc, reqh) 1030 ohci_softc_t *sc; 1031 usbd_request_handle reqh; 1032 { 1033 usbd_pipe_handle pipe; 1034 struct ohci_pipe *opipe; 1035 u_char *p; 1036 int i, m; 1037 int hstatus; 1038 1039 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1040 DPRINTF(("ohci_rhsc: sc=%p reqh=%p hstatus=0x%08x\n", 1041 sc, reqh, hstatus)); 1042 1043 if (reqh == 0) { 1044 /* Just ignore the change. */ 1045 return; 1046 } 1047 1048 pipe = reqh->pipe; 1049 opipe = (struct ohci_pipe *)pipe; 1050 1051 p = KERNADDR(&reqh->dmabuf); 1052 m = min(sc->sc_noport, reqh->length * 8 - 1); 1053 memset(p, 0, reqh->length); 1054 for (i = 1; i <= m; i++) { 1055 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1056 p[i/8] |= 1 << (i%8); 1057 } 1058 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1059 reqh->actlen = reqh->length; 1060 reqh->status = USBD_NORMAL_COMPLETION; 1061 1062 usb_transfer_complete(reqh); 1063 } 1064 1065 void 1066 ohci_root_intr_done(reqh) 1067 usbd_request_handle reqh; 1068 { 1069 reqh->hcpriv = 0; 1070 } 1071 1072 /* 1073 * Wait here until controller claims to have an interrupt. 1074 * Then call ohci_intr and return. Use timeout to avoid waiting 1075 * too long. 1076 */ 1077 void 1078 ohci_waitintr(sc, reqh) 1079 ohci_softc_t *sc; 1080 usbd_request_handle reqh; 1081 { 1082 int timo = reqh->timeout; 1083 int usecs; 1084 u_int32_t intrs; 1085 1086 reqh->status = USBD_IN_PROGRESS; 1087 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1088 usb_delay_ms(&sc->sc_bus, 1); 1089 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1090 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1091 #ifdef USB_DEBUG 1092 if (ohcidebug > 15) 1093 ohci_dumpregs(sc); 1094 #endif 1095 if (intrs) { 1096 ohci_intr(sc); 1097 if (reqh->status != USBD_IN_PROGRESS) 1098 return; 1099 } 1100 } 1101 1102 /* Timeout */ 1103 DPRINTF(("ohci_waitintr: timeout\n")); 1104 reqh->status = USBD_TIMEOUT; 1105 usb_transfer_complete(reqh); 1106 /* XXX should free TD */ 1107 } 1108 1109 void 1110 ohci_poll(bus) 1111 struct usbd_bus *bus; 1112 { 1113 ohci_softc_t *sc = (ohci_softc_t *)bus; 1114 1115 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1116 ohci_intr(sc); 1117 } 1118 1119 usbd_status 1120 ohci_device_request(reqh) 1121 usbd_request_handle reqh; 1122 { 1123 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 1124 usb_device_request_t *req = &reqh->request; 1125 usbd_device_handle dev = opipe->pipe.device; 1126 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1127 int addr = dev->address; 1128 ohci_soft_td_t *setup, *data = 0, *stat, *next, *tail; 1129 ohci_soft_ed_t *sed; 1130 int isread; 1131 int len; 1132 usbd_status r; 1133 int s; 1134 1135 isread = req->bmRequestType & UT_READ; 1136 len = UGETW(req->wLength); 1137 1138 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1139 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1140 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1141 UGETW(req->wIndex), len, addr, 1142 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1143 1144 setup = opipe->tail; 1145 stat = ohci_alloc_std(sc); 1146 if (!stat) { 1147 r = USBD_NOMEM; 1148 goto bad1; 1149 } 1150 tail = ohci_alloc_std(sc); 1151 if (!tail) { 1152 r = USBD_NOMEM; 1153 goto bad2; 1154 } 1155 tail->reqh = 0; 1156 1157 sed = opipe->sed; 1158 opipe->u.ctl.length = len; 1159 1160 /* Update device address and length since they may have changed. */ 1161 /* XXX This only needs to be done once, but it's too early in open. */ 1162 sed->ed.ed_flags = LE( 1163 (LE(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1164 OHCI_ED_SET_FA(addr) | 1165 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1166 1167 /* Set up data transaction */ 1168 if (len != 0) { 1169 data = ohci_alloc_std(sc); 1170 if (!data) { 1171 r = USBD_NOMEM; 1172 goto bad3; 1173 } 1174 data->td.td_flags = LE( 1175 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 1176 OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR | 1177 (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0)); 1178 data->td.td_cbp = LE(DMAADDR(&reqh->dmabuf)); 1179 data->nexttd = stat; 1180 data->td.td_nexttd = LE(stat->physaddr); 1181 data->td.td_be = LE(LE(data->td.td_cbp) + len - 1); 1182 data->len = len; 1183 data->reqh = reqh; 1184 data->flags = OHCI_ADD_LEN; 1185 1186 next = data; 1187 stat->flags = OHCI_CALL_DONE; 1188 } else { 1189 next = stat; 1190 /* XXX ADD_LEN? */ 1191 stat->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1192 } 1193 1194 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1195 1196 setup->td.td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC | 1197 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1198 setup->td.td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma)); 1199 setup->nexttd = next; 1200 setup->td.td_nexttd = LE(next->physaddr); 1201 setup->td.td_be = LE(LE(setup->td.td_cbp) + sizeof *req - 1); 1202 setup->len = 0; /* XXX The number of byte we count */ 1203 setup->reqh = reqh; 1204 setup->flags = 0; 1205 reqh->hcpriv = setup; 1206 1207 stat->td.td_flags = LE( 1208 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC | 1209 OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1210 stat->td.td_cbp = 0; 1211 stat->nexttd = tail; 1212 stat->td.td_nexttd = LE(tail->physaddr); 1213 stat->td.td_be = 0; 1214 stat->len = 0; 1215 stat->reqh = reqh; 1216 1217 #if USB_DEBUG 1218 if (ohcidebug > 5) { 1219 DPRINTF(("ohci_device_request:\n")); 1220 ohci_dump_ed(sed); 1221 ohci_dump_tds(setup); 1222 } 1223 #endif 1224 1225 /* Insert ED in schedule */ 1226 s = splusb(); 1227 ohci_hash_add_td(sc, setup); 1228 if (len != 0) 1229 ohci_hash_add_td(sc, data); 1230 ohci_hash_add_td(sc, stat); 1231 sed->ed.ed_tailp = LE(tail->physaddr); 1232 opipe->tail = tail; 1233 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1234 if (reqh->timeout && !sc->sc_bus.use_polling) { 1235 usb_timeout(ohci_timeout, reqh, 1236 MS_TO_TICKS(reqh->timeout), reqh->timo_handle); 1237 } 1238 splx(s); 1239 1240 #if USB_DEBUG 1241 if (ohcidebug > 5) { 1242 delay(5000); 1243 DPRINTF(("ohci_device_request: status=%x\n", 1244 OREAD4(sc, OHCI_COMMAND_STATUS))); 1245 ohci_dump_ed(sed); 1246 ohci_dump_tds(setup); 1247 } 1248 #endif 1249 1250 return (USBD_NORMAL_COMPLETION); 1251 1252 bad3: 1253 ohci_free_std(sc, tail); 1254 bad2: 1255 ohci_free_std(sc, stat); 1256 bad1: 1257 return (r); 1258 } 1259 1260 /* 1261 * Add an ED to the schedule. Called at splusb(). 1262 */ 1263 void 1264 ohci_add_ed(sed, head) 1265 ohci_soft_ed_t *sed; 1266 ohci_soft_ed_t *head; 1267 { 1268 SPLUSBCHECK; 1269 sed->next = head->next; 1270 sed->ed.ed_nexted = head->ed.ed_nexted; 1271 head->next = sed; 1272 head->ed.ed_nexted = LE(sed->physaddr); 1273 } 1274 1275 /* 1276 * Remove an ED from the schedule. Called at splusb(). 1277 */ 1278 void 1279 ohci_rem_ed(sed, head) 1280 ohci_soft_ed_t *sed; 1281 ohci_soft_ed_t *head; 1282 { 1283 ohci_soft_ed_t *p; 1284 1285 SPLUSBCHECK; 1286 1287 /* XXX */ 1288 for (p = head; p && p->next != sed; p = p->next) 1289 ; 1290 if (!p) 1291 panic("ohci_rem_ed: ED not found\n"); 1292 p->next = sed->next; 1293 p->ed.ed_nexted = sed->ed.ed_nexted; 1294 } 1295 1296 /* 1297 * When a transfer is completed the TD is added to the done queue by 1298 * the host controller. This queue is the processed by software. 1299 * Unfortunately the queue contains the physical address of the TD 1300 * and we have no simple way to translate this back to a kernel address. 1301 * To make the translation possible (and fast) we use a hash table of 1302 * TDs currently in the schedule. The physical address is used as the 1303 * hash value. 1304 */ 1305 1306 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1307 /* Called at splusb() */ 1308 void 1309 ohci_hash_add_td(sc, std) 1310 ohci_softc_t *sc; 1311 ohci_soft_td_t *std; 1312 { 1313 int h = HASH(std->physaddr); 1314 1315 SPLUSBCHECK; 1316 1317 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1318 } 1319 1320 /* Called at splusb() */ 1321 void 1322 ohci_hash_rem_td(sc, std) 1323 ohci_softc_t *sc; 1324 ohci_soft_td_t *std; 1325 { 1326 SPLUSBCHECK; 1327 1328 LIST_REMOVE(std, hnext); 1329 } 1330 1331 ohci_soft_td_t * 1332 ohci_hash_find_td(sc, a) 1333 ohci_softc_t *sc; 1334 ohci_physaddr_t a; 1335 { 1336 int h = HASH(a); 1337 ohci_soft_td_t *std; 1338 1339 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1340 std != 0; 1341 std = LIST_NEXT(std, hnext)) 1342 if (std->physaddr == a) 1343 return (std); 1344 panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a); 1345 } 1346 1347 void 1348 ohci_timeout(addr) 1349 void *addr; 1350 { 1351 usbd_request_handle reqh = addr; 1352 int s; 1353 1354 DPRINTF(("ohci_timeout: reqh=%p\n", reqh)); 1355 1356 s = splusb(); 1357 reqh->device->bus->intr_context++; 1358 ohci_abort_req(reqh, USBD_TIMEOUT); 1359 reqh->device->bus->intr_context--; 1360 splx(s); 1361 } 1362 1363 #ifdef USB_DEBUG 1364 void 1365 ohci_dump_tds(std) 1366 ohci_soft_td_t *std; 1367 { 1368 for (; std; std = std->nexttd) 1369 ohci_dump_td(std); 1370 } 1371 1372 void 1373 ohci_dump_td(std) 1374 ohci_soft_td_t *std; 1375 { 1376 DPRINTF(("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1377 "nexttd=0x%08lx be=0x%08lx\n", 1378 std, (u_long)std->physaddr, 1379 (int)LE(std->td.td_flags), 1380 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1381 OHCI_TD_GET_DI(LE(std->td.td_flags)), 1382 OHCI_TD_GET_EC(LE(std->td.td_flags)), 1383 OHCI_TD_GET_CC(LE(std->td.td_flags)), 1384 (u_long)LE(std->td.td_cbp), 1385 (u_long)LE(std->td.td_nexttd), (u_long)LE(std->td.td_be))); 1386 } 1387 1388 void 1389 ohci_dump_ed(sed) 1390 ohci_soft_ed_t *sed; 1391 { 1392 DPRINTF(("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx " 1393 "headp=%b nexted=0x%08lx\n", 1394 sed, (u_long)sed->physaddr, 1395 OHCI_ED_GET_FA(LE(sed->ed.ed_flags)), 1396 OHCI_ED_GET_EN(LE(sed->ed.ed_flags)), 1397 OHCI_ED_GET_MAXP(LE(sed->ed.ed_flags)), 1398 (int)LE(sed->ed.ed_flags), 1399 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1400 (u_long)LE(sed->ed.ed_tailp), 1401 (u_long)LE(sed->ed.ed_headp), "\20\1HALT\2CARRY", 1402 (u_long)LE(sed->ed.ed_nexted))); 1403 } 1404 #endif 1405 1406 usbd_status 1407 ohci_open(pipe) 1408 usbd_pipe_handle pipe; 1409 { 1410 usbd_device_handle dev = pipe->device; 1411 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1412 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1413 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1414 u_int8_t addr = dev->address; 1415 ohci_soft_ed_t *sed; 1416 ohci_soft_td_t *std; 1417 usbd_status r; 1418 int s; 1419 1420 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1421 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1422 if (addr == sc->sc_addr) { 1423 switch (ed->bEndpointAddress) { 1424 case USB_CONTROL_ENDPOINT: 1425 pipe->methods = &ohci_root_ctrl_methods; 1426 break; 1427 case UE_DIR_IN | OHCI_INTR_ENDPT: 1428 pipe->methods = &ohci_root_intr_methods; 1429 break; 1430 default: 1431 return (USBD_INVAL); 1432 } 1433 } else { 1434 sed = ohci_alloc_sed(sc); 1435 if (sed == 0) 1436 goto bad0; 1437 std = ohci_alloc_std(sc); 1438 if (std == 0) 1439 goto bad1; 1440 opipe->sed = sed; 1441 opipe->tail = std; 1442 sed->ed.ed_flags = LE( 1443 OHCI_ED_SET_FA(addr) | 1444 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1445 OHCI_ED_DIR_TD | 1446 (dev->lowspeed ? OHCI_ED_SPEED : 0) | 1447 ((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ? 1448 OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) | 1449 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1450 sed->ed.ed_headp = sed->ed.ed_tailp = LE(std->physaddr); 1451 1452 switch (ed->bmAttributes & UE_XFERTYPE) { 1453 case UE_CONTROL: 1454 pipe->methods = &ohci_device_ctrl_methods; 1455 r = usb_allocmem(&sc->sc_bus, 1456 sizeof(usb_device_request_t), 1457 0, &opipe->u.ctl.reqdma); 1458 if (r != USBD_NORMAL_COMPLETION) 1459 goto bad; 1460 s = splusb(); 1461 ohci_add_ed(sed, sc->sc_ctrl_head); 1462 splx(s); 1463 break; 1464 case UE_INTERRUPT: 1465 pipe->methods = &ohci_device_intr_methods; 1466 return (ohci_device_setintr(sc, opipe, ed->bInterval)); 1467 case UE_ISOCHRONOUS: 1468 printf("ohci_open: open iso unimplemented\n"); 1469 return (USBD_INVAL); 1470 case UE_BULK: 1471 pipe->methods = &ohci_device_bulk_methods; 1472 s = splusb(); 1473 ohci_add_ed(sed, sc->sc_bulk_head); 1474 splx(s); 1475 break; 1476 } 1477 } 1478 return (USBD_NORMAL_COMPLETION); 1479 1480 bad: 1481 ohci_free_std(sc, std); 1482 bad1: 1483 ohci_free_sed(sc, sed); 1484 bad0: 1485 return (USBD_NOMEM); 1486 1487 } 1488 1489 /* 1490 * Close a reqular pipe. 1491 * Assumes that there are no pending transactions. 1492 */ 1493 void 1494 ohci_close_pipe(pipe, head) 1495 usbd_pipe_handle pipe; 1496 ohci_soft_ed_t *head; 1497 { 1498 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1499 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1500 ohci_soft_ed_t *sed = opipe->sed; 1501 int s; 1502 1503 s = splusb(); 1504 #ifdef DIAGNOSTIC 1505 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 1506 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 1507 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) { 1508 ohci_physaddr_t td = sed->ed.ed_headp; 1509 ohci_soft_td_t *std; 1510 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]); 1511 std != 0; 1512 std = LIST_NEXT(std, hnext)) 1513 if (std->physaddr == td) 1514 break; 1515 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 1516 "tl=0x%x pipe=%p, std=%p\n", sed, 1517 (int)LE(sed->ed.ed_headp), (int)LE(sed->ed.ed_tailp), 1518 pipe, std); 1519 usb_delay_ms(&sc->sc_bus, 2); 1520 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 1521 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) 1522 printf("ohci_close_pipe: pipe still not empty\n"); 1523 } 1524 #endif 1525 ohci_rem_ed(sed, head); 1526 splx(s); 1527 ohci_free_std(sc, opipe->tail); 1528 ohci_free_sed(sc, opipe->sed); 1529 } 1530 1531 /* 1532 * Abort a device request. 1533 * If this routine is called at splusb() it guarantees that the request 1534 * will be removed from the hardware scheduling and that the callback 1535 * for it will be called with USBD_CANCELLED status. 1536 * It's impossible to guarantee that the requested transfer will not 1537 * have happened since the hardware runs concurrently. 1538 * If the transaction has already happened we rely on the ordinary 1539 * interrupt processing to process it. 1540 */ 1541 void 1542 ohci_abort_req(reqh, status) 1543 usbd_request_handle reqh; 1544 usbd_status status; 1545 { 1546 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 1547 ohci_soft_ed_t *sed; 1548 1549 DPRINTF(("ohci_abort_req: reqh=%p pipe=%p\n", reqh, opipe)); 1550 1551 reqh->status = status; 1552 1553 usb_untimeout(ohci_timeout, reqh, reqh->timo_handle); 1554 1555 sed = opipe->sed; 1556 DPRINTFN(1,("ohci_abort_req: stop ed=%p\n", sed)); 1557 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); /* force hardware skip */ 1558 1559 if (reqh->device->bus->intr_context) { 1560 /* We have no process context, so we can't use tsleep(). */ 1561 timeout(ohci_abort_req_end, reqh, hz / USB_FRAMES_PER_SECOND); 1562 } else { 1563 usb_delay_ms(opipe->pipe.device->bus, 1); 1564 ohci_abort_req_end(reqh); 1565 } 1566 } 1567 1568 void 1569 ohci_abort_req_end(v) 1570 void *v; 1571 { 1572 usbd_request_handle reqh = v; 1573 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 1574 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1575 ohci_soft_ed_t *sed; 1576 ohci_soft_td_t *p, *n; 1577 int s; 1578 1579 s = splusb(); 1580 1581 p = reqh->hcpriv; 1582 #ifdef DIAGNOSTIC 1583 if (!p) { 1584 printf("ohci_abort_req: hcpriv==0\n"); 1585 return; 1586 } 1587 #endif 1588 for (; p->reqh == reqh; p = n) { 1589 n = p->nexttd; 1590 ohci_hash_rem_td(sc, p); 1591 ohci_free_std(sc, p); 1592 } 1593 1594 sed = opipe->sed; 1595 DPRINTFN(2,("ohci_abort_req: set hd=%x, tl=%x\n", 1596 (int)LE(p->physaddr), (int)LE(sed->ed.ed_tailp))); 1597 sed->ed.ed_headp = p->physaddr; /* unlink TDs */ 1598 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); /* remove hardware skip */ 1599 1600 usb_transfer_complete(reqh); 1601 1602 splx(s); 1603 } 1604 1605 /* 1606 * Data structures and routines to emulate the root hub. 1607 */ 1608 usb_device_descriptor_t ohci_devd = { 1609 USB_DEVICE_DESCRIPTOR_SIZE, 1610 UDESC_DEVICE, /* type */ 1611 {0x00, 0x01}, /* USB version */ 1612 UCLASS_HUB, /* class */ 1613 USUBCLASS_HUB, /* subclass */ 1614 0, /* protocol */ 1615 64, /* max packet */ 1616 {0},{0},{0x00,0x01}, /* device id */ 1617 1,2,0, /* string indicies */ 1618 1 /* # of configurations */ 1619 }; 1620 1621 usb_config_descriptor_t ohci_confd = { 1622 USB_CONFIG_DESCRIPTOR_SIZE, 1623 UDESC_CONFIG, 1624 {USB_CONFIG_DESCRIPTOR_SIZE + 1625 USB_INTERFACE_DESCRIPTOR_SIZE + 1626 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1627 1, 1628 1, 1629 0, 1630 UC_SELF_POWERED, 1631 0 /* max power */ 1632 }; 1633 1634 usb_interface_descriptor_t ohci_ifcd = { 1635 USB_INTERFACE_DESCRIPTOR_SIZE, 1636 UDESC_INTERFACE, 1637 0, 1638 0, 1639 1, 1640 UCLASS_HUB, 1641 USUBCLASS_HUB, 1642 0, 1643 0 1644 }; 1645 1646 usb_endpoint_descriptor_t ohci_endpd = { 1647 USB_ENDPOINT_DESCRIPTOR_SIZE, 1648 UDESC_ENDPOINT, 1649 UE_DIR_IN | OHCI_INTR_ENDPT, 1650 UE_INTERRUPT, 1651 {8, 0}, /* max packet */ 1652 255 1653 }; 1654 1655 usb_hub_descriptor_t ohci_hubd = { 1656 USB_HUB_DESCRIPTOR_SIZE, 1657 UDESC_HUB, 1658 0, 1659 {0,0}, 1660 0, 1661 0, 1662 {0}, 1663 }; 1664 1665 int 1666 ohci_str(p, l, s) 1667 usb_string_descriptor_t *p; 1668 int l; 1669 char *s; 1670 { 1671 int i; 1672 1673 if (l == 0) 1674 return (0); 1675 p->bLength = 2 * strlen(s) + 2; 1676 if (l == 1) 1677 return (1); 1678 p->bDescriptorType = UDESC_STRING; 1679 l -= 2; 1680 for (i = 0; s[i] && l > 1; i++, l -= 2) 1681 USETW2(p->bString[i], 0, s[i]); 1682 return (2*i+2); 1683 } 1684 1685 /* 1686 * Simulate a hardware hub by handling all the necessary requests. 1687 */ 1688 usbd_status 1689 ohci_root_ctrl_transfer(reqh) 1690 usbd_request_handle reqh; 1691 { 1692 usbd_status r; 1693 1694 /* Insert last in queue. */ 1695 r = usb_insert_transfer(reqh); 1696 if (r != USBD_NORMAL_COMPLETION) 1697 return (r); 1698 1699 /* Pipe isn't running, start first */ 1700 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&reqh->pipe->queue))); 1701 } 1702 1703 usbd_status 1704 ohci_root_ctrl_start(reqh) 1705 usbd_request_handle reqh; 1706 { 1707 ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus; 1708 usb_device_request_t *req; 1709 void *buf; 1710 int port, i; 1711 int s, len, value, index, l, totlen = 0; 1712 usb_port_status_t ps; 1713 usb_hub_descriptor_t hubd; 1714 usbd_status r; 1715 u_int32_t v; 1716 1717 #ifdef DIAGNOSTIC 1718 if (!(reqh->rqflags & URQ_REQUEST)) 1719 /* XXX panic */ 1720 return (USBD_INVAL); 1721 #endif 1722 req = &reqh->request; 1723 1724 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 1725 req->bmRequestType, req->bRequest)); 1726 1727 len = UGETW(req->wLength); 1728 value = UGETW(req->wValue); 1729 index = UGETW(req->wIndex); 1730 1731 if (len != 0) 1732 buf = KERNADDR(&reqh->dmabuf); 1733 #ifdef DIAGNOSTIC 1734 else 1735 buf = 0; 1736 #endif 1737 1738 #define C(x,y) ((x) | ((y) << 8)) 1739 switch(C(req->bRequest, req->bmRequestType)) { 1740 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1741 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1742 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1743 /* 1744 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1745 * for the integrated root hub. 1746 */ 1747 break; 1748 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1749 if (len > 0) { 1750 *(u_int8_t *)buf = sc->sc_conf; 1751 totlen = 1; 1752 } 1753 break; 1754 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1755 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 1756 switch(value >> 8) { 1757 case UDESC_DEVICE: 1758 if ((value & 0xff) != 0) { 1759 r = USBD_IOERROR; 1760 goto ret; 1761 } 1762 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1763 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 1764 memcpy(buf, &ohci_devd, l); 1765 break; 1766 case UDESC_CONFIG: 1767 if ((value & 0xff) != 0) { 1768 r = USBD_IOERROR; 1769 goto ret; 1770 } 1771 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1772 memcpy(buf, &ohci_confd, l); 1773 buf = (char *)buf + l; 1774 len -= l; 1775 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1776 totlen += l; 1777 memcpy(buf, &ohci_ifcd, l); 1778 buf = (char *)buf + l; 1779 len -= l; 1780 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1781 totlen += l; 1782 memcpy(buf, &ohci_endpd, l); 1783 break; 1784 case UDESC_STRING: 1785 if (len == 0) 1786 break; 1787 *(u_int8_t *)buf = 0; 1788 totlen = 1; 1789 switch (value & 0xff) { 1790 case 1: /* Vendor */ 1791 totlen = ohci_str(buf, len, sc->sc_vendor); 1792 break; 1793 case 2: /* Product */ 1794 totlen = ohci_str(buf, len, "OHCI root hub"); 1795 break; 1796 } 1797 break; 1798 default: 1799 r = USBD_IOERROR; 1800 goto ret; 1801 } 1802 break; 1803 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1804 if (len > 0) { 1805 *(u_int8_t *)buf = 0; 1806 totlen = 1; 1807 } 1808 break; 1809 case C(UR_GET_STATUS, UT_READ_DEVICE): 1810 if (len > 1) { 1811 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1812 totlen = 2; 1813 } 1814 break; 1815 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1816 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1817 if (len > 1) { 1818 USETW(((usb_status_t *)buf)->wStatus, 0); 1819 totlen = 2; 1820 } 1821 break; 1822 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1823 if (value >= USB_MAX_DEVICES) { 1824 r = USBD_IOERROR; 1825 goto ret; 1826 } 1827 sc->sc_addr = value; 1828 break; 1829 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1830 if (value != 0 && value != 1) { 1831 r = USBD_IOERROR; 1832 goto ret; 1833 } 1834 sc->sc_conf = value; 1835 break; 1836 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1837 break; 1838 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1839 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1840 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1841 r = USBD_IOERROR; 1842 goto ret; 1843 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1844 break; 1845 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1846 break; 1847 /* Hub requests */ 1848 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1849 break; 1850 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1851 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1852 "port=%d feature=%d\n", 1853 index, value)); 1854 if (index < 1 || index > sc->sc_noport) { 1855 r = USBD_IOERROR; 1856 goto ret; 1857 } 1858 port = OHCI_RH_PORT_STATUS(index); 1859 switch(value) { 1860 case UHF_PORT_ENABLE: 1861 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 1862 break; 1863 case UHF_PORT_SUSPEND: 1864 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 1865 break; 1866 case UHF_PORT_POWER: 1867 OWRITE4(sc, port, UPS_LOW_SPEED); 1868 break; 1869 case UHF_C_PORT_CONNECTION: 1870 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 1871 break; 1872 case UHF_C_PORT_ENABLE: 1873 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 1874 break; 1875 case UHF_C_PORT_SUSPEND: 1876 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 1877 break; 1878 case UHF_C_PORT_OVER_CURRENT: 1879 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 1880 break; 1881 case UHF_C_PORT_RESET: 1882 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 1883 break; 1884 default: 1885 r = USBD_IOERROR; 1886 goto ret; 1887 } 1888 switch(value) { 1889 case UHF_C_PORT_CONNECTION: 1890 case UHF_C_PORT_ENABLE: 1891 case UHF_C_PORT_SUSPEND: 1892 case UHF_C_PORT_OVER_CURRENT: 1893 case UHF_C_PORT_RESET: 1894 /* Enable RHSC interrupt if condition is cleared. */ 1895 if ((OREAD4(sc, port) >> 16) == 0) 1896 ohci_rhsc_able(sc, 1); 1897 break; 1898 default: 1899 break; 1900 } 1901 break; 1902 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1903 if (value != 0) { 1904 r = USBD_IOERROR; 1905 goto ret; 1906 } 1907 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 1908 hubd = ohci_hubd; 1909 hubd.bNbrPorts = sc->sc_noport; 1910 USETW(hubd.wHubCharacteristics, 1911 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 1912 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 1913 /* XXX overcurrent */ 1914 ); 1915 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 1916 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 1917 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1918 hubd.DeviceRemovable[i++] = (u_int8_t)v; 1919 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1920 l = min(len, hubd.bDescLength); 1921 totlen = l; 1922 memcpy(buf, &hubd, l); 1923 break; 1924 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1925 if (len != 4) { 1926 r = USBD_IOERROR; 1927 goto ret; 1928 } 1929 memset(buf, 0, len); /* ? XXX */ 1930 totlen = len; 1931 break; 1932 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1933 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 1934 index)); 1935 if (index < 1 || index > sc->sc_noport) { 1936 r = USBD_IOERROR; 1937 goto ret; 1938 } 1939 if (len != 4) { 1940 r = USBD_IOERROR; 1941 goto ret; 1942 } 1943 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 1944 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 1945 v)); 1946 USETW(ps.wPortStatus, v); 1947 USETW(ps.wPortChange, v >> 16); 1948 l = min(len, sizeof ps); 1949 memcpy(buf, &ps, l); 1950 totlen = l; 1951 break; 1952 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1953 r = USBD_IOERROR; 1954 goto ret; 1955 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1956 break; 1957 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1958 if (index < 1 || index > sc->sc_noport) { 1959 r = USBD_IOERROR; 1960 goto ret; 1961 } 1962 port = OHCI_RH_PORT_STATUS(index); 1963 switch(value) { 1964 case UHF_PORT_ENABLE: 1965 OWRITE4(sc, port, UPS_PORT_ENABLED); 1966 break; 1967 case UHF_PORT_SUSPEND: 1968 OWRITE4(sc, port, UPS_SUSPEND); 1969 break; 1970 case UHF_PORT_RESET: 1971 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 1972 index)); 1973 OWRITE4(sc, port, UPS_RESET); 1974 for (i = 0; i < 10; i++) { 1975 usb_delay_ms(&sc->sc_bus, 10); 1976 if ((OREAD4(sc, port) & UPS_RESET) == 0) 1977 break; 1978 } 1979 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 1980 index, OREAD4(sc, port))); 1981 break; 1982 case UHF_PORT_POWER: 1983 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 1984 "%d\n", index)); 1985 OWRITE4(sc, port, UPS_PORT_POWER); 1986 break; 1987 default: 1988 r = USBD_IOERROR; 1989 goto ret; 1990 } 1991 break; 1992 default: 1993 r = USBD_IOERROR; 1994 goto ret; 1995 } 1996 reqh->actlen = totlen; 1997 r = USBD_NORMAL_COMPLETION; 1998 ret: 1999 reqh->status = r; 2000 s = splusb(); 2001 usb_transfer_complete(reqh); 2002 splx(s); 2003 return (USBD_IN_PROGRESS); 2004 } 2005 2006 /* Abort a root control request. */ 2007 void 2008 ohci_root_ctrl_abort(reqh) 2009 usbd_request_handle reqh; 2010 { 2011 /* Nothing to do, all transfers are synchronous. */ 2012 } 2013 2014 /* Close the root pipe. */ 2015 void 2016 ohci_root_ctrl_close(pipe) 2017 usbd_pipe_handle pipe; 2018 { 2019 DPRINTF(("ohci_root_ctrl_close\n")); 2020 /* Nothing to do. */ 2021 } 2022 2023 usbd_status 2024 ohci_root_intr_transfer(reqh) 2025 usbd_request_handle reqh; 2026 { 2027 usbd_status r; 2028 2029 /* Insert last in queue. */ 2030 r = usb_insert_transfer(reqh); 2031 if (r != USBD_NORMAL_COMPLETION) 2032 return (r); 2033 2034 /* Pipe isn't running, start first */ 2035 return (ohci_root_intr_start(SIMPLEQ_FIRST(&reqh->pipe->queue))); 2036 } 2037 2038 usbd_status 2039 ohci_root_intr_start(reqh) 2040 usbd_request_handle reqh; 2041 { 2042 usbd_pipe_handle pipe = reqh->pipe; 2043 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2044 2045 sc->sc_intrreqh = reqh; 2046 2047 return (USBD_IN_PROGRESS); 2048 } 2049 2050 /* Abort a root interrupt request. */ 2051 void 2052 ohci_root_intr_abort(reqh) 2053 usbd_request_handle reqh; 2054 { 2055 /* No need to abort. */ 2056 } 2057 2058 /* Close the root pipe. */ 2059 void 2060 ohci_root_intr_close(pipe) 2061 usbd_pipe_handle pipe; 2062 { 2063 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2064 2065 DPRINTF(("ohci_root_intr_close\n")); 2066 2067 sc->sc_intrreqh = 0; 2068 } 2069 2070 /************************/ 2071 2072 usbd_status 2073 ohci_device_ctrl_transfer(reqh) 2074 usbd_request_handle reqh; 2075 { 2076 usbd_status r; 2077 2078 /* Insert last in queue. */ 2079 r = usb_insert_transfer(reqh); 2080 if (r != USBD_NORMAL_COMPLETION) 2081 return (r); 2082 2083 /* Pipe isn't running, start first */ 2084 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&reqh->pipe->queue))); 2085 } 2086 2087 usbd_status 2088 ohci_device_ctrl_start(reqh) 2089 usbd_request_handle reqh; 2090 { 2091 ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus; 2092 usbd_status r; 2093 2094 #ifdef DIAGNOSTIC 2095 if (!(reqh->rqflags & URQ_REQUEST)) { 2096 /* XXX panic */ 2097 printf("ohci_device_ctrl_transfer: not a request\n"); 2098 return (USBD_INVAL); 2099 } 2100 #endif 2101 2102 r = ohci_device_request(reqh); 2103 if (r != USBD_NORMAL_COMPLETION) 2104 return (r); 2105 2106 if (sc->sc_bus.use_polling) 2107 ohci_waitintr(sc, reqh); 2108 return (USBD_IN_PROGRESS); 2109 } 2110 2111 /* Abort a device control request. */ 2112 void 2113 ohci_device_ctrl_abort(reqh) 2114 usbd_request_handle reqh; 2115 { 2116 DPRINTF(("ohci_device_ctrl_abort: reqh=%p\n", reqh)); 2117 ohci_abort_req(reqh, USBD_CANCELLED); 2118 } 2119 2120 /* Close a device control pipe. */ 2121 void 2122 ohci_device_ctrl_close(pipe) 2123 usbd_pipe_handle pipe; 2124 { 2125 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2126 2127 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2128 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2129 } 2130 2131 /************************/ 2132 2133 void 2134 ohci_device_clear_toggle(pipe) 2135 usbd_pipe_handle pipe; 2136 { 2137 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2138 2139 opipe->sed->ed.ed_tailp &= LE(~OHCI_TOGGLECARRY); 2140 } 2141 2142 void 2143 ohci_noop(pipe) 2144 usbd_pipe_handle pipe; 2145 { 2146 } 2147 2148 usbd_status 2149 ohci_device_bulk_transfer(reqh) 2150 usbd_request_handle reqh; 2151 { 2152 usbd_status r; 2153 2154 /* Insert last in queue. */ 2155 r = usb_insert_transfer(reqh); 2156 if (r != USBD_NORMAL_COMPLETION) 2157 return (r); 2158 2159 /* Pipe isn't running, start first */ 2160 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&reqh->pipe->queue))); 2161 } 2162 2163 usbd_status 2164 ohci_device_bulk_start(reqh) 2165 usbd_request_handle reqh; 2166 { 2167 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 2168 usbd_device_handle dev = opipe->pipe.device; 2169 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2170 int addr = dev->address; 2171 ohci_soft_td_t *data, *tail, *tdp; 2172 ohci_soft_ed_t *sed; 2173 int s, len, isread, endpt; 2174 usbd_status r; 2175 2176 #ifdef DIAGNOSTIC 2177 if (reqh->rqflags & URQ_REQUEST) { 2178 /* XXX panic */ 2179 printf("ohci_device_bulk_start: a request\n"); 2180 return (USBD_INVAL); 2181 } 2182 #endif 2183 2184 len = reqh->length; 2185 endpt = reqh->pipe->endpoint->edesc->bEndpointAddress; 2186 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2187 sed = opipe->sed; 2188 2189 DPRINTFN(4,("ohci_device_bulk_start: reqh=%p len=%d isread=%d " 2190 "flags=%d endpt=%d\n", reqh, len, isread, reqh->flags, 2191 endpt)); 2192 2193 opipe->u.bulk.isread = isread; 2194 opipe->u.bulk.length = len; 2195 2196 /* Update device address */ 2197 sed->ed.ed_flags = LE( 2198 (LE(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2199 OHCI_ED_SET_FA(addr)); 2200 2201 /* Allocate a chain of new TDs (including a new tail). */ 2202 data = opipe->tail; 2203 r = ohci_alloc_std_chain(opipe, sc, len, isread, 2204 reqh->flags & USBD_SHORT_XFER_OK, 2205 &reqh->dmabuf, data, &tail); 2206 if (r != USBD_NORMAL_COMPLETION) 2207 return (r); 2208 2209 tail->reqh = 0; 2210 reqh->hcpriv = data; 2211 2212 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2213 "td_cbp=0x%08x td_be=0x%08x\n", 2214 (int)LE(sed->ed.ed_flags), (int)LE(data->td.td_flags), 2215 (int)LE(data->td.td_cbp), (int)LE(data->td.td_be))); 2216 2217 #ifdef USB_DEBUG 2218 if (ohcidebug > 4) { 2219 ohci_dump_ed(sed); 2220 ohci_dump_tds(data); 2221 } 2222 #endif 2223 2224 /* Insert ED in schedule */ 2225 s = splusb(); 2226 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2227 tdp->reqh = reqh; 2228 ohci_hash_add_td(sc, tdp); 2229 } 2230 sed->ed.ed_tailp = LE(tail->physaddr); 2231 opipe->tail = tail; 2232 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); 2233 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2234 if (reqh->timeout && !sc->sc_bus.use_polling) { 2235 usb_timeout(ohci_timeout, reqh, 2236 MS_TO_TICKS(reqh->timeout), reqh->timo_handle); 2237 } 2238 2239 #ifdef USB_DEBUG 2240 if (ohcidebug > 5) { 2241 delay(5000); 2242 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2243 OREAD4(sc, OHCI_COMMAND_STATUS))); 2244 ohci_dump_ed(sed); 2245 ohci_dump_tds(data); 2246 } 2247 #endif 2248 2249 splx(s); 2250 2251 return (USBD_IN_PROGRESS); 2252 } 2253 2254 void 2255 ohci_device_bulk_abort(reqh) 2256 usbd_request_handle reqh; 2257 { 2258 DPRINTF(("ohci_device_bulk_abort: reqh=%p\n", reqh)); 2259 ohci_abort_req(reqh, USBD_CANCELLED); 2260 } 2261 2262 /* 2263 * Close a device bulk pipe. 2264 */ 2265 void 2266 ohci_device_bulk_close(pipe) 2267 usbd_pipe_handle pipe; 2268 { 2269 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2270 2271 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2272 ohci_close_pipe(pipe, sc->sc_bulk_head); 2273 } 2274 2275 /************************/ 2276 2277 usbd_status 2278 ohci_device_intr_transfer(reqh) 2279 usbd_request_handle reqh; 2280 { 2281 usbd_status r; 2282 2283 /* Insert last in queue. */ 2284 r = usb_insert_transfer(reqh); 2285 if (r != USBD_NORMAL_COMPLETION) 2286 return (r); 2287 2288 /* Pipe isn't running, start first */ 2289 return (ohci_device_intr_start(SIMPLEQ_FIRST(&reqh->pipe->queue))); 2290 } 2291 2292 usbd_status 2293 ohci_device_intr_start(reqh) 2294 usbd_request_handle reqh; 2295 { 2296 struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe; 2297 usbd_device_handle dev = opipe->pipe.device; 2298 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2299 ohci_soft_ed_t *sed = opipe->sed; 2300 ohci_soft_td_t *data, *tail; 2301 int len; 2302 int s; 2303 2304 DPRINTFN(3, ("ohci_device_intr_transfer: reqh=%p len=%d " 2305 "flags=%d priv=%p\n", 2306 reqh, reqh->length, reqh->flags, reqh->priv)); 2307 2308 #ifdef DIAGNOSTIC 2309 if (reqh->rqflags & URQ_REQUEST) 2310 panic("ohci_device_intr_transfer: a request\n"); 2311 #endif 2312 2313 len = reqh->length; 2314 2315 data = opipe->tail; 2316 tail = ohci_alloc_std(sc); 2317 if (!tail) 2318 return (USBD_NOMEM); 2319 tail->reqh = 0; 2320 2321 data->td.td_flags = LE( 2322 OHCI_TD_IN | OHCI_TD_NOCC | 2323 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2324 if (reqh->flags & USBD_SHORT_XFER_OK) 2325 data->td.td_flags |= LE(OHCI_TD_R); 2326 data->td.td_cbp = LE(DMAADDR(&reqh->dmabuf)); 2327 data->nexttd = tail; 2328 data->td.td_nexttd = LE(tail->physaddr); 2329 data->td.td_be = LE(LE(data->td.td_cbp) + len - 1); 2330 data->len = len; 2331 data->reqh = reqh; 2332 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2333 reqh->hcpriv = data; 2334 2335 #if USB_DEBUG 2336 if (ohcidebug > 5) { 2337 DPRINTF(("ohci_device_intr_transfer:\n")); 2338 ohci_dump_ed(sed); 2339 ohci_dump_tds(data); 2340 } 2341 #endif 2342 2343 /* Insert ED in schedule */ 2344 s = splusb(); 2345 ohci_hash_add_td(sc, data); 2346 sed->ed.ed_tailp = LE(tail->physaddr); 2347 opipe->tail = tail; 2348 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); 2349 2350 #ifdef USB_DEBUG 2351 if (ohcidebug > 5) { 2352 delay(5000); 2353 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2354 OREAD4(sc, OHCI_COMMAND_STATUS))); 2355 ohci_dump_ed(sed); 2356 ohci_dump_tds(data); 2357 } 2358 #endif 2359 splx(s); 2360 2361 return (USBD_IN_PROGRESS); 2362 } 2363 2364 /* Abort a device control request. */ 2365 void 2366 ohci_device_intr_abort(reqh) 2367 usbd_request_handle reqh; 2368 { 2369 if (reqh->pipe->intrreqh == reqh) { 2370 DPRINTF(("ohci_device_intr_abort: remove\n")); 2371 reqh->pipe->intrreqh = 0; 2372 } 2373 ohci_abort_req(reqh, USBD_CANCELLED); 2374 } 2375 2376 /* Close a device interrupt pipe. */ 2377 void 2378 ohci_device_intr_close(pipe) 2379 usbd_pipe_handle pipe; 2380 { 2381 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2382 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2383 int nslots = opipe->u.intr.nslots; 2384 int pos = opipe->u.intr.pos; 2385 int j; 2386 ohci_soft_ed_t *p, *sed = opipe->sed; 2387 int s; 2388 2389 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2390 pipe, nslots, pos)); 2391 s = splusb(); 2392 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 2393 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 2394 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) 2395 usb_delay_ms(&sc->sc_bus, 2); 2396 2397 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2398 ; 2399 if (!p) 2400 panic("ohci_device_intr_close: ED not found\n"); 2401 p->next = sed->next; 2402 p->ed.ed_nexted = sed->ed.ed_nexted; 2403 splx(s); 2404 2405 for (j = 0; j < nslots; j++) 2406 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2407 2408 ohci_free_std(sc, opipe->tail); 2409 ohci_free_sed(sc, opipe->sed); 2410 } 2411 2412 usbd_status 2413 ohci_device_setintr(sc, opipe, ival) 2414 ohci_softc_t *sc; 2415 struct ohci_pipe *opipe; 2416 int ival; 2417 { 2418 int i, j, s, best; 2419 u_int npoll, slow, shigh, nslots; 2420 u_int bestbw, bw; 2421 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2422 2423 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2424 if (ival == 0) { 2425 printf("ohci_setintr: 0 interval\n"); 2426 return (USBD_INVAL); 2427 } 2428 2429 npoll = OHCI_NO_INTRS; 2430 while (npoll > ival) 2431 npoll /= 2; 2432 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2433 2434 /* 2435 * We now know which level in the tree the ED must go into. 2436 * Figure out which slot has most bandwidth left over. 2437 * Slots to examine: 2438 * npoll 2439 * 1 0 2440 * 2 1 2 2441 * 4 3 4 5 6 2442 * 8 7 8 9 10 11 12 13 14 2443 * N (N-1) .. (N-1+N-1) 2444 */ 2445 slow = npoll-1; 2446 shigh = slow + npoll; 2447 nslots = OHCI_NO_INTRS / npoll; 2448 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2449 bw = 0; 2450 for (j = 0; j < nslots; j++) 2451 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 2452 if (bw < bestbw) { 2453 best = i; 2454 bestbw = bw; 2455 } 2456 } 2457 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2458 best, slow, shigh, bestbw)); 2459 2460 s = splusb(); 2461 hsed = sc->sc_eds[best]; 2462 sed->next = hsed->next; 2463 sed->ed.ed_nexted = hsed->ed.ed_nexted; 2464 hsed->next = sed; 2465 hsed->ed.ed_nexted = LE(sed->physaddr); 2466 splx(s); 2467 2468 for (j = 0; j < nslots; j++) 2469 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 2470 opipe->u.intr.nslots = nslots; 2471 opipe->u.intr.pos = best; 2472 2473 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 2474 return (USBD_NORMAL_COMPLETION); 2475 } 2476 2477
Indexes created Thu Sep 25 06:09:39 GMT 2025