ohci.c revision 1.52.2.2
1 /* $NetBSD: ohci.c,v 1.52.2.2 2000/11/22 16:05:03 bouyer Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe 45 * USB spec: http://www.usb.org/developers/data/usb11.pdf 46 */ 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/kernel.h> 53 #include <sys/device.h> 54 #include <sys/select.h> 55 #elif defined(__FreeBSD__) 56 #include <sys/module.h> 57 #include <sys/bus.h> 58 #include <machine/bus_pio.h> 59 #include <machine/bus_memio.h> 60 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 61 #include <machine/cpu.h> 62 #endif 63 #endif 64 #include <sys/proc.h> 65 #include <sys/queue.h> 66 67 #include <machine/bus.h> 68 #include <machine/endian.h> 69 70 #include <dev/usb/usb.h> 71 #include <dev/usb/usbdi.h> 72 #include <dev/usb/usbdivar.h> 73 #include <dev/usb/usb_mem.h> 74 #include <dev/usb/usb_quirks.h> 75 76 #include <dev/usb/ohcireg.h> 77 #include <dev/usb/ohcivar.h> 78 79 #if defined(__FreeBSD__) 80 #include <machine/clock.h> 81 82 #define delay(d) DELAY(d) 83 #endif 84 85 #if defined(__OpenBSD__) 86 struct cfdriver ohci_cd = { 87 NULL, "ohci", DV_DULL 88 }; 89 #endif 90 91 #ifdef OHCI_DEBUG 92 #define DPRINTF(x) if (ohcidebug) logprintf x 93 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 94 int ohcidebug = 0; 95 #ifndef __NetBSD__ 96 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 97 #endif 98 #else 99 #define DPRINTF(x) 100 #define DPRINTFN(n,x) 101 #endif 102 103 /* 104 * The OHCI controller is little endian, so on big endian machines 105 * the data strored in memory needs to be swapped. 106 */ 107 #if defined(__FreeBSD__) || defined(__OpenBSD__) 108 #if BYTE_ORDER == BIG_ENDIAN 109 #define htole32(x) (bswap32(x)) 110 #define le32toh(x) (bswap32(x)) 111 #else 112 #define htole32(x) (x) 113 #define le32toh(x) (x) 114 #endif 115 #endif 116 117 struct ohci_pipe; 118 119 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 120 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 121 122 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 123 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 124 125 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 126 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 127 128 #if 0 129 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 130 ohci_soft_td_t *); 131 #endif 132 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 133 ohci_softc_t *, int, int, usbd_xfer_handle, 134 ohci_soft_td_t *, ohci_soft_td_t **); 135 136 Static void ohci_shutdown(void *v); 137 Static void ohci_power(int, void *); 138 Static usbd_status ohci_open(usbd_pipe_handle); 139 Static void ohci_poll(struct usbd_bus *); 140 Static void ohci_softintr(struct usbd_bus *); 141 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 142 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t); 143 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 144 145 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 146 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 147 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 148 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 149 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 150 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 151 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 152 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 153 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 154 155 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 156 Static void ohci_device_isoc_enter(usbd_xfer_handle); 157 158 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 159 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 160 161 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 162 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 163 164 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 165 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 166 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 167 Static void ohci_root_ctrl_close(usbd_pipe_handle); 168 Static void ohci_root_ctrl_done(usbd_xfer_handle); 169 170 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 171 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 172 Static void ohci_root_intr_abort(usbd_xfer_handle); 173 Static void ohci_root_intr_close(usbd_pipe_handle); 174 Static void ohci_root_intr_done(usbd_xfer_handle); 175 176 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 177 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 178 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 179 Static void ohci_device_ctrl_close(usbd_pipe_handle); 180 Static void ohci_device_ctrl_done(usbd_xfer_handle); 181 182 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 183 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 184 Static void ohci_device_bulk_abort(usbd_xfer_handle); 185 Static void ohci_device_bulk_close(usbd_pipe_handle); 186 Static void ohci_device_bulk_done(usbd_xfer_handle); 187 188 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 189 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 190 Static void ohci_device_intr_abort(usbd_xfer_handle); 191 Static void ohci_device_intr_close(usbd_pipe_handle); 192 Static void ohci_device_intr_done(usbd_xfer_handle); 193 194 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 195 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 196 Static void ohci_device_isoc_abort(usbd_xfer_handle); 197 Static void ohci_device_isoc_close(usbd_pipe_handle); 198 Static void ohci_device_isoc_done(usbd_xfer_handle); 199 200 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 201 struct ohci_pipe *pipe, int ival); 202 203 Static int ohci_str(usb_string_descriptor_t *, int, char *); 204 205 Static void ohci_timeout(void *); 206 Static void ohci_rhsc_able(ohci_softc_t *, int); 207 208 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 209 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 210 Static void ohci_abort_xfer_end(void *); 211 212 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 213 Static void ohci_noop(usbd_pipe_handle pipe); 214 215 #ifdef OHCI_DEBUG 216 Static void ohci_dumpregs(ohci_softc_t *); 217 Static void ohci_dump_tds(ohci_soft_td_t *); 218 Static void ohci_dump_td(ohci_soft_td_t *); 219 Static void ohci_dump_ed(ohci_soft_ed_t *); 220 Static void ohci_dump_itd(ohci_soft_itd_t *); 221 Static void ohci_dump_itds(ohci_soft_itd_t *); 222 #endif 223 224 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 225 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 226 #define OWRITE1(sc, r, x) \ 227 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 228 #define OWRITE2(sc, r, x) \ 229 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 230 #define OWRITE4(sc, r, x) \ 231 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 232 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 233 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 234 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 235 236 /* Reverse the bits in a value 0 .. 31 */ 237 Static u_int8_t revbits[OHCI_NO_INTRS] = 238 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 239 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 240 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 241 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 242 243 struct ohci_pipe { 244 struct usbd_pipe pipe; 245 ohci_soft_ed_t *sed; 246 union { 247 ohci_soft_td_t *td; 248 ohci_soft_itd_t *itd; 249 } tail; 250 /* Info needed for different pipe kinds. */ 251 union { 252 /* Control pipe */ 253 struct { 254 usb_dma_t reqdma; 255 u_int length; 256 ohci_soft_td_t *setup, *data, *stat; 257 } ctl; 258 /* Interrupt pipe */ 259 struct { 260 int nslots; 261 int pos; 262 } intr; 263 /* Bulk pipe */ 264 struct { 265 u_int length; 266 int isread; 267 } bulk; 268 /* Iso pipe */ 269 struct iso { 270 int next, inuse; 271 } iso; 272 } u; 273 }; 274 275 #define OHCI_INTR_ENDPT 1 276 277 Static struct usbd_bus_methods ohci_bus_methods = { 278 ohci_open, 279 ohci_softintr, 280 ohci_poll, 281 ohci_allocm, 282 ohci_freem, 283 ohci_allocx, 284 ohci_freex, 285 }; 286 287 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 288 ohci_root_ctrl_transfer, 289 ohci_root_ctrl_start, 290 ohci_root_ctrl_abort, 291 ohci_root_ctrl_close, 292 ohci_noop, 293 ohci_root_ctrl_done, 294 }; 295 296 Static struct usbd_pipe_methods ohci_root_intr_methods = { 297 ohci_root_intr_transfer, 298 ohci_root_intr_start, 299 ohci_root_intr_abort, 300 ohci_root_intr_close, 301 ohci_noop, 302 ohci_root_intr_done, 303 }; 304 305 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 306 ohci_device_ctrl_transfer, 307 ohci_device_ctrl_start, 308 ohci_device_ctrl_abort, 309 ohci_device_ctrl_close, 310 ohci_noop, 311 ohci_device_ctrl_done, 312 }; 313 314 Static struct usbd_pipe_methods ohci_device_intr_methods = { 315 ohci_device_intr_transfer, 316 ohci_device_intr_start, 317 ohci_device_intr_abort, 318 ohci_device_intr_close, 319 ohci_device_clear_toggle, 320 ohci_device_intr_done, 321 }; 322 323 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 324 ohci_device_bulk_transfer, 325 ohci_device_bulk_start, 326 ohci_device_bulk_abort, 327 ohci_device_bulk_close, 328 ohci_device_clear_toggle, 329 ohci_device_bulk_done, 330 }; 331 332 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 333 ohci_device_isoc_transfer, 334 ohci_device_isoc_start, 335 ohci_device_isoc_abort, 336 ohci_device_isoc_close, 337 ohci_noop, 338 ohci_device_isoc_done, 339 }; 340 341 #if defined(__NetBSD__) || defined(__OpenBSD__) 342 int 343 ohci_activate(device_ptr_t self, enum devact act) 344 { 345 struct ohci_softc *sc = (struct ohci_softc *)self; 346 int rv = 0; 347 348 switch (act) { 349 case DVACT_ACTIVATE: 350 return (EOPNOTSUPP); 351 break; 352 353 case DVACT_DEACTIVATE: 354 if (sc->sc_child != NULL) 355 rv = config_deactivate(sc->sc_child); 356 sc->sc_dying = 1; 357 break; 358 } 359 return (rv); 360 } 361 362 int 363 ohci_detach(struct ohci_softc *sc, int flags) 364 { 365 int rv = 0; 366 367 if (sc->sc_child != NULL) 368 rv = config_detach(sc->sc_child, flags); 369 370 if (rv != 0) 371 return (rv); 372 373 #if defined(__NetBSD__) || defined(__OpenBSD__) 374 powerhook_disestablish(sc->sc_powerhook); 375 shutdownhook_disestablish(sc->sc_shutdownhook); 376 #endif 377 378 /* free data structures XXX */ 379 380 return (rv); 381 } 382 #endif 383 384 ohci_soft_ed_t * 385 ohci_alloc_sed(ohci_softc_t *sc) 386 { 387 ohci_soft_ed_t *sed; 388 usbd_status err; 389 int i, offs; 390 usb_dma_t dma; 391 392 if (sc->sc_freeeds == NULL) { 393 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 394 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 395 OHCI_ED_ALIGN, &dma); 396 if (err) 397 return (0); 398 for(i = 0; i < OHCI_SED_CHUNK; i++) { 399 offs = i * OHCI_SED_SIZE; 400 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 401 sed->physaddr = DMAADDR(&dma) + offs; 402 sed->next = sc->sc_freeeds; 403 sc->sc_freeeds = sed; 404 } 405 } 406 sed = sc->sc_freeeds; 407 sc->sc_freeeds = sed->next; 408 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 409 sed->next = 0; 410 return (sed); 411 } 412 413 void 414 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 415 { 416 sed->next = sc->sc_freeeds; 417 sc->sc_freeeds = sed; 418 } 419 420 ohci_soft_td_t * 421 ohci_alloc_std(ohci_softc_t *sc) 422 { 423 ohci_soft_td_t *std; 424 usbd_status err; 425 int i, offs; 426 usb_dma_t dma; 427 int s; 428 429 if (sc->sc_freetds == NULL) { 430 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 431 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 432 OHCI_TD_ALIGN, &dma); 433 if (err) 434 return (NULL); 435 s = splusb(); 436 for(i = 0; i < OHCI_STD_CHUNK; i++) { 437 offs = i * OHCI_STD_SIZE; 438 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 439 std->physaddr = DMAADDR(&dma) + offs; 440 std->nexttd = sc->sc_freetds; 441 sc->sc_freetds = std; 442 } 443 splx(s); 444 } 445 446 s = splusb(); 447 std = sc->sc_freetds; 448 sc->sc_freetds = std->nexttd; 449 memset(&std->td, 0, sizeof(ohci_td_t)); 450 std->nexttd = NULL; 451 std->xfer = NULL; 452 ohci_hash_add_td(sc, std); 453 splx(s); 454 455 return (std); 456 } 457 458 void 459 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 460 { 461 int s; 462 463 s = splusb(); 464 ohci_hash_rem_td(sc, std); 465 std->nexttd = sc->sc_freetds; 466 sc->sc_freetds = std; 467 splx(s); 468 } 469 470 usbd_status 471 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 472 int alen, int rd, usbd_xfer_handle xfer, 473 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 474 { 475 ohci_soft_td_t *next, *cur; 476 ohci_physaddr_t dataphys, dataphysend; 477 u_int32_t tdflags; 478 int len, curlen; 479 usb_dma_t *dma = &xfer->dmabuf; 480 u_int16_t flags = xfer->flags; 481 482 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 483 484 len = alen; 485 cur = sp; 486 dataphys = DMAADDR(dma); 487 dataphysend = OHCI_PAGE(dataphys + len - 1); 488 tdflags = htole32( 489 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 490 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 491 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 492 493 for (;;) { 494 next = ohci_alloc_std(sc); 495 if (next == NULL) 496 goto nomem; 497 498 /* The OHCI hardware can handle at most one page crossing. */ 499 if (OHCI_PAGE(dataphys) == dataphysend || 500 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 501 /* we can handle it in this TD */ 502 curlen = len; 503 } else { 504 /* must use multiple TDs, fill as much as possible. */ 505 curlen = 2 * OHCI_PAGE_SIZE - 506 (dataphys & (OHCI_PAGE_SIZE-1)); 507 /* the length must be a multiple of the max size */ 508 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 509 #ifdef DIAGNOSTIC 510 if (curlen == 0) 511 panic("ohci_alloc_std: curlen == 0\n"); 512 #endif 513 } 514 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 515 "dataphysend=0x%08x len=%d curlen=%d\n", 516 dataphys, dataphysend, 517 len, curlen)); 518 len -= curlen; 519 520 cur->td.td_flags = tdflags; 521 cur->td.td_cbp = htole32(dataphys); 522 cur->nexttd = next; 523 cur->td.td_nexttd = htole32(next->physaddr); 524 cur->td.td_be = htole32(dataphys + curlen - 1); 525 cur->len = curlen; 526 cur->flags = OHCI_ADD_LEN; 527 cur->xfer = xfer; 528 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 529 dataphys, dataphys + curlen - 1)); 530 if (len == 0) 531 break; 532 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 533 dataphys += curlen; 534 cur = next; 535 } 536 if ((flags & USBD_FORCE_SHORT_XFER) && 537 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 538 /* Force a 0 length transfer at the end. */ 539 540 cur = next; 541 next = ohci_alloc_std(sc); 542 if (next == NULL) 543 goto nomem; 544 545 cur->td.td_flags = tdflags; 546 cur->td.td_cbp = 0; /* indicate 0 length packet */ 547 cur->nexttd = next; 548 cur->td.td_nexttd = htole32(next->physaddr); 549 cur->td.td_be = ~0; 550 cur->len = 0; 551 cur->flags = 0; 552 cur->xfer = xfer; 553 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 554 } 555 *ep = cur; 556 557 return (USBD_NORMAL_COMPLETION); 558 559 nomem: 560 /* XXX free chain */ 561 return (USBD_NOMEM); 562 } 563 564 #if 0 565 Static void 566 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 567 ohci_soft_td_t *stdend) 568 { 569 ohci_soft_td_t *p; 570 571 for (; std != stdend; std = p) { 572 p = std->nexttd; 573 ohci_free_std(sc, std); 574 } 575 } 576 #endif 577 578 ohci_soft_itd_t * 579 ohci_alloc_sitd(ohci_softc_t *sc) 580 { 581 ohci_soft_itd_t *sitd; 582 usbd_status err; 583 int i, s, offs; 584 usb_dma_t dma; 585 586 if (sc->sc_freeitds == NULL) { 587 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 588 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 589 OHCI_ITD_ALIGN, &dma); 590 if (err) 591 return (NULL); 592 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 593 offs = i * OHCI_SITD_SIZE; 594 sitd = (ohci_soft_itd_t *)((char*)KERNADDR(&dma)+offs); 595 sitd->physaddr = DMAADDR(&dma) + offs; 596 sitd->nextitd = sc->sc_freeitds; 597 sc->sc_freeitds = sitd; 598 } 599 } 600 601 s = splusb(); 602 sitd = sc->sc_freeitds; 603 sc->sc_freeitds = sitd->nextitd; 604 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 605 sitd->nextitd = NULL; 606 sitd->xfer = NULL; 607 ohci_hash_add_itd(sc, sitd); 608 splx(s); 609 610 #ifdef DIAGNOSTIC 611 sitd->isdone = 0; 612 #endif 613 614 return (sitd); 615 } 616 617 void 618 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 619 { 620 int s; 621 622 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 623 624 #ifdef DIAGNOSTIC 625 if (!sitd->isdone) { 626 panic("ohci_free_sitd: sitd=%p not done\n", sitd); 627 return; 628 } 629 #endif 630 631 s = splusb(); 632 ohci_hash_rem_itd(sc, sitd); 633 sitd->nextitd = sc->sc_freeitds; 634 sc->sc_freeitds = sitd; 635 splx(s); 636 } 637 638 usbd_status 639 ohci_init(ohci_softc_t *sc) 640 { 641 ohci_soft_ed_t *sed, *psed; 642 usbd_status err; 643 int i; 644 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 645 646 DPRINTF(("ohci_init: start\n")); 647 #if defined(__OpenBSD__) 648 printf(","); 649 #else 650 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 651 #endif 652 rev = OREAD4(sc, OHCI_REVISION); 653 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 654 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 655 656 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 657 printf("%s: unsupported OHCI revision\n", 658 USBDEVNAME(sc->sc_bus.bdev)); 659 sc->sc_bus.usbrev = USBREV_UNKNOWN; 660 return (USBD_INVAL); 661 } 662 sc->sc_bus.usbrev = USBREV_1_0; 663 664 for (i = 0; i < OHCI_HASH_SIZE; i++) 665 LIST_INIT(&sc->sc_hash_tds[i]); 666 for (i = 0; i < OHCI_HASH_SIZE; i++) 667 LIST_INIT(&sc->sc_hash_itds[i]); 668 669 SIMPLEQ_INIT(&sc->sc_free_xfers); 670 671 /* XXX determine alignment by R/W */ 672 /* Allocate the HCCA area. */ 673 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 674 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 675 if (err) 676 return (err); 677 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 678 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 679 680 sc->sc_eintrs = OHCI_NORMAL_INTRS; 681 682 /* Allocate dummy ED that starts the control list. */ 683 sc->sc_ctrl_head = ohci_alloc_sed(sc); 684 if (sc->sc_ctrl_head == NULL) { 685 err = USBD_NOMEM; 686 goto bad1; 687 } 688 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 689 690 /* Allocate dummy ED that starts the bulk list. */ 691 sc->sc_bulk_head = ohci_alloc_sed(sc); 692 if (sc->sc_bulk_head == NULL) { 693 err = USBD_NOMEM; 694 goto bad2; 695 } 696 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 697 698 /* Allocate dummy ED that starts the isochronous list. */ 699 sc->sc_isoc_head = ohci_alloc_sed(sc); 700 if (sc->sc_isoc_head == NULL) { 701 err = USBD_NOMEM; 702 goto bad3; 703 } 704 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 705 706 /* Allocate all the dummy EDs that make up the interrupt tree. */ 707 for (i = 0; i < OHCI_NO_EDS; i++) { 708 sed = ohci_alloc_sed(sc); 709 if (sed == NULL) { 710 while (--i >= 0) 711 ohci_free_sed(sc, sc->sc_eds[i]); 712 err = USBD_NOMEM; 713 goto bad4; 714 } 715 /* All ED fields are set to 0. */ 716 sc->sc_eds[i] = sed; 717 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 718 if (i != 0) 719 psed = sc->sc_eds[(i-1) / 2]; 720 else 721 psed= sc->sc_isoc_head; 722 sed->next = psed; 723 sed->ed.ed_nexted = htole32(psed->physaddr); 724 } 725 /* 726 * Fill HCCA interrupt table. The bit reversal is to get 727 * the tree set up properly to spread the interrupts. 728 */ 729 for (i = 0; i < OHCI_NO_INTRS; i++) 730 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 731 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 732 733 #ifdef OHCI_DEBUG 734 if (ohcidebug > 15) { 735 for (i = 0; i < OHCI_NO_EDS; i++) { 736 printf("ed#%d ", i); 737 ohci_dump_ed(sc->sc_eds[i]); 738 } 739 printf("iso "); 740 ohci_dump_ed(sc->sc_isoc_head); 741 } 742 #endif 743 744 /* Determine in what context we are running. */ 745 ctl = OREAD4(sc, OHCI_CONTROL); 746 if (ctl & OHCI_IR) { 747 /* SMM active, request change */ 748 DPRINTF(("ohci_init: SMM active, request owner change\n")); 749 s = OREAD4(sc, OHCI_COMMAND_STATUS); 750 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 751 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 752 usb_delay_ms(&sc->sc_bus, 1); 753 ctl = OREAD4(sc, OHCI_CONTROL); 754 } 755 if ((ctl & OHCI_IR) == 0) { 756 printf("%s: SMM does not respond, resetting\n", 757 USBDEVNAME(sc->sc_bus.bdev)); 758 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 759 goto reset; 760 } 761 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 762 /* BIOS started controller. */ 763 DPRINTF(("ohci_init: BIOS active\n")); 764 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 765 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 766 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 767 } 768 } else { 769 DPRINTF(("ohci_init: cold started\n")); 770 reset: 771 /* Controller was cold started. */ 772 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 773 } 774 775 /* 776 * This reset should not be necessary according to the OHCI spec, but 777 * without it some controllers do not start. 778 */ 779 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 780 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 781 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 782 783 /* We now own the host controller and the bus has been reset. */ 784 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 785 786 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 787 /* Nominal time for a reset is 10 us. */ 788 for (i = 0; i < 10; i++) { 789 delay(10); 790 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 791 if (!hcr) 792 break; 793 } 794 if (hcr) { 795 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 796 err = USBD_IOERROR; 797 goto bad5; 798 } 799 #ifdef OHCI_DEBUG 800 if (ohcidebug > 15) 801 ohci_dumpregs(sc); 802 #endif 803 804 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 805 806 /* Set up HC registers. */ 807 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 808 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 809 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 810 /* disable all interrupts and then switch on all desired interrupts */ 811 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 812 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 813 /* switch on desired functional features */ 814 ctl = OREAD4(sc, OHCI_CONTROL); 815 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 816 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 817 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 818 /* And finally start it! */ 819 OWRITE4(sc, OHCI_CONTROL, ctl); 820 821 /* 822 * The controller is now OPERATIONAL. Set a some final 823 * registers that should be set earlier, but that the 824 * controller ignores when in the SUSPEND state. 825 */ 826 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 827 fm |= OHCI_FSMPS(ival) | ival; 828 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 829 per = OHCI_PERIODIC(ival); /* 90% periodic */ 830 OWRITE4(sc, OHCI_PERIODIC_START, per); 831 832 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 833 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 834 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 835 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 836 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 837 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 838 839 /* 840 * The AMD756 requires a delay before re-reading the register, 841 * otherwise it will occasionally report 0 ports. 842 */ 843 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 844 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 845 846 #ifdef OHCI_DEBUG 847 if (ohcidebug > 5) 848 ohci_dumpregs(sc); 849 #endif 850 851 /* Set up the bus struct. */ 852 sc->sc_bus.methods = &ohci_bus_methods; 853 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 854 855 #if defined(__NetBSD__) || defined(__OpenBSD__) 856 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 857 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 858 #endif 859 860 return (USBD_NORMAL_COMPLETION); 861 862 bad5: 863 for (i = 0; i < OHCI_NO_EDS; i++) 864 ohci_free_sed(sc, sc->sc_eds[i]); 865 bad4: 866 ohci_free_sed(sc, sc->sc_isoc_head); 867 bad3: 868 ohci_free_sed(sc, sc->sc_ctrl_head); 869 bad2: 870 ohci_free_sed(sc, sc->sc_bulk_head); 871 bad1: 872 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 873 return (err); 874 } 875 876 usbd_status 877 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 878 { 879 #if defined(__NetBSD__) || defined(__OpenBSD__) 880 struct ohci_softc *sc = (struct ohci_softc *)bus; 881 #endif 882 883 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 884 } 885 886 void 887 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 888 { 889 #if defined(__NetBSD__) || defined(__OpenBSD__) 890 struct ohci_softc *sc = (struct ohci_softc *)bus; 891 #endif 892 893 usb_freemem(&sc->sc_bus, dma); 894 } 895 896 usbd_xfer_handle 897 ohci_allocx(struct usbd_bus *bus) 898 { 899 struct ohci_softc *sc = (struct ohci_softc *)bus; 900 usbd_xfer_handle xfer; 901 902 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 903 if (xfer != NULL) 904 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 905 else 906 xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT); 907 if (xfer != NULL) 908 memset(xfer, 0, sizeof *xfer); 909 return (xfer); 910 } 911 912 void 913 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 914 { 915 struct ohci_softc *sc = (struct ohci_softc *)bus; 916 917 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 918 } 919 920 /* 921 * Shut down the controller when the system is going down. 922 */ 923 void 924 ohci_shutdown(void *v) 925 { 926 ohci_softc_t *sc = v; 927 928 DPRINTF(("ohci_shutdown: stopping the HC\n")); 929 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 930 } 931 932 /* 933 * Handle suspend/resume. 934 * 935 * We need to switch to polling mode here, because this routine is 936 * called from an intterupt context. This is all right since we 937 * are almost suspended anyway. 938 */ 939 void 940 ohci_power(int why, void *v) 941 { 942 #ifdef OHCI_DEBUG 943 ohci_softc_t *sc = v; 944 945 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 946 /* XXX should suspend/resume */ 947 ohci_dumpregs(sc); 948 #endif 949 } 950 951 #ifdef OHCI_DEBUG 952 void 953 ohci_dumpregs(ohci_softc_t *sc) 954 { 955 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 956 OREAD4(sc, OHCI_REVISION), 957 OREAD4(sc, OHCI_CONTROL), 958 OREAD4(sc, OHCI_COMMAND_STATUS))); 959 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 960 OREAD4(sc, OHCI_INTERRUPT_STATUS), 961 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 962 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 963 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 964 OREAD4(sc, OHCI_HCCA), 965 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 966 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 967 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 968 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 969 OREAD4(sc, OHCI_BULK_HEAD_ED), 970 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 971 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 972 OREAD4(sc, OHCI_DONE_HEAD), 973 OREAD4(sc, OHCI_FM_INTERVAL), 974 OREAD4(sc, OHCI_FM_REMAINING))); 975 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 976 OREAD4(sc, OHCI_FM_NUMBER), 977 OREAD4(sc, OHCI_PERIODIC_START), 978 OREAD4(sc, OHCI_LS_THRESHOLD))); 979 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 980 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 981 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 982 OREAD4(sc, OHCI_RH_STATUS))); 983 DPRINTF((" port1=0x%08x port2=0x%08x\n", 984 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 985 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 986 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 987 le32toh(sc->sc_hcca->hcca_frame_number), 988 le32toh(sc->sc_hcca->hcca_done_head))); 989 } 990 #endif 991 992 Static int ohci_intr1(ohci_softc_t *); 993 994 int 995 ohci_intr(void *p) 996 { 997 ohci_softc_t *sc = p; 998 999 /* If we get an interrupt while polling, then just ignore it. */ 1000 if (sc->sc_bus.use_polling) { 1001 #ifdef DIAGNOSTIC 1002 printf("ohci_intr: ignored interrupt while polling\n"); 1003 #endif 1004 return (0); 1005 } 1006 1007 return (ohci_intr1(sc)); 1008 } 1009 1010 Static int 1011 ohci_intr1(ohci_softc_t *sc) 1012 { 1013 u_int32_t intrs, eintrs; 1014 ohci_physaddr_t done; 1015 1016 /* In case the interrupt occurs before initialization has completed. */ 1017 if (sc == NULL || sc->sc_hcca == NULL) { 1018 #ifdef DIAGNOSTIC 1019 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1020 #endif 1021 return (0); 1022 } 1023 1024 intrs = 0; 1025 done = le32toh(sc->sc_hcca->hcca_done_head); 1026 if (done != 0) { 1027 if (done & ~OHCI_DONE_INTRS) 1028 intrs = OHCI_WDH; 1029 if (done & OHCI_DONE_INTRS) 1030 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1031 } else 1032 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1033 1034 if (!intrs) 1035 return (0); 1036 1037 intrs &= ~OHCI_MIE; 1038 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1039 eintrs = intrs & sc->sc_eintrs; 1040 if (!eintrs) 1041 return (0); 1042 1043 sc->sc_bus.intr_context++; 1044 sc->sc_bus.no_intrs++; 1045 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1046 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1047 (u_int)eintrs)); 1048 1049 if (eintrs & OHCI_SO) { 1050 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev)); 1051 /* XXX do what */ 1052 intrs &= ~OHCI_SO; 1053 } 1054 if (eintrs & OHCI_WDH) { 1055 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1056 sc->sc_hcca->hcca_done_head = 0; 1057 usb_schedsoftintr(&sc->sc_bus); 1058 intrs &= ~OHCI_WDH; 1059 } 1060 if (eintrs & OHCI_RD) { 1061 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1062 /* XXX process resume detect */ 1063 } 1064 if (eintrs & OHCI_UE) { 1065 printf("%s: unrecoverable error, controller halted\n", 1066 USBDEVNAME(sc->sc_bus.bdev)); 1067 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1068 /* XXX what else */ 1069 } 1070 if (eintrs & OHCI_RHSC) { 1071 ohci_rhsc(sc, sc->sc_intrxfer); 1072 intrs &= ~OHCI_RHSC; 1073 1074 /* 1075 * Disable RHSC interrupt for now, because it will be 1076 * on until the port has been reset. 1077 */ 1078 ohci_rhsc_able(sc, 0); 1079 } 1080 1081 sc->sc_bus.intr_context--; 1082 1083 /* Block unprocessed interrupts. XXX */ 1084 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 1085 sc->sc_eintrs &= ~intrs; 1086 1087 return (1); 1088 } 1089 1090 void 1091 ohci_rhsc_able(ohci_softc_t *sc, int on) 1092 { 1093 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1094 if (on) { 1095 sc->sc_eintrs |= OHCI_RHSC; 1096 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1097 } else { 1098 sc->sc_eintrs &= ~OHCI_RHSC; 1099 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1100 } 1101 } 1102 1103 #ifdef OHCI_DEBUG 1104 char *ohci_cc_strs[] = { 1105 "NO_ERROR", 1106 "CRC", 1107 "BIT_STUFFING", 1108 "DATA_TOGGLE_MISMATCH", 1109 "STALL", 1110 "DEVICE_NOT_RESPONDING", 1111 "PID_CHECK_FAILURE", 1112 "UNEXPECTED_PID", 1113 "DATA_OVERRUN", 1114 "DATA_UNDERRUN", 1115 "BUFFER_OVERRUN", 1116 "BUFFER_UNDERRUN", 1117 "reserved", 1118 "reserved", 1119 "NOT_ACCESSED", 1120 "NOT_ACCESSED", 1121 }; 1122 #endif 1123 1124 void 1125 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done) 1126 { 1127 ohci_soft_itd_t *sitd, *sidone, **ip; 1128 ohci_soft_td_t *std, *sdone, **p; 1129 1130 /* Reverse the done list. */ 1131 for (sdone = NULL, sidone = NULL; done != 0; ) { 1132 std = ohci_hash_find_td(sc, done); 1133 if (std != NULL) { 1134 std->dnext = sdone; 1135 done = le32toh(std->td.td_nexttd); 1136 sdone = std; 1137 DPRINTFN(10,("add TD %p\n", std)); 1138 continue; 1139 } 1140 sitd = ohci_hash_find_itd(sc, done); 1141 if (sitd != NULL) { 1142 sitd->dnext = sidone; 1143 done = le32toh(sitd->itd.itd_nextitd); 1144 sidone = sitd; 1145 DPRINTFN(5,("add ITD %p\n", sitd)); 1146 continue; 1147 } 1148 panic("ohci_add_done: addr 0x%08lx not found\n", (u_long)done); 1149 } 1150 1151 /* sdone & sidone now hold the done lists. */ 1152 /* Put them on the already processed lists. */ 1153 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1154 ; 1155 *p = sdone; 1156 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1157 ; 1158 *ip = sidone; 1159 } 1160 1161 void 1162 ohci_softintr(struct usbd_bus *bus) 1163 { 1164 ohci_softc_t *sc = (ohci_softc_t *)bus; 1165 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1166 ohci_soft_td_t *std, *sdone, *stdnext; 1167 usbd_xfer_handle xfer; 1168 int len, cc, s; 1169 1170 sc->sc_bus.intr_context++; 1171 1172 s = splhardusb(); 1173 sdone = sc->sc_sdone; 1174 sc->sc_sdone = NULL; 1175 sidone = sc->sc_sidone; 1176 sc->sc_sidone = NULL; 1177 splx(s); 1178 1179 DPRINTFN(10,("ohci_process_done: sdone=%p sidone=%p\n", sdone, sidone)); 1180 1181 #ifdef OHCI_DEBUG 1182 if (ohcidebug > 10) { 1183 DPRINTF(("ohci_process_done: TD done:\n")); 1184 ohci_dump_tds(sdone); 1185 } 1186 #endif 1187 1188 for (std = sdone; std; std = stdnext) { 1189 xfer = std->xfer; 1190 stdnext = std->dnext; 1191 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1192 std, xfer, xfer ? xfer->hcpriv : 0)); 1193 if (xfer == NULL) { 1194 /* xfer == NULL: There seems to be no xfer associated 1195 * with this TD. It is tailp that happened to end up on 1196 * the done queue. 1197 */ 1198 continue; 1199 } 1200 if (xfer->status == USBD_CANCELLED || 1201 xfer->status == USBD_TIMEOUT) { 1202 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1203 xfer)); 1204 /* Handled by abort routine. */ 1205 continue; 1206 } 1207 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1208 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1209 if (cc == OHCI_CC_NO_ERROR) { 1210 len = std->len; 1211 if (std->td.td_cbp != 0) 1212 len -= le32toh(std->td.td_be) - 1213 le32toh(std->td.td_cbp) + 1; 1214 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", 1215 len, std->flags)); 1216 if (std->flags & OHCI_ADD_LEN) 1217 xfer->actlen += len; 1218 if (std->flags & OHCI_CALL_DONE) { 1219 xfer->status = USBD_NORMAL_COMPLETION; 1220 usb_transfer_complete(xfer); 1221 } 1222 ohci_free_std(sc, std); 1223 } else { 1224 /* 1225 * Endpoint is halted. First unlink all the TDs 1226 * belonging to the failed transfer, and then restart 1227 * the endpoint. 1228 */ 1229 ohci_soft_td_t *p, *n; 1230 struct ohci_pipe *opipe = 1231 (struct ohci_pipe *)xfer->pipe; 1232 1233 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1234 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1235 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1236 1237 /* remove TDs */ 1238 for (p = std; p->xfer == xfer; p = n) { 1239 n = p->nexttd; 1240 ohci_free_std(sc, p); 1241 } 1242 1243 /* clear halt */ 1244 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1245 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1246 1247 if (cc == OHCI_CC_STALL) 1248 xfer->status = USBD_STALLED; 1249 else 1250 xfer->status = USBD_IOERROR; 1251 usb_transfer_complete(xfer); 1252 } 1253 } 1254 1255 #ifdef OHCI_DEBUG 1256 if (ohcidebug > 10) { 1257 DPRINTF(("ohci_process_done: ITD done:\n")); 1258 ohci_dump_itds(sidone); 1259 } 1260 #endif 1261 1262 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1263 xfer = sitd->xfer; 1264 sitdnext = sitd->dnext; 1265 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1266 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1267 if (xfer == NULL) 1268 continue; 1269 if (xfer->status == USBD_CANCELLED || 1270 xfer->status == USBD_TIMEOUT) { 1271 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1272 xfer)); 1273 /* Handled by abort routine. */ 1274 continue; 1275 } 1276 #ifdef DIAGNOSTIC 1277 if (sitd->isdone) 1278 printf("ohci_softintr: sitd=%p is done\n", sitd); 1279 sitd->isdone = 1; 1280 #endif 1281 cc = OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)); 1282 if (cc == OHCI_CC_NO_ERROR) { 1283 /* XXX compute length for input */ 1284 struct ohci_pipe *opipe = 1285 (struct ohci_pipe *)xfer->pipe; 1286 if (sitd->flags & OHCI_CALL_DONE) { 1287 opipe->u.iso.inuse -= xfer->nframes; 1288 /* XXX update frlengths with actual length */ 1289 /* XXX xfer->actlen = actlen; */ 1290 xfer->status = USBD_NORMAL_COMPLETION; 1291 usb_transfer_complete(xfer); 1292 } 1293 } else { 1294 /* XXX Do more */ 1295 xfer->status = USBD_IOERROR; 1296 usb_transfer_complete(xfer); 1297 } 1298 } 1299 1300 sc->sc_bus.intr_context--; 1301 } 1302 1303 void 1304 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1305 { 1306 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1307 1308 #ifdef DIAGNOSTIC 1309 if (!(xfer->rqflags & URQ_REQUEST)) { 1310 panic("ohci_ctrl_done: not a request\n"); 1311 } 1312 #endif 1313 xfer->hcpriv = NULL; 1314 } 1315 1316 void 1317 ohci_device_intr_done(usbd_xfer_handle xfer) 1318 { 1319 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1320 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1321 ohci_soft_ed_t *sed = opipe->sed; 1322 ohci_soft_td_t *data, *tail; 1323 1324 1325 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1326 xfer, xfer->actlen)); 1327 1328 xfer->hcpriv = NULL; 1329 1330 if (xfer->pipe->repeat) { 1331 data = opipe->tail.td; 1332 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1333 if (tail == NULL) { 1334 xfer->status = USBD_NOMEM; 1335 return; 1336 } 1337 tail->xfer = NULL; 1338 1339 data->td.td_flags = htole32( 1340 OHCI_TD_IN | OHCI_TD_NOCC | 1341 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1342 if (xfer->flags & USBD_SHORT_XFER_OK) 1343 data->td.td_flags |= htole32(OHCI_TD_R); 1344 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 1345 data->nexttd = tail; 1346 data->td.td_nexttd = htole32(tail->physaddr); 1347 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1348 xfer->length - 1); 1349 data->len = xfer->length; 1350 data->xfer = xfer; 1351 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1352 xfer->hcpriv = data; 1353 xfer->actlen = 0; 1354 1355 sed->ed.ed_tailp = htole32(tail->physaddr); 1356 opipe->tail.td = tail; 1357 } 1358 } 1359 1360 void 1361 ohci_device_bulk_done(usbd_xfer_handle xfer) 1362 { 1363 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1364 xfer, xfer->actlen)); 1365 1366 xfer->hcpriv = NULL; 1367 } 1368 1369 void 1370 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1371 { 1372 usbd_pipe_handle pipe; 1373 struct ohci_pipe *opipe; 1374 u_char *p; 1375 int i, m; 1376 int hstatus; 1377 1378 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1379 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1380 sc, xfer, hstatus)); 1381 1382 if (xfer == NULL) { 1383 /* Just ignore the change. */ 1384 return; 1385 } 1386 1387 pipe = xfer->pipe; 1388 opipe = (struct ohci_pipe *)pipe; 1389 1390 p = KERNADDR(&xfer->dmabuf); 1391 m = min(sc->sc_noport, xfer->length * 8 - 1); 1392 memset(p, 0, xfer->length); 1393 for (i = 1; i <= m; i++) { 1394 /* Pick out CHANGE bits from the status reg. */ 1395 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1396 p[i/8] |= 1 << (i%8); 1397 } 1398 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1399 xfer->actlen = xfer->length; 1400 xfer->status = USBD_NORMAL_COMPLETION; 1401 1402 usb_transfer_complete(xfer); 1403 } 1404 1405 void 1406 ohci_root_intr_done(usbd_xfer_handle xfer) 1407 { 1408 xfer->hcpriv = NULL; 1409 } 1410 1411 void 1412 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1413 { 1414 xfer->hcpriv = NULL; 1415 } 1416 1417 /* 1418 * Wait here until controller claims to have an interrupt. 1419 * Then call ohci_intr and return. Use timeout to avoid waiting 1420 * too long. 1421 */ 1422 void 1423 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1424 { 1425 int timo = xfer->timeout; 1426 int usecs; 1427 u_int32_t intrs; 1428 1429 xfer->status = USBD_IN_PROGRESS; 1430 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1431 usb_delay_ms(&sc->sc_bus, 1); 1432 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1433 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1434 #ifdef OHCI_DEBUG 1435 if (ohcidebug > 15) 1436 ohci_dumpregs(sc); 1437 #endif 1438 if (intrs) { 1439 ohci_intr1(sc); 1440 if (xfer->status != USBD_IN_PROGRESS) 1441 return; 1442 } 1443 } 1444 1445 /* Timeout */ 1446 DPRINTF(("ohci_waitintr: timeout\n")); 1447 xfer->status = USBD_TIMEOUT; 1448 usb_transfer_complete(xfer); 1449 /* XXX should free TD */ 1450 } 1451 1452 void 1453 ohci_poll(struct usbd_bus *bus) 1454 { 1455 ohci_softc_t *sc = (ohci_softc_t *)bus; 1456 1457 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1458 ohci_intr1(sc); 1459 } 1460 1461 usbd_status 1462 ohci_device_request(usbd_xfer_handle xfer) 1463 { 1464 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1465 usb_device_request_t *req = &xfer->request; 1466 usbd_device_handle dev = opipe->pipe.device; 1467 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1468 int addr = dev->address; 1469 ohci_soft_td_t *setup, *stat, *next, *tail; 1470 ohci_soft_ed_t *sed; 1471 int isread; 1472 int len; 1473 usbd_status err; 1474 int s; 1475 1476 isread = req->bmRequestType & UT_READ; 1477 len = UGETW(req->wLength); 1478 1479 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1480 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1481 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1482 UGETW(req->wIndex), len, addr, 1483 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1484 1485 setup = opipe->tail.td; 1486 stat = ohci_alloc_std(sc); 1487 if (stat == NULL) { 1488 err = USBD_NOMEM; 1489 goto bad1; 1490 } 1491 tail = ohci_alloc_std(sc); 1492 if (tail == NULL) { 1493 err = USBD_NOMEM; 1494 goto bad2; 1495 } 1496 tail->xfer = NULL; 1497 1498 sed = opipe->sed; 1499 opipe->u.ctl.length = len; 1500 1501 /* Update device address and length since they may have changed. */ 1502 /* XXX This only needs to be done once, but it's too early in open. */ 1503 /* XXXX Should not touch ED here! */ 1504 sed->ed.ed_flags = htole32( 1505 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1506 OHCI_ED_SET_FA(addr) | 1507 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1508 1509 next = stat; 1510 1511 /* Set up data transaction */ 1512 if (len != 0) { 1513 ohci_soft_td_t *std = stat; 1514 1515 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1516 std, &stat); 1517 stat = stat->nexttd; /* point at free TD */ 1518 if (err) 1519 goto bad3; 1520 /* Start toggle at 1 and then use the carried toggle. */ 1521 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1522 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1523 } 1524 1525 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1526 1527 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1528 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1529 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma)); 1530 setup->nexttd = next; 1531 setup->td.td_nexttd = htole32(next->physaddr); 1532 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1533 setup->len = 0; 1534 setup->xfer = xfer; 1535 setup->flags = 0; 1536 xfer->hcpriv = setup; 1537 1538 stat->td.td_flags = htole32( 1539 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1540 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1541 stat->td.td_cbp = 0; 1542 stat->nexttd = tail; 1543 stat->td.td_nexttd = htole32(tail->physaddr); 1544 stat->td.td_be = 0; 1545 stat->flags = OHCI_CALL_DONE; 1546 stat->len = 0; 1547 stat->xfer = xfer; 1548 1549 #ifdef OHCI_DEBUG 1550 if (ohcidebug > 5) { 1551 DPRINTF(("ohci_device_request:\n")); 1552 ohci_dump_ed(sed); 1553 ohci_dump_tds(setup); 1554 } 1555 #endif 1556 1557 /* Insert ED in schedule */ 1558 s = splusb(); 1559 sed->ed.ed_tailp = htole32(tail->physaddr); 1560 opipe->tail.td = tail; 1561 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1562 if (xfer->timeout && !sc->sc_bus.use_polling) { 1563 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 1564 ohci_timeout, xfer); 1565 } 1566 splx(s); 1567 1568 #if 0 1569 if (ohcidebug > 10) { 1570 delay(10000); 1571 DPRINTF(("ohci_device_request: status=%x\n", 1572 OREAD4(sc, OHCI_COMMAND_STATUS))); 1573 ohci_dump_ed(sed); 1574 ohci_dump_tds(setup); 1575 } 1576 #endif 1577 1578 return (USBD_NORMAL_COMPLETION); 1579 1580 bad3: 1581 ohci_free_std(sc, tail); 1582 bad2: 1583 ohci_free_std(sc, stat); 1584 bad1: 1585 return (err); 1586 } 1587 1588 /* 1589 * Add an ED to the schedule. Called at splusb(). 1590 */ 1591 void 1592 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1593 { 1594 SPLUSBCHECK; 1595 sed->next = head->next; 1596 sed->ed.ed_nexted = head->ed.ed_nexted; 1597 head->next = sed; 1598 head->ed.ed_nexted = htole32(sed->physaddr); 1599 } 1600 1601 /* 1602 * Remove an ED from the schedule. Called at splusb(). 1603 */ 1604 void 1605 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1606 { 1607 ohci_soft_ed_t *p; 1608 1609 SPLUSBCHECK; 1610 1611 /* XXX */ 1612 for (p = head; p == NULL && p->next != sed; p = p->next) 1613 ; 1614 if (p == NULL) 1615 panic("ohci_rem_ed: ED not found\n"); 1616 p->next = sed->next; 1617 p->ed.ed_nexted = sed->ed.ed_nexted; 1618 } 1619 1620 /* 1621 * When a transfer is completed the TD is added to the done queue by 1622 * the host controller. This queue is the processed by software. 1623 * Unfortunately the queue contains the physical address of the TD 1624 * and we have no simple way to translate this back to a kernel address. 1625 * To make the translation possible (and fast) we use a hash table of 1626 * TDs currently in the schedule. The physical address is used as the 1627 * hash value. 1628 */ 1629 1630 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1631 /* Called at splusb() */ 1632 void 1633 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1634 { 1635 int h = HASH(std->physaddr); 1636 1637 SPLUSBCHECK; 1638 1639 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1640 } 1641 1642 /* Called at splusb() */ 1643 void 1644 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1645 { 1646 SPLUSBCHECK; 1647 1648 LIST_REMOVE(std, hnext); 1649 } 1650 1651 ohci_soft_td_t * 1652 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1653 { 1654 int h = HASH(a); 1655 ohci_soft_td_t *std; 1656 1657 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1658 std != NULL; 1659 std = LIST_NEXT(std, hnext)) 1660 if (std->physaddr == a) 1661 return (std); 1662 return (NULL); 1663 } 1664 1665 /* Called at splusb() */ 1666 void 1667 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1668 { 1669 int h = HASH(sitd->physaddr); 1670 1671 SPLUSBCHECK; 1672 1673 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1674 sitd, (u_long)sitd->physaddr)); 1675 1676 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1677 } 1678 1679 /* Called at splusb() */ 1680 void 1681 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1682 { 1683 SPLUSBCHECK; 1684 1685 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1686 sitd, (u_long)sitd->physaddr)); 1687 1688 LIST_REMOVE(sitd, hnext); 1689 } 1690 1691 ohci_soft_itd_t * 1692 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1693 { 1694 int h = HASH(a); 1695 ohci_soft_itd_t *sitd; 1696 1697 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1698 sitd != NULL; 1699 sitd = LIST_NEXT(sitd, hnext)) 1700 if (sitd->physaddr == a) 1701 return (sitd); 1702 return (NULL); 1703 } 1704 1705 void 1706 ohci_timeout(void *addr) 1707 { 1708 usbd_xfer_handle xfer = addr; 1709 int s; 1710 1711 DPRINTF(("ohci_timeout: xfer=%p\n", xfer)); 1712 1713 s = splusb(); 1714 xfer->device->bus->intr_context++; 1715 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1716 xfer->device->bus->intr_context--; 1717 splx(s); 1718 } 1719 1720 #ifdef OHCI_DEBUG 1721 void 1722 ohci_dump_tds(ohci_soft_td_t *std) 1723 { 1724 for (; std; std = std->nexttd) 1725 ohci_dump_td(std); 1726 } 1727 1728 void 1729 ohci_dump_td(ohci_soft_td_t *std) 1730 { 1731 char sbuf[128]; 1732 1733 bitmask_snprintf((int)le32toh(std->td.td_flags), 1734 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1735 sbuf, sizeof(sbuf)); 1736 1737 DPRINTF(("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1738 "nexttd=0x%08lx be=0x%08lx\n", 1739 std, (u_long)std->physaddr, sbuf, 1740 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1741 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1742 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1743 (u_long)le32toh(std->td.td_cbp), 1744 (u_long)le32toh(std->td.td_nexttd), 1745 (u_long)le32toh(std->td.td_be))); 1746 } 1747 1748 void 1749 ohci_dump_itd(ohci_soft_itd_t *sitd) 1750 { 1751 int i; 1752 1753 DPRINTF(("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1754 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1755 sitd, (u_long)sitd->physaddr, 1756 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1757 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1758 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1759 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1760 (u_long)le32toh(sitd->itd.itd_bp0), 1761 (u_long)le32toh(sitd->itd.itd_nextitd), 1762 (u_long)le32toh(sitd->itd.itd_be))); 1763 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1764 DPRINTF(("offs[%d]=0x%04x ", i, 1765 (u_int)le16toh(sitd->itd.itd_offset[i]))); 1766 DPRINTF(("\n")); 1767 } 1768 1769 void 1770 ohci_dump_itds(ohci_soft_itd_t *sitd) 1771 { 1772 for (; sitd; sitd = sitd->nextitd) 1773 ohci_dump_itd(sitd); 1774 } 1775 1776 void 1777 ohci_dump_ed(ohci_soft_ed_t *sed) 1778 { 1779 char sbuf[128], sbuf2[128]; 1780 1781 bitmask_snprintf((int)le32toh(sed->ed.ed_flags), 1782 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1783 sbuf, sizeof(sbuf)); 1784 bitmask_snprintf((u_long)le32toh(sed->ed.ed_headp), 1785 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1786 1787 DPRINTF(("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d %s\ntailp=0x%08lx " 1788 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1789 sed, (u_long)sed->physaddr, 1790 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1791 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1792 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 1793 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 1794 (u_long)le32toh(sed->ed.ed_headp), 1795 (u_long)le32toh(sed->ed.ed_nexted))); 1796 } 1797 #endif 1798 1799 usbd_status 1800 ohci_open(usbd_pipe_handle pipe) 1801 { 1802 usbd_device_handle dev = pipe->device; 1803 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1804 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1805 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1806 u_int8_t addr = dev->address; 1807 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1808 ohci_soft_ed_t *sed; 1809 ohci_soft_td_t *std; 1810 ohci_soft_itd_t *sitd; 1811 ohci_physaddr_t tdphys; 1812 u_int32_t fmt; 1813 usbd_status err; 1814 int s; 1815 int ival; 1816 1817 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1818 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1819 1820 std = NULL; 1821 sed = NULL; 1822 1823 if (addr == sc->sc_addr) { 1824 switch (ed->bEndpointAddress) { 1825 case USB_CONTROL_ENDPOINT: 1826 pipe->methods = &ohci_root_ctrl_methods; 1827 break; 1828 case UE_DIR_IN | OHCI_INTR_ENDPT: 1829 pipe->methods = &ohci_root_intr_methods; 1830 break; 1831 default: 1832 return (USBD_INVAL); 1833 } 1834 } else { 1835 sed = ohci_alloc_sed(sc); 1836 if (sed == NULL) 1837 goto bad0; 1838 opipe->sed = sed; 1839 if (xfertype == UE_ISOCHRONOUS) { 1840 sitd = ohci_alloc_sitd(sc); 1841 if (sitd == NULL) { 1842 ohci_free_sitd(sc, sitd); 1843 goto bad1; 1844 } 1845 opipe->tail.itd = sitd; 1846 tdphys = sitd->physaddr; 1847 fmt = OHCI_ED_FORMAT_ISO; 1848 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 1849 fmt |= OHCI_ED_DIR_IN; 1850 else 1851 fmt |= OHCI_ED_DIR_OUT; 1852 } else { 1853 std = ohci_alloc_std(sc); 1854 if (std == NULL) { 1855 ohci_free_std(sc, std); 1856 goto bad1; 1857 } 1858 opipe->tail.td = std; 1859 tdphys = std->physaddr; 1860 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 1861 } 1862 sed->ed.ed_flags = htole32( 1863 OHCI_ED_SET_FA(addr) | 1864 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1865 (dev->lowspeed ? OHCI_ED_SPEED : 0) | fmt | 1866 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1867 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 1868 1869 switch (xfertype) { 1870 case UE_CONTROL: 1871 pipe->methods = &ohci_device_ctrl_methods; 1872 err = usb_allocmem(&sc->sc_bus, 1873 sizeof(usb_device_request_t), 1874 0, &opipe->u.ctl.reqdma); 1875 if (err) 1876 goto bad; 1877 s = splusb(); 1878 ohci_add_ed(sed, sc->sc_ctrl_head); 1879 splx(s); 1880 break; 1881 case UE_INTERRUPT: 1882 pipe->methods = &ohci_device_intr_methods; 1883 ival = pipe->interval; 1884 if (ival == USBD_DEFAULT_INTERVAL) 1885 ival = ed->bInterval; 1886 return (ohci_device_setintr(sc, opipe, ival)); 1887 case UE_ISOCHRONOUS: 1888 pipe->methods = &ohci_device_isoc_methods; 1889 return (ohci_setup_isoc(pipe)); 1890 case UE_BULK: 1891 pipe->methods = &ohci_device_bulk_methods; 1892 s = splusb(); 1893 ohci_add_ed(sed, sc->sc_bulk_head); 1894 splx(s); 1895 break; 1896 } 1897 } 1898 return (USBD_NORMAL_COMPLETION); 1899 1900 bad: 1901 if (std != NULL) 1902 ohci_free_std(sc, std); 1903 bad1: 1904 if (sed != NULL) 1905 ohci_free_sed(sc, sed); 1906 bad0: 1907 return (USBD_NOMEM); 1908 1909 } 1910 1911 /* 1912 * Close a reqular pipe. 1913 * Assumes that there are no pending transactions. 1914 */ 1915 void 1916 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 1917 { 1918 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1919 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1920 ohci_soft_ed_t *sed = opipe->sed; 1921 int s; 1922 1923 s = splusb(); 1924 #ifdef DIAGNOSTIC 1925 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 1926 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 1927 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 1928 ohci_physaddr_t td = le32toh(sed->ed.ed_headp); 1929 ohci_soft_td_t *std; 1930 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]); 1931 std != NULL; 1932 std = LIST_NEXT(std, hnext)) 1933 if (std->physaddr == td) 1934 break; 1935 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 1936 "tl=0x%x pipe=%p, std=%p\n", sed, 1937 (int)le32toh(sed->ed.ed_headp), 1938 (int)le32toh(sed->ed.ed_tailp), 1939 pipe, std); 1940 usb_delay_ms(&sc->sc_bus, 2); 1941 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 1942 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 1943 printf("ohci_close_pipe: pipe still not empty\n"); 1944 } 1945 #endif 1946 ohci_rem_ed(sed, head); 1947 splx(s); 1948 ohci_free_sed(sc, opipe->sed); 1949 } 1950 1951 /* 1952 * Abort a device request. 1953 * If this routine is called at splusb() it guarantees that the request 1954 * will be removed from the hardware scheduling and that the callback 1955 * for it will be called with USBD_CANCELLED status. 1956 * It's impossible to guarantee that the requested transfer will not 1957 * have happened since the hardware runs concurrently. 1958 * If the transaction has already happened we rely on the ordinary 1959 * interrupt processing to process it. 1960 */ 1961 void 1962 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 1963 { 1964 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1965 ohci_soft_ed_t *sed; 1966 1967 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p\n", xfer, opipe)); 1968 1969 xfer->status = status; 1970 1971 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1972 1973 sed = opipe->sed; 1974 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 1975 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 1976 1977 #if 1 1978 if (xfer->device->bus->intr_context) { 1979 /* We have no process context, so we can't use tsleep(). */ 1980 usb_callout(xfer->pipe->abort_handle, 1981 hz / USB_FRAMES_PER_SECOND, ohci_abort_xfer_end, xfer); 1982 } else { 1983 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 1984 KASSERT(intr_nesting_level == 0, 1985 ("ohci_abort_req in interrupt context")); 1986 #endif 1987 usb_delay_ms(opipe->pipe.device->bus, 1); 1988 ohci_abort_xfer_end(xfer); 1989 } 1990 #else 1991 delay(1000); 1992 ohci_abort_xfer_end(xfer); 1993 #endif 1994 } 1995 1996 void 1997 ohci_abort_xfer_end(void *v) 1998 { 1999 usbd_xfer_handle xfer = v; 2000 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2001 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2002 ohci_soft_ed_t *sed; 2003 ohci_soft_td_t *p, *n; 2004 int s; 2005 2006 s = splusb(); 2007 2008 p = xfer->hcpriv; 2009 #ifdef DIAGNOSTIC 2010 if (p == NULL) { 2011 printf("ohci_abort_xfer: hcpriv==0\n"); 2012 return; 2013 } 2014 #endif 2015 for (; p->xfer == xfer; p = n) { 2016 n = p->nexttd; 2017 ohci_free_std(sc, p); 2018 } 2019 2020 sed = opipe->sed; 2021 DPRINTFN(2,("ohci_abort_xfer: set hd=%x, tl=%x\n", 2022 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2023 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2024 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2025 2026 usb_transfer_complete(xfer); 2027 2028 splx(s); 2029 } 2030 2031 /* 2032 * Data structures and routines to emulate the root hub. 2033 */ 2034 Static usb_device_descriptor_t ohci_devd = { 2035 USB_DEVICE_DESCRIPTOR_SIZE, 2036 UDESC_DEVICE, /* type */ 2037 {0x00, 0x01}, /* USB version */ 2038 UDCLASS_HUB, /* class */ 2039 UDSUBCLASS_HUB, /* subclass */ 2040 0, /* protocol */ 2041 64, /* max packet */ 2042 {0},{0},{0x00,0x01}, /* device id */ 2043 1,2,0, /* string indicies */ 2044 1 /* # of configurations */ 2045 }; 2046 2047 Static usb_config_descriptor_t ohci_confd = { 2048 USB_CONFIG_DESCRIPTOR_SIZE, 2049 UDESC_CONFIG, 2050 {USB_CONFIG_DESCRIPTOR_SIZE + 2051 USB_INTERFACE_DESCRIPTOR_SIZE + 2052 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2053 1, 2054 1, 2055 0, 2056 UC_SELF_POWERED, 2057 0 /* max power */ 2058 }; 2059 2060 Static usb_interface_descriptor_t ohci_ifcd = { 2061 USB_INTERFACE_DESCRIPTOR_SIZE, 2062 UDESC_INTERFACE, 2063 0, 2064 0, 2065 1, 2066 UICLASS_HUB, 2067 UISUBCLASS_HUB, 2068 0, 2069 0 2070 }; 2071 2072 Static usb_endpoint_descriptor_t ohci_endpd = { 2073 USB_ENDPOINT_DESCRIPTOR_SIZE, 2074 UDESC_ENDPOINT, 2075 UE_DIR_IN | OHCI_INTR_ENDPT, 2076 UE_INTERRUPT, 2077 {8, 0}, /* max packet */ 2078 255 2079 }; 2080 2081 Static usb_hub_descriptor_t ohci_hubd = { 2082 USB_HUB_DESCRIPTOR_SIZE, 2083 UDESC_HUB, 2084 0, 2085 {0,0}, 2086 0, 2087 0, 2088 {0}, 2089 }; 2090 2091 Static int 2092 ohci_str(p, l, s) 2093 usb_string_descriptor_t *p; 2094 int l; 2095 char *s; 2096 { 2097 int i; 2098 2099 if (l == 0) 2100 return (0); 2101 p->bLength = 2 * strlen(s) + 2; 2102 if (l == 1) 2103 return (1); 2104 p->bDescriptorType = UDESC_STRING; 2105 l -= 2; 2106 for (i = 0; s[i] && l > 1; i++, l -= 2) 2107 USETW2(p->bString[i], 0, s[i]); 2108 return (2*i+2); 2109 } 2110 2111 /* 2112 * Simulate a hardware hub by handling all the necessary requests. 2113 */ 2114 Static usbd_status 2115 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2116 { 2117 usbd_status err; 2118 2119 /* Insert last in queue. */ 2120 err = usb_insert_transfer(xfer); 2121 if (err) 2122 return (err); 2123 2124 /* Pipe isn't running, start first */ 2125 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2126 } 2127 2128 Static usbd_status 2129 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2130 { 2131 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2132 usb_device_request_t *req; 2133 void *buf = NULL; 2134 int port, i; 2135 int s, len, value, index, l, totlen = 0; 2136 usb_port_status_t ps; 2137 usb_hub_descriptor_t hubd; 2138 usbd_status err; 2139 u_int32_t v; 2140 2141 if (sc->sc_dying) 2142 return (USBD_IOERROR); 2143 2144 #ifdef DIAGNOSTIC 2145 if (!(xfer->rqflags & URQ_REQUEST)) 2146 /* XXX panic */ 2147 return (USBD_INVAL); 2148 #endif 2149 req = &xfer->request; 2150 2151 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2152 req->bmRequestType, req->bRequest)); 2153 2154 len = UGETW(req->wLength); 2155 value = UGETW(req->wValue); 2156 index = UGETW(req->wIndex); 2157 2158 if (len != 0) 2159 buf = KERNADDR(&xfer->dmabuf); 2160 2161 #define C(x,y) ((x) | ((y) << 8)) 2162 switch(C(req->bRequest, req->bmRequestType)) { 2163 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2164 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2165 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2166 /* 2167 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2168 * for the integrated root hub. 2169 */ 2170 break; 2171 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2172 if (len > 0) { 2173 *(u_int8_t *)buf = sc->sc_conf; 2174 totlen = 1; 2175 } 2176 break; 2177 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2178 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2179 switch(value >> 8) { 2180 case UDESC_DEVICE: 2181 if ((value & 0xff) != 0) { 2182 err = USBD_IOERROR; 2183 goto ret; 2184 } 2185 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2186 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2187 memcpy(buf, &ohci_devd, l); 2188 break; 2189 case UDESC_CONFIG: 2190 if ((value & 0xff) != 0) { 2191 err = USBD_IOERROR; 2192 goto ret; 2193 } 2194 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2195 memcpy(buf, &ohci_confd, l); 2196 buf = (char *)buf + l; 2197 len -= l; 2198 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2199 totlen += l; 2200 memcpy(buf, &ohci_ifcd, l); 2201 buf = (char *)buf + l; 2202 len -= l; 2203 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2204 totlen += l; 2205 memcpy(buf, &ohci_endpd, l); 2206 break; 2207 case UDESC_STRING: 2208 if (len == 0) 2209 break; 2210 *(u_int8_t *)buf = 0; 2211 totlen = 1; 2212 switch (value & 0xff) { 2213 case 1: /* Vendor */ 2214 totlen = ohci_str(buf, len, sc->sc_vendor); 2215 break; 2216 case 2: /* Product */ 2217 totlen = ohci_str(buf, len, "OHCI root hub"); 2218 break; 2219 } 2220 break; 2221 default: 2222 err = USBD_IOERROR; 2223 goto ret; 2224 } 2225 break; 2226 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2227 if (len > 0) { 2228 *(u_int8_t *)buf = 0; 2229 totlen = 1; 2230 } 2231 break; 2232 case C(UR_GET_STATUS, UT_READ_DEVICE): 2233 if (len > 1) { 2234 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2235 totlen = 2; 2236 } 2237 break; 2238 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2239 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2240 if (len > 1) { 2241 USETW(((usb_status_t *)buf)->wStatus, 0); 2242 totlen = 2; 2243 } 2244 break; 2245 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2246 if (value >= USB_MAX_DEVICES) { 2247 err = USBD_IOERROR; 2248 goto ret; 2249 } 2250 sc->sc_addr = value; 2251 break; 2252 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2253 if (value != 0 && value != 1) { 2254 err = USBD_IOERROR; 2255 goto ret; 2256 } 2257 sc->sc_conf = value; 2258 break; 2259 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2260 break; 2261 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2262 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2263 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2264 err = USBD_IOERROR; 2265 goto ret; 2266 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2267 break; 2268 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2269 break; 2270 /* Hub requests */ 2271 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2272 break; 2273 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2274 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2275 "port=%d feature=%d\n", 2276 index, value)); 2277 if (index < 1 || index > sc->sc_noport) { 2278 err = USBD_IOERROR; 2279 goto ret; 2280 } 2281 port = OHCI_RH_PORT_STATUS(index); 2282 switch(value) { 2283 case UHF_PORT_ENABLE: 2284 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2285 break; 2286 case UHF_PORT_SUSPEND: 2287 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2288 break; 2289 case UHF_PORT_POWER: 2290 /* Yes, writing to the LOW_SPEED bit clears power. */ 2291 OWRITE4(sc, port, UPS_LOW_SPEED); 2292 break; 2293 case UHF_C_PORT_CONNECTION: 2294 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2295 break; 2296 case UHF_C_PORT_ENABLE: 2297 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2298 break; 2299 case UHF_C_PORT_SUSPEND: 2300 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2301 break; 2302 case UHF_C_PORT_OVER_CURRENT: 2303 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2304 break; 2305 case UHF_C_PORT_RESET: 2306 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2307 break; 2308 default: 2309 err = USBD_IOERROR; 2310 goto ret; 2311 } 2312 switch(value) { 2313 case UHF_C_PORT_CONNECTION: 2314 case UHF_C_PORT_ENABLE: 2315 case UHF_C_PORT_SUSPEND: 2316 case UHF_C_PORT_OVER_CURRENT: 2317 case UHF_C_PORT_RESET: 2318 /* Enable RHSC interrupt if condition is cleared. */ 2319 if ((OREAD4(sc, port) >> 16) == 0) 2320 ohci_rhsc_able(sc, 1); 2321 break; 2322 default: 2323 break; 2324 } 2325 break; 2326 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2327 if (value != 0) { 2328 err = USBD_IOERROR; 2329 goto ret; 2330 } 2331 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2332 hubd = ohci_hubd; 2333 hubd.bNbrPorts = sc->sc_noport; 2334 USETW(hubd.wHubCharacteristics, 2335 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2336 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2337 /* XXX overcurrent */ 2338 ); 2339 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2340 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2341 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2342 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2343 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2344 l = min(len, hubd.bDescLength); 2345 totlen = l; 2346 memcpy(buf, &hubd, l); 2347 break; 2348 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2349 if (len != 4) { 2350 err = USBD_IOERROR; 2351 goto ret; 2352 } 2353 memset(buf, 0, len); /* ? XXX */ 2354 totlen = len; 2355 break; 2356 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2357 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2358 index)); 2359 if (index < 1 || index > sc->sc_noport) { 2360 err = USBD_IOERROR; 2361 goto ret; 2362 } 2363 if (len != 4) { 2364 err = USBD_IOERROR; 2365 goto ret; 2366 } 2367 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2368 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2369 v)); 2370 USETW(ps.wPortStatus, v); 2371 USETW(ps.wPortChange, v >> 16); 2372 l = min(len, sizeof ps); 2373 memcpy(buf, &ps, l); 2374 totlen = l; 2375 break; 2376 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2377 err = USBD_IOERROR; 2378 goto ret; 2379 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2380 break; 2381 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2382 if (index < 1 || index > sc->sc_noport) { 2383 err = USBD_IOERROR; 2384 goto ret; 2385 } 2386 port = OHCI_RH_PORT_STATUS(index); 2387 switch(value) { 2388 case UHF_PORT_ENABLE: 2389 OWRITE4(sc, port, UPS_PORT_ENABLED); 2390 break; 2391 case UHF_PORT_SUSPEND: 2392 OWRITE4(sc, port, UPS_SUSPEND); 2393 break; 2394 case UHF_PORT_RESET: 2395 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2396 index)); 2397 OWRITE4(sc, port, UPS_RESET); 2398 for (i = 0; i < 10; i++) { 2399 usb_delay_ms(&sc->sc_bus, 10); /* XXX */ 2400 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2401 break; 2402 } 2403 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2404 index, OREAD4(sc, port))); 2405 break; 2406 case UHF_PORT_POWER: 2407 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2408 "%d\n", index)); 2409 OWRITE4(sc, port, UPS_PORT_POWER); 2410 break; 2411 default: 2412 err = USBD_IOERROR; 2413 goto ret; 2414 } 2415 break; 2416 default: 2417 err = USBD_IOERROR; 2418 goto ret; 2419 } 2420 xfer->actlen = totlen; 2421 err = USBD_NORMAL_COMPLETION; 2422 ret: 2423 xfer->status = err; 2424 s = splusb(); 2425 usb_transfer_complete(xfer); 2426 splx(s); 2427 return (USBD_IN_PROGRESS); 2428 } 2429 2430 /* Abort a root control request. */ 2431 Static void 2432 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2433 { 2434 /* Nothing to do, all transfers are synchronous. */ 2435 } 2436 2437 /* Close the root pipe. */ 2438 Static void 2439 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2440 { 2441 DPRINTF(("ohci_root_ctrl_close\n")); 2442 /* Nothing to do. */ 2443 } 2444 2445 Static usbd_status 2446 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2447 { 2448 usbd_status err; 2449 2450 /* Insert last in queue. */ 2451 err = usb_insert_transfer(xfer); 2452 if (err) 2453 return (err); 2454 2455 /* Pipe isn't running, start first */ 2456 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2457 } 2458 2459 Static usbd_status 2460 ohci_root_intr_start(usbd_xfer_handle xfer) 2461 { 2462 usbd_pipe_handle pipe = xfer->pipe; 2463 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2464 2465 if (sc->sc_dying) 2466 return (USBD_IOERROR); 2467 2468 sc->sc_intrxfer = xfer; 2469 2470 return (USBD_IN_PROGRESS); 2471 } 2472 2473 /* Abort a root interrupt request. */ 2474 Static void 2475 ohci_root_intr_abort(usbd_xfer_handle xfer) 2476 { 2477 int s; 2478 2479 if (xfer->pipe->intrxfer == xfer) { 2480 DPRINTF(("ohci_root_intr_abort: remove\n")); 2481 xfer->pipe->intrxfer = NULL; 2482 } 2483 xfer->status = USBD_CANCELLED; 2484 s = splusb(); 2485 usb_transfer_complete(xfer); 2486 splx(s); 2487 } 2488 2489 /* Close the root pipe. */ 2490 Static void 2491 ohci_root_intr_close(usbd_pipe_handle pipe) 2492 { 2493 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2494 2495 DPRINTF(("ohci_root_intr_close\n")); 2496 2497 sc->sc_intrxfer = NULL; 2498 } 2499 2500 /************************/ 2501 2502 Static usbd_status 2503 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2504 { 2505 usbd_status err; 2506 2507 /* Insert last in queue. */ 2508 err = usb_insert_transfer(xfer); 2509 if (err) 2510 return (err); 2511 2512 /* Pipe isn't running, start first */ 2513 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2514 } 2515 2516 Static usbd_status 2517 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2518 { 2519 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2520 usbd_status err; 2521 2522 if (sc->sc_dying) 2523 return (USBD_IOERROR); 2524 2525 #ifdef DIAGNOSTIC 2526 if (!(xfer->rqflags & URQ_REQUEST)) { 2527 /* XXX panic */ 2528 printf("ohci_device_ctrl_transfer: not a request\n"); 2529 return (USBD_INVAL); 2530 } 2531 #endif 2532 2533 err = ohci_device_request(xfer); 2534 if (err) 2535 return (err); 2536 2537 if (sc->sc_bus.use_polling) 2538 ohci_waitintr(sc, xfer); 2539 return (USBD_IN_PROGRESS); 2540 } 2541 2542 /* Abort a device control request. */ 2543 Static void 2544 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2545 { 2546 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2547 ohci_abort_xfer(xfer, USBD_CANCELLED); 2548 } 2549 2550 /* Close a device control pipe. */ 2551 Static void 2552 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2553 { 2554 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2555 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2556 2557 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2558 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2559 ohci_free_std(sc, opipe->tail.td); 2560 } 2561 2562 /************************/ 2563 2564 Static void 2565 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2566 { 2567 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2568 2569 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2570 } 2571 2572 Static void 2573 ohci_noop(usbd_pipe_handle pipe) 2574 { 2575 } 2576 2577 Static usbd_status 2578 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2579 { 2580 usbd_status err; 2581 2582 /* Insert last in queue. */ 2583 err = usb_insert_transfer(xfer); 2584 if (err) 2585 return (err); 2586 2587 /* Pipe isn't running, start first */ 2588 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2589 } 2590 2591 Static usbd_status 2592 ohci_device_bulk_start(usbd_xfer_handle xfer) 2593 { 2594 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2595 usbd_device_handle dev = opipe->pipe.device; 2596 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2597 int addr = dev->address; 2598 ohci_soft_td_t *data, *tail, *tdp; 2599 ohci_soft_ed_t *sed; 2600 int s, len, isread, endpt; 2601 usbd_status err; 2602 2603 if (sc->sc_dying) 2604 return (USBD_IOERROR); 2605 2606 #ifdef DIAGNOSTIC 2607 if (xfer->rqflags & URQ_REQUEST) { 2608 /* XXX panic */ 2609 printf("ohci_device_bulk_start: a request\n"); 2610 return (USBD_INVAL); 2611 } 2612 #endif 2613 2614 len = xfer->length; 2615 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2616 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2617 sed = opipe->sed; 2618 2619 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2620 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2621 endpt)); 2622 2623 opipe->u.bulk.isread = isread; 2624 opipe->u.bulk.length = len; 2625 2626 /* Update device address */ 2627 sed->ed.ed_flags = htole32( 2628 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2629 OHCI_ED_SET_FA(addr)); 2630 2631 /* Allocate a chain of new TDs (including a new tail). */ 2632 data = opipe->tail.td; 2633 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2634 data, &tail); 2635 /* We want interrupt at the end of the transfer. */ 2636 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2637 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2638 tail->flags |= OHCI_CALL_DONE; 2639 tail = tail->nexttd; /* point at sentinel */ 2640 if (err) 2641 return (err); 2642 2643 tail->xfer = NULL; 2644 xfer->hcpriv = data; 2645 2646 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2647 "td_cbp=0x%08x td_be=0x%08x\n", 2648 (int)le32toh(sed->ed.ed_flags), 2649 (int)le32toh(data->td.td_flags), 2650 (int)le32toh(data->td.td_cbp), 2651 (int)le32toh(data->td.td_be))); 2652 2653 #ifdef OHCI_DEBUG 2654 if (ohcidebug > 5) { 2655 ohci_dump_ed(sed); 2656 ohci_dump_tds(data); 2657 } 2658 #endif 2659 2660 /* Insert ED in schedule */ 2661 s = splusb(); 2662 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2663 tdp->xfer = xfer; 2664 } 2665 sed->ed.ed_tailp = htole32(tail->physaddr); 2666 opipe->tail.td = tail; 2667 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2668 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2669 if (xfer->timeout && !sc->sc_bus.use_polling) { 2670 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2671 ohci_timeout, xfer); 2672 } 2673 2674 #if 0 2675 /* This goes wrong if we are too slow. */ 2676 if (ohcidebug > 10) { 2677 delay(10000); 2678 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2679 OREAD4(sc, OHCI_COMMAND_STATUS))); 2680 ohci_dump_ed(sed); 2681 ohci_dump_tds(data); 2682 } 2683 #endif 2684 2685 splx(s); 2686 2687 return (USBD_IN_PROGRESS); 2688 } 2689 2690 Static void 2691 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2692 { 2693 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2694 ohci_abort_xfer(xfer, USBD_CANCELLED); 2695 } 2696 2697 /* 2698 * Close a device bulk pipe. 2699 */ 2700 Static void 2701 ohci_device_bulk_close(usbd_pipe_handle pipe) 2702 { 2703 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2704 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2705 2706 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2707 ohci_close_pipe(pipe, sc->sc_bulk_head); 2708 ohci_free_std(sc, opipe->tail.td); 2709 } 2710 2711 /************************/ 2712 2713 Static usbd_status 2714 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2715 { 2716 usbd_status err; 2717 2718 /* Insert last in queue. */ 2719 err = usb_insert_transfer(xfer); 2720 if (err) 2721 return (err); 2722 2723 /* Pipe isn't running, start first */ 2724 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2725 } 2726 2727 Static usbd_status 2728 ohci_device_intr_start(usbd_xfer_handle xfer) 2729 { 2730 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2731 usbd_device_handle dev = opipe->pipe.device; 2732 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2733 ohci_soft_ed_t *sed = opipe->sed; 2734 ohci_soft_td_t *data, *tail; 2735 int len; 2736 int s; 2737 2738 if (sc->sc_dying) 2739 return (USBD_IOERROR); 2740 2741 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2742 "flags=%d priv=%p\n", 2743 xfer, xfer->length, xfer->flags, xfer->priv)); 2744 2745 #ifdef DIAGNOSTIC 2746 if (xfer->rqflags & URQ_REQUEST) 2747 panic("ohci_device_intr_transfer: a request\n"); 2748 #endif 2749 2750 len = xfer->length; 2751 2752 data = opipe->tail.td; 2753 tail = ohci_alloc_std(sc); 2754 if (tail == NULL) 2755 return (USBD_NOMEM); 2756 tail->xfer = NULL; 2757 2758 data->td.td_flags = htole32( 2759 OHCI_TD_IN | OHCI_TD_NOCC | 2760 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2761 if (xfer->flags & USBD_SHORT_XFER_OK) 2762 data->td.td_flags |= htole32(OHCI_TD_R); 2763 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 2764 data->nexttd = tail; 2765 data->td.td_nexttd = htole32(tail->physaddr); 2766 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 2767 data->len = len; 2768 data->xfer = xfer; 2769 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2770 xfer->hcpriv = data; 2771 2772 #ifdef OHCI_DEBUG 2773 if (ohcidebug > 5) { 2774 DPRINTF(("ohci_device_intr_transfer:\n")); 2775 ohci_dump_ed(sed); 2776 ohci_dump_tds(data); 2777 } 2778 #endif 2779 2780 /* Insert ED in schedule */ 2781 s = splusb(); 2782 sed->ed.ed_tailp = htole32(tail->physaddr); 2783 opipe->tail.td = tail; 2784 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2785 2786 #if 0 2787 /* 2788 * This goes horribly wrong, printing thousands of descriptors, 2789 * because false references are followed due to the fact that the 2790 * TD is gone. 2791 */ 2792 if (ohcidebug > 5) { 2793 usb_delay_ms(&sc->sc_bus, 5); 2794 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2795 OREAD4(sc, OHCI_COMMAND_STATUS))); 2796 ohci_dump_ed(sed); 2797 ohci_dump_tds(data); 2798 } 2799 #endif 2800 splx(s); 2801 2802 return (USBD_IN_PROGRESS); 2803 } 2804 2805 /* Abort a device control request. */ 2806 Static void 2807 ohci_device_intr_abort(usbd_xfer_handle xfer) 2808 { 2809 if (xfer->pipe->intrxfer == xfer) { 2810 DPRINTF(("ohci_device_intr_abort: remove\n")); 2811 xfer->pipe->intrxfer = NULL; 2812 } 2813 ohci_abort_xfer(xfer, USBD_CANCELLED); 2814 } 2815 2816 /* Close a device interrupt pipe. */ 2817 Static void 2818 ohci_device_intr_close(usbd_pipe_handle pipe) 2819 { 2820 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2821 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2822 int nslots = opipe->u.intr.nslots; 2823 int pos = opipe->u.intr.pos; 2824 int j; 2825 ohci_soft_ed_t *p, *sed = opipe->sed; 2826 int s; 2827 2828 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2829 pipe, nslots, pos)); 2830 s = splusb(); 2831 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2832 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2833 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2834 usb_delay_ms(&sc->sc_bus, 2); 2835 2836 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2837 ; 2838 #ifdef DIAGNOSTIC 2839 if (p == NULL) 2840 panic("ohci_device_intr_close: ED not found\n"); 2841 #endif 2842 p->next = sed->next; 2843 p->ed.ed_nexted = sed->ed.ed_nexted; 2844 splx(s); 2845 2846 for (j = 0; j < nslots; j++) 2847 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2848 2849 ohci_free_std(sc, opipe->tail.td); 2850 ohci_free_sed(sc, opipe->sed); 2851 } 2852 2853 Static usbd_status 2854 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 2855 { 2856 int i, j, s, best; 2857 u_int npoll, slow, shigh, nslots; 2858 u_int bestbw, bw; 2859 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2860 2861 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2862 if (ival == 0) { 2863 printf("ohci_setintr: 0 interval\n"); 2864 return (USBD_INVAL); 2865 } 2866 2867 npoll = OHCI_NO_INTRS; 2868 while (npoll > ival) 2869 npoll /= 2; 2870 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2871 2872 /* 2873 * We now know which level in the tree the ED must go into. 2874 * Figure out which slot has most bandwidth left over. 2875 * Slots to examine: 2876 * npoll 2877 * 1 0 2878 * 2 1 2 2879 * 4 3 4 5 6 2880 * 8 7 8 9 10 11 12 13 14 2881 * N (N-1) .. (N-1+N-1) 2882 */ 2883 slow = npoll-1; 2884 shigh = slow + npoll; 2885 nslots = OHCI_NO_INTRS / npoll; 2886 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2887 bw = 0; 2888 for (j = 0; j < nslots; j++) 2889 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 2890 if (bw < bestbw) { 2891 best = i; 2892 bestbw = bw; 2893 } 2894 } 2895 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2896 best, slow, shigh, bestbw)); 2897 2898 s = splusb(); 2899 hsed = sc->sc_eds[best]; 2900 sed->next = hsed->next; 2901 sed->ed.ed_nexted = hsed->ed.ed_nexted; 2902 hsed->next = sed; 2903 hsed->ed.ed_nexted = htole32(sed->physaddr); 2904 splx(s); 2905 2906 for (j = 0; j < nslots; j++) 2907 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 2908 opipe->u.intr.nslots = nslots; 2909 opipe->u.intr.pos = best; 2910 2911 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 2912 return (USBD_NORMAL_COMPLETION); 2913 } 2914 2915 /***********************/ 2916 2917 usbd_status 2918 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 2919 { 2920 usbd_status err; 2921 2922 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 2923 2924 /* Put it on our queue, */ 2925 err = usb_insert_transfer(xfer); 2926 2927 /* bail out on error, */ 2928 if (err && err != USBD_IN_PROGRESS) 2929 return (err); 2930 2931 /* XXX should check inuse here */ 2932 2933 /* insert into schedule, */ 2934 ohci_device_isoc_enter(xfer); 2935 2936 /* and start if the pipe wasn't running */ 2937 if (!err) 2938 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2939 2940 return (err); 2941 } 2942 2943 void 2944 ohci_device_isoc_enter(usbd_xfer_handle xfer) 2945 { 2946 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2947 usbd_device_handle dev = opipe->pipe.device; 2948 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2949 ohci_soft_ed_t *sed = opipe->sed; 2950 struct iso *iso = &opipe->u.iso; 2951 ohci_soft_itd_t *sitd, *nsitd; 2952 ohci_physaddr_t buf, offs, noffs, bp0; 2953 int i, ncur, nframes; 2954 int s; 2955 2956 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 2957 "nframes=%d\n", 2958 iso->inuse, iso->next, xfer, xfer->nframes)); 2959 2960 if (sc->sc_dying) 2961 return; 2962 2963 if (iso->next == -1) { 2964 /* Not in use yet, schedule it a few frames ahead. */ 2965 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 2966 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 2967 iso->next)); 2968 } 2969 2970 sitd = opipe->tail.itd; 2971 buf = DMAADDR(&xfer->dmabuf); 2972 bp0 = OHCI_PAGE(buf); 2973 offs = OHCI_PAGE_OFFSET(buf); 2974 nframes = xfer->nframes; 2975 xfer->hcpriv = sitd; 2976 for (i = ncur = 0; i < nframes; i++, ncur++) { 2977 noffs = offs + xfer->frlengths[i]; 2978 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 2979 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 2980 2981 /* Allocate next ITD */ 2982 nsitd = ohci_alloc_sitd(sc); 2983 if (nsitd == NULL) { 2984 /* XXX what now? */ 2985 printf("%s: isoc TD alloc failed\n", 2986 USBDEVNAME(sc->sc_bus.bdev)); 2987 return; 2988 } 2989 2990 /* Fill current ITD */ 2991 sitd->itd.itd_flags = htole32( 2992 OHCI_ITD_NOCC | 2993 OHCI_ITD_SET_SF(iso->next) | 2994 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 2995 OHCI_ITD_SET_FC(ncur)); 2996 sitd->itd.itd_bp0 = htole32(bp0); 2997 sitd->nextitd = nsitd; 2998 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 2999 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3000 sitd->xfer = xfer; 3001 sitd->flags = 0; 3002 3003 sitd = nsitd; 3004 iso->next = iso->next + ncur; 3005 bp0 = OHCI_PAGE(buf + offs); 3006 ncur = 0; 3007 } 3008 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3009 offs = noffs; 3010 } 3011 nsitd = ohci_alloc_sitd(sc); 3012 if (nsitd == NULL) { 3013 /* XXX what now? */ 3014 printf("%s: isoc TD alloc failed\n", 3015 USBDEVNAME(sc->sc_bus.bdev)); 3016 return; 3017 } 3018 /* Fixup last used ITD */ 3019 sitd->itd.itd_flags = htole32( 3020 OHCI_ITD_NOCC | 3021 OHCI_ITD_SET_SF(iso->next) | 3022 OHCI_ITD_SET_DI(0) | 3023 OHCI_ITD_SET_FC(ncur)); 3024 sitd->itd.itd_bp0 = htole32(bp0); 3025 sitd->nextitd = nsitd; 3026 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3027 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3028 sitd->xfer = xfer; 3029 sitd->flags = OHCI_CALL_DONE; 3030 3031 iso->next = iso->next + ncur; 3032 iso->inuse += nframes; 3033 3034 xfer->actlen = offs; /* XXX pretend we did it all */ 3035 3036 xfer->status = USBD_IN_PROGRESS; 3037 3038 #ifdef OHCI_DEBUG 3039 if (ohcidebug > 5) { 3040 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3041 le32toh(sc->sc_hcca->hcca_frame_number))); 3042 ohci_dump_itds(xfer->hcpriv); 3043 ohci_dump_ed(sed); 3044 } 3045 #endif 3046 3047 s = splusb(); 3048 opipe->tail.itd = nsitd; 3049 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3050 splx(s); 3051 3052 #ifdef OHCI_DEBUG 3053 if (ohcidebug > 5) { 3054 delay(150000); 3055 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3056 le32toh(sc->sc_hcca->hcca_frame_number))); 3057 ohci_dump_itds(xfer->hcpriv); 3058 ohci_dump_ed(sed); 3059 } 3060 #endif 3061 } 3062 3063 usbd_status 3064 ohci_device_isoc_start(usbd_xfer_handle xfer) 3065 { 3066 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3067 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3068 3069 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3070 3071 if (sc->sc_dying) 3072 return (USBD_IOERROR); 3073 3074 #ifdef DIAGNOSTIC 3075 if (xfer->status != USBD_IN_PROGRESS) 3076 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 3077 #endif 3078 3079 /* XXX anything to do? */ 3080 3081 return (USBD_IN_PROGRESS); 3082 } 3083 3084 void 3085 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3086 { 3087 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3088 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3089 ohci_soft_ed_t *sed; 3090 ohci_soft_itd_t *sitd; 3091 int s; 3092 3093 s = splusb(); 3094 3095 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3096 3097 /* Transfer is already done. */ 3098 if (xfer->status != USBD_NOT_STARTED && 3099 xfer->status != USBD_IN_PROGRESS) { 3100 splx(s); 3101 printf("ohci_device_isoc_abort: early return\n"); 3102 return; 3103 } 3104 3105 /* Give xfer the requested abort code. */ 3106 xfer->status = USBD_CANCELLED; 3107 3108 sed = opipe->sed; 3109 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3110 3111 sitd = xfer->hcpriv; 3112 #ifdef DIAGNOSTIC 3113 if (sitd == NULL) { 3114 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3115 return; 3116 } 3117 #endif 3118 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3119 #ifdef DIAGNOSTIC 3120 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3121 sitd->isdone = 1; 3122 #endif 3123 } 3124 3125 splx(s); 3126 3127 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3128 3129 s = splusb(); 3130 3131 /* Run callback. */ 3132 usb_transfer_complete(xfer); 3133 3134 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3135 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3136 3137 splx(s); 3138 } 3139 3140 void 3141 ohci_device_isoc_done(usbd_xfer_handle xfer) 3142 { 3143 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3144 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3145 ohci_soft_itd_t *sitd, *nsitd; 3146 3147 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3148 3149 for (sitd = xfer->hcpriv; 3150 !(sitd->flags & OHCI_CALL_DONE); 3151 sitd = nsitd) { 3152 nsitd = sitd->nextitd; 3153 DPRINTFN(1,("ohci_device_isoc_done: free sitd=%p\n", sitd)); 3154 ohci_free_sitd(sc, sitd); 3155 } 3156 ohci_free_sitd(sc, sitd); 3157 xfer->hcpriv = NULL; 3158 } 3159 3160 usbd_status 3161 ohci_setup_isoc(usbd_pipe_handle pipe) 3162 { 3163 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3164 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3165 struct iso *iso = &opipe->u.iso; 3166 int s; 3167 3168 iso->next = -1; 3169 iso->inuse = 0; 3170 3171 s = splusb(); 3172 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3173 splx(s); 3174 3175 return (USBD_NORMAL_COMPLETION); 3176 } 3177 3178 void 3179 ohci_device_isoc_close(usbd_pipe_handle pipe) 3180 { 3181 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3182 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3183 int s; 3184 3185 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3186 3187 s = splusb(); 3188 ohci_rem_ed(opipe->sed, sc->sc_isoc_head); 3189 splx(s); 3190 ohci_close_pipe(pipe, sc->sc_isoc_head); 3191 #ifdef DIAGNOSTIC 3192 opipe->tail.itd->isdone = 1; 3193 #endif 3194 ohci_free_sitd(sc, opipe->tail.itd); 3195 } 3196
Indexes created Fri Oct 03 02:09:57 GMT 2025