ohci.c revision 1.55
1 /* $NetBSD: ohci.c,v 1.55 1999/11/18 23:32:26 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (augustss (at) carlstedt.se) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe 45 * USB spec: http://www.usb.org/developers/data/usb11.pdf 46 */ 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/kernel.h> 53 #include <sys/device.h> 54 #include <sys/select.h> 55 #elif defined(__FreeBSD__) 56 #include <sys/module.h> 57 #include <sys/bus.h> 58 #include <machine/bus_pio.h> 59 #include <machine/bus_memio.h> 60 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 61 #include <machine/cpu.h> 62 #endif 63 #endif 64 #include <sys/proc.h> 65 #include <sys/queue.h> 66 67 #include <machine/bus.h> 68 #include <machine/endian.h> 69 70 #include <dev/usb/usb.h> 71 #include <dev/usb/usbdi.h> 72 #include <dev/usb/usbdivar.h> 73 #include <dev/usb/usb_mem.h> 74 #include <dev/usb/usb_quirks.h> 75 76 #include <dev/usb/ohcireg.h> 77 #include <dev/usb/ohcivar.h> 78 79 #if defined(__FreeBSD__) 80 #include <machine/clock.h> 81 82 #define delay(d) DELAY(d) 83 #endif 84 85 #if defined(__OpenBSD__) 86 struct cfdriver ohci_cd = { 87 NULL, "ohci", DV_DULL 88 }; 89 #endif 90 91 #ifdef OHCI_DEBUG 92 #define DPRINTF(x) if (ohcidebug) logprintf x 93 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 94 int ohcidebug = 0; 95 #else 96 #define DPRINTF(x) 97 #define DPRINTFN(n,x) 98 #endif 99 100 /* 101 * The OHCI controller is little endian, so on big endian machines 102 * the data strored in memory needs to be swapped. 103 */ 104 #if BYTE_ORDER == BIG_ENDIAN 105 #define LE(x) (bswap32(x)) 106 #else 107 #define LE(x) (x) 108 #endif 109 110 struct ohci_pipe; 111 112 static ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *)); 113 static void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *)); 114 115 static ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *)); 116 static void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *)); 117 118 #if 0 119 static void ohci_free_std_chain __P((ohci_softc_t *, 120 ohci_soft_td_t *, ohci_soft_td_t *)); 121 #endif 122 static usbd_status ohci_alloc_std_chain __P((struct ohci_pipe *, 123 ohci_softc_t *, int, int, int, usb_dma_t *, 124 ohci_soft_td_t *, ohci_soft_td_t **)); 125 126 static void ohci_power __P((int, void *)); 127 static usbd_status ohci_open __P((usbd_pipe_handle)); 128 static void ohci_poll __P((struct usbd_bus *)); 129 static void ohci_waitintr __P((ohci_softc_t *, 130 usbd_xfer_handle)); 131 static void ohci_rhsc __P((ohci_softc_t *, usbd_xfer_handle)); 132 static void ohci_process_done __P((ohci_softc_t *, 133 ohci_physaddr_t)); 134 135 static usbd_status ohci_device_request __P((usbd_xfer_handle xfer)); 136 static void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 137 static void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 138 static void ohci_hash_add_td __P((ohci_softc_t *, 139 ohci_soft_td_t *)); 140 static void ohci_hash_rem_td __P((ohci_softc_t *, 141 ohci_soft_td_t *)); 142 static ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, 143 ohci_physaddr_t)); 144 145 static usbd_status ohci_allocm __P((struct usbd_bus *, usb_dma_t *, 146 u_int32_t)); 147 static void ohci_freem __P((struct usbd_bus *, usb_dma_t *)); 148 149 static usbd_status ohci_root_ctrl_transfer __P((usbd_xfer_handle)); 150 static usbd_status ohci_root_ctrl_start __P((usbd_xfer_handle)); 151 static void ohci_root_ctrl_abort __P((usbd_xfer_handle)); 152 static void ohci_root_ctrl_close __P((usbd_pipe_handle)); 153 154 static usbd_status ohci_root_intr_transfer __P((usbd_xfer_handle)); 155 static usbd_status ohci_root_intr_start __P((usbd_xfer_handle)); 156 static void ohci_root_intr_abort __P((usbd_xfer_handle)); 157 static void ohci_root_intr_close __P((usbd_pipe_handle)); 158 static void ohci_root_intr_done __P((usbd_xfer_handle)); 159 160 static usbd_status ohci_device_ctrl_transfer __P((usbd_xfer_handle)); 161 static usbd_status ohci_device_ctrl_start __P((usbd_xfer_handle)); 162 static void ohci_device_ctrl_abort __P((usbd_xfer_handle)); 163 static void ohci_device_ctrl_close __P((usbd_pipe_handle)); 164 static void ohci_device_ctrl_done __P((usbd_xfer_handle)); 165 166 static usbd_status ohci_device_bulk_transfer __P((usbd_xfer_handle)); 167 static usbd_status ohci_device_bulk_start __P((usbd_xfer_handle)); 168 static void ohci_device_bulk_abort __P((usbd_xfer_handle)); 169 static void ohci_device_bulk_close __P((usbd_pipe_handle)); 170 static void ohci_device_bulk_done __P((usbd_xfer_handle)); 171 172 static usbd_status ohci_device_intr_transfer __P((usbd_xfer_handle)); 173 static usbd_status ohci_device_intr_start __P((usbd_xfer_handle)); 174 static void ohci_device_intr_abort __P((usbd_xfer_handle)); 175 static void ohci_device_intr_close __P((usbd_pipe_handle)); 176 static void ohci_device_intr_done __P((usbd_xfer_handle)); 177 178 #if 0 179 static usbd_status ohci_device_isoc_transfer __P((usbd_xfer_handle)); 180 static usbd_status ohci_device_isoc_start __P((usbd_xfer_handle)); 181 static void ohci_device_isoc_abort __P((usbd_xfer_handle)); 182 static void ohci_device_isoc_close __P((usbd_pipe_handle)); 183 static void ohci_device_isoc_done __P((usbd_xfer_handle)); 184 #endif 185 186 static usbd_status ohci_device_setintr __P((ohci_softc_t *sc, 187 struct ohci_pipe *pipe, int ival)); 188 189 static int ohci_str __P((usb_string_descriptor_t *, int, char *)); 190 191 static void ohci_timeout __P((void *)); 192 static void ohci_rhsc_able __P((ohci_softc_t *, int)); 193 194 static void ohci_close_pipe __P((usbd_pipe_handle pipe, 195 ohci_soft_ed_t *head)); 196 static void ohci_abort_xfer __P((usbd_xfer_handle xfer, 197 usbd_status status)); 198 static void ohci_abort_xfer_end __P((void *)); 199 200 static void ohci_device_clear_toggle __P((usbd_pipe_handle pipe)); 201 static void ohci_noop __P((usbd_pipe_handle pipe)); 202 203 #ifdef OHCI_DEBUG 204 static void ohci_dumpregs __P((ohci_softc_t *)); 205 static void ohci_dump_tds __P((ohci_soft_td_t *)); 206 static void ohci_dump_td __P((ohci_soft_td_t *)); 207 static void ohci_dump_ed __P((ohci_soft_ed_t *)); 208 #endif 209 210 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 211 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 212 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 213 214 /* Reverse the bits in a value 0 .. 31 */ 215 static u_int8_t revbits[OHCI_NO_INTRS] = 216 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 217 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 218 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 219 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 220 221 struct ohci_pipe { 222 struct usbd_pipe pipe; 223 ohci_soft_ed_t *sed; 224 ohci_soft_td_t *tail; 225 /* Info needed for different pipe kinds. */ 226 union { 227 /* Control pipe */ 228 struct { 229 usb_dma_t reqdma; 230 u_int length; 231 ohci_soft_td_t *setup, *data, *stat; 232 } ctl; 233 /* Interrupt pipe */ 234 struct { 235 int nslots; 236 int pos; 237 } intr; 238 /* Bulk pipe */ 239 struct { 240 u_int length; 241 int isread; 242 } bulk; 243 /* Iso pipe */ 244 struct iso { 245 int xxxxx; 246 } iso; 247 } u; 248 }; 249 250 #define OHCI_INTR_ENDPT 1 251 252 static struct usbd_bus_methods ohci_bus_methods = { 253 ohci_open, 254 ohci_poll, 255 ohci_allocm, 256 ohci_freem, 257 }; 258 259 static struct usbd_pipe_methods ohci_root_ctrl_methods = { 260 ohci_root_ctrl_transfer, 261 ohci_root_ctrl_start, 262 ohci_root_ctrl_abort, 263 ohci_root_ctrl_close, 264 ohci_noop, 265 0, 266 }; 267 268 static struct usbd_pipe_methods ohci_root_intr_methods = { 269 ohci_root_intr_transfer, 270 ohci_root_intr_start, 271 ohci_root_intr_abort, 272 ohci_root_intr_close, 273 ohci_noop, 274 ohci_root_intr_done, 275 }; 276 277 static struct usbd_pipe_methods ohci_device_ctrl_methods = { 278 ohci_device_ctrl_transfer, 279 ohci_device_ctrl_start, 280 ohci_device_ctrl_abort, 281 ohci_device_ctrl_close, 282 ohci_noop, 283 ohci_device_ctrl_done, 284 }; 285 286 static struct usbd_pipe_methods ohci_device_intr_methods = { 287 ohci_device_intr_transfer, 288 ohci_device_intr_start, 289 ohci_device_intr_abort, 290 ohci_device_intr_close, 291 ohci_device_clear_toggle, 292 ohci_device_intr_done, 293 }; 294 295 static struct usbd_pipe_methods ohci_device_bulk_methods = { 296 ohci_device_bulk_transfer, 297 ohci_device_bulk_start, 298 ohci_device_bulk_abort, 299 ohci_device_bulk_close, 300 ohci_device_clear_toggle, 301 ohci_device_bulk_done, 302 }; 303 304 #if 0 305 static struct usbd_pipe_methods ohci_device_isoc_methods = { 306 ohci_device_isoc_transfer, 307 ohci_device_isoc_start, 308 ohci_device_isoc_abort, 309 ohci_device_isoc_close, 310 ohci_noop, 311 ohci_device_isoc_done, 312 }; 313 #endif 314 315 #if defined(__NetBSD__) || defined(__OpenBSD__) 316 int 317 ohci_activate(self, act) 318 device_ptr_t self; 319 enum devact act; 320 { 321 struct ohci_softc *sc = (struct ohci_softc *)self; 322 int rv = 0; 323 324 switch (act) { 325 case DVACT_ACTIVATE: 326 return (EOPNOTSUPP); 327 break; 328 329 case DVACT_DEACTIVATE: 330 if (sc->sc_child != NULL) 331 rv = config_deactivate(sc->sc_child); 332 break; 333 } 334 return (rv); 335 } 336 337 int 338 ohci_detach(sc, flags) 339 struct ohci_softc *sc; 340 int flags; 341 { 342 int rv = 0; 343 344 if (sc->sc_child != NULL) 345 rv = config_detach(sc->sc_child, flags); 346 347 if (rv != 0) 348 return (rv); 349 350 powerhook_disestablish(sc->sc_powerhook); 351 /* free data structures XXX */ 352 353 return (rv); 354 } 355 #endif 356 357 ohci_soft_ed_t * 358 ohci_alloc_sed(sc) 359 ohci_softc_t *sc; 360 { 361 ohci_soft_ed_t *sed; 362 usbd_status err; 363 int i, offs; 364 usb_dma_t dma; 365 366 if (sc->sc_freeeds == NULL) { 367 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 368 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 369 OHCI_ED_ALIGN, &dma); 370 if (err) 371 return (0); 372 for(i = 0; i < OHCI_SED_CHUNK; i++) { 373 offs = i * OHCI_SED_SIZE; 374 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 375 sed->physaddr = DMAADDR(&dma) + offs; 376 sed->next = sc->sc_freeeds; 377 sc->sc_freeeds = sed; 378 } 379 } 380 sed = sc->sc_freeeds; 381 sc->sc_freeeds = sed->next; 382 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 383 sed->next = 0; 384 return (sed); 385 } 386 387 void 388 ohci_free_sed(sc, sed) 389 ohci_softc_t *sc; 390 ohci_soft_ed_t *sed; 391 { 392 sed->next = sc->sc_freeeds; 393 sc->sc_freeeds = sed; 394 } 395 396 ohci_soft_td_t * 397 ohci_alloc_std(sc) 398 ohci_softc_t *sc; 399 { 400 ohci_soft_td_t *std; 401 usbd_status err; 402 int i, offs; 403 usb_dma_t dma; 404 405 if (sc->sc_freetds == NULL) { 406 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 407 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 408 OHCI_TD_ALIGN, &dma); 409 if (err) 410 return (0); 411 for(i = 0; i < OHCI_STD_CHUNK; i++) { 412 offs = i * OHCI_STD_SIZE; 413 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 414 std->physaddr = DMAADDR(&dma) + offs; 415 std->nexttd = sc->sc_freetds; 416 sc->sc_freetds = std; 417 } 418 } 419 std = sc->sc_freetds; 420 sc->sc_freetds = std->nexttd; 421 memset(&std->td, 0, sizeof(ohci_td_t)); 422 std->nexttd = 0; 423 return (std); 424 } 425 426 void 427 ohci_free_std(sc, std) 428 ohci_softc_t *sc; 429 ohci_soft_td_t *std; 430 { 431 std->nexttd = sc->sc_freetds; 432 sc->sc_freetds = std; 433 } 434 435 usbd_status 436 ohci_alloc_std_chain(upipe, sc, len, rd, shortok, dma, sp, ep) 437 struct ohci_pipe *upipe; 438 ohci_softc_t *sc; 439 int len, rd, shortok; 440 usb_dma_t *dma; 441 ohci_soft_td_t *sp, **ep; 442 { 443 ohci_soft_td_t *next, *cur; 444 ohci_physaddr_t dataphys, dataphysend; 445 u_int32_t intr; 446 int curlen; 447 448 DPRINTFN(len < 4096,("ohci_alloc_std_chain: start len=%d\n", len)); 449 cur = sp; 450 dataphys = DMAADDR(dma); 451 dataphysend = OHCI_PAGE(dataphys + len - 1); 452 for (;;) { 453 next = ohci_alloc_std(sc); 454 if (next == 0) { 455 /* XXX free chain */ 456 return (USBD_NOMEM); 457 } 458 459 /* The OHCI hardware can handle at most one page crossing. */ 460 if (OHCI_PAGE(dataphys) == dataphysend || 461 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 462 /* we can handle it in this TD */ 463 curlen = len; 464 } else { 465 /* must use multiple TDs, fill as much as possible. */ 466 curlen = 2 * OHCI_PAGE_SIZE - 467 (dataphys & (OHCI_PAGE_SIZE-1)); 468 } 469 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 470 "dataphysend=0x%08x len=%d curlen=%d\n", 471 dataphys, dataphysend, 472 len, curlen)); 473 len -= curlen; 474 475 intr = len == 0 ? OHCI_TD_SET_DI(1) : OHCI_TD_NOINTR; 476 cur->td.td_flags = LE( 477 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 478 intr | OHCI_TD_TOGGLE_CARRY | 479 (shortok ? OHCI_TD_R : 0)); 480 cur->td.td_cbp = LE(dataphys); 481 cur->nexttd = next; 482 cur->td.td_nexttd = LE(next->physaddr); 483 cur->td.td_be = LE(dataphys + curlen - 1); 484 cur->len = curlen; 485 cur->flags = OHCI_ADD_LEN; 486 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 487 dataphys, dataphys + curlen - 1)); 488 if (len == 0) 489 break; 490 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 491 dataphys += curlen; 492 cur = next; 493 } 494 cur->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 495 *ep = next; 496 497 return (USBD_NORMAL_COMPLETION); 498 } 499 500 #if 0 501 static void 502 ohci_free_std_chain(sc, std, stdend) 503 ohci_softc_t *sc; 504 ohci_soft_td_t *std; 505 ohci_soft_td_t *stdend; 506 { 507 ohci_soft_td_t *p; 508 509 for (; std != stdend; std = p) { 510 p = std->nexttd; 511 ohci_free_std(sc, std); 512 } 513 } 514 #endif 515 516 usbd_status 517 ohci_init(sc) 518 ohci_softc_t *sc; 519 { 520 ohci_soft_ed_t *sed, *psed; 521 usbd_status err; 522 int rev; 523 int i; 524 u_int32_t s, ctl, ival, hcr, fm, per; 525 526 DPRINTF(("ohci_init: start\n")); 527 rev = OREAD4(sc, OHCI_REVISION); 528 #if defined(__OpenBSD__) 529 printf(","); 530 #else 531 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 532 #endif 533 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 534 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 535 536 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 537 printf("%s: unsupported OHCI revision\n", 538 USBDEVNAME(sc->sc_bus.bdev)); 539 return (USBD_INVAL); 540 } 541 542 for (i = 0; i < OHCI_HASH_SIZE; i++) 543 LIST_INIT(&sc->sc_hash_tds[i]); 544 545 /* Allocate the HCCA area. */ 546 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 547 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 548 if (err) 549 return (err); 550 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 551 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 552 553 sc->sc_eintrs = OHCI_NORMAL_INTRS; 554 555 sc->sc_ctrl_head = ohci_alloc_sed(sc); 556 if (sc->sc_ctrl_head == NULL) { 557 err = USBD_NOMEM; 558 goto bad1; 559 } 560 sc->sc_ctrl_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 561 562 sc->sc_bulk_head = ohci_alloc_sed(sc); 563 if (sc->sc_bulk_head == NULL) { 564 err = USBD_NOMEM; 565 goto bad2; 566 } 567 sc->sc_bulk_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 568 569 /* Allocate all the dummy EDs that make up the interrupt tree. */ 570 for (i = 0; i < OHCI_NO_EDS; i++) { 571 sed = ohci_alloc_sed(sc); 572 if (sed == NULL) { 573 while (--i >= 0) 574 ohci_free_sed(sc, sc->sc_eds[i]); 575 err = USBD_NOMEM; 576 goto bad3; 577 } 578 /* All ED fields are set to 0. */ 579 sc->sc_eds[i] = sed; 580 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 581 if (i != 0) { 582 psed = sc->sc_eds[(i-1) / 2]; 583 sed->next = psed; 584 sed->ed.ed_nexted = LE(psed->physaddr); 585 } 586 } 587 /* 588 * Fill HCCA interrupt table. The bit reversal is to get 589 * the tree set up properly to spread the interrupts. 590 */ 591 for (i = 0; i < OHCI_NO_INTRS; i++) 592 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 593 LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 594 595 /* Determine in what context we are running. */ 596 ctl = OREAD4(sc, OHCI_CONTROL); 597 if (ctl & OHCI_IR) { 598 /* SMM active, request change */ 599 DPRINTF(("ohci_init: SMM active, request owner change\n")); 600 s = OREAD4(sc, OHCI_COMMAND_STATUS); 601 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 602 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 603 usb_delay_ms(&sc->sc_bus, 1); 604 ctl = OREAD4(sc, OHCI_CONTROL); 605 } 606 if ((ctl & OHCI_IR) == 0) { 607 printf("%s: SMM does not respond, resetting\n", 608 USBDEVNAME(sc->sc_bus.bdev)); 609 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 610 goto reset; 611 } 612 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 613 /* BIOS started controller. */ 614 DPRINTF(("ohci_init: BIOS active\n")); 615 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 616 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 617 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 618 } 619 } else { 620 DPRINTF(("ohci_init: cold started\n")); 621 reset: 622 /* Controller was cold started. */ 623 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 624 } 625 626 /* 627 * This reset should not be necessary according to the OHCI spec, but 628 * without it some controllers do not start. 629 */ 630 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 631 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 632 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 633 634 /* We now own the host controller and the bus has been reset. */ 635 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 636 637 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 638 /* Nominal time for a reset is 10 us. */ 639 for (i = 0; i < 10; i++) { 640 delay(10); 641 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 642 if (!hcr) 643 break; 644 } 645 if (hcr) { 646 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 647 err = USBD_IOERROR; 648 goto bad3; 649 } 650 #ifdef OHCI_DEBUG 651 if (ohcidebug > 15) 652 ohci_dumpregs(sc); 653 #endif 654 655 /* The controller is now in suspend state, we have 2ms to finish. */ 656 657 /* Set up HC registers. */ 658 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 659 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 660 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 661 /* disable all interrupts and then switch on all desired interrupts */ 662 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 663 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 664 /* switch on desired functional features */ 665 ctl = OREAD4(sc, OHCI_CONTROL); 666 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 667 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 668 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 669 /* And finally start it! */ 670 OWRITE4(sc, OHCI_CONTROL, ctl); 671 672 /* 673 * The controller is now OPERATIONAL. Set a some final 674 * registers that should be set earlier, but that the 675 * controller ignores when in the SUSPEND state. 676 */ 677 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 678 fm |= OHCI_FSMPS(ival) | ival; 679 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 680 per = OHCI_PERIODIC(ival); /* 90% periodic */ 681 OWRITE4(sc, OHCI_PERIODIC_START, per); 682 683 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 684 685 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 686 687 #ifdef OHCI_DEBUG 688 if (ohcidebug > 5) 689 ohci_dumpregs(sc); 690 #endif 691 692 /* Set up the bus struct. */ 693 sc->sc_bus.methods = &ohci_bus_methods; 694 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 695 696 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 697 698 return (USBD_NORMAL_COMPLETION); 699 700 bad3: 701 ohci_free_sed(sc, sc->sc_ctrl_head); 702 bad2: 703 ohci_free_sed(sc, sc->sc_bulk_head); 704 bad1: 705 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 706 return (err); 707 } 708 709 usbd_status 710 ohci_allocm(bus, dma, size) 711 struct usbd_bus *bus; 712 usb_dma_t *dma; 713 u_int32_t size; 714 { 715 #if defined(__NetBSD__) || defined(__OpenBSD__) 716 struct ohci_softc *sc = (struct ohci_softc *)bus; 717 #endif 718 719 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 720 } 721 722 void 723 ohci_freem(bus, dma) 724 struct usbd_bus *bus; 725 usb_dma_t *dma; 726 { 727 #if defined(__NetBSD__) || defined(__OpenBSD__) 728 struct ohci_softc *sc = (struct ohci_softc *)bus; 729 #endif 730 731 usb_freemem(&sc->sc_bus, dma); 732 } 733 734 #if defined(__NetBSD__) 735 void 736 ohci_power(why, v) 737 int why; 738 void *v; 739 { 740 #ifdef OHCI_DEBUG 741 ohci_softc_t *sc = v; 742 743 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 744 /* XXX should suspend/resume */ 745 ohci_dumpregs(sc); 746 #endif 747 } 748 #endif /* defined(__NetBSD__) */ 749 750 #ifdef OHCI_DEBUG 751 void 752 ohci_dumpregs(sc) 753 ohci_softc_t *sc; 754 { 755 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 756 OREAD4(sc, OHCI_REVISION), 757 OREAD4(sc, OHCI_CONTROL), 758 OREAD4(sc, OHCI_COMMAND_STATUS))); 759 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 760 OREAD4(sc, OHCI_INTERRUPT_STATUS), 761 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 762 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 763 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 764 OREAD4(sc, OHCI_HCCA), 765 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 766 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 767 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 768 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 769 OREAD4(sc, OHCI_BULK_HEAD_ED), 770 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 771 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 772 OREAD4(sc, OHCI_DONE_HEAD), 773 OREAD4(sc, OHCI_FM_INTERVAL), 774 OREAD4(sc, OHCI_FM_REMAINING))); 775 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 776 OREAD4(sc, OHCI_FM_NUMBER), 777 OREAD4(sc, OHCI_PERIODIC_START), 778 OREAD4(sc, OHCI_LS_THRESHOLD))); 779 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 780 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 781 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 782 OREAD4(sc, OHCI_RH_STATUS))); 783 DPRINTF((" port1=0x%08x port2=0x%08x\n", 784 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 785 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 786 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 787 LE(sc->sc_hcca->hcca_frame_number), 788 LE(sc->sc_hcca->hcca_done_head))); 789 } 790 #endif 791 792 static int ohci_intr1 __P((ohci_softc_t *)); 793 794 int 795 ohci_intr(p) 796 void *p; 797 { 798 ohci_softc_t *sc = p; 799 800 /* If we get an interrupt while polling, then just ignore it. */ 801 if (sc->sc_bus.use_polling) 802 return (0); 803 804 return (ohci_intr1(sc)); 805 } 806 807 static int 808 ohci_intr1(sc) 809 ohci_softc_t *sc; 810 { 811 u_int32_t intrs, eintrs; 812 ohci_physaddr_t done; 813 814 /* In case the interrupt occurs before initialization has completed. */ 815 if (sc == NULL || sc->sc_hcca == NULL) { 816 #ifdef DIAGNOSTIC 817 printf("ohci_intr: sc->sc_hcca == NULL\n"); 818 #endif 819 return (0); 820 } 821 822 intrs = 0; 823 done = LE(sc->sc_hcca->hcca_done_head); 824 if (done != 0) { 825 sc->sc_hcca->hcca_done_head = 0; 826 if (done & ~OHCI_DONE_INTRS) 827 intrs = OHCI_WDH; 828 if (done & OHCI_DONE_INTRS) 829 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 830 } else 831 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 832 833 if (!intrs) 834 return (0); 835 836 intrs &= ~OHCI_MIE; 837 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 838 eintrs = intrs & sc->sc_eintrs; 839 if (!eintrs) 840 return (0); 841 842 sc->sc_bus.intr_context++; 843 sc->sc_bus.no_intrs++; 844 DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n", 845 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 846 (u_int)eintrs)); 847 848 if (eintrs & OHCI_SO) { 849 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev)); 850 /* XXX do what */ 851 intrs &= ~OHCI_SO; 852 } 853 if (eintrs & OHCI_WDH) { 854 ohci_process_done(sc, done &~ OHCI_DONE_INTRS); 855 intrs &= ~OHCI_WDH; 856 } 857 if (eintrs & OHCI_RD) { 858 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 859 /* XXX process resume detect */ 860 } 861 if (eintrs & OHCI_UE) { 862 printf("%s: unrecoverable error, controller halted\n", 863 USBDEVNAME(sc->sc_bus.bdev)); 864 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 865 /* XXX what else */ 866 } 867 if (eintrs & OHCI_RHSC) { 868 ohci_rhsc(sc, sc->sc_intrxfer); 869 intrs &= ~OHCI_RHSC; 870 871 /* 872 * Disable RHSC interrupt for now, because it will be 873 * on until the port has been reset. 874 */ 875 ohci_rhsc_able(sc, 0); 876 } 877 878 sc->sc_bus.intr_context--; 879 880 /* Block unprocessed interrupts. XXX */ 881 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 882 sc->sc_eintrs &= ~intrs; 883 884 return (1); 885 } 886 887 void 888 ohci_rhsc_able(sc, on) 889 ohci_softc_t *sc; 890 int on; 891 { 892 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 893 if (on) { 894 sc->sc_eintrs |= OHCI_RHSC; 895 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 896 } else { 897 sc->sc_eintrs &= ~OHCI_RHSC; 898 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 899 } 900 } 901 902 #ifdef OHCI_DEBUG 903 char *ohci_cc_strs[] = { 904 "NO_ERROR", 905 "CRC", 906 "BIT_STUFFING", 907 "DATA_TOGGLE_MISMATCH", 908 "STALL", 909 "DEVICE_NOT_RESPONDING", 910 "PID_CHECK_FAILURE", 911 "UNEXPECTED_PID", 912 "DATA_OVERRUN", 913 "DATA_UNDERRUN", 914 "BUFFER_OVERRUN", 915 "BUFFER_UNDERRUN", 916 "NOT_ACCESSED", 917 }; 918 #endif 919 920 void 921 ohci_process_done(sc, done) 922 ohci_softc_t *sc; 923 ohci_physaddr_t done; 924 { 925 ohci_soft_td_t *std, *sdone, *stdnext; 926 usbd_xfer_handle xfer; 927 int len, cc; 928 929 DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done)); 930 931 /* Reverse the done list. */ 932 for (sdone = 0; done; done = LE(std->td.td_nexttd)) { 933 std = ohci_hash_find_td(sc, done); 934 std->dnext = sdone; 935 sdone = std; 936 } 937 938 #ifdef OHCI_DEBUG 939 if (ohcidebug > 10) { 940 DPRINTF(("ohci_process_done: TD done:\n")); 941 ohci_dump_tds(sdone); 942 } 943 #endif 944 945 for (std = sdone; std; std = stdnext) { 946 xfer = std->xfer; 947 stdnext = std->dnext; 948 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 949 std, xfer, xfer->hcpriv)); 950 cc = OHCI_TD_GET_CC(LE(std->td.td_flags)); 951 usb_untimeout(ohci_timeout, xfer, xfer->timo_handle); 952 if (xfer->status == USBD_CANCELLED || 953 xfer->status == USBD_TIMEOUT) { 954 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 955 xfer)); 956 /* Handled by abort routine. */ 957 } else if (cc == OHCI_CC_NO_ERROR) { 958 len = std->len; 959 if (std->td.td_cbp != 0) 960 len -= LE(std->td.td_be) - 961 LE(std->td.td_cbp) + 1; 962 if (std->flags & OHCI_ADD_LEN) 963 xfer->actlen += len; 964 if (std->flags & OHCI_CALL_DONE) { 965 xfer->status = USBD_NORMAL_COMPLETION; 966 usb_transfer_complete(xfer); 967 } 968 ohci_hash_rem_td(sc, std); 969 ohci_free_std(sc, std); 970 } else { 971 /* 972 * Endpoint is halted. First unlink all the TDs 973 * belonging to the failed transfer, and then restart 974 * the endpoint. 975 */ 976 ohci_soft_td_t *p, *n; 977 struct ohci_pipe *opipe = 978 (struct ohci_pipe *)xfer->pipe; 979 980 DPRINTF(("ohci_process_done: error cc=%d (%s)\n", 981 OHCI_TD_GET_CC(LE(std->td.td_flags)), 982 ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td.td_flags))])); 983 984 /* remove TDs */ 985 for (p = std; p->xfer == xfer; p = n) { 986 n = p->nexttd; 987 ohci_hash_rem_td(sc, p); 988 ohci_free_std(sc, p); 989 } 990 991 /* clear halt */ 992 opipe->sed->ed.ed_headp = LE(p->physaddr); 993 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 994 995 if (cc == OHCI_CC_STALL) 996 xfer->status = USBD_STALLED; 997 else 998 xfer->status = USBD_IOERROR; 999 usb_transfer_complete(xfer); 1000 } 1001 } 1002 } 1003 1004 void 1005 ohci_device_ctrl_done(xfer) 1006 usbd_xfer_handle xfer; 1007 { 1008 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1009 1010 #ifdef DIAGNOSTIC 1011 if (!(xfer->rqflags & URQ_REQUEST)) { 1012 panic("ohci_ctrl_done: not a request\n"); 1013 } 1014 #endif 1015 xfer->hcpriv = NULL; 1016 } 1017 1018 void 1019 ohci_device_intr_done(xfer) 1020 usbd_xfer_handle xfer; 1021 { 1022 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1023 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1024 ohci_soft_ed_t *sed = opipe->sed; 1025 ohci_soft_td_t *data, *tail; 1026 1027 1028 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1029 xfer, xfer->actlen)); 1030 1031 xfer->hcpriv = NULL; 1032 1033 if (xfer->pipe->repeat) { 1034 data = opipe->tail; 1035 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1036 if (tail == NULL) { 1037 xfer->status = USBD_NOMEM; 1038 return; 1039 } 1040 tail->xfer = NULL; 1041 1042 data->td.td_flags = LE( 1043 OHCI_TD_IN | OHCI_TD_NOCC | 1044 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1045 if (xfer->flags & USBD_SHORT_XFER_OK) 1046 data->td.td_flags |= LE(OHCI_TD_R); 1047 data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf)); 1048 data->nexttd = tail; 1049 data->td.td_nexttd = LE(tail->physaddr); 1050 data->td.td_be = LE(LE(data->td.td_cbp) + xfer->length - 1); 1051 data->len = xfer->length; 1052 data->xfer = xfer; 1053 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1054 xfer->hcpriv = data; 1055 xfer->actlen = 0; 1056 1057 ohci_hash_add_td(sc, data); 1058 sed->ed.ed_tailp = LE(tail->physaddr); 1059 opipe->tail = tail; 1060 } 1061 } 1062 1063 void 1064 ohci_device_bulk_done(xfer) 1065 usbd_xfer_handle xfer; 1066 { 1067 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1068 xfer, xfer->actlen)); 1069 1070 xfer->hcpriv = NULL; 1071 } 1072 1073 void 1074 ohci_rhsc(sc, xfer) 1075 ohci_softc_t *sc; 1076 usbd_xfer_handle xfer; 1077 { 1078 usbd_pipe_handle pipe; 1079 struct ohci_pipe *opipe; 1080 u_char *p; 1081 int i, m; 1082 int hstatus; 1083 1084 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1085 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1086 sc, xfer, hstatus)); 1087 1088 if (xfer == NULL) { 1089 /* Just ignore the change. */ 1090 return; 1091 } 1092 1093 pipe = xfer->pipe; 1094 opipe = (struct ohci_pipe *)pipe; 1095 1096 p = KERNADDR(&xfer->dmabuf); 1097 m = min(sc->sc_noport, xfer->length * 8 - 1); 1098 memset(p, 0, xfer->length); 1099 for (i = 1; i <= m; i++) { 1100 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1101 p[i/8] |= 1 << (i%8); 1102 } 1103 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1104 xfer->actlen = xfer->length; 1105 xfer->status = USBD_NORMAL_COMPLETION; 1106 1107 usb_transfer_complete(xfer); 1108 } 1109 1110 void 1111 ohci_root_intr_done(xfer) 1112 usbd_xfer_handle xfer; 1113 { 1114 xfer->hcpriv = NULL; 1115 } 1116 1117 /* 1118 * Wait here until controller claims to have an interrupt. 1119 * Then call ohci_intr and return. Use timeout to avoid waiting 1120 * too long. 1121 */ 1122 void 1123 ohci_waitintr(sc, xfer) 1124 ohci_softc_t *sc; 1125 usbd_xfer_handle xfer; 1126 { 1127 int timo = xfer->timeout; 1128 int usecs; 1129 u_int32_t intrs; 1130 1131 xfer->status = USBD_IN_PROGRESS; 1132 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1133 usb_delay_ms(&sc->sc_bus, 1); 1134 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1135 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1136 #ifdef OHCI_DEBUG 1137 if (ohcidebug > 15) 1138 ohci_dumpregs(sc); 1139 #endif 1140 if (intrs) { 1141 ohci_intr1(sc); 1142 if (xfer->status != USBD_IN_PROGRESS) 1143 return; 1144 } 1145 } 1146 1147 /* Timeout */ 1148 DPRINTF(("ohci_waitintr: timeout\n")); 1149 xfer->status = USBD_TIMEOUT; 1150 usb_transfer_complete(xfer); 1151 /* XXX should free TD */ 1152 } 1153 1154 void 1155 ohci_poll(bus) 1156 struct usbd_bus *bus; 1157 { 1158 ohci_softc_t *sc = (ohci_softc_t *)bus; 1159 1160 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1161 ohci_intr1(sc); 1162 } 1163 1164 usbd_status 1165 ohci_device_request(xfer) 1166 usbd_xfer_handle xfer; 1167 { 1168 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1169 usb_device_request_t *req = &xfer->request; 1170 usbd_device_handle dev = opipe->pipe.device; 1171 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1172 int addr = dev->address; 1173 ohci_soft_td_t *setup, *data = 0, *stat, *next, *tail; 1174 ohci_soft_ed_t *sed; 1175 int isread; 1176 int len; 1177 usbd_status err; 1178 int s; 1179 1180 isread = req->bmRequestType & UT_READ; 1181 len = UGETW(req->wLength); 1182 1183 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1184 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1185 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1186 UGETW(req->wIndex), len, addr, 1187 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1188 1189 setup = opipe->tail; 1190 stat = ohci_alloc_std(sc); 1191 if (stat == NULL) { 1192 err = USBD_NOMEM; 1193 goto bad1; 1194 } 1195 tail = ohci_alloc_std(sc); 1196 if (tail == NULL) { 1197 err = USBD_NOMEM; 1198 goto bad2; 1199 } 1200 tail->xfer = NULL; 1201 1202 sed = opipe->sed; 1203 opipe->u.ctl.length = len; 1204 1205 /* Update device address and length since they may have changed. */ 1206 /* XXX This only needs to be done once, but it's too early in open. */ 1207 sed->ed.ed_flags = LE( 1208 (LE(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1209 OHCI_ED_SET_FA(addr) | 1210 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1211 1212 /* Set up data transaction */ 1213 if (len != 0) { 1214 data = ohci_alloc_std(sc); 1215 if (data == NULL) { 1216 err = USBD_NOMEM; 1217 goto bad3; 1218 } 1219 data->td.td_flags = LE( 1220 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 1221 OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR | 1222 (xfer->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0)); 1223 data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf)); 1224 data->nexttd = stat; 1225 data->td.td_nexttd = LE(stat->physaddr); 1226 data->td.td_be = LE(LE(data->td.td_cbp) + len - 1); 1227 data->len = len; 1228 data->xfer = xfer; 1229 data->flags = OHCI_ADD_LEN; 1230 1231 next = data; 1232 stat->flags = OHCI_CALL_DONE; 1233 } else { 1234 next = stat; 1235 /* XXX ADD_LEN? */ 1236 stat->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1237 } 1238 1239 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1240 1241 setup->td.td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC | 1242 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1243 setup->td.td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma)); 1244 setup->nexttd = next; 1245 setup->td.td_nexttd = LE(next->physaddr); 1246 setup->td.td_be = LE(LE(setup->td.td_cbp) + sizeof *req - 1); 1247 setup->len = 0; /* XXX The number of byte we count */ 1248 setup->xfer = xfer; 1249 setup->flags = 0; 1250 xfer->hcpriv = setup; 1251 1252 stat->td.td_flags = LE( 1253 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC | 1254 OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1255 stat->td.td_cbp = 0; 1256 stat->nexttd = tail; 1257 stat->td.td_nexttd = LE(tail->physaddr); 1258 stat->td.td_be = 0; 1259 stat->len = 0; 1260 stat->xfer = xfer; 1261 1262 #ifdef OHCI_DEBUG 1263 if (ohcidebug > 5) { 1264 DPRINTF(("ohci_device_request:\n")); 1265 ohci_dump_ed(sed); 1266 ohci_dump_tds(setup); 1267 } 1268 #endif 1269 1270 /* Insert ED in schedule */ 1271 s = splusb(); 1272 ohci_hash_add_td(sc, setup); 1273 if (len != 0) 1274 ohci_hash_add_td(sc, data); 1275 ohci_hash_add_td(sc, stat); 1276 sed->ed.ed_tailp = LE(tail->physaddr); 1277 opipe->tail = tail; 1278 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1279 if (xfer->timeout && !sc->sc_bus.use_polling) { 1280 usb_timeout(ohci_timeout, xfer, 1281 MS_TO_TICKS(xfer->timeout), xfer->timo_handle); 1282 } 1283 splx(s); 1284 1285 #ifdef OHCI_DEBUG 1286 if (ohcidebug > 5) { 1287 usb_delay_ms(&sc->sc_bus, 5); 1288 DPRINTF(("ohci_device_request: status=%x\n", 1289 OREAD4(sc, OHCI_COMMAND_STATUS))); 1290 ohci_dump_ed(sed); 1291 ohci_dump_tds(setup); 1292 } 1293 #endif 1294 1295 return (USBD_NORMAL_COMPLETION); 1296 1297 bad3: 1298 ohci_free_std(sc, tail); 1299 bad2: 1300 ohci_free_std(sc, stat); 1301 bad1: 1302 return (err); 1303 } 1304 1305 /* 1306 * Add an ED to the schedule. Called at splusb(). 1307 */ 1308 void 1309 ohci_add_ed(sed, head) 1310 ohci_soft_ed_t *sed; 1311 ohci_soft_ed_t *head; 1312 { 1313 SPLUSBCHECK; 1314 sed->next = head->next; 1315 sed->ed.ed_nexted = head->ed.ed_nexted; 1316 head->next = sed; 1317 head->ed.ed_nexted = LE(sed->physaddr); 1318 } 1319 1320 /* 1321 * Remove an ED from the schedule. Called at splusb(). 1322 */ 1323 void 1324 ohci_rem_ed(sed, head) 1325 ohci_soft_ed_t *sed; 1326 ohci_soft_ed_t *head; 1327 { 1328 ohci_soft_ed_t *p; 1329 1330 SPLUSBCHECK; 1331 1332 /* XXX */ 1333 for (p = head; p == NULL && p->next != sed; p = p->next) 1334 ; 1335 if (p == NULL) 1336 panic("ohci_rem_ed: ED not found\n"); 1337 p->next = sed->next; 1338 p->ed.ed_nexted = sed->ed.ed_nexted; 1339 } 1340 1341 /* 1342 * When a transfer is completed the TD is added to the done queue by 1343 * the host controller. This queue is the processed by software. 1344 * Unfortunately the queue contains the physical address of the TD 1345 * and we have no simple way to translate this back to a kernel address. 1346 * To make the translation possible (and fast) we use a hash table of 1347 * TDs currently in the schedule. The physical address is used as the 1348 * hash value. 1349 */ 1350 1351 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1352 /* Called at splusb() */ 1353 void 1354 ohci_hash_add_td(sc, std) 1355 ohci_softc_t *sc; 1356 ohci_soft_td_t *std; 1357 { 1358 int h = HASH(std->physaddr); 1359 1360 SPLUSBCHECK; 1361 1362 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1363 } 1364 1365 /* Called at splusb() */ 1366 void 1367 ohci_hash_rem_td(sc, std) 1368 ohci_softc_t *sc; 1369 ohci_soft_td_t *std; 1370 { 1371 SPLUSBCHECK; 1372 1373 LIST_REMOVE(std, hnext); 1374 } 1375 1376 ohci_soft_td_t * 1377 ohci_hash_find_td(sc, a) 1378 ohci_softc_t *sc; 1379 ohci_physaddr_t a; 1380 { 1381 int h = HASH(a); 1382 ohci_soft_td_t *std; 1383 1384 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1385 std != NULL; 1386 std = LIST_NEXT(std, hnext)) 1387 if (std->physaddr == a) 1388 return (std); 1389 panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a); 1390 } 1391 1392 void 1393 ohci_timeout(addr) 1394 void *addr; 1395 { 1396 usbd_xfer_handle xfer = addr; 1397 int s; 1398 1399 DPRINTF(("ohci_timeout: xfer=%p\n", xfer)); 1400 1401 s = splusb(); 1402 xfer->device->bus->intr_context++; 1403 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1404 xfer->device->bus->intr_context--; 1405 splx(s); 1406 } 1407 1408 #ifdef OHCI_DEBUG 1409 void 1410 ohci_dump_tds(std) 1411 ohci_soft_td_t *std; 1412 { 1413 for (; std; std = std->nexttd) 1414 ohci_dump_td(std); 1415 } 1416 1417 void 1418 ohci_dump_td(std) 1419 ohci_soft_td_t *std; 1420 { 1421 DPRINTF(("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1422 "nexttd=0x%08lx be=0x%08lx\n", 1423 std, (u_long)std->physaddr, 1424 (int)LE(std->td.td_flags), 1425 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1426 OHCI_TD_GET_DI(LE(std->td.td_flags)), 1427 OHCI_TD_GET_EC(LE(std->td.td_flags)), 1428 OHCI_TD_GET_CC(LE(std->td.td_flags)), 1429 (u_long)LE(std->td.td_cbp), 1430 (u_long)LE(std->td.td_nexttd), (u_long)LE(std->td.td_be))); 1431 } 1432 1433 void 1434 ohci_dump_ed(sed) 1435 ohci_soft_ed_t *sed; 1436 { 1437 DPRINTF(("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx " 1438 "headp=%b nexted=0x%08lx\n", 1439 sed, (u_long)sed->physaddr, 1440 OHCI_ED_GET_FA(LE(sed->ed.ed_flags)), 1441 OHCI_ED_GET_EN(LE(sed->ed.ed_flags)), 1442 OHCI_ED_GET_MAXP(LE(sed->ed.ed_flags)), 1443 (int)LE(sed->ed.ed_flags), 1444 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1445 (u_long)LE(sed->ed.ed_tailp), 1446 (u_long)LE(sed->ed.ed_headp), 1447 "\20\1HALT\2CARRY", 1448 (u_long)LE(sed->ed.ed_nexted))); 1449 } 1450 #endif 1451 1452 usbd_status 1453 ohci_open(pipe) 1454 usbd_pipe_handle pipe; 1455 { 1456 usbd_device_handle dev = pipe->device; 1457 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1458 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1459 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1460 u_int8_t addr = dev->address; 1461 ohci_soft_ed_t *sed; 1462 ohci_soft_td_t *std; 1463 usbd_status err; 1464 int s; 1465 1466 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1467 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1468 if (addr == sc->sc_addr) { 1469 switch (ed->bEndpointAddress) { 1470 case USB_CONTROL_ENDPOINT: 1471 pipe->methods = &ohci_root_ctrl_methods; 1472 break; 1473 case UE_DIR_IN | OHCI_INTR_ENDPT: 1474 pipe->methods = &ohci_root_intr_methods; 1475 break; 1476 default: 1477 return (USBD_INVAL); 1478 } 1479 } else { 1480 sed = ohci_alloc_sed(sc); 1481 if (sed == NULL) 1482 goto bad0; 1483 std = ohci_alloc_std(sc); 1484 if (std == NULL) 1485 goto bad1; 1486 opipe->sed = sed; 1487 opipe->tail = std; 1488 sed->ed.ed_flags = LE( 1489 OHCI_ED_SET_FA(addr) | 1490 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1491 OHCI_ED_DIR_TD | 1492 (dev->lowspeed ? OHCI_ED_SPEED : 0) | 1493 ((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ? 1494 OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) | 1495 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1496 sed->ed.ed_headp = sed->ed.ed_tailp = LE(std->physaddr); 1497 1498 switch (ed->bmAttributes & UE_XFERTYPE) { 1499 case UE_CONTROL: 1500 pipe->methods = &ohci_device_ctrl_methods; 1501 err = usb_allocmem(&sc->sc_bus, 1502 sizeof(usb_device_request_t), 1503 0, &opipe->u.ctl.reqdma); 1504 if (err) 1505 goto bad; 1506 s = splusb(); 1507 ohci_add_ed(sed, sc->sc_ctrl_head); 1508 splx(s); 1509 break; 1510 case UE_INTERRUPT: 1511 pipe->methods = &ohci_device_intr_methods; 1512 return (ohci_device_setintr(sc, opipe, ed->bInterval)); 1513 case UE_ISOCHRONOUS: 1514 printf("ohci_open: open iso unimplemented\n"); 1515 return (USBD_INVAL); 1516 case UE_BULK: 1517 pipe->methods = &ohci_device_bulk_methods; 1518 s = splusb(); 1519 ohci_add_ed(sed, sc->sc_bulk_head); 1520 splx(s); 1521 break; 1522 } 1523 } 1524 return (USBD_NORMAL_COMPLETION); 1525 1526 bad: 1527 ohci_free_std(sc, std); 1528 bad1: 1529 ohci_free_sed(sc, sed); 1530 bad0: 1531 return (USBD_NOMEM); 1532 1533 } 1534 1535 /* 1536 * Close a reqular pipe. 1537 * Assumes that there are no pending transactions. 1538 */ 1539 void 1540 ohci_close_pipe(pipe, head) 1541 usbd_pipe_handle pipe; 1542 ohci_soft_ed_t *head; 1543 { 1544 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1545 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1546 ohci_soft_ed_t *sed = opipe->sed; 1547 int s; 1548 1549 s = splusb(); 1550 #ifdef DIAGNOSTIC 1551 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 1552 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 1553 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) { 1554 ohci_physaddr_t td = sed->ed.ed_headp; 1555 ohci_soft_td_t *std; 1556 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]); 1557 std != NULL; 1558 std = LIST_NEXT(std, hnext)) 1559 if (std->physaddr == td) 1560 break; 1561 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 1562 "tl=0x%x pipe=%p, std=%p\n", sed, 1563 (int)LE(sed->ed.ed_headp), (int)LE(sed->ed.ed_tailp), 1564 pipe, std); 1565 usb_delay_ms(&sc->sc_bus, 2); 1566 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 1567 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) 1568 printf("ohci_close_pipe: pipe still not empty\n"); 1569 } 1570 #endif 1571 ohci_rem_ed(sed, head); 1572 splx(s); 1573 ohci_free_std(sc, opipe->tail); 1574 ohci_free_sed(sc, opipe->sed); 1575 } 1576 1577 /* 1578 * Abort a device request. 1579 * If this routine is called at splusb() it guarantees that the request 1580 * will be removed from the hardware scheduling and that the callback 1581 * for it will be called with USBD_CANCELLED status. 1582 * It's impossible to guarantee that the requested transfer will not 1583 * have happened since the hardware runs concurrently. 1584 * If the transaction has already happened we rely on the ordinary 1585 * interrupt processing to process it. 1586 */ 1587 void 1588 ohci_abort_xfer(xfer, status) 1589 usbd_xfer_handle xfer; 1590 usbd_status status; 1591 { 1592 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1593 ohci_soft_ed_t *sed; 1594 1595 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p\n", xfer, opipe)); 1596 1597 xfer->status = status; 1598 1599 usb_untimeout(ohci_timeout, xfer, xfer->timo_handle); 1600 1601 sed = opipe->sed; 1602 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 1603 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); /* force hardware skip */ 1604 1605 if (xfer->device->bus->intr_context) { 1606 /* We have no process context, so we can't use tsleep(). */ 1607 timeout(ohci_abort_xfer_end, xfer, hz / USB_FRAMES_PER_SECOND); 1608 } else { 1609 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 1610 KASSERT(intr_nesting_level == 0, 1611 ("ohci_abort_req in interrupt context")); 1612 #endif 1613 usb_delay_ms(opipe->pipe.device->bus, 1); 1614 ohci_abort_xfer_end(xfer); 1615 } 1616 } 1617 1618 void 1619 ohci_abort_xfer_end(v) 1620 void *v; 1621 { 1622 usbd_xfer_handle xfer = v; 1623 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1624 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1625 ohci_soft_ed_t *sed; 1626 ohci_soft_td_t *p, *n; 1627 int s; 1628 1629 s = splusb(); 1630 1631 p = xfer->hcpriv; 1632 #ifdef DIAGNOSTIC 1633 if (p == NULL) { 1634 printf("ohci_abort_xfer: hcpriv==0\n"); 1635 return; 1636 } 1637 #endif 1638 for (; p->xfer == xfer; p = n) { 1639 n = p->nexttd; 1640 ohci_hash_rem_td(sc, p); 1641 ohci_free_std(sc, p); 1642 } 1643 1644 sed = opipe->sed; 1645 DPRINTFN(2,("ohci_abort_xfer: set hd=%x, tl=%x\n", 1646 (int)LE(p->physaddr), (int)LE(sed->ed.ed_tailp))); 1647 sed->ed.ed_headp = p->physaddr; /* unlink TDs */ 1648 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); /* remove hardware skip */ 1649 1650 usb_transfer_complete(xfer); 1651 1652 splx(s); 1653 } 1654 1655 /* 1656 * Data structures and routines to emulate the root hub. 1657 */ 1658 static usb_device_descriptor_t ohci_devd = { 1659 USB_DEVICE_DESCRIPTOR_SIZE, 1660 UDESC_DEVICE, /* type */ 1661 {0x00, 0x01}, /* USB version */ 1662 UCLASS_HUB, /* class */ 1663 USUBCLASS_HUB, /* subclass */ 1664 0, /* protocol */ 1665 64, /* max packet */ 1666 {0},{0},{0x00,0x01}, /* device id */ 1667 1,2,0, /* string indicies */ 1668 1 /* # of configurations */ 1669 }; 1670 1671 static usb_config_descriptor_t ohci_confd = { 1672 USB_CONFIG_DESCRIPTOR_SIZE, 1673 UDESC_CONFIG, 1674 {USB_CONFIG_DESCRIPTOR_SIZE + 1675 USB_INTERFACE_DESCRIPTOR_SIZE + 1676 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1677 1, 1678 1, 1679 0, 1680 UC_SELF_POWERED, 1681 0 /* max power */ 1682 }; 1683 1684 static usb_interface_descriptor_t ohci_ifcd = { 1685 USB_INTERFACE_DESCRIPTOR_SIZE, 1686 UDESC_INTERFACE, 1687 0, 1688 0, 1689 1, 1690 UCLASS_HUB, 1691 USUBCLASS_HUB, 1692 0, 1693 0 1694 }; 1695 1696 static usb_endpoint_descriptor_t ohci_endpd = { 1697 USB_ENDPOINT_DESCRIPTOR_SIZE, 1698 UDESC_ENDPOINT, 1699 UE_DIR_IN | OHCI_INTR_ENDPT, 1700 UE_INTERRUPT, 1701 {8, 0}, /* max packet */ 1702 255 1703 }; 1704 1705 static usb_hub_descriptor_t ohci_hubd = { 1706 USB_HUB_DESCRIPTOR_SIZE, 1707 UDESC_HUB, 1708 0, 1709 {0,0}, 1710 0, 1711 0, 1712 {0}, 1713 }; 1714 1715 static int 1716 ohci_str(p, l, s) 1717 usb_string_descriptor_t *p; 1718 int l; 1719 char *s; 1720 { 1721 int i; 1722 1723 if (l == 0) 1724 return (0); 1725 p->bLength = 2 * strlen(s) + 2; 1726 if (l == 1) 1727 return (1); 1728 p->bDescriptorType = UDESC_STRING; 1729 l -= 2; 1730 for (i = 0; s[i] && l > 1; i++, l -= 2) 1731 USETW2(p->bString[i], 0, s[i]); 1732 return (2*i+2); 1733 } 1734 1735 /* 1736 * Simulate a hardware hub by handling all the necessary requests. 1737 */ 1738 static usbd_status 1739 ohci_root_ctrl_transfer(xfer) 1740 usbd_xfer_handle xfer; 1741 { 1742 usbd_status err; 1743 1744 /* Insert last in queue. */ 1745 err = usb_insert_transfer(xfer); 1746 if (err) 1747 return (err); 1748 1749 /* Pipe isn't running, start first */ 1750 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1751 } 1752 1753 static usbd_status 1754 ohci_root_ctrl_start(xfer) 1755 usbd_xfer_handle xfer; 1756 { 1757 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 1758 usb_device_request_t *req; 1759 void *buf = NULL; 1760 int port, i; 1761 int s, len, value, index, l, totlen = 0; 1762 usb_port_status_t ps; 1763 usb_hub_descriptor_t hubd; 1764 usbd_status err; 1765 u_int32_t v; 1766 1767 #ifdef DIAGNOSTIC 1768 if (!(xfer->rqflags & URQ_REQUEST)) 1769 /* XXX panic */ 1770 return (USBD_INVAL); 1771 #endif 1772 req = &xfer->request; 1773 1774 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 1775 req->bmRequestType, req->bRequest)); 1776 1777 len = UGETW(req->wLength); 1778 value = UGETW(req->wValue); 1779 index = UGETW(req->wIndex); 1780 1781 if (len != 0) 1782 buf = KERNADDR(&xfer->dmabuf); 1783 1784 #define C(x,y) ((x) | ((y) << 8)) 1785 switch(C(req->bRequest, req->bmRequestType)) { 1786 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1787 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1788 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1789 /* 1790 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1791 * for the integrated root hub. 1792 */ 1793 break; 1794 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1795 if (len > 0) { 1796 *(u_int8_t *)buf = sc->sc_conf; 1797 totlen = 1; 1798 } 1799 break; 1800 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1801 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 1802 switch(value >> 8) { 1803 case UDESC_DEVICE: 1804 if ((value & 0xff) != 0) { 1805 err = USBD_IOERROR; 1806 goto ret; 1807 } 1808 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1809 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 1810 memcpy(buf, &ohci_devd, l); 1811 break; 1812 case UDESC_CONFIG: 1813 if ((value & 0xff) != 0) { 1814 err = USBD_IOERROR; 1815 goto ret; 1816 } 1817 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1818 memcpy(buf, &ohci_confd, l); 1819 buf = (char *)buf + l; 1820 len -= l; 1821 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1822 totlen += l; 1823 memcpy(buf, &ohci_ifcd, l); 1824 buf = (char *)buf + l; 1825 len -= l; 1826 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1827 totlen += l; 1828 memcpy(buf, &ohci_endpd, l); 1829 break; 1830 case UDESC_STRING: 1831 if (len == 0) 1832 break; 1833 *(u_int8_t *)buf = 0; 1834 totlen = 1; 1835 switch (value & 0xff) { 1836 case 1: /* Vendor */ 1837 totlen = ohci_str(buf, len, sc->sc_vendor); 1838 break; 1839 case 2: /* Product */ 1840 totlen = ohci_str(buf, len, "OHCI root hub"); 1841 break; 1842 } 1843 break; 1844 default: 1845 err = USBD_IOERROR; 1846 goto ret; 1847 } 1848 break; 1849 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1850 if (len > 0) { 1851 *(u_int8_t *)buf = 0; 1852 totlen = 1; 1853 } 1854 break; 1855 case C(UR_GET_STATUS, UT_READ_DEVICE): 1856 if (len > 1) { 1857 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1858 totlen = 2; 1859 } 1860 break; 1861 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1862 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1863 if (len > 1) { 1864 USETW(((usb_status_t *)buf)->wStatus, 0); 1865 totlen = 2; 1866 } 1867 break; 1868 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1869 if (value >= USB_MAX_DEVICES) { 1870 err = USBD_IOERROR; 1871 goto ret; 1872 } 1873 sc->sc_addr = value; 1874 break; 1875 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1876 if (value != 0 && value != 1) { 1877 err = USBD_IOERROR; 1878 goto ret; 1879 } 1880 sc->sc_conf = value; 1881 break; 1882 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1883 break; 1884 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1885 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1886 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1887 err = USBD_IOERROR; 1888 goto ret; 1889 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1890 break; 1891 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1892 break; 1893 /* Hub requests */ 1894 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1895 break; 1896 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1897 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1898 "port=%d feature=%d\n", 1899 index, value)); 1900 if (index < 1 || index > sc->sc_noport) { 1901 err = USBD_IOERROR; 1902 goto ret; 1903 } 1904 port = OHCI_RH_PORT_STATUS(index); 1905 switch(value) { 1906 case UHF_PORT_ENABLE: 1907 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 1908 break; 1909 case UHF_PORT_SUSPEND: 1910 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 1911 break; 1912 case UHF_PORT_POWER: 1913 OWRITE4(sc, port, UPS_LOW_SPEED); 1914 break; 1915 case UHF_C_PORT_CONNECTION: 1916 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 1917 break; 1918 case UHF_C_PORT_ENABLE: 1919 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 1920 break; 1921 case UHF_C_PORT_SUSPEND: 1922 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 1923 break; 1924 case UHF_C_PORT_OVER_CURRENT: 1925 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 1926 break; 1927 case UHF_C_PORT_RESET: 1928 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 1929 break; 1930 default: 1931 err = USBD_IOERROR; 1932 goto ret; 1933 } 1934 switch(value) { 1935 case UHF_C_PORT_CONNECTION: 1936 case UHF_C_PORT_ENABLE: 1937 case UHF_C_PORT_SUSPEND: 1938 case UHF_C_PORT_OVER_CURRENT: 1939 case UHF_C_PORT_RESET: 1940 /* Enable RHSC interrupt if condition is cleared. */ 1941 if ((OREAD4(sc, port) >> 16) == 0) 1942 ohci_rhsc_able(sc, 1); 1943 break; 1944 default: 1945 break; 1946 } 1947 break; 1948 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1949 if (value != 0) { 1950 err = USBD_IOERROR; 1951 goto ret; 1952 } 1953 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 1954 hubd = ohci_hubd; 1955 hubd.bNbrPorts = sc->sc_noport; 1956 USETW(hubd.wHubCharacteristics, 1957 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 1958 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 1959 /* XXX overcurrent */ 1960 ); 1961 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 1962 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 1963 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1964 hubd.DeviceRemovable[i++] = (u_int8_t)v; 1965 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1966 l = min(len, hubd.bDescLength); 1967 totlen = l; 1968 memcpy(buf, &hubd, l); 1969 break; 1970 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1971 if (len != 4) { 1972 err = USBD_IOERROR; 1973 goto ret; 1974 } 1975 memset(buf, 0, len); /* ? XXX */ 1976 totlen = len; 1977 break; 1978 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1979 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 1980 index)); 1981 if (index < 1 || index > sc->sc_noport) { 1982 err = USBD_IOERROR; 1983 goto ret; 1984 } 1985 if (len != 4) { 1986 err = USBD_IOERROR; 1987 goto ret; 1988 } 1989 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 1990 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 1991 v)); 1992 USETW(ps.wPortStatus, v); 1993 USETW(ps.wPortChange, v >> 16); 1994 l = min(len, sizeof ps); 1995 memcpy(buf, &ps, l); 1996 totlen = l; 1997 break; 1998 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1999 err = USBD_IOERROR; 2000 goto ret; 2001 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2002 break; 2003 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2004 if (index < 1 || index > sc->sc_noport) { 2005 err = USBD_IOERROR; 2006 goto ret; 2007 } 2008 port = OHCI_RH_PORT_STATUS(index); 2009 switch(value) { 2010 case UHF_PORT_ENABLE: 2011 OWRITE4(sc, port, UPS_PORT_ENABLED); 2012 break; 2013 case UHF_PORT_SUSPEND: 2014 OWRITE4(sc, port, UPS_SUSPEND); 2015 break; 2016 case UHF_PORT_RESET: 2017 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2018 index)); 2019 OWRITE4(sc, port, UPS_RESET); 2020 for (i = 0; i < 10; i++) { 2021 usb_delay_ms(&sc->sc_bus, 10); 2022 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2023 break; 2024 } 2025 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2026 index, OREAD4(sc, port))); 2027 break; 2028 case UHF_PORT_POWER: 2029 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2030 "%d\n", index)); 2031 OWRITE4(sc, port, UPS_PORT_POWER); 2032 break; 2033 default: 2034 err = USBD_IOERROR; 2035 goto ret; 2036 } 2037 break; 2038 default: 2039 err = USBD_IOERROR; 2040 goto ret; 2041 } 2042 xfer->actlen = totlen; 2043 err = USBD_NORMAL_COMPLETION; 2044 ret: 2045 xfer->status = err; 2046 s = splusb(); 2047 usb_transfer_complete(xfer); 2048 splx(s); 2049 return (USBD_IN_PROGRESS); 2050 } 2051 2052 /* Abort a root control request. */ 2053 static void 2054 ohci_root_ctrl_abort(xfer) 2055 usbd_xfer_handle xfer; 2056 { 2057 /* Nothing to do, all transfers are synchronous. */ 2058 } 2059 2060 /* Close the root pipe. */ 2061 static void 2062 ohci_root_ctrl_close(pipe) 2063 usbd_pipe_handle pipe; 2064 { 2065 DPRINTF(("ohci_root_ctrl_close\n")); 2066 /* Nothing to do. */ 2067 } 2068 2069 static usbd_status 2070 ohci_root_intr_transfer(xfer) 2071 usbd_xfer_handle xfer; 2072 { 2073 usbd_status err; 2074 2075 /* Insert last in queue. */ 2076 err = usb_insert_transfer(xfer); 2077 if (err) 2078 return (err); 2079 2080 /* Pipe isn't running, start first */ 2081 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2082 } 2083 2084 static usbd_status 2085 ohci_root_intr_start(xfer) 2086 usbd_xfer_handle xfer; 2087 { 2088 usbd_pipe_handle pipe = xfer->pipe; 2089 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2090 2091 sc->sc_intrxfer = xfer; 2092 2093 return (USBD_IN_PROGRESS); 2094 } 2095 2096 /* Abort a root interrupt request. */ 2097 static void 2098 ohci_root_intr_abort(xfer) 2099 usbd_xfer_handle xfer; 2100 { 2101 int s; 2102 2103 if (xfer->pipe->intrxfer == xfer) { 2104 DPRINTF(("ohci_root_intr_abort: remove\n")); 2105 xfer->pipe->intrxfer = NULL; 2106 } 2107 xfer->status = USBD_CANCELLED; 2108 s = splusb(); 2109 usb_transfer_complete(xfer); 2110 splx(s); 2111 } 2112 2113 /* Close the root pipe. */ 2114 static void 2115 ohci_root_intr_close(pipe) 2116 usbd_pipe_handle pipe; 2117 { 2118 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2119 2120 DPRINTF(("ohci_root_intr_close\n")); 2121 2122 sc->sc_intrxfer = NULL; 2123 } 2124 2125 /************************/ 2126 2127 static usbd_status 2128 ohci_device_ctrl_transfer(xfer) 2129 usbd_xfer_handle xfer; 2130 { 2131 usbd_status err; 2132 2133 /* Insert last in queue. */ 2134 err = usb_insert_transfer(xfer); 2135 if (err) 2136 return (err); 2137 2138 /* Pipe isn't running, start first */ 2139 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2140 } 2141 2142 static usbd_status 2143 ohci_device_ctrl_start(xfer) 2144 usbd_xfer_handle xfer; 2145 { 2146 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2147 usbd_status err; 2148 2149 #ifdef DIAGNOSTIC 2150 if (!(xfer->rqflags & URQ_REQUEST)) { 2151 /* XXX panic */ 2152 printf("ohci_device_ctrl_transfer: not a request\n"); 2153 return (USBD_INVAL); 2154 } 2155 #endif 2156 2157 err = ohci_device_request(xfer); 2158 if (err) 2159 return (err); 2160 2161 if (sc->sc_bus.use_polling) 2162 ohci_waitintr(sc, xfer); 2163 return (USBD_IN_PROGRESS); 2164 } 2165 2166 /* Abort a device control request. */ 2167 static void 2168 ohci_device_ctrl_abort(xfer) 2169 usbd_xfer_handle xfer; 2170 { 2171 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2172 ohci_abort_xfer(xfer, USBD_CANCELLED); 2173 } 2174 2175 /* Close a device control pipe. */ 2176 static void 2177 ohci_device_ctrl_close(pipe) 2178 usbd_pipe_handle pipe; 2179 { 2180 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2181 2182 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2183 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2184 } 2185 2186 /************************/ 2187 2188 static void 2189 ohci_device_clear_toggle(pipe) 2190 usbd_pipe_handle pipe; 2191 { 2192 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2193 2194 opipe->sed->ed.ed_tailp &= LE(~OHCI_TOGGLECARRY); 2195 } 2196 2197 static void 2198 ohci_noop(pipe) 2199 usbd_pipe_handle pipe; 2200 { 2201 } 2202 2203 static usbd_status 2204 ohci_device_bulk_transfer(xfer) 2205 usbd_xfer_handle xfer; 2206 { 2207 usbd_status err; 2208 2209 /* Insert last in queue. */ 2210 err = usb_insert_transfer(xfer); 2211 if (err) 2212 return (err); 2213 2214 /* Pipe isn't running, start first */ 2215 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2216 } 2217 2218 static usbd_status 2219 ohci_device_bulk_start(xfer) 2220 usbd_xfer_handle xfer; 2221 { 2222 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2223 usbd_device_handle dev = opipe->pipe.device; 2224 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2225 int addr = dev->address; 2226 ohci_soft_td_t *data, *tail, *tdp; 2227 ohci_soft_ed_t *sed; 2228 int s, len, isread, endpt; 2229 usbd_status err; 2230 2231 #ifdef DIAGNOSTIC 2232 if (xfer->rqflags & URQ_REQUEST) { 2233 /* XXX panic */ 2234 printf("ohci_device_bulk_start: a request\n"); 2235 return (USBD_INVAL); 2236 } 2237 #endif 2238 2239 len = xfer->length; 2240 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2241 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2242 sed = opipe->sed; 2243 2244 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2245 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2246 endpt)); 2247 2248 opipe->u.bulk.isread = isread; 2249 opipe->u.bulk.length = len; 2250 2251 /* Update device address */ 2252 sed->ed.ed_flags = LE( 2253 (LE(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2254 OHCI_ED_SET_FA(addr)); 2255 2256 /* Allocate a chain of new TDs (including a new tail). */ 2257 data = opipe->tail; 2258 err = ohci_alloc_std_chain(opipe, sc, len, isread, 2259 xfer->flags & USBD_SHORT_XFER_OK, 2260 &xfer->dmabuf, data, &tail); 2261 if (err) 2262 return (err); 2263 2264 tail->xfer = NULL; 2265 xfer->hcpriv = data; 2266 2267 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2268 "td_cbp=0x%08x td_be=0x%08x\n", 2269 (int)LE(sed->ed.ed_flags), (int)LE(data->td.td_flags), 2270 (int)LE(data->td.td_cbp), (int)LE(data->td.td_be))); 2271 2272 #ifdef OHCI_DEBUG 2273 if (ohcidebug > 4) { 2274 ohci_dump_ed(sed); 2275 ohci_dump_tds(data); 2276 } 2277 #endif 2278 2279 /* Insert ED in schedule */ 2280 s = splusb(); 2281 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2282 tdp->xfer = xfer; 2283 ohci_hash_add_td(sc, tdp); 2284 } 2285 sed->ed.ed_tailp = LE(tail->physaddr); 2286 opipe->tail = tail; 2287 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); 2288 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2289 if (xfer->timeout && !sc->sc_bus.use_polling) { 2290 usb_timeout(ohci_timeout, xfer, 2291 MS_TO_TICKS(xfer->timeout), xfer->timo_handle); 2292 } 2293 2294 #if 0 2295 /* This goes wrong if we are too slow. */ 2296 if (ohcidebug > 5) { 2297 usb_delay_ms(&sc->sc_bus, 5); 2298 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2299 OREAD4(sc, OHCI_COMMAND_STATUS))); 2300 ohci_dump_ed(sed); 2301 ohci_dump_tds(data); 2302 } 2303 #endif 2304 2305 splx(s); 2306 2307 return (USBD_IN_PROGRESS); 2308 } 2309 2310 static void 2311 ohci_device_bulk_abort(xfer) 2312 usbd_xfer_handle xfer; 2313 { 2314 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2315 ohci_abort_xfer(xfer, USBD_CANCELLED); 2316 } 2317 2318 /* 2319 * Close a device bulk pipe. 2320 */ 2321 static void 2322 ohci_device_bulk_close(pipe) 2323 usbd_pipe_handle pipe; 2324 { 2325 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2326 2327 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2328 ohci_close_pipe(pipe, sc->sc_bulk_head); 2329 } 2330 2331 /************************/ 2332 2333 static usbd_status 2334 ohci_device_intr_transfer(xfer) 2335 usbd_xfer_handle xfer; 2336 { 2337 usbd_status err; 2338 2339 /* Insert last in queue. */ 2340 err = usb_insert_transfer(xfer); 2341 if (err) 2342 return (err); 2343 2344 /* Pipe isn't running, start first */ 2345 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2346 } 2347 2348 static usbd_status 2349 ohci_device_intr_start(xfer) 2350 usbd_xfer_handle xfer; 2351 { 2352 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2353 usbd_device_handle dev = opipe->pipe.device; 2354 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2355 ohci_soft_ed_t *sed = opipe->sed; 2356 ohci_soft_td_t *data, *tail; 2357 int len; 2358 int s; 2359 2360 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2361 "flags=%d priv=%p\n", 2362 xfer, xfer->length, xfer->flags, xfer->priv)); 2363 2364 #ifdef DIAGNOSTIC 2365 if (xfer->rqflags & URQ_REQUEST) 2366 panic("ohci_device_intr_transfer: a request\n"); 2367 #endif 2368 2369 len = xfer->length; 2370 2371 data = opipe->tail; 2372 tail = ohci_alloc_std(sc); 2373 if (tail == NULL) 2374 return (USBD_NOMEM); 2375 tail->xfer = NULL; 2376 2377 data->td.td_flags = LE( 2378 OHCI_TD_IN | OHCI_TD_NOCC | 2379 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2380 if (xfer->flags & USBD_SHORT_XFER_OK) 2381 data->td.td_flags |= LE(OHCI_TD_R); 2382 data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf)); 2383 data->nexttd = tail; 2384 data->td.td_nexttd = LE(tail->physaddr); 2385 data->td.td_be = LE(LE(data->td.td_cbp) + len - 1); 2386 data->len = len; 2387 data->xfer = xfer; 2388 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2389 xfer->hcpriv = data; 2390 2391 #ifdef OHCI_DEBUG 2392 if (ohcidebug > 5) { 2393 DPRINTF(("ohci_device_intr_transfer:\n")); 2394 ohci_dump_ed(sed); 2395 ohci_dump_tds(data); 2396 } 2397 #endif 2398 2399 /* Insert ED in schedule */ 2400 s = splusb(); 2401 ohci_hash_add_td(sc, data); 2402 sed->ed.ed_tailp = LE(tail->physaddr); 2403 opipe->tail = tail; 2404 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); 2405 2406 #if 0 2407 /* 2408 * This goes horribly wrong, printing thousands of descriptors, 2409 * because false references are followed due to the fact that the 2410 * TD is gone. 2411 */ 2412 if (ohcidebug > 5) { 2413 usb_delay_ms(&sc->sc_bus, 5); 2414 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2415 OREAD4(sc, OHCI_COMMAND_STATUS))); 2416 ohci_dump_ed(sed); 2417 ohci_dump_tds(data); 2418 } 2419 #endif 2420 splx(s); 2421 2422 return (USBD_IN_PROGRESS); 2423 } 2424 2425 /* Abort a device control request. */ 2426 static void 2427 ohci_device_intr_abort(xfer) 2428 usbd_xfer_handle xfer; 2429 { 2430 if (xfer->pipe->intrxfer == xfer) { 2431 DPRINTF(("ohci_device_intr_abort: remove\n")); 2432 xfer->pipe->intrxfer = NULL; 2433 } 2434 ohci_abort_xfer(xfer, USBD_CANCELLED); 2435 } 2436 2437 /* Close a device interrupt pipe. */ 2438 static void 2439 ohci_device_intr_close(pipe) 2440 usbd_pipe_handle pipe; 2441 { 2442 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2443 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2444 int nslots = opipe->u.intr.nslots; 2445 int pos = opipe->u.intr.pos; 2446 int j; 2447 ohci_soft_ed_t *p, *sed = opipe->sed; 2448 int s; 2449 2450 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2451 pipe, nslots, pos)); 2452 s = splusb(); 2453 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 2454 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 2455 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) 2456 usb_delay_ms(&sc->sc_bus, 2); 2457 2458 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2459 ; 2460 #ifdef DIAGNOSTIC 2461 if (p == NULL) 2462 panic("ohci_device_intr_close: ED not found\n"); 2463 #endif 2464 p->next = sed->next; 2465 p->ed.ed_nexted = sed->ed.ed_nexted; 2466 splx(s); 2467 2468 for (j = 0; j < nslots; j++) 2469 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2470 2471 ohci_free_std(sc, opipe->tail); 2472 ohci_free_sed(sc, opipe->sed); 2473 } 2474 2475 static usbd_status 2476 ohci_device_setintr(sc, opipe, ival) 2477 ohci_softc_t *sc; 2478 struct ohci_pipe *opipe; 2479 int ival; 2480 { 2481 int i, j, s, best; 2482 u_int npoll, slow, shigh, nslots; 2483 u_int bestbw, bw; 2484 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2485 2486 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2487 if (ival == 0) { 2488 printf("ohci_setintr: 0 interval\n"); 2489 return (USBD_INVAL); 2490 } 2491 2492 npoll = OHCI_NO_INTRS; 2493 while (npoll > ival) 2494 npoll /= 2; 2495 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2496 2497 /* 2498 * We now know which level in the tree the ED must go into. 2499 * Figure out which slot has most bandwidth left over. 2500 * Slots to examine: 2501 * npoll 2502 * 1 0 2503 * 2 1 2 2504 * 4 3 4 5 6 2505 * 8 7 8 9 10 11 12 13 14 2506 * N (N-1) .. (N-1+N-1) 2507 */ 2508 slow = npoll-1; 2509 shigh = slow + npoll; 2510 nslots = OHCI_NO_INTRS / npoll; 2511 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2512 bw = 0; 2513 for (j = 0; j < nslots; j++) 2514 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 2515 if (bw < bestbw) { 2516 best = i; 2517 bestbw = bw; 2518 } 2519 } 2520 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2521 best, slow, shigh, bestbw)); 2522 2523 s = splusb(); 2524 hsed = sc->sc_eds[best]; 2525 sed->next = hsed->next; 2526 sed->ed.ed_nexted = hsed->ed.ed_nexted; 2527 hsed->next = sed; 2528 hsed->ed.ed_nexted = LE(sed->physaddr); 2529 splx(s); 2530 2531 for (j = 0; j < nslots; j++) 2532 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 2533 opipe->u.intr.nslots = nslots; 2534 opipe->u.intr.pos = best; 2535 2536 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 2537 return (USBD_NORMAL_COMPLETION); 2538 } 2539
Indexes created Thu Sep 25 08:09:54 GMT 2025