ohci.c revision 1.56
1 /* $NetBSD: ohci.c,v 1.56 1999/11/20 00:57:09 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (augustss (at) carlstedt.se) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe 45 * USB spec: http://www.usb.org/developers/data/usb11.pdf 46 */ 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/kernel.h> 53 #include <sys/device.h> 54 #include <sys/select.h> 55 #elif defined(__FreeBSD__) 56 #include <sys/module.h> 57 #include <sys/bus.h> 58 #include <machine/bus_pio.h> 59 #include <machine/bus_memio.h> 60 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 61 #include <machine/cpu.h> 62 #endif 63 #endif 64 #include <sys/proc.h> 65 #include <sys/queue.h> 66 67 #include <machine/bus.h> 68 #include <machine/endian.h> 69 70 #include <dev/usb/usb.h> 71 #include <dev/usb/usbdi.h> 72 #include <dev/usb/usbdivar.h> 73 #include <dev/usb/usb_mem.h> 74 #include <dev/usb/usb_quirks.h> 75 76 #include <dev/usb/ohcireg.h> 77 #include <dev/usb/ohcivar.h> 78 79 #if defined(__FreeBSD__) 80 #include <machine/clock.h> 81 82 #define delay(d) DELAY(d) 83 #endif 84 85 #if defined(__OpenBSD__) 86 struct cfdriver ohci_cd = { 87 NULL, "ohci", DV_DULL 88 }; 89 #endif 90 91 #ifdef OHCI_DEBUG 92 #define DPRINTF(x) if (ohcidebug) logprintf x 93 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 94 int ohcidebug = 0; 95 #else 96 #define DPRINTF(x) 97 #define DPRINTFN(n,x) 98 #endif 99 100 /* 101 * The OHCI controller is little endian, so on big endian machines 102 * the data strored in memory needs to be swapped. 103 */ 104 #if BYTE_ORDER == BIG_ENDIAN 105 #define LE(x) (bswap32(x)) 106 #else 107 #define LE(x) (x) 108 #endif 109 110 struct ohci_pipe; 111 112 static ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *)); 113 static void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *)); 114 115 static ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *)); 116 static void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *)); 117 118 #if 0 119 static void ohci_free_std_chain __P((ohci_softc_t *, 120 ohci_soft_td_t *, ohci_soft_td_t *)); 121 #endif 122 static usbd_status ohci_alloc_std_chain __P((struct ohci_pipe *, 123 ohci_softc_t *, int, int, int, usb_dma_t *, 124 ohci_soft_td_t *, ohci_soft_td_t **)); 125 126 static void ohci_power __P((int, void *)); 127 static usbd_status ohci_open __P((usbd_pipe_handle)); 128 static void ohci_poll __P((struct usbd_bus *)); 129 static void ohci_waitintr __P((ohci_softc_t *, 130 usbd_xfer_handle)); 131 static void ohci_rhsc __P((ohci_softc_t *, usbd_xfer_handle)); 132 static void ohci_process_done __P((ohci_softc_t *, 133 ohci_physaddr_t)); 134 135 static usbd_status ohci_device_request __P((usbd_xfer_handle xfer)); 136 static void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 137 static void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 138 static void ohci_hash_add_td __P((ohci_softc_t *, 139 ohci_soft_td_t *)); 140 static void ohci_hash_rem_td __P((ohci_softc_t *, 141 ohci_soft_td_t *)); 142 static ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, 143 ohci_physaddr_t)); 144 145 static usbd_status ohci_allocm __P((struct usbd_bus *, usb_dma_t *, 146 u_int32_t)); 147 static void ohci_freem __P((struct usbd_bus *, usb_dma_t *)); 148 149 static usbd_status ohci_root_ctrl_transfer __P((usbd_xfer_handle)); 150 static usbd_status ohci_root_ctrl_start __P((usbd_xfer_handle)); 151 static void ohci_root_ctrl_abort __P((usbd_xfer_handle)); 152 static void ohci_root_ctrl_close __P((usbd_pipe_handle)); 153 154 static usbd_status ohci_root_intr_transfer __P((usbd_xfer_handle)); 155 static usbd_status ohci_root_intr_start __P((usbd_xfer_handle)); 156 static void ohci_root_intr_abort __P((usbd_xfer_handle)); 157 static void ohci_root_intr_close __P((usbd_pipe_handle)); 158 static void ohci_root_intr_done __P((usbd_xfer_handle)); 159 160 static usbd_status ohci_device_ctrl_transfer __P((usbd_xfer_handle)); 161 static usbd_status ohci_device_ctrl_start __P((usbd_xfer_handle)); 162 static void ohci_device_ctrl_abort __P((usbd_xfer_handle)); 163 static void ohci_device_ctrl_close __P((usbd_pipe_handle)); 164 static void ohci_device_ctrl_done __P((usbd_xfer_handle)); 165 166 static usbd_status ohci_device_bulk_transfer __P((usbd_xfer_handle)); 167 static usbd_status ohci_device_bulk_start __P((usbd_xfer_handle)); 168 static void ohci_device_bulk_abort __P((usbd_xfer_handle)); 169 static void ohci_device_bulk_close __P((usbd_pipe_handle)); 170 static void ohci_device_bulk_done __P((usbd_xfer_handle)); 171 172 static usbd_status ohci_device_intr_transfer __P((usbd_xfer_handle)); 173 static usbd_status ohci_device_intr_start __P((usbd_xfer_handle)); 174 static void ohci_device_intr_abort __P((usbd_xfer_handle)); 175 static void ohci_device_intr_close __P((usbd_pipe_handle)); 176 static void ohci_device_intr_done __P((usbd_xfer_handle)); 177 178 #if 0 179 static usbd_status ohci_device_isoc_transfer __P((usbd_xfer_handle)); 180 static usbd_status ohci_device_isoc_start __P((usbd_xfer_handle)); 181 static void ohci_device_isoc_abort __P((usbd_xfer_handle)); 182 static void ohci_device_isoc_close __P((usbd_pipe_handle)); 183 static void ohci_device_isoc_done __P((usbd_xfer_handle)); 184 #endif 185 186 static usbd_status ohci_device_setintr __P((ohci_softc_t *sc, 187 struct ohci_pipe *pipe, int ival)); 188 189 static int ohci_str __P((usb_string_descriptor_t *, int, char *)); 190 191 static void ohci_timeout __P((void *)); 192 static void ohci_rhsc_able __P((ohci_softc_t *, int)); 193 194 static void ohci_close_pipe __P((usbd_pipe_handle pipe, 195 ohci_soft_ed_t *head)); 196 static void ohci_abort_xfer __P((usbd_xfer_handle xfer, 197 usbd_status status)); 198 static void ohci_abort_xfer_end __P((void *)); 199 200 static void ohci_device_clear_toggle __P((usbd_pipe_handle pipe)); 201 static void ohci_noop __P((usbd_pipe_handle pipe)); 202 203 #ifdef OHCI_DEBUG 204 static void ohci_dumpregs __P((ohci_softc_t *)); 205 static void ohci_dump_tds __P((ohci_soft_td_t *)); 206 static void ohci_dump_td __P((ohci_soft_td_t *)); 207 static void ohci_dump_ed __P((ohci_soft_ed_t *)); 208 #endif 209 210 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 211 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 212 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 213 214 /* Reverse the bits in a value 0 .. 31 */ 215 static u_int8_t revbits[OHCI_NO_INTRS] = 216 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 217 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 218 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 219 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 220 221 struct ohci_pipe { 222 struct usbd_pipe pipe; 223 ohci_soft_ed_t *sed; 224 ohci_soft_td_t *tail; 225 /* Info needed for different pipe kinds. */ 226 union { 227 /* Control pipe */ 228 struct { 229 usb_dma_t reqdma; 230 u_int length; 231 ohci_soft_td_t *setup, *data, *stat; 232 } ctl; 233 /* Interrupt pipe */ 234 struct { 235 int nslots; 236 int pos; 237 } intr; 238 /* Bulk pipe */ 239 struct { 240 u_int length; 241 int isread; 242 } bulk; 243 /* Iso pipe */ 244 struct iso { 245 int xxxxx; 246 } iso; 247 } u; 248 }; 249 250 #define OHCI_INTR_ENDPT 1 251 252 static struct usbd_bus_methods ohci_bus_methods = { 253 ohci_open, 254 ohci_poll, 255 ohci_allocm, 256 ohci_freem, 257 }; 258 259 static struct usbd_pipe_methods ohci_root_ctrl_methods = { 260 ohci_root_ctrl_transfer, 261 ohci_root_ctrl_start, 262 ohci_root_ctrl_abort, 263 ohci_root_ctrl_close, 264 ohci_noop, 265 0, 266 }; 267 268 static struct usbd_pipe_methods ohci_root_intr_methods = { 269 ohci_root_intr_transfer, 270 ohci_root_intr_start, 271 ohci_root_intr_abort, 272 ohci_root_intr_close, 273 ohci_noop, 274 ohci_root_intr_done, 275 }; 276 277 static struct usbd_pipe_methods ohci_device_ctrl_methods = { 278 ohci_device_ctrl_transfer, 279 ohci_device_ctrl_start, 280 ohci_device_ctrl_abort, 281 ohci_device_ctrl_close, 282 ohci_noop, 283 ohci_device_ctrl_done, 284 }; 285 286 static struct usbd_pipe_methods ohci_device_intr_methods = { 287 ohci_device_intr_transfer, 288 ohci_device_intr_start, 289 ohci_device_intr_abort, 290 ohci_device_intr_close, 291 ohci_device_clear_toggle, 292 ohci_device_intr_done, 293 }; 294 295 static struct usbd_pipe_methods ohci_device_bulk_methods = { 296 ohci_device_bulk_transfer, 297 ohci_device_bulk_start, 298 ohci_device_bulk_abort, 299 ohci_device_bulk_close, 300 ohci_device_clear_toggle, 301 ohci_device_bulk_done, 302 }; 303 304 #if 0 305 static struct usbd_pipe_methods ohci_device_isoc_methods = { 306 ohci_device_isoc_transfer, 307 ohci_device_isoc_start, 308 ohci_device_isoc_abort, 309 ohci_device_isoc_close, 310 ohci_noop, 311 ohci_device_isoc_done, 312 }; 313 #endif 314 315 #if defined(__NetBSD__) || defined(__OpenBSD__) 316 int 317 ohci_activate(self, act) 318 device_ptr_t self; 319 enum devact act; 320 { 321 struct ohci_softc *sc = (struct ohci_softc *)self; 322 int rv = 0; 323 324 switch (act) { 325 case DVACT_ACTIVATE: 326 return (EOPNOTSUPP); 327 break; 328 329 case DVACT_DEACTIVATE: 330 if (sc->sc_child != NULL) 331 rv = config_deactivate(sc->sc_child); 332 break; 333 } 334 return (rv); 335 } 336 337 int 338 ohci_detach(sc, flags) 339 struct ohci_softc *sc; 340 int flags; 341 { 342 int rv = 0; 343 344 if (sc->sc_child != NULL) 345 rv = config_detach(sc->sc_child, flags); 346 347 if (rv != 0) 348 return (rv); 349 350 powerhook_disestablish(sc->sc_powerhook); 351 /* free data structures XXX */ 352 353 return (rv); 354 } 355 #endif 356 357 ohci_soft_ed_t * 358 ohci_alloc_sed(sc) 359 ohci_softc_t *sc; 360 { 361 ohci_soft_ed_t *sed; 362 usbd_status err; 363 int i, offs; 364 usb_dma_t dma; 365 366 if (sc->sc_freeeds == NULL) { 367 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 368 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 369 OHCI_ED_ALIGN, &dma); 370 if (err) 371 return (0); 372 for(i = 0; i < OHCI_SED_CHUNK; i++) { 373 offs = i * OHCI_SED_SIZE; 374 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 375 sed->physaddr = DMAADDR(&dma) + offs; 376 sed->next = sc->sc_freeeds; 377 sc->sc_freeeds = sed; 378 } 379 } 380 sed = sc->sc_freeeds; 381 sc->sc_freeeds = sed->next; 382 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 383 sed->next = 0; 384 return (sed); 385 } 386 387 void 388 ohci_free_sed(sc, sed) 389 ohci_softc_t *sc; 390 ohci_soft_ed_t *sed; 391 { 392 sed->next = sc->sc_freeeds; 393 sc->sc_freeeds = sed; 394 } 395 396 ohci_soft_td_t * 397 ohci_alloc_std(sc) 398 ohci_softc_t *sc; 399 { 400 ohci_soft_td_t *std; 401 usbd_status err; 402 int i, offs; 403 usb_dma_t dma; 404 405 if (sc->sc_freetds == NULL) { 406 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 407 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 408 OHCI_TD_ALIGN, &dma); 409 if (err) 410 return (0); 411 for(i = 0; i < OHCI_STD_CHUNK; i++) { 412 offs = i * OHCI_STD_SIZE; 413 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 414 std->physaddr = DMAADDR(&dma) + offs; 415 std->nexttd = sc->sc_freetds; 416 sc->sc_freetds = std; 417 } 418 } 419 std = sc->sc_freetds; 420 sc->sc_freetds = std->nexttd; 421 memset(&std->td, 0, sizeof(ohci_td_t)); 422 std->nexttd = 0; 423 return (std); 424 } 425 426 void 427 ohci_free_std(sc, std) 428 ohci_softc_t *sc; 429 ohci_soft_td_t *std; 430 { 431 std->nexttd = sc->sc_freetds; 432 sc->sc_freetds = std; 433 } 434 435 usbd_status 436 ohci_alloc_std_chain(upipe, sc, len, rd, shortok, dma, sp, ep) 437 struct ohci_pipe *upipe; 438 ohci_softc_t *sc; 439 int len, rd, shortok; 440 usb_dma_t *dma; 441 ohci_soft_td_t *sp, **ep; 442 { 443 ohci_soft_td_t *next, *cur; 444 ohci_physaddr_t dataphys, dataphysend; 445 u_int32_t intr; 446 int curlen; 447 448 DPRINTFN(len < 4096,("ohci_alloc_std_chain: start len=%d\n", len)); 449 cur = sp; 450 dataphys = DMAADDR(dma); 451 dataphysend = OHCI_PAGE(dataphys + len - 1); 452 for (;;) { 453 next = ohci_alloc_std(sc); 454 if (next == 0) { 455 /* XXX free chain */ 456 return (USBD_NOMEM); 457 } 458 459 /* The OHCI hardware can handle at most one page crossing. */ 460 if (OHCI_PAGE(dataphys) == dataphysend || 461 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 462 /* we can handle it in this TD */ 463 curlen = len; 464 } else { 465 /* must use multiple TDs, fill as much as possible. */ 466 curlen = 2 * OHCI_PAGE_SIZE - 467 (dataphys & (OHCI_PAGE_SIZE-1)); 468 } 469 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 470 "dataphysend=0x%08x len=%d curlen=%d\n", 471 dataphys, dataphysend, 472 len, curlen)); 473 len -= curlen; 474 475 intr = len == 0 ? OHCI_TD_SET_DI(1) : OHCI_TD_NOINTR; 476 cur->td.td_flags = LE( 477 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 478 intr | OHCI_TD_TOGGLE_CARRY | 479 (shortok ? OHCI_TD_R : 0)); 480 cur->td.td_cbp = LE(dataphys); 481 cur->nexttd = next; 482 cur->td.td_nexttd = LE(next->physaddr); 483 cur->td.td_be = LE(dataphys + curlen - 1); 484 cur->len = curlen; 485 cur->flags = OHCI_ADD_LEN; 486 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 487 dataphys, dataphys + curlen - 1)); 488 if (len == 0) 489 break; 490 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 491 dataphys += curlen; 492 cur = next; 493 } 494 cur->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 495 *ep = next; 496 497 return (USBD_NORMAL_COMPLETION); 498 } 499 500 #if 0 501 static void 502 ohci_free_std_chain(sc, std, stdend) 503 ohci_softc_t *sc; 504 ohci_soft_td_t *std; 505 ohci_soft_td_t *stdend; 506 { 507 ohci_soft_td_t *p; 508 509 for (; std != stdend; std = p) { 510 p = std->nexttd; 511 ohci_free_std(sc, std); 512 } 513 } 514 #endif 515 516 usbd_status 517 ohci_init(sc) 518 ohci_softc_t *sc; 519 { 520 ohci_soft_ed_t *sed, *psed; 521 usbd_status err; 522 int rev; 523 int i; 524 u_int32_t s, ctl, ival, hcr, fm, per; 525 526 DPRINTF(("ohci_init: start\n")); 527 #if defined(__OpenBSD__) 528 printf(","); 529 #else 530 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 531 #endif 532 rev = OREAD4(sc, OHCI_REVISION); 533 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 534 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 535 536 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 537 printf("%s: unsupported OHCI revision\n", 538 USBDEVNAME(sc->sc_bus.bdev)); 539 sc->sc_bus.usbrev = USBREV_UNKNOWN; 540 return (USBD_INVAL); 541 } 542 sc->sc_bus.usbrev = USBREV_1_0; 543 544 for (i = 0; i < OHCI_HASH_SIZE; i++) 545 LIST_INIT(&sc->sc_hash_tds[i]); 546 547 /* Allocate the HCCA area. */ 548 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 549 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 550 if (err) 551 return (err); 552 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 553 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 554 555 sc->sc_eintrs = OHCI_NORMAL_INTRS; 556 557 sc->sc_ctrl_head = ohci_alloc_sed(sc); 558 if (sc->sc_ctrl_head == NULL) { 559 err = USBD_NOMEM; 560 goto bad1; 561 } 562 sc->sc_ctrl_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 563 564 sc->sc_bulk_head = ohci_alloc_sed(sc); 565 if (sc->sc_bulk_head == NULL) { 566 err = USBD_NOMEM; 567 goto bad2; 568 } 569 sc->sc_bulk_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 570 571 /* Allocate all the dummy EDs that make up the interrupt tree. */ 572 for (i = 0; i < OHCI_NO_EDS; i++) { 573 sed = ohci_alloc_sed(sc); 574 if (sed == NULL) { 575 while (--i >= 0) 576 ohci_free_sed(sc, sc->sc_eds[i]); 577 err = USBD_NOMEM; 578 goto bad3; 579 } 580 /* All ED fields are set to 0. */ 581 sc->sc_eds[i] = sed; 582 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 583 if (i != 0) { 584 psed = sc->sc_eds[(i-1) / 2]; 585 sed->next = psed; 586 sed->ed.ed_nexted = LE(psed->physaddr); 587 } 588 } 589 /* 590 * Fill HCCA interrupt table. The bit reversal is to get 591 * the tree set up properly to spread the interrupts. 592 */ 593 for (i = 0; i < OHCI_NO_INTRS; i++) 594 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 595 LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 596 597 /* Determine in what context we are running. */ 598 ctl = OREAD4(sc, OHCI_CONTROL); 599 if (ctl & OHCI_IR) { 600 /* SMM active, request change */ 601 DPRINTF(("ohci_init: SMM active, request owner change\n")); 602 s = OREAD4(sc, OHCI_COMMAND_STATUS); 603 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 604 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 605 usb_delay_ms(&sc->sc_bus, 1); 606 ctl = OREAD4(sc, OHCI_CONTROL); 607 } 608 if ((ctl & OHCI_IR) == 0) { 609 printf("%s: SMM does not respond, resetting\n", 610 USBDEVNAME(sc->sc_bus.bdev)); 611 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 612 goto reset; 613 } 614 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 615 /* BIOS started controller. */ 616 DPRINTF(("ohci_init: BIOS active\n")); 617 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 618 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 619 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 620 } 621 } else { 622 DPRINTF(("ohci_init: cold started\n")); 623 reset: 624 /* Controller was cold started. */ 625 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 626 } 627 628 /* 629 * This reset should not be necessary according to the OHCI spec, but 630 * without it some controllers do not start. 631 */ 632 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 633 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 634 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 635 636 /* We now own the host controller and the bus has been reset. */ 637 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 638 639 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 640 /* Nominal time for a reset is 10 us. */ 641 for (i = 0; i < 10; i++) { 642 delay(10); 643 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 644 if (!hcr) 645 break; 646 } 647 if (hcr) { 648 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 649 err = USBD_IOERROR; 650 goto bad3; 651 } 652 #ifdef OHCI_DEBUG 653 if (ohcidebug > 15) 654 ohci_dumpregs(sc); 655 #endif 656 657 /* The controller is now in suspend state, we have 2ms to finish. */ 658 659 /* Set up HC registers. */ 660 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 661 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 662 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 663 /* disable all interrupts and then switch on all desired interrupts */ 664 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 665 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 666 /* switch on desired functional features */ 667 ctl = OREAD4(sc, OHCI_CONTROL); 668 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 669 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 670 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 671 /* And finally start it! */ 672 OWRITE4(sc, OHCI_CONTROL, ctl); 673 674 /* 675 * The controller is now OPERATIONAL. Set a some final 676 * registers that should be set earlier, but that the 677 * controller ignores when in the SUSPEND state. 678 */ 679 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 680 fm |= OHCI_FSMPS(ival) | ival; 681 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 682 per = OHCI_PERIODIC(ival); /* 90% periodic */ 683 OWRITE4(sc, OHCI_PERIODIC_START, per); 684 685 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 686 687 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 688 689 #ifdef OHCI_DEBUG 690 if (ohcidebug > 5) 691 ohci_dumpregs(sc); 692 #endif 693 694 /* Set up the bus struct. */ 695 sc->sc_bus.methods = &ohci_bus_methods; 696 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 697 698 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 699 700 return (USBD_NORMAL_COMPLETION); 701 702 bad3: 703 ohci_free_sed(sc, sc->sc_ctrl_head); 704 bad2: 705 ohci_free_sed(sc, sc->sc_bulk_head); 706 bad1: 707 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 708 return (err); 709 } 710 711 usbd_status 712 ohci_allocm(bus, dma, size) 713 struct usbd_bus *bus; 714 usb_dma_t *dma; 715 u_int32_t size; 716 { 717 #if defined(__NetBSD__) || defined(__OpenBSD__) 718 struct ohci_softc *sc = (struct ohci_softc *)bus; 719 #endif 720 721 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 722 } 723 724 void 725 ohci_freem(bus, dma) 726 struct usbd_bus *bus; 727 usb_dma_t *dma; 728 { 729 #if defined(__NetBSD__) || defined(__OpenBSD__) 730 struct ohci_softc *sc = (struct ohci_softc *)bus; 731 #endif 732 733 usb_freemem(&sc->sc_bus, dma); 734 } 735 736 #if defined(__NetBSD__) 737 void 738 ohci_power(why, v) 739 int why; 740 void *v; 741 { 742 #ifdef OHCI_DEBUG 743 ohci_softc_t *sc = v; 744 745 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 746 /* XXX should suspend/resume */ 747 ohci_dumpregs(sc); 748 #endif 749 } 750 #endif /* defined(__NetBSD__) */ 751 752 #ifdef OHCI_DEBUG 753 void 754 ohci_dumpregs(sc) 755 ohci_softc_t *sc; 756 { 757 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 758 OREAD4(sc, OHCI_REVISION), 759 OREAD4(sc, OHCI_CONTROL), 760 OREAD4(sc, OHCI_COMMAND_STATUS))); 761 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 762 OREAD4(sc, OHCI_INTERRUPT_STATUS), 763 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 764 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 765 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 766 OREAD4(sc, OHCI_HCCA), 767 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 768 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 769 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 770 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 771 OREAD4(sc, OHCI_BULK_HEAD_ED), 772 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 773 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 774 OREAD4(sc, OHCI_DONE_HEAD), 775 OREAD4(sc, OHCI_FM_INTERVAL), 776 OREAD4(sc, OHCI_FM_REMAINING))); 777 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 778 OREAD4(sc, OHCI_FM_NUMBER), 779 OREAD4(sc, OHCI_PERIODIC_START), 780 OREAD4(sc, OHCI_LS_THRESHOLD))); 781 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 782 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 783 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 784 OREAD4(sc, OHCI_RH_STATUS))); 785 DPRINTF((" port1=0x%08x port2=0x%08x\n", 786 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 787 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 788 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 789 LE(sc->sc_hcca->hcca_frame_number), 790 LE(sc->sc_hcca->hcca_done_head))); 791 } 792 #endif 793 794 static int ohci_intr1 __P((ohci_softc_t *)); 795 796 int 797 ohci_intr(p) 798 void *p; 799 { 800 ohci_softc_t *sc = p; 801 802 /* If we get an interrupt while polling, then just ignore it. */ 803 if (sc->sc_bus.use_polling) 804 return (0); 805 806 return (ohci_intr1(sc)); 807 } 808 809 static int 810 ohci_intr1(sc) 811 ohci_softc_t *sc; 812 { 813 u_int32_t intrs, eintrs; 814 ohci_physaddr_t done; 815 816 /* In case the interrupt occurs before initialization has completed. */ 817 if (sc == NULL || sc->sc_hcca == NULL) { 818 #ifdef DIAGNOSTIC 819 printf("ohci_intr: sc->sc_hcca == NULL\n"); 820 #endif 821 return (0); 822 } 823 824 intrs = 0; 825 done = LE(sc->sc_hcca->hcca_done_head); 826 if (done != 0) { 827 sc->sc_hcca->hcca_done_head = 0; 828 if (done & ~OHCI_DONE_INTRS) 829 intrs = OHCI_WDH; 830 if (done & OHCI_DONE_INTRS) 831 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 832 } else 833 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 834 835 if (!intrs) 836 return (0); 837 838 intrs &= ~OHCI_MIE; 839 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 840 eintrs = intrs & sc->sc_eintrs; 841 if (!eintrs) 842 return (0); 843 844 sc->sc_bus.intr_context++; 845 sc->sc_bus.no_intrs++; 846 DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n", 847 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 848 (u_int)eintrs)); 849 850 if (eintrs & OHCI_SO) { 851 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev)); 852 /* XXX do what */ 853 intrs &= ~OHCI_SO; 854 } 855 if (eintrs & OHCI_WDH) { 856 ohci_process_done(sc, done &~ OHCI_DONE_INTRS); 857 intrs &= ~OHCI_WDH; 858 } 859 if (eintrs & OHCI_RD) { 860 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 861 /* XXX process resume detect */ 862 } 863 if (eintrs & OHCI_UE) { 864 printf("%s: unrecoverable error, controller halted\n", 865 USBDEVNAME(sc->sc_bus.bdev)); 866 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 867 /* XXX what else */ 868 } 869 if (eintrs & OHCI_RHSC) { 870 ohci_rhsc(sc, sc->sc_intrxfer); 871 intrs &= ~OHCI_RHSC; 872 873 /* 874 * Disable RHSC interrupt for now, because it will be 875 * on until the port has been reset. 876 */ 877 ohci_rhsc_able(sc, 0); 878 } 879 880 sc->sc_bus.intr_context--; 881 882 /* Block unprocessed interrupts. XXX */ 883 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 884 sc->sc_eintrs &= ~intrs; 885 886 return (1); 887 } 888 889 void 890 ohci_rhsc_able(sc, on) 891 ohci_softc_t *sc; 892 int on; 893 { 894 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 895 if (on) { 896 sc->sc_eintrs |= OHCI_RHSC; 897 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 898 } else { 899 sc->sc_eintrs &= ~OHCI_RHSC; 900 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 901 } 902 } 903 904 #ifdef OHCI_DEBUG 905 char *ohci_cc_strs[] = { 906 "NO_ERROR", 907 "CRC", 908 "BIT_STUFFING", 909 "DATA_TOGGLE_MISMATCH", 910 "STALL", 911 "DEVICE_NOT_RESPONDING", 912 "PID_CHECK_FAILURE", 913 "UNEXPECTED_PID", 914 "DATA_OVERRUN", 915 "DATA_UNDERRUN", 916 "BUFFER_OVERRUN", 917 "BUFFER_UNDERRUN", 918 "NOT_ACCESSED", 919 }; 920 #endif 921 922 void 923 ohci_process_done(sc, done) 924 ohci_softc_t *sc; 925 ohci_physaddr_t done; 926 { 927 ohci_soft_td_t *std, *sdone, *stdnext; 928 usbd_xfer_handle xfer; 929 int len, cc; 930 931 DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done)); 932 933 /* Reverse the done list. */ 934 for (sdone = 0; done; done = LE(std->td.td_nexttd)) { 935 std = ohci_hash_find_td(sc, done); 936 std->dnext = sdone; 937 sdone = std; 938 } 939 940 #ifdef OHCI_DEBUG 941 if (ohcidebug > 10) { 942 DPRINTF(("ohci_process_done: TD done:\n")); 943 ohci_dump_tds(sdone); 944 } 945 #endif 946 947 for (std = sdone; std; std = stdnext) { 948 xfer = std->xfer; 949 stdnext = std->dnext; 950 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 951 std, xfer, xfer->hcpriv)); 952 cc = OHCI_TD_GET_CC(LE(std->td.td_flags)); 953 usb_untimeout(ohci_timeout, xfer, xfer->timo_handle); 954 if (xfer->status == USBD_CANCELLED || 955 xfer->status == USBD_TIMEOUT) { 956 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 957 xfer)); 958 /* Handled by abort routine. */ 959 } else if (cc == OHCI_CC_NO_ERROR) { 960 len = std->len; 961 if (std->td.td_cbp != 0) 962 len -= LE(std->td.td_be) - 963 LE(std->td.td_cbp) + 1; 964 if (std->flags & OHCI_ADD_LEN) 965 xfer->actlen += len; 966 if (std->flags & OHCI_CALL_DONE) { 967 xfer->status = USBD_NORMAL_COMPLETION; 968 usb_transfer_complete(xfer); 969 } 970 ohci_hash_rem_td(sc, std); 971 ohci_free_std(sc, std); 972 } else { 973 /* 974 * Endpoint is halted. First unlink all the TDs 975 * belonging to the failed transfer, and then restart 976 * the endpoint. 977 */ 978 ohci_soft_td_t *p, *n; 979 struct ohci_pipe *opipe = 980 (struct ohci_pipe *)xfer->pipe; 981 982 DPRINTF(("ohci_process_done: error cc=%d (%s)\n", 983 OHCI_TD_GET_CC(LE(std->td.td_flags)), 984 ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td.td_flags))])); 985 986 /* remove TDs */ 987 for (p = std; p->xfer == xfer; p = n) { 988 n = p->nexttd; 989 ohci_hash_rem_td(sc, p); 990 ohci_free_std(sc, p); 991 } 992 993 /* clear halt */ 994 opipe->sed->ed.ed_headp = LE(p->physaddr); 995 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 996 997 if (cc == OHCI_CC_STALL) 998 xfer->status = USBD_STALLED; 999 else 1000 xfer->status = USBD_IOERROR; 1001 usb_transfer_complete(xfer); 1002 } 1003 } 1004 } 1005 1006 void 1007 ohci_device_ctrl_done(xfer) 1008 usbd_xfer_handle xfer; 1009 { 1010 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1011 1012 #ifdef DIAGNOSTIC 1013 if (!(xfer->rqflags & URQ_REQUEST)) { 1014 panic("ohci_ctrl_done: not a request\n"); 1015 } 1016 #endif 1017 xfer->hcpriv = NULL; 1018 } 1019 1020 void 1021 ohci_device_intr_done(xfer) 1022 usbd_xfer_handle xfer; 1023 { 1024 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1025 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1026 ohci_soft_ed_t *sed = opipe->sed; 1027 ohci_soft_td_t *data, *tail; 1028 1029 1030 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1031 xfer, xfer->actlen)); 1032 1033 xfer->hcpriv = NULL; 1034 1035 if (xfer->pipe->repeat) { 1036 data = opipe->tail; 1037 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1038 if (tail == NULL) { 1039 xfer->status = USBD_NOMEM; 1040 return; 1041 } 1042 tail->xfer = NULL; 1043 1044 data->td.td_flags = LE( 1045 OHCI_TD_IN | OHCI_TD_NOCC | 1046 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1047 if (xfer->flags & USBD_SHORT_XFER_OK) 1048 data->td.td_flags |= LE(OHCI_TD_R); 1049 data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf)); 1050 data->nexttd = tail; 1051 data->td.td_nexttd = LE(tail->physaddr); 1052 data->td.td_be = LE(LE(data->td.td_cbp) + xfer->length - 1); 1053 data->len = xfer->length; 1054 data->xfer = xfer; 1055 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1056 xfer->hcpriv = data; 1057 xfer->actlen = 0; 1058 1059 ohci_hash_add_td(sc, data); 1060 sed->ed.ed_tailp = LE(tail->physaddr); 1061 opipe->tail = tail; 1062 } 1063 } 1064 1065 void 1066 ohci_device_bulk_done(xfer) 1067 usbd_xfer_handle xfer; 1068 { 1069 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1070 xfer, xfer->actlen)); 1071 1072 xfer->hcpriv = NULL; 1073 } 1074 1075 void 1076 ohci_rhsc(sc, xfer) 1077 ohci_softc_t *sc; 1078 usbd_xfer_handle xfer; 1079 { 1080 usbd_pipe_handle pipe; 1081 struct ohci_pipe *opipe; 1082 u_char *p; 1083 int i, m; 1084 int hstatus; 1085 1086 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1087 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1088 sc, xfer, hstatus)); 1089 1090 if (xfer == NULL) { 1091 /* Just ignore the change. */ 1092 return; 1093 } 1094 1095 pipe = xfer->pipe; 1096 opipe = (struct ohci_pipe *)pipe; 1097 1098 p = KERNADDR(&xfer->dmabuf); 1099 m = min(sc->sc_noport, xfer->length * 8 - 1); 1100 memset(p, 0, xfer->length); 1101 for (i = 1; i <= m; i++) { 1102 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1103 p[i/8] |= 1 << (i%8); 1104 } 1105 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1106 xfer->actlen = xfer->length; 1107 xfer->status = USBD_NORMAL_COMPLETION; 1108 1109 usb_transfer_complete(xfer); 1110 } 1111 1112 void 1113 ohci_root_intr_done(xfer) 1114 usbd_xfer_handle xfer; 1115 { 1116 xfer->hcpriv = NULL; 1117 } 1118 1119 /* 1120 * Wait here until controller claims to have an interrupt. 1121 * Then call ohci_intr and return. Use timeout to avoid waiting 1122 * too long. 1123 */ 1124 void 1125 ohci_waitintr(sc, xfer) 1126 ohci_softc_t *sc; 1127 usbd_xfer_handle xfer; 1128 { 1129 int timo = xfer->timeout; 1130 int usecs; 1131 u_int32_t intrs; 1132 1133 xfer->status = USBD_IN_PROGRESS; 1134 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1135 usb_delay_ms(&sc->sc_bus, 1); 1136 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1137 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1138 #ifdef OHCI_DEBUG 1139 if (ohcidebug > 15) 1140 ohci_dumpregs(sc); 1141 #endif 1142 if (intrs) { 1143 ohci_intr1(sc); 1144 if (xfer->status != USBD_IN_PROGRESS) 1145 return; 1146 } 1147 } 1148 1149 /* Timeout */ 1150 DPRINTF(("ohci_waitintr: timeout\n")); 1151 xfer->status = USBD_TIMEOUT; 1152 usb_transfer_complete(xfer); 1153 /* XXX should free TD */ 1154 } 1155 1156 void 1157 ohci_poll(bus) 1158 struct usbd_bus *bus; 1159 { 1160 ohci_softc_t *sc = (ohci_softc_t *)bus; 1161 1162 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1163 ohci_intr1(sc); 1164 } 1165 1166 usbd_status 1167 ohci_device_request(xfer) 1168 usbd_xfer_handle xfer; 1169 { 1170 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1171 usb_device_request_t *req = &xfer->request; 1172 usbd_device_handle dev = opipe->pipe.device; 1173 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1174 int addr = dev->address; 1175 ohci_soft_td_t *setup, *data = 0, *stat, *next, *tail; 1176 ohci_soft_ed_t *sed; 1177 int isread; 1178 int len; 1179 usbd_status err; 1180 int s; 1181 1182 isread = req->bmRequestType & UT_READ; 1183 len = UGETW(req->wLength); 1184 1185 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1186 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1187 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1188 UGETW(req->wIndex), len, addr, 1189 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1190 1191 setup = opipe->tail; 1192 stat = ohci_alloc_std(sc); 1193 if (stat == NULL) { 1194 err = USBD_NOMEM; 1195 goto bad1; 1196 } 1197 tail = ohci_alloc_std(sc); 1198 if (tail == NULL) { 1199 err = USBD_NOMEM; 1200 goto bad2; 1201 } 1202 tail->xfer = NULL; 1203 1204 sed = opipe->sed; 1205 opipe->u.ctl.length = len; 1206 1207 /* Update device address and length since they may have changed. */ 1208 /* XXX This only needs to be done once, but it's too early in open. */ 1209 sed->ed.ed_flags = LE( 1210 (LE(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1211 OHCI_ED_SET_FA(addr) | 1212 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1213 1214 /* Set up data transaction */ 1215 if (len != 0) { 1216 data = ohci_alloc_std(sc); 1217 if (data == NULL) { 1218 err = USBD_NOMEM; 1219 goto bad3; 1220 } 1221 data->td.td_flags = LE( 1222 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 1223 OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR | 1224 (xfer->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0)); 1225 data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf)); 1226 data->nexttd = stat; 1227 data->td.td_nexttd = LE(stat->physaddr); 1228 data->td.td_be = LE(LE(data->td.td_cbp) + len - 1); 1229 data->len = len; 1230 data->xfer = xfer; 1231 data->flags = OHCI_ADD_LEN; 1232 1233 next = data; 1234 stat->flags = OHCI_CALL_DONE; 1235 } else { 1236 next = stat; 1237 /* XXX ADD_LEN? */ 1238 stat->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1239 } 1240 1241 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1242 1243 setup->td.td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC | 1244 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1245 setup->td.td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma)); 1246 setup->nexttd = next; 1247 setup->td.td_nexttd = LE(next->physaddr); 1248 setup->td.td_be = LE(LE(setup->td.td_cbp) + sizeof *req - 1); 1249 setup->len = 0; /* XXX The number of byte we count */ 1250 setup->xfer = xfer; 1251 setup->flags = 0; 1252 xfer->hcpriv = setup; 1253 1254 stat->td.td_flags = LE( 1255 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC | 1256 OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1257 stat->td.td_cbp = 0; 1258 stat->nexttd = tail; 1259 stat->td.td_nexttd = LE(tail->physaddr); 1260 stat->td.td_be = 0; 1261 stat->len = 0; 1262 stat->xfer = xfer; 1263 1264 #ifdef OHCI_DEBUG 1265 if (ohcidebug > 5) { 1266 DPRINTF(("ohci_device_request:\n")); 1267 ohci_dump_ed(sed); 1268 ohci_dump_tds(setup); 1269 } 1270 #endif 1271 1272 /* Insert ED in schedule */ 1273 s = splusb(); 1274 ohci_hash_add_td(sc, setup); 1275 if (len != 0) 1276 ohci_hash_add_td(sc, data); 1277 ohci_hash_add_td(sc, stat); 1278 sed->ed.ed_tailp = LE(tail->physaddr); 1279 opipe->tail = tail; 1280 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1281 if (xfer->timeout && !sc->sc_bus.use_polling) { 1282 usb_timeout(ohci_timeout, xfer, 1283 MS_TO_TICKS(xfer->timeout), xfer->timo_handle); 1284 } 1285 splx(s); 1286 1287 #ifdef OHCI_DEBUG 1288 if (ohcidebug > 5) { 1289 usb_delay_ms(&sc->sc_bus, 5); 1290 DPRINTF(("ohci_device_request: status=%x\n", 1291 OREAD4(sc, OHCI_COMMAND_STATUS))); 1292 ohci_dump_ed(sed); 1293 ohci_dump_tds(setup); 1294 } 1295 #endif 1296 1297 return (USBD_NORMAL_COMPLETION); 1298 1299 bad3: 1300 ohci_free_std(sc, tail); 1301 bad2: 1302 ohci_free_std(sc, stat); 1303 bad1: 1304 return (err); 1305 } 1306 1307 /* 1308 * Add an ED to the schedule. Called at splusb(). 1309 */ 1310 void 1311 ohci_add_ed(sed, head) 1312 ohci_soft_ed_t *sed; 1313 ohci_soft_ed_t *head; 1314 { 1315 SPLUSBCHECK; 1316 sed->next = head->next; 1317 sed->ed.ed_nexted = head->ed.ed_nexted; 1318 head->next = sed; 1319 head->ed.ed_nexted = LE(sed->physaddr); 1320 } 1321 1322 /* 1323 * Remove an ED from the schedule. Called at splusb(). 1324 */ 1325 void 1326 ohci_rem_ed(sed, head) 1327 ohci_soft_ed_t *sed; 1328 ohci_soft_ed_t *head; 1329 { 1330 ohci_soft_ed_t *p; 1331 1332 SPLUSBCHECK; 1333 1334 /* XXX */ 1335 for (p = head; p == NULL && p->next != sed; p = p->next) 1336 ; 1337 if (p == NULL) 1338 panic("ohci_rem_ed: ED not found\n"); 1339 p->next = sed->next; 1340 p->ed.ed_nexted = sed->ed.ed_nexted; 1341 } 1342 1343 /* 1344 * When a transfer is completed the TD is added to the done queue by 1345 * the host controller. This queue is the processed by software. 1346 * Unfortunately the queue contains the physical address of the TD 1347 * and we have no simple way to translate this back to a kernel address. 1348 * To make the translation possible (and fast) we use a hash table of 1349 * TDs currently in the schedule. The physical address is used as the 1350 * hash value. 1351 */ 1352 1353 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1354 /* Called at splusb() */ 1355 void 1356 ohci_hash_add_td(sc, std) 1357 ohci_softc_t *sc; 1358 ohci_soft_td_t *std; 1359 { 1360 int h = HASH(std->physaddr); 1361 1362 SPLUSBCHECK; 1363 1364 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1365 } 1366 1367 /* Called at splusb() */ 1368 void 1369 ohci_hash_rem_td(sc, std) 1370 ohci_softc_t *sc; 1371 ohci_soft_td_t *std; 1372 { 1373 SPLUSBCHECK; 1374 1375 LIST_REMOVE(std, hnext); 1376 } 1377 1378 ohci_soft_td_t * 1379 ohci_hash_find_td(sc, a) 1380 ohci_softc_t *sc; 1381 ohci_physaddr_t a; 1382 { 1383 int h = HASH(a); 1384 ohci_soft_td_t *std; 1385 1386 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1387 std != NULL; 1388 std = LIST_NEXT(std, hnext)) 1389 if (std->physaddr == a) 1390 return (std); 1391 panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a); 1392 } 1393 1394 void 1395 ohci_timeout(addr) 1396 void *addr; 1397 { 1398 usbd_xfer_handle xfer = addr; 1399 int s; 1400 1401 DPRINTF(("ohci_timeout: xfer=%p\n", xfer)); 1402 1403 s = splusb(); 1404 xfer->device->bus->intr_context++; 1405 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1406 xfer->device->bus->intr_context--; 1407 splx(s); 1408 } 1409 1410 #ifdef OHCI_DEBUG 1411 void 1412 ohci_dump_tds(std) 1413 ohci_soft_td_t *std; 1414 { 1415 for (; std; std = std->nexttd) 1416 ohci_dump_td(std); 1417 } 1418 1419 void 1420 ohci_dump_td(std) 1421 ohci_soft_td_t *std; 1422 { 1423 DPRINTF(("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1424 "nexttd=0x%08lx be=0x%08lx\n", 1425 std, (u_long)std->physaddr, 1426 (int)LE(std->td.td_flags), 1427 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1428 OHCI_TD_GET_DI(LE(std->td.td_flags)), 1429 OHCI_TD_GET_EC(LE(std->td.td_flags)), 1430 OHCI_TD_GET_CC(LE(std->td.td_flags)), 1431 (u_long)LE(std->td.td_cbp), 1432 (u_long)LE(std->td.td_nexttd), (u_long)LE(std->td.td_be))); 1433 } 1434 1435 void 1436 ohci_dump_ed(sed) 1437 ohci_soft_ed_t *sed; 1438 { 1439 DPRINTF(("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx " 1440 "headp=%b nexted=0x%08lx\n", 1441 sed, (u_long)sed->physaddr, 1442 OHCI_ED_GET_FA(LE(sed->ed.ed_flags)), 1443 OHCI_ED_GET_EN(LE(sed->ed.ed_flags)), 1444 OHCI_ED_GET_MAXP(LE(sed->ed.ed_flags)), 1445 (int)LE(sed->ed.ed_flags), 1446 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1447 (u_long)LE(sed->ed.ed_tailp), 1448 (u_long)LE(sed->ed.ed_headp), 1449 "\20\1HALT\2CARRY", 1450 (u_long)LE(sed->ed.ed_nexted))); 1451 } 1452 #endif 1453 1454 usbd_status 1455 ohci_open(pipe) 1456 usbd_pipe_handle pipe; 1457 { 1458 usbd_device_handle dev = pipe->device; 1459 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1460 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1461 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1462 u_int8_t addr = dev->address; 1463 ohci_soft_ed_t *sed; 1464 ohci_soft_td_t *std; 1465 usbd_status err; 1466 int s; 1467 1468 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1469 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1470 if (addr == sc->sc_addr) { 1471 switch (ed->bEndpointAddress) { 1472 case USB_CONTROL_ENDPOINT: 1473 pipe->methods = &ohci_root_ctrl_methods; 1474 break; 1475 case UE_DIR_IN | OHCI_INTR_ENDPT: 1476 pipe->methods = &ohci_root_intr_methods; 1477 break; 1478 default: 1479 return (USBD_INVAL); 1480 } 1481 } else { 1482 sed = ohci_alloc_sed(sc); 1483 if (sed == NULL) 1484 goto bad0; 1485 std = ohci_alloc_std(sc); 1486 if (std == NULL) 1487 goto bad1; 1488 opipe->sed = sed; 1489 opipe->tail = std; 1490 sed->ed.ed_flags = LE( 1491 OHCI_ED_SET_FA(addr) | 1492 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1493 OHCI_ED_DIR_TD | 1494 (dev->lowspeed ? OHCI_ED_SPEED : 0) | 1495 ((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ? 1496 OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) | 1497 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1498 sed->ed.ed_headp = sed->ed.ed_tailp = LE(std->physaddr); 1499 1500 switch (ed->bmAttributes & UE_XFERTYPE) { 1501 case UE_CONTROL: 1502 pipe->methods = &ohci_device_ctrl_methods; 1503 err = usb_allocmem(&sc->sc_bus, 1504 sizeof(usb_device_request_t), 1505 0, &opipe->u.ctl.reqdma); 1506 if (err) 1507 goto bad; 1508 s = splusb(); 1509 ohci_add_ed(sed, sc->sc_ctrl_head); 1510 splx(s); 1511 break; 1512 case UE_INTERRUPT: 1513 pipe->methods = &ohci_device_intr_methods; 1514 return (ohci_device_setintr(sc, opipe, ed->bInterval)); 1515 case UE_ISOCHRONOUS: 1516 printf("ohci_open: open iso unimplemented\n"); 1517 return (USBD_INVAL); 1518 case UE_BULK: 1519 pipe->methods = &ohci_device_bulk_methods; 1520 s = splusb(); 1521 ohci_add_ed(sed, sc->sc_bulk_head); 1522 splx(s); 1523 break; 1524 } 1525 } 1526 return (USBD_NORMAL_COMPLETION); 1527 1528 bad: 1529 ohci_free_std(sc, std); 1530 bad1: 1531 ohci_free_sed(sc, sed); 1532 bad0: 1533 return (USBD_NOMEM); 1534 1535 } 1536 1537 /* 1538 * Close a reqular pipe. 1539 * Assumes that there are no pending transactions. 1540 */ 1541 void 1542 ohci_close_pipe(pipe, head) 1543 usbd_pipe_handle pipe; 1544 ohci_soft_ed_t *head; 1545 { 1546 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1547 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1548 ohci_soft_ed_t *sed = opipe->sed; 1549 int s; 1550 1551 s = splusb(); 1552 #ifdef DIAGNOSTIC 1553 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 1554 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 1555 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) { 1556 ohci_physaddr_t td = sed->ed.ed_headp; 1557 ohci_soft_td_t *std; 1558 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]); 1559 std != NULL; 1560 std = LIST_NEXT(std, hnext)) 1561 if (std->physaddr == td) 1562 break; 1563 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 1564 "tl=0x%x pipe=%p, std=%p\n", sed, 1565 (int)LE(sed->ed.ed_headp), (int)LE(sed->ed.ed_tailp), 1566 pipe, std); 1567 usb_delay_ms(&sc->sc_bus, 2); 1568 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 1569 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) 1570 printf("ohci_close_pipe: pipe still not empty\n"); 1571 } 1572 #endif 1573 ohci_rem_ed(sed, head); 1574 splx(s); 1575 ohci_free_std(sc, opipe->tail); 1576 ohci_free_sed(sc, opipe->sed); 1577 } 1578 1579 /* 1580 * Abort a device request. 1581 * If this routine is called at splusb() it guarantees that the request 1582 * will be removed from the hardware scheduling and that the callback 1583 * for it will be called with USBD_CANCELLED status. 1584 * It's impossible to guarantee that the requested transfer will not 1585 * have happened since the hardware runs concurrently. 1586 * If the transaction has already happened we rely on the ordinary 1587 * interrupt processing to process it. 1588 */ 1589 void 1590 ohci_abort_xfer(xfer, status) 1591 usbd_xfer_handle xfer; 1592 usbd_status status; 1593 { 1594 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1595 ohci_soft_ed_t *sed; 1596 1597 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p\n", xfer, opipe)); 1598 1599 xfer->status = status; 1600 1601 usb_untimeout(ohci_timeout, xfer, xfer->timo_handle); 1602 1603 sed = opipe->sed; 1604 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 1605 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); /* force hardware skip */ 1606 1607 if (xfer->device->bus->intr_context) { 1608 /* We have no process context, so we can't use tsleep(). */ 1609 timeout(ohci_abort_xfer_end, xfer, hz / USB_FRAMES_PER_SECOND); 1610 } else { 1611 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 1612 KASSERT(intr_nesting_level == 0, 1613 ("ohci_abort_req in interrupt context")); 1614 #endif 1615 usb_delay_ms(opipe->pipe.device->bus, 1); 1616 ohci_abort_xfer_end(xfer); 1617 } 1618 } 1619 1620 void 1621 ohci_abort_xfer_end(v) 1622 void *v; 1623 { 1624 usbd_xfer_handle xfer = v; 1625 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1626 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1627 ohci_soft_ed_t *sed; 1628 ohci_soft_td_t *p, *n; 1629 int s; 1630 1631 s = splusb(); 1632 1633 p = xfer->hcpriv; 1634 #ifdef DIAGNOSTIC 1635 if (p == NULL) { 1636 printf("ohci_abort_xfer: hcpriv==0\n"); 1637 return; 1638 } 1639 #endif 1640 for (; p->xfer == xfer; p = n) { 1641 n = p->nexttd; 1642 ohci_hash_rem_td(sc, p); 1643 ohci_free_std(sc, p); 1644 } 1645 1646 sed = opipe->sed; 1647 DPRINTFN(2,("ohci_abort_xfer: set hd=%x, tl=%x\n", 1648 (int)LE(p->physaddr), (int)LE(sed->ed.ed_tailp))); 1649 sed->ed.ed_headp = p->physaddr; /* unlink TDs */ 1650 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); /* remove hardware skip */ 1651 1652 usb_transfer_complete(xfer); 1653 1654 splx(s); 1655 } 1656 1657 /* 1658 * Data structures and routines to emulate the root hub. 1659 */ 1660 static usb_device_descriptor_t ohci_devd = { 1661 USB_DEVICE_DESCRIPTOR_SIZE, 1662 UDESC_DEVICE, /* type */ 1663 {0x00, 0x01}, /* USB version */ 1664 UCLASS_HUB, /* class */ 1665 USUBCLASS_HUB, /* subclass */ 1666 0, /* protocol */ 1667 64, /* max packet */ 1668 {0},{0},{0x00,0x01}, /* device id */ 1669 1,2,0, /* string indicies */ 1670 1 /* # of configurations */ 1671 }; 1672 1673 static usb_config_descriptor_t ohci_confd = { 1674 USB_CONFIG_DESCRIPTOR_SIZE, 1675 UDESC_CONFIG, 1676 {USB_CONFIG_DESCRIPTOR_SIZE + 1677 USB_INTERFACE_DESCRIPTOR_SIZE + 1678 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1679 1, 1680 1, 1681 0, 1682 UC_SELF_POWERED, 1683 0 /* max power */ 1684 }; 1685 1686 static usb_interface_descriptor_t ohci_ifcd = { 1687 USB_INTERFACE_DESCRIPTOR_SIZE, 1688 UDESC_INTERFACE, 1689 0, 1690 0, 1691 1, 1692 UCLASS_HUB, 1693 USUBCLASS_HUB, 1694 0, 1695 0 1696 }; 1697 1698 static usb_endpoint_descriptor_t ohci_endpd = { 1699 USB_ENDPOINT_DESCRIPTOR_SIZE, 1700 UDESC_ENDPOINT, 1701 UE_DIR_IN | OHCI_INTR_ENDPT, 1702 UE_INTERRUPT, 1703 {8, 0}, /* max packet */ 1704 255 1705 }; 1706 1707 static usb_hub_descriptor_t ohci_hubd = { 1708 USB_HUB_DESCRIPTOR_SIZE, 1709 UDESC_HUB, 1710 0, 1711 {0,0}, 1712 0, 1713 0, 1714 {0}, 1715 }; 1716 1717 static int 1718 ohci_str(p, l, s) 1719 usb_string_descriptor_t *p; 1720 int l; 1721 char *s; 1722 { 1723 int i; 1724 1725 if (l == 0) 1726 return (0); 1727 p->bLength = 2 * strlen(s) + 2; 1728 if (l == 1) 1729 return (1); 1730 p->bDescriptorType = UDESC_STRING; 1731 l -= 2; 1732 for (i = 0; s[i] && l > 1; i++, l -= 2) 1733 USETW2(p->bString[i], 0, s[i]); 1734 return (2*i+2); 1735 } 1736 1737 /* 1738 * Simulate a hardware hub by handling all the necessary requests. 1739 */ 1740 static usbd_status 1741 ohci_root_ctrl_transfer(xfer) 1742 usbd_xfer_handle xfer; 1743 { 1744 usbd_status err; 1745 1746 /* Insert last in queue. */ 1747 err = usb_insert_transfer(xfer); 1748 if (err) 1749 return (err); 1750 1751 /* Pipe isn't running, start first */ 1752 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1753 } 1754 1755 static usbd_status 1756 ohci_root_ctrl_start(xfer) 1757 usbd_xfer_handle xfer; 1758 { 1759 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 1760 usb_device_request_t *req; 1761 void *buf = NULL; 1762 int port, i; 1763 int s, len, value, index, l, totlen = 0; 1764 usb_port_status_t ps; 1765 usb_hub_descriptor_t hubd; 1766 usbd_status err; 1767 u_int32_t v; 1768 1769 #ifdef DIAGNOSTIC 1770 if (!(xfer->rqflags & URQ_REQUEST)) 1771 /* XXX panic */ 1772 return (USBD_INVAL); 1773 #endif 1774 req = &xfer->request; 1775 1776 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 1777 req->bmRequestType, req->bRequest)); 1778 1779 len = UGETW(req->wLength); 1780 value = UGETW(req->wValue); 1781 index = UGETW(req->wIndex); 1782 1783 if (len != 0) 1784 buf = KERNADDR(&xfer->dmabuf); 1785 1786 #define C(x,y) ((x) | ((y) << 8)) 1787 switch(C(req->bRequest, req->bmRequestType)) { 1788 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1789 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1790 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1791 /* 1792 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1793 * for the integrated root hub. 1794 */ 1795 break; 1796 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1797 if (len > 0) { 1798 *(u_int8_t *)buf = sc->sc_conf; 1799 totlen = 1; 1800 } 1801 break; 1802 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1803 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 1804 switch(value >> 8) { 1805 case UDESC_DEVICE: 1806 if ((value & 0xff) != 0) { 1807 err = USBD_IOERROR; 1808 goto ret; 1809 } 1810 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1811 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 1812 memcpy(buf, &ohci_devd, l); 1813 break; 1814 case UDESC_CONFIG: 1815 if ((value & 0xff) != 0) { 1816 err = USBD_IOERROR; 1817 goto ret; 1818 } 1819 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1820 memcpy(buf, &ohci_confd, l); 1821 buf = (char *)buf + l; 1822 len -= l; 1823 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1824 totlen += l; 1825 memcpy(buf, &ohci_ifcd, l); 1826 buf = (char *)buf + l; 1827 len -= l; 1828 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1829 totlen += l; 1830 memcpy(buf, &ohci_endpd, l); 1831 break; 1832 case UDESC_STRING: 1833 if (len == 0) 1834 break; 1835 *(u_int8_t *)buf = 0; 1836 totlen = 1; 1837 switch (value & 0xff) { 1838 case 1: /* Vendor */ 1839 totlen = ohci_str(buf, len, sc->sc_vendor); 1840 break; 1841 case 2: /* Product */ 1842 totlen = ohci_str(buf, len, "OHCI root hub"); 1843 break; 1844 } 1845 break; 1846 default: 1847 err = USBD_IOERROR; 1848 goto ret; 1849 } 1850 break; 1851 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1852 if (len > 0) { 1853 *(u_int8_t *)buf = 0; 1854 totlen = 1; 1855 } 1856 break; 1857 case C(UR_GET_STATUS, UT_READ_DEVICE): 1858 if (len > 1) { 1859 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1860 totlen = 2; 1861 } 1862 break; 1863 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1864 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1865 if (len > 1) { 1866 USETW(((usb_status_t *)buf)->wStatus, 0); 1867 totlen = 2; 1868 } 1869 break; 1870 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1871 if (value >= USB_MAX_DEVICES) { 1872 err = USBD_IOERROR; 1873 goto ret; 1874 } 1875 sc->sc_addr = value; 1876 break; 1877 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1878 if (value != 0 && value != 1) { 1879 err = USBD_IOERROR; 1880 goto ret; 1881 } 1882 sc->sc_conf = value; 1883 break; 1884 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1885 break; 1886 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1887 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1888 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1889 err = USBD_IOERROR; 1890 goto ret; 1891 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1892 break; 1893 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1894 break; 1895 /* Hub requests */ 1896 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1897 break; 1898 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1899 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1900 "port=%d feature=%d\n", 1901 index, value)); 1902 if (index < 1 || index > sc->sc_noport) { 1903 err = USBD_IOERROR; 1904 goto ret; 1905 } 1906 port = OHCI_RH_PORT_STATUS(index); 1907 switch(value) { 1908 case UHF_PORT_ENABLE: 1909 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 1910 break; 1911 case UHF_PORT_SUSPEND: 1912 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 1913 break; 1914 case UHF_PORT_POWER: 1915 OWRITE4(sc, port, UPS_LOW_SPEED); 1916 break; 1917 case UHF_C_PORT_CONNECTION: 1918 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 1919 break; 1920 case UHF_C_PORT_ENABLE: 1921 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 1922 break; 1923 case UHF_C_PORT_SUSPEND: 1924 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 1925 break; 1926 case UHF_C_PORT_OVER_CURRENT: 1927 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 1928 break; 1929 case UHF_C_PORT_RESET: 1930 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 1931 break; 1932 default: 1933 err = USBD_IOERROR; 1934 goto ret; 1935 } 1936 switch(value) { 1937 case UHF_C_PORT_CONNECTION: 1938 case UHF_C_PORT_ENABLE: 1939 case UHF_C_PORT_SUSPEND: 1940 case UHF_C_PORT_OVER_CURRENT: 1941 case UHF_C_PORT_RESET: 1942 /* Enable RHSC interrupt if condition is cleared. */ 1943 if ((OREAD4(sc, port) >> 16) == 0) 1944 ohci_rhsc_able(sc, 1); 1945 break; 1946 default: 1947 break; 1948 } 1949 break; 1950 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1951 if (value != 0) { 1952 err = USBD_IOERROR; 1953 goto ret; 1954 } 1955 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 1956 hubd = ohci_hubd; 1957 hubd.bNbrPorts = sc->sc_noport; 1958 USETW(hubd.wHubCharacteristics, 1959 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 1960 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 1961 /* XXX overcurrent */ 1962 ); 1963 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 1964 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 1965 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1966 hubd.DeviceRemovable[i++] = (u_int8_t)v; 1967 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1968 l = min(len, hubd.bDescLength); 1969 totlen = l; 1970 memcpy(buf, &hubd, l); 1971 break; 1972 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1973 if (len != 4) { 1974 err = USBD_IOERROR; 1975 goto ret; 1976 } 1977 memset(buf, 0, len); /* ? XXX */ 1978 totlen = len; 1979 break; 1980 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1981 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 1982 index)); 1983 if (index < 1 || index > sc->sc_noport) { 1984 err = USBD_IOERROR; 1985 goto ret; 1986 } 1987 if (len != 4) { 1988 err = USBD_IOERROR; 1989 goto ret; 1990 } 1991 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 1992 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 1993 v)); 1994 USETW(ps.wPortStatus, v); 1995 USETW(ps.wPortChange, v >> 16); 1996 l = min(len, sizeof ps); 1997 memcpy(buf, &ps, l); 1998 totlen = l; 1999 break; 2000 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2001 err = USBD_IOERROR; 2002 goto ret; 2003 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2004 break; 2005 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2006 if (index < 1 || index > sc->sc_noport) { 2007 err = USBD_IOERROR; 2008 goto ret; 2009 } 2010 port = OHCI_RH_PORT_STATUS(index); 2011 switch(value) { 2012 case UHF_PORT_ENABLE: 2013 OWRITE4(sc, port, UPS_PORT_ENABLED); 2014 break; 2015 case UHF_PORT_SUSPEND: 2016 OWRITE4(sc, port, UPS_SUSPEND); 2017 break; 2018 case UHF_PORT_RESET: 2019 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2020 index)); 2021 OWRITE4(sc, port, UPS_RESET); 2022 for (i = 0; i < 10; i++) { 2023 usb_delay_ms(&sc->sc_bus, 10); 2024 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2025 break; 2026 } 2027 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2028 index, OREAD4(sc, port))); 2029 break; 2030 case UHF_PORT_POWER: 2031 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2032 "%d\n", index)); 2033 OWRITE4(sc, port, UPS_PORT_POWER); 2034 break; 2035 default: 2036 err = USBD_IOERROR; 2037 goto ret; 2038 } 2039 break; 2040 default: 2041 err = USBD_IOERROR; 2042 goto ret; 2043 } 2044 xfer->actlen = totlen; 2045 err = USBD_NORMAL_COMPLETION; 2046 ret: 2047 xfer->status = err; 2048 s = splusb(); 2049 usb_transfer_complete(xfer); 2050 splx(s); 2051 return (USBD_IN_PROGRESS); 2052 } 2053 2054 /* Abort a root control request. */ 2055 static void 2056 ohci_root_ctrl_abort(xfer) 2057 usbd_xfer_handle xfer; 2058 { 2059 /* Nothing to do, all transfers are synchronous. */ 2060 } 2061 2062 /* Close the root pipe. */ 2063 static void 2064 ohci_root_ctrl_close(pipe) 2065 usbd_pipe_handle pipe; 2066 { 2067 DPRINTF(("ohci_root_ctrl_close\n")); 2068 /* Nothing to do. */ 2069 } 2070 2071 static usbd_status 2072 ohci_root_intr_transfer(xfer) 2073 usbd_xfer_handle xfer; 2074 { 2075 usbd_status err; 2076 2077 /* Insert last in queue. */ 2078 err = usb_insert_transfer(xfer); 2079 if (err) 2080 return (err); 2081 2082 /* Pipe isn't running, start first */ 2083 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2084 } 2085 2086 static usbd_status 2087 ohci_root_intr_start(xfer) 2088 usbd_xfer_handle xfer; 2089 { 2090 usbd_pipe_handle pipe = xfer->pipe; 2091 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2092 2093 sc->sc_intrxfer = xfer; 2094 2095 return (USBD_IN_PROGRESS); 2096 } 2097 2098 /* Abort a root interrupt request. */ 2099 static void 2100 ohci_root_intr_abort(xfer) 2101 usbd_xfer_handle xfer; 2102 { 2103 int s; 2104 2105 if (xfer->pipe->intrxfer == xfer) { 2106 DPRINTF(("ohci_root_intr_abort: remove\n")); 2107 xfer->pipe->intrxfer = NULL; 2108 } 2109 xfer->status = USBD_CANCELLED; 2110 s = splusb(); 2111 usb_transfer_complete(xfer); 2112 splx(s); 2113 } 2114 2115 /* Close the root pipe. */ 2116 static void 2117 ohci_root_intr_close(pipe) 2118 usbd_pipe_handle pipe; 2119 { 2120 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2121 2122 DPRINTF(("ohci_root_intr_close\n")); 2123 2124 sc->sc_intrxfer = NULL; 2125 } 2126 2127 /************************/ 2128 2129 static usbd_status 2130 ohci_device_ctrl_transfer(xfer) 2131 usbd_xfer_handle xfer; 2132 { 2133 usbd_status err; 2134 2135 /* Insert last in queue. */ 2136 err = usb_insert_transfer(xfer); 2137 if (err) 2138 return (err); 2139 2140 /* Pipe isn't running, start first */ 2141 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2142 } 2143 2144 static usbd_status 2145 ohci_device_ctrl_start(xfer) 2146 usbd_xfer_handle xfer; 2147 { 2148 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2149 usbd_status err; 2150 2151 #ifdef DIAGNOSTIC 2152 if (!(xfer->rqflags & URQ_REQUEST)) { 2153 /* XXX panic */ 2154 printf("ohci_device_ctrl_transfer: not a request\n"); 2155 return (USBD_INVAL); 2156 } 2157 #endif 2158 2159 err = ohci_device_request(xfer); 2160 if (err) 2161 return (err); 2162 2163 if (sc->sc_bus.use_polling) 2164 ohci_waitintr(sc, xfer); 2165 return (USBD_IN_PROGRESS); 2166 } 2167 2168 /* Abort a device control request. */ 2169 static void 2170 ohci_device_ctrl_abort(xfer) 2171 usbd_xfer_handle xfer; 2172 { 2173 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2174 ohci_abort_xfer(xfer, USBD_CANCELLED); 2175 } 2176 2177 /* Close a device control pipe. */ 2178 static void 2179 ohci_device_ctrl_close(pipe) 2180 usbd_pipe_handle pipe; 2181 { 2182 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2183 2184 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2185 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2186 } 2187 2188 /************************/ 2189 2190 static void 2191 ohci_device_clear_toggle(pipe) 2192 usbd_pipe_handle pipe; 2193 { 2194 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2195 2196 opipe->sed->ed.ed_tailp &= LE(~OHCI_TOGGLECARRY); 2197 } 2198 2199 static void 2200 ohci_noop(pipe) 2201 usbd_pipe_handle pipe; 2202 { 2203 } 2204 2205 static usbd_status 2206 ohci_device_bulk_transfer(xfer) 2207 usbd_xfer_handle xfer; 2208 { 2209 usbd_status err; 2210 2211 /* Insert last in queue. */ 2212 err = usb_insert_transfer(xfer); 2213 if (err) 2214 return (err); 2215 2216 /* Pipe isn't running, start first */ 2217 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2218 } 2219 2220 static usbd_status 2221 ohci_device_bulk_start(xfer) 2222 usbd_xfer_handle xfer; 2223 { 2224 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2225 usbd_device_handle dev = opipe->pipe.device; 2226 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2227 int addr = dev->address; 2228 ohci_soft_td_t *data, *tail, *tdp; 2229 ohci_soft_ed_t *sed; 2230 int s, len, isread, endpt; 2231 usbd_status err; 2232 2233 #ifdef DIAGNOSTIC 2234 if (xfer->rqflags & URQ_REQUEST) { 2235 /* XXX panic */ 2236 printf("ohci_device_bulk_start: a request\n"); 2237 return (USBD_INVAL); 2238 } 2239 #endif 2240 2241 len = xfer->length; 2242 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2243 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2244 sed = opipe->sed; 2245 2246 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2247 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2248 endpt)); 2249 2250 opipe->u.bulk.isread = isread; 2251 opipe->u.bulk.length = len; 2252 2253 /* Update device address */ 2254 sed->ed.ed_flags = LE( 2255 (LE(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2256 OHCI_ED_SET_FA(addr)); 2257 2258 /* Allocate a chain of new TDs (including a new tail). */ 2259 data = opipe->tail; 2260 err = ohci_alloc_std_chain(opipe, sc, len, isread, 2261 xfer->flags & USBD_SHORT_XFER_OK, 2262 &xfer->dmabuf, data, &tail); 2263 if (err) 2264 return (err); 2265 2266 tail->xfer = NULL; 2267 xfer->hcpriv = data; 2268 2269 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2270 "td_cbp=0x%08x td_be=0x%08x\n", 2271 (int)LE(sed->ed.ed_flags), (int)LE(data->td.td_flags), 2272 (int)LE(data->td.td_cbp), (int)LE(data->td.td_be))); 2273 2274 #ifdef OHCI_DEBUG 2275 if (ohcidebug > 4) { 2276 ohci_dump_ed(sed); 2277 ohci_dump_tds(data); 2278 } 2279 #endif 2280 2281 /* Insert ED in schedule */ 2282 s = splusb(); 2283 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2284 tdp->xfer = xfer; 2285 ohci_hash_add_td(sc, tdp); 2286 } 2287 sed->ed.ed_tailp = LE(tail->physaddr); 2288 opipe->tail = tail; 2289 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); 2290 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2291 if (xfer->timeout && !sc->sc_bus.use_polling) { 2292 usb_timeout(ohci_timeout, xfer, 2293 MS_TO_TICKS(xfer->timeout), xfer->timo_handle); 2294 } 2295 2296 #if 0 2297 /* This goes wrong if we are too slow. */ 2298 if (ohcidebug > 5) { 2299 usb_delay_ms(&sc->sc_bus, 5); 2300 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2301 OREAD4(sc, OHCI_COMMAND_STATUS))); 2302 ohci_dump_ed(sed); 2303 ohci_dump_tds(data); 2304 } 2305 #endif 2306 2307 splx(s); 2308 2309 return (USBD_IN_PROGRESS); 2310 } 2311 2312 static void 2313 ohci_device_bulk_abort(xfer) 2314 usbd_xfer_handle xfer; 2315 { 2316 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2317 ohci_abort_xfer(xfer, USBD_CANCELLED); 2318 } 2319 2320 /* 2321 * Close a device bulk pipe. 2322 */ 2323 static void 2324 ohci_device_bulk_close(pipe) 2325 usbd_pipe_handle pipe; 2326 { 2327 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2328 2329 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2330 ohci_close_pipe(pipe, sc->sc_bulk_head); 2331 } 2332 2333 /************************/ 2334 2335 static usbd_status 2336 ohci_device_intr_transfer(xfer) 2337 usbd_xfer_handle xfer; 2338 { 2339 usbd_status err; 2340 2341 /* Insert last in queue. */ 2342 err = usb_insert_transfer(xfer); 2343 if (err) 2344 return (err); 2345 2346 /* Pipe isn't running, start first */ 2347 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2348 } 2349 2350 static usbd_status 2351 ohci_device_intr_start(xfer) 2352 usbd_xfer_handle xfer; 2353 { 2354 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2355 usbd_device_handle dev = opipe->pipe.device; 2356 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2357 ohci_soft_ed_t *sed = opipe->sed; 2358 ohci_soft_td_t *data, *tail; 2359 int len; 2360 int s; 2361 2362 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2363 "flags=%d priv=%p\n", 2364 xfer, xfer->length, xfer->flags, xfer->priv)); 2365 2366 #ifdef DIAGNOSTIC 2367 if (xfer->rqflags & URQ_REQUEST) 2368 panic("ohci_device_intr_transfer: a request\n"); 2369 #endif 2370 2371 len = xfer->length; 2372 2373 data = opipe->tail; 2374 tail = ohci_alloc_std(sc); 2375 if (tail == NULL) 2376 return (USBD_NOMEM); 2377 tail->xfer = NULL; 2378 2379 data->td.td_flags = LE( 2380 OHCI_TD_IN | OHCI_TD_NOCC | 2381 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2382 if (xfer->flags & USBD_SHORT_XFER_OK) 2383 data->td.td_flags |= LE(OHCI_TD_R); 2384 data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf)); 2385 data->nexttd = tail; 2386 data->td.td_nexttd = LE(tail->physaddr); 2387 data->td.td_be = LE(LE(data->td.td_cbp) + len - 1); 2388 data->len = len; 2389 data->xfer = xfer; 2390 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2391 xfer->hcpriv = data; 2392 2393 #ifdef OHCI_DEBUG 2394 if (ohcidebug > 5) { 2395 DPRINTF(("ohci_device_intr_transfer:\n")); 2396 ohci_dump_ed(sed); 2397 ohci_dump_tds(data); 2398 } 2399 #endif 2400 2401 /* Insert ED in schedule */ 2402 s = splusb(); 2403 ohci_hash_add_td(sc, data); 2404 sed->ed.ed_tailp = LE(tail->physaddr); 2405 opipe->tail = tail; 2406 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); 2407 2408 #if 0 2409 /* 2410 * This goes horribly wrong, printing thousands of descriptors, 2411 * because false references are followed due to the fact that the 2412 * TD is gone. 2413 */ 2414 if (ohcidebug > 5) { 2415 usb_delay_ms(&sc->sc_bus, 5); 2416 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2417 OREAD4(sc, OHCI_COMMAND_STATUS))); 2418 ohci_dump_ed(sed); 2419 ohci_dump_tds(data); 2420 } 2421 #endif 2422 splx(s); 2423 2424 return (USBD_IN_PROGRESS); 2425 } 2426 2427 /* Abort a device control request. */ 2428 static void 2429 ohci_device_intr_abort(xfer) 2430 usbd_xfer_handle xfer; 2431 { 2432 if (xfer->pipe->intrxfer == xfer) { 2433 DPRINTF(("ohci_device_intr_abort: remove\n")); 2434 xfer->pipe->intrxfer = NULL; 2435 } 2436 ohci_abort_xfer(xfer, USBD_CANCELLED); 2437 } 2438 2439 /* Close a device interrupt pipe. */ 2440 static void 2441 ohci_device_intr_close(pipe) 2442 usbd_pipe_handle pipe; 2443 { 2444 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2445 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2446 int nslots = opipe->u.intr.nslots; 2447 int pos = opipe->u.intr.pos; 2448 int j; 2449 ohci_soft_ed_t *p, *sed = opipe->sed; 2450 int s; 2451 2452 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2453 pipe, nslots, pos)); 2454 s = splusb(); 2455 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 2456 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 2457 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) 2458 usb_delay_ms(&sc->sc_bus, 2); 2459 2460 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2461 ; 2462 #ifdef DIAGNOSTIC 2463 if (p == NULL) 2464 panic("ohci_device_intr_close: ED not found\n"); 2465 #endif 2466 p->next = sed->next; 2467 p->ed.ed_nexted = sed->ed.ed_nexted; 2468 splx(s); 2469 2470 for (j = 0; j < nslots; j++) 2471 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2472 2473 ohci_free_std(sc, opipe->tail); 2474 ohci_free_sed(sc, opipe->sed); 2475 } 2476 2477 static usbd_status 2478 ohci_device_setintr(sc, opipe, ival) 2479 ohci_softc_t *sc; 2480 struct ohci_pipe *opipe; 2481 int ival; 2482 { 2483 int i, j, s, best; 2484 u_int npoll, slow, shigh, nslots; 2485 u_int bestbw, bw; 2486 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2487 2488 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2489 if (ival == 0) { 2490 printf("ohci_setintr: 0 interval\n"); 2491 return (USBD_INVAL); 2492 } 2493 2494 npoll = OHCI_NO_INTRS; 2495 while (npoll > ival) 2496 npoll /= 2; 2497 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2498 2499 /* 2500 * We now know which level in the tree the ED must go into. 2501 * Figure out which slot has most bandwidth left over. 2502 * Slots to examine: 2503 * npoll 2504 * 1 0 2505 * 2 1 2 2506 * 4 3 4 5 6 2507 * 8 7 8 9 10 11 12 13 14 2508 * N (N-1) .. (N-1+N-1) 2509 */ 2510 slow = npoll-1; 2511 shigh = slow + npoll; 2512 nslots = OHCI_NO_INTRS / npoll; 2513 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2514 bw = 0; 2515 for (j = 0; j < nslots; j++) 2516 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 2517 if (bw < bestbw) { 2518 best = i; 2519 bestbw = bw; 2520 } 2521 } 2522 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2523 best, slow, shigh, bestbw)); 2524 2525 s = splusb(); 2526 hsed = sc->sc_eds[best]; 2527 sed->next = hsed->next; 2528 sed->ed.ed_nexted = hsed->ed.ed_nexted; 2529 hsed->next = sed; 2530 hsed->ed.ed_nexted = LE(sed->physaddr); 2531 splx(s); 2532 2533 for (j = 0; j < nslots; j++) 2534 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 2535 opipe->u.intr.nslots = nslots; 2536 opipe->u.intr.pos = best; 2537 2538 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 2539 return (USBD_NORMAL_COMPLETION); 2540 } 2541
Indexes created Tue Sep 23 07:09:52 GMT 2025