ohci.c revision 1.58
1 /* $NetBSD: ohci.c,v 1.58 1999/12/06 21:06:59 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (augustss (at) carlstedt.se) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe 45 * USB spec: http://www.usb.org/developers/data/usb11.pdf 46 */ 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/kernel.h> 53 #include <sys/device.h> 54 #include <sys/select.h> 55 #elif defined(__FreeBSD__) 56 #include <sys/module.h> 57 #include <sys/bus.h> 58 #include <machine/bus_pio.h> 59 #include <machine/bus_memio.h> 60 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 61 #include <machine/cpu.h> 62 #endif 63 #endif 64 #include <sys/proc.h> 65 #include <sys/queue.h> 66 67 #include <machine/bus.h> 68 #include <machine/endian.h> 69 70 #include <dev/usb/usb.h> 71 #include <dev/usb/usbdi.h> 72 #include <dev/usb/usbdivar.h> 73 #include <dev/usb/usb_mem.h> 74 #include <dev/usb/usb_quirks.h> 75 76 #include <dev/usb/ohcireg.h> 77 #include <dev/usb/ohcivar.h> 78 79 #if defined(__FreeBSD__) 80 #include <machine/clock.h> 81 82 #define delay(d) DELAY(d) 83 #endif 84 85 #if defined(__OpenBSD__) 86 struct cfdriver ohci_cd = { 87 NULL, "ohci", DV_DULL 88 }; 89 #endif 90 91 #ifdef OHCI_DEBUG 92 #define DPRINTF(x) if (ohcidebug) logprintf x 93 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 94 int ohcidebug = 0; 95 #else 96 #define DPRINTF(x) 97 #define DPRINTFN(n,x) 98 #endif 99 100 /* 101 * The OHCI controller is little endian, so on big endian machines 102 * the data strored in memory needs to be swapped. 103 */ 104 #if BYTE_ORDER == BIG_ENDIAN 105 #define LE(x) (bswap32(x)) 106 #else 107 #define LE(x) (x) 108 #endif 109 110 struct ohci_pipe; 111 112 static ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *)); 113 static void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *)); 114 115 static ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *)); 116 static void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *)); 117 118 #if 0 119 static void ohci_free_std_chain __P((ohci_softc_t *, 120 ohci_soft_td_t *, ohci_soft_td_t *)); 121 #endif 122 static usbd_status ohci_alloc_std_chain __P((struct ohci_pipe *, 123 ohci_softc_t *, int, int, int, usb_dma_t *, 124 ohci_soft_td_t *, ohci_soft_td_t **)); 125 126 static void ohci_power __P((int, void *)); 127 static usbd_status ohci_open __P((usbd_pipe_handle)); 128 static void ohci_poll __P((struct usbd_bus *)); 129 static void ohci_waitintr __P((ohci_softc_t *, 130 usbd_xfer_handle)); 131 static void ohci_rhsc __P((ohci_softc_t *, usbd_xfer_handle)); 132 static void ohci_process_done __P((ohci_softc_t *, 133 ohci_physaddr_t)); 134 135 static usbd_status ohci_device_request __P((usbd_xfer_handle xfer)); 136 static void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 137 static void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 138 static void ohci_hash_add_td __P((ohci_softc_t *, 139 ohci_soft_td_t *)); 140 static void ohci_hash_rem_td __P((ohci_softc_t *, 141 ohci_soft_td_t *)); 142 static ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, 143 ohci_physaddr_t)); 144 145 static usbd_status ohci_allocm __P((struct usbd_bus *, usb_dma_t *, 146 u_int32_t)); 147 static void ohci_freem __P((struct usbd_bus *, usb_dma_t *)); 148 149 static usbd_status ohci_root_ctrl_transfer __P((usbd_xfer_handle)); 150 static usbd_status ohci_root_ctrl_start __P((usbd_xfer_handle)); 151 static void ohci_root_ctrl_abort __P((usbd_xfer_handle)); 152 static void ohci_root_ctrl_close __P((usbd_pipe_handle)); 153 154 static usbd_status ohci_root_intr_transfer __P((usbd_xfer_handle)); 155 static usbd_status ohci_root_intr_start __P((usbd_xfer_handle)); 156 static void ohci_root_intr_abort __P((usbd_xfer_handle)); 157 static void ohci_root_intr_close __P((usbd_pipe_handle)); 158 static void ohci_root_intr_done __P((usbd_xfer_handle)); 159 160 static usbd_status ohci_device_ctrl_transfer __P((usbd_xfer_handle)); 161 static usbd_status ohci_device_ctrl_start __P((usbd_xfer_handle)); 162 static void ohci_device_ctrl_abort __P((usbd_xfer_handle)); 163 static void ohci_device_ctrl_close __P((usbd_pipe_handle)); 164 static void ohci_device_ctrl_done __P((usbd_xfer_handle)); 165 166 static usbd_status ohci_device_bulk_transfer __P((usbd_xfer_handle)); 167 static usbd_status ohci_device_bulk_start __P((usbd_xfer_handle)); 168 static void ohci_device_bulk_abort __P((usbd_xfer_handle)); 169 static void ohci_device_bulk_close __P((usbd_pipe_handle)); 170 static void ohci_device_bulk_done __P((usbd_xfer_handle)); 171 172 static usbd_status ohci_device_intr_transfer __P((usbd_xfer_handle)); 173 static usbd_status ohci_device_intr_start __P((usbd_xfer_handle)); 174 static void ohci_device_intr_abort __P((usbd_xfer_handle)); 175 static void ohci_device_intr_close __P((usbd_pipe_handle)); 176 static void ohci_device_intr_done __P((usbd_xfer_handle)); 177 178 #if 0 179 static usbd_status ohci_device_isoc_transfer __P((usbd_xfer_handle)); 180 static usbd_status ohci_device_isoc_start __P((usbd_xfer_handle)); 181 static void ohci_device_isoc_abort __P((usbd_xfer_handle)); 182 static void ohci_device_isoc_close __P((usbd_pipe_handle)); 183 static void ohci_device_isoc_done __P((usbd_xfer_handle)); 184 #endif 185 186 static usbd_status ohci_device_setintr __P((ohci_softc_t *sc, 187 struct ohci_pipe *pipe, int ival)); 188 189 static int ohci_str __P((usb_string_descriptor_t *, int, char *)); 190 191 static void ohci_timeout __P((void *)); 192 static void ohci_rhsc_able __P((ohci_softc_t *, int)); 193 194 static void ohci_close_pipe __P((usbd_pipe_handle pipe, 195 ohci_soft_ed_t *head)); 196 static void ohci_abort_xfer __P((usbd_xfer_handle xfer, 197 usbd_status status)); 198 static void ohci_abort_xfer_end __P((void *)); 199 200 static void ohci_device_clear_toggle __P((usbd_pipe_handle pipe)); 201 static void ohci_noop __P((usbd_pipe_handle pipe)); 202 203 #ifdef OHCI_DEBUG 204 static void ohci_dumpregs __P((ohci_softc_t *)); 205 static void ohci_dump_tds __P((ohci_soft_td_t *)); 206 static void ohci_dump_td __P((ohci_soft_td_t *)); 207 static void ohci_dump_ed __P((ohci_soft_ed_t *)); 208 #endif 209 210 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 211 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 212 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 213 214 /* Reverse the bits in a value 0 .. 31 */ 215 static u_int8_t revbits[OHCI_NO_INTRS] = 216 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 217 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 218 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 219 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 220 221 struct ohci_pipe { 222 struct usbd_pipe pipe; 223 ohci_soft_ed_t *sed; 224 ohci_soft_td_t *tail; 225 /* Info needed for different pipe kinds. */ 226 union { 227 /* Control pipe */ 228 struct { 229 usb_dma_t reqdma; 230 u_int length; 231 ohci_soft_td_t *setup, *data, *stat; 232 } ctl; 233 /* Interrupt pipe */ 234 struct { 235 int nslots; 236 int pos; 237 } intr; 238 /* Bulk pipe */ 239 struct { 240 u_int length; 241 int isread; 242 } bulk; 243 /* Iso pipe */ 244 struct iso { 245 int xxxxx; 246 } iso; 247 } u; 248 }; 249 250 #define OHCI_INTR_ENDPT 1 251 252 static struct usbd_bus_methods ohci_bus_methods = { 253 ohci_open, 254 ohci_poll, 255 ohci_allocm, 256 ohci_freem, 257 }; 258 259 static struct usbd_pipe_methods ohci_root_ctrl_methods = { 260 ohci_root_ctrl_transfer, 261 ohci_root_ctrl_start, 262 ohci_root_ctrl_abort, 263 ohci_root_ctrl_close, 264 ohci_noop, 265 0, 266 }; 267 268 static struct usbd_pipe_methods ohci_root_intr_methods = { 269 ohci_root_intr_transfer, 270 ohci_root_intr_start, 271 ohci_root_intr_abort, 272 ohci_root_intr_close, 273 ohci_noop, 274 ohci_root_intr_done, 275 }; 276 277 static struct usbd_pipe_methods ohci_device_ctrl_methods = { 278 ohci_device_ctrl_transfer, 279 ohci_device_ctrl_start, 280 ohci_device_ctrl_abort, 281 ohci_device_ctrl_close, 282 ohci_noop, 283 ohci_device_ctrl_done, 284 }; 285 286 static struct usbd_pipe_methods ohci_device_intr_methods = { 287 ohci_device_intr_transfer, 288 ohci_device_intr_start, 289 ohci_device_intr_abort, 290 ohci_device_intr_close, 291 ohci_device_clear_toggle, 292 ohci_device_intr_done, 293 }; 294 295 static struct usbd_pipe_methods ohci_device_bulk_methods = { 296 ohci_device_bulk_transfer, 297 ohci_device_bulk_start, 298 ohci_device_bulk_abort, 299 ohci_device_bulk_close, 300 ohci_device_clear_toggle, 301 ohci_device_bulk_done, 302 }; 303 304 #if 0 305 static struct usbd_pipe_methods ohci_device_isoc_methods = { 306 ohci_device_isoc_transfer, 307 ohci_device_isoc_start, 308 ohci_device_isoc_abort, 309 ohci_device_isoc_close, 310 ohci_noop, 311 ohci_device_isoc_done, 312 }; 313 #endif 314 315 #if defined(__NetBSD__) || defined(__OpenBSD__) 316 int 317 ohci_activate(self, act) 318 device_ptr_t self; 319 enum devact act; 320 { 321 struct ohci_softc *sc = (struct ohci_softc *)self; 322 int rv = 0; 323 324 switch (act) { 325 case DVACT_ACTIVATE: 326 return (EOPNOTSUPP); 327 break; 328 329 case DVACT_DEACTIVATE: 330 if (sc->sc_child != NULL) 331 rv = config_deactivate(sc->sc_child); 332 break; 333 } 334 return (rv); 335 } 336 337 int 338 ohci_detach(sc, flags) 339 struct ohci_softc *sc; 340 int flags; 341 { 342 int rv = 0; 343 344 if (sc->sc_child != NULL) 345 rv = config_detach(sc->sc_child, flags); 346 347 if (rv != 0) 348 return (rv); 349 350 powerhook_disestablish(sc->sc_powerhook); 351 /* free data structures XXX */ 352 353 return (rv); 354 } 355 #endif 356 357 ohci_soft_ed_t * 358 ohci_alloc_sed(sc) 359 ohci_softc_t *sc; 360 { 361 ohci_soft_ed_t *sed; 362 usbd_status err; 363 int i, offs; 364 usb_dma_t dma; 365 366 if (sc->sc_freeeds == NULL) { 367 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 368 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 369 OHCI_ED_ALIGN, &dma); 370 if (err) 371 return (0); 372 for(i = 0; i < OHCI_SED_CHUNK; i++) { 373 offs = i * OHCI_SED_SIZE; 374 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 375 sed->physaddr = DMAADDR(&dma) + offs; 376 sed->next = sc->sc_freeeds; 377 sc->sc_freeeds = sed; 378 } 379 } 380 sed = sc->sc_freeeds; 381 sc->sc_freeeds = sed->next; 382 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 383 sed->next = 0; 384 return (sed); 385 } 386 387 void 388 ohci_free_sed(sc, sed) 389 ohci_softc_t *sc; 390 ohci_soft_ed_t *sed; 391 { 392 sed->next = sc->sc_freeeds; 393 sc->sc_freeeds = sed; 394 } 395 396 ohci_soft_td_t * 397 ohci_alloc_std(sc) 398 ohci_softc_t *sc; 399 { 400 ohci_soft_td_t *std; 401 usbd_status err; 402 int i, offs; 403 usb_dma_t dma; 404 405 if (sc->sc_freetds == NULL) { 406 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 407 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 408 OHCI_TD_ALIGN, &dma); 409 if (err) 410 return (0); 411 for(i = 0; i < OHCI_STD_CHUNK; i++) { 412 offs = i * OHCI_STD_SIZE; 413 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 414 std->physaddr = DMAADDR(&dma) + offs; 415 std->nexttd = sc->sc_freetds; 416 sc->sc_freetds = std; 417 } 418 } 419 std = sc->sc_freetds; 420 sc->sc_freetds = std->nexttd; 421 memset(&std->td, 0, sizeof(ohci_td_t)); 422 std->nexttd = 0; 423 return (std); 424 } 425 426 void 427 ohci_free_std(sc, std) 428 ohci_softc_t *sc; 429 ohci_soft_td_t *std; 430 { 431 std->nexttd = sc->sc_freetds; 432 sc->sc_freetds = std; 433 } 434 435 usbd_status 436 ohci_alloc_std_chain(upipe, sc, len, rd, shortok, dma, sp, ep) 437 struct ohci_pipe *upipe; 438 ohci_softc_t *sc; 439 int len, rd, shortok; 440 usb_dma_t *dma; 441 ohci_soft_td_t *sp, **ep; 442 { 443 ohci_soft_td_t *next, *cur; 444 ohci_physaddr_t dataphys, dataphysend; 445 u_int32_t intr; 446 int curlen; 447 448 DPRINTFN(len < 4096,("ohci_alloc_std_chain: start len=%d\n", len)); 449 cur = sp; 450 dataphys = DMAADDR(dma); 451 dataphysend = OHCI_PAGE(dataphys + len - 1); 452 for (;;) { 453 next = ohci_alloc_std(sc); 454 if (next == 0) { 455 /* XXX free chain */ 456 return (USBD_NOMEM); 457 } 458 459 /* The OHCI hardware can handle at most one page crossing. */ 460 if (OHCI_PAGE(dataphys) == dataphysend || 461 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 462 /* we can handle it in this TD */ 463 curlen = len; 464 } else { 465 /* must use multiple TDs, fill as much as possible. */ 466 curlen = 2 * OHCI_PAGE_SIZE - 467 (dataphys & (OHCI_PAGE_SIZE-1)); 468 } 469 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 470 "dataphysend=0x%08x len=%d curlen=%d\n", 471 dataphys, dataphysend, 472 len, curlen)); 473 len -= curlen; 474 475 intr = len == 0 ? OHCI_TD_SET_DI(1) : OHCI_TD_NOINTR; 476 cur->td.td_flags = LE( 477 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 478 intr | OHCI_TD_TOGGLE_CARRY | 479 (shortok ? OHCI_TD_R : 0)); 480 cur->td.td_cbp = LE(dataphys); 481 cur->nexttd = next; 482 cur->td.td_nexttd = LE(next->physaddr); 483 cur->td.td_be = LE(dataphys + curlen - 1); 484 cur->len = curlen; 485 cur->flags = OHCI_ADD_LEN; 486 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 487 dataphys, dataphys + curlen - 1)); 488 if (len == 0) 489 break; 490 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 491 dataphys += curlen; 492 cur = next; 493 } 494 cur->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 495 *ep = next; 496 497 return (USBD_NORMAL_COMPLETION); 498 } 499 500 #if 0 501 static void 502 ohci_free_std_chain(sc, std, stdend) 503 ohci_softc_t *sc; 504 ohci_soft_td_t *std; 505 ohci_soft_td_t *stdend; 506 { 507 ohci_soft_td_t *p; 508 509 for (; std != stdend; std = p) { 510 p = std->nexttd; 511 ohci_free_std(sc, std); 512 } 513 } 514 #endif 515 516 usbd_status 517 ohci_init(sc) 518 ohci_softc_t *sc; 519 { 520 ohci_soft_ed_t *sed, *psed; 521 usbd_status err; 522 int rev; 523 int i; 524 u_int32_t s, ctl, ival, hcr, fm, per; 525 526 DPRINTF(("ohci_init: start\n")); 527 #if defined(__OpenBSD__) 528 printf(","); 529 #else 530 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 531 #endif 532 rev = OREAD4(sc, OHCI_REVISION); 533 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 534 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 535 536 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 537 printf("%s: unsupported OHCI revision\n", 538 USBDEVNAME(sc->sc_bus.bdev)); 539 sc->sc_bus.usbrev = USBREV_UNKNOWN; 540 return (USBD_INVAL); 541 } 542 sc->sc_bus.usbrev = USBREV_1_0; 543 544 for (i = 0; i < OHCI_HASH_SIZE; i++) 545 LIST_INIT(&sc->sc_hash_tds[i]); 546 547 /* Allocate the HCCA area. */ 548 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 549 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 550 if (err) 551 return (err); 552 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 553 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 554 555 sc->sc_eintrs = OHCI_NORMAL_INTRS; 556 557 sc->sc_ctrl_head = ohci_alloc_sed(sc); 558 if (sc->sc_ctrl_head == NULL) { 559 err = USBD_NOMEM; 560 goto bad1; 561 } 562 sc->sc_ctrl_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 563 564 sc->sc_bulk_head = ohci_alloc_sed(sc); 565 if (sc->sc_bulk_head == NULL) { 566 err = USBD_NOMEM; 567 goto bad2; 568 } 569 sc->sc_bulk_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 570 571 /* Allocate all the dummy EDs that make up the interrupt tree. */ 572 for (i = 0; i < OHCI_NO_EDS; i++) { 573 sed = ohci_alloc_sed(sc); 574 if (sed == NULL) { 575 while (--i >= 0) 576 ohci_free_sed(sc, sc->sc_eds[i]); 577 err = USBD_NOMEM; 578 goto bad3; 579 } 580 /* All ED fields are set to 0. */ 581 sc->sc_eds[i] = sed; 582 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 583 if (i != 0) { 584 psed = sc->sc_eds[(i-1) / 2]; 585 sed->next = psed; 586 sed->ed.ed_nexted = LE(psed->physaddr); 587 } 588 } 589 /* 590 * Fill HCCA interrupt table. The bit reversal is to get 591 * the tree set up properly to spread the interrupts. 592 */ 593 for (i = 0; i < OHCI_NO_INTRS; i++) 594 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 595 LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 596 597 /* Determine in what context we are running. */ 598 ctl = OREAD4(sc, OHCI_CONTROL); 599 if (ctl & OHCI_IR) { 600 /* SMM active, request change */ 601 DPRINTF(("ohci_init: SMM active, request owner change\n")); 602 s = OREAD4(sc, OHCI_COMMAND_STATUS); 603 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 604 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 605 usb_delay_ms(&sc->sc_bus, 1); 606 ctl = OREAD4(sc, OHCI_CONTROL); 607 } 608 if ((ctl & OHCI_IR) == 0) { 609 printf("%s: SMM does not respond, resetting\n", 610 USBDEVNAME(sc->sc_bus.bdev)); 611 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 612 goto reset; 613 } 614 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 615 /* BIOS started controller. */ 616 DPRINTF(("ohci_init: BIOS active\n")); 617 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 618 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 619 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 620 } 621 } else { 622 DPRINTF(("ohci_init: cold started\n")); 623 reset: 624 /* Controller was cold started. */ 625 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 626 } 627 628 /* 629 * This reset should not be necessary according to the OHCI spec, but 630 * without it some controllers do not start. 631 */ 632 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 633 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 634 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 635 636 /* We now own the host controller and the bus has been reset. */ 637 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 638 639 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 640 /* Nominal time for a reset is 10 us. */ 641 for (i = 0; i < 10; i++) { 642 delay(10); 643 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 644 if (!hcr) 645 break; 646 } 647 if (hcr) { 648 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 649 err = USBD_IOERROR; 650 goto bad3; 651 } 652 #ifdef OHCI_DEBUG 653 if (ohcidebug > 15) 654 ohci_dumpregs(sc); 655 #endif 656 657 /* The controller is now in suspend state, we have 2ms to finish. */ 658 659 /* Set up HC registers. */ 660 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 661 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 662 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 663 /* disable all interrupts and then switch on all desired interrupts */ 664 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 665 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 666 /* switch on desired functional features */ 667 ctl = OREAD4(sc, OHCI_CONTROL); 668 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 669 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 670 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 671 /* And finally start it! */ 672 OWRITE4(sc, OHCI_CONTROL, ctl); 673 674 /* 675 * The controller is now OPERATIONAL. Set a some final 676 * registers that should be set earlier, but that the 677 * controller ignores when in the SUSPEND state. 678 */ 679 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 680 fm |= OHCI_FSMPS(ival) | ival; 681 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 682 per = OHCI_PERIODIC(ival); /* 90% periodic */ 683 OWRITE4(sc, OHCI_PERIODIC_START, per); 684 685 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 686 687 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 688 689 #ifdef OHCI_DEBUG 690 if (ohcidebug > 5) 691 ohci_dumpregs(sc); 692 #endif 693 694 /* Set up the bus struct. */ 695 sc->sc_bus.methods = &ohci_bus_methods; 696 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 697 698 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 699 700 return (USBD_NORMAL_COMPLETION); 701 702 bad3: 703 ohci_free_sed(sc, sc->sc_ctrl_head); 704 bad2: 705 ohci_free_sed(sc, sc->sc_bulk_head); 706 bad1: 707 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 708 return (err); 709 } 710 711 usbd_status 712 ohci_allocm(bus, dma, size) 713 struct usbd_bus *bus; 714 usb_dma_t *dma; 715 u_int32_t size; 716 { 717 #if defined(__NetBSD__) || defined(__OpenBSD__) 718 struct ohci_softc *sc = (struct ohci_softc *)bus; 719 #endif 720 721 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 722 } 723 724 void 725 ohci_freem(bus, dma) 726 struct usbd_bus *bus; 727 usb_dma_t *dma; 728 { 729 #if defined(__NetBSD__) || defined(__OpenBSD__) 730 struct ohci_softc *sc = (struct ohci_softc *)bus; 731 #endif 732 733 usb_freemem(&sc->sc_bus, dma); 734 } 735 736 #if defined(__NetBSD__) 737 void 738 ohci_power(why, v) 739 int why; 740 void *v; 741 { 742 #ifdef OHCI_DEBUG 743 ohci_softc_t *sc = v; 744 745 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 746 /* XXX should suspend/resume */ 747 ohci_dumpregs(sc); 748 #endif 749 } 750 #endif /* defined(__NetBSD__) */ 751 752 #ifdef OHCI_DEBUG 753 void 754 ohci_dumpregs(sc) 755 ohci_softc_t *sc; 756 { 757 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 758 OREAD4(sc, OHCI_REVISION), 759 OREAD4(sc, OHCI_CONTROL), 760 OREAD4(sc, OHCI_COMMAND_STATUS))); 761 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 762 OREAD4(sc, OHCI_INTERRUPT_STATUS), 763 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 764 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 765 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 766 OREAD4(sc, OHCI_HCCA), 767 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 768 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 769 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 770 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 771 OREAD4(sc, OHCI_BULK_HEAD_ED), 772 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 773 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 774 OREAD4(sc, OHCI_DONE_HEAD), 775 OREAD4(sc, OHCI_FM_INTERVAL), 776 OREAD4(sc, OHCI_FM_REMAINING))); 777 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 778 OREAD4(sc, OHCI_FM_NUMBER), 779 OREAD4(sc, OHCI_PERIODIC_START), 780 OREAD4(sc, OHCI_LS_THRESHOLD))); 781 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 782 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 783 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 784 OREAD4(sc, OHCI_RH_STATUS))); 785 DPRINTF((" port1=0x%08x port2=0x%08x\n", 786 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 787 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 788 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 789 LE(sc->sc_hcca->hcca_frame_number), 790 LE(sc->sc_hcca->hcca_done_head))); 791 } 792 #endif 793 794 static int ohci_intr1 __P((ohci_softc_t *)); 795 796 int 797 ohci_intr(p) 798 void *p; 799 { 800 ohci_softc_t *sc = p; 801 802 /* If we get an interrupt while polling, then just ignore it. */ 803 if (sc->sc_bus.use_polling) { 804 #ifdef DIAGNOSTIC 805 printf("ohci_intr: ignored interrupt while polling\n"); 806 #endif 807 return (0); 808 } 809 810 return (ohci_intr1(sc)); 811 } 812 813 static int 814 ohci_intr1(sc) 815 ohci_softc_t *sc; 816 { 817 u_int32_t intrs, eintrs; 818 ohci_physaddr_t done; 819 820 /* In case the interrupt occurs before initialization has completed. */ 821 if (sc == NULL || sc->sc_hcca == NULL) { 822 #ifdef DIAGNOSTIC 823 printf("ohci_intr: sc->sc_hcca == NULL\n"); 824 #endif 825 return (0); 826 } 827 828 intrs = 0; 829 done = LE(sc->sc_hcca->hcca_done_head); 830 if (done != 0) { 831 sc->sc_hcca->hcca_done_head = 0; 832 if (done & ~OHCI_DONE_INTRS) 833 intrs = OHCI_WDH; 834 if (done & OHCI_DONE_INTRS) 835 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 836 } else 837 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 838 839 if (!intrs) 840 return (0); 841 842 intrs &= ~OHCI_MIE; 843 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 844 eintrs = intrs & sc->sc_eintrs; 845 if (!eintrs) 846 return (0); 847 848 sc->sc_bus.intr_context++; 849 sc->sc_bus.no_intrs++; 850 DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n", 851 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 852 (u_int)eintrs)); 853 854 if (eintrs & OHCI_SO) { 855 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev)); 856 /* XXX do what */ 857 intrs &= ~OHCI_SO; 858 } 859 if (eintrs & OHCI_WDH) { 860 ohci_process_done(sc, done &~ OHCI_DONE_INTRS); 861 intrs &= ~OHCI_WDH; 862 } 863 if (eintrs & OHCI_RD) { 864 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 865 /* XXX process resume detect */ 866 } 867 if (eintrs & OHCI_UE) { 868 printf("%s: unrecoverable error, controller halted\n", 869 USBDEVNAME(sc->sc_bus.bdev)); 870 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 871 /* XXX what else */ 872 } 873 if (eintrs & OHCI_RHSC) { 874 ohci_rhsc(sc, sc->sc_intrxfer); 875 intrs &= ~OHCI_RHSC; 876 877 /* 878 * Disable RHSC interrupt for now, because it will be 879 * on until the port has been reset. 880 */ 881 ohci_rhsc_able(sc, 0); 882 } 883 884 sc->sc_bus.intr_context--; 885 886 /* Block unprocessed interrupts. XXX */ 887 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 888 sc->sc_eintrs &= ~intrs; 889 890 return (1); 891 } 892 893 void 894 ohci_rhsc_able(sc, on) 895 ohci_softc_t *sc; 896 int on; 897 { 898 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 899 if (on) { 900 sc->sc_eintrs |= OHCI_RHSC; 901 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 902 } else { 903 sc->sc_eintrs &= ~OHCI_RHSC; 904 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 905 } 906 } 907 908 #ifdef OHCI_DEBUG 909 char *ohci_cc_strs[] = { 910 "NO_ERROR", 911 "CRC", 912 "BIT_STUFFING", 913 "DATA_TOGGLE_MISMATCH", 914 "STALL", 915 "DEVICE_NOT_RESPONDING", 916 "PID_CHECK_FAILURE", 917 "UNEXPECTED_PID", 918 "DATA_OVERRUN", 919 "DATA_UNDERRUN", 920 "BUFFER_OVERRUN", 921 "BUFFER_UNDERRUN", 922 "NOT_ACCESSED", 923 }; 924 #endif 925 926 void 927 ohci_process_done(sc, done) 928 ohci_softc_t *sc; 929 ohci_physaddr_t done; 930 { 931 ohci_soft_td_t *std, *sdone, *stdnext; 932 usbd_xfer_handle xfer; 933 int len, cc; 934 935 DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done)); 936 937 /* Reverse the done list. */ 938 for (sdone = 0; done; done = LE(std->td.td_nexttd)) { 939 std = ohci_hash_find_td(sc, done); 940 std->dnext = sdone; 941 sdone = std; 942 } 943 944 #ifdef OHCI_DEBUG 945 if (ohcidebug > 10) { 946 DPRINTF(("ohci_process_done: TD done:\n")); 947 ohci_dump_tds(sdone); 948 } 949 #endif 950 951 for (std = sdone; std; std = stdnext) { 952 xfer = std->xfer; 953 stdnext = std->dnext; 954 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 955 std, xfer, xfer->hcpriv)); 956 cc = OHCI_TD_GET_CC(LE(std->td.td_flags)); 957 usb_untimeout(ohci_timeout, xfer, xfer->timo_handle); 958 if (xfer->status == USBD_CANCELLED || 959 xfer->status == USBD_TIMEOUT) { 960 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 961 xfer)); 962 /* Handled by abort routine. */ 963 } else if (cc == OHCI_CC_NO_ERROR) { 964 len = std->len; 965 if (std->td.td_cbp != 0) 966 len -= LE(std->td.td_be) - 967 LE(std->td.td_cbp) + 1; 968 if (std->flags & OHCI_ADD_LEN) 969 xfer->actlen += len; 970 if (std->flags & OHCI_CALL_DONE) { 971 xfer->status = USBD_NORMAL_COMPLETION; 972 usb_transfer_complete(xfer); 973 } 974 ohci_hash_rem_td(sc, std); 975 ohci_free_std(sc, std); 976 } else { 977 /* 978 * Endpoint is halted. First unlink all the TDs 979 * belonging to the failed transfer, and then restart 980 * the endpoint. 981 */ 982 ohci_soft_td_t *p, *n; 983 struct ohci_pipe *opipe = 984 (struct ohci_pipe *)xfer->pipe; 985 986 DPRINTF(("ohci_process_done: error cc=%d (%s)\n", 987 OHCI_TD_GET_CC(LE(std->td.td_flags)), 988 ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td.td_flags))])); 989 990 /* remove TDs */ 991 for (p = std; p->xfer == xfer; p = n) { 992 n = p->nexttd; 993 ohci_hash_rem_td(sc, p); 994 ohci_free_std(sc, p); 995 } 996 997 /* clear halt */ 998 opipe->sed->ed.ed_headp = LE(p->physaddr); 999 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1000 1001 if (cc == OHCI_CC_STALL) 1002 xfer->status = USBD_STALLED; 1003 else 1004 xfer->status = USBD_IOERROR; 1005 usb_transfer_complete(xfer); 1006 } 1007 } 1008 } 1009 1010 void 1011 ohci_device_ctrl_done(xfer) 1012 usbd_xfer_handle xfer; 1013 { 1014 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1015 1016 #ifdef DIAGNOSTIC 1017 if (!(xfer->rqflags & URQ_REQUEST)) { 1018 panic("ohci_ctrl_done: not a request\n"); 1019 } 1020 #endif 1021 xfer->hcpriv = NULL; 1022 } 1023 1024 void 1025 ohci_device_intr_done(xfer) 1026 usbd_xfer_handle xfer; 1027 { 1028 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1029 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1030 ohci_soft_ed_t *sed = opipe->sed; 1031 ohci_soft_td_t *data, *tail; 1032 1033 1034 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1035 xfer, xfer->actlen)); 1036 1037 xfer->hcpriv = NULL; 1038 1039 if (xfer->pipe->repeat) { 1040 data = opipe->tail; 1041 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1042 if (tail == NULL) { 1043 xfer->status = USBD_NOMEM; 1044 return; 1045 } 1046 tail->xfer = NULL; 1047 1048 data->td.td_flags = LE( 1049 OHCI_TD_IN | OHCI_TD_NOCC | 1050 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1051 if (xfer->flags & USBD_SHORT_XFER_OK) 1052 data->td.td_flags |= LE(OHCI_TD_R); 1053 data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf)); 1054 data->nexttd = tail; 1055 data->td.td_nexttd = LE(tail->physaddr); 1056 data->td.td_be = LE(LE(data->td.td_cbp) + xfer->length - 1); 1057 data->len = xfer->length; 1058 data->xfer = xfer; 1059 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1060 xfer->hcpriv = data; 1061 xfer->actlen = 0; 1062 1063 ohci_hash_add_td(sc, data); 1064 sed->ed.ed_tailp = LE(tail->physaddr); 1065 opipe->tail = tail; 1066 } 1067 } 1068 1069 void 1070 ohci_device_bulk_done(xfer) 1071 usbd_xfer_handle xfer; 1072 { 1073 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1074 xfer, xfer->actlen)); 1075 1076 xfer->hcpriv = NULL; 1077 } 1078 1079 void 1080 ohci_rhsc(sc, xfer) 1081 ohci_softc_t *sc; 1082 usbd_xfer_handle xfer; 1083 { 1084 usbd_pipe_handle pipe; 1085 struct ohci_pipe *opipe; 1086 u_char *p; 1087 int i, m; 1088 int hstatus; 1089 1090 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1091 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1092 sc, xfer, hstatus)); 1093 1094 if (xfer == NULL) { 1095 /* Just ignore the change. */ 1096 return; 1097 } 1098 1099 pipe = xfer->pipe; 1100 opipe = (struct ohci_pipe *)pipe; 1101 1102 p = KERNADDR(&xfer->dmabuf); 1103 m = min(sc->sc_noport, xfer->length * 8 - 1); 1104 memset(p, 0, xfer->length); 1105 for (i = 1; i <= m; i++) { 1106 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1107 p[i/8] |= 1 << (i%8); 1108 } 1109 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1110 xfer->actlen = xfer->length; 1111 xfer->status = USBD_NORMAL_COMPLETION; 1112 1113 usb_transfer_complete(xfer); 1114 } 1115 1116 void 1117 ohci_root_intr_done(xfer) 1118 usbd_xfer_handle xfer; 1119 { 1120 xfer->hcpriv = NULL; 1121 } 1122 1123 /* 1124 * Wait here until controller claims to have an interrupt. 1125 * Then call ohci_intr and return. Use timeout to avoid waiting 1126 * too long. 1127 */ 1128 void 1129 ohci_waitintr(sc, xfer) 1130 ohci_softc_t *sc; 1131 usbd_xfer_handle xfer; 1132 { 1133 int timo = xfer->timeout; 1134 int usecs; 1135 u_int32_t intrs; 1136 1137 xfer->status = USBD_IN_PROGRESS; 1138 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1139 usb_delay_ms(&sc->sc_bus, 1); 1140 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1141 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1142 #ifdef OHCI_DEBUG 1143 if (ohcidebug > 15) 1144 ohci_dumpregs(sc); 1145 #endif 1146 if (intrs) { 1147 ohci_intr1(sc); 1148 if (xfer->status != USBD_IN_PROGRESS) 1149 return; 1150 } 1151 } 1152 1153 /* Timeout */ 1154 DPRINTF(("ohci_waitintr: timeout\n")); 1155 xfer->status = USBD_TIMEOUT; 1156 usb_transfer_complete(xfer); 1157 /* XXX should free TD */ 1158 } 1159 1160 void 1161 ohci_poll(bus) 1162 struct usbd_bus *bus; 1163 { 1164 ohci_softc_t *sc = (ohci_softc_t *)bus; 1165 1166 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1167 ohci_intr1(sc); 1168 } 1169 1170 usbd_status 1171 ohci_device_request(xfer) 1172 usbd_xfer_handle xfer; 1173 { 1174 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1175 usb_device_request_t *req = &xfer->request; 1176 usbd_device_handle dev = opipe->pipe.device; 1177 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1178 int addr = dev->address; 1179 ohci_soft_td_t *setup, *data = 0, *stat, *next, *tail; 1180 ohci_soft_ed_t *sed; 1181 int isread; 1182 int len; 1183 usbd_status err; 1184 int s; 1185 1186 isread = req->bmRequestType & UT_READ; 1187 len = UGETW(req->wLength); 1188 1189 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1190 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1191 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1192 UGETW(req->wIndex), len, addr, 1193 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1194 1195 setup = opipe->tail; 1196 stat = ohci_alloc_std(sc); 1197 if (stat == NULL) { 1198 err = USBD_NOMEM; 1199 goto bad1; 1200 } 1201 tail = ohci_alloc_std(sc); 1202 if (tail == NULL) { 1203 err = USBD_NOMEM; 1204 goto bad2; 1205 } 1206 tail->xfer = NULL; 1207 1208 sed = opipe->sed; 1209 opipe->u.ctl.length = len; 1210 1211 /* Update device address and length since they may have changed. */ 1212 /* XXX This only needs to be done once, but it's too early in open. */ 1213 sed->ed.ed_flags = LE( 1214 (LE(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1215 OHCI_ED_SET_FA(addr) | 1216 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1217 1218 /* Set up data transaction */ 1219 if (len != 0) { 1220 data = ohci_alloc_std(sc); 1221 if (data == NULL) { 1222 err = USBD_NOMEM; 1223 goto bad3; 1224 } 1225 data->td.td_flags = LE( 1226 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 1227 OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR | 1228 (xfer->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0)); 1229 data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf)); 1230 data->nexttd = stat; 1231 data->td.td_nexttd = LE(stat->physaddr); 1232 data->td.td_be = LE(LE(data->td.td_cbp) + len - 1); 1233 data->len = len; 1234 data->xfer = xfer; 1235 data->flags = OHCI_ADD_LEN; 1236 1237 next = data; 1238 stat->flags = OHCI_CALL_DONE; 1239 } else { 1240 next = stat; 1241 /* XXX ADD_LEN? */ 1242 stat->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1243 } 1244 1245 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1246 1247 setup->td.td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC | 1248 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1249 setup->td.td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma)); 1250 setup->nexttd = next; 1251 setup->td.td_nexttd = LE(next->physaddr); 1252 setup->td.td_be = LE(LE(setup->td.td_cbp) + sizeof *req - 1); 1253 setup->len = 0; /* XXX The number of byte we count */ 1254 setup->xfer = xfer; 1255 setup->flags = 0; 1256 xfer->hcpriv = setup; 1257 1258 stat->td.td_flags = LE( 1259 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC | 1260 OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1261 stat->td.td_cbp = 0; 1262 stat->nexttd = tail; 1263 stat->td.td_nexttd = LE(tail->physaddr); 1264 stat->td.td_be = 0; 1265 stat->len = 0; 1266 stat->xfer = xfer; 1267 1268 #ifdef OHCI_DEBUG 1269 if (ohcidebug > 5) { 1270 DPRINTF(("ohci_device_request:\n")); 1271 ohci_dump_ed(sed); 1272 ohci_dump_tds(setup); 1273 } 1274 #endif 1275 1276 /* Insert ED in schedule */ 1277 s = splusb(); 1278 ohci_hash_add_td(sc, setup); 1279 if (len != 0) 1280 ohci_hash_add_td(sc, data); 1281 ohci_hash_add_td(sc, stat); 1282 sed->ed.ed_tailp = LE(tail->physaddr); 1283 opipe->tail = tail; 1284 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1285 if (xfer->timeout && !sc->sc_bus.use_polling) { 1286 usb_timeout(ohci_timeout, xfer, 1287 MS_TO_TICKS(xfer->timeout), xfer->timo_handle); 1288 } 1289 splx(s); 1290 1291 #ifdef OHCI_DEBUG 1292 if (ohcidebug > 5) { 1293 usb_delay_ms(&sc->sc_bus, 5); 1294 DPRINTF(("ohci_device_request: status=%x\n", 1295 OREAD4(sc, OHCI_COMMAND_STATUS))); 1296 ohci_dump_ed(sed); 1297 ohci_dump_tds(setup); 1298 } 1299 #endif 1300 1301 return (USBD_NORMAL_COMPLETION); 1302 1303 bad3: 1304 ohci_free_std(sc, tail); 1305 bad2: 1306 ohci_free_std(sc, stat); 1307 bad1: 1308 return (err); 1309 } 1310 1311 /* 1312 * Add an ED to the schedule. Called at splusb(). 1313 */ 1314 void 1315 ohci_add_ed(sed, head) 1316 ohci_soft_ed_t *sed; 1317 ohci_soft_ed_t *head; 1318 { 1319 SPLUSBCHECK; 1320 sed->next = head->next; 1321 sed->ed.ed_nexted = head->ed.ed_nexted; 1322 head->next = sed; 1323 head->ed.ed_nexted = LE(sed->physaddr); 1324 } 1325 1326 /* 1327 * Remove an ED from the schedule. Called at splusb(). 1328 */ 1329 void 1330 ohci_rem_ed(sed, head) 1331 ohci_soft_ed_t *sed; 1332 ohci_soft_ed_t *head; 1333 { 1334 ohci_soft_ed_t *p; 1335 1336 SPLUSBCHECK; 1337 1338 /* XXX */ 1339 for (p = head; p == NULL && p->next != sed; p = p->next) 1340 ; 1341 if (p == NULL) 1342 panic("ohci_rem_ed: ED not found\n"); 1343 p->next = sed->next; 1344 p->ed.ed_nexted = sed->ed.ed_nexted; 1345 } 1346 1347 /* 1348 * When a transfer is completed the TD is added to the done queue by 1349 * the host controller. This queue is the processed by software. 1350 * Unfortunately the queue contains the physical address of the TD 1351 * and we have no simple way to translate this back to a kernel address. 1352 * To make the translation possible (and fast) we use a hash table of 1353 * TDs currently in the schedule. The physical address is used as the 1354 * hash value. 1355 */ 1356 1357 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1358 /* Called at splusb() */ 1359 void 1360 ohci_hash_add_td(sc, std) 1361 ohci_softc_t *sc; 1362 ohci_soft_td_t *std; 1363 { 1364 int h = HASH(std->physaddr); 1365 1366 SPLUSBCHECK; 1367 1368 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1369 } 1370 1371 /* Called at splusb() */ 1372 void 1373 ohci_hash_rem_td(sc, std) 1374 ohci_softc_t *sc; 1375 ohci_soft_td_t *std; 1376 { 1377 SPLUSBCHECK; 1378 1379 LIST_REMOVE(std, hnext); 1380 } 1381 1382 ohci_soft_td_t * 1383 ohci_hash_find_td(sc, a) 1384 ohci_softc_t *sc; 1385 ohci_physaddr_t a; 1386 { 1387 int h = HASH(a); 1388 ohci_soft_td_t *std; 1389 1390 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1391 std != NULL; 1392 std = LIST_NEXT(std, hnext)) 1393 if (std->physaddr == a) 1394 return (std); 1395 panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a); 1396 } 1397 1398 void 1399 ohci_timeout(addr) 1400 void *addr; 1401 { 1402 usbd_xfer_handle xfer = addr; 1403 int s; 1404 1405 DPRINTF(("ohci_timeout: xfer=%p\n", xfer)); 1406 1407 s = splusb(); 1408 xfer->device->bus->intr_context++; 1409 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1410 xfer->device->bus->intr_context--; 1411 splx(s); 1412 } 1413 1414 #ifdef OHCI_DEBUG 1415 void 1416 ohci_dump_tds(std) 1417 ohci_soft_td_t *std; 1418 { 1419 for (; std; std = std->nexttd) 1420 ohci_dump_td(std); 1421 } 1422 1423 void 1424 ohci_dump_td(std) 1425 ohci_soft_td_t *std; 1426 { 1427 DPRINTF(("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1428 "nexttd=0x%08lx be=0x%08lx\n", 1429 std, (u_long)std->physaddr, 1430 (int)LE(std->td.td_flags), 1431 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1432 OHCI_TD_GET_DI(LE(std->td.td_flags)), 1433 OHCI_TD_GET_EC(LE(std->td.td_flags)), 1434 OHCI_TD_GET_CC(LE(std->td.td_flags)), 1435 (u_long)LE(std->td.td_cbp), 1436 (u_long)LE(std->td.td_nexttd), (u_long)LE(std->td.td_be))); 1437 } 1438 1439 void 1440 ohci_dump_ed(sed) 1441 ohci_soft_ed_t *sed; 1442 { 1443 DPRINTF(("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx " 1444 "headp=%b nexted=0x%08lx\n", 1445 sed, (u_long)sed->physaddr, 1446 OHCI_ED_GET_FA(LE(sed->ed.ed_flags)), 1447 OHCI_ED_GET_EN(LE(sed->ed.ed_flags)), 1448 OHCI_ED_GET_MAXP(LE(sed->ed.ed_flags)), 1449 (int)LE(sed->ed.ed_flags), 1450 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1451 (u_long)LE(sed->ed.ed_tailp), 1452 (u_long)LE(sed->ed.ed_headp), 1453 "\20\1HALT\2CARRY", 1454 (u_long)LE(sed->ed.ed_nexted))); 1455 } 1456 #endif 1457 1458 usbd_status 1459 ohci_open(pipe) 1460 usbd_pipe_handle pipe; 1461 { 1462 usbd_device_handle dev = pipe->device; 1463 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1464 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1465 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1466 u_int8_t addr = dev->address; 1467 ohci_soft_ed_t *sed; 1468 ohci_soft_td_t *std; 1469 usbd_status err; 1470 int s; 1471 1472 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1473 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1474 if (addr == sc->sc_addr) { 1475 switch (ed->bEndpointAddress) { 1476 case USB_CONTROL_ENDPOINT: 1477 pipe->methods = &ohci_root_ctrl_methods; 1478 break; 1479 case UE_DIR_IN | OHCI_INTR_ENDPT: 1480 pipe->methods = &ohci_root_intr_methods; 1481 break; 1482 default: 1483 return (USBD_INVAL); 1484 } 1485 } else { 1486 sed = ohci_alloc_sed(sc); 1487 if (sed == NULL) 1488 goto bad0; 1489 std = ohci_alloc_std(sc); 1490 if (std == NULL) 1491 goto bad1; 1492 opipe->sed = sed; 1493 opipe->tail = std; 1494 sed->ed.ed_flags = LE( 1495 OHCI_ED_SET_FA(addr) | 1496 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1497 OHCI_ED_DIR_TD | 1498 (dev->lowspeed ? OHCI_ED_SPEED : 0) | 1499 ((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ? 1500 OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) | 1501 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1502 sed->ed.ed_headp = sed->ed.ed_tailp = LE(std->physaddr); 1503 1504 switch (ed->bmAttributes & UE_XFERTYPE) { 1505 case UE_CONTROL: 1506 pipe->methods = &ohci_device_ctrl_methods; 1507 err = usb_allocmem(&sc->sc_bus, 1508 sizeof(usb_device_request_t), 1509 0, &opipe->u.ctl.reqdma); 1510 if (err) 1511 goto bad; 1512 s = splusb(); 1513 ohci_add_ed(sed, sc->sc_ctrl_head); 1514 splx(s); 1515 break; 1516 case UE_INTERRUPT: 1517 pipe->methods = &ohci_device_intr_methods; 1518 return (ohci_device_setintr(sc, opipe, ed->bInterval)); 1519 case UE_ISOCHRONOUS: 1520 printf("ohci_open: open iso unimplemented\n"); 1521 return (USBD_INVAL); 1522 case UE_BULK: 1523 pipe->methods = &ohci_device_bulk_methods; 1524 s = splusb(); 1525 ohci_add_ed(sed, sc->sc_bulk_head); 1526 splx(s); 1527 break; 1528 } 1529 } 1530 return (USBD_NORMAL_COMPLETION); 1531 1532 bad: 1533 ohci_free_std(sc, std); 1534 bad1: 1535 ohci_free_sed(sc, sed); 1536 bad0: 1537 return (USBD_NOMEM); 1538 1539 } 1540 1541 /* 1542 * Close a reqular pipe. 1543 * Assumes that there are no pending transactions. 1544 */ 1545 void 1546 ohci_close_pipe(pipe, head) 1547 usbd_pipe_handle pipe; 1548 ohci_soft_ed_t *head; 1549 { 1550 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1551 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1552 ohci_soft_ed_t *sed = opipe->sed; 1553 int s; 1554 1555 s = splusb(); 1556 #ifdef DIAGNOSTIC 1557 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 1558 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 1559 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) { 1560 ohci_physaddr_t td = sed->ed.ed_headp; 1561 ohci_soft_td_t *std; 1562 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]); 1563 std != NULL; 1564 std = LIST_NEXT(std, hnext)) 1565 if (std->physaddr == td) 1566 break; 1567 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 1568 "tl=0x%x pipe=%p, std=%p\n", sed, 1569 (int)LE(sed->ed.ed_headp), (int)LE(sed->ed.ed_tailp), 1570 pipe, std); 1571 usb_delay_ms(&sc->sc_bus, 2); 1572 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 1573 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) 1574 printf("ohci_close_pipe: pipe still not empty\n"); 1575 } 1576 #endif 1577 ohci_rem_ed(sed, head); 1578 splx(s); 1579 ohci_free_std(sc, opipe->tail); 1580 ohci_free_sed(sc, opipe->sed); 1581 } 1582 1583 /* 1584 * Abort a device request. 1585 * If this routine is called at splusb() it guarantees that the request 1586 * will be removed from the hardware scheduling and that the callback 1587 * for it will be called with USBD_CANCELLED status. 1588 * It's impossible to guarantee that the requested transfer will not 1589 * have happened since the hardware runs concurrently. 1590 * If the transaction has already happened we rely on the ordinary 1591 * interrupt processing to process it. 1592 */ 1593 void 1594 ohci_abort_xfer(xfer, status) 1595 usbd_xfer_handle xfer; 1596 usbd_status status; 1597 { 1598 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1599 ohci_soft_ed_t *sed; 1600 1601 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p\n", xfer, opipe)); 1602 1603 xfer->status = status; 1604 1605 usb_untimeout(ohci_timeout, xfer, xfer->timo_handle); 1606 1607 sed = opipe->sed; 1608 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 1609 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); /* force hardware skip */ 1610 1611 if (xfer->device->bus->intr_context) { 1612 /* We have no process context, so we can't use tsleep(). */ 1613 timeout(ohci_abort_xfer_end, xfer, hz / USB_FRAMES_PER_SECOND); 1614 } else { 1615 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 1616 KASSERT(intr_nesting_level == 0, 1617 ("ohci_abort_req in interrupt context")); 1618 #endif 1619 usb_delay_ms(opipe->pipe.device->bus, 1); 1620 ohci_abort_xfer_end(xfer); 1621 } 1622 } 1623 1624 void 1625 ohci_abort_xfer_end(v) 1626 void *v; 1627 { 1628 usbd_xfer_handle xfer = v; 1629 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1630 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1631 ohci_soft_ed_t *sed; 1632 ohci_soft_td_t *p, *n; 1633 int s; 1634 1635 s = splusb(); 1636 1637 p = xfer->hcpriv; 1638 #ifdef DIAGNOSTIC 1639 if (p == NULL) { 1640 printf("ohci_abort_xfer: hcpriv==0\n"); 1641 return; 1642 } 1643 #endif 1644 for (; p->xfer == xfer; p = n) { 1645 n = p->nexttd; 1646 ohci_hash_rem_td(sc, p); 1647 ohci_free_std(sc, p); 1648 } 1649 1650 sed = opipe->sed; 1651 DPRINTFN(2,("ohci_abort_xfer: set hd=%x, tl=%x\n", 1652 (int)LE(p->physaddr), (int)LE(sed->ed.ed_tailp))); 1653 sed->ed.ed_headp = p->physaddr; /* unlink TDs */ 1654 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); /* remove hardware skip */ 1655 1656 usb_transfer_complete(xfer); 1657 1658 splx(s); 1659 } 1660 1661 /* 1662 * Data structures and routines to emulate the root hub. 1663 */ 1664 static usb_device_descriptor_t ohci_devd = { 1665 USB_DEVICE_DESCRIPTOR_SIZE, 1666 UDESC_DEVICE, /* type */ 1667 {0x00, 0x01}, /* USB version */ 1668 UCLASS_HUB, /* class */ 1669 USUBCLASS_HUB, /* subclass */ 1670 0, /* protocol */ 1671 64, /* max packet */ 1672 {0},{0},{0x00,0x01}, /* device id */ 1673 1,2,0, /* string indicies */ 1674 1 /* # of configurations */ 1675 }; 1676 1677 static usb_config_descriptor_t ohci_confd = { 1678 USB_CONFIG_DESCRIPTOR_SIZE, 1679 UDESC_CONFIG, 1680 {USB_CONFIG_DESCRIPTOR_SIZE + 1681 USB_INTERFACE_DESCRIPTOR_SIZE + 1682 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1683 1, 1684 1, 1685 0, 1686 UC_SELF_POWERED, 1687 0 /* max power */ 1688 }; 1689 1690 static usb_interface_descriptor_t ohci_ifcd = { 1691 USB_INTERFACE_DESCRIPTOR_SIZE, 1692 UDESC_INTERFACE, 1693 0, 1694 0, 1695 1, 1696 UCLASS_HUB, 1697 USUBCLASS_HUB, 1698 0, 1699 0 1700 }; 1701 1702 static usb_endpoint_descriptor_t ohci_endpd = { 1703 USB_ENDPOINT_DESCRIPTOR_SIZE, 1704 UDESC_ENDPOINT, 1705 UE_DIR_IN | OHCI_INTR_ENDPT, 1706 UE_INTERRUPT, 1707 {8, 0}, /* max packet */ 1708 255 1709 }; 1710 1711 static usb_hub_descriptor_t ohci_hubd = { 1712 USB_HUB_DESCRIPTOR_SIZE, 1713 UDESC_HUB, 1714 0, 1715 {0,0}, 1716 0, 1717 0, 1718 {0}, 1719 }; 1720 1721 static int 1722 ohci_str(p, l, s) 1723 usb_string_descriptor_t *p; 1724 int l; 1725 char *s; 1726 { 1727 int i; 1728 1729 if (l == 0) 1730 return (0); 1731 p->bLength = 2 * strlen(s) + 2; 1732 if (l == 1) 1733 return (1); 1734 p->bDescriptorType = UDESC_STRING; 1735 l -= 2; 1736 for (i = 0; s[i] && l > 1; i++, l -= 2) 1737 USETW2(p->bString[i], 0, s[i]); 1738 return (2*i+2); 1739 } 1740 1741 /* 1742 * Simulate a hardware hub by handling all the necessary requests. 1743 */ 1744 static usbd_status 1745 ohci_root_ctrl_transfer(xfer) 1746 usbd_xfer_handle xfer; 1747 { 1748 usbd_status err; 1749 1750 /* Insert last in queue. */ 1751 err = usb_insert_transfer(xfer); 1752 if (err) 1753 return (err); 1754 1755 /* Pipe isn't running, start first */ 1756 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1757 } 1758 1759 static usbd_status 1760 ohci_root_ctrl_start(xfer) 1761 usbd_xfer_handle xfer; 1762 { 1763 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 1764 usb_device_request_t *req; 1765 void *buf = NULL; 1766 int port, i; 1767 int s, len, value, index, l, totlen = 0; 1768 usb_port_status_t ps; 1769 usb_hub_descriptor_t hubd; 1770 usbd_status err; 1771 u_int32_t v; 1772 1773 #ifdef DIAGNOSTIC 1774 if (!(xfer->rqflags & URQ_REQUEST)) 1775 /* XXX panic */ 1776 return (USBD_INVAL); 1777 #endif 1778 req = &xfer->request; 1779 1780 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 1781 req->bmRequestType, req->bRequest)); 1782 1783 len = UGETW(req->wLength); 1784 value = UGETW(req->wValue); 1785 index = UGETW(req->wIndex); 1786 1787 if (len != 0) 1788 buf = KERNADDR(&xfer->dmabuf); 1789 1790 #define C(x,y) ((x) | ((y) << 8)) 1791 switch(C(req->bRequest, req->bmRequestType)) { 1792 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1793 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1794 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1795 /* 1796 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1797 * for the integrated root hub. 1798 */ 1799 break; 1800 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1801 if (len > 0) { 1802 *(u_int8_t *)buf = sc->sc_conf; 1803 totlen = 1; 1804 } 1805 break; 1806 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1807 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 1808 switch(value >> 8) { 1809 case UDESC_DEVICE: 1810 if ((value & 0xff) != 0) { 1811 err = USBD_IOERROR; 1812 goto ret; 1813 } 1814 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1815 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 1816 memcpy(buf, &ohci_devd, l); 1817 break; 1818 case UDESC_CONFIG: 1819 if ((value & 0xff) != 0) { 1820 err = USBD_IOERROR; 1821 goto ret; 1822 } 1823 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1824 memcpy(buf, &ohci_confd, l); 1825 buf = (char *)buf + l; 1826 len -= l; 1827 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1828 totlen += l; 1829 memcpy(buf, &ohci_ifcd, l); 1830 buf = (char *)buf + l; 1831 len -= l; 1832 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1833 totlen += l; 1834 memcpy(buf, &ohci_endpd, l); 1835 break; 1836 case UDESC_STRING: 1837 if (len == 0) 1838 break; 1839 *(u_int8_t *)buf = 0; 1840 totlen = 1; 1841 switch (value & 0xff) { 1842 case 1: /* Vendor */ 1843 totlen = ohci_str(buf, len, sc->sc_vendor); 1844 break; 1845 case 2: /* Product */ 1846 totlen = ohci_str(buf, len, "OHCI root hub"); 1847 break; 1848 } 1849 break; 1850 default: 1851 err = USBD_IOERROR; 1852 goto ret; 1853 } 1854 break; 1855 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1856 if (len > 0) { 1857 *(u_int8_t *)buf = 0; 1858 totlen = 1; 1859 } 1860 break; 1861 case C(UR_GET_STATUS, UT_READ_DEVICE): 1862 if (len > 1) { 1863 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1864 totlen = 2; 1865 } 1866 break; 1867 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1868 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1869 if (len > 1) { 1870 USETW(((usb_status_t *)buf)->wStatus, 0); 1871 totlen = 2; 1872 } 1873 break; 1874 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1875 if (value >= USB_MAX_DEVICES) { 1876 err = USBD_IOERROR; 1877 goto ret; 1878 } 1879 sc->sc_addr = value; 1880 break; 1881 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1882 if (value != 0 && value != 1) { 1883 err = USBD_IOERROR; 1884 goto ret; 1885 } 1886 sc->sc_conf = value; 1887 break; 1888 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1889 break; 1890 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1891 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1892 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1893 err = USBD_IOERROR; 1894 goto ret; 1895 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1896 break; 1897 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1898 break; 1899 /* Hub requests */ 1900 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1901 break; 1902 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1903 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1904 "port=%d feature=%d\n", 1905 index, value)); 1906 if (index < 1 || index > sc->sc_noport) { 1907 err = USBD_IOERROR; 1908 goto ret; 1909 } 1910 port = OHCI_RH_PORT_STATUS(index); 1911 switch(value) { 1912 case UHF_PORT_ENABLE: 1913 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 1914 break; 1915 case UHF_PORT_SUSPEND: 1916 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 1917 break; 1918 case UHF_PORT_POWER: 1919 OWRITE4(sc, port, UPS_LOW_SPEED); 1920 break; 1921 case UHF_C_PORT_CONNECTION: 1922 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 1923 break; 1924 case UHF_C_PORT_ENABLE: 1925 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 1926 break; 1927 case UHF_C_PORT_SUSPEND: 1928 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 1929 break; 1930 case UHF_C_PORT_OVER_CURRENT: 1931 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 1932 break; 1933 case UHF_C_PORT_RESET: 1934 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 1935 break; 1936 default: 1937 err = USBD_IOERROR; 1938 goto ret; 1939 } 1940 switch(value) { 1941 case UHF_C_PORT_CONNECTION: 1942 case UHF_C_PORT_ENABLE: 1943 case UHF_C_PORT_SUSPEND: 1944 case UHF_C_PORT_OVER_CURRENT: 1945 case UHF_C_PORT_RESET: 1946 /* Enable RHSC interrupt if condition is cleared. */ 1947 if ((OREAD4(sc, port) >> 16) == 0) 1948 ohci_rhsc_able(sc, 1); 1949 break; 1950 default: 1951 break; 1952 } 1953 break; 1954 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1955 if (value != 0) { 1956 err = USBD_IOERROR; 1957 goto ret; 1958 } 1959 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 1960 hubd = ohci_hubd; 1961 hubd.bNbrPorts = sc->sc_noport; 1962 USETW(hubd.wHubCharacteristics, 1963 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 1964 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 1965 /* XXX overcurrent */ 1966 ); 1967 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 1968 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 1969 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1970 hubd.DeviceRemovable[i++] = (u_int8_t)v; 1971 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1972 l = min(len, hubd.bDescLength); 1973 totlen = l; 1974 memcpy(buf, &hubd, l); 1975 break; 1976 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1977 if (len != 4) { 1978 err = USBD_IOERROR; 1979 goto ret; 1980 } 1981 memset(buf, 0, len); /* ? XXX */ 1982 totlen = len; 1983 break; 1984 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1985 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 1986 index)); 1987 if (index < 1 || index > sc->sc_noport) { 1988 err = USBD_IOERROR; 1989 goto ret; 1990 } 1991 if (len != 4) { 1992 err = USBD_IOERROR; 1993 goto ret; 1994 } 1995 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 1996 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 1997 v)); 1998 USETW(ps.wPortStatus, v); 1999 USETW(ps.wPortChange, v >> 16); 2000 l = min(len, sizeof ps); 2001 memcpy(buf, &ps, l); 2002 totlen = l; 2003 break; 2004 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2005 err = USBD_IOERROR; 2006 goto ret; 2007 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2008 break; 2009 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2010 if (index < 1 || index > sc->sc_noport) { 2011 err = USBD_IOERROR; 2012 goto ret; 2013 } 2014 port = OHCI_RH_PORT_STATUS(index); 2015 switch(value) { 2016 case UHF_PORT_ENABLE: 2017 OWRITE4(sc, port, UPS_PORT_ENABLED); 2018 break; 2019 case UHF_PORT_SUSPEND: 2020 OWRITE4(sc, port, UPS_SUSPEND); 2021 break; 2022 case UHF_PORT_RESET: 2023 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2024 index)); 2025 OWRITE4(sc, port, UPS_RESET); 2026 for (i = 0; i < 10; i++) { 2027 usb_delay_ms(&sc->sc_bus, 10); 2028 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2029 break; 2030 } 2031 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2032 index, OREAD4(sc, port))); 2033 break; 2034 case UHF_PORT_POWER: 2035 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2036 "%d\n", index)); 2037 OWRITE4(sc, port, UPS_PORT_POWER); 2038 break; 2039 default: 2040 err = USBD_IOERROR; 2041 goto ret; 2042 } 2043 break; 2044 default: 2045 err = USBD_IOERROR; 2046 goto ret; 2047 } 2048 xfer->actlen = totlen; 2049 err = USBD_NORMAL_COMPLETION; 2050 ret: 2051 xfer->status = err; 2052 s = splusb(); 2053 usb_transfer_complete(xfer); 2054 splx(s); 2055 return (USBD_IN_PROGRESS); 2056 } 2057 2058 /* Abort a root control request. */ 2059 static void 2060 ohci_root_ctrl_abort(xfer) 2061 usbd_xfer_handle xfer; 2062 { 2063 /* Nothing to do, all transfers are synchronous. */ 2064 } 2065 2066 /* Close the root pipe. */ 2067 static void 2068 ohci_root_ctrl_close(pipe) 2069 usbd_pipe_handle pipe; 2070 { 2071 DPRINTF(("ohci_root_ctrl_close\n")); 2072 /* Nothing to do. */ 2073 } 2074 2075 static usbd_status 2076 ohci_root_intr_transfer(xfer) 2077 usbd_xfer_handle xfer; 2078 { 2079 usbd_status err; 2080 2081 /* Insert last in queue. */ 2082 err = usb_insert_transfer(xfer); 2083 if (err) 2084 return (err); 2085 2086 /* Pipe isn't running, start first */ 2087 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2088 } 2089 2090 static usbd_status 2091 ohci_root_intr_start(xfer) 2092 usbd_xfer_handle xfer; 2093 { 2094 usbd_pipe_handle pipe = xfer->pipe; 2095 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2096 2097 sc->sc_intrxfer = xfer; 2098 2099 return (USBD_IN_PROGRESS); 2100 } 2101 2102 /* Abort a root interrupt request. */ 2103 static void 2104 ohci_root_intr_abort(xfer) 2105 usbd_xfer_handle xfer; 2106 { 2107 int s; 2108 2109 if (xfer->pipe->intrxfer == xfer) { 2110 DPRINTF(("ohci_root_intr_abort: remove\n")); 2111 xfer->pipe->intrxfer = NULL; 2112 } 2113 xfer->status = USBD_CANCELLED; 2114 s = splusb(); 2115 usb_transfer_complete(xfer); 2116 splx(s); 2117 } 2118 2119 /* Close the root pipe. */ 2120 static void 2121 ohci_root_intr_close(pipe) 2122 usbd_pipe_handle pipe; 2123 { 2124 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2125 2126 DPRINTF(("ohci_root_intr_close\n")); 2127 2128 sc->sc_intrxfer = NULL; 2129 } 2130 2131 /************************/ 2132 2133 static usbd_status 2134 ohci_device_ctrl_transfer(xfer) 2135 usbd_xfer_handle xfer; 2136 { 2137 usbd_status err; 2138 2139 /* Insert last in queue. */ 2140 err = usb_insert_transfer(xfer); 2141 if (err) 2142 return (err); 2143 2144 /* Pipe isn't running, start first */ 2145 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2146 } 2147 2148 static usbd_status 2149 ohci_device_ctrl_start(xfer) 2150 usbd_xfer_handle xfer; 2151 { 2152 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2153 usbd_status err; 2154 2155 #ifdef DIAGNOSTIC 2156 if (!(xfer->rqflags & URQ_REQUEST)) { 2157 /* XXX panic */ 2158 printf("ohci_device_ctrl_transfer: not a request\n"); 2159 return (USBD_INVAL); 2160 } 2161 #endif 2162 2163 err = ohci_device_request(xfer); 2164 if (err) 2165 return (err); 2166 2167 if (sc->sc_bus.use_polling) 2168 ohci_waitintr(sc, xfer); 2169 return (USBD_IN_PROGRESS); 2170 } 2171 2172 /* Abort a device control request. */ 2173 static void 2174 ohci_device_ctrl_abort(xfer) 2175 usbd_xfer_handle xfer; 2176 { 2177 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2178 ohci_abort_xfer(xfer, USBD_CANCELLED); 2179 } 2180 2181 /* Close a device control pipe. */ 2182 static void 2183 ohci_device_ctrl_close(pipe) 2184 usbd_pipe_handle pipe; 2185 { 2186 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2187 2188 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2189 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2190 } 2191 2192 /************************/ 2193 2194 static void 2195 ohci_device_clear_toggle(pipe) 2196 usbd_pipe_handle pipe; 2197 { 2198 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2199 2200 opipe->sed->ed.ed_tailp &= LE(~OHCI_TOGGLECARRY); 2201 } 2202 2203 static void 2204 ohci_noop(pipe) 2205 usbd_pipe_handle pipe; 2206 { 2207 } 2208 2209 static usbd_status 2210 ohci_device_bulk_transfer(xfer) 2211 usbd_xfer_handle xfer; 2212 { 2213 usbd_status err; 2214 2215 /* Insert last in queue. */ 2216 err = usb_insert_transfer(xfer); 2217 if (err) 2218 return (err); 2219 2220 /* Pipe isn't running, start first */ 2221 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2222 } 2223 2224 static usbd_status 2225 ohci_device_bulk_start(xfer) 2226 usbd_xfer_handle xfer; 2227 { 2228 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2229 usbd_device_handle dev = opipe->pipe.device; 2230 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2231 int addr = dev->address; 2232 ohci_soft_td_t *data, *tail, *tdp; 2233 ohci_soft_ed_t *sed; 2234 int s, len, isread, endpt; 2235 usbd_status err; 2236 2237 #ifdef DIAGNOSTIC 2238 if (xfer->rqflags & URQ_REQUEST) { 2239 /* XXX panic */ 2240 printf("ohci_device_bulk_start: a request\n"); 2241 return (USBD_INVAL); 2242 } 2243 #endif 2244 2245 len = xfer->length; 2246 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2247 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2248 sed = opipe->sed; 2249 2250 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2251 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2252 endpt)); 2253 2254 opipe->u.bulk.isread = isread; 2255 opipe->u.bulk.length = len; 2256 2257 /* Update device address */ 2258 sed->ed.ed_flags = LE( 2259 (LE(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2260 OHCI_ED_SET_FA(addr)); 2261 2262 /* Allocate a chain of new TDs (including a new tail). */ 2263 data = opipe->tail; 2264 err = ohci_alloc_std_chain(opipe, sc, len, isread, 2265 xfer->flags & USBD_SHORT_XFER_OK, 2266 &xfer->dmabuf, data, &tail); 2267 if (err) 2268 return (err); 2269 2270 tail->xfer = NULL; 2271 xfer->hcpriv = data; 2272 2273 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2274 "td_cbp=0x%08x td_be=0x%08x\n", 2275 (int)LE(sed->ed.ed_flags), (int)LE(data->td.td_flags), 2276 (int)LE(data->td.td_cbp), (int)LE(data->td.td_be))); 2277 2278 #ifdef OHCI_DEBUG 2279 if (ohcidebug > 4) { 2280 ohci_dump_ed(sed); 2281 ohci_dump_tds(data); 2282 } 2283 #endif 2284 2285 /* Insert ED in schedule */ 2286 s = splusb(); 2287 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2288 tdp->xfer = xfer; 2289 ohci_hash_add_td(sc, tdp); 2290 } 2291 sed->ed.ed_tailp = LE(tail->physaddr); 2292 opipe->tail = tail; 2293 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); 2294 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2295 if (xfer->timeout && !sc->sc_bus.use_polling) { 2296 usb_timeout(ohci_timeout, xfer, 2297 MS_TO_TICKS(xfer->timeout), xfer->timo_handle); 2298 } 2299 2300 #if 0 2301 /* This goes wrong if we are too slow. */ 2302 if (ohcidebug > 5) { 2303 usb_delay_ms(&sc->sc_bus, 5); 2304 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2305 OREAD4(sc, OHCI_COMMAND_STATUS))); 2306 ohci_dump_ed(sed); 2307 ohci_dump_tds(data); 2308 } 2309 #endif 2310 2311 splx(s); 2312 2313 return (USBD_IN_PROGRESS); 2314 } 2315 2316 static void 2317 ohci_device_bulk_abort(xfer) 2318 usbd_xfer_handle xfer; 2319 { 2320 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2321 ohci_abort_xfer(xfer, USBD_CANCELLED); 2322 } 2323 2324 /* 2325 * Close a device bulk pipe. 2326 */ 2327 static void 2328 ohci_device_bulk_close(pipe) 2329 usbd_pipe_handle pipe; 2330 { 2331 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2332 2333 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2334 ohci_close_pipe(pipe, sc->sc_bulk_head); 2335 } 2336 2337 /************************/ 2338 2339 static usbd_status 2340 ohci_device_intr_transfer(xfer) 2341 usbd_xfer_handle xfer; 2342 { 2343 usbd_status err; 2344 2345 /* Insert last in queue. */ 2346 err = usb_insert_transfer(xfer); 2347 if (err) 2348 return (err); 2349 2350 /* Pipe isn't running, start first */ 2351 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2352 } 2353 2354 static usbd_status 2355 ohci_device_intr_start(xfer) 2356 usbd_xfer_handle xfer; 2357 { 2358 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2359 usbd_device_handle dev = opipe->pipe.device; 2360 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2361 ohci_soft_ed_t *sed = opipe->sed; 2362 ohci_soft_td_t *data, *tail; 2363 int len; 2364 int s; 2365 2366 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2367 "flags=%d priv=%p\n", 2368 xfer, xfer->length, xfer->flags, xfer->priv)); 2369 2370 #ifdef DIAGNOSTIC 2371 if (xfer->rqflags & URQ_REQUEST) 2372 panic("ohci_device_intr_transfer: a request\n"); 2373 #endif 2374 2375 len = xfer->length; 2376 2377 data = opipe->tail; 2378 tail = ohci_alloc_std(sc); 2379 if (tail == NULL) 2380 return (USBD_NOMEM); 2381 tail->xfer = NULL; 2382 2383 data->td.td_flags = LE( 2384 OHCI_TD_IN | OHCI_TD_NOCC | 2385 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2386 if (xfer->flags & USBD_SHORT_XFER_OK) 2387 data->td.td_flags |= LE(OHCI_TD_R); 2388 data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf)); 2389 data->nexttd = tail; 2390 data->td.td_nexttd = LE(tail->physaddr); 2391 data->td.td_be = LE(LE(data->td.td_cbp) + len - 1); 2392 data->len = len; 2393 data->xfer = xfer; 2394 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2395 xfer->hcpriv = data; 2396 2397 #ifdef OHCI_DEBUG 2398 if (ohcidebug > 5) { 2399 DPRINTF(("ohci_device_intr_transfer:\n")); 2400 ohci_dump_ed(sed); 2401 ohci_dump_tds(data); 2402 } 2403 #endif 2404 2405 /* Insert ED in schedule */ 2406 s = splusb(); 2407 ohci_hash_add_td(sc, data); 2408 sed->ed.ed_tailp = LE(tail->physaddr); 2409 opipe->tail = tail; 2410 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); 2411 2412 #if 0 2413 /* 2414 * This goes horribly wrong, printing thousands of descriptors, 2415 * because false references are followed due to the fact that the 2416 * TD is gone. 2417 */ 2418 if (ohcidebug > 5) { 2419 usb_delay_ms(&sc->sc_bus, 5); 2420 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2421 OREAD4(sc, OHCI_COMMAND_STATUS))); 2422 ohci_dump_ed(sed); 2423 ohci_dump_tds(data); 2424 } 2425 #endif 2426 splx(s); 2427 2428 return (USBD_IN_PROGRESS); 2429 } 2430 2431 /* Abort a device control request. */ 2432 static void 2433 ohci_device_intr_abort(xfer) 2434 usbd_xfer_handle xfer; 2435 { 2436 if (xfer->pipe->intrxfer == xfer) { 2437 DPRINTF(("ohci_device_intr_abort: remove\n")); 2438 xfer->pipe->intrxfer = NULL; 2439 } 2440 ohci_abort_xfer(xfer, USBD_CANCELLED); 2441 } 2442 2443 /* Close a device interrupt pipe. */ 2444 static void 2445 ohci_device_intr_close(pipe) 2446 usbd_pipe_handle pipe; 2447 { 2448 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2449 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2450 int nslots = opipe->u.intr.nslots; 2451 int pos = opipe->u.intr.pos; 2452 int j; 2453 ohci_soft_ed_t *p, *sed = opipe->sed; 2454 int s; 2455 2456 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2457 pipe, nslots, pos)); 2458 s = splusb(); 2459 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 2460 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 2461 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) 2462 usb_delay_ms(&sc->sc_bus, 2); 2463 2464 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2465 ; 2466 #ifdef DIAGNOSTIC 2467 if (p == NULL) 2468 panic("ohci_device_intr_close: ED not found\n"); 2469 #endif 2470 p->next = sed->next; 2471 p->ed.ed_nexted = sed->ed.ed_nexted; 2472 splx(s); 2473 2474 for (j = 0; j < nslots; j++) 2475 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2476 2477 ohci_free_std(sc, opipe->tail); 2478 ohci_free_sed(sc, opipe->sed); 2479 } 2480 2481 static usbd_status 2482 ohci_device_setintr(sc, opipe, ival) 2483 ohci_softc_t *sc; 2484 struct ohci_pipe *opipe; 2485 int ival; 2486 { 2487 int i, j, s, best; 2488 u_int npoll, slow, shigh, nslots; 2489 u_int bestbw, bw; 2490 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2491 2492 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2493 if (ival == 0) { 2494 printf("ohci_setintr: 0 interval\n"); 2495 return (USBD_INVAL); 2496 } 2497 2498 npoll = OHCI_NO_INTRS; 2499 while (npoll > ival) 2500 npoll /= 2; 2501 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2502 2503 /* 2504 * We now know which level in the tree the ED must go into. 2505 * Figure out which slot has most bandwidth left over. 2506 * Slots to examine: 2507 * npoll 2508 * 1 0 2509 * 2 1 2 2510 * 4 3 4 5 6 2511 * 8 7 8 9 10 11 12 13 14 2512 * N (N-1) .. (N-1+N-1) 2513 */ 2514 slow = npoll-1; 2515 shigh = slow + npoll; 2516 nslots = OHCI_NO_INTRS / npoll; 2517 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2518 bw = 0; 2519 for (j = 0; j < nslots; j++) 2520 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 2521 if (bw < bestbw) { 2522 best = i; 2523 bestbw = bw; 2524 } 2525 } 2526 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2527 best, slow, shigh, bestbw)); 2528 2529 s = splusb(); 2530 hsed = sc->sc_eds[best]; 2531 sed->next = hsed->next; 2532 sed->ed.ed_nexted = hsed->ed.ed_nexted; 2533 hsed->next = sed; 2534 hsed->ed.ed_nexted = LE(sed->physaddr); 2535 splx(s); 2536 2537 for (j = 0; j < nslots; j++) 2538 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 2539 opipe->u.intr.nslots = nslots; 2540 opipe->u.intr.pos = best; 2541 2542 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 2543 return (USBD_NORMAL_COMPLETION); 2544 } 2545
Indexes created Wed Sep 24 05:09:52 GMT 2025