ohci.c revision 1.59
1 /* $NetBSD: ohci.c,v 1.59 2000/01/16 10:27:51 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (augustss (at) carlstedt.se) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe 45 * USB spec: http://www.usb.org/developers/data/usb11.pdf 46 */ 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/kernel.h> 53 #include <sys/device.h> 54 #include <sys/select.h> 55 #elif defined(__FreeBSD__) 56 #include <sys/module.h> 57 #include <sys/bus.h> 58 #include <machine/bus_pio.h> 59 #include <machine/bus_memio.h> 60 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 61 #include <machine/cpu.h> 62 #endif 63 #endif 64 #include <sys/proc.h> 65 #include <sys/queue.h> 66 67 #include <machine/bus.h> 68 #include <machine/endian.h> 69 70 #include <dev/usb/usb.h> 71 #include <dev/usb/usbdi.h> 72 #include <dev/usb/usbdivar.h> 73 #include <dev/usb/usb_mem.h> 74 #include <dev/usb/usb_quirks.h> 75 76 #include <dev/usb/ohcireg.h> 77 #include <dev/usb/ohcivar.h> 78 79 #if defined(__FreeBSD__) 80 #include <machine/clock.h> 81 82 #define delay(d) DELAY(d) 83 #endif 84 85 #if defined(__OpenBSD__) 86 struct cfdriver ohci_cd = { 87 NULL, "ohci", DV_DULL 88 }; 89 #endif 90 91 #ifdef OHCI_DEBUG 92 #define DPRINTF(x) if (ohcidebug) logprintf x 93 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 94 int ohcidebug = 0; 95 #else 96 #define DPRINTF(x) 97 #define DPRINTFN(n,x) 98 #endif 99 100 /* 101 * The OHCI controller is little endian, so on big endian machines 102 * the data strored in memory needs to be swapped. 103 */ 104 #if BYTE_ORDER == BIG_ENDIAN 105 #define LE(x) (bswap32(x)) 106 #else 107 #define LE(x) (x) 108 #endif 109 110 struct ohci_pipe; 111 112 static ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *)); 113 static void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *)); 114 115 static ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *)); 116 static void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *)); 117 118 #if 0 119 static void ohci_free_std_chain __P((ohci_softc_t *, 120 ohci_soft_td_t *, ohci_soft_td_t *)); 121 #endif 122 static usbd_status ohci_alloc_std_chain __P((struct ohci_pipe *, 123 ohci_softc_t *, int, int, int, usb_dma_t *, 124 ohci_soft_td_t *, ohci_soft_td_t **)); 125 126 static void ohci_shutdown __P((void *v)); 127 static void ohci_power __P((int, void *)); 128 static usbd_status ohci_open __P((usbd_pipe_handle)); 129 static void ohci_poll __P((struct usbd_bus *)); 130 static void ohci_waitintr __P((ohci_softc_t *, 131 usbd_xfer_handle)); 132 static void ohci_rhsc __P((ohci_softc_t *, usbd_xfer_handle)); 133 static void ohci_process_done __P((ohci_softc_t *, 134 ohci_physaddr_t)); 135 136 static usbd_status ohci_device_request __P((usbd_xfer_handle xfer)); 137 static void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 138 static void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 139 static void ohci_hash_add_td __P((ohci_softc_t *, 140 ohci_soft_td_t *)); 141 static void ohci_hash_rem_td __P((ohci_softc_t *, 142 ohci_soft_td_t *)); 143 static ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, 144 ohci_physaddr_t)); 145 146 static usbd_status ohci_allocm __P((struct usbd_bus *, usb_dma_t *, 147 u_int32_t)); 148 static void ohci_freem __P((struct usbd_bus *, usb_dma_t *)); 149 150 static usbd_status ohci_root_ctrl_transfer __P((usbd_xfer_handle)); 151 static usbd_status ohci_root_ctrl_start __P((usbd_xfer_handle)); 152 static void ohci_root_ctrl_abort __P((usbd_xfer_handle)); 153 static void ohci_root_ctrl_close __P((usbd_pipe_handle)); 154 155 static usbd_status ohci_root_intr_transfer __P((usbd_xfer_handle)); 156 static usbd_status ohci_root_intr_start __P((usbd_xfer_handle)); 157 static void ohci_root_intr_abort __P((usbd_xfer_handle)); 158 static void ohci_root_intr_close __P((usbd_pipe_handle)); 159 static void ohci_root_intr_done __P((usbd_xfer_handle)); 160 161 static usbd_status ohci_device_ctrl_transfer __P((usbd_xfer_handle)); 162 static usbd_status ohci_device_ctrl_start __P((usbd_xfer_handle)); 163 static void ohci_device_ctrl_abort __P((usbd_xfer_handle)); 164 static void ohci_device_ctrl_close __P((usbd_pipe_handle)); 165 static void ohci_device_ctrl_done __P((usbd_xfer_handle)); 166 167 static usbd_status ohci_device_bulk_transfer __P((usbd_xfer_handle)); 168 static usbd_status ohci_device_bulk_start __P((usbd_xfer_handle)); 169 static void ohci_device_bulk_abort __P((usbd_xfer_handle)); 170 static void ohci_device_bulk_close __P((usbd_pipe_handle)); 171 static void ohci_device_bulk_done __P((usbd_xfer_handle)); 172 173 static usbd_status ohci_device_intr_transfer __P((usbd_xfer_handle)); 174 static usbd_status ohci_device_intr_start __P((usbd_xfer_handle)); 175 static void ohci_device_intr_abort __P((usbd_xfer_handle)); 176 static void ohci_device_intr_close __P((usbd_pipe_handle)); 177 static void ohci_device_intr_done __P((usbd_xfer_handle)); 178 179 #if 0 180 static usbd_status ohci_device_isoc_transfer __P((usbd_xfer_handle)); 181 static usbd_status ohci_device_isoc_start __P((usbd_xfer_handle)); 182 static void ohci_device_isoc_abort __P((usbd_xfer_handle)); 183 static void ohci_device_isoc_close __P((usbd_pipe_handle)); 184 static void ohci_device_isoc_done __P((usbd_xfer_handle)); 185 #endif 186 187 static usbd_status ohci_device_setintr __P((ohci_softc_t *sc, 188 struct ohci_pipe *pipe, int ival)); 189 190 static int ohci_str __P((usb_string_descriptor_t *, int, char *)); 191 192 static void ohci_timeout __P((void *)); 193 static void ohci_rhsc_able __P((ohci_softc_t *, int)); 194 195 static void ohci_close_pipe __P((usbd_pipe_handle pipe, 196 ohci_soft_ed_t *head)); 197 static void ohci_abort_xfer __P((usbd_xfer_handle xfer, 198 usbd_status status)); 199 static void ohci_abort_xfer_end __P((void *)); 200 201 static void ohci_device_clear_toggle __P((usbd_pipe_handle pipe)); 202 static void ohci_noop __P((usbd_pipe_handle pipe)); 203 204 #ifdef OHCI_DEBUG 205 static void ohci_dumpregs __P((ohci_softc_t *)); 206 static void ohci_dump_tds __P((ohci_soft_td_t *)); 207 static void ohci_dump_td __P((ohci_soft_td_t *)); 208 static void ohci_dump_ed __P((ohci_soft_ed_t *)); 209 #endif 210 211 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 212 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 213 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 214 215 /* Reverse the bits in a value 0 .. 31 */ 216 static u_int8_t revbits[OHCI_NO_INTRS] = 217 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 218 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 219 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 220 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 221 222 struct ohci_pipe { 223 struct usbd_pipe pipe; 224 ohci_soft_ed_t *sed; 225 ohci_soft_td_t *tail; 226 /* Info needed for different pipe kinds. */ 227 union { 228 /* Control pipe */ 229 struct { 230 usb_dma_t reqdma; 231 u_int length; 232 ohci_soft_td_t *setup, *data, *stat; 233 } ctl; 234 /* Interrupt pipe */ 235 struct { 236 int nslots; 237 int pos; 238 } intr; 239 /* Bulk pipe */ 240 struct { 241 u_int length; 242 int isread; 243 } bulk; 244 /* Iso pipe */ 245 struct iso { 246 int xxxxx; 247 } iso; 248 } u; 249 }; 250 251 #define OHCI_INTR_ENDPT 1 252 253 static struct usbd_bus_methods ohci_bus_methods = { 254 ohci_open, 255 ohci_poll, 256 ohci_allocm, 257 ohci_freem, 258 }; 259 260 static struct usbd_pipe_methods ohci_root_ctrl_methods = { 261 ohci_root_ctrl_transfer, 262 ohci_root_ctrl_start, 263 ohci_root_ctrl_abort, 264 ohci_root_ctrl_close, 265 ohci_noop, 266 0, 267 }; 268 269 static struct usbd_pipe_methods ohci_root_intr_methods = { 270 ohci_root_intr_transfer, 271 ohci_root_intr_start, 272 ohci_root_intr_abort, 273 ohci_root_intr_close, 274 ohci_noop, 275 ohci_root_intr_done, 276 }; 277 278 static struct usbd_pipe_methods ohci_device_ctrl_methods = { 279 ohci_device_ctrl_transfer, 280 ohci_device_ctrl_start, 281 ohci_device_ctrl_abort, 282 ohci_device_ctrl_close, 283 ohci_noop, 284 ohci_device_ctrl_done, 285 }; 286 287 static struct usbd_pipe_methods ohci_device_intr_methods = { 288 ohci_device_intr_transfer, 289 ohci_device_intr_start, 290 ohci_device_intr_abort, 291 ohci_device_intr_close, 292 ohci_device_clear_toggle, 293 ohci_device_intr_done, 294 }; 295 296 static struct usbd_pipe_methods ohci_device_bulk_methods = { 297 ohci_device_bulk_transfer, 298 ohci_device_bulk_start, 299 ohci_device_bulk_abort, 300 ohci_device_bulk_close, 301 ohci_device_clear_toggle, 302 ohci_device_bulk_done, 303 }; 304 305 #if 0 306 static struct usbd_pipe_methods ohci_device_isoc_methods = { 307 ohci_device_isoc_transfer, 308 ohci_device_isoc_start, 309 ohci_device_isoc_abort, 310 ohci_device_isoc_close, 311 ohci_noop, 312 ohci_device_isoc_done, 313 }; 314 #endif 315 316 #if defined(__NetBSD__) || defined(__OpenBSD__) 317 int 318 ohci_activate(self, act) 319 device_ptr_t self; 320 enum devact act; 321 { 322 struct ohci_softc *sc = (struct ohci_softc *)self; 323 int rv = 0; 324 325 switch (act) { 326 case DVACT_ACTIVATE: 327 return (EOPNOTSUPP); 328 break; 329 330 case DVACT_DEACTIVATE: 331 if (sc->sc_child != NULL) 332 rv = config_deactivate(sc->sc_child); 333 break; 334 } 335 return (rv); 336 } 337 338 int 339 ohci_detach(sc, flags) 340 struct ohci_softc *sc; 341 int flags; 342 { 343 int rv = 0; 344 345 if (sc->sc_child != NULL) 346 rv = config_detach(sc->sc_child, flags); 347 348 if (rv != 0) 349 return (rv); 350 351 powerhook_disestablish(sc->sc_powerhook); 352 shutdownhook_disestablish(sc->sc_shutdownhook); 353 354 /* free data structures XXX */ 355 356 return (rv); 357 } 358 #endif 359 360 ohci_soft_ed_t * 361 ohci_alloc_sed(sc) 362 ohci_softc_t *sc; 363 { 364 ohci_soft_ed_t *sed; 365 usbd_status err; 366 int i, offs; 367 usb_dma_t dma; 368 369 if (sc->sc_freeeds == NULL) { 370 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 371 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 372 OHCI_ED_ALIGN, &dma); 373 if (err) 374 return (0); 375 for(i = 0; i < OHCI_SED_CHUNK; i++) { 376 offs = i * OHCI_SED_SIZE; 377 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 378 sed->physaddr = DMAADDR(&dma) + offs; 379 sed->next = sc->sc_freeeds; 380 sc->sc_freeeds = sed; 381 } 382 } 383 sed = sc->sc_freeeds; 384 sc->sc_freeeds = sed->next; 385 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 386 sed->next = 0; 387 return (sed); 388 } 389 390 void 391 ohci_free_sed(sc, sed) 392 ohci_softc_t *sc; 393 ohci_soft_ed_t *sed; 394 { 395 sed->next = sc->sc_freeeds; 396 sc->sc_freeeds = sed; 397 } 398 399 ohci_soft_td_t * 400 ohci_alloc_std(sc) 401 ohci_softc_t *sc; 402 { 403 ohci_soft_td_t *std; 404 usbd_status err; 405 int i, offs; 406 usb_dma_t dma; 407 408 if (sc->sc_freetds == NULL) { 409 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 410 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 411 OHCI_TD_ALIGN, &dma); 412 if (err) 413 return (0); 414 for(i = 0; i < OHCI_STD_CHUNK; i++) { 415 offs = i * OHCI_STD_SIZE; 416 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 417 std->physaddr = DMAADDR(&dma) + offs; 418 std->nexttd = sc->sc_freetds; 419 sc->sc_freetds = std; 420 } 421 } 422 std = sc->sc_freetds; 423 sc->sc_freetds = std->nexttd; 424 memset(&std->td, 0, sizeof(ohci_td_t)); 425 std->nexttd = 0; 426 return (std); 427 } 428 429 void 430 ohci_free_std(sc, std) 431 ohci_softc_t *sc; 432 ohci_soft_td_t *std; 433 { 434 std->nexttd = sc->sc_freetds; 435 sc->sc_freetds = std; 436 } 437 438 usbd_status 439 ohci_alloc_std_chain(upipe, sc, len, rd, shortok, dma, sp, ep) 440 struct ohci_pipe *upipe; 441 ohci_softc_t *sc; 442 int len, rd, shortok; 443 usb_dma_t *dma; 444 ohci_soft_td_t *sp, **ep; 445 { 446 ohci_soft_td_t *next, *cur; 447 ohci_physaddr_t dataphys, dataphysend; 448 u_int32_t intr; 449 int curlen; 450 451 DPRINTFN(len < 4096,("ohci_alloc_std_chain: start len=%d\n", len)); 452 cur = sp; 453 dataphys = DMAADDR(dma); 454 dataphysend = OHCI_PAGE(dataphys + len - 1); 455 for (;;) { 456 next = ohci_alloc_std(sc); 457 if (next == 0) { 458 /* XXX free chain */ 459 return (USBD_NOMEM); 460 } 461 462 /* The OHCI hardware can handle at most one page crossing. */ 463 if (OHCI_PAGE(dataphys) == dataphysend || 464 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 465 /* we can handle it in this TD */ 466 curlen = len; 467 } else { 468 /* must use multiple TDs, fill as much as possible. */ 469 curlen = 2 * OHCI_PAGE_SIZE - 470 (dataphys & (OHCI_PAGE_SIZE-1)); 471 } 472 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 473 "dataphysend=0x%08x len=%d curlen=%d\n", 474 dataphys, dataphysend, 475 len, curlen)); 476 len -= curlen; 477 478 intr = len == 0 ? OHCI_TD_SET_DI(1) : OHCI_TD_NOINTR; 479 cur->td.td_flags = LE( 480 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 481 intr | OHCI_TD_TOGGLE_CARRY | 482 (shortok ? OHCI_TD_R : 0)); 483 cur->td.td_cbp = LE(dataphys); 484 cur->nexttd = next; 485 cur->td.td_nexttd = LE(next->physaddr); 486 cur->td.td_be = LE(dataphys + curlen - 1); 487 cur->len = curlen; 488 cur->flags = OHCI_ADD_LEN; 489 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 490 dataphys, dataphys + curlen - 1)); 491 if (len == 0) 492 break; 493 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 494 dataphys += curlen; 495 cur = next; 496 } 497 cur->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 498 *ep = next; 499 500 return (USBD_NORMAL_COMPLETION); 501 } 502 503 #if 0 504 static void 505 ohci_free_std_chain(sc, std, stdend) 506 ohci_softc_t *sc; 507 ohci_soft_td_t *std; 508 ohci_soft_td_t *stdend; 509 { 510 ohci_soft_td_t *p; 511 512 for (; std != stdend; std = p) { 513 p = std->nexttd; 514 ohci_free_std(sc, std); 515 } 516 } 517 #endif 518 519 usbd_status 520 ohci_init(sc) 521 ohci_softc_t *sc; 522 { 523 ohci_soft_ed_t *sed, *psed; 524 usbd_status err; 525 int rev; 526 int i; 527 u_int32_t s, ctl, ival, hcr, fm, per; 528 529 DPRINTF(("ohci_init: start\n")); 530 #if defined(__OpenBSD__) 531 printf(","); 532 #else 533 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 534 #endif 535 rev = OREAD4(sc, OHCI_REVISION); 536 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 537 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 538 539 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 540 printf("%s: unsupported OHCI revision\n", 541 USBDEVNAME(sc->sc_bus.bdev)); 542 sc->sc_bus.usbrev = USBREV_UNKNOWN; 543 return (USBD_INVAL); 544 } 545 sc->sc_bus.usbrev = USBREV_1_0; 546 547 for (i = 0; i < OHCI_HASH_SIZE; i++) 548 LIST_INIT(&sc->sc_hash_tds[i]); 549 550 /* Allocate the HCCA area. */ 551 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 552 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 553 if (err) 554 return (err); 555 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 556 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 557 558 sc->sc_eintrs = OHCI_NORMAL_INTRS; 559 560 sc->sc_ctrl_head = ohci_alloc_sed(sc); 561 if (sc->sc_ctrl_head == NULL) { 562 err = USBD_NOMEM; 563 goto bad1; 564 } 565 sc->sc_ctrl_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 566 567 sc->sc_bulk_head = ohci_alloc_sed(sc); 568 if (sc->sc_bulk_head == NULL) { 569 err = USBD_NOMEM; 570 goto bad2; 571 } 572 sc->sc_bulk_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 573 574 /* Allocate all the dummy EDs that make up the interrupt tree. */ 575 for (i = 0; i < OHCI_NO_EDS; i++) { 576 sed = ohci_alloc_sed(sc); 577 if (sed == NULL) { 578 while (--i >= 0) 579 ohci_free_sed(sc, sc->sc_eds[i]); 580 err = USBD_NOMEM; 581 goto bad3; 582 } 583 /* All ED fields are set to 0. */ 584 sc->sc_eds[i] = sed; 585 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 586 if (i != 0) { 587 psed = sc->sc_eds[(i-1) / 2]; 588 sed->next = psed; 589 sed->ed.ed_nexted = LE(psed->physaddr); 590 } 591 } 592 /* 593 * Fill HCCA interrupt table. The bit reversal is to get 594 * the tree set up properly to spread the interrupts. 595 */ 596 for (i = 0; i < OHCI_NO_INTRS; i++) 597 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 598 LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 599 600 /* Determine in what context we are running. */ 601 ctl = OREAD4(sc, OHCI_CONTROL); 602 if (ctl & OHCI_IR) { 603 /* SMM active, request change */ 604 DPRINTF(("ohci_init: SMM active, request owner change\n")); 605 s = OREAD4(sc, OHCI_COMMAND_STATUS); 606 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 607 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 608 usb_delay_ms(&sc->sc_bus, 1); 609 ctl = OREAD4(sc, OHCI_CONTROL); 610 } 611 if ((ctl & OHCI_IR) == 0) { 612 printf("%s: SMM does not respond, resetting\n", 613 USBDEVNAME(sc->sc_bus.bdev)); 614 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 615 goto reset; 616 } 617 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 618 /* BIOS started controller. */ 619 DPRINTF(("ohci_init: BIOS active\n")); 620 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 621 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 622 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 623 } 624 } else { 625 DPRINTF(("ohci_init: cold started\n")); 626 reset: 627 /* Controller was cold started. */ 628 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 629 } 630 631 /* 632 * This reset should not be necessary according to the OHCI spec, but 633 * without it some controllers do not start. 634 */ 635 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 636 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 637 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 638 639 /* We now own the host controller and the bus has been reset. */ 640 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 641 642 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 643 /* Nominal time for a reset is 10 us. */ 644 for (i = 0; i < 10; i++) { 645 delay(10); 646 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 647 if (!hcr) 648 break; 649 } 650 if (hcr) { 651 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 652 err = USBD_IOERROR; 653 goto bad3; 654 } 655 #ifdef OHCI_DEBUG 656 if (ohcidebug > 15) 657 ohci_dumpregs(sc); 658 #endif 659 660 /* The controller is now in suspend state, we have 2ms to finish. */ 661 662 /* Set up HC registers. */ 663 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 664 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 665 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 666 /* disable all interrupts and then switch on all desired interrupts */ 667 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 668 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 669 /* switch on desired functional features */ 670 ctl = OREAD4(sc, OHCI_CONTROL); 671 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 672 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 673 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 674 /* And finally start it! */ 675 OWRITE4(sc, OHCI_CONTROL, ctl); 676 677 /* 678 * The controller is now OPERATIONAL. Set a some final 679 * registers that should be set earlier, but that the 680 * controller ignores when in the SUSPEND state. 681 */ 682 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 683 fm |= OHCI_FSMPS(ival) | ival; 684 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 685 per = OHCI_PERIODIC(ival); /* 90% periodic */ 686 OWRITE4(sc, OHCI_PERIODIC_START, per); 687 688 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 689 690 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 691 692 #ifdef OHCI_DEBUG 693 if (ohcidebug > 5) 694 ohci_dumpregs(sc); 695 #endif 696 697 /* Set up the bus struct. */ 698 sc->sc_bus.methods = &ohci_bus_methods; 699 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 700 701 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 702 703 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 704 705 return (USBD_NORMAL_COMPLETION); 706 707 bad3: 708 ohci_free_sed(sc, sc->sc_ctrl_head); 709 bad2: 710 ohci_free_sed(sc, sc->sc_bulk_head); 711 bad1: 712 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 713 return (err); 714 } 715 716 usbd_status 717 ohci_allocm(bus, dma, size) 718 struct usbd_bus *bus; 719 usb_dma_t *dma; 720 u_int32_t size; 721 { 722 #if defined(__NetBSD__) || defined(__OpenBSD__) 723 struct ohci_softc *sc = (struct ohci_softc *)bus; 724 #endif 725 726 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 727 } 728 729 void 730 ohci_freem(bus, dma) 731 struct usbd_bus *bus; 732 usb_dma_t *dma; 733 { 734 #if defined(__NetBSD__) || defined(__OpenBSD__) 735 struct ohci_softc *sc = (struct ohci_softc *)bus; 736 #endif 737 738 usb_freemem(&sc->sc_bus, dma); 739 } 740 741 /* 742 * Shut down the controller when the system is going down. 743 */ 744 void 745 ohci_shutdown(v) 746 void *v; 747 { 748 ohci_softc_t *sc = v; 749 750 DPRINTF(("ohci_shutdown: stopping the HC\n")); 751 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 752 } 753 754 /* 755 * Handle suspend/resume. 756 * 757 * We need to switch to polling mode here, because this routine is 758 * called from an intterupt context. This is all right since we 759 * are almost suspended anyway. 760 */ 761 void 762 ohci_power(why, v) 763 int why; 764 void *v; 765 { 766 #ifdef OHCI_DEBUG 767 ohci_softc_t *sc = v; 768 769 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 770 /* XXX should suspend/resume */ 771 ohci_dumpregs(sc); 772 #endif 773 } 774 775 #ifdef OHCI_DEBUG 776 void 777 ohci_dumpregs(sc) 778 ohci_softc_t *sc; 779 { 780 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 781 OREAD4(sc, OHCI_REVISION), 782 OREAD4(sc, OHCI_CONTROL), 783 OREAD4(sc, OHCI_COMMAND_STATUS))); 784 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 785 OREAD4(sc, OHCI_INTERRUPT_STATUS), 786 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 787 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 788 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 789 OREAD4(sc, OHCI_HCCA), 790 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 791 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 792 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 793 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 794 OREAD4(sc, OHCI_BULK_HEAD_ED), 795 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 796 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 797 OREAD4(sc, OHCI_DONE_HEAD), 798 OREAD4(sc, OHCI_FM_INTERVAL), 799 OREAD4(sc, OHCI_FM_REMAINING))); 800 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 801 OREAD4(sc, OHCI_FM_NUMBER), 802 OREAD4(sc, OHCI_PERIODIC_START), 803 OREAD4(sc, OHCI_LS_THRESHOLD))); 804 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 805 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 806 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 807 OREAD4(sc, OHCI_RH_STATUS))); 808 DPRINTF((" port1=0x%08x port2=0x%08x\n", 809 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 810 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 811 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 812 LE(sc->sc_hcca->hcca_frame_number), 813 LE(sc->sc_hcca->hcca_done_head))); 814 } 815 #endif 816 817 static int ohci_intr1 __P((ohci_softc_t *)); 818 819 int 820 ohci_intr(p) 821 void *p; 822 { 823 ohci_softc_t *sc = p; 824 825 /* If we get an interrupt while polling, then just ignore it. */ 826 if (sc->sc_bus.use_polling) { 827 #ifdef DIAGNOSTIC 828 printf("ohci_intr: ignored interrupt while polling\n"); 829 #endif 830 return (0); 831 } 832 833 return (ohci_intr1(sc)); 834 } 835 836 static int 837 ohci_intr1(sc) 838 ohci_softc_t *sc; 839 { 840 u_int32_t intrs, eintrs; 841 ohci_physaddr_t done; 842 843 /* In case the interrupt occurs before initialization has completed. */ 844 if (sc == NULL || sc->sc_hcca == NULL) { 845 #ifdef DIAGNOSTIC 846 printf("ohci_intr: sc->sc_hcca == NULL\n"); 847 #endif 848 return (0); 849 } 850 851 intrs = 0; 852 done = LE(sc->sc_hcca->hcca_done_head); 853 if (done != 0) { 854 sc->sc_hcca->hcca_done_head = 0; 855 if (done & ~OHCI_DONE_INTRS) 856 intrs = OHCI_WDH; 857 if (done & OHCI_DONE_INTRS) 858 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 859 } else 860 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 861 862 if (!intrs) 863 return (0); 864 865 intrs &= ~OHCI_MIE; 866 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 867 eintrs = intrs & sc->sc_eintrs; 868 if (!eintrs) 869 return (0); 870 871 sc->sc_bus.intr_context++; 872 sc->sc_bus.no_intrs++; 873 DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n", 874 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 875 (u_int)eintrs)); 876 877 if (eintrs & OHCI_SO) { 878 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev)); 879 /* XXX do what */ 880 intrs &= ~OHCI_SO; 881 } 882 if (eintrs & OHCI_WDH) { 883 ohci_process_done(sc, done &~ OHCI_DONE_INTRS); 884 intrs &= ~OHCI_WDH; 885 } 886 if (eintrs & OHCI_RD) { 887 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 888 /* XXX process resume detect */ 889 } 890 if (eintrs & OHCI_UE) { 891 printf("%s: unrecoverable error, controller halted\n", 892 USBDEVNAME(sc->sc_bus.bdev)); 893 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 894 /* XXX what else */ 895 } 896 if (eintrs & OHCI_RHSC) { 897 ohci_rhsc(sc, sc->sc_intrxfer); 898 intrs &= ~OHCI_RHSC; 899 900 /* 901 * Disable RHSC interrupt for now, because it will be 902 * on until the port has been reset. 903 */ 904 ohci_rhsc_able(sc, 0); 905 } 906 907 sc->sc_bus.intr_context--; 908 909 /* Block unprocessed interrupts. XXX */ 910 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 911 sc->sc_eintrs &= ~intrs; 912 913 return (1); 914 } 915 916 void 917 ohci_rhsc_able(sc, on) 918 ohci_softc_t *sc; 919 int on; 920 { 921 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 922 if (on) { 923 sc->sc_eintrs |= OHCI_RHSC; 924 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 925 } else { 926 sc->sc_eintrs &= ~OHCI_RHSC; 927 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 928 } 929 } 930 931 #ifdef OHCI_DEBUG 932 char *ohci_cc_strs[] = { 933 "NO_ERROR", 934 "CRC", 935 "BIT_STUFFING", 936 "DATA_TOGGLE_MISMATCH", 937 "STALL", 938 "DEVICE_NOT_RESPONDING", 939 "PID_CHECK_FAILURE", 940 "UNEXPECTED_PID", 941 "DATA_OVERRUN", 942 "DATA_UNDERRUN", 943 "BUFFER_OVERRUN", 944 "BUFFER_UNDERRUN", 945 "NOT_ACCESSED", 946 }; 947 #endif 948 949 void 950 ohci_process_done(sc, done) 951 ohci_softc_t *sc; 952 ohci_physaddr_t done; 953 { 954 ohci_soft_td_t *std, *sdone, *stdnext; 955 usbd_xfer_handle xfer; 956 int len, cc; 957 958 DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done)); 959 960 /* Reverse the done list. */ 961 for (sdone = 0; done; done = LE(std->td.td_nexttd)) { 962 std = ohci_hash_find_td(sc, done); 963 std->dnext = sdone; 964 sdone = std; 965 } 966 967 #ifdef OHCI_DEBUG 968 if (ohcidebug > 10) { 969 DPRINTF(("ohci_process_done: TD done:\n")); 970 ohci_dump_tds(sdone); 971 } 972 #endif 973 974 for (std = sdone; std; std = stdnext) { 975 xfer = std->xfer; 976 stdnext = std->dnext; 977 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 978 std, xfer, xfer->hcpriv)); 979 cc = OHCI_TD_GET_CC(LE(std->td.td_flags)); 980 usb_untimeout(ohci_timeout, xfer, xfer->timo_handle); 981 if (xfer->status == USBD_CANCELLED || 982 xfer->status == USBD_TIMEOUT) { 983 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 984 xfer)); 985 /* Handled by abort routine. */ 986 } else if (cc == OHCI_CC_NO_ERROR) { 987 len = std->len; 988 if (std->td.td_cbp != 0) 989 len -= LE(std->td.td_be) - 990 LE(std->td.td_cbp) + 1; 991 if (std->flags & OHCI_ADD_LEN) 992 xfer->actlen += len; 993 if (std->flags & OHCI_CALL_DONE) { 994 xfer->status = USBD_NORMAL_COMPLETION; 995 usb_transfer_complete(xfer); 996 } 997 ohci_hash_rem_td(sc, std); 998 ohci_free_std(sc, std); 999 } else { 1000 /* 1001 * Endpoint is halted. First unlink all the TDs 1002 * belonging to the failed transfer, and then restart 1003 * the endpoint. 1004 */ 1005 ohci_soft_td_t *p, *n; 1006 struct ohci_pipe *opipe = 1007 (struct ohci_pipe *)xfer->pipe; 1008 1009 DPRINTF(("ohci_process_done: error cc=%d (%s)\n", 1010 OHCI_TD_GET_CC(LE(std->td.td_flags)), 1011 ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td.td_flags))])); 1012 1013 /* remove TDs */ 1014 for (p = std; p->xfer == xfer; p = n) { 1015 n = p->nexttd; 1016 ohci_hash_rem_td(sc, p); 1017 ohci_free_std(sc, p); 1018 } 1019 1020 /* clear halt */ 1021 opipe->sed->ed.ed_headp = LE(p->physaddr); 1022 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1023 1024 if (cc == OHCI_CC_STALL) 1025 xfer->status = USBD_STALLED; 1026 else 1027 xfer->status = USBD_IOERROR; 1028 usb_transfer_complete(xfer); 1029 } 1030 } 1031 } 1032 1033 void 1034 ohci_device_ctrl_done(xfer) 1035 usbd_xfer_handle xfer; 1036 { 1037 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1038 1039 #ifdef DIAGNOSTIC 1040 if (!(xfer->rqflags & URQ_REQUEST)) { 1041 panic("ohci_ctrl_done: not a request\n"); 1042 } 1043 #endif 1044 xfer->hcpriv = NULL; 1045 } 1046 1047 void 1048 ohci_device_intr_done(xfer) 1049 usbd_xfer_handle xfer; 1050 { 1051 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1052 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1053 ohci_soft_ed_t *sed = opipe->sed; 1054 ohci_soft_td_t *data, *tail; 1055 1056 1057 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1058 xfer, xfer->actlen)); 1059 1060 xfer->hcpriv = NULL; 1061 1062 if (xfer->pipe->repeat) { 1063 data = opipe->tail; 1064 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1065 if (tail == NULL) { 1066 xfer->status = USBD_NOMEM; 1067 return; 1068 } 1069 tail->xfer = NULL; 1070 1071 data->td.td_flags = LE( 1072 OHCI_TD_IN | OHCI_TD_NOCC | 1073 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1074 if (xfer->flags & USBD_SHORT_XFER_OK) 1075 data->td.td_flags |= LE(OHCI_TD_R); 1076 data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf)); 1077 data->nexttd = tail; 1078 data->td.td_nexttd = LE(tail->physaddr); 1079 data->td.td_be = LE(LE(data->td.td_cbp) + xfer->length - 1); 1080 data->len = xfer->length; 1081 data->xfer = xfer; 1082 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1083 xfer->hcpriv = data; 1084 xfer->actlen = 0; 1085 1086 ohci_hash_add_td(sc, data); 1087 sed->ed.ed_tailp = LE(tail->physaddr); 1088 opipe->tail = tail; 1089 } 1090 } 1091 1092 void 1093 ohci_device_bulk_done(xfer) 1094 usbd_xfer_handle xfer; 1095 { 1096 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1097 xfer, xfer->actlen)); 1098 1099 xfer->hcpriv = NULL; 1100 } 1101 1102 void 1103 ohci_rhsc(sc, xfer) 1104 ohci_softc_t *sc; 1105 usbd_xfer_handle xfer; 1106 { 1107 usbd_pipe_handle pipe; 1108 struct ohci_pipe *opipe; 1109 u_char *p; 1110 int i, m; 1111 int hstatus; 1112 1113 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1114 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1115 sc, xfer, hstatus)); 1116 1117 if (xfer == NULL) { 1118 /* Just ignore the change. */ 1119 return; 1120 } 1121 1122 pipe = xfer->pipe; 1123 opipe = (struct ohci_pipe *)pipe; 1124 1125 p = KERNADDR(&xfer->dmabuf); 1126 m = min(sc->sc_noport, xfer->length * 8 - 1); 1127 memset(p, 0, xfer->length); 1128 for (i = 1; i <= m; i++) { 1129 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1130 p[i/8] |= 1 << (i%8); 1131 } 1132 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1133 xfer->actlen = xfer->length; 1134 xfer->status = USBD_NORMAL_COMPLETION; 1135 1136 usb_transfer_complete(xfer); 1137 } 1138 1139 void 1140 ohci_root_intr_done(xfer) 1141 usbd_xfer_handle xfer; 1142 { 1143 xfer->hcpriv = NULL; 1144 } 1145 1146 /* 1147 * Wait here until controller claims to have an interrupt. 1148 * Then call ohci_intr and return. Use timeout to avoid waiting 1149 * too long. 1150 */ 1151 void 1152 ohci_waitintr(sc, xfer) 1153 ohci_softc_t *sc; 1154 usbd_xfer_handle xfer; 1155 { 1156 int timo = xfer->timeout; 1157 int usecs; 1158 u_int32_t intrs; 1159 1160 xfer->status = USBD_IN_PROGRESS; 1161 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1162 usb_delay_ms(&sc->sc_bus, 1); 1163 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1164 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1165 #ifdef OHCI_DEBUG 1166 if (ohcidebug > 15) 1167 ohci_dumpregs(sc); 1168 #endif 1169 if (intrs) { 1170 ohci_intr1(sc); 1171 if (xfer->status != USBD_IN_PROGRESS) 1172 return; 1173 } 1174 } 1175 1176 /* Timeout */ 1177 DPRINTF(("ohci_waitintr: timeout\n")); 1178 xfer->status = USBD_TIMEOUT; 1179 usb_transfer_complete(xfer); 1180 /* XXX should free TD */ 1181 } 1182 1183 void 1184 ohci_poll(bus) 1185 struct usbd_bus *bus; 1186 { 1187 ohci_softc_t *sc = (ohci_softc_t *)bus; 1188 1189 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1190 ohci_intr1(sc); 1191 } 1192 1193 usbd_status 1194 ohci_device_request(xfer) 1195 usbd_xfer_handle xfer; 1196 { 1197 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1198 usb_device_request_t *req = &xfer->request; 1199 usbd_device_handle dev = opipe->pipe.device; 1200 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1201 int addr = dev->address; 1202 ohci_soft_td_t *setup, *data = 0, *stat, *next, *tail; 1203 ohci_soft_ed_t *sed; 1204 int isread; 1205 int len; 1206 usbd_status err; 1207 int s; 1208 1209 isread = req->bmRequestType & UT_READ; 1210 len = UGETW(req->wLength); 1211 1212 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1213 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1214 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1215 UGETW(req->wIndex), len, addr, 1216 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1217 1218 setup = opipe->tail; 1219 stat = ohci_alloc_std(sc); 1220 if (stat == NULL) { 1221 err = USBD_NOMEM; 1222 goto bad1; 1223 } 1224 tail = ohci_alloc_std(sc); 1225 if (tail == NULL) { 1226 err = USBD_NOMEM; 1227 goto bad2; 1228 } 1229 tail->xfer = NULL; 1230 1231 sed = opipe->sed; 1232 opipe->u.ctl.length = len; 1233 1234 /* Update device address and length since they may have changed. */ 1235 /* XXX This only needs to be done once, but it's too early in open. */ 1236 sed->ed.ed_flags = LE( 1237 (LE(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1238 OHCI_ED_SET_FA(addr) | 1239 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1240 1241 /* Set up data transaction */ 1242 if (len != 0) { 1243 data = ohci_alloc_std(sc); 1244 if (data == NULL) { 1245 err = USBD_NOMEM; 1246 goto bad3; 1247 } 1248 data->td.td_flags = LE( 1249 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 1250 OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR | 1251 (xfer->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0)); 1252 data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf)); 1253 data->nexttd = stat; 1254 data->td.td_nexttd = LE(stat->physaddr); 1255 data->td.td_be = LE(LE(data->td.td_cbp) + len - 1); 1256 data->len = len; 1257 data->xfer = xfer; 1258 data->flags = OHCI_ADD_LEN; 1259 1260 next = data; 1261 stat->flags = OHCI_CALL_DONE; 1262 } else { 1263 next = stat; 1264 /* XXX ADD_LEN? */ 1265 stat->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1266 } 1267 1268 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1269 1270 setup->td.td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC | 1271 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1272 setup->td.td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma)); 1273 setup->nexttd = next; 1274 setup->td.td_nexttd = LE(next->physaddr); 1275 setup->td.td_be = LE(LE(setup->td.td_cbp) + sizeof *req - 1); 1276 setup->len = 0; /* XXX The number of byte we count */ 1277 setup->xfer = xfer; 1278 setup->flags = 0; 1279 xfer->hcpriv = setup; 1280 1281 stat->td.td_flags = LE( 1282 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC | 1283 OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1284 stat->td.td_cbp = 0; 1285 stat->nexttd = tail; 1286 stat->td.td_nexttd = LE(tail->physaddr); 1287 stat->td.td_be = 0; 1288 stat->len = 0; 1289 stat->xfer = xfer; 1290 1291 #ifdef OHCI_DEBUG 1292 if (ohcidebug > 5) { 1293 DPRINTF(("ohci_device_request:\n")); 1294 ohci_dump_ed(sed); 1295 ohci_dump_tds(setup); 1296 } 1297 #endif 1298 1299 /* Insert ED in schedule */ 1300 s = splusb(); 1301 ohci_hash_add_td(sc, setup); 1302 if (len != 0) 1303 ohci_hash_add_td(sc, data); 1304 ohci_hash_add_td(sc, stat); 1305 sed->ed.ed_tailp = LE(tail->physaddr); 1306 opipe->tail = tail; 1307 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1308 if (xfer->timeout && !sc->sc_bus.use_polling) { 1309 usb_timeout(ohci_timeout, xfer, 1310 MS_TO_TICKS(xfer->timeout), xfer->timo_handle); 1311 } 1312 splx(s); 1313 1314 #ifdef OHCI_DEBUG 1315 if (ohcidebug > 5) { 1316 usb_delay_ms(&sc->sc_bus, 5); 1317 DPRINTF(("ohci_device_request: status=%x\n", 1318 OREAD4(sc, OHCI_COMMAND_STATUS))); 1319 ohci_dump_ed(sed); 1320 ohci_dump_tds(setup); 1321 } 1322 #endif 1323 1324 return (USBD_NORMAL_COMPLETION); 1325 1326 bad3: 1327 ohci_free_std(sc, tail); 1328 bad2: 1329 ohci_free_std(sc, stat); 1330 bad1: 1331 return (err); 1332 } 1333 1334 /* 1335 * Add an ED to the schedule. Called at splusb(). 1336 */ 1337 void 1338 ohci_add_ed(sed, head) 1339 ohci_soft_ed_t *sed; 1340 ohci_soft_ed_t *head; 1341 { 1342 SPLUSBCHECK; 1343 sed->next = head->next; 1344 sed->ed.ed_nexted = head->ed.ed_nexted; 1345 head->next = sed; 1346 head->ed.ed_nexted = LE(sed->physaddr); 1347 } 1348 1349 /* 1350 * Remove an ED from the schedule. Called at splusb(). 1351 */ 1352 void 1353 ohci_rem_ed(sed, head) 1354 ohci_soft_ed_t *sed; 1355 ohci_soft_ed_t *head; 1356 { 1357 ohci_soft_ed_t *p; 1358 1359 SPLUSBCHECK; 1360 1361 /* XXX */ 1362 for (p = head; p == NULL && p->next != sed; p = p->next) 1363 ; 1364 if (p == NULL) 1365 panic("ohci_rem_ed: ED not found\n"); 1366 p->next = sed->next; 1367 p->ed.ed_nexted = sed->ed.ed_nexted; 1368 } 1369 1370 /* 1371 * When a transfer is completed the TD is added to the done queue by 1372 * the host controller. This queue is the processed by software. 1373 * Unfortunately the queue contains the physical address of the TD 1374 * and we have no simple way to translate this back to a kernel address. 1375 * To make the translation possible (and fast) we use a hash table of 1376 * TDs currently in the schedule. The physical address is used as the 1377 * hash value. 1378 */ 1379 1380 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1381 /* Called at splusb() */ 1382 void 1383 ohci_hash_add_td(sc, std) 1384 ohci_softc_t *sc; 1385 ohci_soft_td_t *std; 1386 { 1387 int h = HASH(std->physaddr); 1388 1389 SPLUSBCHECK; 1390 1391 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1392 } 1393 1394 /* Called at splusb() */ 1395 void 1396 ohci_hash_rem_td(sc, std) 1397 ohci_softc_t *sc; 1398 ohci_soft_td_t *std; 1399 { 1400 SPLUSBCHECK; 1401 1402 LIST_REMOVE(std, hnext); 1403 } 1404 1405 ohci_soft_td_t * 1406 ohci_hash_find_td(sc, a) 1407 ohci_softc_t *sc; 1408 ohci_physaddr_t a; 1409 { 1410 int h = HASH(a); 1411 ohci_soft_td_t *std; 1412 1413 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1414 std != NULL; 1415 std = LIST_NEXT(std, hnext)) 1416 if (std->physaddr == a) 1417 return (std); 1418 panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a); 1419 } 1420 1421 void 1422 ohci_timeout(addr) 1423 void *addr; 1424 { 1425 usbd_xfer_handle xfer = addr; 1426 int s; 1427 1428 DPRINTF(("ohci_timeout: xfer=%p\n", xfer)); 1429 1430 s = splusb(); 1431 xfer->device->bus->intr_context++; 1432 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1433 xfer->device->bus->intr_context--; 1434 splx(s); 1435 } 1436 1437 #ifdef OHCI_DEBUG 1438 void 1439 ohci_dump_tds(std) 1440 ohci_soft_td_t *std; 1441 { 1442 for (; std; std = std->nexttd) 1443 ohci_dump_td(std); 1444 } 1445 1446 void 1447 ohci_dump_td(std) 1448 ohci_soft_td_t *std; 1449 { 1450 DPRINTF(("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1451 "nexttd=0x%08lx be=0x%08lx\n", 1452 std, (u_long)std->physaddr, 1453 (int)LE(std->td.td_flags), 1454 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1455 OHCI_TD_GET_DI(LE(std->td.td_flags)), 1456 OHCI_TD_GET_EC(LE(std->td.td_flags)), 1457 OHCI_TD_GET_CC(LE(std->td.td_flags)), 1458 (u_long)LE(std->td.td_cbp), 1459 (u_long)LE(std->td.td_nexttd), (u_long)LE(std->td.td_be))); 1460 } 1461 1462 void 1463 ohci_dump_ed(sed) 1464 ohci_soft_ed_t *sed; 1465 { 1466 DPRINTF(("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx " 1467 "headp=%b nexted=0x%08lx\n", 1468 sed, (u_long)sed->physaddr, 1469 OHCI_ED_GET_FA(LE(sed->ed.ed_flags)), 1470 OHCI_ED_GET_EN(LE(sed->ed.ed_flags)), 1471 OHCI_ED_GET_MAXP(LE(sed->ed.ed_flags)), 1472 (int)LE(sed->ed.ed_flags), 1473 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1474 (u_long)LE(sed->ed.ed_tailp), 1475 (u_long)LE(sed->ed.ed_headp), 1476 "\20\1HALT\2CARRY", 1477 (u_long)LE(sed->ed.ed_nexted))); 1478 } 1479 #endif 1480 1481 usbd_status 1482 ohci_open(pipe) 1483 usbd_pipe_handle pipe; 1484 { 1485 usbd_device_handle dev = pipe->device; 1486 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1487 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1488 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1489 u_int8_t addr = dev->address; 1490 ohci_soft_ed_t *sed; 1491 ohci_soft_td_t *std; 1492 usbd_status err; 1493 int s; 1494 1495 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1496 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1497 if (addr == sc->sc_addr) { 1498 switch (ed->bEndpointAddress) { 1499 case USB_CONTROL_ENDPOINT: 1500 pipe->methods = &ohci_root_ctrl_methods; 1501 break; 1502 case UE_DIR_IN | OHCI_INTR_ENDPT: 1503 pipe->methods = &ohci_root_intr_methods; 1504 break; 1505 default: 1506 return (USBD_INVAL); 1507 } 1508 } else { 1509 sed = ohci_alloc_sed(sc); 1510 if (sed == NULL) 1511 goto bad0; 1512 std = ohci_alloc_std(sc); 1513 if (std == NULL) 1514 goto bad1; 1515 opipe->sed = sed; 1516 opipe->tail = std; 1517 sed->ed.ed_flags = LE( 1518 OHCI_ED_SET_FA(addr) | 1519 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1520 OHCI_ED_DIR_TD | 1521 (dev->lowspeed ? OHCI_ED_SPEED : 0) | 1522 ((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ? 1523 OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) | 1524 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1525 sed->ed.ed_headp = sed->ed.ed_tailp = LE(std->physaddr); 1526 1527 switch (ed->bmAttributes & UE_XFERTYPE) { 1528 case UE_CONTROL: 1529 pipe->methods = &ohci_device_ctrl_methods; 1530 err = usb_allocmem(&sc->sc_bus, 1531 sizeof(usb_device_request_t), 1532 0, &opipe->u.ctl.reqdma); 1533 if (err) 1534 goto bad; 1535 s = splusb(); 1536 ohci_add_ed(sed, sc->sc_ctrl_head); 1537 splx(s); 1538 break; 1539 case UE_INTERRUPT: 1540 pipe->methods = &ohci_device_intr_methods; 1541 return (ohci_device_setintr(sc, opipe, ed->bInterval)); 1542 case UE_ISOCHRONOUS: 1543 printf("ohci_open: open iso unimplemented\n"); 1544 return (USBD_INVAL); 1545 case UE_BULK: 1546 pipe->methods = &ohci_device_bulk_methods; 1547 s = splusb(); 1548 ohci_add_ed(sed, sc->sc_bulk_head); 1549 splx(s); 1550 break; 1551 } 1552 } 1553 return (USBD_NORMAL_COMPLETION); 1554 1555 bad: 1556 ohci_free_std(sc, std); 1557 bad1: 1558 ohci_free_sed(sc, sed); 1559 bad0: 1560 return (USBD_NOMEM); 1561 1562 } 1563 1564 /* 1565 * Close a reqular pipe. 1566 * Assumes that there are no pending transactions. 1567 */ 1568 void 1569 ohci_close_pipe(pipe, head) 1570 usbd_pipe_handle pipe; 1571 ohci_soft_ed_t *head; 1572 { 1573 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1574 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1575 ohci_soft_ed_t *sed = opipe->sed; 1576 int s; 1577 1578 s = splusb(); 1579 #ifdef DIAGNOSTIC 1580 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 1581 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 1582 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) { 1583 ohci_physaddr_t td = sed->ed.ed_headp; 1584 ohci_soft_td_t *std; 1585 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]); 1586 std != NULL; 1587 std = LIST_NEXT(std, hnext)) 1588 if (std->physaddr == td) 1589 break; 1590 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 1591 "tl=0x%x pipe=%p, std=%p\n", sed, 1592 (int)LE(sed->ed.ed_headp), (int)LE(sed->ed.ed_tailp), 1593 pipe, std); 1594 usb_delay_ms(&sc->sc_bus, 2); 1595 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 1596 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) 1597 printf("ohci_close_pipe: pipe still not empty\n"); 1598 } 1599 #endif 1600 ohci_rem_ed(sed, head); 1601 splx(s); 1602 ohci_free_std(sc, opipe->tail); 1603 ohci_free_sed(sc, opipe->sed); 1604 } 1605 1606 /* 1607 * Abort a device request. 1608 * If this routine is called at splusb() it guarantees that the request 1609 * will be removed from the hardware scheduling and that the callback 1610 * for it will be called with USBD_CANCELLED status. 1611 * It's impossible to guarantee that the requested transfer will not 1612 * have happened since the hardware runs concurrently. 1613 * If the transaction has already happened we rely on the ordinary 1614 * interrupt processing to process it. 1615 */ 1616 void 1617 ohci_abort_xfer(xfer, status) 1618 usbd_xfer_handle xfer; 1619 usbd_status status; 1620 { 1621 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1622 ohci_soft_ed_t *sed; 1623 1624 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p\n", xfer, opipe)); 1625 1626 xfer->status = status; 1627 1628 usb_untimeout(ohci_timeout, xfer, xfer->timo_handle); 1629 1630 sed = opipe->sed; 1631 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 1632 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); /* force hardware skip */ 1633 1634 if (xfer->device->bus->intr_context) { 1635 /* We have no process context, so we can't use tsleep(). */ 1636 timeout(ohci_abort_xfer_end, xfer, hz / USB_FRAMES_PER_SECOND); 1637 } else { 1638 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 1639 KASSERT(intr_nesting_level == 0, 1640 ("ohci_abort_req in interrupt context")); 1641 #endif 1642 usb_delay_ms(opipe->pipe.device->bus, 1); 1643 ohci_abort_xfer_end(xfer); 1644 } 1645 } 1646 1647 void 1648 ohci_abort_xfer_end(v) 1649 void *v; 1650 { 1651 usbd_xfer_handle xfer = v; 1652 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1653 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1654 ohci_soft_ed_t *sed; 1655 ohci_soft_td_t *p, *n; 1656 int s; 1657 1658 s = splusb(); 1659 1660 p = xfer->hcpriv; 1661 #ifdef DIAGNOSTIC 1662 if (p == NULL) { 1663 printf("ohci_abort_xfer: hcpriv==0\n"); 1664 return; 1665 } 1666 #endif 1667 for (; p->xfer == xfer; p = n) { 1668 n = p->nexttd; 1669 ohci_hash_rem_td(sc, p); 1670 ohci_free_std(sc, p); 1671 } 1672 1673 sed = opipe->sed; 1674 DPRINTFN(2,("ohci_abort_xfer: set hd=%x, tl=%x\n", 1675 (int)LE(p->physaddr), (int)LE(sed->ed.ed_tailp))); 1676 sed->ed.ed_headp = p->physaddr; /* unlink TDs */ 1677 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); /* remove hardware skip */ 1678 1679 usb_transfer_complete(xfer); 1680 1681 splx(s); 1682 } 1683 1684 /* 1685 * Data structures and routines to emulate the root hub. 1686 */ 1687 static usb_device_descriptor_t ohci_devd = { 1688 USB_DEVICE_DESCRIPTOR_SIZE, 1689 UDESC_DEVICE, /* type */ 1690 {0x00, 0x01}, /* USB version */ 1691 UCLASS_HUB, /* class */ 1692 USUBCLASS_HUB, /* subclass */ 1693 0, /* protocol */ 1694 64, /* max packet */ 1695 {0},{0},{0x00,0x01}, /* device id */ 1696 1,2,0, /* string indicies */ 1697 1 /* # of configurations */ 1698 }; 1699 1700 static usb_config_descriptor_t ohci_confd = { 1701 USB_CONFIG_DESCRIPTOR_SIZE, 1702 UDESC_CONFIG, 1703 {USB_CONFIG_DESCRIPTOR_SIZE + 1704 USB_INTERFACE_DESCRIPTOR_SIZE + 1705 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1706 1, 1707 1, 1708 0, 1709 UC_SELF_POWERED, 1710 0 /* max power */ 1711 }; 1712 1713 static usb_interface_descriptor_t ohci_ifcd = { 1714 USB_INTERFACE_DESCRIPTOR_SIZE, 1715 UDESC_INTERFACE, 1716 0, 1717 0, 1718 1, 1719 UCLASS_HUB, 1720 USUBCLASS_HUB, 1721 0, 1722 0 1723 }; 1724 1725 static usb_endpoint_descriptor_t ohci_endpd = { 1726 USB_ENDPOINT_DESCRIPTOR_SIZE, 1727 UDESC_ENDPOINT, 1728 UE_DIR_IN | OHCI_INTR_ENDPT, 1729 UE_INTERRUPT, 1730 {8, 0}, /* max packet */ 1731 255 1732 }; 1733 1734 static usb_hub_descriptor_t ohci_hubd = { 1735 USB_HUB_DESCRIPTOR_SIZE, 1736 UDESC_HUB, 1737 0, 1738 {0,0}, 1739 0, 1740 0, 1741 {0}, 1742 }; 1743 1744 static int 1745 ohci_str(p, l, s) 1746 usb_string_descriptor_t *p; 1747 int l; 1748 char *s; 1749 { 1750 int i; 1751 1752 if (l == 0) 1753 return (0); 1754 p->bLength = 2 * strlen(s) + 2; 1755 if (l == 1) 1756 return (1); 1757 p->bDescriptorType = UDESC_STRING; 1758 l -= 2; 1759 for (i = 0; s[i] && l > 1; i++, l -= 2) 1760 USETW2(p->bString[i], 0, s[i]); 1761 return (2*i+2); 1762 } 1763 1764 /* 1765 * Simulate a hardware hub by handling all the necessary requests. 1766 */ 1767 static usbd_status 1768 ohci_root_ctrl_transfer(xfer) 1769 usbd_xfer_handle xfer; 1770 { 1771 usbd_status err; 1772 1773 /* Insert last in queue. */ 1774 err = usb_insert_transfer(xfer); 1775 if (err) 1776 return (err); 1777 1778 /* Pipe isn't running, start first */ 1779 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1780 } 1781 1782 static usbd_status 1783 ohci_root_ctrl_start(xfer) 1784 usbd_xfer_handle xfer; 1785 { 1786 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 1787 usb_device_request_t *req; 1788 void *buf = NULL; 1789 int port, i; 1790 int s, len, value, index, l, totlen = 0; 1791 usb_port_status_t ps; 1792 usb_hub_descriptor_t hubd; 1793 usbd_status err; 1794 u_int32_t v; 1795 1796 #ifdef DIAGNOSTIC 1797 if (!(xfer->rqflags & URQ_REQUEST)) 1798 /* XXX panic */ 1799 return (USBD_INVAL); 1800 #endif 1801 req = &xfer->request; 1802 1803 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 1804 req->bmRequestType, req->bRequest)); 1805 1806 len = UGETW(req->wLength); 1807 value = UGETW(req->wValue); 1808 index = UGETW(req->wIndex); 1809 1810 if (len != 0) 1811 buf = KERNADDR(&xfer->dmabuf); 1812 1813 #define C(x,y) ((x) | ((y) << 8)) 1814 switch(C(req->bRequest, req->bmRequestType)) { 1815 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1816 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1817 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1818 /* 1819 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1820 * for the integrated root hub. 1821 */ 1822 break; 1823 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1824 if (len > 0) { 1825 *(u_int8_t *)buf = sc->sc_conf; 1826 totlen = 1; 1827 } 1828 break; 1829 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1830 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 1831 switch(value >> 8) { 1832 case UDESC_DEVICE: 1833 if ((value & 0xff) != 0) { 1834 err = USBD_IOERROR; 1835 goto ret; 1836 } 1837 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1838 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 1839 memcpy(buf, &ohci_devd, l); 1840 break; 1841 case UDESC_CONFIG: 1842 if ((value & 0xff) != 0) { 1843 err = USBD_IOERROR; 1844 goto ret; 1845 } 1846 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1847 memcpy(buf, &ohci_confd, l); 1848 buf = (char *)buf + l; 1849 len -= l; 1850 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1851 totlen += l; 1852 memcpy(buf, &ohci_ifcd, l); 1853 buf = (char *)buf + l; 1854 len -= l; 1855 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1856 totlen += l; 1857 memcpy(buf, &ohci_endpd, l); 1858 break; 1859 case UDESC_STRING: 1860 if (len == 0) 1861 break; 1862 *(u_int8_t *)buf = 0; 1863 totlen = 1; 1864 switch (value & 0xff) { 1865 case 1: /* Vendor */ 1866 totlen = ohci_str(buf, len, sc->sc_vendor); 1867 break; 1868 case 2: /* Product */ 1869 totlen = ohci_str(buf, len, "OHCI root hub"); 1870 break; 1871 } 1872 break; 1873 default: 1874 err = USBD_IOERROR; 1875 goto ret; 1876 } 1877 break; 1878 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1879 if (len > 0) { 1880 *(u_int8_t *)buf = 0; 1881 totlen = 1; 1882 } 1883 break; 1884 case C(UR_GET_STATUS, UT_READ_DEVICE): 1885 if (len > 1) { 1886 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1887 totlen = 2; 1888 } 1889 break; 1890 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1891 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1892 if (len > 1) { 1893 USETW(((usb_status_t *)buf)->wStatus, 0); 1894 totlen = 2; 1895 } 1896 break; 1897 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1898 if (value >= USB_MAX_DEVICES) { 1899 err = USBD_IOERROR; 1900 goto ret; 1901 } 1902 sc->sc_addr = value; 1903 break; 1904 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1905 if (value != 0 && value != 1) { 1906 err = USBD_IOERROR; 1907 goto ret; 1908 } 1909 sc->sc_conf = value; 1910 break; 1911 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1912 break; 1913 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1914 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1915 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1916 err = USBD_IOERROR; 1917 goto ret; 1918 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1919 break; 1920 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1921 break; 1922 /* Hub requests */ 1923 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1924 break; 1925 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1926 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 1927 "port=%d feature=%d\n", 1928 index, value)); 1929 if (index < 1 || index > sc->sc_noport) { 1930 err = USBD_IOERROR; 1931 goto ret; 1932 } 1933 port = OHCI_RH_PORT_STATUS(index); 1934 switch(value) { 1935 case UHF_PORT_ENABLE: 1936 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 1937 break; 1938 case UHF_PORT_SUSPEND: 1939 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 1940 break; 1941 case UHF_PORT_POWER: 1942 OWRITE4(sc, port, UPS_LOW_SPEED); 1943 break; 1944 case UHF_C_PORT_CONNECTION: 1945 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 1946 break; 1947 case UHF_C_PORT_ENABLE: 1948 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 1949 break; 1950 case UHF_C_PORT_SUSPEND: 1951 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 1952 break; 1953 case UHF_C_PORT_OVER_CURRENT: 1954 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 1955 break; 1956 case UHF_C_PORT_RESET: 1957 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 1958 break; 1959 default: 1960 err = USBD_IOERROR; 1961 goto ret; 1962 } 1963 switch(value) { 1964 case UHF_C_PORT_CONNECTION: 1965 case UHF_C_PORT_ENABLE: 1966 case UHF_C_PORT_SUSPEND: 1967 case UHF_C_PORT_OVER_CURRENT: 1968 case UHF_C_PORT_RESET: 1969 /* Enable RHSC interrupt if condition is cleared. */ 1970 if ((OREAD4(sc, port) >> 16) == 0) 1971 ohci_rhsc_able(sc, 1); 1972 break; 1973 default: 1974 break; 1975 } 1976 break; 1977 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1978 if (value != 0) { 1979 err = USBD_IOERROR; 1980 goto ret; 1981 } 1982 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 1983 hubd = ohci_hubd; 1984 hubd.bNbrPorts = sc->sc_noport; 1985 USETW(hubd.wHubCharacteristics, 1986 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 1987 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 1988 /* XXX overcurrent */ 1989 ); 1990 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 1991 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 1992 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1993 hubd.DeviceRemovable[i++] = (u_int8_t)v; 1994 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1995 l = min(len, hubd.bDescLength); 1996 totlen = l; 1997 memcpy(buf, &hubd, l); 1998 break; 1999 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2000 if (len != 4) { 2001 err = USBD_IOERROR; 2002 goto ret; 2003 } 2004 memset(buf, 0, len); /* ? XXX */ 2005 totlen = len; 2006 break; 2007 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2008 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2009 index)); 2010 if (index < 1 || index > sc->sc_noport) { 2011 err = USBD_IOERROR; 2012 goto ret; 2013 } 2014 if (len != 4) { 2015 err = USBD_IOERROR; 2016 goto ret; 2017 } 2018 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2019 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2020 v)); 2021 USETW(ps.wPortStatus, v); 2022 USETW(ps.wPortChange, v >> 16); 2023 l = min(len, sizeof ps); 2024 memcpy(buf, &ps, l); 2025 totlen = l; 2026 break; 2027 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2028 err = USBD_IOERROR; 2029 goto ret; 2030 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2031 break; 2032 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2033 if (index < 1 || index > sc->sc_noport) { 2034 err = USBD_IOERROR; 2035 goto ret; 2036 } 2037 port = OHCI_RH_PORT_STATUS(index); 2038 switch(value) { 2039 case UHF_PORT_ENABLE: 2040 OWRITE4(sc, port, UPS_PORT_ENABLED); 2041 break; 2042 case UHF_PORT_SUSPEND: 2043 OWRITE4(sc, port, UPS_SUSPEND); 2044 break; 2045 case UHF_PORT_RESET: 2046 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2047 index)); 2048 OWRITE4(sc, port, UPS_RESET); 2049 for (i = 0; i < 10; i++) { 2050 usb_delay_ms(&sc->sc_bus, 10); 2051 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2052 break; 2053 } 2054 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2055 index, OREAD4(sc, port))); 2056 break; 2057 case UHF_PORT_POWER: 2058 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2059 "%d\n", index)); 2060 OWRITE4(sc, port, UPS_PORT_POWER); 2061 break; 2062 default: 2063 err = USBD_IOERROR; 2064 goto ret; 2065 } 2066 break; 2067 default: 2068 err = USBD_IOERROR; 2069 goto ret; 2070 } 2071 xfer->actlen = totlen; 2072 err = USBD_NORMAL_COMPLETION; 2073 ret: 2074 xfer->status = err; 2075 s = splusb(); 2076 usb_transfer_complete(xfer); 2077 splx(s); 2078 return (USBD_IN_PROGRESS); 2079 } 2080 2081 /* Abort a root control request. */ 2082 static void 2083 ohci_root_ctrl_abort(xfer) 2084 usbd_xfer_handle xfer; 2085 { 2086 /* Nothing to do, all transfers are synchronous. */ 2087 } 2088 2089 /* Close the root pipe. */ 2090 static void 2091 ohci_root_ctrl_close(pipe) 2092 usbd_pipe_handle pipe; 2093 { 2094 DPRINTF(("ohci_root_ctrl_close\n")); 2095 /* Nothing to do. */ 2096 } 2097 2098 static usbd_status 2099 ohci_root_intr_transfer(xfer) 2100 usbd_xfer_handle xfer; 2101 { 2102 usbd_status err; 2103 2104 /* Insert last in queue. */ 2105 err = usb_insert_transfer(xfer); 2106 if (err) 2107 return (err); 2108 2109 /* Pipe isn't running, start first */ 2110 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2111 } 2112 2113 static usbd_status 2114 ohci_root_intr_start(xfer) 2115 usbd_xfer_handle xfer; 2116 { 2117 usbd_pipe_handle pipe = xfer->pipe; 2118 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2119 2120 sc->sc_intrxfer = xfer; 2121 2122 return (USBD_IN_PROGRESS); 2123 } 2124 2125 /* Abort a root interrupt request. */ 2126 static void 2127 ohci_root_intr_abort(xfer) 2128 usbd_xfer_handle xfer; 2129 { 2130 int s; 2131 2132 if (xfer->pipe->intrxfer == xfer) { 2133 DPRINTF(("ohci_root_intr_abort: remove\n")); 2134 xfer->pipe->intrxfer = NULL; 2135 } 2136 xfer->status = USBD_CANCELLED; 2137 s = splusb(); 2138 usb_transfer_complete(xfer); 2139 splx(s); 2140 } 2141 2142 /* Close the root pipe. */ 2143 static void 2144 ohci_root_intr_close(pipe) 2145 usbd_pipe_handle pipe; 2146 { 2147 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2148 2149 DPRINTF(("ohci_root_intr_close\n")); 2150 2151 sc->sc_intrxfer = NULL; 2152 } 2153 2154 /************************/ 2155 2156 static usbd_status 2157 ohci_device_ctrl_transfer(xfer) 2158 usbd_xfer_handle xfer; 2159 { 2160 usbd_status err; 2161 2162 /* Insert last in queue. */ 2163 err = usb_insert_transfer(xfer); 2164 if (err) 2165 return (err); 2166 2167 /* Pipe isn't running, start first */ 2168 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2169 } 2170 2171 static usbd_status 2172 ohci_device_ctrl_start(xfer) 2173 usbd_xfer_handle xfer; 2174 { 2175 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2176 usbd_status err; 2177 2178 #ifdef DIAGNOSTIC 2179 if (!(xfer->rqflags & URQ_REQUEST)) { 2180 /* XXX panic */ 2181 printf("ohci_device_ctrl_transfer: not a request\n"); 2182 return (USBD_INVAL); 2183 } 2184 #endif 2185 2186 err = ohci_device_request(xfer); 2187 if (err) 2188 return (err); 2189 2190 if (sc->sc_bus.use_polling) 2191 ohci_waitintr(sc, xfer); 2192 return (USBD_IN_PROGRESS); 2193 } 2194 2195 /* Abort a device control request. */ 2196 static void 2197 ohci_device_ctrl_abort(xfer) 2198 usbd_xfer_handle xfer; 2199 { 2200 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2201 ohci_abort_xfer(xfer, USBD_CANCELLED); 2202 } 2203 2204 /* Close a device control pipe. */ 2205 static void 2206 ohci_device_ctrl_close(pipe) 2207 usbd_pipe_handle pipe; 2208 { 2209 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2210 2211 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2212 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2213 } 2214 2215 /************************/ 2216 2217 static void 2218 ohci_device_clear_toggle(pipe) 2219 usbd_pipe_handle pipe; 2220 { 2221 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2222 2223 opipe->sed->ed.ed_tailp &= LE(~OHCI_TOGGLECARRY); 2224 } 2225 2226 static void 2227 ohci_noop(pipe) 2228 usbd_pipe_handle pipe; 2229 { 2230 } 2231 2232 static usbd_status 2233 ohci_device_bulk_transfer(xfer) 2234 usbd_xfer_handle xfer; 2235 { 2236 usbd_status err; 2237 2238 /* Insert last in queue. */ 2239 err = usb_insert_transfer(xfer); 2240 if (err) 2241 return (err); 2242 2243 /* Pipe isn't running, start first */ 2244 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2245 } 2246 2247 static usbd_status 2248 ohci_device_bulk_start(xfer) 2249 usbd_xfer_handle xfer; 2250 { 2251 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2252 usbd_device_handle dev = opipe->pipe.device; 2253 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2254 int addr = dev->address; 2255 ohci_soft_td_t *data, *tail, *tdp; 2256 ohci_soft_ed_t *sed; 2257 int s, len, isread, endpt; 2258 usbd_status err; 2259 2260 #ifdef DIAGNOSTIC 2261 if (xfer->rqflags & URQ_REQUEST) { 2262 /* XXX panic */ 2263 printf("ohci_device_bulk_start: a request\n"); 2264 return (USBD_INVAL); 2265 } 2266 #endif 2267 2268 len = xfer->length; 2269 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2270 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2271 sed = opipe->sed; 2272 2273 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2274 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2275 endpt)); 2276 2277 opipe->u.bulk.isread = isread; 2278 opipe->u.bulk.length = len; 2279 2280 /* Update device address */ 2281 sed->ed.ed_flags = LE( 2282 (LE(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2283 OHCI_ED_SET_FA(addr)); 2284 2285 /* Allocate a chain of new TDs (including a new tail). */ 2286 data = opipe->tail; 2287 err = ohci_alloc_std_chain(opipe, sc, len, isread, 2288 xfer->flags & USBD_SHORT_XFER_OK, 2289 &xfer->dmabuf, data, &tail); 2290 if (err) 2291 return (err); 2292 2293 tail->xfer = NULL; 2294 xfer->hcpriv = data; 2295 2296 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2297 "td_cbp=0x%08x td_be=0x%08x\n", 2298 (int)LE(sed->ed.ed_flags), (int)LE(data->td.td_flags), 2299 (int)LE(data->td.td_cbp), (int)LE(data->td.td_be))); 2300 2301 #ifdef OHCI_DEBUG 2302 if (ohcidebug > 4) { 2303 ohci_dump_ed(sed); 2304 ohci_dump_tds(data); 2305 } 2306 #endif 2307 2308 /* Insert ED in schedule */ 2309 s = splusb(); 2310 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2311 tdp->xfer = xfer; 2312 ohci_hash_add_td(sc, tdp); 2313 } 2314 sed->ed.ed_tailp = LE(tail->physaddr); 2315 opipe->tail = tail; 2316 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); 2317 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2318 if (xfer->timeout && !sc->sc_bus.use_polling) { 2319 usb_timeout(ohci_timeout, xfer, 2320 MS_TO_TICKS(xfer->timeout), xfer->timo_handle); 2321 } 2322 2323 #if 0 2324 /* This goes wrong if we are too slow. */ 2325 if (ohcidebug > 5) { 2326 usb_delay_ms(&sc->sc_bus, 5); 2327 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2328 OREAD4(sc, OHCI_COMMAND_STATUS))); 2329 ohci_dump_ed(sed); 2330 ohci_dump_tds(data); 2331 } 2332 #endif 2333 2334 splx(s); 2335 2336 return (USBD_IN_PROGRESS); 2337 } 2338 2339 static void 2340 ohci_device_bulk_abort(xfer) 2341 usbd_xfer_handle xfer; 2342 { 2343 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2344 ohci_abort_xfer(xfer, USBD_CANCELLED); 2345 } 2346 2347 /* 2348 * Close a device bulk pipe. 2349 */ 2350 static void 2351 ohci_device_bulk_close(pipe) 2352 usbd_pipe_handle pipe; 2353 { 2354 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2355 2356 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2357 ohci_close_pipe(pipe, sc->sc_bulk_head); 2358 } 2359 2360 /************************/ 2361 2362 static usbd_status 2363 ohci_device_intr_transfer(xfer) 2364 usbd_xfer_handle xfer; 2365 { 2366 usbd_status err; 2367 2368 /* Insert last in queue. */ 2369 err = usb_insert_transfer(xfer); 2370 if (err) 2371 return (err); 2372 2373 /* Pipe isn't running, start first */ 2374 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2375 } 2376 2377 static usbd_status 2378 ohci_device_intr_start(xfer) 2379 usbd_xfer_handle xfer; 2380 { 2381 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2382 usbd_device_handle dev = opipe->pipe.device; 2383 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2384 ohci_soft_ed_t *sed = opipe->sed; 2385 ohci_soft_td_t *data, *tail; 2386 int len; 2387 int s; 2388 2389 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2390 "flags=%d priv=%p\n", 2391 xfer, xfer->length, xfer->flags, xfer->priv)); 2392 2393 #ifdef DIAGNOSTIC 2394 if (xfer->rqflags & URQ_REQUEST) 2395 panic("ohci_device_intr_transfer: a request\n"); 2396 #endif 2397 2398 len = xfer->length; 2399 2400 data = opipe->tail; 2401 tail = ohci_alloc_std(sc); 2402 if (tail == NULL) 2403 return (USBD_NOMEM); 2404 tail->xfer = NULL; 2405 2406 data->td.td_flags = LE( 2407 OHCI_TD_IN | OHCI_TD_NOCC | 2408 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2409 if (xfer->flags & USBD_SHORT_XFER_OK) 2410 data->td.td_flags |= LE(OHCI_TD_R); 2411 data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf)); 2412 data->nexttd = tail; 2413 data->td.td_nexttd = LE(tail->physaddr); 2414 data->td.td_be = LE(LE(data->td.td_cbp) + len - 1); 2415 data->len = len; 2416 data->xfer = xfer; 2417 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2418 xfer->hcpriv = data; 2419 2420 #ifdef OHCI_DEBUG 2421 if (ohcidebug > 5) { 2422 DPRINTF(("ohci_device_intr_transfer:\n")); 2423 ohci_dump_ed(sed); 2424 ohci_dump_tds(data); 2425 } 2426 #endif 2427 2428 /* Insert ED in schedule */ 2429 s = splusb(); 2430 ohci_hash_add_td(sc, data); 2431 sed->ed.ed_tailp = LE(tail->physaddr); 2432 opipe->tail = tail; 2433 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); 2434 2435 #if 0 2436 /* 2437 * This goes horribly wrong, printing thousands of descriptors, 2438 * because false references are followed due to the fact that the 2439 * TD is gone. 2440 */ 2441 if (ohcidebug > 5) { 2442 usb_delay_ms(&sc->sc_bus, 5); 2443 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2444 OREAD4(sc, OHCI_COMMAND_STATUS))); 2445 ohci_dump_ed(sed); 2446 ohci_dump_tds(data); 2447 } 2448 #endif 2449 splx(s); 2450 2451 return (USBD_IN_PROGRESS); 2452 } 2453 2454 /* Abort a device control request. */ 2455 static void 2456 ohci_device_intr_abort(xfer) 2457 usbd_xfer_handle xfer; 2458 { 2459 if (xfer->pipe->intrxfer == xfer) { 2460 DPRINTF(("ohci_device_intr_abort: remove\n")); 2461 xfer->pipe->intrxfer = NULL; 2462 } 2463 ohci_abort_xfer(xfer, USBD_CANCELLED); 2464 } 2465 2466 /* Close a device interrupt pipe. */ 2467 static void 2468 ohci_device_intr_close(pipe) 2469 usbd_pipe_handle pipe; 2470 { 2471 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2472 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2473 int nslots = opipe->u.intr.nslots; 2474 int pos = opipe->u.intr.pos; 2475 int j; 2476 ohci_soft_ed_t *p, *sed = opipe->sed; 2477 int s; 2478 2479 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2480 pipe, nslots, pos)); 2481 s = splusb(); 2482 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 2483 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 2484 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) 2485 usb_delay_ms(&sc->sc_bus, 2); 2486 2487 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2488 ; 2489 #ifdef DIAGNOSTIC 2490 if (p == NULL) 2491 panic("ohci_device_intr_close: ED not found\n"); 2492 #endif 2493 p->next = sed->next; 2494 p->ed.ed_nexted = sed->ed.ed_nexted; 2495 splx(s); 2496 2497 for (j = 0; j < nslots; j++) 2498 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2499 2500 ohci_free_std(sc, opipe->tail); 2501 ohci_free_sed(sc, opipe->sed); 2502 } 2503 2504 static usbd_status 2505 ohci_device_setintr(sc, opipe, ival) 2506 ohci_softc_t *sc; 2507 struct ohci_pipe *opipe; 2508 int ival; 2509 { 2510 int i, j, s, best; 2511 u_int npoll, slow, shigh, nslots; 2512 u_int bestbw, bw; 2513 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2514 2515 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2516 if (ival == 0) { 2517 printf("ohci_setintr: 0 interval\n"); 2518 return (USBD_INVAL); 2519 } 2520 2521 npoll = OHCI_NO_INTRS; 2522 while (npoll > ival) 2523 npoll /= 2; 2524 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2525 2526 /* 2527 * We now know which level in the tree the ED must go into. 2528 * Figure out which slot has most bandwidth left over. 2529 * Slots to examine: 2530 * npoll 2531 * 1 0 2532 * 2 1 2 2533 * 4 3 4 5 6 2534 * 8 7 8 9 10 11 12 13 14 2535 * N (N-1) .. (N-1+N-1) 2536 */ 2537 slow = npoll-1; 2538 shigh = slow + npoll; 2539 nslots = OHCI_NO_INTRS / npoll; 2540 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2541 bw = 0; 2542 for (j = 0; j < nslots; j++) 2543 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 2544 if (bw < bestbw) { 2545 best = i; 2546 bestbw = bw; 2547 } 2548 } 2549 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2550 best, slow, shigh, bestbw)); 2551 2552 s = splusb(); 2553 hsed = sc->sc_eds[best]; 2554 sed->next = hsed->next; 2555 sed->ed.ed_nexted = hsed->ed.ed_nexted; 2556 hsed->next = sed; 2557 hsed->ed.ed_nexted = LE(sed->physaddr); 2558 splx(s); 2559 2560 for (j = 0; j < nslots; j++) 2561 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 2562 opipe->u.intr.nslots = nslots; 2563 opipe->u.intr.pos = best; 2564 2565 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 2566 return (USBD_NORMAL_COMPLETION); 2567 } 2568
Indexes created Fri Sep 26 20:09:58 GMT 2025