ohci.c revision 1.62
1 /* $NetBSD: ohci.c,v 1.62 2000/01/18 20:11:00 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (augustss (at) carlstedt.se) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe 45 * USB spec: http://www.usb.org/developers/data/usb11.pdf 46 */ 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/kernel.h> 53 #include <sys/device.h> 54 #include <sys/select.h> 55 #elif defined(__FreeBSD__) 56 #include <sys/module.h> 57 #include <sys/bus.h> 58 #include <machine/bus_pio.h> 59 #include <machine/bus_memio.h> 60 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 61 #include <machine/cpu.h> 62 #endif 63 #endif 64 #include <sys/proc.h> 65 #include <sys/queue.h> 66 67 #include <machine/bus.h> 68 #include <machine/endian.h> 69 70 #include <dev/usb/usb.h> 71 #include <dev/usb/usbdi.h> 72 #include <dev/usb/usbdivar.h> 73 #include <dev/usb/usb_mem.h> 74 #include <dev/usb/usb_quirks.h> 75 76 #include <dev/usb/ohcireg.h> 77 #include <dev/usb/ohcivar.h> 78 79 #if defined(__FreeBSD__) 80 #include <machine/clock.h> 81 82 #define delay(d) DELAY(d) 83 #endif 84 85 #if defined(__OpenBSD__) 86 struct cfdriver ohci_cd = { 87 NULL, "ohci", DV_DULL 88 }; 89 #endif 90 91 #ifdef OHCI_DEBUG 92 #define DPRINTF(x) if (ohcidebug) logprintf x 93 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 94 int ohcidebug = 0; 95 #else 96 #define DPRINTF(x) 97 #define DPRINTFN(n,x) 98 #endif 99 100 /* 101 * The OHCI controller is little endian, so on big endian machines 102 * the data strored in memory needs to be swapped. 103 */ 104 #if BYTE_ORDER == BIG_ENDIAN 105 #define LE(x) (bswap32(x)) 106 #else 107 #define LE(x) (x) 108 #endif 109 110 struct ohci_pipe; 111 112 static ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *)); 113 static void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *)); 114 115 static ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *)); 116 static void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *)); 117 118 static ohci_soft_itd_t *ohci_alloc_sitd __P((ohci_softc_t *)); 119 static void ohci_free_sitd __P((ohci_softc_t *,ohci_soft_itd_t *)); 120 121 #if 0 122 static void ohci_free_std_chain __P((ohci_softc_t *, 123 ohci_soft_td_t *, ohci_soft_td_t *)); 124 #endif 125 static usbd_status ohci_alloc_std_chain __P((struct ohci_pipe *, 126 ohci_softc_t *, int, int, u_int16_t, usb_dma_t *, 127 ohci_soft_td_t *, ohci_soft_td_t **)); 128 129 static void ohci_shutdown __P((void *v)); 130 static void ohci_power __P((int, void *)); 131 static usbd_status ohci_open __P((usbd_pipe_handle)); 132 static void ohci_poll __P((struct usbd_bus *)); 133 static void ohci_waitintr __P((ohci_softc_t *, 134 usbd_xfer_handle)); 135 static void ohci_rhsc __P((ohci_softc_t *, usbd_xfer_handle)); 136 static void ohci_process_done __P((ohci_softc_t *, 137 ohci_physaddr_t)); 138 139 static usbd_status ohci_device_request __P((usbd_xfer_handle xfer)); 140 static void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 141 static void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 142 static void ohci_hash_add_td __P((ohci_softc_t *, 143 ohci_soft_td_t *)); 144 static void ohci_hash_rem_td __P((ohci_softc_t *, 145 ohci_soft_td_t *)); 146 static ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, 147 ohci_physaddr_t)); 148 149 static usbd_status ohci_setup_isoc __P((usbd_pipe_handle pipe)); 150 static void ohci_device_isoc_enter __P((usbd_xfer_handle)); 151 152 static usbd_status ohci_allocm __P((struct usbd_bus *, usb_dma_t *, 153 u_int32_t)); 154 static void ohci_freem __P((struct usbd_bus *, usb_dma_t *)); 155 156 static usbd_xfer_handle ohci_allocx __P((struct usbd_bus *)); 157 static void ohci_freex __P((struct usbd_bus *, usbd_xfer_handle)); 158 159 static usbd_status ohci_root_ctrl_transfer __P((usbd_xfer_handle)); 160 static usbd_status ohci_root_ctrl_start __P((usbd_xfer_handle)); 161 static void ohci_root_ctrl_abort __P((usbd_xfer_handle)); 162 static void ohci_root_ctrl_close __P((usbd_pipe_handle)); 163 164 static usbd_status ohci_root_intr_transfer __P((usbd_xfer_handle)); 165 static usbd_status ohci_root_intr_start __P((usbd_xfer_handle)); 166 static void ohci_root_intr_abort __P((usbd_xfer_handle)); 167 static void ohci_root_intr_close __P((usbd_pipe_handle)); 168 static void ohci_root_intr_done __P((usbd_xfer_handle)); 169 170 static usbd_status ohci_device_ctrl_transfer __P((usbd_xfer_handle)); 171 static usbd_status ohci_device_ctrl_start __P((usbd_xfer_handle)); 172 static void ohci_device_ctrl_abort __P((usbd_xfer_handle)); 173 static void ohci_device_ctrl_close __P((usbd_pipe_handle)); 174 static void ohci_device_ctrl_done __P((usbd_xfer_handle)); 175 176 static usbd_status ohci_device_bulk_transfer __P((usbd_xfer_handle)); 177 static usbd_status ohci_device_bulk_start __P((usbd_xfer_handle)); 178 static void ohci_device_bulk_abort __P((usbd_xfer_handle)); 179 static void ohci_device_bulk_close __P((usbd_pipe_handle)); 180 static void ohci_device_bulk_done __P((usbd_xfer_handle)); 181 182 static usbd_status ohci_device_intr_transfer __P((usbd_xfer_handle)); 183 static usbd_status ohci_device_intr_start __P((usbd_xfer_handle)); 184 static void ohci_device_intr_abort __P((usbd_xfer_handle)); 185 static void ohci_device_intr_close __P((usbd_pipe_handle)); 186 static void ohci_device_intr_done __P((usbd_xfer_handle)); 187 188 static usbd_status ohci_device_isoc_transfer __P((usbd_xfer_handle)); 189 static usbd_status ohci_device_isoc_start __P((usbd_xfer_handle)); 190 static void ohci_device_isoc_abort __P((usbd_xfer_handle)); 191 static void ohci_device_isoc_close __P((usbd_pipe_handle)); 192 static void ohci_device_isoc_done __P((usbd_xfer_handle)); 193 194 static usbd_status ohci_device_setintr __P((ohci_softc_t *sc, 195 struct ohci_pipe *pipe, int ival)); 196 197 static int ohci_str __P((usb_string_descriptor_t *, int, char *)); 198 199 static void ohci_timeout __P((void *)); 200 static void ohci_rhsc_able __P((ohci_softc_t *, int)); 201 202 static void ohci_close_pipe __P((usbd_pipe_handle pipe, 203 ohci_soft_ed_t *head)); 204 static void ohci_abort_xfer __P((usbd_xfer_handle xfer, 205 usbd_status status)); 206 static void ohci_abort_xfer_end __P((void *)); 207 208 static void ohci_device_clear_toggle __P((usbd_pipe_handle pipe)); 209 static void ohci_noop __P((usbd_pipe_handle pipe)); 210 211 #ifdef OHCI_DEBUG 212 static void ohci_dumpregs __P((ohci_softc_t *)); 213 static void ohci_dump_tds __P((ohci_soft_td_t *)); 214 static void ohci_dump_td __P((ohci_soft_td_t *)); 215 static void ohci_dump_ed __P((ohci_soft_ed_t *)); 216 #endif 217 218 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 219 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 220 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 221 222 /* Reverse the bits in a value 0 .. 31 */ 223 static u_int8_t revbits[OHCI_NO_INTRS] = 224 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 225 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 226 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 227 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 228 229 struct ohci_pipe { 230 struct usbd_pipe pipe; 231 ohci_soft_ed_t *sed; 232 union { 233 ohci_soft_td_t *td; 234 ohci_soft_itd_t *itd; 235 } tail; 236 /* Info needed for different pipe kinds. */ 237 union { 238 /* Control pipe */ 239 struct { 240 usb_dma_t reqdma; 241 u_int length; 242 ohci_soft_td_t *setup, *data, *stat; 243 } ctl; 244 /* Interrupt pipe */ 245 struct { 246 int nslots; 247 int pos; 248 } intr; 249 /* Bulk pipe */ 250 struct { 251 u_int length; 252 int isread; 253 } bulk; 254 /* Iso pipe */ 255 struct iso { 256 int next, inuse; 257 } iso; 258 } u; 259 }; 260 261 #define OHCI_INTR_ENDPT 1 262 263 static struct usbd_bus_methods ohci_bus_methods = { 264 ohci_open, 265 ohci_poll, 266 ohci_allocm, 267 ohci_freem, 268 ohci_allocx, 269 ohci_freex, 270 }; 271 272 static struct usbd_pipe_methods ohci_root_ctrl_methods = { 273 ohci_root_ctrl_transfer, 274 ohci_root_ctrl_start, 275 ohci_root_ctrl_abort, 276 ohci_root_ctrl_close, 277 ohci_noop, 278 0, 279 }; 280 281 static struct usbd_pipe_methods ohci_root_intr_methods = { 282 ohci_root_intr_transfer, 283 ohci_root_intr_start, 284 ohci_root_intr_abort, 285 ohci_root_intr_close, 286 ohci_noop, 287 ohci_root_intr_done, 288 }; 289 290 static struct usbd_pipe_methods ohci_device_ctrl_methods = { 291 ohci_device_ctrl_transfer, 292 ohci_device_ctrl_start, 293 ohci_device_ctrl_abort, 294 ohci_device_ctrl_close, 295 ohci_noop, 296 ohci_device_ctrl_done, 297 }; 298 299 static struct usbd_pipe_methods ohci_device_intr_methods = { 300 ohci_device_intr_transfer, 301 ohci_device_intr_start, 302 ohci_device_intr_abort, 303 ohci_device_intr_close, 304 ohci_device_clear_toggle, 305 ohci_device_intr_done, 306 }; 307 308 static struct usbd_pipe_methods ohci_device_bulk_methods = { 309 ohci_device_bulk_transfer, 310 ohci_device_bulk_start, 311 ohci_device_bulk_abort, 312 ohci_device_bulk_close, 313 ohci_device_clear_toggle, 314 ohci_device_bulk_done, 315 }; 316 317 static struct usbd_pipe_methods ohci_device_isoc_methods = { 318 ohci_device_isoc_transfer, 319 ohci_device_isoc_start, 320 ohci_device_isoc_abort, 321 ohci_device_isoc_close, 322 ohci_noop, 323 ohci_device_isoc_done, 324 }; 325 326 #if defined(__NetBSD__) || defined(__OpenBSD__) 327 int 328 ohci_activate(self, act) 329 device_ptr_t self; 330 enum devact act; 331 { 332 struct ohci_softc *sc = (struct ohci_softc *)self; 333 int rv = 0; 334 335 switch (act) { 336 case DVACT_ACTIVATE: 337 return (EOPNOTSUPP); 338 break; 339 340 case DVACT_DEACTIVATE: 341 if (sc->sc_child != NULL) 342 rv = config_deactivate(sc->sc_child); 343 break; 344 } 345 return (rv); 346 } 347 348 int 349 ohci_detach(sc, flags) 350 struct ohci_softc *sc; 351 int flags; 352 { 353 int rv = 0; 354 355 if (sc->sc_child != NULL) 356 rv = config_detach(sc->sc_child, flags); 357 358 if (rv != 0) 359 return (rv); 360 361 powerhook_disestablish(sc->sc_powerhook); 362 shutdownhook_disestablish(sc->sc_shutdownhook); 363 364 /* free data structures XXX */ 365 366 return (rv); 367 } 368 #endif 369 370 ohci_soft_ed_t * 371 ohci_alloc_sed(sc) 372 ohci_softc_t *sc; 373 { 374 ohci_soft_ed_t *sed; 375 usbd_status err; 376 int i, offs; 377 usb_dma_t dma; 378 379 if (sc->sc_freeeds == NULL) { 380 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 381 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 382 OHCI_ED_ALIGN, &dma); 383 if (err) 384 return (0); 385 for(i = 0; i < OHCI_SED_CHUNK; i++) { 386 offs = i * OHCI_SED_SIZE; 387 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 388 sed->physaddr = DMAADDR(&dma) + offs; 389 sed->next = sc->sc_freeeds; 390 sc->sc_freeeds = sed; 391 } 392 } 393 sed = sc->sc_freeeds; 394 sc->sc_freeeds = sed->next; 395 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 396 sed->next = 0; 397 return (sed); 398 } 399 400 void 401 ohci_free_sed(sc, sed) 402 ohci_softc_t *sc; 403 ohci_soft_ed_t *sed; 404 { 405 sed->next = sc->sc_freeeds; 406 sc->sc_freeeds = sed; 407 } 408 409 ohci_soft_td_t * 410 ohci_alloc_std(sc) 411 ohci_softc_t *sc; 412 { 413 ohci_soft_td_t *std; 414 usbd_status err; 415 int i, offs; 416 usb_dma_t dma; 417 418 if (sc->sc_freetds == NULL) { 419 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 420 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 421 OHCI_TD_ALIGN, &dma); 422 if (err) 423 return (0); 424 for(i = 0; i < OHCI_STD_CHUNK; i++) { 425 offs = i * OHCI_STD_SIZE; 426 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 427 std->physaddr = DMAADDR(&dma) + offs; 428 std->nexttd = sc->sc_freetds; 429 sc->sc_freetds = std; 430 } 431 } 432 std = sc->sc_freetds; 433 sc->sc_freetds = std->nexttd; 434 memset(&std->td, 0, sizeof(ohci_td_t)); 435 std->nexttd = 0; 436 return (std); 437 } 438 439 void 440 ohci_free_std(sc, std) 441 ohci_softc_t *sc; 442 ohci_soft_td_t *std; 443 { 444 std->nexttd = sc->sc_freetds; 445 sc->sc_freetds = std; 446 } 447 448 usbd_status 449 ohci_alloc_std_chain(opipe, sc, len, rd, flags, dma, sp, ep) 450 struct ohci_pipe *opipe; 451 ohci_softc_t *sc; 452 int len, rd; 453 u_int16_t flags; 454 usb_dma_t *dma; 455 ohci_soft_td_t *sp, **ep; 456 { 457 ohci_soft_td_t *next, *cur; 458 ohci_physaddr_t dataphys, dataphysend; 459 u_int32_t intr, tdflags; 460 int curlen; 461 462 DPRINTFN(len < 4096,("ohci_alloc_std_chain: start len=%d\n", len)); 463 cur = sp; 464 dataphys = DMAADDR(dma); 465 dataphysend = OHCI_PAGE(dataphys + len - 1); 466 tdflags = 467 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 468 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | 469 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0); 470 471 for (;;) { 472 next = ohci_alloc_std(sc); 473 if (next == 0) 474 goto nomem; 475 476 /* The OHCI hardware can handle at most one page crossing. */ 477 if (OHCI_PAGE(dataphys) == dataphysend || 478 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 479 /* we can handle it in this TD */ 480 curlen = len; 481 } else { 482 /* must use multiple TDs, fill as much as possible. */ 483 curlen = 2 * OHCI_PAGE_SIZE - 484 (dataphys & (OHCI_PAGE_SIZE-1)); 485 } 486 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 487 "dataphysend=0x%08x len=%d curlen=%d\n", 488 dataphys, dataphysend, 489 len, curlen)); 490 len -= curlen; 491 492 intr = len == 0 ? OHCI_TD_SET_DI(1) : OHCI_TD_NOINTR; 493 cur->td.td_flags = LE(tdflags | intr); 494 cur->td.td_cbp = LE(dataphys); 495 cur->nexttd = next; 496 cur->td.td_nexttd = LE(next->physaddr); 497 cur->td.td_be = LE(dataphys + curlen - 1); 498 cur->len = curlen; 499 cur->flags = OHCI_ADD_LEN; 500 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 501 dataphys, dataphys + curlen - 1)); 502 if (len == 0) 503 break; 504 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 505 dataphys += curlen; 506 cur = next; 507 } 508 if ((flags & USBD_FORCE_SHORT_XFER) && 509 len % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 510 /* Force a 0 length transfer at the end. */ 511 next = ohci_alloc_std(sc); 512 if (next == 0) 513 goto nomem; 514 515 cur->td.td_flags = LE(tdflags | OHCI_TD_SET_DI(1)); 516 cur->td.td_cbp = 0; /* indicate 0 length packet */ 517 cur->nexttd = next; 518 cur->td.td_nexttd = LE(next->physaddr); 519 cur->td.td_be = LE(dataphys - 1); 520 cur->len = 0; 521 cur->flags = 0; 522 cur = next; 523 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 524 } 525 cur->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 526 *ep = next; 527 528 return (USBD_NORMAL_COMPLETION); 529 530 nomem: 531 /* XXX free chain */ 532 return (USBD_NOMEM); 533 } 534 535 #if 0 536 static void 537 ohci_free_std_chain(sc, std, stdend) 538 ohci_softc_t *sc; 539 ohci_soft_td_t *std; 540 ohci_soft_td_t *stdend; 541 { 542 ohci_soft_td_t *p; 543 544 for (; std != stdend; std = p) { 545 p = std->nexttd; 546 ohci_free_std(sc, std); 547 } 548 } 549 #endif 550 551 ohci_soft_itd_t * 552 ohci_alloc_sitd(sc) 553 ohci_softc_t *sc; 554 { 555 ohci_soft_itd_t *sitd; 556 usbd_status err; 557 int i, offs; 558 usb_dma_t dma; 559 560 if (sc->sc_freeitds == NULL) { 561 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 562 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 563 OHCI_TD_ALIGN, &dma); 564 if (err) 565 return (0); 566 for(i = 0; i < OHCI_STD_CHUNK; i++) { 567 offs = i * OHCI_STD_SIZE; 568 sitd = (ohci_soft_itd_t *)((char*)KERNADDR(&dma)+offs); 569 sitd->physaddr = DMAADDR(&dma) + offs; 570 sitd->nextitd = sc->sc_freeitds; 571 sc->sc_freeitds = sitd; 572 } 573 } 574 sitd = sc->sc_freeitds; 575 sc->sc_freeitds = sitd->nextitd; 576 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 577 sitd->nextitd = 0; 578 return (sitd); 579 } 580 581 void 582 ohci_free_sitd(sc, sitd) 583 ohci_softc_t *sc; 584 ohci_soft_itd_t *sitd; 585 { 586 sitd->nextitd = sc->sc_freeitds; 587 sc->sc_freeitds = sitd; 588 } 589 590 usbd_status 591 ohci_init(sc) 592 ohci_softc_t *sc; 593 { 594 ohci_soft_ed_t *sed, *psed; 595 usbd_status err; 596 int i; 597 u_int32_t s, ctl, ival, hcr, fm, per, rev; 598 599 DPRINTF(("ohci_init: start\n")); 600 #if defined(__OpenBSD__) 601 printf(","); 602 #else 603 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 604 #endif 605 rev = OREAD4(sc, OHCI_REVISION); 606 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 607 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 608 609 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 610 printf("%s: unsupported OHCI revision\n", 611 USBDEVNAME(sc->sc_bus.bdev)); 612 sc->sc_bus.usbrev = USBREV_UNKNOWN; 613 return (USBD_INVAL); 614 } 615 sc->sc_bus.usbrev = USBREV_1_0; 616 617 for (i = 0; i < OHCI_HASH_SIZE; i++) 618 LIST_INIT(&sc->sc_hash_tds[i]); 619 620 SIMPLEQ_INIT(&sc->sc_free_xfers); 621 622 /* Allocate the HCCA area. */ 623 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 624 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 625 if (err) 626 return (err); 627 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 628 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 629 630 sc->sc_eintrs = OHCI_NORMAL_INTRS; 631 632 /* Allocate dummy ED that starts the control list. */ 633 sc->sc_ctrl_head = ohci_alloc_sed(sc); 634 if (sc->sc_ctrl_head == NULL) { 635 err = USBD_NOMEM; 636 goto bad1; 637 } 638 sc->sc_ctrl_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 639 640 /* Allocate dummy ED that starts the bulk list. */ 641 sc->sc_bulk_head = ohci_alloc_sed(sc); 642 if (sc->sc_bulk_head == NULL) { 643 err = USBD_NOMEM; 644 goto bad2; 645 } 646 sc->sc_bulk_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 647 648 /* Allocate dummy ED that starts the isochronous list. */ 649 sc->sc_isoc_head = ohci_alloc_sed(sc); 650 if (sc->sc_isoc_head == NULL) { 651 err = USBD_NOMEM; 652 goto bad3; 653 } 654 sc->sc_isoc_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 655 656 /* Allocate all the dummy EDs that make up the interrupt tree. */ 657 for (i = 0; i < OHCI_NO_EDS; i++) { 658 sed = ohci_alloc_sed(sc); 659 if (sed == NULL) { 660 while (--i >= 0) 661 ohci_free_sed(sc, sc->sc_eds[i]); 662 err = USBD_NOMEM; 663 goto bad4; 664 } 665 /* All ED fields are set to 0. */ 666 sc->sc_eds[i] = sed; 667 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 668 if (i != 0) 669 psed = sc->sc_eds[(i-1) / 2]; 670 else 671 psed= sc->sc_isoc_head; 672 sed->next = psed; 673 sed->ed.ed_nexted = LE(psed->physaddr); 674 } 675 /* 676 * Fill HCCA interrupt table. The bit reversal is to get 677 * the tree set up properly to spread the interrupts. 678 */ 679 for (i = 0; i < OHCI_NO_INTRS; i++) 680 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 681 LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 682 683 /* Determine in what context we are running. */ 684 ctl = OREAD4(sc, OHCI_CONTROL); 685 if (ctl & OHCI_IR) { 686 /* SMM active, request change */ 687 DPRINTF(("ohci_init: SMM active, request owner change\n")); 688 s = OREAD4(sc, OHCI_COMMAND_STATUS); 689 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 690 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 691 usb_delay_ms(&sc->sc_bus, 1); 692 ctl = OREAD4(sc, OHCI_CONTROL); 693 } 694 if ((ctl & OHCI_IR) == 0) { 695 printf("%s: SMM does not respond, resetting\n", 696 USBDEVNAME(sc->sc_bus.bdev)); 697 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 698 goto reset; 699 } 700 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 701 /* BIOS started controller. */ 702 DPRINTF(("ohci_init: BIOS active\n")); 703 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 704 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 705 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 706 } 707 } else { 708 DPRINTF(("ohci_init: cold started\n")); 709 reset: 710 /* Controller was cold started. */ 711 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 712 } 713 714 /* 715 * This reset should not be necessary according to the OHCI spec, but 716 * without it some controllers do not start. 717 */ 718 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 719 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 720 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 721 722 /* We now own the host controller and the bus has been reset. */ 723 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 724 725 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 726 /* Nominal time for a reset is 10 us. */ 727 for (i = 0; i < 10; i++) { 728 delay(10); 729 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 730 if (!hcr) 731 break; 732 } 733 if (hcr) { 734 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 735 err = USBD_IOERROR; 736 goto bad5; 737 } 738 #ifdef OHCI_DEBUG 739 if (ohcidebug > 15) 740 ohci_dumpregs(sc); 741 #endif 742 743 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 744 745 /* Set up HC registers. */ 746 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 747 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 748 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 749 /* disable all interrupts and then switch on all desired interrupts */ 750 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 751 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 752 /* switch on desired functional features */ 753 ctl = OREAD4(sc, OHCI_CONTROL); 754 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 755 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 756 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 757 /* And finally start it! */ 758 OWRITE4(sc, OHCI_CONTROL, ctl); 759 760 /* 761 * The controller is now OPERATIONAL. Set a some final 762 * registers that should be set earlier, but that the 763 * controller ignores when in the SUSPEND state. 764 */ 765 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 766 fm |= OHCI_FSMPS(ival) | ival; 767 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 768 per = OHCI_PERIODIC(ival); /* 90% periodic */ 769 OWRITE4(sc, OHCI_PERIODIC_START, per); 770 771 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 772 773 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 774 775 #ifdef OHCI_DEBUG 776 if (ohcidebug > 5) 777 ohci_dumpregs(sc); 778 #endif 779 780 /* Set up the bus struct. */ 781 sc->sc_bus.methods = &ohci_bus_methods; 782 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 783 784 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 785 786 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 787 788 return (USBD_NORMAL_COMPLETION); 789 790 bad5: 791 for (i = 0; i < OHCI_NO_EDS; i++) 792 ohci_free_sed(sc, sc->sc_eds[i]); 793 bad4: 794 ohci_free_sed(sc, sc->sc_isoc_head); 795 bad3: 796 ohci_free_sed(sc, sc->sc_ctrl_head); 797 bad2: 798 ohci_free_sed(sc, sc->sc_bulk_head); 799 bad1: 800 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 801 return (err); 802 } 803 804 usbd_status 805 ohci_allocm(bus, dma, size) 806 struct usbd_bus *bus; 807 usb_dma_t *dma; 808 u_int32_t size; 809 { 810 #if defined(__NetBSD__) || defined(__OpenBSD__) 811 struct ohci_softc *sc = (struct ohci_softc *)bus; 812 #endif 813 814 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 815 } 816 817 void 818 ohci_freem(bus, dma) 819 struct usbd_bus *bus; 820 usb_dma_t *dma; 821 { 822 #if defined(__NetBSD__) || defined(__OpenBSD__) 823 struct ohci_softc *sc = (struct ohci_softc *)bus; 824 #endif 825 826 usb_freemem(&sc->sc_bus, dma); 827 } 828 829 usbd_xfer_handle 830 ohci_allocx(bus) 831 struct usbd_bus *bus; 832 { 833 struct ohci_softc *sc = (struct ohci_softc *)bus; 834 usbd_xfer_handle xfer; 835 836 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 837 if (xfer != NULL) 838 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 839 else 840 xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT); 841 return (xfer); 842 } 843 844 void 845 ohci_freex(bus, xfer) 846 struct usbd_bus *bus; 847 usbd_xfer_handle xfer; 848 { 849 struct ohci_softc *sc = (struct ohci_softc *)bus; 850 851 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 852 } 853 854 /* 855 * Shut down the controller when the system is going down. 856 */ 857 void 858 ohci_shutdown(v) 859 void *v; 860 { 861 ohci_softc_t *sc = v; 862 863 DPRINTF(("ohci_shutdown: stopping the HC\n")); 864 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 865 } 866 867 /* 868 * Handle suspend/resume. 869 * 870 * We need to switch to polling mode here, because this routine is 871 * called from an intterupt context. This is all right since we 872 * are almost suspended anyway. 873 */ 874 void 875 ohci_power(why, v) 876 int why; 877 void *v; 878 { 879 #ifdef OHCI_DEBUG 880 ohci_softc_t *sc = v; 881 882 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 883 /* XXX should suspend/resume */ 884 ohci_dumpregs(sc); 885 #endif 886 } 887 888 #ifdef OHCI_DEBUG 889 void 890 ohci_dumpregs(sc) 891 ohci_softc_t *sc; 892 { 893 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 894 OREAD4(sc, OHCI_REVISION), 895 OREAD4(sc, OHCI_CONTROL), 896 OREAD4(sc, OHCI_COMMAND_STATUS))); 897 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 898 OREAD4(sc, OHCI_INTERRUPT_STATUS), 899 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 900 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 901 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 902 OREAD4(sc, OHCI_HCCA), 903 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 904 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 905 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 906 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 907 OREAD4(sc, OHCI_BULK_HEAD_ED), 908 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 909 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 910 OREAD4(sc, OHCI_DONE_HEAD), 911 OREAD4(sc, OHCI_FM_INTERVAL), 912 OREAD4(sc, OHCI_FM_REMAINING))); 913 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 914 OREAD4(sc, OHCI_FM_NUMBER), 915 OREAD4(sc, OHCI_PERIODIC_START), 916 OREAD4(sc, OHCI_LS_THRESHOLD))); 917 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 918 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 919 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 920 OREAD4(sc, OHCI_RH_STATUS))); 921 DPRINTF((" port1=0x%08x port2=0x%08x\n", 922 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 923 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 924 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 925 LE(sc->sc_hcca->hcca_frame_number), 926 LE(sc->sc_hcca->hcca_done_head))); 927 } 928 #endif 929 930 static int ohci_intr1 __P((ohci_softc_t *)); 931 932 int 933 ohci_intr(p) 934 void *p; 935 { 936 ohci_softc_t *sc = p; 937 938 /* If we get an interrupt while polling, then just ignore it. */ 939 if (sc->sc_bus.use_polling) { 940 #ifdef DIAGNOSTIC 941 printf("ohci_intr: ignored interrupt while polling\n"); 942 #endif 943 return (0); 944 } 945 946 return (ohci_intr1(sc)); 947 } 948 949 static int 950 ohci_intr1(sc) 951 ohci_softc_t *sc; 952 { 953 u_int32_t intrs, eintrs; 954 ohci_physaddr_t done; 955 956 /* In case the interrupt occurs before initialization has completed. */ 957 if (sc == NULL || sc->sc_hcca == NULL) { 958 #ifdef DIAGNOSTIC 959 printf("ohci_intr: sc->sc_hcca == NULL\n"); 960 #endif 961 return (0); 962 } 963 964 intrs = 0; 965 done = LE(sc->sc_hcca->hcca_done_head); 966 if (done != 0) { 967 sc->sc_hcca->hcca_done_head = 0; 968 if (done & ~OHCI_DONE_INTRS) 969 intrs = OHCI_WDH; 970 if (done & OHCI_DONE_INTRS) 971 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 972 } else 973 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 974 975 if (!intrs) 976 return (0); 977 978 intrs &= ~OHCI_MIE; 979 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 980 eintrs = intrs & sc->sc_eintrs; 981 if (!eintrs) 982 return (0); 983 984 sc->sc_bus.intr_context++; 985 sc->sc_bus.no_intrs++; 986 DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n", 987 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 988 (u_int)eintrs)); 989 990 if (eintrs & OHCI_SO) { 991 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev)); 992 /* XXX do what */ 993 intrs &= ~OHCI_SO; 994 } 995 if (eintrs & OHCI_WDH) { 996 ohci_process_done(sc, done &~ OHCI_DONE_INTRS); 997 intrs &= ~OHCI_WDH; 998 } 999 if (eintrs & OHCI_RD) { 1000 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1001 /* XXX process resume detect */ 1002 } 1003 if (eintrs & OHCI_UE) { 1004 printf("%s: unrecoverable error, controller halted\n", 1005 USBDEVNAME(sc->sc_bus.bdev)); 1006 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1007 /* XXX what else */ 1008 } 1009 if (eintrs & OHCI_RHSC) { 1010 ohci_rhsc(sc, sc->sc_intrxfer); 1011 intrs &= ~OHCI_RHSC; 1012 1013 /* 1014 * Disable RHSC interrupt for now, because it will be 1015 * on until the port has been reset. 1016 */ 1017 ohci_rhsc_able(sc, 0); 1018 } 1019 1020 sc->sc_bus.intr_context--; 1021 1022 /* Block unprocessed interrupts. XXX */ 1023 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 1024 sc->sc_eintrs &= ~intrs; 1025 1026 return (1); 1027 } 1028 1029 void 1030 ohci_rhsc_able(sc, on) 1031 ohci_softc_t *sc; 1032 int on; 1033 { 1034 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1035 if (on) { 1036 sc->sc_eintrs |= OHCI_RHSC; 1037 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1038 } else { 1039 sc->sc_eintrs &= ~OHCI_RHSC; 1040 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1041 } 1042 } 1043 1044 #ifdef OHCI_DEBUG 1045 char *ohci_cc_strs[] = { 1046 "NO_ERROR", 1047 "CRC", 1048 "BIT_STUFFING", 1049 "DATA_TOGGLE_MISMATCH", 1050 "STALL", 1051 "DEVICE_NOT_RESPONDING", 1052 "PID_CHECK_FAILURE", 1053 "UNEXPECTED_PID", 1054 "DATA_OVERRUN", 1055 "DATA_UNDERRUN", 1056 "BUFFER_OVERRUN", 1057 "BUFFER_UNDERRUN", 1058 "NOT_ACCESSED", 1059 }; 1060 #endif 1061 1062 void 1063 ohci_process_done(sc, done) 1064 ohci_softc_t *sc; 1065 ohci_physaddr_t done; 1066 { 1067 ohci_soft_td_t *std, *sdone, *stdnext; 1068 usbd_xfer_handle xfer; 1069 int len, cc; 1070 1071 DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done)); 1072 1073 /* Reverse the done list. */ 1074 for (sdone = 0; done; done = LE(std->td.td_nexttd)) { 1075 std = ohci_hash_find_td(sc, done); 1076 std->dnext = sdone; 1077 sdone = std; 1078 } 1079 1080 #ifdef OHCI_DEBUG 1081 if (ohcidebug > 10) { 1082 DPRINTF(("ohci_process_done: TD done:\n")); 1083 ohci_dump_tds(sdone); 1084 } 1085 #endif 1086 1087 for (std = sdone; std; std = stdnext) { 1088 xfer = std->xfer; 1089 stdnext = std->dnext; 1090 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1091 std, xfer, xfer->hcpriv)); 1092 cc = OHCI_TD_GET_CC(LE(std->td.td_flags)); 1093 usb_untimeout(ohci_timeout, xfer, xfer->timo_handle); 1094 if (xfer->status == USBD_CANCELLED || 1095 xfer->status == USBD_TIMEOUT) { 1096 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1097 xfer)); 1098 /* Handled by abort routine. */ 1099 } else if (cc == OHCI_CC_NO_ERROR) { 1100 len = std->len; 1101 if (std->td.td_cbp != 0) 1102 len -= LE(std->td.td_be) - 1103 LE(std->td.td_cbp) + 1; 1104 if (std->flags & OHCI_ADD_LEN) 1105 xfer->actlen += len; 1106 if (std->flags & OHCI_CALL_DONE) { 1107 xfer->status = USBD_NORMAL_COMPLETION; 1108 usb_transfer_complete(xfer); 1109 } 1110 ohci_hash_rem_td(sc, std); 1111 ohci_free_std(sc, std); 1112 } else { 1113 /* 1114 * Endpoint is halted. First unlink all the TDs 1115 * belonging to the failed transfer, and then restart 1116 * the endpoint. 1117 */ 1118 ohci_soft_td_t *p, *n; 1119 struct ohci_pipe *opipe = 1120 (struct ohci_pipe *)xfer->pipe; 1121 1122 DPRINTF(("ohci_process_done: error cc=%d (%s)\n", 1123 OHCI_TD_GET_CC(LE(std->td.td_flags)), 1124 ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td.td_flags))])); 1125 1126 /* remove TDs */ 1127 for (p = std; p->xfer == xfer; p = n) { 1128 n = p->nexttd; 1129 ohci_hash_rem_td(sc, p); 1130 ohci_free_std(sc, p); 1131 } 1132 1133 /* clear halt */ 1134 opipe->sed->ed.ed_headp = LE(p->physaddr); 1135 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1136 1137 if (cc == OHCI_CC_STALL) 1138 xfer->status = USBD_STALLED; 1139 else 1140 xfer->status = USBD_IOERROR; 1141 usb_transfer_complete(xfer); 1142 } 1143 } 1144 } 1145 1146 void 1147 ohci_device_ctrl_done(xfer) 1148 usbd_xfer_handle xfer; 1149 { 1150 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1151 1152 #ifdef DIAGNOSTIC 1153 if (!(xfer->rqflags & URQ_REQUEST)) { 1154 panic("ohci_ctrl_done: not a request\n"); 1155 } 1156 #endif 1157 xfer->hcpriv = NULL; 1158 } 1159 1160 void 1161 ohci_device_intr_done(xfer) 1162 usbd_xfer_handle xfer; 1163 { 1164 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1165 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1166 ohci_soft_ed_t *sed = opipe->sed; 1167 ohci_soft_td_t *data, *tail; 1168 1169 1170 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1171 xfer, xfer->actlen)); 1172 1173 xfer->hcpriv = NULL; 1174 1175 if (xfer->pipe->repeat) { 1176 data = opipe->tail.td; 1177 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1178 if (tail == NULL) { 1179 xfer->status = USBD_NOMEM; 1180 return; 1181 } 1182 tail->xfer = NULL; 1183 1184 data->td.td_flags = LE( 1185 OHCI_TD_IN | OHCI_TD_NOCC | 1186 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1187 if (xfer->flags & USBD_SHORT_XFER_OK) 1188 data->td.td_flags |= LE(OHCI_TD_R); 1189 data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf)); 1190 data->nexttd = tail; 1191 data->td.td_nexttd = LE(tail->physaddr); 1192 data->td.td_be = LE(LE(data->td.td_cbp) + xfer->length - 1); 1193 data->len = xfer->length; 1194 data->xfer = xfer; 1195 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1196 xfer->hcpriv = data; 1197 xfer->actlen = 0; 1198 1199 ohci_hash_add_td(sc, data); 1200 sed->ed.ed_tailp = LE(tail->physaddr); 1201 opipe->tail.td = tail; 1202 } 1203 } 1204 1205 void 1206 ohci_device_bulk_done(xfer) 1207 usbd_xfer_handle xfer; 1208 { 1209 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1210 xfer, xfer->actlen)); 1211 1212 xfer->hcpriv = NULL; 1213 } 1214 1215 void 1216 ohci_rhsc(sc, xfer) 1217 ohci_softc_t *sc; 1218 usbd_xfer_handle xfer; 1219 { 1220 usbd_pipe_handle pipe; 1221 struct ohci_pipe *opipe; 1222 u_char *p; 1223 int i, m; 1224 int hstatus; 1225 1226 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1227 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1228 sc, xfer, hstatus)); 1229 1230 if (xfer == NULL) { 1231 /* Just ignore the change. */ 1232 return; 1233 } 1234 1235 pipe = xfer->pipe; 1236 opipe = (struct ohci_pipe *)pipe; 1237 1238 p = KERNADDR(&xfer->dmabuf); 1239 m = min(sc->sc_noport, xfer->length * 8 - 1); 1240 memset(p, 0, xfer->length); 1241 for (i = 1; i <= m; i++) { 1242 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1243 p[i/8] |= 1 << (i%8); 1244 } 1245 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1246 xfer->actlen = xfer->length; 1247 xfer->status = USBD_NORMAL_COMPLETION; 1248 1249 usb_transfer_complete(xfer); 1250 } 1251 1252 void 1253 ohci_root_intr_done(xfer) 1254 usbd_xfer_handle xfer; 1255 { 1256 xfer->hcpriv = NULL; 1257 } 1258 1259 /* 1260 * Wait here until controller claims to have an interrupt. 1261 * Then call ohci_intr and return. Use timeout to avoid waiting 1262 * too long. 1263 */ 1264 void 1265 ohci_waitintr(sc, xfer) 1266 ohci_softc_t *sc; 1267 usbd_xfer_handle xfer; 1268 { 1269 int timo = xfer->timeout; 1270 int usecs; 1271 u_int32_t intrs; 1272 1273 xfer->status = USBD_IN_PROGRESS; 1274 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1275 usb_delay_ms(&sc->sc_bus, 1); 1276 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1277 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1278 #ifdef OHCI_DEBUG 1279 if (ohcidebug > 15) 1280 ohci_dumpregs(sc); 1281 #endif 1282 if (intrs) { 1283 ohci_intr1(sc); 1284 if (xfer->status != USBD_IN_PROGRESS) 1285 return; 1286 } 1287 } 1288 1289 /* Timeout */ 1290 DPRINTF(("ohci_waitintr: timeout\n")); 1291 xfer->status = USBD_TIMEOUT; 1292 usb_transfer_complete(xfer); 1293 /* XXX should free TD */ 1294 } 1295 1296 void 1297 ohci_poll(bus) 1298 struct usbd_bus *bus; 1299 { 1300 ohci_softc_t *sc = (ohci_softc_t *)bus; 1301 1302 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1303 ohci_intr1(sc); 1304 } 1305 1306 usbd_status 1307 ohci_device_request(xfer) 1308 usbd_xfer_handle xfer; 1309 { 1310 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1311 usb_device_request_t *req = &xfer->request; 1312 usbd_device_handle dev = opipe->pipe.device; 1313 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1314 int addr = dev->address; 1315 ohci_soft_td_t *setup, *data = 0, *stat, *next, *tail; 1316 ohci_soft_ed_t *sed; 1317 int isread; 1318 int len; 1319 usbd_status err; 1320 int s; 1321 1322 isread = req->bmRequestType & UT_READ; 1323 len = UGETW(req->wLength); 1324 1325 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1326 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1327 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1328 UGETW(req->wIndex), len, addr, 1329 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1330 1331 setup = opipe->tail.td; 1332 stat = ohci_alloc_std(sc); 1333 if (stat == NULL) { 1334 err = USBD_NOMEM; 1335 goto bad1; 1336 } 1337 tail = ohci_alloc_std(sc); 1338 if (tail == NULL) { 1339 err = USBD_NOMEM; 1340 goto bad2; 1341 } 1342 tail->xfer = NULL; 1343 1344 sed = opipe->sed; 1345 opipe->u.ctl.length = len; 1346 1347 /* Update device address and length since they may have changed. */ 1348 /* XXX This only needs to be done once, but it's too early in open. */ 1349 sed->ed.ed_flags = LE( 1350 (LE(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1351 OHCI_ED_SET_FA(addr) | 1352 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1353 1354 /* Set up data transaction */ 1355 if (len != 0) { 1356 data = ohci_alloc_std(sc); 1357 if (data == NULL) { 1358 err = USBD_NOMEM; 1359 goto bad3; 1360 } 1361 data->td.td_flags = LE( 1362 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 1363 OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR | 1364 (xfer->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0)); 1365 data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf)); 1366 data->nexttd = stat; 1367 data->td.td_nexttd = LE(stat->physaddr); 1368 data->td.td_be = LE(LE(data->td.td_cbp) + len - 1); 1369 data->len = len; 1370 data->xfer = xfer; 1371 data->flags = OHCI_ADD_LEN; 1372 1373 next = data; 1374 stat->flags = OHCI_CALL_DONE; 1375 } else { 1376 next = stat; 1377 /* XXX ADD_LEN? */ 1378 stat->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1379 } 1380 1381 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1382 1383 setup->td.td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC | 1384 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1385 setup->td.td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma)); 1386 setup->nexttd = next; 1387 setup->td.td_nexttd = LE(next->physaddr); 1388 setup->td.td_be = LE(LE(setup->td.td_cbp) + sizeof *req - 1); 1389 setup->len = 0; /* XXX The number of byte we count */ 1390 setup->xfer = xfer; 1391 setup->flags = 0; 1392 xfer->hcpriv = setup; 1393 1394 stat->td.td_flags = LE( 1395 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC | 1396 OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1397 stat->td.td_cbp = 0; 1398 stat->nexttd = tail; 1399 stat->td.td_nexttd = LE(tail->physaddr); 1400 stat->td.td_be = 0; 1401 stat->len = 0; 1402 stat->xfer = xfer; 1403 1404 #ifdef OHCI_DEBUG 1405 if (ohcidebug > 5) { 1406 DPRINTF(("ohci_device_request:\n")); 1407 ohci_dump_ed(sed); 1408 ohci_dump_tds(setup); 1409 } 1410 #endif 1411 1412 /* Insert ED in schedule */ 1413 s = splusb(); 1414 ohci_hash_add_td(sc, setup); 1415 if (len != 0) 1416 ohci_hash_add_td(sc, data); 1417 ohci_hash_add_td(sc, stat); 1418 sed->ed.ed_tailp = LE(tail->physaddr); 1419 opipe->tail.td = tail; 1420 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1421 if (xfer->timeout && !sc->sc_bus.use_polling) { 1422 usb_timeout(ohci_timeout, xfer, 1423 MS_TO_TICKS(xfer->timeout), xfer->timo_handle); 1424 } 1425 splx(s); 1426 1427 #ifdef OHCI_DEBUG 1428 if (ohcidebug > 5) { 1429 usb_delay_ms(&sc->sc_bus, 5); 1430 DPRINTF(("ohci_device_request: status=%x\n", 1431 OREAD4(sc, OHCI_COMMAND_STATUS))); 1432 ohci_dump_ed(sed); 1433 ohci_dump_tds(setup); 1434 } 1435 #endif 1436 1437 return (USBD_NORMAL_COMPLETION); 1438 1439 bad3: 1440 ohci_free_std(sc, tail); 1441 bad2: 1442 ohci_free_std(sc, stat); 1443 bad1: 1444 return (err); 1445 } 1446 1447 /* 1448 * Add an ED to the schedule. Called at splusb(). 1449 */ 1450 void 1451 ohci_add_ed(sed, head) 1452 ohci_soft_ed_t *sed; 1453 ohci_soft_ed_t *head; 1454 { 1455 SPLUSBCHECK; 1456 sed->next = head->next; 1457 sed->ed.ed_nexted = head->ed.ed_nexted; 1458 head->next = sed; 1459 head->ed.ed_nexted = LE(sed->physaddr); 1460 } 1461 1462 /* 1463 * Remove an ED from the schedule. Called at splusb(). 1464 */ 1465 void 1466 ohci_rem_ed(sed, head) 1467 ohci_soft_ed_t *sed; 1468 ohci_soft_ed_t *head; 1469 { 1470 ohci_soft_ed_t *p; 1471 1472 SPLUSBCHECK; 1473 1474 /* XXX */ 1475 for (p = head; p == NULL && p->next != sed; p = p->next) 1476 ; 1477 if (p == NULL) 1478 panic("ohci_rem_ed: ED not found\n"); 1479 p->next = sed->next; 1480 p->ed.ed_nexted = sed->ed.ed_nexted; 1481 } 1482 1483 /* 1484 * When a transfer is completed the TD is added to the done queue by 1485 * the host controller. This queue is the processed by software. 1486 * Unfortunately the queue contains the physical address of the TD 1487 * and we have no simple way to translate this back to a kernel address. 1488 * To make the translation possible (and fast) we use a hash table of 1489 * TDs currently in the schedule. The physical address is used as the 1490 * hash value. 1491 */ 1492 1493 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1494 /* Called at splusb() */ 1495 void 1496 ohci_hash_add_td(sc, std) 1497 ohci_softc_t *sc; 1498 ohci_soft_td_t *std; 1499 { 1500 int h = HASH(std->physaddr); 1501 1502 SPLUSBCHECK; 1503 1504 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1505 } 1506 1507 /* Called at splusb() */ 1508 void 1509 ohci_hash_rem_td(sc, std) 1510 ohci_softc_t *sc; 1511 ohci_soft_td_t *std; 1512 { 1513 SPLUSBCHECK; 1514 1515 LIST_REMOVE(std, hnext); 1516 } 1517 1518 ohci_soft_td_t * 1519 ohci_hash_find_td(sc, a) 1520 ohci_softc_t *sc; 1521 ohci_physaddr_t a; 1522 { 1523 int h = HASH(a); 1524 ohci_soft_td_t *std; 1525 1526 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1527 std != NULL; 1528 std = LIST_NEXT(std, hnext)) 1529 if (std->physaddr == a) 1530 return (std); 1531 panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a); 1532 } 1533 1534 void 1535 ohci_timeout(addr) 1536 void *addr; 1537 { 1538 usbd_xfer_handle xfer = addr; 1539 int s; 1540 1541 DPRINTF(("ohci_timeout: xfer=%p\n", xfer)); 1542 1543 s = splusb(); 1544 xfer->device->bus->intr_context++; 1545 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1546 xfer->device->bus->intr_context--; 1547 splx(s); 1548 } 1549 1550 #ifdef OHCI_DEBUG 1551 void 1552 ohci_dump_tds(std) 1553 ohci_soft_td_t *std; 1554 { 1555 for (; std; std = std->nexttd) 1556 ohci_dump_td(std); 1557 } 1558 1559 void 1560 ohci_dump_td(std) 1561 ohci_soft_td_t *std; 1562 { 1563 DPRINTF(("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1564 "nexttd=0x%08lx be=0x%08lx\n", 1565 std, (u_long)std->physaddr, 1566 (int)LE(std->td.td_flags), 1567 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1568 OHCI_TD_GET_DI(LE(std->td.td_flags)), 1569 OHCI_TD_GET_EC(LE(std->td.td_flags)), 1570 OHCI_TD_GET_CC(LE(std->td.td_flags)), 1571 (u_long)LE(std->td.td_cbp), 1572 (u_long)LE(std->td.td_nexttd), (u_long)LE(std->td.td_be))); 1573 } 1574 1575 void 1576 ohci_dump_ed(sed) 1577 ohci_soft_ed_t *sed; 1578 { 1579 DPRINTF(("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx " 1580 "headp=%b nexted=0x%08lx\n", 1581 sed, (u_long)sed->physaddr, 1582 OHCI_ED_GET_FA(LE(sed->ed.ed_flags)), 1583 OHCI_ED_GET_EN(LE(sed->ed.ed_flags)), 1584 OHCI_ED_GET_MAXP(LE(sed->ed.ed_flags)), 1585 (int)LE(sed->ed.ed_flags), 1586 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1587 (u_long)LE(sed->ed.ed_tailp), 1588 (u_long)LE(sed->ed.ed_headp), 1589 "\20\1HALT\2CARRY", 1590 (u_long)LE(sed->ed.ed_nexted))); 1591 } 1592 #endif 1593 1594 usbd_status 1595 ohci_open(pipe) 1596 usbd_pipe_handle pipe; 1597 { 1598 usbd_device_handle dev = pipe->device; 1599 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1600 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1601 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1602 u_int8_t addr = dev->address; 1603 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1604 ohci_soft_ed_t *sed; 1605 ohci_soft_td_t *std; 1606 ohci_soft_itd_t *sitd; 1607 ohci_physaddr_t tdphys; 1608 u_int32_t fmt; 1609 usbd_status err; 1610 int s; 1611 1612 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1613 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1614 if (addr == sc->sc_addr) { 1615 switch (ed->bEndpointAddress) { 1616 case USB_CONTROL_ENDPOINT: 1617 pipe->methods = &ohci_root_ctrl_methods; 1618 break; 1619 case UE_DIR_IN | OHCI_INTR_ENDPT: 1620 pipe->methods = &ohci_root_intr_methods; 1621 break; 1622 default: 1623 return (USBD_INVAL); 1624 } 1625 } else { 1626 sed = ohci_alloc_sed(sc); 1627 if (sed == NULL) 1628 goto bad0; 1629 opipe->sed = sed; 1630 if (xfertype == UE_ISOCHRONOUS) { 1631 sitd = ohci_alloc_sitd(sc); 1632 if (sitd == NULL) { 1633 ohci_free_sitd(sc, sitd); 1634 goto bad1; 1635 } 1636 opipe->tail.itd = sitd; 1637 tdphys = LE(sitd->physaddr); 1638 fmt = OHCI_ED_FORMAT_ISO; 1639 } else { 1640 std = ohci_alloc_std(sc); 1641 if (std == NULL) { 1642 ohci_free_std(sc, std); 1643 goto bad1; 1644 } 1645 opipe->tail.td = std; 1646 tdphys = LE(std->physaddr); 1647 fmt = OHCI_ED_FORMAT_GEN; 1648 } 1649 sed->ed.ed_flags = LE( 1650 OHCI_ED_SET_FA(addr) | 1651 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1652 OHCI_ED_DIR_TD | 1653 (dev->lowspeed ? OHCI_ED_SPEED : 0) | fmt | 1654 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1655 sed->ed.ed_headp = sed->ed.ed_tailp = tdphys; 1656 1657 switch (xfertype) { 1658 case UE_CONTROL: 1659 pipe->methods = &ohci_device_ctrl_methods; 1660 err = usb_allocmem(&sc->sc_bus, 1661 sizeof(usb_device_request_t), 1662 0, &opipe->u.ctl.reqdma); 1663 if (err) 1664 goto bad; 1665 s = splusb(); 1666 ohci_add_ed(sed, sc->sc_ctrl_head); 1667 splx(s); 1668 break; 1669 case UE_INTERRUPT: 1670 pipe->methods = &ohci_device_intr_methods; 1671 return (ohci_device_setintr(sc, opipe, ed->bInterval)); 1672 case UE_ISOCHRONOUS: 1673 pipe->methods = &ohci_device_isoc_methods; 1674 return (ohci_setup_isoc(pipe)); 1675 case UE_BULK: 1676 pipe->methods = &ohci_device_bulk_methods; 1677 s = splusb(); 1678 ohci_add_ed(sed, sc->sc_bulk_head); 1679 splx(s); 1680 break; 1681 } 1682 } 1683 return (USBD_NORMAL_COMPLETION); 1684 1685 bad: 1686 ohci_free_std(sc, std); 1687 bad1: 1688 ohci_free_sed(sc, sed); 1689 bad0: 1690 return (USBD_NOMEM); 1691 1692 } 1693 1694 /* 1695 * Close a reqular pipe. 1696 * Assumes that there are no pending transactions. 1697 */ 1698 void 1699 ohci_close_pipe(pipe, head) 1700 usbd_pipe_handle pipe; 1701 ohci_soft_ed_t *head; 1702 { 1703 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1704 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1705 ohci_soft_ed_t *sed = opipe->sed; 1706 int s; 1707 1708 s = splusb(); 1709 #ifdef DIAGNOSTIC 1710 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 1711 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 1712 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) { 1713 ohci_physaddr_t td = sed->ed.ed_headp; 1714 ohci_soft_td_t *std; 1715 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]); 1716 std != NULL; 1717 std = LIST_NEXT(std, hnext)) 1718 if (std->physaddr == td) 1719 break; 1720 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 1721 "tl=0x%x pipe=%p, std=%p\n", sed, 1722 (int)LE(sed->ed.ed_headp), (int)LE(sed->ed.ed_tailp), 1723 pipe, std); 1724 usb_delay_ms(&sc->sc_bus, 2); 1725 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 1726 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) 1727 printf("ohci_close_pipe: pipe still not empty\n"); 1728 } 1729 #endif 1730 ohci_rem_ed(sed, head); 1731 splx(s); 1732 ohci_free_sed(sc, opipe->sed); 1733 } 1734 1735 /* 1736 * Abort a device request. 1737 * If this routine is called at splusb() it guarantees that the request 1738 * will be removed from the hardware scheduling and that the callback 1739 * for it will be called with USBD_CANCELLED status. 1740 * It's impossible to guarantee that the requested transfer will not 1741 * have happened since the hardware runs concurrently. 1742 * If the transaction has already happened we rely on the ordinary 1743 * interrupt processing to process it. 1744 */ 1745 void 1746 ohci_abort_xfer(xfer, status) 1747 usbd_xfer_handle xfer; 1748 usbd_status status; 1749 { 1750 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1751 ohci_soft_ed_t *sed; 1752 1753 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p\n", xfer, opipe)); 1754 1755 xfer->status = status; 1756 1757 usb_untimeout(ohci_timeout, xfer, xfer->timo_handle); 1758 1759 sed = opipe->sed; 1760 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 1761 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); /* force hardware skip */ 1762 1763 #if 1 1764 if (xfer->device->bus->intr_context) { 1765 /* We have no process context, so we can't use tsleep(). */ 1766 timeout(ohci_abort_xfer_end, xfer, hz / USB_FRAMES_PER_SECOND); 1767 } else { 1768 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 1769 KASSERT(intr_nesting_level == 0, 1770 ("ohci_abort_req in interrupt context")); 1771 #endif 1772 usb_delay_ms(opipe->pipe.device->bus, 1); 1773 ohci_abort_xfer_end(xfer); 1774 } 1775 #else 1776 delay(1000); 1777 ohci_abort_xfer_end(xfer); 1778 #endif 1779 } 1780 1781 void 1782 ohci_abort_xfer_end(v) 1783 void *v; 1784 { 1785 usbd_xfer_handle xfer = v; 1786 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1787 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1788 ohci_soft_ed_t *sed; 1789 ohci_soft_td_t *p, *n; 1790 int s; 1791 1792 s = splusb(); 1793 1794 p = xfer->hcpriv; 1795 #ifdef DIAGNOSTIC 1796 if (p == NULL) { 1797 printf("ohci_abort_xfer: hcpriv==0\n"); 1798 return; 1799 } 1800 #endif 1801 for (; p->xfer == xfer; p = n) { 1802 n = p->nexttd; 1803 ohci_hash_rem_td(sc, p); 1804 ohci_free_std(sc, p); 1805 } 1806 1807 sed = opipe->sed; 1808 DPRINTFN(2,("ohci_abort_xfer: set hd=%x, tl=%x\n", 1809 (int)LE(p->physaddr), (int)LE(sed->ed.ed_tailp))); 1810 sed->ed.ed_headp = p->physaddr; /* unlink TDs */ 1811 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); /* remove hardware skip */ 1812 1813 usb_transfer_complete(xfer); 1814 1815 splx(s); 1816 } 1817 1818 /* 1819 * Data structures and routines to emulate the root hub. 1820 */ 1821 static usb_device_descriptor_t ohci_devd = { 1822 USB_DEVICE_DESCRIPTOR_SIZE, 1823 UDESC_DEVICE, /* type */ 1824 {0x00, 0x01}, /* USB version */ 1825 UCLASS_HUB, /* class */ 1826 USUBCLASS_HUB, /* subclass */ 1827 0, /* protocol */ 1828 64, /* max packet */ 1829 {0},{0},{0x00,0x01}, /* device id */ 1830 1,2,0, /* string indicies */ 1831 1 /* # of configurations */ 1832 }; 1833 1834 static usb_config_descriptor_t ohci_confd = { 1835 USB_CONFIG_DESCRIPTOR_SIZE, 1836 UDESC_CONFIG, 1837 {USB_CONFIG_DESCRIPTOR_SIZE + 1838 USB_INTERFACE_DESCRIPTOR_SIZE + 1839 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1840 1, 1841 1, 1842 0, 1843 UC_SELF_POWERED, 1844 0 /* max power */ 1845 }; 1846 1847 static usb_interface_descriptor_t ohci_ifcd = { 1848 USB_INTERFACE_DESCRIPTOR_SIZE, 1849 UDESC_INTERFACE, 1850 0, 1851 0, 1852 1, 1853 UCLASS_HUB, 1854 USUBCLASS_HUB, 1855 0, 1856 0 1857 }; 1858 1859 static usb_endpoint_descriptor_t ohci_endpd = { 1860 USB_ENDPOINT_DESCRIPTOR_SIZE, 1861 UDESC_ENDPOINT, 1862 UE_DIR_IN | OHCI_INTR_ENDPT, 1863 UE_INTERRUPT, 1864 {8, 0}, /* max packet */ 1865 255 1866 }; 1867 1868 static usb_hub_descriptor_t ohci_hubd = { 1869 USB_HUB_DESCRIPTOR_SIZE, 1870 UDESC_HUB, 1871 0, 1872 {0,0}, 1873 0, 1874 0, 1875 {0}, 1876 }; 1877 1878 static int 1879 ohci_str(p, l, s) 1880 usb_string_descriptor_t *p; 1881 int l; 1882 char *s; 1883 { 1884 int i; 1885 1886 if (l == 0) 1887 return (0); 1888 p->bLength = 2 * strlen(s) + 2; 1889 if (l == 1) 1890 return (1); 1891 p->bDescriptorType = UDESC_STRING; 1892 l -= 2; 1893 for (i = 0; s[i] && l > 1; i++, l -= 2) 1894 USETW2(p->bString[i], 0, s[i]); 1895 return (2*i+2); 1896 } 1897 1898 /* 1899 * Simulate a hardware hub by handling all the necessary requests. 1900 */ 1901 static usbd_status 1902 ohci_root_ctrl_transfer(xfer) 1903 usbd_xfer_handle xfer; 1904 { 1905 usbd_status err; 1906 1907 /* Insert last in queue. */ 1908 err = usb_insert_transfer(xfer); 1909 if (err) 1910 return (err); 1911 1912 /* Pipe isn't running, start first */ 1913 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1914 } 1915 1916 static usbd_status 1917 ohci_root_ctrl_start(xfer) 1918 usbd_xfer_handle xfer; 1919 { 1920 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 1921 usb_device_request_t *req; 1922 void *buf = NULL; 1923 int port, i; 1924 int s, len, value, index, l, totlen = 0; 1925 usb_port_status_t ps; 1926 usb_hub_descriptor_t hubd; 1927 usbd_status err; 1928 u_int32_t v; 1929 1930 #ifdef DIAGNOSTIC 1931 if (!(xfer->rqflags & URQ_REQUEST)) 1932 /* XXX panic */ 1933 return (USBD_INVAL); 1934 #endif 1935 req = &xfer->request; 1936 1937 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 1938 req->bmRequestType, req->bRequest)); 1939 1940 len = UGETW(req->wLength); 1941 value = UGETW(req->wValue); 1942 index = UGETW(req->wIndex); 1943 1944 if (len != 0) 1945 buf = KERNADDR(&xfer->dmabuf); 1946 1947 #define C(x,y) ((x) | ((y) << 8)) 1948 switch(C(req->bRequest, req->bmRequestType)) { 1949 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1950 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1951 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1952 /* 1953 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1954 * for the integrated root hub. 1955 */ 1956 break; 1957 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1958 if (len > 0) { 1959 *(u_int8_t *)buf = sc->sc_conf; 1960 totlen = 1; 1961 } 1962 break; 1963 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1964 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 1965 switch(value >> 8) { 1966 case UDESC_DEVICE: 1967 if ((value & 0xff) != 0) { 1968 err = USBD_IOERROR; 1969 goto ret; 1970 } 1971 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1972 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 1973 memcpy(buf, &ohci_devd, l); 1974 break; 1975 case UDESC_CONFIG: 1976 if ((value & 0xff) != 0) { 1977 err = USBD_IOERROR; 1978 goto ret; 1979 } 1980 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1981 memcpy(buf, &ohci_confd, l); 1982 buf = (char *)buf + l; 1983 len -= l; 1984 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1985 totlen += l; 1986 memcpy(buf, &ohci_ifcd, l); 1987 buf = (char *)buf + l; 1988 len -= l; 1989 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1990 totlen += l; 1991 memcpy(buf, &ohci_endpd, l); 1992 break; 1993 case UDESC_STRING: 1994 if (len == 0) 1995 break; 1996 *(u_int8_t *)buf = 0; 1997 totlen = 1; 1998 switch (value & 0xff) { 1999 case 1: /* Vendor */ 2000 totlen = ohci_str(buf, len, sc->sc_vendor); 2001 break; 2002 case 2: /* Product */ 2003 totlen = ohci_str(buf, len, "OHCI root hub"); 2004 break; 2005 } 2006 break; 2007 default: 2008 err = USBD_IOERROR; 2009 goto ret; 2010 } 2011 break; 2012 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2013 if (len > 0) { 2014 *(u_int8_t *)buf = 0; 2015 totlen = 1; 2016 } 2017 break; 2018 case C(UR_GET_STATUS, UT_READ_DEVICE): 2019 if (len > 1) { 2020 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2021 totlen = 2; 2022 } 2023 break; 2024 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2025 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2026 if (len > 1) { 2027 USETW(((usb_status_t *)buf)->wStatus, 0); 2028 totlen = 2; 2029 } 2030 break; 2031 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2032 if (value >= USB_MAX_DEVICES) { 2033 err = USBD_IOERROR; 2034 goto ret; 2035 } 2036 sc->sc_addr = value; 2037 break; 2038 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2039 if (value != 0 && value != 1) { 2040 err = USBD_IOERROR; 2041 goto ret; 2042 } 2043 sc->sc_conf = value; 2044 break; 2045 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2046 break; 2047 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2048 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2049 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2050 err = USBD_IOERROR; 2051 goto ret; 2052 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2053 break; 2054 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2055 break; 2056 /* Hub requests */ 2057 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2058 break; 2059 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2060 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2061 "port=%d feature=%d\n", 2062 index, value)); 2063 if (index < 1 || index > sc->sc_noport) { 2064 err = USBD_IOERROR; 2065 goto ret; 2066 } 2067 port = OHCI_RH_PORT_STATUS(index); 2068 switch(value) { 2069 case UHF_PORT_ENABLE: 2070 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2071 break; 2072 case UHF_PORT_SUSPEND: 2073 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2074 break; 2075 case UHF_PORT_POWER: 2076 OWRITE4(sc, port, UPS_LOW_SPEED); 2077 break; 2078 case UHF_C_PORT_CONNECTION: 2079 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2080 break; 2081 case UHF_C_PORT_ENABLE: 2082 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2083 break; 2084 case UHF_C_PORT_SUSPEND: 2085 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2086 break; 2087 case UHF_C_PORT_OVER_CURRENT: 2088 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2089 break; 2090 case UHF_C_PORT_RESET: 2091 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2092 break; 2093 default: 2094 err = USBD_IOERROR; 2095 goto ret; 2096 } 2097 switch(value) { 2098 case UHF_C_PORT_CONNECTION: 2099 case UHF_C_PORT_ENABLE: 2100 case UHF_C_PORT_SUSPEND: 2101 case UHF_C_PORT_OVER_CURRENT: 2102 case UHF_C_PORT_RESET: 2103 /* Enable RHSC interrupt if condition is cleared. */ 2104 if ((OREAD4(sc, port) >> 16) == 0) 2105 ohci_rhsc_able(sc, 1); 2106 break; 2107 default: 2108 break; 2109 } 2110 break; 2111 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2112 if (value != 0) { 2113 err = USBD_IOERROR; 2114 goto ret; 2115 } 2116 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2117 hubd = ohci_hubd; 2118 hubd.bNbrPorts = sc->sc_noport; 2119 USETW(hubd.wHubCharacteristics, 2120 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2121 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2122 /* XXX overcurrent */ 2123 ); 2124 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2125 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2126 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2127 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2128 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2129 l = min(len, hubd.bDescLength); 2130 totlen = l; 2131 memcpy(buf, &hubd, l); 2132 break; 2133 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2134 if (len != 4) { 2135 err = USBD_IOERROR; 2136 goto ret; 2137 } 2138 memset(buf, 0, len); /* ? XXX */ 2139 totlen = len; 2140 break; 2141 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2142 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2143 index)); 2144 if (index < 1 || index > sc->sc_noport) { 2145 err = USBD_IOERROR; 2146 goto ret; 2147 } 2148 if (len != 4) { 2149 err = USBD_IOERROR; 2150 goto ret; 2151 } 2152 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2153 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2154 v)); 2155 USETW(ps.wPortStatus, v); 2156 USETW(ps.wPortChange, v >> 16); 2157 l = min(len, sizeof ps); 2158 memcpy(buf, &ps, l); 2159 totlen = l; 2160 break; 2161 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2162 err = USBD_IOERROR; 2163 goto ret; 2164 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2165 break; 2166 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2167 if (index < 1 || index > sc->sc_noport) { 2168 err = USBD_IOERROR; 2169 goto ret; 2170 } 2171 port = OHCI_RH_PORT_STATUS(index); 2172 switch(value) { 2173 case UHF_PORT_ENABLE: 2174 OWRITE4(sc, port, UPS_PORT_ENABLED); 2175 break; 2176 case UHF_PORT_SUSPEND: 2177 OWRITE4(sc, port, UPS_SUSPEND); 2178 break; 2179 case UHF_PORT_RESET: 2180 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2181 index)); 2182 OWRITE4(sc, port, UPS_RESET); 2183 for (i = 0; i < 10; i++) { 2184 usb_delay_ms(&sc->sc_bus, 10); 2185 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2186 break; 2187 } 2188 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2189 index, OREAD4(sc, port))); 2190 break; 2191 case UHF_PORT_POWER: 2192 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2193 "%d\n", index)); 2194 OWRITE4(sc, port, UPS_PORT_POWER); 2195 break; 2196 default: 2197 err = USBD_IOERROR; 2198 goto ret; 2199 } 2200 break; 2201 default: 2202 err = USBD_IOERROR; 2203 goto ret; 2204 } 2205 xfer->actlen = totlen; 2206 err = USBD_NORMAL_COMPLETION; 2207 ret: 2208 xfer->status = err; 2209 s = splusb(); 2210 usb_transfer_complete(xfer); 2211 splx(s); 2212 return (USBD_IN_PROGRESS); 2213 } 2214 2215 /* Abort a root control request. */ 2216 static void 2217 ohci_root_ctrl_abort(xfer) 2218 usbd_xfer_handle xfer; 2219 { 2220 /* Nothing to do, all transfers are synchronous. */ 2221 } 2222 2223 /* Close the root pipe. */ 2224 static void 2225 ohci_root_ctrl_close(pipe) 2226 usbd_pipe_handle pipe; 2227 { 2228 DPRINTF(("ohci_root_ctrl_close\n")); 2229 /* Nothing to do. */ 2230 } 2231 2232 static usbd_status 2233 ohci_root_intr_transfer(xfer) 2234 usbd_xfer_handle xfer; 2235 { 2236 usbd_status err; 2237 2238 /* Insert last in queue. */ 2239 err = usb_insert_transfer(xfer); 2240 if (err) 2241 return (err); 2242 2243 /* Pipe isn't running, start first */ 2244 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2245 } 2246 2247 static usbd_status 2248 ohci_root_intr_start(xfer) 2249 usbd_xfer_handle xfer; 2250 { 2251 usbd_pipe_handle pipe = xfer->pipe; 2252 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2253 2254 sc->sc_intrxfer = xfer; 2255 2256 return (USBD_IN_PROGRESS); 2257 } 2258 2259 /* Abort a root interrupt request. */ 2260 static void 2261 ohci_root_intr_abort(xfer) 2262 usbd_xfer_handle xfer; 2263 { 2264 int s; 2265 2266 if (xfer->pipe->intrxfer == xfer) { 2267 DPRINTF(("ohci_root_intr_abort: remove\n")); 2268 xfer->pipe->intrxfer = NULL; 2269 } 2270 xfer->status = USBD_CANCELLED; 2271 s = splusb(); 2272 usb_transfer_complete(xfer); 2273 splx(s); 2274 } 2275 2276 /* Close the root pipe. */ 2277 static void 2278 ohci_root_intr_close(pipe) 2279 usbd_pipe_handle pipe; 2280 { 2281 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2282 2283 DPRINTF(("ohci_root_intr_close\n")); 2284 2285 sc->sc_intrxfer = NULL; 2286 } 2287 2288 /************************/ 2289 2290 static usbd_status 2291 ohci_device_ctrl_transfer(xfer) 2292 usbd_xfer_handle xfer; 2293 { 2294 usbd_status err; 2295 2296 /* Insert last in queue. */ 2297 err = usb_insert_transfer(xfer); 2298 if (err) 2299 return (err); 2300 2301 /* Pipe isn't running, start first */ 2302 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2303 } 2304 2305 static usbd_status 2306 ohci_device_ctrl_start(xfer) 2307 usbd_xfer_handle xfer; 2308 { 2309 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2310 usbd_status err; 2311 2312 #ifdef DIAGNOSTIC 2313 if (!(xfer->rqflags & URQ_REQUEST)) { 2314 /* XXX panic */ 2315 printf("ohci_device_ctrl_transfer: not a request\n"); 2316 return (USBD_INVAL); 2317 } 2318 #endif 2319 2320 err = ohci_device_request(xfer); 2321 if (err) 2322 return (err); 2323 2324 if (sc->sc_bus.use_polling) 2325 ohci_waitintr(sc, xfer); 2326 return (USBD_IN_PROGRESS); 2327 } 2328 2329 /* Abort a device control request. */ 2330 static void 2331 ohci_device_ctrl_abort(xfer) 2332 usbd_xfer_handle xfer; 2333 { 2334 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2335 ohci_abort_xfer(xfer, USBD_CANCELLED); 2336 } 2337 2338 /* Close a device control pipe. */ 2339 static void 2340 ohci_device_ctrl_close(pipe) 2341 usbd_pipe_handle pipe; 2342 { 2343 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2344 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2345 2346 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2347 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2348 ohci_free_std(sc, opipe->tail.td); 2349 } 2350 2351 /************************/ 2352 2353 static void 2354 ohci_device_clear_toggle(pipe) 2355 usbd_pipe_handle pipe; 2356 { 2357 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2358 2359 opipe->sed->ed.ed_tailp &= LE(~OHCI_TOGGLECARRY); 2360 } 2361 2362 static void 2363 ohci_noop(pipe) 2364 usbd_pipe_handle pipe; 2365 { 2366 } 2367 2368 static usbd_status 2369 ohci_device_bulk_transfer(xfer) 2370 usbd_xfer_handle xfer; 2371 { 2372 usbd_status err; 2373 2374 /* Insert last in queue. */ 2375 err = usb_insert_transfer(xfer); 2376 if (err) 2377 return (err); 2378 2379 /* Pipe isn't running, start first */ 2380 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2381 } 2382 2383 static usbd_status 2384 ohci_device_bulk_start(xfer) 2385 usbd_xfer_handle xfer; 2386 { 2387 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2388 usbd_device_handle dev = opipe->pipe.device; 2389 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2390 int addr = dev->address; 2391 ohci_soft_td_t *data, *tail, *tdp; 2392 ohci_soft_ed_t *sed; 2393 int s, len, isread, endpt; 2394 usbd_status err; 2395 2396 #ifdef DIAGNOSTIC 2397 if (xfer->rqflags & URQ_REQUEST) { 2398 /* XXX panic */ 2399 printf("ohci_device_bulk_start: a request\n"); 2400 return (USBD_INVAL); 2401 } 2402 #endif 2403 2404 len = xfer->length; 2405 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2406 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2407 sed = opipe->sed; 2408 2409 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2410 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2411 endpt)); 2412 2413 opipe->u.bulk.isread = isread; 2414 opipe->u.bulk.length = len; 2415 2416 /* Update device address */ 2417 sed->ed.ed_flags = LE( 2418 (LE(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2419 OHCI_ED_SET_FA(addr)); 2420 2421 /* Allocate a chain of new TDs (including a new tail). */ 2422 data = opipe->tail.td; 2423 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer->flags, 2424 &xfer->dmabuf, data, &tail); 2425 if (err) 2426 return (err); 2427 2428 tail->xfer = NULL; 2429 xfer->hcpriv = data; 2430 2431 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2432 "td_cbp=0x%08x td_be=0x%08x\n", 2433 (int)LE(sed->ed.ed_flags), (int)LE(data->td.td_flags), 2434 (int)LE(data->td.td_cbp), (int)LE(data->td.td_be))); 2435 2436 #ifdef OHCI_DEBUG 2437 if (ohcidebug > 4) { 2438 ohci_dump_ed(sed); 2439 ohci_dump_tds(data); 2440 } 2441 #endif 2442 2443 /* Insert ED in schedule */ 2444 s = splusb(); 2445 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2446 tdp->xfer = xfer; 2447 ohci_hash_add_td(sc, tdp); 2448 } 2449 sed->ed.ed_tailp = LE(tail->physaddr); 2450 opipe->tail.td = tail; 2451 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); 2452 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2453 if (xfer->timeout && !sc->sc_bus.use_polling) { 2454 usb_timeout(ohci_timeout, xfer, 2455 MS_TO_TICKS(xfer->timeout), xfer->timo_handle); 2456 } 2457 2458 #if 0 2459 /* This goes wrong if we are too slow. */ 2460 if (ohcidebug > 5) { 2461 usb_delay_ms(&sc->sc_bus, 5); 2462 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2463 OREAD4(sc, OHCI_COMMAND_STATUS))); 2464 ohci_dump_ed(sed); 2465 ohci_dump_tds(data); 2466 } 2467 #endif 2468 2469 splx(s); 2470 2471 return (USBD_IN_PROGRESS); 2472 } 2473 2474 static void 2475 ohci_device_bulk_abort(xfer) 2476 usbd_xfer_handle xfer; 2477 { 2478 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2479 ohci_abort_xfer(xfer, USBD_CANCELLED); 2480 } 2481 2482 /* 2483 * Close a device bulk pipe. 2484 */ 2485 static void 2486 ohci_device_bulk_close(pipe) 2487 usbd_pipe_handle pipe; 2488 { 2489 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2490 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2491 2492 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2493 ohci_close_pipe(pipe, sc->sc_bulk_head); 2494 ohci_free_std(sc, opipe->tail.td); 2495 } 2496 2497 /************************/ 2498 2499 static usbd_status 2500 ohci_device_intr_transfer(xfer) 2501 usbd_xfer_handle xfer; 2502 { 2503 usbd_status err; 2504 2505 /* Insert last in queue. */ 2506 err = usb_insert_transfer(xfer); 2507 if (err) 2508 return (err); 2509 2510 /* Pipe isn't running, start first */ 2511 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2512 } 2513 2514 static usbd_status 2515 ohci_device_intr_start(xfer) 2516 usbd_xfer_handle xfer; 2517 { 2518 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2519 usbd_device_handle dev = opipe->pipe.device; 2520 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2521 ohci_soft_ed_t *sed = opipe->sed; 2522 ohci_soft_td_t *data, *tail; 2523 int len; 2524 int s; 2525 2526 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2527 "flags=%d priv=%p\n", 2528 xfer, xfer->length, xfer->flags, xfer->priv)); 2529 2530 #ifdef DIAGNOSTIC 2531 if (xfer->rqflags & URQ_REQUEST) 2532 panic("ohci_device_intr_transfer: a request\n"); 2533 #endif 2534 2535 len = xfer->length; 2536 2537 data = opipe->tail.td; 2538 tail = ohci_alloc_std(sc); 2539 if (tail == NULL) 2540 return (USBD_NOMEM); 2541 tail->xfer = NULL; 2542 2543 data->td.td_flags = LE( 2544 OHCI_TD_IN | OHCI_TD_NOCC | 2545 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2546 if (xfer->flags & USBD_SHORT_XFER_OK) 2547 data->td.td_flags |= LE(OHCI_TD_R); 2548 data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf)); 2549 data->nexttd = tail; 2550 data->td.td_nexttd = LE(tail->physaddr); 2551 data->td.td_be = LE(LE(data->td.td_cbp) + len - 1); 2552 data->len = len; 2553 data->xfer = xfer; 2554 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2555 xfer->hcpriv = data; 2556 2557 #ifdef OHCI_DEBUG 2558 if (ohcidebug > 5) { 2559 DPRINTF(("ohci_device_intr_transfer:\n")); 2560 ohci_dump_ed(sed); 2561 ohci_dump_tds(data); 2562 } 2563 #endif 2564 2565 /* Insert ED in schedule */ 2566 s = splusb(); 2567 ohci_hash_add_td(sc, data); 2568 sed->ed.ed_tailp = LE(tail->physaddr); 2569 opipe->tail.td = tail; 2570 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); 2571 2572 #if 0 2573 /* 2574 * This goes horribly wrong, printing thousands of descriptors, 2575 * because false references are followed due to the fact that the 2576 * TD is gone. 2577 */ 2578 if (ohcidebug > 5) { 2579 usb_delay_ms(&sc->sc_bus, 5); 2580 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2581 OREAD4(sc, OHCI_COMMAND_STATUS))); 2582 ohci_dump_ed(sed); 2583 ohci_dump_tds(data); 2584 } 2585 #endif 2586 splx(s); 2587 2588 return (USBD_IN_PROGRESS); 2589 } 2590 2591 /* Abort a device control request. */ 2592 static void 2593 ohci_device_intr_abort(xfer) 2594 usbd_xfer_handle xfer; 2595 { 2596 if (xfer->pipe->intrxfer == xfer) { 2597 DPRINTF(("ohci_device_intr_abort: remove\n")); 2598 xfer->pipe->intrxfer = NULL; 2599 } 2600 ohci_abort_xfer(xfer, USBD_CANCELLED); 2601 } 2602 2603 /* Close a device interrupt pipe. */ 2604 static void 2605 ohci_device_intr_close(pipe) 2606 usbd_pipe_handle pipe; 2607 { 2608 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2609 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2610 int nslots = opipe->u.intr.nslots; 2611 int pos = opipe->u.intr.pos; 2612 int j; 2613 ohci_soft_ed_t *p, *sed = opipe->sed; 2614 int s; 2615 2616 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2617 pipe, nslots, pos)); 2618 s = splusb(); 2619 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 2620 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 2621 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) 2622 usb_delay_ms(&sc->sc_bus, 2); 2623 2624 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2625 ; 2626 #ifdef DIAGNOSTIC 2627 if (p == NULL) 2628 panic("ohci_device_intr_close: ED not found\n"); 2629 #endif 2630 p->next = sed->next; 2631 p->ed.ed_nexted = sed->ed.ed_nexted; 2632 splx(s); 2633 2634 for (j = 0; j < nslots; j++) 2635 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2636 2637 ohci_free_std(sc, opipe->tail.td); 2638 ohci_free_sed(sc, opipe->sed); 2639 } 2640 2641 static usbd_status 2642 ohci_device_setintr(sc, opipe, ival) 2643 ohci_softc_t *sc; 2644 struct ohci_pipe *opipe; 2645 int ival; 2646 { 2647 int i, j, s, best; 2648 u_int npoll, slow, shigh, nslots; 2649 u_int bestbw, bw; 2650 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2651 2652 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2653 if (ival == 0) { 2654 printf("ohci_setintr: 0 interval\n"); 2655 return (USBD_INVAL); 2656 } 2657 2658 npoll = OHCI_NO_INTRS; 2659 while (npoll > ival) 2660 npoll /= 2; 2661 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2662 2663 /* 2664 * We now know which level in the tree the ED must go into. 2665 * Figure out which slot has most bandwidth left over. 2666 * Slots to examine: 2667 * npoll 2668 * 1 0 2669 * 2 1 2 2670 * 4 3 4 5 6 2671 * 8 7 8 9 10 11 12 13 14 2672 * N (N-1) .. (N-1+N-1) 2673 */ 2674 slow = npoll-1; 2675 shigh = slow + npoll; 2676 nslots = OHCI_NO_INTRS / npoll; 2677 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2678 bw = 0; 2679 for (j = 0; j < nslots; j++) 2680 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 2681 if (bw < bestbw) { 2682 best = i; 2683 bestbw = bw; 2684 } 2685 } 2686 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2687 best, slow, shigh, bestbw)); 2688 2689 s = splusb(); 2690 hsed = sc->sc_eds[best]; 2691 sed->next = hsed->next; 2692 sed->ed.ed_nexted = hsed->ed.ed_nexted; 2693 hsed->next = sed; 2694 hsed->ed.ed_nexted = LE(sed->physaddr); 2695 splx(s); 2696 2697 for (j = 0; j < nslots; j++) 2698 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 2699 opipe->u.intr.nslots = nslots; 2700 opipe->u.intr.pos = best; 2701 2702 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 2703 return (USBD_NORMAL_COMPLETION); 2704 } 2705 2706 /***********************/ 2707 2708 usbd_status 2709 ohci_device_isoc_transfer(xfer) 2710 usbd_xfer_handle xfer; 2711 { 2712 usbd_status err; 2713 2714 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 2715 2716 /* Put it on our queue, */ 2717 err = usb_insert_transfer(xfer); 2718 2719 /* bail out on error, */ 2720 if (err && err != USBD_IN_PROGRESS) 2721 return (err); 2722 2723 /* XXX should check inuse here */ 2724 2725 /* insert into schedule, */ 2726 ohci_device_isoc_enter(xfer); 2727 2728 /* and put on interrupt list if the pipe wasn't running */ 2729 if (!err) 2730 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2731 2732 return (err); 2733 } 2734 2735 void 2736 ohci_device_isoc_enter(xfer) 2737 usbd_xfer_handle xfer; 2738 { 2739 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2740 usbd_device_handle dev = opipe->pipe.device; 2741 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2742 ohci_soft_ed_t *sed = opipe->sed; 2743 struct iso *iso = &opipe->u.iso; 2744 ohci_soft_itd_t *sitd, *nsitd; 2745 ohci_physaddr_t buf, offs; 2746 int i, ncur, nframes; 2747 int ncross; 2748 int s; 2749 2750 s = splusb(); 2751 sitd = opipe->tail.itd; 2752 buf = DMAADDR(&xfer->dmabuf); 2753 sitd->itd.itd_bp0 = LE(buf & OHCI_ITD_PAGE_MASK); 2754 nframes = xfer->nframes; 2755 offs = buf & OHCI_ITD_OFFSET_MASK; 2756 for (i = ncur = 0; i < nframes; i++, ncur++) { 2757 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 2758 ncross > 1) { /* too many page crossings */ 2759 2760 nsitd = ohci_alloc_sitd(sc); 2761 if (nsitd == NULL) { 2762 /* XXX what now? */ 2763 return; 2764 } 2765 sitd->nextitd = nsitd; 2766 sitd->itd.itd_nextitd = LE(nsitd->physaddr); 2767 sitd->itd.itd_flags = LE( 2768 OHCI_ITD_NOCC | 2769 OHCI_ITD_SET_SF(iso->next) | 2770 OHCI_ITD_NOINTR | 2771 OHCI_ITD_SET_FC(OHCI_ITD_NOFFSET)); 2772 sitd->itd.itd_be = LE(LE(sitd->itd.itd_bp0) + offs - 1); 2773 nsitd->itd.itd_bp0 = LE((buf + offs) & OHCI_ITD_PAGE_MASK); 2774 sitd = nsitd; 2775 iso->next = iso->next + ncur; 2776 ncur = 0; 2777 ncross = 0; 2778 } 2779 /* XXX byte order */ 2780 sitd->itd.itd_offset[i] = 2781 offs | (ncross == 1 ? OHCI_ITD_PAGE_SELECT : 0); 2782 offs += xfer->frlengths[i]; 2783 /* XXX update ncross */ 2784 } 2785 nsitd = ohci_alloc_sitd(sc); 2786 if (nsitd == NULL) { 2787 /* XXX what now? */ 2788 return; 2789 } 2790 sitd->nextitd = nsitd; 2791 sitd->itd.itd_nextitd = LE(nsitd->physaddr); 2792 sitd->itd.itd_flags = LE( 2793 OHCI_ITD_NOCC | 2794 OHCI_ITD_SET_SF(iso->next) | 2795 OHCI_ITD_SET_DI(0) | 2796 OHCI_ITD_SET_FC(ncur)); 2797 sitd->itd.itd_be = LE(LE(sitd->itd.itd_bp0) + offs - 1); 2798 iso->next = iso->next + ncur; 2799 2800 opipe->tail.itd = nsitd; 2801 sed->ed.ed_tailp = LE(nsitd->physaddr); 2802 /* XXX update ED */ 2803 splx(s); 2804 } 2805 2806 usbd_status 2807 ohci_device_isoc_start(xfer) 2808 usbd_xfer_handle xfer; 2809 { 2810 printf("ohci_device_isoc_start: not implemented\n"); 2811 return (USBD_INVAL); 2812 } 2813 2814 void 2815 ohci_device_isoc_abort(xfer) 2816 usbd_xfer_handle xfer; 2817 { 2818 } 2819 2820 void 2821 ohci_device_isoc_done(xfer) 2822 usbd_xfer_handle xfer; 2823 { 2824 printf("ohci_device_isoc_done: not implemented\n"); 2825 } 2826 2827 usbd_status 2828 ohci_setup_isoc(pipe) 2829 usbd_pipe_handle pipe; 2830 { 2831 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2832 struct iso *iso = &opipe->u.iso; 2833 2834 iso->next = -1; 2835 iso->inuse = 0; 2836 2837 return (USBD_NORMAL_COMPLETION); 2838 } 2839 2840 void 2841 ohci_device_isoc_close(pipe) 2842 usbd_pipe_handle pipe; 2843 { 2844 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2845 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2846 2847 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 2848 ohci_close_pipe(pipe, sc->sc_isoc_head); 2849 ohci_free_sitd(sc, opipe->tail.itd); 2850 } 2851
Indexes created Tue Sep 23 13:09:54 GMT 2025