ohci.c revision 1.64
1 /* $NetBSD: ohci.c,v 1.64 2000/01/19 00:23:58 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (augustss (at) carlstedt.se) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe 45 * USB spec: http://www.usb.org/developers/data/usb11.pdf 46 */ 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/kernel.h> 53 #include <sys/device.h> 54 #include <sys/select.h> 55 #elif defined(__FreeBSD__) 56 #include <sys/module.h> 57 #include <sys/bus.h> 58 #include <machine/bus_pio.h> 59 #include <machine/bus_memio.h> 60 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 61 #include <machine/cpu.h> 62 #endif 63 #endif 64 #include <sys/proc.h> 65 #include <sys/queue.h> 66 67 #include <machine/bus.h> 68 #include <machine/endian.h> 69 70 #include <dev/usb/usb.h> 71 #include <dev/usb/usbdi.h> 72 #include <dev/usb/usbdivar.h> 73 #include <dev/usb/usb_mem.h> 74 #include <dev/usb/usb_quirks.h> 75 76 #include <dev/usb/ohcireg.h> 77 #include <dev/usb/ohcivar.h> 78 79 #if defined(__FreeBSD__) 80 #include <machine/clock.h> 81 82 #define delay(d) DELAY(d) 83 #endif 84 85 #if defined(__OpenBSD__) 86 struct cfdriver ohci_cd = { 87 NULL, "ohci", DV_DULL 88 }; 89 #endif 90 91 #ifdef OHCI_DEBUG 92 #define DPRINTF(x) if (ohcidebug) logprintf x 93 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 94 int ohcidebug = 0; 95 #else 96 #define DPRINTF(x) 97 #define DPRINTFN(n,x) 98 #endif 99 100 /* 101 * The OHCI controller is little endian, so on big endian machines 102 * the data strored in memory needs to be swapped. 103 */ 104 #if BYTE_ORDER == BIG_ENDIAN 105 #define LE(x) (bswap32(x)) 106 #else 107 #define LE(x) (x) 108 #endif 109 110 struct ohci_pipe; 111 112 static ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *)); 113 static void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *)); 114 115 static ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *)); 116 static void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *)); 117 118 static ohci_soft_itd_t *ohci_alloc_sitd __P((ohci_softc_t *)); 119 static void ohci_free_sitd __P((ohci_softc_t *,ohci_soft_itd_t *)); 120 121 #if 0 122 static void ohci_free_std_chain __P((ohci_softc_t *, 123 ohci_soft_td_t *, ohci_soft_td_t *)); 124 #endif 125 static usbd_status ohci_alloc_std_chain __P((struct ohci_pipe *, 126 ohci_softc_t *, int, int, u_int16_t, usb_dma_t *, 127 ohci_soft_td_t *, ohci_soft_td_t **)); 128 129 static void ohci_shutdown __P((void *v)); 130 static void ohci_power __P((int, void *)); 131 static usbd_status ohci_open __P((usbd_pipe_handle)); 132 static void ohci_poll __P((struct usbd_bus *)); 133 static void ohci_waitintr __P((ohci_softc_t *, 134 usbd_xfer_handle)); 135 static void ohci_rhsc __P((ohci_softc_t *, usbd_xfer_handle)); 136 static void ohci_process_done __P((ohci_softc_t *, 137 ohci_physaddr_t)); 138 139 static usbd_status ohci_device_request __P((usbd_xfer_handle xfer)); 140 static void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 141 static void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 142 static void ohci_hash_add_td __P((ohci_softc_t *, 143 ohci_soft_td_t *)); 144 static void ohci_hash_rem_td __P((ohci_softc_t *, 145 ohci_soft_td_t *)); 146 static ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, 147 ohci_physaddr_t)); 148 149 static usbd_status ohci_setup_isoc __P((usbd_pipe_handle pipe)); 150 static void ohci_device_isoc_enter __P((usbd_xfer_handle)); 151 152 static usbd_status ohci_allocm __P((struct usbd_bus *, usb_dma_t *, 153 u_int32_t)); 154 static void ohci_freem __P((struct usbd_bus *, usb_dma_t *)); 155 156 static usbd_xfer_handle ohci_allocx __P((struct usbd_bus *)); 157 static void ohci_freex __P((struct usbd_bus *, usbd_xfer_handle)); 158 159 static usbd_status ohci_root_ctrl_transfer __P((usbd_xfer_handle)); 160 static usbd_status ohci_root_ctrl_start __P((usbd_xfer_handle)); 161 static void ohci_root_ctrl_abort __P((usbd_xfer_handle)); 162 static void ohci_root_ctrl_close __P((usbd_pipe_handle)); 163 164 static usbd_status ohci_root_intr_transfer __P((usbd_xfer_handle)); 165 static usbd_status ohci_root_intr_start __P((usbd_xfer_handle)); 166 static void ohci_root_intr_abort __P((usbd_xfer_handle)); 167 static void ohci_root_intr_close __P((usbd_pipe_handle)); 168 static void ohci_root_intr_done __P((usbd_xfer_handle)); 169 170 static usbd_status ohci_device_ctrl_transfer __P((usbd_xfer_handle)); 171 static usbd_status ohci_device_ctrl_start __P((usbd_xfer_handle)); 172 static void ohci_device_ctrl_abort __P((usbd_xfer_handle)); 173 static void ohci_device_ctrl_close __P((usbd_pipe_handle)); 174 static void ohci_device_ctrl_done __P((usbd_xfer_handle)); 175 176 static usbd_status ohci_device_bulk_transfer __P((usbd_xfer_handle)); 177 static usbd_status ohci_device_bulk_start __P((usbd_xfer_handle)); 178 static void ohci_device_bulk_abort __P((usbd_xfer_handle)); 179 static void ohci_device_bulk_close __P((usbd_pipe_handle)); 180 static void ohci_device_bulk_done __P((usbd_xfer_handle)); 181 182 static usbd_status ohci_device_intr_transfer __P((usbd_xfer_handle)); 183 static usbd_status ohci_device_intr_start __P((usbd_xfer_handle)); 184 static void ohci_device_intr_abort __P((usbd_xfer_handle)); 185 static void ohci_device_intr_close __P((usbd_pipe_handle)); 186 static void ohci_device_intr_done __P((usbd_xfer_handle)); 187 188 static usbd_status ohci_device_isoc_transfer __P((usbd_xfer_handle)); 189 static usbd_status ohci_device_isoc_start __P((usbd_xfer_handle)); 190 static void ohci_device_isoc_abort __P((usbd_xfer_handle)); 191 static void ohci_device_isoc_close __P((usbd_pipe_handle)); 192 static void ohci_device_isoc_done __P((usbd_xfer_handle)); 193 194 static usbd_status ohci_device_setintr __P((ohci_softc_t *sc, 195 struct ohci_pipe *pipe, int ival)); 196 197 static int ohci_str __P((usb_string_descriptor_t *, int, char *)); 198 199 static void ohci_timeout __P((void *)); 200 static void ohci_rhsc_able __P((ohci_softc_t *, int)); 201 202 static void ohci_close_pipe __P((usbd_pipe_handle pipe, 203 ohci_soft_ed_t *head)); 204 static void ohci_abort_xfer __P((usbd_xfer_handle xfer, 205 usbd_status status)); 206 static void ohci_abort_xfer_end __P((void *)); 207 208 static void ohci_device_clear_toggle __P((usbd_pipe_handle pipe)); 209 static void ohci_noop __P((usbd_pipe_handle pipe)); 210 211 #ifdef OHCI_DEBUG 212 static void ohci_dumpregs __P((ohci_softc_t *)); 213 static void ohci_dump_tds __P((ohci_soft_td_t *)); 214 static void ohci_dump_td __P((ohci_soft_td_t *)); 215 static void ohci_dump_ed __P((ohci_soft_ed_t *)); 216 #endif 217 218 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 219 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 220 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 221 222 /* Reverse the bits in a value 0 .. 31 */ 223 static u_int8_t revbits[OHCI_NO_INTRS] = 224 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 225 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 226 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 227 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 228 229 struct ohci_pipe { 230 struct usbd_pipe pipe; 231 ohci_soft_ed_t *sed; 232 union { 233 ohci_soft_td_t *td; 234 ohci_soft_itd_t *itd; 235 } tail; 236 /* Info needed for different pipe kinds. */ 237 union { 238 /* Control pipe */ 239 struct { 240 usb_dma_t reqdma; 241 u_int length; 242 ohci_soft_td_t *setup, *data, *stat; 243 } ctl; 244 /* Interrupt pipe */ 245 struct { 246 int nslots; 247 int pos; 248 } intr; 249 /* Bulk pipe */ 250 struct { 251 u_int length; 252 int isread; 253 } bulk; 254 /* Iso pipe */ 255 struct iso { 256 int next, inuse; 257 } iso; 258 } u; 259 }; 260 261 #define OHCI_INTR_ENDPT 1 262 263 static struct usbd_bus_methods ohci_bus_methods = { 264 ohci_open, 265 ohci_poll, 266 ohci_allocm, 267 ohci_freem, 268 ohci_allocx, 269 ohci_freex, 270 }; 271 272 static struct usbd_pipe_methods ohci_root_ctrl_methods = { 273 ohci_root_ctrl_transfer, 274 ohci_root_ctrl_start, 275 ohci_root_ctrl_abort, 276 ohci_root_ctrl_close, 277 ohci_noop, 278 0, 279 }; 280 281 static struct usbd_pipe_methods ohci_root_intr_methods = { 282 ohci_root_intr_transfer, 283 ohci_root_intr_start, 284 ohci_root_intr_abort, 285 ohci_root_intr_close, 286 ohci_noop, 287 ohci_root_intr_done, 288 }; 289 290 static struct usbd_pipe_methods ohci_device_ctrl_methods = { 291 ohci_device_ctrl_transfer, 292 ohci_device_ctrl_start, 293 ohci_device_ctrl_abort, 294 ohci_device_ctrl_close, 295 ohci_noop, 296 ohci_device_ctrl_done, 297 }; 298 299 static struct usbd_pipe_methods ohci_device_intr_methods = { 300 ohci_device_intr_transfer, 301 ohci_device_intr_start, 302 ohci_device_intr_abort, 303 ohci_device_intr_close, 304 ohci_device_clear_toggle, 305 ohci_device_intr_done, 306 }; 307 308 static struct usbd_pipe_methods ohci_device_bulk_methods = { 309 ohci_device_bulk_transfer, 310 ohci_device_bulk_start, 311 ohci_device_bulk_abort, 312 ohci_device_bulk_close, 313 ohci_device_clear_toggle, 314 ohci_device_bulk_done, 315 }; 316 317 static struct usbd_pipe_methods ohci_device_isoc_methods = { 318 ohci_device_isoc_transfer, 319 ohci_device_isoc_start, 320 ohci_device_isoc_abort, 321 ohci_device_isoc_close, 322 ohci_noop, 323 ohci_device_isoc_done, 324 }; 325 326 #if defined(__NetBSD__) || defined(__OpenBSD__) 327 int 328 ohci_activate(self, act) 329 device_ptr_t self; 330 enum devact act; 331 { 332 struct ohci_softc *sc = (struct ohci_softc *)self; 333 int rv = 0; 334 335 switch (act) { 336 case DVACT_ACTIVATE: 337 return (EOPNOTSUPP); 338 break; 339 340 case DVACT_DEACTIVATE: 341 if (sc->sc_child != NULL) 342 rv = config_deactivate(sc->sc_child); 343 break; 344 } 345 return (rv); 346 } 347 348 int 349 ohci_detach(sc, flags) 350 struct ohci_softc *sc; 351 int flags; 352 { 353 int rv = 0; 354 355 if (sc->sc_child != NULL) 356 rv = config_detach(sc->sc_child, flags); 357 358 if (rv != 0) 359 return (rv); 360 361 powerhook_disestablish(sc->sc_powerhook); 362 shutdownhook_disestablish(sc->sc_shutdownhook); 363 364 /* free data structures XXX */ 365 366 return (rv); 367 } 368 #endif 369 370 ohci_soft_ed_t * 371 ohci_alloc_sed(sc) 372 ohci_softc_t *sc; 373 { 374 ohci_soft_ed_t *sed; 375 usbd_status err; 376 int i, offs; 377 usb_dma_t dma; 378 379 if (sc->sc_freeeds == NULL) { 380 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 381 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 382 OHCI_ED_ALIGN, &dma); 383 if (err) 384 return (0); 385 for(i = 0; i < OHCI_SED_CHUNK; i++) { 386 offs = i * OHCI_SED_SIZE; 387 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 388 sed->physaddr = DMAADDR(&dma) + offs; 389 sed->next = sc->sc_freeeds; 390 sc->sc_freeeds = sed; 391 } 392 } 393 sed = sc->sc_freeeds; 394 sc->sc_freeeds = sed->next; 395 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 396 sed->next = 0; 397 return (sed); 398 } 399 400 void 401 ohci_free_sed(sc, sed) 402 ohci_softc_t *sc; 403 ohci_soft_ed_t *sed; 404 { 405 sed->next = sc->sc_freeeds; 406 sc->sc_freeeds = sed; 407 } 408 409 ohci_soft_td_t * 410 ohci_alloc_std(sc) 411 ohci_softc_t *sc; 412 { 413 ohci_soft_td_t *std; 414 usbd_status err; 415 int i, offs; 416 usb_dma_t dma; 417 418 if (sc->sc_freetds == NULL) { 419 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 420 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 421 OHCI_TD_ALIGN, &dma); 422 if (err) 423 return (0); 424 for(i = 0; i < OHCI_STD_CHUNK; i++) { 425 offs = i * OHCI_STD_SIZE; 426 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 427 std->physaddr = DMAADDR(&dma) + offs; 428 std->nexttd = sc->sc_freetds; 429 sc->sc_freetds = std; 430 } 431 } 432 std = sc->sc_freetds; 433 sc->sc_freetds = std->nexttd; 434 memset(&std->td, 0, sizeof(ohci_td_t)); 435 std->nexttd = 0; 436 return (std); 437 } 438 439 void 440 ohci_free_std(sc, std) 441 ohci_softc_t *sc; 442 ohci_soft_td_t *std; 443 { 444 std->nexttd = sc->sc_freetds; 445 sc->sc_freetds = std; 446 } 447 448 usbd_status 449 ohci_alloc_std_chain(opipe, sc, len, rd, flags, dma, sp, ep) 450 struct ohci_pipe *opipe; 451 ohci_softc_t *sc; 452 int len, rd; 453 u_int16_t flags; 454 usb_dma_t *dma; 455 ohci_soft_td_t *sp, **ep; 456 { 457 ohci_soft_td_t *next, *cur; 458 ohci_physaddr_t dataphys, dataphysend; 459 u_int32_t intr, tdflags; 460 int curlen; 461 462 DPRINTFN(len < 4096,("ohci_alloc_std_chain: start len=%d\n", len)); 463 cur = sp; 464 dataphys = DMAADDR(dma); 465 dataphysend = OHCI_PAGE(dataphys + len - 1); 466 tdflags = 467 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 468 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | 469 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0); 470 471 for (;;) { 472 next = ohci_alloc_std(sc); 473 if (next == 0) 474 goto nomem; 475 476 /* The OHCI hardware can handle at most one page crossing. */ 477 if (OHCI_PAGE(dataphys) == dataphysend || 478 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 479 /* we can handle it in this TD */ 480 curlen = len; 481 } else { 482 /* must use multiple TDs, fill as much as possible. */ 483 curlen = 2 * OHCI_PAGE_SIZE - 484 (dataphys & (OHCI_PAGE_SIZE-1)); 485 } 486 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 487 "dataphysend=0x%08x len=%d curlen=%d\n", 488 dataphys, dataphysend, 489 len, curlen)); 490 len -= curlen; 491 492 intr = len == 0 ? OHCI_TD_SET_DI(1) : OHCI_TD_NOINTR; 493 cur->td.td_flags = LE(tdflags | intr); 494 cur->td.td_cbp = LE(dataphys); 495 cur->nexttd = next; 496 cur->td.td_nexttd = LE(next->physaddr); 497 cur->td.td_be = LE(dataphys + curlen - 1); 498 cur->len = curlen; 499 cur->flags = OHCI_ADD_LEN; 500 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 501 dataphys, dataphys + curlen - 1)); 502 if (len == 0) 503 break; 504 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 505 dataphys += curlen; 506 cur = next; 507 } 508 if ((flags & USBD_FORCE_SHORT_XFER) && 509 len % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 510 /* Force a 0 length transfer at the end. */ 511 next = ohci_alloc_std(sc); 512 if (next == 0) 513 goto nomem; 514 515 cur->td.td_flags = LE(tdflags | OHCI_TD_SET_DI(1)); 516 cur->td.td_cbp = 0; /* indicate 0 length packet */ 517 cur->nexttd = next; 518 cur->td.td_nexttd = LE(next->physaddr); 519 cur->td.td_be = LE(dataphys - 1); 520 cur->len = 0; 521 cur->flags = 0; 522 cur = next; 523 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 524 } 525 cur->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 526 *ep = next; 527 528 return (USBD_NORMAL_COMPLETION); 529 530 nomem: 531 /* XXX free chain */ 532 return (USBD_NOMEM); 533 } 534 535 #if 0 536 static void 537 ohci_free_std_chain(sc, std, stdend) 538 ohci_softc_t *sc; 539 ohci_soft_td_t *std; 540 ohci_soft_td_t *stdend; 541 { 542 ohci_soft_td_t *p; 543 544 for (; std != stdend; std = p) { 545 p = std->nexttd; 546 ohci_free_std(sc, std); 547 } 548 } 549 #endif 550 551 ohci_soft_itd_t * 552 ohci_alloc_sitd(sc) 553 ohci_softc_t *sc; 554 { 555 ohci_soft_itd_t *sitd; 556 usbd_status err; 557 int i, offs; 558 usb_dma_t dma; 559 560 if (sc->sc_freeitds == NULL) { 561 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 562 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 563 OHCI_TD_ALIGN, &dma); 564 if (err) 565 return (0); 566 for(i = 0; i < OHCI_STD_CHUNK; i++) { 567 offs = i * OHCI_STD_SIZE; 568 sitd = (ohci_soft_itd_t *)((char*)KERNADDR(&dma)+offs); 569 sitd->physaddr = DMAADDR(&dma) + offs; 570 sitd->nextitd = sc->sc_freeitds; 571 sc->sc_freeitds = sitd; 572 } 573 } 574 sitd = sc->sc_freeitds; 575 sc->sc_freeitds = sitd->nextitd; 576 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 577 sitd->nextitd = 0; 578 return (sitd); 579 } 580 581 void 582 ohci_free_sitd(sc, sitd) 583 ohci_softc_t *sc; 584 ohci_soft_itd_t *sitd; 585 { 586 sitd->nextitd = sc->sc_freeitds; 587 sc->sc_freeitds = sitd; 588 } 589 590 usbd_status 591 ohci_init(sc) 592 ohci_softc_t *sc; 593 { 594 ohci_soft_ed_t *sed, *psed; 595 usbd_status err; 596 int i; 597 u_int32_t s, ctl, ival, hcr, fm, per, rev; 598 599 DPRINTF(("ohci_init: start\n")); 600 #if defined(__OpenBSD__) 601 printf(","); 602 #else 603 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 604 #endif 605 rev = OREAD4(sc, OHCI_REVISION); 606 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 607 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 608 609 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 610 printf("%s: unsupported OHCI revision\n", 611 USBDEVNAME(sc->sc_bus.bdev)); 612 sc->sc_bus.usbrev = USBREV_UNKNOWN; 613 return (USBD_INVAL); 614 } 615 sc->sc_bus.usbrev = USBREV_1_0; 616 617 for (i = 0; i < OHCI_HASH_SIZE; i++) 618 LIST_INIT(&sc->sc_hash_tds[i]); 619 620 SIMPLEQ_INIT(&sc->sc_free_xfers); 621 622 /* Allocate the HCCA area. */ 623 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 624 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 625 if (err) 626 return (err); 627 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 628 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 629 630 sc->sc_eintrs = OHCI_NORMAL_INTRS; 631 632 /* Allocate dummy ED that starts the control list. */ 633 sc->sc_ctrl_head = ohci_alloc_sed(sc); 634 if (sc->sc_ctrl_head == NULL) { 635 err = USBD_NOMEM; 636 goto bad1; 637 } 638 sc->sc_ctrl_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 639 640 /* Allocate dummy ED that starts the bulk list. */ 641 sc->sc_bulk_head = ohci_alloc_sed(sc); 642 if (sc->sc_bulk_head == NULL) { 643 err = USBD_NOMEM; 644 goto bad2; 645 } 646 sc->sc_bulk_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 647 648 /* Allocate dummy ED that starts the isochronous list. */ 649 sc->sc_isoc_head = ohci_alloc_sed(sc); 650 if (sc->sc_isoc_head == NULL) { 651 err = USBD_NOMEM; 652 goto bad3; 653 } 654 sc->sc_isoc_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 655 656 /* Allocate all the dummy EDs that make up the interrupt tree. */ 657 for (i = 0; i < OHCI_NO_EDS; i++) { 658 sed = ohci_alloc_sed(sc); 659 if (sed == NULL) { 660 while (--i >= 0) 661 ohci_free_sed(sc, sc->sc_eds[i]); 662 err = USBD_NOMEM; 663 goto bad4; 664 } 665 /* All ED fields are set to 0. */ 666 sc->sc_eds[i] = sed; 667 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 668 if (i != 0) 669 psed = sc->sc_eds[(i-1) / 2]; 670 else 671 psed= sc->sc_isoc_head; 672 sed->next = psed; 673 sed->ed.ed_nexted = LE(psed->physaddr); 674 } 675 /* 676 * Fill HCCA interrupt table. The bit reversal is to get 677 * the tree set up properly to spread the interrupts. 678 */ 679 for (i = 0; i < OHCI_NO_INTRS; i++) 680 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 681 LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 682 683 /* Determine in what context we are running. */ 684 ctl = OREAD4(sc, OHCI_CONTROL); 685 if (ctl & OHCI_IR) { 686 /* SMM active, request change */ 687 DPRINTF(("ohci_init: SMM active, request owner change\n")); 688 s = OREAD4(sc, OHCI_COMMAND_STATUS); 689 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 690 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 691 usb_delay_ms(&sc->sc_bus, 1); 692 ctl = OREAD4(sc, OHCI_CONTROL); 693 } 694 if ((ctl & OHCI_IR) == 0) { 695 printf("%s: SMM does not respond, resetting\n", 696 USBDEVNAME(sc->sc_bus.bdev)); 697 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 698 goto reset; 699 } 700 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 701 /* BIOS started controller. */ 702 DPRINTF(("ohci_init: BIOS active\n")); 703 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 704 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 705 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 706 } 707 } else { 708 DPRINTF(("ohci_init: cold started\n")); 709 reset: 710 /* Controller was cold started. */ 711 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 712 } 713 714 /* 715 * This reset should not be necessary according to the OHCI spec, but 716 * without it some controllers do not start. 717 */ 718 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 719 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 720 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 721 722 /* We now own the host controller and the bus has been reset. */ 723 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 724 725 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 726 /* Nominal time for a reset is 10 us. */ 727 for (i = 0; i < 10; i++) { 728 delay(10); 729 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 730 if (!hcr) 731 break; 732 } 733 if (hcr) { 734 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 735 err = USBD_IOERROR; 736 goto bad5; 737 } 738 #ifdef OHCI_DEBUG 739 if (ohcidebug > 15) 740 ohci_dumpregs(sc); 741 #endif 742 743 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 744 745 /* Set up HC registers. */ 746 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 747 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 748 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 749 /* disable all interrupts and then switch on all desired interrupts */ 750 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 751 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 752 /* switch on desired functional features */ 753 ctl = OREAD4(sc, OHCI_CONTROL); 754 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 755 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 756 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 757 /* And finally start it! */ 758 OWRITE4(sc, OHCI_CONTROL, ctl); 759 760 /* 761 * The controller is now OPERATIONAL. Set a some final 762 * registers that should be set earlier, but that the 763 * controller ignores when in the SUSPEND state. 764 */ 765 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 766 fm |= OHCI_FSMPS(ival) | ival; 767 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 768 per = OHCI_PERIODIC(ival); /* 90% periodic */ 769 OWRITE4(sc, OHCI_PERIODIC_START, per); 770 771 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 772 773 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 774 775 #ifdef OHCI_DEBUG 776 if (ohcidebug > 5) 777 ohci_dumpregs(sc); 778 #endif 779 780 /* Set up the bus struct. */ 781 sc->sc_bus.methods = &ohci_bus_methods; 782 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 783 784 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 785 786 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 787 788 return (USBD_NORMAL_COMPLETION); 789 790 bad5: 791 for (i = 0; i < OHCI_NO_EDS; i++) 792 ohci_free_sed(sc, sc->sc_eds[i]); 793 bad4: 794 ohci_free_sed(sc, sc->sc_isoc_head); 795 bad3: 796 ohci_free_sed(sc, sc->sc_ctrl_head); 797 bad2: 798 ohci_free_sed(sc, sc->sc_bulk_head); 799 bad1: 800 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 801 return (err); 802 } 803 804 usbd_status 805 ohci_allocm(bus, dma, size) 806 struct usbd_bus *bus; 807 usb_dma_t *dma; 808 u_int32_t size; 809 { 810 #if defined(__NetBSD__) || defined(__OpenBSD__) 811 struct ohci_softc *sc = (struct ohci_softc *)bus; 812 #endif 813 814 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 815 } 816 817 void 818 ohci_freem(bus, dma) 819 struct usbd_bus *bus; 820 usb_dma_t *dma; 821 { 822 #if defined(__NetBSD__) || defined(__OpenBSD__) 823 struct ohci_softc *sc = (struct ohci_softc *)bus; 824 #endif 825 826 usb_freemem(&sc->sc_bus, dma); 827 } 828 829 usbd_xfer_handle 830 ohci_allocx(bus) 831 struct usbd_bus *bus; 832 { 833 struct ohci_softc *sc = (struct ohci_softc *)bus; 834 usbd_xfer_handle xfer; 835 836 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 837 if (xfer != NULL) 838 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 839 else 840 xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT); 841 if (xfer != NULL) 842 memset(xfer, 0, sizeof *xfer); 843 return (xfer); 844 } 845 846 void 847 ohci_freex(bus, xfer) 848 struct usbd_bus *bus; 849 usbd_xfer_handle xfer; 850 { 851 struct ohci_softc *sc = (struct ohci_softc *)bus; 852 853 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 854 } 855 856 /* 857 * Shut down the controller when the system is going down. 858 */ 859 void 860 ohci_shutdown(v) 861 void *v; 862 { 863 ohci_softc_t *sc = v; 864 865 DPRINTF(("ohci_shutdown: stopping the HC\n")); 866 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 867 } 868 869 /* 870 * Handle suspend/resume. 871 * 872 * We need to switch to polling mode here, because this routine is 873 * called from an intterupt context. This is all right since we 874 * are almost suspended anyway. 875 */ 876 void 877 ohci_power(why, v) 878 int why; 879 void *v; 880 { 881 #ifdef OHCI_DEBUG 882 ohci_softc_t *sc = v; 883 884 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 885 /* XXX should suspend/resume */ 886 ohci_dumpregs(sc); 887 #endif 888 } 889 890 #ifdef OHCI_DEBUG 891 void 892 ohci_dumpregs(sc) 893 ohci_softc_t *sc; 894 { 895 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 896 OREAD4(sc, OHCI_REVISION), 897 OREAD4(sc, OHCI_CONTROL), 898 OREAD4(sc, OHCI_COMMAND_STATUS))); 899 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 900 OREAD4(sc, OHCI_INTERRUPT_STATUS), 901 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 902 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 903 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 904 OREAD4(sc, OHCI_HCCA), 905 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 906 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 907 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 908 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 909 OREAD4(sc, OHCI_BULK_HEAD_ED), 910 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 911 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 912 OREAD4(sc, OHCI_DONE_HEAD), 913 OREAD4(sc, OHCI_FM_INTERVAL), 914 OREAD4(sc, OHCI_FM_REMAINING))); 915 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 916 OREAD4(sc, OHCI_FM_NUMBER), 917 OREAD4(sc, OHCI_PERIODIC_START), 918 OREAD4(sc, OHCI_LS_THRESHOLD))); 919 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 920 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 921 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 922 OREAD4(sc, OHCI_RH_STATUS))); 923 DPRINTF((" port1=0x%08x port2=0x%08x\n", 924 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 925 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 926 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 927 LE(sc->sc_hcca->hcca_frame_number), 928 LE(sc->sc_hcca->hcca_done_head))); 929 } 930 #endif 931 932 static int ohci_intr1 __P((ohci_softc_t *)); 933 934 int 935 ohci_intr(p) 936 void *p; 937 { 938 ohci_softc_t *sc = p; 939 940 /* If we get an interrupt while polling, then just ignore it. */ 941 if (sc->sc_bus.use_polling) { 942 #ifdef DIAGNOSTIC 943 printf("ohci_intr: ignored interrupt while polling\n"); 944 #endif 945 return (0); 946 } 947 948 return (ohci_intr1(sc)); 949 } 950 951 static int 952 ohci_intr1(sc) 953 ohci_softc_t *sc; 954 { 955 u_int32_t intrs, eintrs; 956 ohci_physaddr_t done; 957 958 /* In case the interrupt occurs before initialization has completed. */ 959 if (sc == NULL || sc->sc_hcca == NULL) { 960 #ifdef DIAGNOSTIC 961 printf("ohci_intr: sc->sc_hcca == NULL\n"); 962 #endif 963 return (0); 964 } 965 966 intrs = 0; 967 done = LE(sc->sc_hcca->hcca_done_head); 968 if (done != 0) { 969 sc->sc_hcca->hcca_done_head = 0; 970 if (done & ~OHCI_DONE_INTRS) 971 intrs = OHCI_WDH; 972 if (done & OHCI_DONE_INTRS) 973 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 974 } else 975 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 976 977 if (!intrs) 978 return (0); 979 980 intrs &= ~OHCI_MIE; 981 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 982 eintrs = intrs & sc->sc_eintrs; 983 if (!eintrs) 984 return (0); 985 986 sc->sc_bus.intr_context++; 987 sc->sc_bus.no_intrs++; 988 DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n", 989 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 990 (u_int)eintrs)); 991 992 if (eintrs & OHCI_SO) { 993 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev)); 994 /* XXX do what */ 995 intrs &= ~OHCI_SO; 996 } 997 if (eintrs & OHCI_WDH) { 998 ohci_process_done(sc, done &~ OHCI_DONE_INTRS); 999 intrs &= ~OHCI_WDH; 1000 } 1001 if (eintrs & OHCI_RD) { 1002 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1003 /* XXX process resume detect */ 1004 } 1005 if (eintrs & OHCI_UE) { 1006 printf("%s: unrecoverable error, controller halted\n", 1007 USBDEVNAME(sc->sc_bus.bdev)); 1008 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1009 /* XXX what else */ 1010 } 1011 if (eintrs & OHCI_RHSC) { 1012 ohci_rhsc(sc, sc->sc_intrxfer); 1013 intrs &= ~OHCI_RHSC; 1014 1015 /* 1016 * Disable RHSC interrupt for now, because it will be 1017 * on until the port has been reset. 1018 */ 1019 ohci_rhsc_able(sc, 0); 1020 } 1021 1022 sc->sc_bus.intr_context--; 1023 1024 /* Block unprocessed interrupts. XXX */ 1025 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 1026 sc->sc_eintrs &= ~intrs; 1027 1028 return (1); 1029 } 1030 1031 void 1032 ohci_rhsc_able(sc, on) 1033 ohci_softc_t *sc; 1034 int on; 1035 { 1036 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1037 if (on) { 1038 sc->sc_eintrs |= OHCI_RHSC; 1039 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1040 } else { 1041 sc->sc_eintrs &= ~OHCI_RHSC; 1042 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1043 } 1044 } 1045 1046 #ifdef OHCI_DEBUG 1047 char *ohci_cc_strs[] = { 1048 "NO_ERROR", 1049 "CRC", 1050 "BIT_STUFFING", 1051 "DATA_TOGGLE_MISMATCH", 1052 "STALL", 1053 "DEVICE_NOT_RESPONDING", 1054 "PID_CHECK_FAILURE", 1055 "UNEXPECTED_PID", 1056 "DATA_OVERRUN", 1057 "DATA_UNDERRUN", 1058 "BUFFER_OVERRUN", 1059 "BUFFER_UNDERRUN", 1060 "NOT_ACCESSED", 1061 }; 1062 #endif 1063 1064 void 1065 ohci_process_done(sc, done) 1066 ohci_softc_t *sc; 1067 ohci_physaddr_t done; 1068 { 1069 ohci_soft_td_t *std, *sdone, *stdnext; 1070 usbd_xfer_handle xfer; 1071 int len, cc; 1072 1073 DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done)); 1074 1075 /* Reverse the done list. */ 1076 for (sdone = 0; done; done = LE(std->td.td_nexttd)) { 1077 std = ohci_hash_find_td(sc, done); 1078 std->dnext = sdone; 1079 sdone = std; 1080 } 1081 1082 #ifdef OHCI_DEBUG 1083 if (ohcidebug > 10) { 1084 DPRINTF(("ohci_process_done: TD done:\n")); 1085 ohci_dump_tds(sdone); 1086 } 1087 #endif 1088 1089 for (std = sdone; std; std = stdnext) { 1090 xfer = std->xfer; 1091 stdnext = std->dnext; 1092 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1093 std, xfer, xfer->hcpriv)); 1094 cc = OHCI_TD_GET_CC(LE(std->td.td_flags)); 1095 usb_untimeout(ohci_timeout, xfer, xfer->timo_handle); 1096 if (xfer->status == USBD_CANCELLED || 1097 xfer->status == USBD_TIMEOUT) { 1098 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1099 xfer)); 1100 /* Handled by abort routine. */ 1101 } else if (cc == OHCI_CC_NO_ERROR) { 1102 len = std->len; 1103 if (std->td.td_cbp != 0) 1104 len -= LE(std->td.td_be) - 1105 LE(std->td.td_cbp) + 1; 1106 if (std->flags & OHCI_ADD_LEN) 1107 xfer->actlen += len; 1108 if (std->flags & OHCI_CALL_DONE) { 1109 xfer->status = USBD_NORMAL_COMPLETION; 1110 usb_transfer_complete(xfer); 1111 } 1112 ohci_hash_rem_td(sc, std); 1113 ohci_free_std(sc, std); 1114 } else { 1115 /* 1116 * Endpoint is halted. First unlink all the TDs 1117 * belonging to the failed transfer, and then restart 1118 * the endpoint. 1119 */ 1120 ohci_soft_td_t *p, *n; 1121 struct ohci_pipe *opipe = 1122 (struct ohci_pipe *)xfer->pipe; 1123 1124 DPRINTF(("ohci_process_done: error cc=%d (%s)\n", 1125 OHCI_TD_GET_CC(LE(std->td.td_flags)), 1126 ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td.td_flags))])); 1127 1128 /* remove TDs */ 1129 for (p = std; p->xfer == xfer; p = n) { 1130 n = p->nexttd; 1131 ohci_hash_rem_td(sc, p); 1132 ohci_free_std(sc, p); 1133 } 1134 1135 /* clear halt */ 1136 opipe->sed->ed.ed_headp = LE(p->physaddr); 1137 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1138 1139 if (cc == OHCI_CC_STALL) 1140 xfer->status = USBD_STALLED; 1141 else 1142 xfer->status = USBD_IOERROR; 1143 usb_transfer_complete(xfer); 1144 } 1145 } 1146 } 1147 1148 void 1149 ohci_device_ctrl_done(xfer) 1150 usbd_xfer_handle xfer; 1151 { 1152 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1153 1154 #ifdef DIAGNOSTIC 1155 if (!(xfer->rqflags & URQ_REQUEST)) { 1156 panic("ohci_ctrl_done: not a request\n"); 1157 } 1158 #endif 1159 xfer->hcpriv = NULL; 1160 } 1161 1162 void 1163 ohci_device_intr_done(xfer) 1164 usbd_xfer_handle xfer; 1165 { 1166 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1167 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1168 ohci_soft_ed_t *sed = opipe->sed; 1169 ohci_soft_td_t *data, *tail; 1170 1171 1172 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1173 xfer, xfer->actlen)); 1174 1175 xfer->hcpriv = NULL; 1176 1177 if (xfer->pipe->repeat) { 1178 data = opipe->tail.td; 1179 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1180 if (tail == NULL) { 1181 xfer->status = USBD_NOMEM; 1182 return; 1183 } 1184 tail->xfer = NULL; 1185 1186 data->td.td_flags = LE( 1187 OHCI_TD_IN | OHCI_TD_NOCC | 1188 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1189 if (xfer->flags & USBD_SHORT_XFER_OK) 1190 data->td.td_flags |= LE(OHCI_TD_R); 1191 data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf)); 1192 data->nexttd = tail; 1193 data->td.td_nexttd = LE(tail->physaddr); 1194 data->td.td_be = LE(LE(data->td.td_cbp) + xfer->length - 1); 1195 data->len = xfer->length; 1196 data->xfer = xfer; 1197 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1198 xfer->hcpriv = data; 1199 xfer->actlen = 0; 1200 1201 ohci_hash_add_td(sc, data); 1202 sed->ed.ed_tailp = LE(tail->physaddr); 1203 opipe->tail.td = tail; 1204 } 1205 } 1206 1207 void 1208 ohci_device_bulk_done(xfer) 1209 usbd_xfer_handle xfer; 1210 { 1211 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1212 xfer, xfer->actlen)); 1213 1214 xfer->hcpriv = NULL; 1215 } 1216 1217 void 1218 ohci_rhsc(sc, xfer) 1219 ohci_softc_t *sc; 1220 usbd_xfer_handle xfer; 1221 { 1222 usbd_pipe_handle pipe; 1223 struct ohci_pipe *opipe; 1224 u_char *p; 1225 int i, m; 1226 int hstatus; 1227 1228 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1229 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1230 sc, xfer, hstatus)); 1231 1232 if (xfer == NULL) { 1233 /* Just ignore the change. */ 1234 return; 1235 } 1236 1237 pipe = xfer->pipe; 1238 opipe = (struct ohci_pipe *)pipe; 1239 1240 p = KERNADDR(&xfer->dmabuf); 1241 m = min(sc->sc_noport, xfer->length * 8 - 1); 1242 memset(p, 0, xfer->length); 1243 for (i = 1; i <= m; i++) { 1244 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1245 p[i/8] |= 1 << (i%8); 1246 } 1247 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1248 xfer->actlen = xfer->length; 1249 xfer->status = USBD_NORMAL_COMPLETION; 1250 1251 usb_transfer_complete(xfer); 1252 } 1253 1254 void 1255 ohci_root_intr_done(xfer) 1256 usbd_xfer_handle xfer; 1257 { 1258 xfer->hcpriv = NULL; 1259 } 1260 1261 /* 1262 * Wait here until controller claims to have an interrupt. 1263 * Then call ohci_intr and return. Use timeout to avoid waiting 1264 * too long. 1265 */ 1266 void 1267 ohci_waitintr(sc, xfer) 1268 ohci_softc_t *sc; 1269 usbd_xfer_handle xfer; 1270 { 1271 int timo = xfer->timeout; 1272 int usecs; 1273 u_int32_t intrs; 1274 1275 xfer->status = USBD_IN_PROGRESS; 1276 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1277 usb_delay_ms(&sc->sc_bus, 1); 1278 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1279 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1280 #ifdef OHCI_DEBUG 1281 if (ohcidebug > 15) 1282 ohci_dumpregs(sc); 1283 #endif 1284 if (intrs) { 1285 ohci_intr1(sc); 1286 if (xfer->status != USBD_IN_PROGRESS) 1287 return; 1288 } 1289 } 1290 1291 /* Timeout */ 1292 DPRINTF(("ohci_waitintr: timeout\n")); 1293 xfer->status = USBD_TIMEOUT; 1294 usb_transfer_complete(xfer); 1295 /* XXX should free TD */ 1296 } 1297 1298 void 1299 ohci_poll(bus) 1300 struct usbd_bus *bus; 1301 { 1302 ohci_softc_t *sc = (ohci_softc_t *)bus; 1303 1304 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1305 ohci_intr1(sc); 1306 } 1307 1308 usbd_status 1309 ohci_device_request(xfer) 1310 usbd_xfer_handle xfer; 1311 { 1312 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1313 usb_device_request_t *req = &xfer->request; 1314 usbd_device_handle dev = opipe->pipe.device; 1315 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1316 int addr = dev->address; 1317 ohci_soft_td_t *setup, *data = 0, *stat, *next, *tail; 1318 ohci_soft_ed_t *sed; 1319 int isread; 1320 int len; 1321 usbd_status err; 1322 int s; 1323 1324 isread = req->bmRequestType & UT_READ; 1325 len = UGETW(req->wLength); 1326 1327 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1328 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1329 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1330 UGETW(req->wIndex), len, addr, 1331 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1332 1333 setup = opipe->tail.td; 1334 stat = ohci_alloc_std(sc); 1335 if (stat == NULL) { 1336 err = USBD_NOMEM; 1337 goto bad1; 1338 } 1339 tail = ohci_alloc_std(sc); 1340 if (tail == NULL) { 1341 err = USBD_NOMEM; 1342 goto bad2; 1343 } 1344 tail->xfer = NULL; 1345 1346 sed = opipe->sed; 1347 opipe->u.ctl.length = len; 1348 1349 /* Update device address and length since they may have changed. */ 1350 /* XXX This only needs to be done once, but it's too early in open. */ 1351 sed->ed.ed_flags = LE( 1352 (LE(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1353 OHCI_ED_SET_FA(addr) | 1354 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1355 1356 /* Set up data transaction */ 1357 if (len != 0) { 1358 data = ohci_alloc_std(sc); 1359 if (data == NULL) { 1360 err = USBD_NOMEM; 1361 goto bad3; 1362 } 1363 data->td.td_flags = LE( 1364 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 1365 OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR | 1366 (xfer->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0)); 1367 data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf)); 1368 data->nexttd = stat; 1369 data->td.td_nexttd = LE(stat->physaddr); 1370 data->td.td_be = LE(LE(data->td.td_cbp) + len - 1); 1371 data->len = len; 1372 data->xfer = xfer; 1373 data->flags = OHCI_ADD_LEN; 1374 1375 next = data; 1376 stat->flags = OHCI_CALL_DONE; 1377 } else { 1378 next = stat; 1379 /* XXX ADD_LEN? */ 1380 stat->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1381 } 1382 1383 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1384 1385 setup->td.td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC | 1386 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1387 setup->td.td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma)); 1388 setup->nexttd = next; 1389 setup->td.td_nexttd = LE(next->physaddr); 1390 setup->td.td_be = LE(LE(setup->td.td_cbp) + sizeof *req - 1); 1391 setup->len = 0; /* XXX The number of byte we count */ 1392 setup->xfer = xfer; 1393 setup->flags = 0; 1394 xfer->hcpriv = setup; 1395 1396 stat->td.td_flags = LE( 1397 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC | 1398 OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1399 stat->td.td_cbp = 0; 1400 stat->nexttd = tail; 1401 stat->td.td_nexttd = LE(tail->physaddr); 1402 stat->td.td_be = 0; 1403 stat->len = 0; 1404 stat->xfer = xfer; 1405 1406 #ifdef OHCI_DEBUG 1407 if (ohcidebug > 5) { 1408 DPRINTF(("ohci_device_request:\n")); 1409 ohci_dump_ed(sed); 1410 ohci_dump_tds(setup); 1411 } 1412 #endif 1413 1414 /* Insert ED in schedule */ 1415 s = splusb(); 1416 ohci_hash_add_td(sc, setup); 1417 if (len != 0) 1418 ohci_hash_add_td(sc, data); 1419 ohci_hash_add_td(sc, stat); 1420 sed->ed.ed_tailp = LE(tail->physaddr); 1421 opipe->tail.td = tail; 1422 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1423 if (xfer->timeout && !sc->sc_bus.use_polling) { 1424 usb_timeout(ohci_timeout, xfer, 1425 MS_TO_TICKS(xfer->timeout), xfer->timo_handle); 1426 } 1427 splx(s); 1428 1429 #ifdef OHCI_DEBUG 1430 if (ohcidebug > 5) { 1431 usb_delay_ms(&sc->sc_bus, 5); 1432 DPRINTF(("ohci_device_request: status=%x\n", 1433 OREAD4(sc, OHCI_COMMAND_STATUS))); 1434 ohci_dump_ed(sed); 1435 ohci_dump_tds(setup); 1436 } 1437 #endif 1438 1439 return (USBD_NORMAL_COMPLETION); 1440 1441 bad3: 1442 ohci_free_std(sc, tail); 1443 bad2: 1444 ohci_free_std(sc, stat); 1445 bad1: 1446 return (err); 1447 } 1448 1449 /* 1450 * Add an ED to the schedule. Called at splusb(). 1451 */ 1452 void 1453 ohci_add_ed(sed, head) 1454 ohci_soft_ed_t *sed; 1455 ohci_soft_ed_t *head; 1456 { 1457 SPLUSBCHECK; 1458 sed->next = head->next; 1459 sed->ed.ed_nexted = head->ed.ed_nexted; 1460 head->next = sed; 1461 head->ed.ed_nexted = LE(sed->physaddr); 1462 } 1463 1464 /* 1465 * Remove an ED from the schedule. Called at splusb(). 1466 */ 1467 void 1468 ohci_rem_ed(sed, head) 1469 ohci_soft_ed_t *sed; 1470 ohci_soft_ed_t *head; 1471 { 1472 ohci_soft_ed_t *p; 1473 1474 SPLUSBCHECK; 1475 1476 /* XXX */ 1477 for (p = head; p == NULL && p->next != sed; p = p->next) 1478 ; 1479 if (p == NULL) 1480 panic("ohci_rem_ed: ED not found\n"); 1481 p->next = sed->next; 1482 p->ed.ed_nexted = sed->ed.ed_nexted; 1483 } 1484 1485 /* 1486 * When a transfer is completed the TD is added to the done queue by 1487 * the host controller. This queue is the processed by software. 1488 * Unfortunately the queue contains the physical address of the TD 1489 * and we have no simple way to translate this back to a kernel address. 1490 * To make the translation possible (and fast) we use a hash table of 1491 * TDs currently in the schedule. The physical address is used as the 1492 * hash value. 1493 */ 1494 1495 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1496 /* Called at splusb() */ 1497 void 1498 ohci_hash_add_td(sc, std) 1499 ohci_softc_t *sc; 1500 ohci_soft_td_t *std; 1501 { 1502 int h = HASH(std->physaddr); 1503 1504 SPLUSBCHECK; 1505 1506 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1507 } 1508 1509 /* Called at splusb() */ 1510 void 1511 ohci_hash_rem_td(sc, std) 1512 ohci_softc_t *sc; 1513 ohci_soft_td_t *std; 1514 { 1515 SPLUSBCHECK; 1516 1517 LIST_REMOVE(std, hnext); 1518 } 1519 1520 ohci_soft_td_t * 1521 ohci_hash_find_td(sc, a) 1522 ohci_softc_t *sc; 1523 ohci_physaddr_t a; 1524 { 1525 int h = HASH(a); 1526 ohci_soft_td_t *std; 1527 1528 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1529 std != NULL; 1530 std = LIST_NEXT(std, hnext)) 1531 if (std->physaddr == a) 1532 return (std); 1533 panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a); 1534 } 1535 1536 void 1537 ohci_timeout(addr) 1538 void *addr; 1539 { 1540 usbd_xfer_handle xfer = addr; 1541 int s; 1542 1543 DPRINTF(("ohci_timeout: xfer=%p\n", xfer)); 1544 1545 s = splusb(); 1546 xfer->device->bus->intr_context++; 1547 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1548 xfer->device->bus->intr_context--; 1549 splx(s); 1550 } 1551 1552 #ifdef OHCI_DEBUG 1553 void 1554 ohci_dump_tds(std) 1555 ohci_soft_td_t *std; 1556 { 1557 for (; std; std = std->nexttd) 1558 ohci_dump_td(std); 1559 } 1560 1561 void 1562 ohci_dump_td(std) 1563 ohci_soft_td_t *std; 1564 { 1565 DPRINTF(("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1566 "nexttd=0x%08lx be=0x%08lx\n", 1567 std, (u_long)std->physaddr, 1568 (int)LE(std->td.td_flags), 1569 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1570 OHCI_TD_GET_DI(LE(std->td.td_flags)), 1571 OHCI_TD_GET_EC(LE(std->td.td_flags)), 1572 OHCI_TD_GET_CC(LE(std->td.td_flags)), 1573 (u_long)LE(std->td.td_cbp), 1574 (u_long)LE(std->td.td_nexttd), (u_long)LE(std->td.td_be))); 1575 } 1576 1577 void 1578 ohci_dump_ed(sed) 1579 ohci_soft_ed_t *sed; 1580 { 1581 DPRINTF(("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx " 1582 "headp=%b nexted=0x%08lx\n", 1583 sed, (u_long)sed->physaddr, 1584 OHCI_ED_GET_FA(LE(sed->ed.ed_flags)), 1585 OHCI_ED_GET_EN(LE(sed->ed.ed_flags)), 1586 OHCI_ED_GET_MAXP(LE(sed->ed.ed_flags)), 1587 (int)LE(sed->ed.ed_flags), 1588 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1589 (u_long)LE(sed->ed.ed_tailp), 1590 (u_long)LE(sed->ed.ed_headp), 1591 "\20\1HALT\2CARRY", 1592 (u_long)LE(sed->ed.ed_nexted))); 1593 } 1594 #endif 1595 1596 usbd_status 1597 ohci_open(pipe) 1598 usbd_pipe_handle pipe; 1599 { 1600 usbd_device_handle dev = pipe->device; 1601 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1602 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1603 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1604 u_int8_t addr = dev->address; 1605 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1606 ohci_soft_ed_t *sed; 1607 ohci_soft_td_t *std; 1608 ohci_soft_itd_t *sitd; 1609 ohci_physaddr_t tdphys; 1610 u_int32_t fmt; 1611 usbd_status err; 1612 int s; 1613 int ival; 1614 1615 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1616 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1617 if (addr == sc->sc_addr) { 1618 switch (ed->bEndpointAddress) { 1619 case USB_CONTROL_ENDPOINT: 1620 pipe->methods = &ohci_root_ctrl_methods; 1621 break; 1622 case UE_DIR_IN | OHCI_INTR_ENDPT: 1623 pipe->methods = &ohci_root_intr_methods; 1624 break; 1625 default: 1626 return (USBD_INVAL); 1627 } 1628 } else { 1629 sed = ohci_alloc_sed(sc); 1630 if (sed == NULL) 1631 goto bad0; 1632 opipe->sed = sed; 1633 if (xfertype == UE_ISOCHRONOUS) { 1634 sitd = ohci_alloc_sitd(sc); 1635 if (sitd == NULL) { 1636 ohci_free_sitd(sc, sitd); 1637 goto bad1; 1638 } 1639 opipe->tail.itd = sitd; 1640 tdphys = LE(sitd->physaddr); 1641 fmt = OHCI_ED_FORMAT_ISO; 1642 } else { 1643 std = ohci_alloc_std(sc); 1644 if (std == NULL) { 1645 ohci_free_std(sc, std); 1646 goto bad1; 1647 } 1648 opipe->tail.td = std; 1649 tdphys = LE(std->physaddr); 1650 fmt = OHCI_ED_FORMAT_GEN; 1651 } 1652 sed->ed.ed_flags = LE( 1653 OHCI_ED_SET_FA(addr) | 1654 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1655 OHCI_ED_DIR_TD | 1656 (dev->lowspeed ? OHCI_ED_SPEED : 0) | fmt | 1657 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1658 sed->ed.ed_headp = sed->ed.ed_tailp = tdphys; 1659 1660 switch (xfertype) { 1661 case UE_CONTROL: 1662 pipe->methods = &ohci_device_ctrl_methods; 1663 err = usb_allocmem(&sc->sc_bus, 1664 sizeof(usb_device_request_t), 1665 0, &opipe->u.ctl.reqdma); 1666 if (err) 1667 goto bad; 1668 s = splusb(); 1669 ohci_add_ed(sed, sc->sc_ctrl_head); 1670 splx(s); 1671 break; 1672 case UE_INTERRUPT: 1673 pipe->methods = &ohci_device_intr_methods; 1674 ival = pipe->interval; 1675 if (ival == USBD_DEFAULT_INTERVAL) 1676 ival = ed->bInterval; 1677 return (ohci_device_setintr(sc, opipe, ival)); 1678 case UE_ISOCHRONOUS: 1679 pipe->methods = &ohci_device_isoc_methods; 1680 return (ohci_setup_isoc(pipe)); 1681 case UE_BULK: 1682 pipe->methods = &ohci_device_bulk_methods; 1683 s = splusb(); 1684 ohci_add_ed(sed, sc->sc_bulk_head); 1685 splx(s); 1686 break; 1687 } 1688 } 1689 return (USBD_NORMAL_COMPLETION); 1690 1691 bad: 1692 ohci_free_std(sc, std); 1693 bad1: 1694 ohci_free_sed(sc, sed); 1695 bad0: 1696 return (USBD_NOMEM); 1697 1698 } 1699 1700 /* 1701 * Close a reqular pipe. 1702 * Assumes that there are no pending transactions. 1703 */ 1704 void 1705 ohci_close_pipe(pipe, head) 1706 usbd_pipe_handle pipe; 1707 ohci_soft_ed_t *head; 1708 { 1709 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1710 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1711 ohci_soft_ed_t *sed = opipe->sed; 1712 int s; 1713 1714 s = splusb(); 1715 #ifdef DIAGNOSTIC 1716 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 1717 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 1718 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) { 1719 ohci_physaddr_t td = sed->ed.ed_headp; 1720 ohci_soft_td_t *std; 1721 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]); 1722 std != NULL; 1723 std = LIST_NEXT(std, hnext)) 1724 if (std->physaddr == td) 1725 break; 1726 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 1727 "tl=0x%x pipe=%p, std=%p\n", sed, 1728 (int)LE(sed->ed.ed_headp), (int)LE(sed->ed.ed_tailp), 1729 pipe, std); 1730 usb_delay_ms(&sc->sc_bus, 2); 1731 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 1732 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) 1733 printf("ohci_close_pipe: pipe still not empty\n"); 1734 } 1735 #endif 1736 ohci_rem_ed(sed, head); 1737 splx(s); 1738 ohci_free_sed(sc, opipe->sed); 1739 } 1740 1741 /* 1742 * Abort a device request. 1743 * If this routine is called at splusb() it guarantees that the request 1744 * will be removed from the hardware scheduling and that the callback 1745 * for it will be called with USBD_CANCELLED status. 1746 * It's impossible to guarantee that the requested transfer will not 1747 * have happened since the hardware runs concurrently. 1748 * If the transaction has already happened we rely on the ordinary 1749 * interrupt processing to process it. 1750 */ 1751 void 1752 ohci_abort_xfer(xfer, status) 1753 usbd_xfer_handle xfer; 1754 usbd_status status; 1755 { 1756 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1757 ohci_soft_ed_t *sed; 1758 1759 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p\n", xfer, opipe)); 1760 1761 xfer->status = status; 1762 1763 usb_untimeout(ohci_timeout, xfer, xfer->timo_handle); 1764 1765 sed = opipe->sed; 1766 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 1767 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); /* force hardware skip */ 1768 1769 #if 1 1770 if (xfer->device->bus->intr_context) { 1771 /* We have no process context, so we can't use tsleep(). */ 1772 timeout(ohci_abort_xfer_end, xfer, hz / USB_FRAMES_PER_SECOND); 1773 } else { 1774 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 1775 KASSERT(intr_nesting_level == 0, 1776 ("ohci_abort_req in interrupt context")); 1777 #endif 1778 usb_delay_ms(opipe->pipe.device->bus, 1); 1779 ohci_abort_xfer_end(xfer); 1780 } 1781 #else 1782 delay(1000); 1783 ohci_abort_xfer_end(xfer); 1784 #endif 1785 } 1786 1787 void 1788 ohci_abort_xfer_end(v) 1789 void *v; 1790 { 1791 usbd_xfer_handle xfer = v; 1792 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1793 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1794 ohci_soft_ed_t *sed; 1795 ohci_soft_td_t *p, *n; 1796 int s; 1797 1798 s = splusb(); 1799 1800 p = xfer->hcpriv; 1801 #ifdef DIAGNOSTIC 1802 if (p == NULL) { 1803 printf("ohci_abort_xfer: hcpriv==0\n"); 1804 return; 1805 } 1806 #endif 1807 for (; p->xfer == xfer; p = n) { 1808 n = p->nexttd; 1809 ohci_hash_rem_td(sc, p); 1810 ohci_free_std(sc, p); 1811 } 1812 1813 sed = opipe->sed; 1814 DPRINTFN(2,("ohci_abort_xfer: set hd=%x, tl=%x\n", 1815 (int)LE(p->physaddr), (int)LE(sed->ed.ed_tailp))); 1816 sed->ed.ed_headp = p->physaddr; /* unlink TDs */ 1817 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); /* remove hardware skip */ 1818 1819 usb_transfer_complete(xfer); 1820 1821 splx(s); 1822 } 1823 1824 /* 1825 * Data structures and routines to emulate the root hub. 1826 */ 1827 static usb_device_descriptor_t ohci_devd = { 1828 USB_DEVICE_DESCRIPTOR_SIZE, 1829 UDESC_DEVICE, /* type */ 1830 {0x00, 0x01}, /* USB version */ 1831 UCLASS_HUB, /* class */ 1832 USUBCLASS_HUB, /* subclass */ 1833 0, /* protocol */ 1834 64, /* max packet */ 1835 {0},{0},{0x00,0x01}, /* device id */ 1836 1,2,0, /* string indicies */ 1837 1 /* # of configurations */ 1838 }; 1839 1840 static usb_config_descriptor_t ohci_confd = { 1841 USB_CONFIG_DESCRIPTOR_SIZE, 1842 UDESC_CONFIG, 1843 {USB_CONFIG_DESCRIPTOR_SIZE + 1844 USB_INTERFACE_DESCRIPTOR_SIZE + 1845 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1846 1, 1847 1, 1848 0, 1849 UC_SELF_POWERED, 1850 0 /* max power */ 1851 }; 1852 1853 static usb_interface_descriptor_t ohci_ifcd = { 1854 USB_INTERFACE_DESCRIPTOR_SIZE, 1855 UDESC_INTERFACE, 1856 0, 1857 0, 1858 1, 1859 UCLASS_HUB, 1860 USUBCLASS_HUB, 1861 0, 1862 0 1863 }; 1864 1865 static usb_endpoint_descriptor_t ohci_endpd = { 1866 USB_ENDPOINT_DESCRIPTOR_SIZE, 1867 UDESC_ENDPOINT, 1868 UE_DIR_IN | OHCI_INTR_ENDPT, 1869 UE_INTERRUPT, 1870 {8, 0}, /* max packet */ 1871 255 1872 }; 1873 1874 static usb_hub_descriptor_t ohci_hubd = { 1875 USB_HUB_DESCRIPTOR_SIZE, 1876 UDESC_HUB, 1877 0, 1878 {0,0}, 1879 0, 1880 0, 1881 {0}, 1882 }; 1883 1884 static int 1885 ohci_str(p, l, s) 1886 usb_string_descriptor_t *p; 1887 int l; 1888 char *s; 1889 { 1890 int i; 1891 1892 if (l == 0) 1893 return (0); 1894 p->bLength = 2 * strlen(s) + 2; 1895 if (l == 1) 1896 return (1); 1897 p->bDescriptorType = UDESC_STRING; 1898 l -= 2; 1899 for (i = 0; s[i] && l > 1; i++, l -= 2) 1900 USETW2(p->bString[i], 0, s[i]); 1901 return (2*i+2); 1902 } 1903 1904 /* 1905 * Simulate a hardware hub by handling all the necessary requests. 1906 */ 1907 static usbd_status 1908 ohci_root_ctrl_transfer(xfer) 1909 usbd_xfer_handle xfer; 1910 { 1911 usbd_status err; 1912 1913 /* Insert last in queue. */ 1914 err = usb_insert_transfer(xfer); 1915 if (err) 1916 return (err); 1917 1918 /* Pipe isn't running, start first */ 1919 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1920 } 1921 1922 static usbd_status 1923 ohci_root_ctrl_start(xfer) 1924 usbd_xfer_handle xfer; 1925 { 1926 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 1927 usb_device_request_t *req; 1928 void *buf = NULL; 1929 int port, i; 1930 int s, len, value, index, l, totlen = 0; 1931 usb_port_status_t ps; 1932 usb_hub_descriptor_t hubd; 1933 usbd_status err; 1934 u_int32_t v; 1935 1936 #ifdef DIAGNOSTIC 1937 if (!(xfer->rqflags & URQ_REQUEST)) 1938 /* XXX panic */ 1939 return (USBD_INVAL); 1940 #endif 1941 req = &xfer->request; 1942 1943 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 1944 req->bmRequestType, req->bRequest)); 1945 1946 len = UGETW(req->wLength); 1947 value = UGETW(req->wValue); 1948 index = UGETW(req->wIndex); 1949 1950 if (len != 0) 1951 buf = KERNADDR(&xfer->dmabuf); 1952 1953 #define C(x,y) ((x) | ((y) << 8)) 1954 switch(C(req->bRequest, req->bmRequestType)) { 1955 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1956 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1957 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1958 /* 1959 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1960 * for the integrated root hub. 1961 */ 1962 break; 1963 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1964 if (len > 0) { 1965 *(u_int8_t *)buf = sc->sc_conf; 1966 totlen = 1; 1967 } 1968 break; 1969 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1970 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 1971 switch(value >> 8) { 1972 case UDESC_DEVICE: 1973 if ((value & 0xff) != 0) { 1974 err = USBD_IOERROR; 1975 goto ret; 1976 } 1977 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1978 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 1979 memcpy(buf, &ohci_devd, l); 1980 break; 1981 case UDESC_CONFIG: 1982 if ((value & 0xff) != 0) { 1983 err = USBD_IOERROR; 1984 goto ret; 1985 } 1986 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1987 memcpy(buf, &ohci_confd, l); 1988 buf = (char *)buf + l; 1989 len -= l; 1990 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1991 totlen += l; 1992 memcpy(buf, &ohci_ifcd, l); 1993 buf = (char *)buf + l; 1994 len -= l; 1995 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1996 totlen += l; 1997 memcpy(buf, &ohci_endpd, l); 1998 break; 1999 case UDESC_STRING: 2000 if (len == 0) 2001 break; 2002 *(u_int8_t *)buf = 0; 2003 totlen = 1; 2004 switch (value & 0xff) { 2005 case 1: /* Vendor */ 2006 totlen = ohci_str(buf, len, sc->sc_vendor); 2007 break; 2008 case 2: /* Product */ 2009 totlen = ohci_str(buf, len, "OHCI root hub"); 2010 break; 2011 } 2012 break; 2013 default: 2014 err = USBD_IOERROR; 2015 goto ret; 2016 } 2017 break; 2018 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2019 if (len > 0) { 2020 *(u_int8_t *)buf = 0; 2021 totlen = 1; 2022 } 2023 break; 2024 case C(UR_GET_STATUS, UT_READ_DEVICE): 2025 if (len > 1) { 2026 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2027 totlen = 2; 2028 } 2029 break; 2030 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2031 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2032 if (len > 1) { 2033 USETW(((usb_status_t *)buf)->wStatus, 0); 2034 totlen = 2; 2035 } 2036 break; 2037 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2038 if (value >= USB_MAX_DEVICES) { 2039 err = USBD_IOERROR; 2040 goto ret; 2041 } 2042 sc->sc_addr = value; 2043 break; 2044 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2045 if (value != 0 && value != 1) { 2046 err = USBD_IOERROR; 2047 goto ret; 2048 } 2049 sc->sc_conf = value; 2050 break; 2051 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2052 break; 2053 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2054 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2055 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2056 err = USBD_IOERROR; 2057 goto ret; 2058 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2059 break; 2060 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2061 break; 2062 /* Hub requests */ 2063 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2064 break; 2065 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2066 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2067 "port=%d feature=%d\n", 2068 index, value)); 2069 if (index < 1 || index > sc->sc_noport) { 2070 err = USBD_IOERROR; 2071 goto ret; 2072 } 2073 port = OHCI_RH_PORT_STATUS(index); 2074 switch(value) { 2075 case UHF_PORT_ENABLE: 2076 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2077 break; 2078 case UHF_PORT_SUSPEND: 2079 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2080 break; 2081 case UHF_PORT_POWER: 2082 OWRITE4(sc, port, UPS_LOW_SPEED); 2083 break; 2084 case UHF_C_PORT_CONNECTION: 2085 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2086 break; 2087 case UHF_C_PORT_ENABLE: 2088 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2089 break; 2090 case UHF_C_PORT_SUSPEND: 2091 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2092 break; 2093 case UHF_C_PORT_OVER_CURRENT: 2094 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2095 break; 2096 case UHF_C_PORT_RESET: 2097 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2098 break; 2099 default: 2100 err = USBD_IOERROR; 2101 goto ret; 2102 } 2103 switch(value) { 2104 case UHF_C_PORT_CONNECTION: 2105 case UHF_C_PORT_ENABLE: 2106 case UHF_C_PORT_SUSPEND: 2107 case UHF_C_PORT_OVER_CURRENT: 2108 case UHF_C_PORT_RESET: 2109 /* Enable RHSC interrupt if condition is cleared. */ 2110 if ((OREAD4(sc, port) >> 16) == 0) 2111 ohci_rhsc_able(sc, 1); 2112 break; 2113 default: 2114 break; 2115 } 2116 break; 2117 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2118 if (value != 0) { 2119 err = USBD_IOERROR; 2120 goto ret; 2121 } 2122 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2123 hubd = ohci_hubd; 2124 hubd.bNbrPorts = sc->sc_noport; 2125 USETW(hubd.wHubCharacteristics, 2126 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2127 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2128 /* XXX overcurrent */ 2129 ); 2130 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2131 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2132 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2133 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2134 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2135 l = min(len, hubd.bDescLength); 2136 totlen = l; 2137 memcpy(buf, &hubd, l); 2138 break; 2139 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2140 if (len != 4) { 2141 err = USBD_IOERROR; 2142 goto ret; 2143 } 2144 memset(buf, 0, len); /* ? XXX */ 2145 totlen = len; 2146 break; 2147 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2148 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2149 index)); 2150 if (index < 1 || index > sc->sc_noport) { 2151 err = USBD_IOERROR; 2152 goto ret; 2153 } 2154 if (len != 4) { 2155 err = USBD_IOERROR; 2156 goto ret; 2157 } 2158 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2159 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2160 v)); 2161 USETW(ps.wPortStatus, v); 2162 USETW(ps.wPortChange, v >> 16); 2163 l = min(len, sizeof ps); 2164 memcpy(buf, &ps, l); 2165 totlen = l; 2166 break; 2167 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2168 err = USBD_IOERROR; 2169 goto ret; 2170 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2171 break; 2172 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2173 if (index < 1 || index > sc->sc_noport) { 2174 err = USBD_IOERROR; 2175 goto ret; 2176 } 2177 port = OHCI_RH_PORT_STATUS(index); 2178 switch(value) { 2179 case UHF_PORT_ENABLE: 2180 OWRITE4(sc, port, UPS_PORT_ENABLED); 2181 break; 2182 case UHF_PORT_SUSPEND: 2183 OWRITE4(sc, port, UPS_SUSPEND); 2184 break; 2185 case UHF_PORT_RESET: 2186 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2187 index)); 2188 OWRITE4(sc, port, UPS_RESET); 2189 for (i = 0; i < 10; i++) { 2190 usb_delay_ms(&sc->sc_bus, 10); 2191 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2192 break; 2193 } 2194 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2195 index, OREAD4(sc, port))); 2196 break; 2197 case UHF_PORT_POWER: 2198 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2199 "%d\n", index)); 2200 OWRITE4(sc, port, UPS_PORT_POWER); 2201 break; 2202 default: 2203 err = USBD_IOERROR; 2204 goto ret; 2205 } 2206 break; 2207 default: 2208 err = USBD_IOERROR; 2209 goto ret; 2210 } 2211 xfer->actlen = totlen; 2212 err = USBD_NORMAL_COMPLETION; 2213 ret: 2214 xfer->status = err; 2215 s = splusb(); 2216 usb_transfer_complete(xfer); 2217 splx(s); 2218 return (USBD_IN_PROGRESS); 2219 } 2220 2221 /* Abort a root control request. */ 2222 static void 2223 ohci_root_ctrl_abort(xfer) 2224 usbd_xfer_handle xfer; 2225 { 2226 /* Nothing to do, all transfers are synchronous. */ 2227 } 2228 2229 /* Close the root pipe. */ 2230 static void 2231 ohci_root_ctrl_close(pipe) 2232 usbd_pipe_handle pipe; 2233 { 2234 DPRINTF(("ohci_root_ctrl_close\n")); 2235 /* Nothing to do. */ 2236 } 2237 2238 static usbd_status 2239 ohci_root_intr_transfer(xfer) 2240 usbd_xfer_handle xfer; 2241 { 2242 usbd_status err; 2243 2244 /* Insert last in queue. */ 2245 err = usb_insert_transfer(xfer); 2246 if (err) 2247 return (err); 2248 2249 /* Pipe isn't running, start first */ 2250 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2251 } 2252 2253 static usbd_status 2254 ohci_root_intr_start(xfer) 2255 usbd_xfer_handle xfer; 2256 { 2257 usbd_pipe_handle pipe = xfer->pipe; 2258 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2259 2260 sc->sc_intrxfer = xfer; 2261 2262 return (USBD_IN_PROGRESS); 2263 } 2264 2265 /* Abort a root interrupt request. */ 2266 static void 2267 ohci_root_intr_abort(xfer) 2268 usbd_xfer_handle xfer; 2269 { 2270 int s; 2271 2272 if (xfer->pipe->intrxfer == xfer) { 2273 DPRINTF(("ohci_root_intr_abort: remove\n")); 2274 xfer->pipe->intrxfer = NULL; 2275 } 2276 xfer->status = USBD_CANCELLED; 2277 s = splusb(); 2278 usb_transfer_complete(xfer); 2279 splx(s); 2280 } 2281 2282 /* Close the root pipe. */ 2283 static void 2284 ohci_root_intr_close(pipe) 2285 usbd_pipe_handle pipe; 2286 { 2287 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2288 2289 DPRINTF(("ohci_root_intr_close\n")); 2290 2291 sc->sc_intrxfer = NULL; 2292 } 2293 2294 /************************/ 2295 2296 static usbd_status 2297 ohci_device_ctrl_transfer(xfer) 2298 usbd_xfer_handle xfer; 2299 { 2300 usbd_status err; 2301 2302 /* Insert last in queue. */ 2303 err = usb_insert_transfer(xfer); 2304 if (err) 2305 return (err); 2306 2307 /* Pipe isn't running, start first */ 2308 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2309 } 2310 2311 static usbd_status 2312 ohci_device_ctrl_start(xfer) 2313 usbd_xfer_handle xfer; 2314 { 2315 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2316 usbd_status err; 2317 2318 #ifdef DIAGNOSTIC 2319 if (!(xfer->rqflags & URQ_REQUEST)) { 2320 /* XXX panic */ 2321 printf("ohci_device_ctrl_transfer: not a request\n"); 2322 return (USBD_INVAL); 2323 } 2324 #endif 2325 2326 err = ohci_device_request(xfer); 2327 if (err) 2328 return (err); 2329 2330 if (sc->sc_bus.use_polling) 2331 ohci_waitintr(sc, xfer); 2332 return (USBD_IN_PROGRESS); 2333 } 2334 2335 /* Abort a device control request. */ 2336 static void 2337 ohci_device_ctrl_abort(xfer) 2338 usbd_xfer_handle xfer; 2339 { 2340 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2341 ohci_abort_xfer(xfer, USBD_CANCELLED); 2342 } 2343 2344 /* Close a device control pipe. */ 2345 static void 2346 ohci_device_ctrl_close(pipe) 2347 usbd_pipe_handle pipe; 2348 { 2349 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2350 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2351 2352 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2353 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2354 ohci_free_std(sc, opipe->tail.td); 2355 } 2356 2357 /************************/ 2358 2359 static void 2360 ohci_device_clear_toggle(pipe) 2361 usbd_pipe_handle pipe; 2362 { 2363 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2364 2365 opipe->sed->ed.ed_tailp &= LE(~OHCI_TOGGLECARRY); 2366 } 2367 2368 static void 2369 ohci_noop(pipe) 2370 usbd_pipe_handle pipe; 2371 { 2372 } 2373 2374 static usbd_status 2375 ohci_device_bulk_transfer(xfer) 2376 usbd_xfer_handle xfer; 2377 { 2378 usbd_status err; 2379 2380 /* Insert last in queue. */ 2381 err = usb_insert_transfer(xfer); 2382 if (err) 2383 return (err); 2384 2385 /* Pipe isn't running, start first */ 2386 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2387 } 2388 2389 static usbd_status 2390 ohci_device_bulk_start(xfer) 2391 usbd_xfer_handle xfer; 2392 { 2393 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2394 usbd_device_handle dev = opipe->pipe.device; 2395 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2396 int addr = dev->address; 2397 ohci_soft_td_t *data, *tail, *tdp; 2398 ohci_soft_ed_t *sed; 2399 int s, len, isread, endpt; 2400 usbd_status err; 2401 2402 #ifdef DIAGNOSTIC 2403 if (xfer->rqflags & URQ_REQUEST) { 2404 /* XXX panic */ 2405 printf("ohci_device_bulk_start: a request\n"); 2406 return (USBD_INVAL); 2407 } 2408 #endif 2409 2410 len = xfer->length; 2411 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2412 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2413 sed = opipe->sed; 2414 2415 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2416 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2417 endpt)); 2418 2419 opipe->u.bulk.isread = isread; 2420 opipe->u.bulk.length = len; 2421 2422 /* Update device address */ 2423 sed->ed.ed_flags = LE( 2424 (LE(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2425 OHCI_ED_SET_FA(addr)); 2426 2427 /* Allocate a chain of new TDs (including a new tail). */ 2428 data = opipe->tail.td; 2429 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer->flags, 2430 &xfer->dmabuf, data, &tail); 2431 if (err) 2432 return (err); 2433 2434 tail->xfer = NULL; 2435 xfer->hcpriv = data; 2436 2437 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2438 "td_cbp=0x%08x td_be=0x%08x\n", 2439 (int)LE(sed->ed.ed_flags), (int)LE(data->td.td_flags), 2440 (int)LE(data->td.td_cbp), (int)LE(data->td.td_be))); 2441 2442 #ifdef OHCI_DEBUG 2443 if (ohcidebug > 4) { 2444 ohci_dump_ed(sed); 2445 ohci_dump_tds(data); 2446 } 2447 #endif 2448 2449 /* Insert ED in schedule */ 2450 s = splusb(); 2451 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2452 tdp->xfer = xfer; 2453 ohci_hash_add_td(sc, tdp); 2454 } 2455 sed->ed.ed_tailp = LE(tail->physaddr); 2456 opipe->tail.td = tail; 2457 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); 2458 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2459 if (xfer->timeout && !sc->sc_bus.use_polling) { 2460 usb_timeout(ohci_timeout, xfer, 2461 MS_TO_TICKS(xfer->timeout), xfer->timo_handle); 2462 } 2463 2464 #if 0 2465 /* This goes wrong if we are too slow. */ 2466 if (ohcidebug > 5) { 2467 usb_delay_ms(&sc->sc_bus, 5); 2468 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2469 OREAD4(sc, OHCI_COMMAND_STATUS))); 2470 ohci_dump_ed(sed); 2471 ohci_dump_tds(data); 2472 } 2473 #endif 2474 2475 splx(s); 2476 2477 return (USBD_IN_PROGRESS); 2478 } 2479 2480 static void 2481 ohci_device_bulk_abort(xfer) 2482 usbd_xfer_handle xfer; 2483 { 2484 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2485 ohci_abort_xfer(xfer, USBD_CANCELLED); 2486 } 2487 2488 /* 2489 * Close a device bulk pipe. 2490 */ 2491 static void 2492 ohci_device_bulk_close(pipe) 2493 usbd_pipe_handle pipe; 2494 { 2495 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2496 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2497 2498 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2499 ohci_close_pipe(pipe, sc->sc_bulk_head); 2500 ohci_free_std(sc, opipe->tail.td); 2501 } 2502 2503 /************************/ 2504 2505 static usbd_status 2506 ohci_device_intr_transfer(xfer) 2507 usbd_xfer_handle xfer; 2508 { 2509 usbd_status err; 2510 2511 /* Insert last in queue. */ 2512 err = usb_insert_transfer(xfer); 2513 if (err) 2514 return (err); 2515 2516 /* Pipe isn't running, start first */ 2517 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2518 } 2519 2520 static usbd_status 2521 ohci_device_intr_start(xfer) 2522 usbd_xfer_handle xfer; 2523 { 2524 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2525 usbd_device_handle dev = opipe->pipe.device; 2526 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2527 ohci_soft_ed_t *sed = opipe->sed; 2528 ohci_soft_td_t *data, *tail; 2529 int len; 2530 int s; 2531 2532 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2533 "flags=%d priv=%p\n", 2534 xfer, xfer->length, xfer->flags, xfer->priv)); 2535 2536 #ifdef DIAGNOSTIC 2537 if (xfer->rqflags & URQ_REQUEST) 2538 panic("ohci_device_intr_transfer: a request\n"); 2539 #endif 2540 2541 len = xfer->length; 2542 2543 data = opipe->tail.td; 2544 tail = ohci_alloc_std(sc); 2545 if (tail == NULL) 2546 return (USBD_NOMEM); 2547 tail->xfer = NULL; 2548 2549 data->td.td_flags = LE( 2550 OHCI_TD_IN | OHCI_TD_NOCC | 2551 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2552 if (xfer->flags & USBD_SHORT_XFER_OK) 2553 data->td.td_flags |= LE(OHCI_TD_R); 2554 data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf)); 2555 data->nexttd = tail; 2556 data->td.td_nexttd = LE(tail->physaddr); 2557 data->td.td_be = LE(LE(data->td.td_cbp) + len - 1); 2558 data->len = len; 2559 data->xfer = xfer; 2560 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2561 xfer->hcpriv = data; 2562 2563 #ifdef OHCI_DEBUG 2564 if (ohcidebug > 5) { 2565 DPRINTF(("ohci_device_intr_transfer:\n")); 2566 ohci_dump_ed(sed); 2567 ohci_dump_tds(data); 2568 } 2569 #endif 2570 2571 /* Insert ED in schedule */ 2572 s = splusb(); 2573 ohci_hash_add_td(sc, data); 2574 sed->ed.ed_tailp = LE(tail->physaddr); 2575 opipe->tail.td = tail; 2576 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); 2577 2578 #if 0 2579 /* 2580 * This goes horribly wrong, printing thousands of descriptors, 2581 * because false references are followed due to the fact that the 2582 * TD is gone. 2583 */ 2584 if (ohcidebug > 5) { 2585 usb_delay_ms(&sc->sc_bus, 5); 2586 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2587 OREAD4(sc, OHCI_COMMAND_STATUS))); 2588 ohci_dump_ed(sed); 2589 ohci_dump_tds(data); 2590 } 2591 #endif 2592 splx(s); 2593 2594 return (USBD_IN_PROGRESS); 2595 } 2596 2597 /* Abort a device control request. */ 2598 static void 2599 ohci_device_intr_abort(xfer) 2600 usbd_xfer_handle xfer; 2601 { 2602 if (xfer->pipe->intrxfer == xfer) { 2603 DPRINTF(("ohci_device_intr_abort: remove\n")); 2604 xfer->pipe->intrxfer = NULL; 2605 } 2606 ohci_abort_xfer(xfer, USBD_CANCELLED); 2607 } 2608 2609 /* Close a device interrupt pipe. */ 2610 static void 2611 ohci_device_intr_close(pipe) 2612 usbd_pipe_handle pipe; 2613 { 2614 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2615 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2616 int nslots = opipe->u.intr.nslots; 2617 int pos = opipe->u.intr.pos; 2618 int j; 2619 ohci_soft_ed_t *p, *sed = opipe->sed; 2620 int s; 2621 2622 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2623 pipe, nslots, pos)); 2624 s = splusb(); 2625 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 2626 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 2627 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) 2628 usb_delay_ms(&sc->sc_bus, 2); 2629 2630 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2631 ; 2632 #ifdef DIAGNOSTIC 2633 if (p == NULL) 2634 panic("ohci_device_intr_close: ED not found\n"); 2635 #endif 2636 p->next = sed->next; 2637 p->ed.ed_nexted = sed->ed.ed_nexted; 2638 splx(s); 2639 2640 for (j = 0; j < nslots; j++) 2641 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2642 2643 ohci_free_std(sc, opipe->tail.td); 2644 ohci_free_sed(sc, opipe->sed); 2645 } 2646 2647 static usbd_status 2648 ohci_device_setintr(sc, opipe, ival) 2649 ohci_softc_t *sc; 2650 struct ohci_pipe *opipe; 2651 int ival; 2652 { 2653 int i, j, s, best; 2654 u_int npoll, slow, shigh, nslots; 2655 u_int bestbw, bw; 2656 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2657 2658 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2659 if (ival == 0) { 2660 printf("ohci_setintr: 0 interval\n"); 2661 return (USBD_INVAL); 2662 } 2663 2664 npoll = OHCI_NO_INTRS; 2665 while (npoll > ival) 2666 npoll /= 2; 2667 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2668 2669 /* 2670 * We now know which level in the tree the ED must go into. 2671 * Figure out which slot has most bandwidth left over. 2672 * Slots to examine: 2673 * npoll 2674 * 1 0 2675 * 2 1 2 2676 * 4 3 4 5 6 2677 * 8 7 8 9 10 11 12 13 14 2678 * N (N-1) .. (N-1+N-1) 2679 */ 2680 slow = npoll-1; 2681 shigh = slow + npoll; 2682 nslots = OHCI_NO_INTRS / npoll; 2683 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2684 bw = 0; 2685 for (j = 0; j < nslots; j++) 2686 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 2687 if (bw < bestbw) { 2688 best = i; 2689 bestbw = bw; 2690 } 2691 } 2692 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2693 best, slow, shigh, bestbw)); 2694 2695 s = splusb(); 2696 hsed = sc->sc_eds[best]; 2697 sed->next = hsed->next; 2698 sed->ed.ed_nexted = hsed->ed.ed_nexted; 2699 hsed->next = sed; 2700 hsed->ed.ed_nexted = LE(sed->physaddr); 2701 splx(s); 2702 2703 for (j = 0; j < nslots; j++) 2704 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 2705 opipe->u.intr.nslots = nslots; 2706 opipe->u.intr.pos = best; 2707 2708 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 2709 return (USBD_NORMAL_COMPLETION); 2710 } 2711 2712 /***********************/ 2713 2714 usbd_status 2715 ohci_device_isoc_transfer(xfer) 2716 usbd_xfer_handle xfer; 2717 { 2718 usbd_status err; 2719 2720 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 2721 2722 /* Put it on our queue, */ 2723 err = usb_insert_transfer(xfer); 2724 2725 /* bail out on error, */ 2726 if (err && err != USBD_IN_PROGRESS) 2727 return (err); 2728 2729 /* XXX should check inuse here */ 2730 2731 /* insert into schedule, */ 2732 ohci_device_isoc_enter(xfer); 2733 2734 /* and put on interrupt list if the pipe wasn't running */ 2735 if (!err) 2736 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2737 2738 return (err); 2739 } 2740 2741 void 2742 ohci_device_isoc_enter(xfer) 2743 usbd_xfer_handle xfer; 2744 { 2745 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2746 usbd_device_handle dev = opipe->pipe.device; 2747 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2748 ohci_soft_ed_t *sed = opipe->sed; 2749 struct iso *iso = &opipe->u.iso; 2750 ohci_soft_itd_t *sitd, *nsitd; 2751 ohci_physaddr_t buf, offs; 2752 int i, ncur, nframes; 2753 int ncross; 2754 int s; 2755 2756 s = splusb(); 2757 sitd = opipe->tail.itd; 2758 buf = DMAADDR(&xfer->dmabuf); 2759 sitd->itd.itd_bp0 = LE(buf & OHCI_ITD_PAGE_MASK); 2760 nframes = xfer->nframes; 2761 offs = buf & OHCI_ITD_OFFSET_MASK; 2762 for (i = ncur = 0; i < nframes; i++, ncur++) { 2763 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 2764 ncross > 1) { /* too many page crossings */ 2765 2766 nsitd = ohci_alloc_sitd(sc); 2767 if (nsitd == NULL) { 2768 /* XXX what now? */ 2769 return; 2770 } 2771 sitd->nextitd = nsitd; 2772 sitd->itd.itd_nextitd = LE(nsitd->physaddr); 2773 sitd->itd.itd_flags = LE( 2774 OHCI_ITD_NOCC | 2775 OHCI_ITD_SET_SF(iso->next) | 2776 OHCI_ITD_NOINTR | 2777 OHCI_ITD_SET_FC(OHCI_ITD_NOFFSET)); 2778 sitd->itd.itd_be = LE(LE(sitd->itd.itd_bp0) + offs - 1); 2779 nsitd->itd.itd_bp0 = LE((buf + offs) & OHCI_ITD_PAGE_MASK); 2780 sitd = nsitd; 2781 iso->next = iso->next + ncur; 2782 ncur = 0; 2783 ncross = 0; 2784 } 2785 /* XXX byte order */ 2786 sitd->itd.itd_offset[i] = 2787 offs | (ncross == 1 ? OHCI_ITD_PAGE_SELECT : 0); 2788 offs += xfer->frlengths[i]; 2789 /* XXX update ncross */ 2790 } 2791 nsitd = ohci_alloc_sitd(sc); 2792 if (nsitd == NULL) { 2793 /* XXX what now? */ 2794 return; 2795 } 2796 sitd->nextitd = nsitd; 2797 sitd->itd.itd_nextitd = LE(nsitd->physaddr); 2798 sitd->itd.itd_flags = LE( 2799 OHCI_ITD_NOCC | 2800 OHCI_ITD_SET_SF(iso->next) | 2801 OHCI_ITD_SET_DI(0) | 2802 OHCI_ITD_SET_FC(ncur)); 2803 sitd->itd.itd_be = LE(LE(sitd->itd.itd_bp0) + offs - 1); 2804 iso->next = iso->next + ncur; 2805 2806 opipe->tail.itd = nsitd; 2807 sed->ed.ed_tailp = LE(nsitd->physaddr); 2808 /* XXX update ED */ 2809 splx(s); 2810 } 2811 2812 usbd_status 2813 ohci_device_isoc_start(xfer) 2814 usbd_xfer_handle xfer; 2815 { 2816 printf("ohci_device_isoc_start: not implemented\n"); 2817 return (USBD_INVAL); 2818 } 2819 2820 void 2821 ohci_device_isoc_abort(xfer) 2822 usbd_xfer_handle xfer; 2823 { 2824 } 2825 2826 void 2827 ohci_device_isoc_done(xfer) 2828 usbd_xfer_handle xfer; 2829 { 2830 printf("ohci_device_isoc_done: not implemented\n"); 2831 } 2832 2833 usbd_status 2834 ohci_setup_isoc(pipe) 2835 usbd_pipe_handle pipe; 2836 { 2837 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2838 struct iso *iso = &opipe->u.iso; 2839 2840 iso->next = -1; 2841 iso->inuse = 0; 2842 2843 return (USBD_NORMAL_COMPLETION); 2844 } 2845 2846 void 2847 ohci_device_isoc_close(pipe) 2848 usbd_pipe_handle pipe; 2849 { 2850 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2851 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2852 2853 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 2854 ohci_close_pipe(pipe, sc->sc_isoc_head); 2855 ohci_free_sitd(sc, opipe->tail.itd); 2856 } 2857
Indexes created Wed Sep 24 02:09:48 GMT 2025