ohci.c revision 1.65
1 /* $NetBSD: ohci.c,v 1.65 2000/01/25 12:06:21 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (augustss (at) carlstedt.se) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe 45 * USB spec: http://www.usb.org/developers/data/usb11.pdf 46 */ 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/kernel.h> 53 #include <sys/device.h> 54 #include <sys/select.h> 55 #elif defined(__FreeBSD__) 56 #include <sys/module.h> 57 #include <sys/bus.h> 58 #include <machine/bus_pio.h> 59 #include <machine/bus_memio.h> 60 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 61 #include <machine/cpu.h> 62 #endif 63 #endif 64 #include <sys/proc.h> 65 #include <sys/queue.h> 66 67 #include <machine/bus.h> 68 #include <machine/endian.h> 69 70 #include <dev/usb/usb.h> 71 #include <dev/usb/usbdi.h> 72 #include <dev/usb/usbdivar.h> 73 #include <dev/usb/usb_mem.h> 74 #include <dev/usb/usb_quirks.h> 75 76 #include <dev/usb/ohcireg.h> 77 #include <dev/usb/ohcivar.h> 78 79 #if defined(__FreeBSD__) 80 #include <machine/clock.h> 81 82 #define delay(d) DELAY(d) 83 #endif 84 85 #if defined(__OpenBSD__) 86 struct cfdriver ohci_cd = { 87 NULL, "ohci", DV_DULL 88 }; 89 #endif 90 91 #ifdef OHCI_DEBUG 92 #define DPRINTF(x) if (ohcidebug) logprintf x 93 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 94 int ohcidebug = 0; 95 #else 96 #define DPRINTF(x) 97 #define DPRINTFN(n,x) 98 #endif 99 100 /* 101 * The OHCI controller is little endian, so on big endian machines 102 * the data strored in memory needs to be swapped. 103 */ 104 #if BYTE_ORDER == BIG_ENDIAN 105 #define LE(x) (bswap32(x)) 106 #else 107 #define LE(x) (x) 108 #endif 109 110 struct ohci_pipe; 111 112 static ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *)); 113 static void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *)); 114 115 static ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *)); 116 static void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *)); 117 118 static ohci_soft_itd_t *ohci_alloc_sitd __P((ohci_softc_t *)); 119 static void ohci_free_sitd __P((ohci_softc_t *,ohci_soft_itd_t *)); 120 121 #if 0 122 static void ohci_free_std_chain __P((ohci_softc_t *, 123 ohci_soft_td_t *, ohci_soft_td_t *)); 124 #endif 125 static usbd_status ohci_alloc_std_chain __P((struct ohci_pipe *, 126 ohci_softc_t *, int, int, u_int16_t, usb_dma_t *, 127 ohci_soft_td_t *, ohci_soft_td_t **)); 128 129 static void ohci_shutdown __P((void *v)); 130 static void ohci_power __P((int, void *)); 131 static usbd_status ohci_open __P((usbd_pipe_handle)); 132 static void ohci_poll __P((struct usbd_bus *)); 133 static void ohci_waitintr __P((ohci_softc_t *, 134 usbd_xfer_handle)); 135 static void ohci_rhsc __P((ohci_softc_t *, usbd_xfer_handle)); 136 static void ohci_process_done __P((ohci_softc_t *, 137 ohci_physaddr_t)); 138 139 static usbd_status ohci_device_request __P((usbd_xfer_handle xfer)); 140 static void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 141 static void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 142 static void ohci_hash_add_td __P((ohci_softc_t *, 143 ohci_soft_td_t *)); 144 static void ohci_hash_rem_td __P((ohci_softc_t *, 145 ohci_soft_td_t *)); 146 static ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, 147 ohci_physaddr_t)); 148 149 static usbd_status ohci_setup_isoc __P((usbd_pipe_handle pipe)); 150 static void ohci_device_isoc_enter __P((usbd_xfer_handle)); 151 152 static usbd_status ohci_allocm __P((struct usbd_bus *, usb_dma_t *, 153 u_int32_t)); 154 static void ohci_freem __P((struct usbd_bus *, usb_dma_t *)); 155 156 static usbd_xfer_handle ohci_allocx __P((struct usbd_bus *)); 157 static void ohci_freex __P((struct usbd_bus *, usbd_xfer_handle)); 158 159 static usbd_status ohci_root_ctrl_transfer __P((usbd_xfer_handle)); 160 static usbd_status ohci_root_ctrl_start __P((usbd_xfer_handle)); 161 static void ohci_root_ctrl_abort __P((usbd_xfer_handle)); 162 static void ohci_root_ctrl_close __P((usbd_pipe_handle)); 163 static void ohci_root_ctrl_done __P((usbd_xfer_handle)); 164 165 static usbd_status ohci_root_intr_transfer __P((usbd_xfer_handle)); 166 static usbd_status ohci_root_intr_start __P((usbd_xfer_handle)); 167 static void ohci_root_intr_abort __P((usbd_xfer_handle)); 168 static void ohci_root_intr_close __P((usbd_pipe_handle)); 169 static void ohci_root_intr_done __P((usbd_xfer_handle)); 170 171 static usbd_status ohci_device_ctrl_transfer __P((usbd_xfer_handle)); 172 static usbd_status ohci_device_ctrl_start __P((usbd_xfer_handle)); 173 static void ohci_device_ctrl_abort __P((usbd_xfer_handle)); 174 static void ohci_device_ctrl_close __P((usbd_pipe_handle)); 175 static void ohci_device_ctrl_done __P((usbd_xfer_handle)); 176 177 static usbd_status ohci_device_bulk_transfer __P((usbd_xfer_handle)); 178 static usbd_status ohci_device_bulk_start __P((usbd_xfer_handle)); 179 static void ohci_device_bulk_abort __P((usbd_xfer_handle)); 180 static void ohci_device_bulk_close __P((usbd_pipe_handle)); 181 static void ohci_device_bulk_done __P((usbd_xfer_handle)); 182 183 static usbd_status ohci_device_intr_transfer __P((usbd_xfer_handle)); 184 static usbd_status ohci_device_intr_start __P((usbd_xfer_handle)); 185 static void ohci_device_intr_abort __P((usbd_xfer_handle)); 186 static void ohci_device_intr_close __P((usbd_pipe_handle)); 187 static void ohci_device_intr_done __P((usbd_xfer_handle)); 188 189 static usbd_status ohci_device_isoc_transfer __P((usbd_xfer_handle)); 190 static usbd_status ohci_device_isoc_start __P((usbd_xfer_handle)); 191 static void ohci_device_isoc_abort __P((usbd_xfer_handle)); 192 static void ohci_device_isoc_close __P((usbd_pipe_handle)); 193 static void ohci_device_isoc_done __P((usbd_xfer_handle)); 194 195 static usbd_status ohci_device_setintr __P((ohci_softc_t *sc, 196 struct ohci_pipe *pipe, int ival)); 197 198 static int ohci_str __P((usb_string_descriptor_t *, int, char *)); 199 200 static void ohci_timeout __P((void *)); 201 static void ohci_rhsc_able __P((ohci_softc_t *, int)); 202 203 static void ohci_close_pipe __P((usbd_pipe_handle pipe, 204 ohci_soft_ed_t *head)); 205 static void ohci_abort_xfer __P((usbd_xfer_handle xfer, 206 usbd_status status)); 207 static void ohci_abort_xfer_end __P((void *)); 208 209 static void ohci_device_clear_toggle __P((usbd_pipe_handle pipe)); 210 static void ohci_noop __P((usbd_pipe_handle pipe)); 211 212 #ifdef OHCI_DEBUG 213 static void ohci_dumpregs __P((ohci_softc_t *)); 214 static void ohci_dump_tds __P((ohci_soft_td_t *)); 215 static void ohci_dump_td __P((ohci_soft_td_t *)); 216 static void ohci_dump_ed __P((ohci_soft_ed_t *)); 217 #endif 218 219 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 220 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 221 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 222 223 /* Reverse the bits in a value 0 .. 31 */ 224 static u_int8_t revbits[OHCI_NO_INTRS] = 225 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 226 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 227 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 228 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 229 230 struct ohci_pipe { 231 struct usbd_pipe pipe; 232 ohci_soft_ed_t *sed; 233 union { 234 ohci_soft_td_t *td; 235 ohci_soft_itd_t *itd; 236 } tail; 237 /* Info needed for different pipe kinds. */ 238 union { 239 /* Control pipe */ 240 struct { 241 usb_dma_t reqdma; 242 u_int length; 243 ohci_soft_td_t *setup, *data, *stat; 244 } ctl; 245 /* Interrupt pipe */ 246 struct { 247 int nslots; 248 int pos; 249 } intr; 250 /* Bulk pipe */ 251 struct { 252 u_int length; 253 int isread; 254 } bulk; 255 /* Iso pipe */ 256 struct iso { 257 int next, inuse; 258 } iso; 259 } u; 260 }; 261 262 #define OHCI_INTR_ENDPT 1 263 264 static struct usbd_bus_methods ohci_bus_methods = { 265 ohci_open, 266 ohci_poll, 267 ohci_allocm, 268 ohci_freem, 269 ohci_allocx, 270 ohci_freex, 271 }; 272 273 static struct usbd_pipe_methods ohci_root_ctrl_methods = { 274 ohci_root_ctrl_transfer, 275 ohci_root_ctrl_start, 276 ohci_root_ctrl_abort, 277 ohci_root_ctrl_close, 278 ohci_noop, 279 ohci_root_ctrl_done, 280 }; 281 282 static struct usbd_pipe_methods ohci_root_intr_methods = { 283 ohci_root_intr_transfer, 284 ohci_root_intr_start, 285 ohci_root_intr_abort, 286 ohci_root_intr_close, 287 ohci_noop, 288 ohci_root_intr_done, 289 }; 290 291 static struct usbd_pipe_methods ohci_device_ctrl_methods = { 292 ohci_device_ctrl_transfer, 293 ohci_device_ctrl_start, 294 ohci_device_ctrl_abort, 295 ohci_device_ctrl_close, 296 ohci_noop, 297 ohci_device_ctrl_done, 298 }; 299 300 static struct usbd_pipe_methods ohci_device_intr_methods = { 301 ohci_device_intr_transfer, 302 ohci_device_intr_start, 303 ohci_device_intr_abort, 304 ohci_device_intr_close, 305 ohci_device_clear_toggle, 306 ohci_device_intr_done, 307 }; 308 309 static struct usbd_pipe_methods ohci_device_bulk_methods = { 310 ohci_device_bulk_transfer, 311 ohci_device_bulk_start, 312 ohci_device_bulk_abort, 313 ohci_device_bulk_close, 314 ohci_device_clear_toggle, 315 ohci_device_bulk_done, 316 }; 317 318 static struct usbd_pipe_methods ohci_device_isoc_methods = { 319 ohci_device_isoc_transfer, 320 ohci_device_isoc_start, 321 ohci_device_isoc_abort, 322 ohci_device_isoc_close, 323 ohci_noop, 324 ohci_device_isoc_done, 325 }; 326 327 #if defined(__NetBSD__) || defined(__OpenBSD__) 328 int 329 ohci_activate(self, act) 330 device_ptr_t self; 331 enum devact act; 332 { 333 struct ohci_softc *sc = (struct ohci_softc *)self; 334 int rv = 0; 335 336 switch (act) { 337 case DVACT_ACTIVATE: 338 return (EOPNOTSUPP); 339 break; 340 341 case DVACT_DEACTIVATE: 342 if (sc->sc_child != NULL) 343 rv = config_deactivate(sc->sc_child); 344 break; 345 } 346 return (rv); 347 } 348 349 int 350 ohci_detach(sc, flags) 351 struct ohci_softc *sc; 352 int flags; 353 { 354 int rv = 0; 355 356 if (sc->sc_child != NULL) 357 rv = config_detach(sc->sc_child, flags); 358 359 if (rv != 0) 360 return (rv); 361 362 powerhook_disestablish(sc->sc_powerhook); 363 shutdownhook_disestablish(sc->sc_shutdownhook); 364 365 /* free data structures XXX */ 366 367 return (rv); 368 } 369 #endif 370 371 ohci_soft_ed_t * 372 ohci_alloc_sed(sc) 373 ohci_softc_t *sc; 374 { 375 ohci_soft_ed_t *sed; 376 usbd_status err; 377 int i, offs; 378 usb_dma_t dma; 379 380 if (sc->sc_freeeds == NULL) { 381 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 382 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 383 OHCI_ED_ALIGN, &dma); 384 if (err) 385 return (0); 386 for(i = 0; i < OHCI_SED_CHUNK; i++) { 387 offs = i * OHCI_SED_SIZE; 388 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 389 sed->physaddr = DMAADDR(&dma) + offs; 390 sed->next = sc->sc_freeeds; 391 sc->sc_freeeds = sed; 392 } 393 } 394 sed = sc->sc_freeeds; 395 sc->sc_freeeds = sed->next; 396 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 397 sed->next = 0; 398 return (sed); 399 } 400 401 void 402 ohci_free_sed(sc, sed) 403 ohci_softc_t *sc; 404 ohci_soft_ed_t *sed; 405 { 406 sed->next = sc->sc_freeeds; 407 sc->sc_freeeds = sed; 408 } 409 410 ohci_soft_td_t * 411 ohci_alloc_std(sc) 412 ohci_softc_t *sc; 413 { 414 ohci_soft_td_t *std; 415 usbd_status err; 416 int i, offs; 417 usb_dma_t dma; 418 419 if (sc->sc_freetds == NULL) { 420 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 421 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 422 OHCI_TD_ALIGN, &dma); 423 if (err) 424 return (0); 425 for(i = 0; i < OHCI_STD_CHUNK; i++) { 426 offs = i * OHCI_STD_SIZE; 427 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 428 std->physaddr = DMAADDR(&dma) + offs; 429 std->nexttd = sc->sc_freetds; 430 sc->sc_freetds = std; 431 } 432 } 433 std = sc->sc_freetds; 434 sc->sc_freetds = std->nexttd; 435 memset(&std->td, 0, sizeof(ohci_td_t)); 436 std->nexttd = 0; 437 return (std); 438 } 439 440 void 441 ohci_free_std(sc, std) 442 ohci_softc_t *sc; 443 ohci_soft_td_t *std; 444 { 445 std->nexttd = sc->sc_freetds; 446 sc->sc_freetds = std; 447 } 448 449 usbd_status 450 ohci_alloc_std_chain(opipe, sc, len, rd, flags, dma, sp, ep) 451 struct ohci_pipe *opipe; 452 ohci_softc_t *sc; 453 int len, rd; 454 u_int16_t flags; 455 usb_dma_t *dma; 456 ohci_soft_td_t *sp, **ep; 457 { 458 ohci_soft_td_t *next, *cur; 459 ohci_physaddr_t dataphys, dataphysend; 460 u_int32_t intr, tdflags; 461 int curlen; 462 463 DPRINTFN(len < 4096,("ohci_alloc_std_chain: start len=%d\n", len)); 464 cur = sp; 465 dataphys = DMAADDR(dma); 466 dataphysend = OHCI_PAGE(dataphys + len - 1); 467 tdflags = 468 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 469 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | 470 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0); 471 472 for (;;) { 473 next = ohci_alloc_std(sc); 474 if (next == 0) 475 goto nomem; 476 477 /* The OHCI hardware can handle at most one page crossing. */ 478 if (OHCI_PAGE(dataphys) == dataphysend || 479 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 480 /* we can handle it in this TD */ 481 curlen = len; 482 } else { 483 /* must use multiple TDs, fill as much as possible. */ 484 curlen = 2 * OHCI_PAGE_SIZE - 485 (dataphys & (OHCI_PAGE_SIZE-1)); 486 } 487 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 488 "dataphysend=0x%08x len=%d curlen=%d\n", 489 dataphys, dataphysend, 490 len, curlen)); 491 len -= curlen; 492 493 intr = len == 0 ? OHCI_TD_SET_DI(1) : OHCI_TD_NOINTR; 494 cur->td.td_flags = LE(tdflags | intr); 495 cur->td.td_cbp = LE(dataphys); 496 cur->nexttd = next; 497 cur->td.td_nexttd = LE(next->physaddr); 498 cur->td.td_be = LE(dataphys + curlen - 1); 499 cur->len = curlen; 500 cur->flags = OHCI_ADD_LEN; 501 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 502 dataphys, dataphys + curlen - 1)); 503 if (len == 0) 504 break; 505 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 506 dataphys += curlen; 507 cur = next; 508 } 509 if ((flags & USBD_FORCE_SHORT_XFER) && 510 len % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 511 /* Force a 0 length transfer at the end. */ 512 next = ohci_alloc_std(sc); 513 if (next == 0) 514 goto nomem; 515 516 cur->td.td_flags = LE(tdflags | OHCI_TD_SET_DI(1)); 517 cur->td.td_cbp = 0; /* indicate 0 length packet */ 518 cur->nexttd = next; 519 cur->td.td_nexttd = LE(next->physaddr); 520 cur->td.td_be = LE(dataphys - 1); 521 cur->len = 0; 522 cur->flags = 0; 523 cur = next; 524 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 525 } 526 cur->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 527 *ep = next; 528 529 return (USBD_NORMAL_COMPLETION); 530 531 nomem: 532 /* XXX free chain */ 533 return (USBD_NOMEM); 534 } 535 536 #if 0 537 static void 538 ohci_free_std_chain(sc, std, stdend) 539 ohci_softc_t *sc; 540 ohci_soft_td_t *std; 541 ohci_soft_td_t *stdend; 542 { 543 ohci_soft_td_t *p; 544 545 for (; std != stdend; std = p) { 546 p = std->nexttd; 547 ohci_free_std(sc, std); 548 } 549 } 550 #endif 551 552 ohci_soft_itd_t * 553 ohci_alloc_sitd(sc) 554 ohci_softc_t *sc; 555 { 556 ohci_soft_itd_t *sitd; 557 usbd_status err; 558 int i, offs; 559 usb_dma_t dma; 560 561 if (sc->sc_freeitds == NULL) { 562 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 563 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 564 OHCI_TD_ALIGN, &dma); 565 if (err) 566 return (0); 567 for(i = 0; i < OHCI_STD_CHUNK; i++) { 568 offs = i * OHCI_STD_SIZE; 569 sitd = (ohci_soft_itd_t *)((char*)KERNADDR(&dma)+offs); 570 sitd->physaddr = DMAADDR(&dma) + offs; 571 sitd->nextitd = sc->sc_freeitds; 572 sc->sc_freeitds = sitd; 573 } 574 } 575 sitd = sc->sc_freeitds; 576 sc->sc_freeitds = sitd->nextitd; 577 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 578 sitd->nextitd = 0; 579 return (sitd); 580 } 581 582 void 583 ohci_free_sitd(sc, sitd) 584 ohci_softc_t *sc; 585 ohci_soft_itd_t *sitd; 586 { 587 sitd->nextitd = sc->sc_freeitds; 588 sc->sc_freeitds = sitd; 589 } 590 591 usbd_status 592 ohci_init(sc) 593 ohci_softc_t *sc; 594 { 595 ohci_soft_ed_t *sed, *psed; 596 usbd_status err; 597 int i; 598 u_int32_t s, ctl, ival, hcr, fm, per, rev; 599 600 DPRINTF(("ohci_init: start\n")); 601 #if defined(__OpenBSD__) 602 printf(","); 603 #else 604 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 605 #endif 606 rev = OREAD4(sc, OHCI_REVISION); 607 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 608 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 609 610 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 611 printf("%s: unsupported OHCI revision\n", 612 USBDEVNAME(sc->sc_bus.bdev)); 613 sc->sc_bus.usbrev = USBREV_UNKNOWN; 614 return (USBD_INVAL); 615 } 616 sc->sc_bus.usbrev = USBREV_1_0; 617 618 for (i = 0; i < OHCI_HASH_SIZE; i++) 619 LIST_INIT(&sc->sc_hash_tds[i]); 620 621 SIMPLEQ_INIT(&sc->sc_free_xfers); 622 623 /* Allocate the HCCA area. */ 624 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 625 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 626 if (err) 627 return (err); 628 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 629 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 630 631 sc->sc_eintrs = OHCI_NORMAL_INTRS; 632 633 /* Allocate dummy ED that starts the control list. */ 634 sc->sc_ctrl_head = ohci_alloc_sed(sc); 635 if (sc->sc_ctrl_head == NULL) { 636 err = USBD_NOMEM; 637 goto bad1; 638 } 639 sc->sc_ctrl_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 640 641 /* Allocate dummy ED that starts the bulk list. */ 642 sc->sc_bulk_head = ohci_alloc_sed(sc); 643 if (sc->sc_bulk_head == NULL) { 644 err = USBD_NOMEM; 645 goto bad2; 646 } 647 sc->sc_bulk_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 648 649 /* Allocate dummy ED that starts the isochronous list. */ 650 sc->sc_isoc_head = ohci_alloc_sed(sc); 651 if (sc->sc_isoc_head == NULL) { 652 err = USBD_NOMEM; 653 goto bad3; 654 } 655 sc->sc_isoc_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 656 657 /* Allocate all the dummy EDs that make up the interrupt tree. */ 658 for (i = 0; i < OHCI_NO_EDS; i++) { 659 sed = ohci_alloc_sed(sc); 660 if (sed == NULL) { 661 while (--i >= 0) 662 ohci_free_sed(sc, sc->sc_eds[i]); 663 err = USBD_NOMEM; 664 goto bad4; 665 } 666 /* All ED fields are set to 0. */ 667 sc->sc_eds[i] = sed; 668 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 669 if (i != 0) 670 psed = sc->sc_eds[(i-1) / 2]; 671 else 672 psed= sc->sc_isoc_head; 673 sed->next = psed; 674 sed->ed.ed_nexted = LE(psed->physaddr); 675 } 676 /* 677 * Fill HCCA interrupt table. The bit reversal is to get 678 * the tree set up properly to spread the interrupts. 679 */ 680 for (i = 0; i < OHCI_NO_INTRS; i++) 681 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 682 LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 683 684 /* Determine in what context we are running. */ 685 ctl = OREAD4(sc, OHCI_CONTROL); 686 if (ctl & OHCI_IR) { 687 /* SMM active, request change */ 688 DPRINTF(("ohci_init: SMM active, request owner change\n")); 689 s = OREAD4(sc, OHCI_COMMAND_STATUS); 690 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 691 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 692 usb_delay_ms(&sc->sc_bus, 1); 693 ctl = OREAD4(sc, OHCI_CONTROL); 694 } 695 if ((ctl & OHCI_IR) == 0) { 696 printf("%s: SMM does not respond, resetting\n", 697 USBDEVNAME(sc->sc_bus.bdev)); 698 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 699 goto reset; 700 } 701 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 702 /* BIOS started controller. */ 703 DPRINTF(("ohci_init: BIOS active\n")); 704 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 705 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 706 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 707 } 708 } else { 709 DPRINTF(("ohci_init: cold started\n")); 710 reset: 711 /* Controller was cold started. */ 712 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 713 } 714 715 /* 716 * This reset should not be necessary according to the OHCI spec, but 717 * without it some controllers do not start. 718 */ 719 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 720 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 721 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 722 723 /* We now own the host controller and the bus has been reset. */ 724 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 725 726 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 727 /* Nominal time for a reset is 10 us. */ 728 for (i = 0; i < 10; i++) { 729 delay(10); 730 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 731 if (!hcr) 732 break; 733 } 734 if (hcr) { 735 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 736 err = USBD_IOERROR; 737 goto bad5; 738 } 739 #ifdef OHCI_DEBUG 740 if (ohcidebug > 15) 741 ohci_dumpregs(sc); 742 #endif 743 744 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 745 746 /* Set up HC registers. */ 747 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 748 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 749 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 750 /* disable all interrupts and then switch on all desired interrupts */ 751 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 752 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 753 /* switch on desired functional features */ 754 ctl = OREAD4(sc, OHCI_CONTROL); 755 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 756 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 757 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 758 /* And finally start it! */ 759 OWRITE4(sc, OHCI_CONTROL, ctl); 760 761 /* 762 * The controller is now OPERATIONAL. Set a some final 763 * registers that should be set earlier, but that the 764 * controller ignores when in the SUSPEND state. 765 */ 766 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 767 fm |= OHCI_FSMPS(ival) | ival; 768 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 769 per = OHCI_PERIODIC(ival); /* 90% periodic */ 770 OWRITE4(sc, OHCI_PERIODIC_START, per); 771 772 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 773 774 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 775 776 #ifdef OHCI_DEBUG 777 if (ohcidebug > 5) 778 ohci_dumpregs(sc); 779 #endif 780 781 /* Set up the bus struct. */ 782 sc->sc_bus.methods = &ohci_bus_methods; 783 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 784 785 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 786 787 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 788 789 return (USBD_NORMAL_COMPLETION); 790 791 bad5: 792 for (i = 0; i < OHCI_NO_EDS; i++) 793 ohci_free_sed(sc, sc->sc_eds[i]); 794 bad4: 795 ohci_free_sed(sc, sc->sc_isoc_head); 796 bad3: 797 ohci_free_sed(sc, sc->sc_ctrl_head); 798 bad2: 799 ohci_free_sed(sc, sc->sc_bulk_head); 800 bad1: 801 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 802 return (err); 803 } 804 805 usbd_status 806 ohci_allocm(bus, dma, size) 807 struct usbd_bus *bus; 808 usb_dma_t *dma; 809 u_int32_t size; 810 { 811 #if defined(__NetBSD__) || defined(__OpenBSD__) 812 struct ohci_softc *sc = (struct ohci_softc *)bus; 813 #endif 814 815 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 816 } 817 818 void 819 ohci_freem(bus, dma) 820 struct usbd_bus *bus; 821 usb_dma_t *dma; 822 { 823 #if defined(__NetBSD__) || defined(__OpenBSD__) 824 struct ohci_softc *sc = (struct ohci_softc *)bus; 825 #endif 826 827 usb_freemem(&sc->sc_bus, dma); 828 } 829 830 usbd_xfer_handle 831 ohci_allocx(bus) 832 struct usbd_bus *bus; 833 { 834 struct ohci_softc *sc = (struct ohci_softc *)bus; 835 usbd_xfer_handle xfer; 836 837 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 838 if (xfer != NULL) 839 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 840 else 841 xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT); 842 if (xfer != NULL) 843 memset(xfer, 0, sizeof *xfer); 844 return (xfer); 845 } 846 847 void 848 ohci_freex(bus, xfer) 849 struct usbd_bus *bus; 850 usbd_xfer_handle xfer; 851 { 852 struct ohci_softc *sc = (struct ohci_softc *)bus; 853 854 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 855 } 856 857 /* 858 * Shut down the controller when the system is going down. 859 */ 860 void 861 ohci_shutdown(v) 862 void *v; 863 { 864 ohci_softc_t *sc = v; 865 866 DPRINTF(("ohci_shutdown: stopping the HC\n")); 867 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 868 } 869 870 /* 871 * Handle suspend/resume. 872 * 873 * We need to switch to polling mode here, because this routine is 874 * called from an intterupt context. This is all right since we 875 * are almost suspended anyway. 876 */ 877 void 878 ohci_power(why, v) 879 int why; 880 void *v; 881 { 882 #ifdef OHCI_DEBUG 883 ohci_softc_t *sc = v; 884 885 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 886 /* XXX should suspend/resume */ 887 ohci_dumpregs(sc); 888 #endif 889 } 890 891 #ifdef OHCI_DEBUG 892 void 893 ohci_dumpregs(sc) 894 ohci_softc_t *sc; 895 { 896 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 897 OREAD4(sc, OHCI_REVISION), 898 OREAD4(sc, OHCI_CONTROL), 899 OREAD4(sc, OHCI_COMMAND_STATUS))); 900 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 901 OREAD4(sc, OHCI_INTERRUPT_STATUS), 902 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 903 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 904 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 905 OREAD4(sc, OHCI_HCCA), 906 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 907 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 908 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 909 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 910 OREAD4(sc, OHCI_BULK_HEAD_ED), 911 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 912 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 913 OREAD4(sc, OHCI_DONE_HEAD), 914 OREAD4(sc, OHCI_FM_INTERVAL), 915 OREAD4(sc, OHCI_FM_REMAINING))); 916 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 917 OREAD4(sc, OHCI_FM_NUMBER), 918 OREAD4(sc, OHCI_PERIODIC_START), 919 OREAD4(sc, OHCI_LS_THRESHOLD))); 920 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 921 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 922 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 923 OREAD4(sc, OHCI_RH_STATUS))); 924 DPRINTF((" port1=0x%08x port2=0x%08x\n", 925 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 926 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 927 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 928 LE(sc->sc_hcca->hcca_frame_number), 929 LE(sc->sc_hcca->hcca_done_head))); 930 } 931 #endif 932 933 static int ohci_intr1 __P((ohci_softc_t *)); 934 935 int 936 ohci_intr(p) 937 void *p; 938 { 939 ohci_softc_t *sc = p; 940 941 /* If we get an interrupt while polling, then just ignore it. */ 942 if (sc->sc_bus.use_polling) { 943 #ifdef DIAGNOSTIC 944 printf("ohci_intr: ignored interrupt while polling\n"); 945 #endif 946 return (0); 947 } 948 949 return (ohci_intr1(sc)); 950 } 951 952 static int 953 ohci_intr1(sc) 954 ohci_softc_t *sc; 955 { 956 u_int32_t intrs, eintrs; 957 ohci_physaddr_t done; 958 959 /* In case the interrupt occurs before initialization has completed. */ 960 if (sc == NULL || sc->sc_hcca == NULL) { 961 #ifdef DIAGNOSTIC 962 printf("ohci_intr: sc->sc_hcca == NULL\n"); 963 #endif 964 return (0); 965 } 966 967 intrs = 0; 968 done = LE(sc->sc_hcca->hcca_done_head); 969 if (done != 0) { 970 sc->sc_hcca->hcca_done_head = 0; 971 if (done & ~OHCI_DONE_INTRS) 972 intrs = OHCI_WDH; 973 if (done & OHCI_DONE_INTRS) 974 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 975 } else 976 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 977 978 if (!intrs) 979 return (0); 980 981 intrs &= ~OHCI_MIE; 982 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 983 eintrs = intrs & sc->sc_eintrs; 984 if (!eintrs) 985 return (0); 986 987 sc->sc_bus.intr_context++; 988 sc->sc_bus.no_intrs++; 989 DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n", 990 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 991 (u_int)eintrs)); 992 993 if (eintrs & OHCI_SO) { 994 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev)); 995 /* XXX do what */ 996 intrs &= ~OHCI_SO; 997 } 998 if (eintrs & OHCI_WDH) { 999 ohci_process_done(sc, done &~ OHCI_DONE_INTRS); 1000 intrs &= ~OHCI_WDH; 1001 } 1002 if (eintrs & OHCI_RD) { 1003 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1004 /* XXX process resume detect */ 1005 } 1006 if (eintrs & OHCI_UE) { 1007 printf("%s: unrecoverable error, controller halted\n", 1008 USBDEVNAME(sc->sc_bus.bdev)); 1009 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1010 /* XXX what else */ 1011 } 1012 if (eintrs & OHCI_RHSC) { 1013 ohci_rhsc(sc, sc->sc_intrxfer); 1014 intrs &= ~OHCI_RHSC; 1015 1016 /* 1017 * Disable RHSC interrupt for now, because it will be 1018 * on until the port has been reset. 1019 */ 1020 ohci_rhsc_able(sc, 0); 1021 } 1022 1023 sc->sc_bus.intr_context--; 1024 1025 /* Block unprocessed interrupts. XXX */ 1026 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 1027 sc->sc_eintrs &= ~intrs; 1028 1029 return (1); 1030 } 1031 1032 void 1033 ohci_rhsc_able(sc, on) 1034 ohci_softc_t *sc; 1035 int on; 1036 { 1037 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1038 if (on) { 1039 sc->sc_eintrs |= OHCI_RHSC; 1040 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1041 } else { 1042 sc->sc_eintrs &= ~OHCI_RHSC; 1043 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1044 } 1045 } 1046 1047 #ifdef OHCI_DEBUG 1048 char *ohci_cc_strs[] = { 1049 "NO_ERROR", 1050 "CRC", 1051 "BIT_STUFFING", 1052 "DATA_TOGGLE_MISMATCH", 1053 "STALL", 1054 "DEVICE_NOT_RESPONDING", 1055 "PID_CHECK_FAILURE", 1056 "UNEXPECTED_PID", 1057 "DATA_OVERRUN", 1058 "DATA_UNDERRUN", 1059 "BUFFER_OVERRUN", 1060 "BUFFER_UNDERRUN", 1061 "NOT_ACCESSED", 1062 }; 1063 #endif 1064 1065 void 1066 ohci_process_done(sc, done) 1067 ohci_softc_t *sc; 1068 ohci_physaddr_t done; 1069 { 1070 ohci_soft_td_t *std, *sdone, *stdnext; 1071 usbd_xfer_handle xfer; 1072 int len, cc; 1073 1074 DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done)); 1075 1076 /* Reverse the done list. */ 1077 for (sdone = 0; done; done = LE(std->td.td_nexttd)) { 1078 std = ohci_hash_find_td(sc, done); 1079 std->dnext = sdone; 1080 sdone = std; 1081 } 1082 1083 #ifdef OHCI_DEBUG 1084 if (ohcidebug > 10) { 1085 DPRINTF(("ohci_process_done: TD done:\n")); 1086 ohci_dump_tds(sdone); 1087 } 1088 #endif 1089 1090 for (std = sdone; std; std = stdnext) { 1091 xfer = std->xfer; 1092 stdnext = std->dnext; 1093 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1094 std, xfer, xfer->hcpriv)); 1095 cc = OHCI_TD_GET_CC(LE(std->td.td_flags)); 1096 usb_untimeout(ohci_timeout, xfer, xfer->timo_handle); 1097 if (xfer->status == USBD_CANCELLED || 1098 xfer->status == USBD_TIMEOUT) { 1099 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1100 xfer)); 1101 /* Handled by abort routine. */ 1102 } else if (cc == OHCI_CC_NO_ERROR) { 1103 len = std->len; 1104 if (std->td.td_cbp != 0) 1105 len -= LE(std->td.td_be) - 1106 LE(std->td.td_cbp) + 1; 1107 if (std->flags & OHCI_ADD_LEN) 1108 xfer->actlen += len; 1109 if (std->flags & OHCI_CALL_DONE) { 1110 xfer->status = USBD_NORMAL_COMPLETION; 1111 usb_transfer_complete(xfer); 1112 } 1113 ohci_hash_rem_td(sc, std); 1114 ohci_free_std(sc, std); 1115 } else { 1116 /* 1117 * Endpoint is halted. First unlink all the TDs 1118 * belonging to the failed transfer, and then restart 1119 * the endpoint. 1120 */ 1121 ohci_soft_td_t *p, *n; 1122 struct ohci_pipe *opipe = 1123 (struct ohci_pipe *)xfer->pipe; 1124 1125 DPRINTF(("ohci_process_done: error cc=%d (%s)\n", 1126 OHCI_TD_GET_CC(LE(std->td.td_flags)), 1127 ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td.td_flags))])); 1128 1129 /* remove TDs */ 1130 for (p = std; p->xfer == xfer; p = n) { 1131 n = p->nexttd; 1132 ohci_hash_rem_td(sc, p); 1133 ohci_free_std(sc, p); 1134 } 1135 1136 /* clear halt */ 1137 opipe->sed->ed.ed_headp = LE(p->physaddr); 1138 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1139 1140 if (cc == OHCI_CC_STALL) 1141 xfer->status = USBD_STALLED; 1142 else 1143 xfer->status = USBD_IOERROR; 1144 usb_transfer_complete(xfer); 1145 } 1146 } 1147 } 1148 1149 void 1150 ohci_device_ctrl_done(xfer) 1151 usbd_xfer_handle xfer; 1152 { 1153 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1154 1155 #ifdef DIAGNOSTIC 1156 if (!(xfer->rqflags & URQ_REQUEST)) { 1157 panic("ohci_ctrl_done: not a request\n"); 1158 } 1159 #endif 1160 xfer->hcpriv = NULL; 1161 } 1162 1163 void 1164 ohci_device_intr_done(xfer) 1165 usbd_xfer_handle xfer; 1166 { 1167 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1168 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1169 ohci_soft_ed_t *sed = opipe->sed; 1170 ohci_soft_td_t *data, *tail; 1171 1172 1173 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1174 xfer, xfer->actlen)); 1175 1176 xfer->hcpriv = NULL; 1177 1178 if (xfer->pipe->repeat) { 1179 data = opipe->tail.td; 1180 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1181 if (tail == NULL) { 1182 xfer->status = USBD_NOMEM; 1183 return; 1184 } 1185 tail->xfer = NULL; 1186 1187 data->td.td_flags = LE( 1188 OHCI_TD_IN | OHCI_TD_NOCC | 1189 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1190 if (xfer->flags & USBD_SHORT_XFER_OK) 1191 data->td.td_flags |= LE(OHCI_TD_R); 1192 data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf)); 1193 data->nexttd = tail; 1194 data->td.td_nexttd = LE(tail->physaddr); 1195 data->td.td_be = LE(LE(data->td.td_cbp) + xfer->length - 1); 1196 data->len = xfer->length; 1197 data->xfer = xfer; 1198 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1199 xfer->hcpriv = data; 1200 xfer->actlen = 0; 1201 1202 ohci_hash_add_td(sc, data); 1203 sed->ed.ed_tailp = LE(tail->physaddr); 1204 opipe->tail.td = tail; 1205 } 1206 } 1207 1208 void 1209 ohci_device_bulk_done(xfer) 1210 usbd_xfer_handle xfer; 1211 { 1212 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1213 xfer, xfer->actlen)); 1214 1215 xfer->hcpriv = NULL; 1216 } 1217 1218 void 1219 ohci_rhsc(sc, xfer) 1220 ohci_softc_t *sc; 1221 usbd_xfer_handle xfer; 1222 { 1223 usbd_pipe_handle pipe; 1224 struct ohci_pipe *opipe; 1225 u_char *p; 1226 int i, m; 1227 int hstatus; 1228 1229 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1230 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1231 sc, xfer, hstatus)); 1232 1233 if (xfer == NULL) { 1234 /* Just ignore the change. */ 1235 return; 1236 } 1237 1238 pipe = xfer->pipe; 1239 opipe = (struct ohci_pipe *)pipe; 1240 1241 p = KERNADDR(&xfer->dmabuf); 1242 m = min(sc->sc_noport, xfer->length * 8 - 1); 1243 memset(p, 0, xfer->length); 1244 for (i = 1; i <= m; i++) { 1245 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1246 p[i/8] |= 1 << (i%8); 1247 } 1248 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1249 xfer->actlen = xfer->length; 1250 xfer->status = USBD_NORMAL_COMPLETION; 1251 1252 usb_transfer_complete(xfer); 1253 } 1254 1255 void 1256 ohci_root_intr_done(xfer) 1257 usbd_xfer_handle xfer; 1258 { 1259 xfer->hcpriv = NULL; 1260 } 1261 1262 void 1263 ohci_root_ctrl_done(xfer) 1264 usbd_xfer_handle xfer; 1265 { 1266 xfer->hcpriv = NULL; 1267 } 1268 1269 /* 1270 * Wait here until controller claims to have an interrupt. 1271 * Then call ohci_intr and return. Use timeout to avoid waiting 1272 * too long. 1273 */ 1274 void 1275 ohci_waitintr(sc, xfer) 1276 ohci_softc_t *sc; 1277 usbd_xfer_handle xfer; 1278 { 1279 int timo = xfer->timeout; 1280 int usecs; 1281 u_int32_t intrs; 1282 1283 xfer->status = USBD_IN_PROGRESS; 1284 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1285 usb_delay_ms(&sc->sc_bus, 1); 1286 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1287 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1288 #ifdef OHCI_DEBUG 1289 if (ohcidebug > 15) 1290 ohci_dumpregs(sc); 1291 #endif 1292 if (intrs) { 1293 ohci_intr1(sc); 1294 if (xfer->status != USBD_IN_PROGRESS) 1295 return; 1296 } 1297 } 1298 1299 /* Timeout */ 1300 DPRINTF(("ohci_waitintr: timeout\n")); 1301 xfer->status = USBD_TIMEOUT; 1302 usb_transfer_complete(xfer); 1303 /* XXX should free TD */ 1304 } 1305 1306 void 1307 ohci_poll(bus) 1308 struct usbd_bus *bus; 1309 { 1310 ohci_softc_t *sc = (ohci_softc_t *)bus; 1311 1312 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1313 ohci_intr1(sc); 1314 } 1315 1316 usbd_status 1317 ohci_device_request(xfer) 1318 usbd_xfer_handle xfer; 1319 { 1320 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1321 usb_device_request_t *req = &xfer->request; 1322 usbd_device_handle dev = opipe->pipe.device; 1323 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1324 int addr = dev->address; 1325 ohci_soft_td_t *setup, *data = 0, *stat, *next, *tail; 1326 ohci_soft_ed_t *sed; 1327 int isread; 1328 int len; 1329 usbd_status err; 1330 int s; 1331 1332 isread = req->bmRequestType & UT_READ; 1333 len = UGETW(req->wLength); 1334 1335 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1336 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1337 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1338 UGETW(req->wIndex), len, addr, 1339 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1340 1341 setup = opipe->tail.td; 1342 stat = ohci_alloc_std(sc); 1343 if (stat == NULL) { 1344 err = USBD_NOMEM; 1345 goto bad1; 1346 } 1347 tail = ohci_alloc_std(sc); 1348 if (tail == NULL) { 1349 err = USBD_NOMEM; 1350 goto bad2; 1351 } 1352 tail->xfer = NULL; 1353 1354 sed = opipe->sed; 1355 opipe->u.ctl.length = len; 1356 1357 /* Update device address and length since they may have changed. */ 1358 /* XXX This only needs to be done once, but it's too early in open. */ 1359 sed->ed.ed_flags = LE( 1360 (LE(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1361 OHCI_ED_SET_FA(addr) | 1362 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1363 1364 /* Set up data transaction */ 1365 if (len != 0) { 1366 data = ohci_alloc_std(sc); 1367 if (data == NULL) { 1368 err = USBD_NOMEM; 1369 goto bad3; 1370 } 1371 data->td.td_flags = LE( 1372 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 1373 OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR | 1374 (xfer->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0)); 1375 data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf)); 1376 data->nexttd = stat; 1377 data->td.td_nexttd = LE(stat->physaddr); 1378 data->td.td_be = LE(LE(data->td.td_cbp) + len - 1); 1379 data->len = len; 1380 data->xfer = xfer; 1381 data->flags = OHCI_ADD_LEN; 1382 1383 next = data; 1384 stat->flags = OHCI_CALL_DONE; 1385 } else { 1386 next = stat; 1387 /* XXX ADD_LEN? */ 1388 stat->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1389 } 1390 1391 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1392 1393 setup->td.td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC | 1394 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1395 setup->td.td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma)); 1396 setup->nexttd = next; 1397 setup->td.td_nexttd = LE(next->physaddr); 1398 setup->td.td_be = LE(LE(setup->td.td_cbp) + sizeof *req - 1); 1399 setup->len = 0; /* XXX The number of byte we count */ 1400 setup->xfer = xfer; 1401 setup->flags = 0; 1402 xfer->hcpriv = setup; 1403 1404 stat->td.td_flags = LE( 1405 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC | 1406 OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1407 stat->td.td_cbp = 0; 1408 stat->nexttd = tail; 1409 stat->td.td_nexttd = LE(tail->physaddr); 1410 stat->td.td_be = 0; 1411 stat->len = 0; 1412 stat->xfer = xfer; 1413 1414 #ifdef OHCI_DEBUG 1415 if (ohcidebug > 5) { 1416 DPRINTF(("ohci_device_request:\n")); 1417 ohci_dump_ed(sed); 1418 ohci_dump_tds(setup); 1419 } 1420 #endif 1421 1422 /* Insert ED in schedule */ 1423 s = splusb(); 1424 ohci_hash_add_td(sc, setup); 1425 if (len != 0) 1426 ohci_hash_add_td(sc, data); 1427 ohci_hash_add_td(sc, stat); 1428 sed->ed.ed_tailp = LE(tail->physaddr); 1429 opipe->tail.td = tail; 1430 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1431 if (xfer->timeout && !sc->sc_bus.use_polling) { 1432 usb_timeout(ohci_timeout, xfer, 1433 MS_TO_TICKS(xfer->timeout), xfer->timo_handle); 1434 } 1435 splx(s); 1436 1437 #ifdef OHCI_DEBUG 1438 if (ohcidebug > 5) { 1439 usb_delay_ms(&sc->sc_bus, 5); 1440 DPRINTF(("ohci_device_request: status=%x\n", 1441 OREAD4(sc, OHCI_COMMAND_STATUS))); 1442 ohci_dump_ed(sed); 1443 ohci_dump_tds(setup); 1444 } 1445 #endif 1446 1447 return (USBD_NORMAL_COMPLETION); 1448 1449 bad3: 1450 ohci_free_std(sc, tail); 1451 bad2: 1452 ohci_free_std(sc, stat); 1453 bad1: 1454 return (err); 1455 } 1456 1457 /* 1458 * Add an ED to the schedule. Called at splusb(). 1459 */ 1460 void 1461 ohci_add_ed(sed, head) 1462 ohci_soft_ed_t *sed; 1463 ohci_soft_ed_t *head; 1464 { 1465 SPLUSBCHECK; 1466 sed->next = head->next; 1467 sed->ed.ed_nexted = head->ed.ed_nexted; 1468 head->next = sed; 1469 head->ed.ed_nexted = LE(sed->physaddr); 1470 } 1471 1472 /* 1473 * Remove an ED from the schedule. Called at splusb(). 1474 */ 1475 void 1476 ohci_rem_ed(sed, head) 1477 ohci_soft_ed_t *sed; 1478 ohci_soft_ed_t *head; 1479 { 1480 ohci_soft_ed_t *p; 1481 1482 SPLUSBCHECK; 1483 1484 /* XXX */ 1485 for (p = head; p == NULL && p->next != sed; p = p->next) 1486 ; 1487 if (p == NULL) 1488 panic("ohci_rem_ed: ED not found\n"); 1489 p->next = sed->next; 1490 p->ed.ed_nexted = sed->ed.ed_nexted; 1491 } 1492 1493 /* 1494 * When a transfer is completed the TD is added to the done queue by 1495 * the host controller. This queue is the processed by software. 1496 * Unfortunately the queue contains the physical address of the TD 1497 * and we have no simple way to translate this back to a kernel address. 1498 * To make the translation possible (and fast) we use a hash table of 1499 * TDs currently in the schedule. The physical address is used as the 1500 * hash value. 1501 */ 1502 1503 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1504 /* Called at splusb() */ 1505 void 1506 ohci_hash_add_td(sc, std) 1507 ohci_softc_t *sc; 1508 ohci_soft_td_t *std; 1509 { 1510 int h = HASH(std->physaddr); 1511 1512 SPLUSBCHECK; 1513 1514 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1515 } 1516 1517 /* Called at splusb() */ 1518 void 1519 ohci_hash_rem_td(sc, std) 1520 ohci_softc_t *sc; 1521 ohci_soft_td_t *std; 1522 { 1523 SPLUSBCHECK; 1524 1525 LIST_REMOVE(std, hnext); 1526 } 1527 1528 ohci_soft_td_t * 1529 ohci_hash_find_td(sc, a) 1530 ohci_softc_t *sc; 1531 ohci_physaddr_t a; 1532 { 1533 int h = HASH(a); 1534 ohci_soft_td_t *std; 1535 1536 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1537 std != NULL; 1538 std = LIST_NEXT(std, hnext)) 1539 if (std->physaddr == a) 1540 return (std); 1541 panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a); 1542 } 1543 1544 void 1545 ohci_timeout(addr) 1546 void *addr; 1547 { 1548 usbd_xfer_handle xfer = addr; 1549 int s; 1550 1551 DPRINTF(("ohci_timeout: xfer=%p\n", xfer)); 1552 1553 s = splusb(); 1554 xfer->device->bus->intr_context++; 1555 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1556 xfer->device->bus->intr_context--; 1557 splx(s); 1558 } 1559 1560 #ifdef OHCI_DEBUG 1561 void 1562 ohci_dump_tds(std) 1563 ohci_soft_td_t *std; 1564 { 1565 for (; std; std = std->nexttd) 1566 ohci_dump_td(std); 1567 } 1568 1569 void 1570 ohci_dump_td(std) 1571 ohci_soft_td_t *std; 1572 { 1573 DPRINTF(("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1574 "nexttd=0x%08lx be=0x%08lx\n", 1575 std, (u_long)std->physaddr, 1576 (int)LE(std->td.td_flags), 1577 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1578 OHCI_TD_GET_DI(LE(std->td.td_flags)), 1579 OHCI_TD_GET_EC(LE(std->td.td_flags)), 1580 OHCI_TD_GET_CC(LE(std->td.td_flags)), 1581 (u_long)LE(std->td.td_cbp), 1582 (u_long)LE(std->td.td_nexttd), (u_long)LE(std->td.td_be))); 1583 } 1584 1585 void 1586 ohci_dump_ed(sed) 1587 ohci_soft_ed_t *sed; 1588 { 1589 DPRINTF(("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx " 1590 "headp=%b nexted=0x%08lx\n", 1591 sed, (u_long)sed->physaddr, 1592 OHCI_ED_GET_FA(LE(sed->ed.ed_flags)), 1593 OHCI_ED_GET_EN(LE(sed->ed.ed_flags)), 1594 OHCI_ED_GET_MAXP(LE(sed->ed.ed_flags)), 1595 (int)LE(sed->ed.ed_flags), 1596 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1597 (u_long)LE(sed->ed.ed_tailp), 1598 (u_long)LE(sed->ed.ed_headp), 1599 "\20\1HALT\2CARRY", 1600 (u_long)LE(sed->ed.ed_nexted))); 1601 } 1602 #endif 1603 1604 usbd_status 1605 ohci_open(pipe) 1606 usbd_pipe_handle pipe; 1607 { 1608 usbd_device_handle dev = pipe->device; 1609 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1610 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1611 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1612 u_int8_t addr = dev->address; 1613 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1614 ohci_soft_ed_t *sed; 1615 ohci_soft_td_t *std; 1616 ohci_soft_itd_t *sitd; 1617 ohci_physaddr_t tdphys; 1618 u_int32_t fmt; 1619 usbd_status err; 1620 int s; 1621 int ival; 1622 1623 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1624 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1625 if (addr == sc->sc_addr) { 1626 switch (ed->bEndpointAddress) { 1627 case USB_CONTROL_ENDPOINT: 1628 pipe->methods = &ohci_root_ctrl_methods; 1629 break; 1630 case UE_DIR_IN | OHCI_INTR_ENDPT: 1631 pipe->methods = &ohci_root_intr_methods; 1632 break; 1633 default: 1634 return (USBD_INVAL); 1635 } 1636 } else { 1637 sed = ohci_alloc_sed(sc); 1638 if (sed == NULL) 1639 goto bad0; 1640 opipe->sed = sed; 1641 if (xfertype == UE_ISOCHRONOUS) { 1642 sitd = ohci_alloc_sitd(sc); 1643 if (sitd == NULL) { 1644 ohci_free_sitd(sc, sitd); 1645 goto bad1; 1646 } 1647 opipe->tail.itd = sitd; 1648 tdphys = LE(sitd->physaddr); 1649 fmt = OHCI_ED_FORMAT_ISO; 1650 } else { 1651 std = ohci_alloc_std(sc); 1652 if (std == NULL) { 1653 ohci_free_std(sc, std); 1654 goto bad1; 1655 } 1656 opipe->tail.td = std; 1657 tdphys = LE(std->physaddr); 1658 fmt = OHCI_ED_FORMAT_GEN; 1659 } 1660 sed->ed.ed_flags = LE( 1661 OHCI_ED_SET_FA(addr) | 1662 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1663 OHCI_ED_DIR_TD | 1664 (dev->lowspeed ? OHCI_ED_SPEED : 0) | fmt | 1665 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1666 sed->ed.ed_headp = sed->ed.ed_tailp = tdphys; 1667 1668 switch (xfertype) { 1669 case UE_CONTROL: 1670 pipe->methods = &ohci_device_ctrl_methods; 1671 err = usb_allocmem(&sc->sc_bus, 1672 sizeof(usb_device_request_t), 1673 0, &opipe->u.ctl.reqdma); 1674 if (err) 1675 goto bad; 1676 s = splusb(); 1677 ohci_add_ed(sed, sc->sc_ctrl_head); 1678 splx(s); 1679 break; 1680 case UE_INTERRUPT: 1681 pipe->methods = &ohci_device_intr_methods; 1682 ival = pipe->interval; 1683 if (ival == USBD_DEFAULT_INTERVAL) 1684 ival = ed->bInterval; 1685 return (ohci_device_setintr(sc, opipe, ival)); 1686 case UE_ISOCHRONOUS: 1687 pipe->methods = &ohci_device_isoc_methods; 1688 return (ohci_setup_isoc(pipe)); 1689 case UE_BULK: 1690 pipe->methods = &ohci_device_bulk_methods; 1691 s = splusb(); 1692 ohci_add_ed(sed, sc->sc_bulk_head); 1693 splx(s); 1694 break; 1695 } 1696 } 1697 return (USBD_NORMAL_COMPLETION); 1698 1699 bad: 1700 ohci_free_std(sc, std); 1701 bad1: 1702 ohci_free_sed(sc, sed); 1703 bad0: 1704 return (USBD_NOMEM); 1705 1706 } 1707 1708 /* 1709 * Close a reqular pipe. 1710 * Assumes that there are no pending transactions. 1711 */ 1712 void 1713 ohci_close_pipe(pipe, head) 1714 usbd_pipe_handle pipe; 1715 ohci_soft_ed_t *head; 1716 { 1717 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1718 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1719 ohci_soft_ed_t *sed = opipe->sed; 1720 int s; 1721 1722 s = splusb(); 1723 #ifdef DIAGNOSTIC 1724 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 1725 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 1726 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) { 1727 ohci_physaddr_t td = sed->ed.ed_headp; 1728 ohci_soft_td_t *std; 1729 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]); 1730 std != NULL; 1731 std = LIST_NEXT(std, hnext)) 1732 if (std->physaddr == td) 1733 break; 1734 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 1735 "tl=0x%x pipe=%p, std=%p\n", sed, 1736 (int)LE(sed->ed.ed_headp), (int)LE(sed->ed.ed_tailp), 1737 pipe, std); 1738 usb_delay_ms(&sc->sc_bus, 2); 1739 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 1740 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) 1741 printf("ohci_close_pipe: pipe still not empty\n"); 1742 } 1743 #endif 1744 ohci_rem_ed(sed, head); 1745 splx(s); 1746 ohci_free_sed(sc, opipe->sed); 1747 } 1748 1749 /* 1750 * Abort a device request. 1751 * If this routine is called at splusb() it guarantees that the request 1752 * will be removed from the hardware scheduling and that the callback 1753 * for it will be called with USBD_CANCELLED status. 1754 * It's impossible to guarantee that the requested transfer will not 1755 * have happened since the hardware runs concurrently. 1756 * If the transaction has already happened we rely on the ordinary 1757 * interrupt processing to process it. 1758 */ 1759 void 1760 ohci_abort_xfer(xfer, status) 1761 usbd_xfer_handle xfer; 1762 usbd_status status; 1763 { 1764 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1765 ohci_soft_ed_t *sed; 1766 1767 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p\n", xfer, opipe)); 1768 1769 xfer->status = status; 1770 1771 usb_untimeout(ohci_timeout, xfer, xfer->timo_handle); 1772 1773 sed = opipe->sed; 1774 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 1775 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); /* force hardware skip */ 1776 1777 #if 1 1778 if (xfer->device->bus->intr_context) { 1779 /* We have no process context, so we can't use tsleep(). */ 1780 timeout(ohci_abort_xfer_end, xfer, hz / USB_FRAMES_PER_SECOND); 1781 } else { 1782 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 1783 KASSERT(intr_nesting_level == 0, 1784 ("ohci_abort_req in interrupt context")); 1785 #endif 1786 usb_delay_ms(opipe->pipe.device->bus, 1); 1787 ohci_abort_xfer_end(xfer); 1788 } 1789 #else 1790 delay(1000); 1791 ohci_abort_xfer_end(xfer); 1792 #endif 1793 } 1794 1795 void 1796 ohci_abort_xfer_end(v) 1797 void *v; 1798 { 1799 usbd_xfer_handle xfer = v; 1800 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1801 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1802 ohci_soft_ed_t *sed; 1803 ohci_soft_td_t *p, *n; 1804 int s; 1805 1806 s = splusb(); 1807 1808 p = xfer->hcpriv; 1809 #ifdef DIAGNOSTIC 1810 if (p == NULL) { 1811 printf("ohci_abort_xfer: hcpriv==0\n"); 1812 return; 1813 } 1814 #endif 1815 for (; p->xfer == xfer; p = n) { 1816 n = p->nexttd; 1817 ohci_hash_rem_td(sc, p); 1818 ohci_free_std(sc, p); 1819 } 1820 1821 sed = opipe->sed; 1822 DPRINTFN(2,("ohci_abort_xfer: set hd=%x, tl=%x\n", 1823 (int)LE(p->physaddr), (int)LE(sed->ed.ed_tailp))); 1824 sed->ed.ed_headp = p->physaddr; /* unlink TDs */ 1825 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); /* remove hardware skip */ 1826 1827 usb_transfer_complete(xfer); 1828 1829 splx(s); 1830 } 1831 1832 /* 1833 * Data structures and routines to emulate the root hub. 1834 */ 1835 static usb_device_descriptor_t ohci_devd = { 1836 USB_DEVICE_DESCRIPTOR_SIZE, 1837 UDESC_DEVICE, /* type */ 1838 {0x00, 0x01}, /* USB version */ 1839 UCLASS_HUB, /* class */ 1840 USUBCLASS_HUB, /* subclass */ 1841 0, /* protocol */ 1842 64, /* max packet */ 1843 {0},{0},{0x00,0x01}, /* device id */ 1844 1,2,0, /* string indicies */ 1845 1 /* # of configurations */ 1846 }; 1847 1848 static usb_config_descriptor_t ohci_confd = { 1849 USB_CONFIG_DESCRIPTOR_SIZE, 1850 UDESC_CONFIG, 1851 {USB_CONFIG_DESCRIPTOR_SIZE + 1852 USB_INTERFACE_DESCRIPTOR_SIZE + 1853 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1854 1, 1855 1, 1856 0, 1857 UC_SELF_POWERED, 1858 0 /* max power */ 1859 }; 1860 1861 static usb_interface_descriptor_t ohci_ifcd = { 1862 USB_INTERFACE_DESCRIPTOR_SIZE, 1863 UDESC_INTERFACE, 1864 0, 1865 0, 1866 1, 1867 UCLASS_HUB, 1868 USUBCLASS_HUB, 1869 0, 1870 0 1871 }; 1872 1873 static usb_endpoint_descriptor_t ohci_endpd = { 1874 USB_ENDPOINT_DESCRIPTOR_SIZE, 1875 UDESC_ENDPOINT, 1876 UE_DIR_IN | OHCI_INTR_ENDPT, 1877 UE_INTERRUPT, 1878 {8, 0}, /* max packet */ 1879 255 1880 }; 1881 1882 static usb_hub_descriptor_t ohci_hubd = { 1883 USB_HUB_DESCRIPTOR_SIZE, 1884 UDESC_HUB, 1885 0, 1886 {0,0}, 1887 0, 1888 0, 1889 {0}, 1890 }; 1891 1892 static int 1893 ohci_str(p, l, s) 1894 usb_string_descriptor_t *p; 1895 int l; 1896 char *s; 1897 { 1898 int i; 1899 1900 if (l == 0) 1901 return (0); 1902 p->bLength = 2 * strlen(s) + 2; 1903 if (l == 1) 1904 return (1); 1905 p->bDescriptorType = UDESC_STRING; 1906 l -= 2; 1907 for (i = 0; s[i] && l > 1; i++, l -= 2) 1908 USETW2(p->bString[i], 0, s[i]); 1909 return (2*i+2); 1910 } 1911 1912 /* 1913 * Simulate a hardware hub by handling all the necessary requests. 1914 */ 1915 static usbd_status 1916 ohci_root_ctrl_transfer(xfer) 1917 usbd_xfer_handle xfer; 1918 { 1919 usbd_status err; 1920 1921 /* Insert last in queue. */ 1922 err = usb_insert_transfer(xfer); 1923 if (err) 1924 return (err); 1925 1926 /* Pipe isn't running, start first */ 1927 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1928 } 1929 1930 static usbd_status 1931 ohci_root_ctrl_start(xfer) 1932 usbd_xfer_handle xfer; 1933 { 1934 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 1935 usb_device_request_t *req; 1936 void *buf = NULL; 1937 int port, i; 1938 int s, len, value, index, l, totlen = 0; 1939 usb_port_status_t ps; 1940 usb_hub_descriptor_t hubd; 1941 usbd_status err; 1942 u_int32_t v; 1943 1944 #ifdef DIAGNOSTIC 1945 if (!(xfer->rqflags & URQ_REQUEST)) 1946 /* XXX panic */ 1947 return (USBD_INVAL); 1948 #endif 1949 req = &xfer->request; 1950 1951 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 1952 req->bmRequestType, req->bRequest)); 1953 1954 len = UGETW(req->wLength); 1955 value = UGETW(req->wValue); 1956 index = UGETW(req->wIndex); 1957 1958 if (len != 0) 1959 buf = KERNADDR(&xfer->dmabuf); 1960 1961 #define C(x,y) ((x) | ((y) << 8)) 1962 switch(C(req->bRequest, req->bmRequestType)) { 1963 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1964 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1965 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1966 /* 1967 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1968 * for the integrated root hub. 1969 */ 1970 break; 1971 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1972 if (len > 0) { 1973 *(u_int8_t *)buf = sc->sc_conf; 1974 totlen = 1; 1975 } 1976 break; 1977 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1978 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 1979 switch(value >> 8) { 1980 case UDESC_DEVICE: 1981 if ((value & 0xff) != 0) { 1982 err = USBD_IOERROR; 1983 goto ret; 1984 } 1985 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1986 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 1987 memcpy(buf, &ohci_devd, l); 1988 break; 1989 case UDESC_CONFIG: 1990 if ((value & 0xff) != 0) { 1991 err = USBD_IOERROR; 1992 goto ret; 1993 } 1994 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1995 memcpy(buf, &ohci_confd, l); 1996 buf = (char *)buf + l; 1997 len -= l; 1998 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1999 totlen += l; 2000 memcpy(buf, &ohci_ifcd, l); 2001 buf = (char *)buf + l; 2002 len -= l; 2003 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2004 totlen += l; 2005 memcpy(buf, &ohci_endpd, l); 2006 break; 2007 case UDESC_STRING: 2008 if (len == 0) 2009 break; 2010 *(u_int8_t *)buf = 0; 2011 totlen = 1; 2012 switch (value & 0xff) { 2013 case 1: /* Vendor */ 2014 totlen = ohci_str(buf, len, sc->sc_vendor); 2015 break; 2016 case 2: /* Product */ 2017 totlen = ohci_str(buf, len, "OHCI root hub"); 2018 break; 2019 } 2020 break; 2021 default: 2022 err = USBD_IOERROR; 2023 goto ret; 2024 } 2025 break; 2026 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2027 if (len > 0) { 2028 *(u_int8_t *)buf = 0; 2029 totlen = 1; 2030 } 2031 break; 2032 case C(UR_GET_STATUS, UT_READ_DEVICE): 2033 if (len > 1) { 2034 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2035 totlen = 2; 2036 } 2037 break; 2038 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2039 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2040 if (len > 1) { 2041 USETW(((usb_status_t *)buf)->wStatus, 0); 2042 totlen = 2; 2043 } 2044 break; 2045 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2046 if (value >= USB_MAX_DEVICES) { 2047 err = USBD_IOERROR; 2048 goto ret; 2049 } 2050 sc->sc_addr = value; 2051 break; 2052 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2053 if (value != 0 && value != 1) { 2054 err = USBD_IOERROR; 2055 goto ret; 2056 } 2057 sc->sc_conf = value; 2058 break; 2059 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2060 break; 2061 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2062 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2063 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2064 err = USBD_IOERROR; 2065 goto ret; 2066 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2067 break; 2068 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2069 break; 2070 /* Hub requests */ 2071 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2072 break; 2073 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2074 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2075 "port=%d feature=%d\n", 2076 index, value)); 2077 if (index < 1 || index > sc->sc_noport) { 2078 err = USBD_IOERROR; 2079 goto ret; 2080 } 2081 port = OHCI_RH_PORT_STATUS(index); 2082 switch(value) { 2083 case UHF_PORT_ENABLE: 2084 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2085 break; 2086 case UHF_PORT_SUSPEND: 2087 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2088 break; 2089 case UHF_PORT_POWER: 2090 OWRITE4(sc, port, UPS_LOW_SPEED); 2091 break; 2092 case UHF_C_PORT_CONNECTION: 2093 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2094 break; 2095 case UHF_C_PORT_ENABLE: 2096 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2097 break; 2098 case UHF_C_PORT_SUSPEND: 2099 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2100 break; 2101 case UHF_C_PORT_OVER_CURRENT: 2102 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2103 break; 2104 case UHF_C_PORT_RESET: 2105 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2106 break; 2107 default: 2108 err = USBD_IOERROR; 2109 goto ret; 2110 } 2111 switch(value) { 2112 case UHF_C_PORT_CONNECTION: 2113 case UHF_C_PORT_ENABLE: 2114 case UHF_C_PORT_SUSPEND: 2115 case UHF_C_PORT_OVER_CURRENT: 2116 case UHF_C_PORT_RESET: 2117 /* Enable RHSC interrupt if condition is cleared. */ 2118 if ((OREAD4(sc, port) >> 16) == 0) 2119 ohci_rhsc_able(sc, 1); 2120 break; 2121 default: 2122 break; 2123 } 2124 break; 2125 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2126 if (value != 0) { 2127 err = USBD_IOERROR; 2128 goto ret; 2129 } 2130 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2131 hubd = ohci_hubd; 2132 hubd.bNbrPorts = sc->sc_noport; 2133 USETW(hubd.wHubCharacteristics, 2134 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2135 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2136 /* XXX overcurrent */ 2137 ); 2138 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2139 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2140 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2141 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2142 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2143 l = min(len, hubd.bDescLength); 2144 totlen = l; 2145 memcpy(buf, &hubd, l); 2146 break; 2147 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2148 if (len != 4) { 2149 err = USBD_IOERROR; 2150 goto ret; 2151 } 2152 memset(buf, 0, len); /* ? XXX */ 2153 totlen = len; 2154 break; 2155 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2156 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2157 index)); 2158 if (index < 1 || index > sc->sc_noport) { 2159 err = USBD_IOERROR; 2160 goto ret; 2161 } 2162 if (len != 4) { 2163 err = USBD_IOERROR; 2164 goto ret; 2165 } 2166 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2167 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2168 v)); 2169 USETW(ps.wPortStatus, v); 2170 USETW(ps.wPortChange, v >> 16); 2171 l = min(len, sizeof ps); 2172 memcpy(buf, &ps, l); 2173 totlen = l; 2174 break; 2175 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2176 err = USBD_IOERROR; 2177 goto ret; 2178 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2179 break; 2180 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2181 if (index < 1 || index > sc->sc_noport) { 2182 err = USBD_IOERROR; 2183 goto ret; 2184 } 2185 port = OHCI_RH_PORT_STATUS(index); 2186 switch(value) { 2187 case UHF_PORT_ENABLE: 2188 OWRITE4(sc, port, UPS_PORT_ENABLED); 2189 break; 2190 case UHF_PORT_SUSPEND: 2191 OWRITE4(sc, port, UPS_SUSPEND); 2192 break; 2193 case UHF_PORT_RESET: 2194 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2195 index)); 2196 OWRITE4(sc, port, UPS_RESET); 2197 for (i = 0; i < 10; i++) { 2198 usb_delay_ms(&sc->sc_bus, 10); 2199 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2200 break; 2201 } 2202 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2203 index, OREAD4(sc, port))); 2204 break; 2205 case UHF_PORT_POWER: 2206 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2207 "%d\n", index)); 2208 OWRITE4(sc, port, UPS_PORT_POWER); 2209 break; 2210 default: 2211 err = USBD_IOERROR; 2212 goto ret; 2213 } 2214 break; 2215 default: 2216 err = USBD_IOERROR; 2217 goto ret; 2218 } 2219 xfer->actlen = totlen; 2220 err = USBD_NORMAL_COMPLETION; 2221 ret: 2222 xfer->status = err; 2223 s = splusb(); 2224 usb_transfer_complete(xfer); 2225 splx(s); 2226 return (USBD_IN_PROGRESS); 2227 } 2228 2229 /* Abort a root control request. */ 2230 static void 2231 ohci_root_ctrl_abort(xfer) 2232 usbd_xfer_handle xfer; 2233 { 2234 /* Nothing to do, all transfers are synchronous. */ 2235 } 2236 2237 /* Close the root pipe. */ 2238 static void 2239 ohci_root_ctrl_close(pipe) 2240 usbd_pipe_handle pipe; 2241 { 2242 DPRINTF(("ohci_root_ctrl_close\n")); 2243 /* Nothing to do. */ 2244 } 2245 2246 static usbd_status 2247 ohci_root_intr_transfer(xfer) 2248 usbd_xfer_handle xfer; 2249 { 2250 usbd_status err; 2251 2252 /* Insert last in queue. */ 2253 err = usb_insert_transfer(xfer); 2254 if (err) 2255 return (err); 2256 2257 /* Pipe isn't running, start first */ 2258 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2259 } 2260 2261 static usbd_status 2262 ohci_root_intr_start(xfer) 2263 usbd_xfer_handle xfer; 2264 { 2265 usbd_pipe_handle pipe = xfer->pipe; 2266 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2267 2268 sc->sc_intrxfer = xfer; 2269 2270 return (USBD_IN_PROGRESS); 2271 } 2272 2273 /* Abort a root interrupt request. */ 2274 static void 2275 ohci_root_intr_abort(xfer) 2276 usbd_xfer_handle xfer; 2277 { 2278 int s; 2279 2280 if (xfer->pipe->intrxfer == xfer) { 2281 DPRINTF(("ohci_root_intr_abort: remove\n")); 2282 xfer->pipe->intrxfer = NULL; 2283 } 2284 xfer->status = USBD_CANCELLED; 2285 s = splusb(); 2286 usb_transfer_complete(xfer); 2287 splx(s); 2288 } 2289 2290 /* Close the root pipe. */ 2291 static void 2292 ohci_root_intr_close(pipe) 2293 usbd_pipe_handle pipe; 2294 { 2295 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2296 2297 DPRINTF(("ohci_root_intr_close\n")); 2298 2299 sc->sc_intrxfer = NULL; 2300 } 2301 2302 /************************/ 2303 2304 static usbd_status 2305 ohci_device_ctrl_transfer(xfer) 2306 usbd_xfer_handle xfer; 2307 { 2308 usbd_status err; 2309 2310 /* Insert last in queue. */ 2311 err = usb_insert_transfer(xfer); 2312 if (err) 2313 return (err); 2314 2315 /* Pipe isn't running, start first */ 2316 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2317 } 2318 2319 static usbd_status 2320 ohci_device_ctrl_start(xfer) 2321 usbd_xfer_handle xfer; 2322 { 2323 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2324 usbd_status err; 2325 2326 #ifdef DIAGNOSTIC 2327 if (!(xfer->rqflags & URQ_REQUEST)) { 2328 /* XXX panic */ 2329 printf("ohci_device_ctrl_transfer: not a request\n"); 2330 return (USBD_INVAL); 2331 } 2332 #endif 2333 2334 err = ohci_device_request(xfer); 2335 if (err) 2336 return (err); 2337 2338 if (sc->sc_bus.use_polling) 2339 ohci_waitintr(sc, xfer); 2340 return (USBD_IN_PROGRESS); 2341 } 2342 2343 /* Abort a device control request. */ 2344 static void 2345 ohci_device_ctrl_abort(xfer) 2346 usbd_xfer_handle xfer; 2347 { 2348 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2349 ohci_abort_xfer(xfer, USBD_CANCELLED); 2350 } 2351 2352 /* Close a device control pipe. */ 2353 static void 2354 ohci_device_ctrl_close(pipe) 2355 usbd_pipe_handle pipe; 2356 { 2357 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2358 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2359 2360 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2361 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2362 ohci_free_std(sc, opipe->tail.td); 2363 } 2364 2365 /************************/ 2366 2367 static void 2368 ohci_device_clear_toggle(pipe) 2369 usbd_pipe_handle pipe; 2370 { 2371 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2372 2373 opipe->sed->ed.ed_tailp &= LE(~OHCI_TOGGLECARRY); 2374 } 2375 2376 static void 2377 ohci_noop(pipe) 2378 usbd_pipe_handle pipe; 2379 { 2380 } 2381 2382 static usbd_status 2383 ohci_device_bulk_transfer(xfer) 2384 usbd_xfer_handle xfer; 2385 { 2386 usbd_status err; 2387 2388 /* Insert last in queue. */ 2389 err = usb_insert_transfer(xfer); 2390 if (err) 2391 return (err); 2392 2393 /* Pipe isn't running, start first */ 2394 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2395 } 2396 2397 static usbd_status 2398 ohci_device_bulk_start(xfer) 2399 usbd_xfer_handle xfer; 2400 { 2401 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2402 usbd_device_handle dev = opipe->pipe.device; 2403 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2404 int addr = dev->address; 2405 ohci_soft_td_t *data, *tail, *tdp; 2406 ohci_soft_ed_t *sed; 2407 int s, len, isread, endpt; 2408 usbd_status err; 2409 2410 #ifdef DIAGNOSTIC 2411 if (xfer->rqflags & URQ_REQUEST) { 2412 /* XXX panic */ 2413 printf("ohci_device_bulk_start: a request\n"); 2414 return (USBD_INVAL); 2415 } 2416 #endif 2417 2418 len = xfer->length; 2419 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2420 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2421 sed = opipe->sed; 2422 2423 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2424 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2425 endpt)); 2426 2427 opipe->u.bulk.isread = isread; 2428 opipe->u.bulk.length = len; 2429 2430 /* Update device address */ 2431 sed->ed.ed_flags = LE( 2432 (LE(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2433 OHCI_ED_SET_FA(addr)); 2434 2435 /* Allocate a chain of new TDs (including a new tail). */ 2436 data = opipe->tail.td; 2437 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer->flags, 2438 &xfer->dmabuf, data, &tail); 2439 if (err) 2440 return (err); 2441 2442 tail->xfer = NULL; 2443 xfer->hcpriv = data; 2444 2445 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2446 "td_cbp=0x%08x td_be=0x%08x\n", 2447 (int)LE(sed->ed.ed_flags), (int)LE(data->td.td_flags), 2448 (int)LE(data->td.td_cbp), (int)LE(data->td.td_be))); 2449 2450 #ifdef OHCI_DEBUG 2451 if (ohcidebug > 4) { 2452 ohci_dump_ed(sed); 2453 ohci_dump_tds(data); 2454 } 2455 #endif 2456 2457 /* Insert ED in schedule */ 2458 s = splusb(); 2459 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2460 tdp->xfer = xfer; 2461 ohci_hash_add_td(sc, tdp); 2462 } 2463 sed->ed.ed_tailp = LE(tail->physaddr); 2464 opipe->tail.td = tail; 2465 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); 2466 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2467 if (xfer->timeout && !sc->sc_bus.use_polling) { 2468 usb_timeout(ohci_timeout, xfer, 2469 MS_TO_TICKS(xfer->timeout), xfer->timo_handle); 2470 } 2471 2472 #if 0 2473 /* This goes wrong if we are too slow. */ 2474 if (ohcidebug > 5) { 2475 usb_delay_ms(&sc->sc_bus, 5); 2476 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2477 OREAD4(sc, OHCI_COMMAND_STATUS))); 2478 ohci_dump_ed(sed); 2479 ohci_dump_tds(data); 2480 } 2481 #endif 2482 2483 splx(s); 2484 2485 return (USBD_IN_PROGRESS); 2486 } 2487 2488 static void 2489 ohci_device_bulk_abort(xfer) 2490 usbd_xfer_handle xfer; 2491 { 2492 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2493 ohci_abort_xfer(xfer, USBD_CANCELLED); 2494 } 2495 2496 /* 2497 * Close a device bulk pipe. 2498 */ 2499 static void 2500 ohci_device_bulk_close(pipe) 2501 usbd_pipe_handle pipe; 2502 { 2503 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2504 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2505 2506 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2507 ohci_close_pipe(pipe, sc->sc_bulk_head); 2508 ohci_free_std(sc, opipe->tail.td); 2509 } 2510 2511 /************************/ 2512 2513 static usbd_status 2514 ohci_device_intr_transfer(xfer) 2515 usbd_xfer_handle xfer; 2516 { 2517 usbd_status err; 2518 2519 /* Insert last in queue. */ 2520 err = usb_insert_transfer(xfer); 2521 if (err) 2522 return (err); 2523 2524 /* Pipe isn't running, start first */ 2525 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2526 } 2527 2528 static usbd_status 2529 ohci_device_intr_start(xfer) 2530 usbd_xfer_handle xfer; 2531 { 2532 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2533 usbd_device_handle dev = opipe->pipe.device; 2534 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2535 ohci_soft_ed_t *sed = opipe->sed; 2536 ohci_soft_td_t *data, *tail; 2537 int len; 2538 int s; 2539 2540 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2541 "flags=%d priv=%p\n", 2542 xfer, xfer->length, xfer->flags, xfer->priv)); 2543 2544 #ifdef DIAGNOSTIC 2545 if (xfer->rqflags & URQ_REQUEST) 2546 panic("ohci_device_intr_transfer: a request\n"); 2547 #endif 2548 2549 len = xfer->length; 2550 2551 data = opipe->tail.td; 2552 tail = ohci_alloc_std(sc); 2553 if (tail == NULL) 2554 return (USBD_NOMEM); 2555 tail->xfer = NULL; 2556 2557 data->td.td_flags = LE( 2558 OHCI_TD_IN | OHCI_TD_NOCC | 2559 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2560 if (xfer->flags & USBD_SHORT_XFER_OK) 2561 data->td.td_flags |= LE(OHCI_TD_R); 2562 data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf)); 2563 data->nexttd = tail; 2564 data->td.td_nexttd = LE(tail->physaddr); 2565 data->td.td_be = LE(LE(data->td.td_cbp) + len - 1); 2566 data->len = len; 2567 data->xfer = xfer; 2568 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2569 xfer->hcpriv = data; 2570 2571 #ifdef OHCI_DEBUG 2572 if (ohcidebug > 5) { 2573 DPRINTF(("ohci_device_intr_transfer:\n")); 2574 ohci_dump_ed(sed); 2575 ohci_dump_tds(data); 2576 } 2577 #endif 2578 2579 /* Insert ED in schedule */ 2580 s = splusb(); 2581 ohci_hash_add_td(sc, data); 2582 sed->ed.ed_tailp = LE(tail->physaddr); 2583 opipe->tail.td = tail; 2584 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); 2585 2586 #if 0 2587 /* 2588 * This goes horribly wrong, printing thousands of descriptors, 2589 * because false references are followed due to the fact that the 2590 * TD is gone. 2591 */ 2592 if (ohcidebug > 5) { 2593 usb_delay_ms(&sc->sc_bus, 5); 2594 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2595 OREAD4(sc, OHCI_COMMAND_STATUS))); 2596 ohci_dump_ed(sed); 2597 ohci_dump_tds(data); 2598 } 2599 #endif 2600 splx(s); 2601 2602 return (USBD_IN_PROGRESS); 2603 } 2604 2605 /* Abort a device control request. */ 2606 static void 2607 ohci_device_intr_abort(xfer) 2608 usbd_xfer_handle xfer; 2609 { 2610 if (xfer->pipe->intrxfer == xfer) { 2611 DPRINTF(("ohci_device_intr_abort: remove\n")); 2612 xfer->pipe->intrxfer = NULL; 2613 } 2614 ohci_abort_xfer(xfer, USBD_CANCELLED); 2615 } 2616 2617 /* Close a device interrupt pipe. */ 2618 static void 2619 ohci_device_intr_close(pipe) 2620 usbd_pipe_handle pipe; 2621 { 2622 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2623 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2624 int nslots = opipe->u.intr.nslots; 2625 int pos = opipe->u.intr.pos; 2626 int j; 2627 ohci_soft_ed_t *p, *sed = opipe->sed; 2628 int s; 2629 2630 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2631 pipe, nslots, pos)); 2632 s = splusb(); 2633 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 2634 if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) != 2635 (sed->ed.ed_headp & LE(OHCI_TAILMASK))) 2636 usb_delay_ms(&sc->sc_bus, 2); 2637 2638 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2639 ; 2640 #ifdef DIAGNOSTIC 2641 if (p == NULL) 2642 panic("ohci_device_intr_close: ED not found\n"); 2643 #endif 2644 p->next = sed->next; 2645 p->ed.ed_nexted = sed->ed.ed_nexted; 2646 splx(s); 2647 2648 for (j = 0; j < nslots; j++) 2649 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2650 2651 ohci_free_std(sc, opipe->tail.td); 2652 ohci_free_sed(sc, opipe->sed); 2653 } 2654 2655 static usbd_status 2656 ohci_device_setintr(sc, opipe, ival) 2657 ohci_softc_t *sc; 2658 struct ohci_pipe *opipe; 2659 int ival; 2660 { 2661 int i, j, s, best; 2662 u_int npoll, slow, shigh, nslots; 2663 u_int bestbw, bw; 2664 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2665 2666 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2667 if (ival == 0) { 2668 printf("ohci_setintr: 0 interval\n"); 2669 return (USBD_INVAL); 2670 } 2671 2672 npoll = OHCI_NO_INTRS; 2673 while (npoll > ival) 2674 npoll /= 2; 2675 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2676 2677 /* 2678 * We now know which level in the tree the ED must go into. 2679 * Figure out which slot has most bandwidth left over. 2680 * Slots to examine: 2681 * npoll 2682 * 1 0 2683 * 2 1 2 2684 * 4 3 4 5 6 2685 * 8 7 8 9 10 11 12 13 14 2686 * N (N-1) .. (N-1+N-1) 2687 */ 2688 slow = npoll-1; 2689 shigh = slow + npoll; 2690 nslots = OHCI_NO_INTRS / npoll; 2691 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2692 bw = 0; 2693 for (j = 0; j < nslots; j++) 2694 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 2695 if (bw < bestbw) { 2696 best = i; 2697 bestbw = bw; 2698 } 2699 } 2700 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2701 best, slow, shigh, bestbw)); 2702 2703 s = splusb(); 2704 hsed = sc->sc_eds[best]; 2705 sed->next = hsed->next; 2706 sed->ed.ed_nexted = hsed->ed.ed_nexted; 2707 hsed->next = sed; 2708 hsed->ed.ed_nexted = LE(sed->physaddr); 2709 splx(s); 2710 2711 for (j = 0; j < nslots; j++) 2712 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 2713 opipe->u.intr.nslots = nslots; 2714 opipe->u.intr.pos = best; 2715 2716 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 2717 return (USBD_NORMAL_COMPLETION); 2718 } 2719 2720 /***********************/ 2721 2722 usbd_status 2723 ohci_device_isoc_transfer(xfer) 2724 usbd_xfer_handle xfer; 2725 { 2726 usbd_status err; 2727 2728 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 2729 2730 /* Put it on our queue, */ 2731 err = usb_insert_transfer(xfer); 2732 2733 /* bail out on error, */ 2734 if (err && err != USBD_IN_PROGRESS) 2735 return (err); 2736 2737 /* XXX should check inuse here */ 2738 2739 /* insert into schedule, */ 2740 ohci_device_isoc_enter(xfer); 2741 2742 /* and put on interrupt list if the pipe wasn't running */ 2743 if (!err) 2744 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2745 2746 return (err); 2747 } 2748 2749 void 2750 ohci_device_isoc_enter(xfer) 2751 usbd_xfer_handle xfer; 2752 { 2753 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2754 usbd_device_handle dev = opipe->pipe.device; 2755 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2756 ohci_soft_ed_t *sed = opipe->sed; 2757 struct iso *iso = &opipe->u.iso; 2758 ohci_soft_itd_t *sitd, *nsitd; 2759 ohci_physaddr_t buf, offs; 2760 int i, ncur, nframes; 2761 int ncross; 2762 int s; 2763 2764 s = splusb(); 2765 sitd = opipe->tail.itd; 2766 buf = DMAADDR(&xfer->dmabuf); 2767 sitd->itd.itd_bp0 = LE(buf & OHCI_ITD_PAGE_MASK); 2768 nframes = xfer->nframes; 2769 offs = buf & OHCI_ITD_OFFSET_MASK; 2770 for (i = ncur = 0; i < nframes; i++, ncur++) { 2771 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 2772 ncross > 1) { /* too many page crossings */ 2773 2774 nsitd = ohci_alloc_sitd(sc); 2775 if (nsitd == NULL) { 2776 /* XXX what now? */ 2777 return; 2778 } 2779 sitd->nextitd = nsitd; 2780 sitd->itd.itd_nextitd = LE(nsitd->physaddr); 2781 sitd->itd.itd_flags = LE( 2782 OHCI_ITD_NOCC | 2783 OHCI_ITD_SET_SF(iso->next) | 2784 OHCI_ITD_NOINTR | 2785 OHCI_ITD_SET_FC(OHCI_ITD_NOFFSET)); 2786 sitd->itd.itd_be = LE(LE(sitd->itd.itd_bp0) + offs - 1); 2787 nsitd->itd.itd_bp0 = LE((buf + offs) & OHCI_ITD_PAGE_MASK); 2788 sitd = nsitd; 2789 iso->next = iso->next + ncur; 2790 ncur = 0; 2791 ncross = 0; 2792 } 2793 /* XXX byte order */ 2794 sitd->itd.itd_offset[i] = 2795 offs | (ncross == 1 ? OHCI_ITD_PAGE_SELECT : 0); 2796 offs += xfer->frlengths[i]; 2797 /* XXX update ncross */ 2798 } 2799 nsitd = ohci_alloc_sitd(sc); 2800 if (nsitd == NULL) { 2801 /* XXX what now? */ 2802 return; 2803 } 2804 sitd->nextitd = nsitd; 2805 sitd->itd.itd_nextitd = LE(nsitd->physaddr); 2806 sitd->itd.itd_flags = LE( 2807 OHCI_ITD_NOCC | 2808 OHCI_ITD_SET_SF(iso->next) | 2809 OHCI_ITD_SET_DI(0) | 2810 OHCI_ITD_SET_FC(ncur)); 2811 sitd->itd.itd_be = LE(LE(sitd->itd.itd_bp0) + offs - 1); 2812 iso->next = iso->next + ncur; 2813 2814 opipe->tail.itd = nsitd; 2815 sed->ed.ed_tailp = LE(nsitd->physaddr); 2816 /* XXX update ED */ 2817 splx(s); 2818 } 2819 2820 usbd_status 2821 ohci_device_isoc_start(xfer) 2822 usbd_xfer_handle xfer; 2823 { 2824 printf("ohci_device_isoc_start: not implemented\n"); 2825 return (USBD_INVAL); 2826 } 2827 2828 void 2829 ohci_device_isoc_abort(xfer) 2830 usbd_xfer_handle xfer; 2831 { 2832 } 2833 2834 void 2835 ohci_device_isoc_done(xfer) 2836 usbd_xfer_handle xfer; 2837 { 2838 printf("ohci_device_isoc_done: not implemented\n"); 2839 } 2840 2841 usbd_status 2842 ohci_setup_isoc(pipe) 2843 usbd_pipe_handle pipe; 2844 { 2845 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2846 struct iso *iso = &opipe->u.iso; 2847 2848 iso->next = -1; 2849 iso->inuse = 0; 2850 2851 return (USBD_NORMAL_COMPLETION); 2852 } 2853 2854 void 2855 ohci_device_isoc_close(pipe) 2856 usbd_pipe_handle pipe; 2857 { 2858 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2859 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2860 2861 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 2862 ohci_close_pipe(pipe, sc->sc_isoc_head); 2863 ohci_free_sitd(sc, opipe->tail.itd); 2864 } 2865
Indexes created Thu Sep 25 16:09:42 GMT 2025