ohci.c revision 1.75
1 /* $NetBSD: ohci.c,v 1.75 2000/03/16 00:41:50 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (augustss (at) carlstedt.se) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe 45 * USB spec: http://www.usb.org/developers/data/usb11.pdf 46 */ 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/kernel.h> 53 #include <sys/device.h> 54 #include <sys/select.h> 55 #elif defined(__FreeBSD__) 56 #include <sys/module.h> 57 #include <sys/bus.h> 58 #include <machine/bus_pio.h> 59 #include <machine/bus_memio.h> 60 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 61 #include <machine/cpu.h> 62 #endif 63 #endif 64 #include <sys/proc.h> 65 #include <sys/queue.h> 66 67 #include <machine/bus.h> 68 #include <machine/endian.h> 69 70 #include <dev/usb/usb.h> 71 #include <dev/usb/usbdi.h> 72 #include <dev/usb/usbdivar.h> 73 #include <dev/usb/usb_mem.h> 74 #include <dev/usb/usb_quirks.h> 75 76 #include <dev/usb/ohcireg.h> 77 #include <dev/usb/ohcivar.h> 78 79 #if defined(__FreeBSD__) 80 #include <machine/clock.h> 81 82 #define delay(d) DELAY(d) 83 #endif 84 85 #if defined(__OpenBSD__) 86 struct cfdriver ohci_cd = { 87 NULL, "ohci", DV_DULL 88 }; 89 #endif 90 91 #ifdef OHCI_DEBUG 92 #define DPRINTF(x) if (ohcidebug) logprintf x 93 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 94 int ohcidebug = 0; 95 #else 96 #define DPRINTF(x) 97 #define DPRINTFN(n,x) 98 #endif 99 100 /* 101 * The OHCI controller is little endian, so on big endian machines 102 * the data strored in memory needs to be swapped. 103 */ 104 #if BYTE_ORDER == BIG_ENDIAN 105 #define LE(x) (bswap32(x)) 106 #else 107 #define LE(x) (x) 108 #endif 109 110 struct ohci_pipe; 111 112 static ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *)); 113 static void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *)); 114 115 static ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *)); 116 static void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *)); 117 118 static ohci_soft_itd_t *ohci_alloc_sitd __P((ohci_softc_t *)); 119 static void ohci_free_sitd __P((ohci_softc_t *,ohci_soft_itd_t *)); 120 121 #if 0 122 static void ohci_free_std_chain __P((ohci_softc_t *, 123 ohci_soft_td_t *, ohci_soft_td_t *)); 124 #endif 125 static usbd_status ohci_alloc_std_chain __P((struct ohci_pipe *, 126 ohci_softc_t *, int, int, u_int16_t, usb_dma_t *, 127 ohci_soft_td_t *, ohci_soft_td_t **)); 128 129 static void ohci_shutdown __P((void *v)); 130 static void ohci_power __P((int, void *)); 131 static usbd_status ohci_open __P((usbd_pipe_handle)); 132 static void ohci_poll __P((struct usbd_bus *)); 133 static void ohci_softintr __P((struct usbd_bus *)); 134 static void ohci_waitintr __P((ohci_softc_t *, 135 usbd_xfer_handle)); 136 static void ohci_rhsc __P((ohci_softc_t *, usbd_xfer_handle)); 137 138 static usbd_status ohci_device_request __P((usbd_xfer_handle xfer)); 139 static void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 140 static void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 141 static void ohci_hash_add_td __P((ohci_softc_t *, 142 ohci_soft_td_t *)); 143 static void ohci_hash_rem_td __P((ohci_softc_t *, 144 ohci_soft_td_t *)); 145 static ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, 146 ohci_physaddr_t)); 147 148 static usbd_status ohci_setup_isoc __P((usbd_pipe_handle pipe)); 149 static void ohci_device_isoc_enter __P((usbd_xfer_handle)); 150 151 static usbd_status ohci_allocm __P((struct usbd_bus *, usb_dma_t *, 152 u_int32_t)); 153 static void ohci_freem __P((struct usbd_bus *, usb_dma_t *)); 154 155 static usbd_xfer_handle ohci_allocx __P((struct usbd_bus *)); 156 static void ohci_freex __P((struct usbd_bus *, usbd_xfer_handle)); 157 158 static usbd_status ohci_root_ctrl_transfer __P((usbd_xfer_handle)); 159 static usbd_status ohci_root_ctrl_start __P((usbd_xfer_handle)); 160 static void ohci_root_ctrl_abort __P((usbd_xfer_handle)); 161 static void ohci_root_ctrl_close __P((usbd_pipe_handle)); 162 static void ohci_root_ctrl_done __P((usbd_xfer_handle)); 163 164 static usbd_status ohci_root_intr_transfer __P((usbd_xfer_handle)); 165 static usbd_status ohci_root_intr_start __P((usbd_xfer_handle)); 166 static void ohci_root_intr_abort __P((usbd_xfer_handle)); 167 static void ohci_root_intr_close __P((usbd_pipe_handle)); 168 static void ohci_root_intr_done __P((usbd_xfer_handle)); 169 170 static usbd_status ohci_device_ctrl_transfer __P((usbd_xfer_handle)); 171 static usbd_status ohci_device_ctrl_start __P((usbd_xfer_handle)); 172 static void ohci_device_ctrl_abort __P((usbd_xfer_handle)); 173 static void ohci_device_ctrl_close __P((usbd_pipe_handle)); 174 static void ohci_device_ctrl_done __P((usbd_xfer_handle)); 175 176 static usbd_status ohci_device_bulk_transfer __P((usbd_xfer_handle)); 177 static usbd_status ohci_device_bulk_start __P((usbd_xfer_handle)); 178 static void ohci_device_bulk_abort __P((usbd_xfer_handle)); 179 static void ohci_device_bulk_close __P((usbd_pipe_handle)); 180 static void ohci_device_bulk_done __P((usbd_xfer_handle)); 181 182 static usbd_status ohci_device_intr_transfer __P((usbd_xfer_handle)); 183 static usbd_status ohci_device_intr_start __P((usbd_xfer_handle)); 184 static void ohci_device_intr_abort __P((usbd_xfer_handle)); 185 static void ohci_device_intr_close __P((usbd_pipe_handle)); 186 static void ohci_device_intr_done __P((usbd_xfer_handle)); 187 188 static usbd_status ohci_device_isoc_transfer __P((usbd_xfer_handle)); 189 static usbd_status ohci_device_isoc_start __P((usbd_xfer_handle)); 190 static void ohci_device_isoc_abort __P((usbd_xfer_handle)); 191 static void ohci_device_isoc_close __P((usbd_pipe_handle)); 192 static void ohci_device_isoc_done __P((usbd_xfer_handle)); 193 194 static usbd_status ohci_device_setintr __P((ohci_softc_t *sc, 195 struct ohci_pipe *pipe, int ival)); 196 197 static int ohci_str __P((usb_string_descriptor_t *, int, char *)); 198 199 static void ohci_timeout __P((void *)); 200 static void ohci_rhsc_able __P((ohci_softc_t *, int)); 201 202 static void ohci_close_pipe __P((usbd_pipe_handle pipe, 203 ohci_soft_ed_t *head)); 204 static void ohci_abort_xfer __P((usbd_xfer_handle xfer, 205 usbd_status status)); 206 static void ohci_abort_xfer_end __P((void *)); 207 208 static void ohci_device_clear_toggle __P((usbd_pipe_handle pipe)); 209 static void ohci_noop __P((usbd_pipe_handle pipe)); 210 211 #ifdef OHCI_DEBUG 212 static void ohci_dumpregs __P((ohci_softc_t *)); 213 static void ohci_dump_tds __P((ohci_soft_td_t *)); 214 static void ohci_dump_td __P((ohci_soft_td_t *)); 215 static void ohci_dump_ed __P((ohci_soft_ed_t *)); 216 #endif 217 218 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 219 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 220 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 221 222 /* Reverse the bits in a value 0 .. 31 */ 223 static u_int8_t revbits[OHCI_NO_INTRS] = 224 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 225 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 226 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 227 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 228 229 struct ohci_pipe { 230 struct usbd_pipe pipe; 231 ohci_soft_ed_t *sed; 232 union { 233 ohci_soft_td_t *td; 234 ohci_soft_itd_t *itd; 235 } tail; 236 /* Info needed for different pipe kinds. */ 237 union { 238 /* Control pipe */ 239 struct { 240 usb_dma_t reqdma; 241 u_int length; 242 ohci_soft_td_t *setup, *data, *stat; 243 } ctl; 244 /* Interrupt pipe */ 245 struct { 246 int nslots; 247 int pos; 248 } intr; 249 /* Bulk pipe */ 250 struct { 251 u_int length; 252 int isread; 253 } bulk; 254 /* Iso pipe */ 255 struct iso { 256 int next, inuse; 257 } iso; 258 } u; 259 }; 260 261 #define OHCI_INTR_ENDPT 1 262 263 static struct usbd_bus_methods ohci_bus_methods = { 264 ohci_open, 265 ohci_softintr, 266 ohci_poll, 267 ohci_allocm, 268 ohci_freem, 269 ohci_allocx, 270 ohci_freex, 271 }; 272 273 static struct usbd_pipe_methods ohci_root_ctrl_methods = { 274 ohci_root_ctrl_transfer, 275 ohci_root_ctrl_start, 276 ohci_root_ctrl_abort, 277 ohci_root_ctrl_close, 278 ohci_noop, 279 ohci_root_ctrl_done, 280 }; 281 282 static struct usbd_pipe_methods ohci_root_intr_methods = { 283 ohci_root_intr_transfer, 284 ohci_root_intr_start, 285 ohci_root_intr_abort, 286 ohci_root_intr_close, 287 ohci_noop, 288 ohci_root_intr_done, 289 }; 290 291 static struct usbd_pipe_methods ohci_device_ctrl_methods = { 292 ohci_device_ctrl_transfer, 293 ohci_device_ctrl_start, 294 ohci_device_ctrl_abort, 295 ohci_device_ctrl_close, 296 ohci_noop, 297 ohci_device_ctrl_done, 298 }; 299 300 static struct usbd_pipe_methods ohci_device_intr_methods = { 301 ohci_device_intr_transfer, 302 ohci_device_intr_start, 303 ohci_device_intr_abort, 304 ohci_device_intr_close, 305 ohci_device_clear_toggle, 306 ohci_device_intr_done, 307 }; 308 309 static struct usbd_pipe_methods ohci_device_bulk_methods = { 310 ohci_device_bulk_transfer, 311 ohci_device_bulk_start, 312 ohci_device_bulk_abort, 313 ohci_device_bulk_close, 314 ohci_device_clear_toggle, 315 ohci_device_bulk_done, 316 }; 317 318 static struct usbd_pipe_methods ohci_device_isoc_methods = { 319 ohci_device_isoc_transfer, 320 ohci_device_isoc_start, 321 ohci_device_isoc_abort, 322 ohci_device_isoc_close, 323 ohci_noop, 324 ohci_device_isoc_done, 325 }; 326 327 #if defined(__NetBSD__) || defined(__OpenBSD__) 328 int 329 ohci_activate(self, act) 330 device_ptr_t self; 331 enum devact act; 332 { 333 struct ohci_softc *sc = (struct ohci_softc *)self; 334 int rv = 0; 335 336 switch (act) { 337 case DVACT_ACTIVATE: 338 return (EOPNOTSUPP); 339 break; 340 341 case DVACT_DEACTIVATE: 342 if (sc->sc_child != NULL) 343 rv = config_deactivate(sc->sc_child); 344 break; 345 } 346 return (rv); 347 } 348 349 int 350 ohci_detach(sc, flags) 351 struct ohci_softc *sc; 352 int flags; 353 { 354 int rv = 0; 355 356 if (sc->sc_child != NULL) 357 rv = config_detach(sc->sc_child, flags); 358 359 if (rv != 0) 360 return (rv); 361 362 #if defined(__NetBSD__) || defined(__OpenBSD__) 363 powerhook_disestablish(sc->sc_powerhook); 364 shutdownhook_disestablish(sc->sc_shutdownhook); 365 #endif 366 367 /* free data structures XXX */ 368 369 return (rv); 370 } 371 #endif 372 373 ohci_soft_ed_t * 374 ohci_alloc_sed(sc) 375 ohci_softc_t *sc; 376 { 377 ohci_soft_ed_t *sed; 378 usbd_status err; 379 int i, offs; 380 usb_dma_t dma; 381 382 if (sc->sc_freeeds == NULL) { 383 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 384 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 385 OHCI_ED_ALIGN, &dma); 386 if (err) 387 return (0); 388 for(i = 0; i < OHCI_SED_CHUNK; i++) { 389 offs = i * OHCI_SED_SIZE; 390 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 391 sed->physaddr = DMAADDR(&dma) + offs; 392 sed->next = sc->sc_freeeds; 393 sc->sc_freeeds = sed; 394 } 395 } 396 sed = sc->sc_freeeds; 397 sc->sc_freeeds = sed->next; 398 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 399 sed->next = 0; 400 return (sed); 401 } 402 403 void 404 ohci_free_sed(sc, sed) 405 ohci_softc_t *sc; 406 ohci_soft_ed_t *sed; 407 { 408 sed->next = sc->sc_freeeds; 409 sc->sc_freeeds = sed; 410 } 411 412 ohci_soft_td_t * 413 ohci_alloc_std(sc) 414 ohci_softc_t *sc; 415 { 416 ohci_soft_td_t *std; 417 usbd_status err; 418 int i, offs; 419 usb_dma_t dma; 420 int s; 421 422 if (sc->sc_freetds == NULL) { 423 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 424 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 425 OHCI_TD_ALIGN, &dma); 426 if (err) 427 return (0); 428 s = splusb(); 429 for(i = 0; i < OHCI_STD_CHUNK; i++) { 430 offs = i * OHCI_STD_SIZE; 431 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 432 std->physaddr = DMAADDR(&dma) + offs; 433 std->nexttd = sc->sc_freetds; 434 sc->sc_freetds = std; 435 } 436 splx(s); 437 } 438 439 s = splusb(); 440 std = sc->sc_freetds; 441 sc->sc_freetds = std->nexttd; 442 memset(&std->td, 0, sizeof(ohci_td_t)); 443 std->nexttd = 0; 444 445 ohci_hash_add_td(sc, std); 446 splx(s); 447 448 return (std); 449 } 450 451 void 452 ohci_free_std(sc, std) 453 ohci_softc_t *sc; 454 ohci_soft_td_t *std; 455 { 456 int s; 457 458 s = splusb(); 459 ohci_hash_rem_td(sc, std); 460 461 std->nexttd = sc->sc_freetds; 462 sc->sc_freetds = std; 463 splx(s); 464 } 465 466 usbd_status 467 ohci_alloc_std_chain(opipe, sc, alen, rd, flags, dma, sp, ep) 468 struct ohci_pipe *opipe; 469 ohci_softc_t *sc; 470 int alen, rd; 471 u_int16_t flags; 472 usb_dma_t *dma; 473 ohci_soft_td_t *sp, **ep; 474 { 475 ohci_soft_td_t *next, *cur; 476 ohci_physaddr_t dataphys, dataphysend; 477 u_int32_t intr, tdflags; 478 int len, curlen; 479 480 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 481 482 len = alen; 483 cur = sp; 484 dataphys = DMAADDR(dma); 485 dataphysend = OHCI_PAGE(dataphys + len - 1); 486 tdflags = 487 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 488 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | 489 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0); 490 491 for (;;) { 492 next = ohci_alloc_std(sc); 493 if (next == NULL) 494 goto nomem; 495 496 /* The OHCI hardware can handle at most one page crossing. */ 497 if (OHCI_PAGE(dataphys) == dataphysend || 498 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 499 /* we can handle it in this TD */ 500 curlen = len; 501 } else { 502 /* must use multiple TDs, fill as much as possible. */ 503 curlen = 2 * OHCI_PAGE_SIZE - 504 (dataphys & (OHCI_PAGE_SIZE-1)); 505 } 506 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 507 "dataphysend=0x%08x len=%d curlen=%d\n", 508 dataphys, dataphysend, 509 len, curlen)); 510 len -= curlen; 511 512 intr = len == 0 ? OHCI_TD_SET_DI(1) : OHCI_TD_NOINTR; 513 cur->td.td_flags = LE(tdflags | intr); 514 cur->td.td_cbp = LE(dataphys); 515 cur->nexttd = next; 516 cur->td.td_nexttd = LE(next->physaddr); 517 cur->td.td_be = LE(dataphys + curlen - 1); 518 cur->len = curlen; 519 cur->flags = OHCI_ADD_LEN; 520 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 521 dataphys, dataphys + curlen - 1)); 522 if (len == 0) 523 break; 524 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 525 dataphys += curlen; 526 cur = next; 527 } 528 if ((flags & USBD_FORCE_SHORT_XFER) && 529 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 530 /* Force a 0 length transfer at the end. */ 531 532 cur->td.td_flags = LE(tdflags | OHCI_TD_NOINTR); 533 cur = next; 534 535 next = ohci_alloc_std(sc); 536 if (next == NULL) 537 goto nomem; 538 539 cur->td.td_flags = LE(tdflags | OHCI_TD_SET_DI(1)); 540 cur->td.td_cbp = 0; /* indicate 0 length packet */ 541 cur->nexttd = next; 542 cur->td.td_nexttd = LE(next->physaddr); 543 cur->td.td_be = ~0; 544 cur->len = 0; 545 cur->flags = 0; 546 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 547 } 548 cur->flags |= OHCI_CALL_DONE; 549 *ep = next; 550 551 return (USBD_NORMAL_COMPLETION); 552 553 nomem: 554 /* XXX free chain */ 555 return (USBD_NOMEM); 556 } 557 558 #if 0 559 static void 560 ohci_free_std_chain(sc, std, stdend) 561 ohci_softc_t *sc; 562 ohci_soft_td_t *std; 563 ohci_soft_td_t *stdend; 564 { 565 ohci_soft_td_t *p; 566 567 for (; std != stdend; std = p) { 568 p = std->nexttd; 569 ohci_free_std(sc, std); 570 } 571 } 572 #endif 573 574 ohci_soft_itd_t * 575 ohci_alloc_sitd(sc) 576 ohci_softc_t *sc; 577 { 578 ohci_soft_itd_t *sitd; 579 usbd_status err; 580 int i, offs; 581 usb_dma_t dma; 582 583 if (sc->sc_freeitds == NULL) { 584 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 585 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 586 OHCI_TD_ALIGN, &dma); 587 if (err) 588 return (0); 589 for(i = 0; i < OHCI_STD_CHUNK; i++) { 590 offs = i * OHCI_STD_SIZE; 591 sitd = (ohci_soft_itd_t *)((char*)KERNADDR(&dma)+offs); 592 sitd->physaddr = DMAADDR(&dma) + offs; 593 sitd->nextitd = sc->sc_freeitds; 594 sc->sc_freeitds = sitd; 595 } 596 } 597 sitd = sc->sc_freeitds; 598 sc->sc_freeitds = sitd->nextitd; 599 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 600 sitd->nextitd = 0; 601 return (sitd); 602 } 603 604 void 605 ohci_free_sitd(sc, sitd) 606 ohci_softc_t *sc; 607 ohci_soft_itd_t *sitd; 608 { 609 sitd->nextitd = sc->sc_freeitds; 610 sc->sc_freeitds = sitd; 611 } 612 613 usbd_status 614 ohci_init(sc) 615 ohci_softc_t *sc; 616 { 617 ohci_soft_ed_t *sed, *psed; 618 usbd_status err; 619 int i; 620 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 621 622 DPRINTF(("ohci_init: start\n")); 623 #if defined(__OpenBSD__) 624 printf(","); 625 #else 626 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 627 #endif 628 rev = OREAD4(sc, OHCI_REVISION); 629 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 630 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 631 632 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 633 printf("%s: unsupported OHCI revision\n", 634 USBDEVNAME(sc->sc_bus.bdev)); 635 sc->sc_bus.usbrev = USBREV_UNKNOWN; 636 return (USBD_INVAL); 637 } 638 sc->sc_bus.usbrev = USBREV_1_0; 639 640 for (i = 0; i < OHCI_HASH_SIZE; i++) 641 LIST_INIT(&sc->sc_hash_tds[i]); 642 643 SIMPLEQ_INIT(&sc->sc_free_xfers); 644 645 /* XXX determine alignment by R/W */ 646 /* Allocate the HCCA area. */ 647 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 648 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 649 if (err) 650 return (err); 651 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 652 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 653 654 sc->sc_eintrs = OHCI_NORMAL_INTRS; 655 656 /* Allocate dummy ED that starts the control list. */ 657 sc->sc_ctrl_head = ohci_alloc_sed(sc); 658 if (sc->sc_ctrl_head == NULL) { 659 err = USBD_NOMEM; 660 goto bad1; 661 } 662 sc->sc_ctrl_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 663 664 /* Allocate dummy ED that starts the bulk list. */ 665 sc->sc_bulk_head = ohci_alloc_sed(sc); 666 if (sc->sc_bulk_head == NULL) { 667 err = USBD_NOMEM; 668 goto bad2; 669 } 670 sc->sc_bulk_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 671 672 /* Allocate dummy ED that starts the isochronous list. */ 673 sc->sc_isoc_head = ohci_alloc_sed(sc); 674 if (sc->sc_isoc_head == NULL) { 675 err = USBD_NOMEM; 676 goto bad3; 677 } 678 sc->sc_isoc_head->ed.ed_flags |= LE(OHCI_ED_SKIP); 679 680 /* Allocate all the dummy EDs that make up the interrupt tree. */ 681 for (i = 0; i < OHCI_NO_EDS; i++) { 682 sed = ohci_alloc_sed(sc); 683 if (sed == NULL) { 684 while (--i >= 0) 685 ohci_free_sed(sc, sc->sc_eds[i]); 686 err = USBD_NOMEM; 687 goto bad4; 688 } 689 /* All ED fields are set to 0. */ 690 sc->sc_eds[i] = sed; 691 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 692 if (i != 0) 693 psed = sc->sc_eds[(i-1) / 2]; 694 else 695 psed= sc->sc_isoc_head; 696 sed->next = psed; 697 sed->ed.ed_nexted = LE(psed->physaddr); 698 } 699 /* 700 * Fill HCCA interrupt table. The bit reversal is to get 701 * the tree set up properly to spread the interrupts. 702 */ 703 for (i = 0; i < OHCI_NO_INTRS; i++) 704 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 705 LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 706 707 #ifdef OHCI_DEBUG 708 if (ohcidebug > 15) { 709 for (i = 0; i < OHCI_NO_EDS; i++) { 710 printf("ed#%d ", i); 711 ohci_dump_ed(sc->sc_eds[i]); 712 } 713 printf("iso "); 714 ohci_dump_ed(sc->sc_isoc_head); 715 } 716 #endif 717 718 /* Determine in what context we are running. */ 719 ctl = OREAD4(sc, OHCI_CONTROL); 720 if (ctl & OHCI_IR) { 721 /* SMM active, request change */ 722 DPRINTF(("ohci_init: SMM active, request owner change\n")); 723 s = OREAD4(sc, OHCI_COMMAND_STATUS); 724 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 725 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 726 usb_delay_ms(&sc->sc_bus, 1); 727 ctl = OREAD4(sc, OHCI_CONTROL); 728 } 729 if ((ctl & OHCI_IR) == 0) { 730 printf("%s: SMM does not respond, resetting\n", 731 USBDEVNAME(sc->sc_bus.bdev)); 732 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 733 goto reset; 734 } 735 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 736 /* BIOS started controller. */ 737 DPRINTF(("ohci_init: BIOS active\n")); 738 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 739 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 740 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 741 } 742 } else { 743 DPRINTF(("ohci_init: cold started\n")); 744 reset: 745 /* Controller was cold started. */ 746 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 747 } 748 749 /* 750 * This reset should not be necessary according to the OHCI spec, but 751 * without it some controllers do not start. 752 */ 753 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 754 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 755 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 756 757 /* We now own the host controller and the bus has been reset. */ 758 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 759 760 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 761 /* Nominal time for a reset is 10 us. */ 762 for (i = 0; i < 10; i++) { 763 delay(10); 764 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 765 if (!hcr) 766 break; 767 } 768 if (hcr) { 769 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 770 err = USBD_IOERROR; 771 goto bad5; 772 } 773 #ifdef OHCI_DEBUG 774 if (ohcidebug > 15) 775 ohci_dumpregs(sc); 776 #endif 777 778 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 779 780 /* Set up HC registers. */ 781 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 782 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 783 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 784 /* disable all interrupts and then switch on all desired interrupts */ 785 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 786 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 787 /* switch on desired functional features */ 788 ctl = OREAD4(sc, OHCI_CONTROL); 789 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 790 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 791 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 792 /* And finally start it! */ 793 OWRITE4(sc, OHCI_CONTROL, ctl); 794 795 /* 796 * The controller is now OPERATIONAL. Set a some final 797 * registers that should be set earlier, but that the 798 * controller ignores when in the SUSPEND state. 799 */ 800 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 801 fm |= OHCI_FSMPS(ival) | ival; 802 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 803 per = OHCI_PERIODIC(ival); /* 90% periodic */ 804 OWRITE4(sc, OHCI_PERIODIC_START, per); 805 806 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 807 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 808 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 809 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 810 usb_delay_ms(&sc->sc_bus, 5); 811 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 812 813 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 814 815 #ifdef OHCI_DEBUG 816 if (ohcidebug > 5) 817 ohci_dumpregs(sc); 818 #endif 819 820 /* Set up the bus struct. */ 821 sc->sc_bus.methods = &ohci_bus_methods; 822 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 823 824 #if defined(__NetBSD__) || defined(__OpenBSD__) 825 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 826 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 827 #endif 828 829 return (USBD_NORMAL_COMPLETION); 830 831 bad5: 832 for (i = 0; i < OHCI_NO_EDS; i++) 833 ohci_free_sed(sc, sc->sc_eds[i]); 834 bad4: 835 ohci_free_sed(sc, sc->sc_isoc_head); 836 bad3: 837 ohci_free_sed(sc, sc->sc_ctrl_head); 838 bad2: 839 ohci_free_sed(sc, sc->sc_bulk_head); 840 bad1: 841 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 842 return (err); 843 } 844 845 usbd_status 846 ohci_allocm(bus, dma, size) 847 struct usbd_bus *bus; 848 usb_dma_t *dma; 849 u_int32_t size; 850 { 851 #if defined(__NetBSD__) || defined(__OpenBSD__) 852 struct ohci_softc *sc = (struct ohci_softc *)bus; 853 #endif 854 855 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 856 } 857 858 void 859 ohci_freem(bus, dma) 860 struct usbd_bus *bus; 861 usb_dma_t *dma; 862 { 863 #if defined(__NetBSD__) || defined(__OpenBSD__) 864 struct ohci_softc *sc = (struct ohci_softc *)bus; 865 #endif 866 867 usb_freemem(&sc->sc_bus, dma); 868 } 869 870 usbd_xfer_handle 871 ohci_allocx(bus) 872 struct usbd_bus *bus; 873 { 874 struct ohci_softc *sc = (struct ohci_softc *)bus; 875 usbd_xfer_handle xfer; 876 877 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 878 if (xfer != NULL) 879 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 880 else 881 xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT); 882 if (xfer != NULL) 883 memset(xfer, 0, sizeof *xfer); 884 return (xfer); 885 } 886 887 void 888 ohci_freex(bus, xfer) 889 struct usbd_bus *bus; 890 usbd_xfer_handle xfer; 891 { 892 struct ohci_softc *sc = (struct ohci_softc *)bus; 893 894 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 895 } 896 897 /* 898 * Shut down the controller when the system is going down. 899 */ 900 void 901 ohci_shutdown(v) 902 void *v; 903 { 904 ohci_softc_t *sc = v; 905 906 DPRINTF(("ohci_shutdown: stopping the HC\n")); 907 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 908 } 909 910 /* 911 * Handle suspend/resume. 912 * 913 * We need to switch to polling mode here, because this routine is 914 * called from an intterupt context. This is all right since we 915 * are almost suspended anyway. 916 */ 917 void 918 ohci_power(why, v) 919 int why; 920 void *v; 921 { 922 #ifdef OHCI_DEBUG 923 ohci_softc_t *sc = v; 924 925 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 926 /* XXX should suspend/resume */ 927 ohci_dumpregs(sc); 928 #endif 929 } 930 931 #ifdef OHCI_DEBUG 932 void 933 ohci_dumpregs(sc) 934 ohci_softc_t *sc; 935 { 936 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 937 OREAD4(sc, OHCI_REVISION), 938 OREAD4(sc, OHCI_CONTROL), 939 OREAD4(sc, OHCI_COMMAND_STATUS))); 940 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 941 OREAD4(sc, OHCI_INTERRUPT_STATUS), 942 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 943 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 944 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 945 OREAD4(sc, OHCI_HCCA), 946 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 947 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 948 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 949 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 950 OREAD4(sc, OHCI_BULK_HEAD_ED), 951 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 952 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 953 OREAD4(sc, OHCI_DONE_HEAD), 954 OREAD4(sc, OHCI_FM_INTERVAL), 955 OREAD4(sc, OHCI_FM_REMAINING))); 956 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 957 OREAD4(sc, OHCI_FM_NUMBER), 958 OREAD4(sc, OHCI_PERIODIC_START), 959 OREAD4(sc, OHCI_LS_THRESHOLD))); 960 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 961 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 962 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 963 OREAD4(sc, OHCI_RH_STATUS))); 964 DPRINTF((" port1=0x%08x port2=0x%08x\n", 965 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 966 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 967 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 968 LE(sc->sc_hcca->hcca_frame_number), 969 LE(sc->sc_hcca->hcca_done_head))); 970 } 971 #endif 972 973 static int ohci_intr1 __P((ohci_softc_t *)); 974 975 int 976 ohci_intr(p) 977 void *p; 978 { 979 ohci_softc_t *sc = p; 980 981 /* If we get an interrupt while polling, then just ignore it. */ 982 if (sc->sc_bus.use_polling) { 983 #ifdef DIAGNOSTIC 984 printf("ohci_intr: ignored interrupt while polling\n"); 985 #endif 986 return (0); 987 } 988 989 return (ohci_intr1(sc)); 990 } 991 992 static int 993 ohci_intr1(sc) 994 ohci_softc_t *sc; 995 { 996 u_int32_t intrs, eintrs; 997 ohci_physaddr_t done; 998 999 /* In case the interrupt occurs before initialization has completed. */ 1000 if (sc == NULL || sc->sc_hcca == NULL) { 1001 #ifdef DIAGNOSTIC 1002 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1003 #endif 1004 return (0); 1005 } 1006 1007 intrs = 0; 1008 done = LE(sc->sc_hcca->hcca_done_head); 1009 if (done != 0) { 1010 if (done & ~OHCI_DONE_INTRS) 1011 intrs = OHCI_WDH; 1012 if (done & OHCI_DONE_INTRS) 1013 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1014 } else 1015 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1016 1017 if (!intrs) 1018 return (0); 1019 1020 intrs &= ~OHCI_MIE; 1021 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1022 eintrs = intrs & sc->sc_eintrs; 1023 if (!eintrs) 1024 return (0); 1025 1026 sc->sc_bus.intr_context++; 1027 sc->sc_bus.no_intrs++; 1028 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1029 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1030 (u_int)eintrs)); 1031 1032 if (eintrs & OHCI_SO) { 1033 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev)); 1034 /* XXX do what */ 1035 intrs &= ~OHCI_SO; 1036 } 1037 if (eintrs & OHCI_WDH) { 1038 done &= ~OHCI_DONE_INTRS; 1039 if (sc->sc_done == 0) 1040 sc->sc_done = done; 1041 else { 1042 /* Tack on at the end of sc_done. */ 1043 ohci_physaddr_t ldone; 1044 ohci_soft_td_t *std; 1045 1046 for (ldone = sc->sc_done; ldone != 0; 1047 ldone = LE(std->td.td_nexttd)) 1048 std = ohci_hash_find_td(sc, ldone); 1049 std->td.td_nexttd = LE(done); 1050 } 1051 sc->sc_hcca->hcca_done_head = 0; 1052 usb_schedsoftintr(&sc->sc_bus); 1053 intrs &= ~OHCI_WDH; 1054 } 1055 if (eintrs & OHCI_RD) { 1056 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1057 /* XXX process resume detect */ 1058 } 1059 if (eintrs & OHCI_UE) { 1060 printf("%s: unrecoverable error, controller halted\n", 1061 USBDEVNAME(sc->sc_bus.bdev)); 1062 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1063 /* XXX what else */ 1064 } 1065 if (eintrs & OHCI_RHSC) { 1066 ohci_rhsc(sc, sc->sc_intrxfer); 1067 intrs &= ~OHCI_RHSC; 1068 1069 /* 1070 * Disable RHSC interrupt for now, because it will be 1071 * on until the port has been reset. 1072 */ 1073 ohci_rhsc_able(sc, 0); 1074 } 1075 1076 sc->sc_bus.intr_context--; 1077 1078 /* Block unprocessed interrupts. XXX */ 1079 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 1080 sc->sc_eintrs &= ~intrs; 1081 1082 return (1); 1083 } 1084 1085 void 1086 ohci_rhsc_able(sc, on) 1087 ohci_softc_t *sc; 1088 int on; 1089 { 1090 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1091 if (on) { 1092 sc->sc_eintrs |= OHCI_RHSC; 1093 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1094 } else { 1095 sc->sc_eintrs &= ~OHCI_RHSC; 1096 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1097 } 1098 } 1099 1100 #ifdef OHCI_DEBUG 1101 char *ohci_cc_strs[] = { 1102 "NO_ERROR", 1103 "CRC", 1104 "BIT_STUFFING", 1105 "DATA_TOGGLE_MISMATCH", 1106 "STALL", 1107 "DEVICE_NOT_RESPONDING", 1108 "PID_CHECK_FAILURE", 1109 "UNEXPECTED_PID", 1110 "DATA_OVERRUN", 1111 "DATA_UNDERRUN", 1112 "BUFFER_OVERRUN", 1113 "BUFFER_UNDERRUN", 1114 "reserved", 1115 "reserved", 1116 "NOT_ACCESSED", 1117 "NOT_ACCESSED", 1118 }; 1119 #endif 1120 1121 void 1122 ohci_softintr(bus) 1123 struct usbd_bus *bus; 1124 { 1125 ohci_softc_t *sc = (ohci_softc_t *)bus; 1126 ohci_physaddr_t done; 1127 ohci_soft_td_t *std, *sdone, *stdnext; 1128 usbd_xfer_handle xfer; 1129 int len, cc, s; 1130 1131 sc->sc_bus.intr_context++; 1132 1133 s = splhardusb(); 1134 done = sc->sc_done; 1135 sc->sc_done = 0; 1136 splx(s); 1137 1138 DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done)); 1139 1140 /* Reverse the done list. */ 1141 for (sdone = NULL; done != 0; done = LE(std->td.td_nexttd)) { 1142 std = ohci_hash_find_td(sc, done); 1143 std->dnext = sdone; 1144 sdone = std; 1145 } 1146 1147 #ifdef OHCI_DEBUG 1148 if (ohcidebug > 10) { 1149 DPRINTF(("ohci_process_done: TD done:\n")); 1150 ohci_dump_tds(sdone); 1151 } 1152 #endif 1153 1154 for (std = sdone; std; std = stdnext) { 1155 xfer = std->xfer; 1156 stdnext = std->dnext; 1157 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1158 std, xfer, xfer ? xfer->hcpriv : 0)); 1159 if (xfer == NULL) { 1160 /* xfer == NULL: There seems to be no xfer associated 1161 * with this TD. It is tailp that happened to end up on 1162 * the done queue. 1163 */ 1164 continue; 1165 } 1166 cc = OHCI_TD_GET_CC(LE(std->td.td_flags)); 1167 usb_untimeout(ohci_timeout, xfer, xfer->timo_handle); 1168 if (xfer->status == USBD_CANCELLED || 1169 xfer->status == USBD_TIMEOUT) { 1170 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1171 xfer)); 1172 /* Handled by abort routine. */ 1173 } else if (cc == OHCI_CC_NO_ERROR) { 1174 len = std->len; 1175 if (std->td.td_cbp != 0) 1176 len -= LE(std->td.td_be) - 1177 LE(std->td.td_cbp) + 1; 1178 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", 1179 len, std->flags)); 1180 if (std->flags & OHCI_ADD_LEN) 1181 xfer->actlen += len; 1182 if (std->flags & OHCI_CALL_DONE) { 1183 xfer->status = USBD_NORMAL_COMPLETION; 1184 usb_transfer_complete(xfer); 1185 } 1186 ohci_free_std(sc, std); 1187 } else { 1188 /* 1189 * Endpoint is halted. First unlink all the TDs 1190 * belonging to the failed transfer, and then restart 1191 * the endpoint. 1192 */ 1193 ohci_soft_td_t *p, *n; 1194 struct ohci_pipe *opipe = 1195 (struct ohci_pipe *)xfer->pipe; 1196 1197 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1198 OHCI_TD_GET_CC(LE(std->td.td_flags)), 1199 ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td.td_flags))])); 1200 1201 /* remove TDs */ 1202 for (p = std; p->xfer == xfer; p = n) { 1203 n = p->nexttd; 1204 ohci_free_std(sc, p); 1205 } 1206 1207 /* clear halt */ 1208 opipe->sed->ed.ed_headp = LE(p->physaddr); 1209 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1210 1211 if (cc == OHCI_CC_STALL) 1212 xfer->status = USBD_STALLED; 1213 else 1214 xfer->status = USBD_IOERROR; 1215 usb_transfer_complete(xfer); 1216 } 1217 } 1218 1219 sc->sc_bus.intr_context--; 1220 } 1221 1222 void 1223 ohci_device_ctrl_done(xfer) 1224 usbd_xfer_handle xfer; 1225 { 1226 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1227 1228 #ifdef DIAGNOSTIC 1229 if (!(xfer->rqflags & URQ_REQUEST)) { 1230 panic("ohci_ctrl_done: not a request\n"); 1231 } 1232 #endif 1233 xfer->hcpriv = NULL; 1234 } 1235 1236 void 1237 ohci_device_intr_done(xfer) 1238 usbd_xfer_handle xfer; 1239 { 1240 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1241 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1242 ohci_soft_ed_t *sed = opipe->sed; 1243 ohci_soft_td_t *data, *tail; 1244 1245 1246 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1247 xfer, xfer->actlen)); 1248 1249 xfer->hcpriv = NULL; 1250 1251 if (xfer->pipe->repeat) { 1252 data = opipe->tail.td; 1253 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1254 if (tail == NULL) { 1255 xfer->status = USBD_NOMEM; 1256 return; 1257 } 1258 tail->xfer = NULL; 1259 1260 data->td.td_flags = LE( 1261 OHCI_TD_IN | OHCI_TD_NOCC | 1262 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1263 if (xfer->flags & USBD_SHORT_XFER_OK) 1264 data->td.td_flags |= LE(OHCI_TD_R); 1265 data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf)); 1266 data->nexttd = tail; 1267 data->td.td_nexttd = LE(tail->physaddr); 1268 data->td.td_be = LE(LE(data->td.td_cbp) + xfer->length - 1); 1269 data->len = xfer->length; 1270 data->xfer = xfer; 1271 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1272 xfer->hcpriv = data; 1273 xfer->actlen = 0; 1274 1275 sed->ed.ed_tailp = LE(tail->physaddr); 1276 opipe->tail.td = tail; 1277 } 1278 } 1279 1280 void 1281 ohci_device_bulk_done(xfer) 1282 usbd_xfer_handle xfer; 1283 { 1284 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1285 xfer, xfer->actlen)); 1286 1287 xfer->hcpriv = NULL; 1288 } 1289 1290 void 1291 ohci_rhsc(sc, xfer) 1292 ohci_softc_t *sc; 1293 usbd_xfer_handle xfer; 1294 { 1295 usbd_pipe_handle pipe; 1296 struct ohci_pipe *opipe; 1297 u_char *p; 1298 int i, m; 1299 int hstatus; 1300 1301 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1302 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1303 sc, xfer, hstatus)); 1304 1305 if (xfer == NULL) { 1306 /* Just ignore the change. */ 1307 return; 1308 } 1309 1310 pipe = xfer->pipe; 1311 opipe = (struct ohci_pipe *)pipe; 1312 1313 p = KERNADDR(&xfer->dmabuf); 1314 m = min(sc->sc_noport, xfer->length * 8 - 1); 1315 memset(p, 0, xfer->length); 1316 for (i = 1; i <= m; i++) { 1317 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1318 p[i/8] |= 1 << (i%8); 1319 } 1320 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1321 xfer->actlen = xfer->length; 1322 xfer->status = USBD_NORMAL_COMPLETION; 1323 1324 usb_transfer_complete(xfer); 1325 } 1326 1327 void 1328 ohci_root_intr_done(xfer) 1329 usbd_xfer_handle xfer; 1330 { 1331 xfer->hcpriv = NULL; 1332 } 1333 1334 void 1335 ohci_root_ctrl_done(xfer) 1336 usbd_xfer_handle xfer; 1337 { 1338 xfer->hcpriv = NULL; 1339 } 1340 1341 /* 1342 * Wait here until controller claims to have an interrupt. 1343 * Then call ohci_intr and return. Use timeout to avoid waiting 1344 * too long. 1345 */ 1346 void 1347 ohci_waitintr(sc, xfer) 1348 ohci_softc_t *sc; 1349 usbd_xfer_handle xfer; 1350 { 1351 int timo = xfer->timeout; 1352 int usecs; 1353 u_int32_t intrs; 1354 1355 xfer->status = USBD_IN_PROGRESS; 1356 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1357 usb_delay_ms(&sc->sc_bus, 1); 1358 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1359 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1360 #ifdef OHCI_DEBUG 1361 if (ohcidebug > 15) 1362 ohci_dumpregs(sc); 1363 #endif 1364 if (intrs) { 1365 ohci_intr1(sc); 1366 if (xfer->status != USBD_IN_PROGRESS) 1367 return; 1368 } 1369 } 1370 1371 /* Timeout */ 1372 DPRINTF(("ohci_waitintr: timeout\n")); 1373 xfer->status = USBD_TIMEOUT; 1374 usb_transfer_complete(xfer); 1375 /* XXX should free TD */ 1376 } 1377 1378 void 1379 ohci_poll(bus) 1380 struct usbd_bus *bus; 1381 { 1382 ohci_softc_t *sc = (ohci_softc_t *)bus; 1383 1384 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1385 ohci_intr1(sc); 1386 } 1387 1388 usbd_status 1389 ohci_device_request(xfer) 1390 usbd_xfer_handle xfer; 1391 { 1392 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1393 usb_device_request_t *req = &xfer->request; 1394 usbd_device_handle dev = opipe->pipe.device; 1395 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1396 int addr = dev->address; 1397 ohci_soft_td_t *setup, *data = 0, *stat, *next, *tail; 1398 ohci_soft_ed_t *sed; 1399 int isread; 1400 int len; 1401 usbd_status err; 1402 int s; 1403 1404 isread = req->bmRequestType & UT_READ; 1405 len = UGETW(req->wLength); 1406 1407 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1408 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1409 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1410 UGETW(req->wIndex), len, addr, 1411 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1412 1413 setup = opipe->tail.td; 1414 stat = ohci_alloc_std(sc); 1415 if (stat == NULL) { 1416 err = USBD_NOMEM; 1417 goto bad1; 1418 } 1419 tail = ohci_alloc_std(sc); 1420 if (tail == NULL) { 1421 err = USBD_NOMEM; 1422 goto bad2; 1423 } 1424 tail->xfer = NULL; 1425 1426 sed = opipe->sed; 1427 opipe->u.ctl.length = len; 1428 1429 /* Update device address and length since they may have changed. */ 1430 /* XXX This only needs to be done once, but it's too early in open. */ 1431 sed->ed.ed_flags = LE( 1432 (LE(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1433 OHCI_ED_SET_FA(addr) | 1434 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1435 1436 /* Set up data transaction */ 1437 if (len != 0) { 1438 data = ohci_alloc_std(sc); 1439 if (data == NULL) { 1440 err = USBD_NOMEM; 1441 goto bad3; 1442 } 1443 data->td.td_flags = LE( 1444 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC | 1445 OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR | 1446 (xfer->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0)); 1447 data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf)); 1448 data->nexttd = stat; 1449 data->td.td_nexttd = LE(stat->physaddr); 1450 data->td.td_be = LE(LE(data->td.td_cbp) + len - 1); 1451 data->len = len; 1452 data->xfer = xfer; 1453 data->flags = OHCI_ADD_LEN; 1454 1455 next = data; 1456 stat->flags = OHCI_CALL_DONE; 1457 } else { 1458 next = stat; 1459 /* XXX ADD_LEN? */ 1460 stat->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1461 } 1462 1463 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1464 1465 setup->td.td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC | 1466 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1467 setup->td.td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma)); 1468 setup->nexttd = next; 1469 setup->td.td_nexttd = LE(next->physaddr); 1470 setup->td.td_be = LE(LE(setup->td.td_cbp) + sizeof *req - 1); 1471 setup->len = 0; /* XXX The number of byte we count */ 1472 setup->xfer = xfer; 1473 setup->flags = 0; 1474 xfer->hcpriv = setup; 1475 1476 stat->td.td_flags = LE( 1477 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC | 1478 OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1479 stat->td.td_cbp = 0; 1480 stat->nexttd = tail; 1481 stat->td.td_nexttd = LE(tail->physaddr); 1482 stat->td.td_be = 0; 1483 stat->len = 0; 1484 stat->xfer = xfer; 1485 1486 #ifdef OHCI_DEBUG 1487 if (ohcidebug > 5) { 1488 DPRINTF(("ohci_device_request:\n")); 1489 ohci_dump_ed(sed); 1490 ohci_dump_tds(setup); 1491 } 1492 #endif 1493 1494 /* Insert ED in schedule */ 1495 s = splusb(); 1496 sed->ed.ed_tailp = LE(tail->physaddr); 1497 opipe->tail.td = tail; 1498 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1499 if (xfer->timeout && !sc->sc_bus.use_polling) { 1500 usb_timeout(ohci_timeout, xfer, 1501 MS_TO_TICKS(xfer->timeout), xfer->timo_handle); 1502 } 1503 splx(s); 1504 1505 #ifdef OHCI_DEBUG 1506 if (ohcidebug > 5) { 1507 usb_delay_ms(&sc->sc_bus, 5); 1508 DPRINTF(("ohci_device_request: status=%x\n", 1509 OREAD4(sc, OHCI_COMMAND_STATUS))); 1510 ohci_dump_ed(sed); 1511 ohci_dump_tds(setup); 1512 } 1513 #endif 1514 1515 return (USBD_NORMAL_COMPLETION); 1516 1517 bad3: 1518 ohci_free_std(sc, tail); 1519 bad2: 1520 ohci_free_std(sc, stat); 1521 bad1: 1522 return (err); 1523 } 1524 1525 /* 1526 * Add an ED to the schedule. Called at splusb(). 1527 */ 1528 void 1529 ohci_add_ed(sed, head) 1530 ohci_soft_ed_t *sed; 1531 ohci_soft_ed_t *head; 1532 { 1533 SPLUSBCHECK; 1534 sed->next = head->next; 1535 sed->ed.ed_nexted = head->ed.ed_nexted; 1536 head->next = sed; 1537 head->ed.ed_nexted = LE(sed->physaddr); 1538 } 1539 1540 /* 1541 * Remove an ED from the schedule. Called at splusb(). 1542 */ 1543 void 1544 ohci_rem_ed(sed, head) 1545 ohci_soft_ed_t *sed; 1546 ohci_soft_ed_t *head; 1547 { 1548 ohci_soft_ed_t *p; 1549 1550 SPLUSBCHECK; 1551 1552 /* XXX */ 1553 for (p = head; p == NULL && p->next != sed; p = p->next) 1554 ; 1555 if (p == NULL) 1556 panic("ohci_rem_ed: ED not found\n"); 1557 p->next = sed->next; 1558 p->ed.ed_nexted = sed->ed.ed_nexted; 1559 } 1560 1561 /* 1562 * When a transfer is completed the TD is added to the done queue by 1563 * the host controller. This queue is the processed by software. 1564 * Unfortunately the queue contains the physical address of the TD 1565 * and we have no simple way to translate this back to a kernel address. 1566 * To make the translation possible (and fast) we use a hash table of 1567 * TDs currently in the schedule. The physical address is used as the 1568 * hash value. 1569 */ 1570 1571 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1572 /* Called at splusb() */ 1573 void 1574 ohci_hash_add_td(sc, std) 1575 ohci_softc_t *sc; 1576 ohci_soft_td_t *std; 1577 { 1578 int h = HASH(std->physaddr); 1579 1580 SPLUSBCHECK; 1581 1582 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1583 } 1584 1585 /* Called at splusb() */ 1586 void 1587 ohci_hash_rem_td(sc, std) 1588 ohci_softc_t *sc; 1589 ohci_soft_td_t *std; 1590 { 1591 SPLUSBCHECK; 1592 1593 LIST_REMOVE(std, hnext); 1594 } 1595 1596 ohci_soft_td_t * 1597 ohci_hash_find_td(sc, a) 1598 ohci_softc_t *sc; 1599 ohci_physaddr_t a; 1600 { 1601 int h = HASH(a); 1602 ohci_soft_td_t *std; 1603 1604 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1605 std != NULL; 1606 std = LIST_NEXT(std, hnext)) 1607 if (std->physaddr == a) 1608 return (std); 1609 panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a); 1610 } 1611 1612 void 1613 ohci_timeout(addr) 1614 void *addr; 1615 { 1616 usbd_xfer_handle xfer = addr; 1617 int s; 1618 1619 DPRINTF(("ohci_timeout: xfer=%p\n", xfer)); 1620 1621 s = splusb(); 1622 xfer->device->bus->intr_context++; 1623 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1624 xfer->device->bus->intr_context--; 1625 splx(s); 1626 } 1627 1628 #ifdef OHCI_DEBUG 1629 void 1630 ohci_dump_tds(std) 1631 ohci_soft_td_t *std; 1632 { 1633 for (; std; std = std->nexttd) 1634 ohci_dump_td(std); 1635 } 1636 1637 void 1638 ohci_dump_td(std) 1639 ohci_soft_td_t *std; 1640 { 1641 DPRINTF(("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1642 "nexttd=0x%08lx be=0x%08lx\n", 1643 std, (u_long)std->physaddr, 1644 (int)LE(std->td.td_flags), 1645 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1646 OHCI_TD_GET_DI(LE(std->td.td_flags)), 1647 OHCI_TD_GET_EC(LE(std->td.td_flags)), 1648 OHCI_TD_GET_CC(LE(std->td.td_flags)), 1649 (u_long)LE(std->td.td_cbp), 1650 (u_long)LE(std->td.td_nexttd), (u_long)LE(std->td.td_be))); 1651 } 1652 1653 void 1654 ohci_dump_ed(sed) 1655 ohci_soft_ed_t *sed; 1656 { 1657 DPRINTF(("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx " 1658 "headflags=%b headp=0x%08lx nexted=0x%08lx\n", 1659 sed, (u_long)sed->physaddr, 1660 OHCI_ED_GET_FA(LE(sed->ed.ed_flags)), 1661 OHCI_ED_GET_EN(LE(sed->ed.ed_flags)), 1662 OHCI_ED_GET_MAXP(LE(sed->ed.ed_flags)), 1663 (int)LE(sed->ed.ed_flags), 1664 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1665 (u_long)LE(sed->ed.ed_tailp), 1666 (u_long)LE(sed->ed.ed_headp), 1667 "\20\1HALT\2CARRY", 1668 (u_long)LE(sed->ed.ed_headp), 1669 (u_long)LE(sed->ed.ed_nexted))); 1670 } 1671 #endif 1672 1673 usbd_status 1674 ohci_open(pipe) 1675 usbd_pipe_handle pipe; 1676 { 1677 usbd_device_handle dev = pipe->device; 1678 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1679 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1680 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1681 u_int8_t addr = dev->address; 1682 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1683 ohci_soft_ed_t *sed; 1684 ohci_soft_td_t *std; 1685 ohci_soft_itd_t *sitd; 1686 ohci_physaddr_t tdphys; 1687 u_int32_t fmt; 1688 usbd_status err; 1689 int s; 1690 int ival; 1691 1692 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1693 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1694 if (addr == sc->sc_addr) { 1695 switch (ed->bEndpointAddress) { 1696 case USB_CONTROL_ENDPOINT: 1697 pipe->methods = &ohci_root_ctrl_methods; 1698 break; 1699 case UE_DIR_IN | OHCI_INTR_ENDPT: 1700 pipe->methods = &ohci_root_intr_methods; 1701 break; 1702 default: 1703 return (USBD_INVAL); 1704 } 1705 } else { 1706 sed = ohci_alloc_sed(sc); 1707 if (sed == NULL) 1708 goto bad0; 1709 opipe->sed = sed; 1710 if (xfertype == UE_ISOCHRONOUS) { 1711 sitd = ohci_alloc_sitd(sc); 1712 if (sitd == NULL) { 1713 ohci_free_sitd(sc, sitd); 1714 goto bad1; 1715 } 1716 opipe->tail.itd = sitd; 1717 tdphys = LE(sitd->physaddr); 1718 fmt = OHCI_ED_FORMAT_ISO; 1719 } else { 1720 std = ohci_alloc_std(sc); 1721 if (std == NULL) { 1722 ohci_free_std(sc, std); 1723 goto bad1; 1724 } 1725 opipe->tail.td = std; 1726 tdphys = LE(std->physaddr); 1727 fmt = OHCI_ED_FORMAT_GEN; 1728 } 1729 sed->ed.ed_flags = LE( 1730 OHCI_ED_SET_FA(addr) | 1731 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1732 OHCI_ED_DIR_TD | 1733 (dev->lowspeed ? OHCI_ED_SPEED : 0) | fmt | 1734 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1735 sed->ed.ed_headp = sed->ed.ed_tailp = tdphys; 1736 1737 switch (xfertype) { 1738 case UE_CONTROL: 1739 pipe->methods = &ohci_device_ctrl_methods; 1740 err = usb_allocmem(&sc->sc_bus, 1741 sizeof(usb_device_request_t), 1742 0, &opipe->u.ctl.reqdma); 1743 if (err) 1744 goto bad; 1745 s = splusb(); 1746 ohci_add_ed(sed, sc->sc_ctrl_head); 1747 splx(s); 1748 break; 1749 case UE_INTERRUPT: 1750 pipe->methods = &ohci_device_intr_methods; 1751 ival = pipe->interval; 1752 if (ival == USBD_DEFAULT_INTERVAL) 1753 ival = ed->bInterval; 1754 return (ohci_device_setintr(sc, opipe, ival)); 1755 case UE_ISOCHRONOUS: 1756 pipe->methods = &ohci_device_isoc_methods; 1757 return (ohci_setup_isoc(pipe)); 1758 case UE_BULK: 1759 pipe->methods = &ohci_device_bulk_methods; 1760 s = splusb(); 1761 ohci_add_ed(sed, sc->sc_bulk_head); 1762 splx(s); 1763 break; 1764 } 1765 } 1766 return (USBD_NORMAL_COMPLETION); 1767 1768 bad: 1769 ohci_free_std(sc, std); 1770 bad1: 1771 ohci_free_sed(sc, sed); 1772 bad0: 1773 return (USBD_NOMEM); 1774 1775 } 1776 1777 /* 1778 * Close a reqular pipe. 1779 * Assumes that there are no pending transactions. 1780 */ 1781 void 1782 ohci_close_pipe(pipe, head) 1783 usbd_pipe_handle pipe; 1784 ohci_soft_ed_t *head; 1785 { 1786 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1787 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1788 ohci_soft_ed_t *sed = opipe->sed; 1789 int s; 1790 1791 s = splusb(); 1792 #ifdef DIAGNOSTIC 1793 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 1794 if ((sed->ed.ed_tailp & LE(OHCI_HEADMASK)) != 1795 (sed->ed.ed_headp & LE(OHCI_HEADMASK))) { 1796 ohci_physaddr_t td = sed->ed.ed_headp; 1797 ohci_soft_td_t *std; 1798 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]); 1799 std != NULL; 1800 std = LIST_NEXT(std, hnext)) 1801 if (std->physaddr == td) 1802 break; 1803 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 1804 "tl=0x%x pipe=%p, std=%p\n", sed, 1805 (int)LE(sed->ed.ed_headp), (int)LE(sed->ed.ed_tailp), 1806 pipe, std); 1807 usb_delay_ms(&sc->sc_bus, 2); 1808 if ((sed->ed.ed_tailp & LE(OHCI_HEADMASK)) != 1809 (sed->ed.ed_headp & LE(OHCI_HEADMASK))) 1810 printf("ohci_close_pipe: pipe still not empty\n"); 1811 } 1812 #endif 1813 ohci_rem_ed(sed, head); 1814 splx(s); 1815 ohci_free_sed(sc, opipe->sed); 1816 } 1817 1818 /* 1819 * Abort a device request. 1820 * If this routine is called at splusb() it guarantees that the request 1821 * will be removed from the hardware scheduling and that the callback 1822 * for it will be called with USBD_CANCELLED status. 1823 * It's impossible to guarantee that the requested transfer will not 1824 * have happened since the hardware runs concurrently. 1825 * If the transaction has already happened we rely on the ordinary 1826 * interrupt processing to process it. 1827 */ 1828 void 1829 ohci_abort_xfer(xfer, status) 1830 usbd_xfer_handle xfer; 1831 usbd_status status; 1832 { 1833 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1834 ohci_soft_ed_t *sed; 1835 1836 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p\n", xfer, opipe)); 1837 1838 xfer->status = status; 1839 1840 usb_untimeout(ohci_timeout, xfer, xfer->timo_handle); 1841 1842 sed = opipe->sed; 1843 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 1844 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); /* force hardware skip */ 1845 1846 #if 1 1847 if (xfer->device->bus->intr_context) { 1848 /* We have no process context, so we can't use tsleep(). */ 1849 timeout(ohci_abort_xfer_end, xfer, hz / USB_FRAMES_PER_SECOND); 1850 } else { 1851 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 1852 KASSERT(intr_nesting_level == 0, 1853 ("ohci_abort_req in interrupt context")); 1854 #endif 1855 usb_delay_ms(opipe->pipe.device->bus, 1); 1856 ohci_abort_xfer_end(xfer); 1857 } 1858 #else 1859 delay(1000); 1860 ohci_abort_xfer_end(xfer); 1861 #endif 1862 } 1863 1864 void 1865 ohci_abort_xfer_end(v) 1866 void *v; 1867 { 1868 usbd_xfer_handle xfer = v; 1869 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1870 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1871 ohci_soft_ed_t *sed; 1872 ohci_soft_td_t *p, *n; 1873 int s; 1874 1875 s = splusb(); 1876 1877 p = xfer->hcpriv; 1878 #ifdef DIAGNOSTIC 1879 if (p == NULL) { 1880 printf("ohci_abort_xfer: hcpriv==0\n"); 1881 return; 1882 } 1883 #endif 1884 for (; p->xfer == xfer; p = n) { 1885 n = p->nexttd; 1886 ohci_free_std(sc, p); 1887 } 1888 1889 sed = opipe->sed; 1890 DPRINTFN(2,("ohci_abort_xfer: set hd=%x, tl=%x\n", 1891 (int)LE(p->physaddr), (int)LE(sed->ed.ed_tailp))); 1892 sed->ed.ed_headp = p->physaddr; /* unlink TDs */ 1893 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); /* remove hardware skip */ 1894 1895 usb_transfer_complete(xfer); 1896 1897 splx(s); 1898 } 1899 1900 /* 1901 * Data structures and routines to emulate the root hub. 1902 */ 1903 static usb_device_descriptor_t ohci_devd = { 1904 USB_DEVICE_DESCRIPTOR_SIZE, 1905 UDESC_DEVICE, /* type */ 1906 {0x00, 0x01}, /* USB version */ 1907 UDCLASS_HUB, /* class */ 1908 UDSUBCLASS_HUB, /* subclass */ 1909 0, /* protocol */ 1910 64, /* max packet */ 1911 {0},{0},{0x00,0x01}, /* device id */ 1912 1,2,0, /* string indicies */ 1913 1 /* # of configurations */ 1914 }; 1915 1916 static usb_config_descriptor_t ohci_confd = { 1917 USB_CONFIG_DESCRIPTOR_SIZE, 1918 UDESC_CONFIG, 1919 {USB_CONFIG_DESCRIPTOR_SIZE + 1920 USB_INTERFACE_DESCRIPTOR_SIZE + 1921 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1922 1, 1923 1, 1924 0, 1925 UC_SELF_POWERED, 1926 0 /* max power */ 1927 }; 1928 1929 static usb_interface_descriptor_t ohci_ifcd = { 1930 USB_INTERFACE_DESCRIPTOR_SIZE, 1931 UDESC_INTERFACE, 1932 0, 1933 0, 1934 1, 1935 UICLASS_HUB, 1936 UISUBCLASS_HUB, 1937 0, 1938 0 1939 }; 1940 1941 static usb_endpoint_descriptor_t ohci_endpd = { 1942 USB_ENDPOINT_DESCRIPTOR_SIZE, 1943 UDESC_ENDPOINT, 1944 UE_DIR_IN | OHCI_INTR_ENDPT, 1945 UE_INTERRUPT, 1946 {8, 0}, /* max packet */ 1947 255 1948 }; 1949 1950 static usb_hub_descriptor_t ohci_hubd = { 1951 USB_HUB_DESCRIPTOR_SIZE, 1952 UDESC_HUB, 1953 0, 1954 {0,0}, 1955 0, 1956 0, 1957 {0}, 1958 }; 1959 1960 static int 1961 ohci_str(p, l, s) 1962 usb_string_descriptor_t *p; 1963 int l; 1964 char *s; 1965 { 1966 int i; 1967 1968 if (l == 0) 1969 return (0); 1970 p->bLength = 2 * strlen(s) + 2; 1971 if (l == 1) 1972 return (1); 1973 p->bDescriptorType = UDESC_STRING; 1974 l -= 2; 1975 for (i = 0; s[i] && l > 1; i++, l -= 2) 1976 USETW2(p->bString[i], 0, s[i]); 1977 return (2*i+2); 1978 } 1979 1980 /* 1981 * Simulate a hardware hub by handling all the necessary requests. 1982 */ 1983 static usbd_status 1984 ohci_root_ctrl_transfer(xfer) 1985 usbd_xfer_handle xfer; 1986 { 1987 usbd_status err; 1988 1989 /* Insert last in queue. */ 1990 err = usb_insert_transfer(xfer); 1991 if (err) 1992 return (err); 1993 1994 /* Pipe isn't running, start first */ 1995 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1996 } 1997 1998 static usbd_status 1999 ohci_root_ctrl_start(xfer) 2000 usbd_xfer_handle xfer; 2001 { 2002 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2003 usb_device_request_t *req; 2004 void *buf = NULL; 2005 int port, i; 2006 int s, len, value, index, l, totlen = 0; 2007 usb_port_status_t ps; 2008 usb_hub_descriptor_t hubd; 2009 usbd_status err; 2010 u_int32_t v; 2011 2012 #ifdef DIAGNOSTIC 2013 if (!(xfer->rqflags & URQ_REQUEST)) 2014 /* XXX panic */ 2015 return (USBD_INVAL); 2016 #endif 2017 req = &xfer->request; 2018 2019 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2020 req->bmRequestType, req->bRequest)); 2021 2022 len = UGETW(req->wLength); 2023 value = UGETW(req->wValue); 2024 index = UGETW(req->wIndex); 2025 2026 if (len != 0) 2027 buf = KERNADDR(&xfer->dmabuf); 2028 2029 #define C(x,y) ((x) | ((y) << 8)) 2030 switch(C(req->bRequest, req->bmRequestType)) { 2031 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2032 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2033 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2034 /* 2035 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2036 * for the integrated root hub. 2037 */ 2038 break; 2039 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2040 if (len > 0) { 2041 *(u_int8_t *)buf = sc->sc_conf; 2042 totlen = 1; 2043 } 2044 break; 2045 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2046 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2047 switch(value >> 8) { 2048 case UDESC_DEVICE: 2049 if ((value & 0xff) != 0) { 2050 err = USBD_IOERROR; 2051 goto ret; 2052 } 2053 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2054 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2055 memcpy(buf, &ohci_devd, l); 2056 break; 2057 case UDESC_CONFIG: 2058 if ((value & 0xff) != 0) { 2059 err = USBD_IOERROR; 2060 goto ret; 2061 } 2062 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2063 memcpy(buf, &ohci_confd, l); 2064 buf = (char *)buf + l; 2065 len -= l; 2066 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2067 totlen += l; 2068 memcpy(buf, &ohci_ifcd, l); 2069 buf = (char *)buf + l; 2070 len -= l; 2071 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2072 totlen += l; 2073 memcpy(buf, &ohci_endpd, l); 2074 break; 2075 case UDESC_STRING: 2076 if (len == 0) 2077 break; 2078 *(u_int8_t *)buf = 0; 2079 totlen = 1; 2080 switch (value & 0xff) { 2081 case 1: /* Vendor */ 2082 totlen = ohci_str(buf, len, sc->sc_vendor); 2083 break; 2084 case 2: /* Product */ 2085 totlen = ohci_str(buf, len, "OHCI root hub"); 2086 break; 2087 } 2088 break; 2089 default: 2090 err = USBD_IOERROR; 2091 goto ret; 2092 } 2093 break; 2094 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2095 if (len > 0) { 2096 *(u_int8_t *)buf = 0; 2097 totlen = 1; 2098 } 2099 break; 2100 case C(UR_GET_STATUS, UT_READ_DEVICE): 2101 if (len > 1) { 2102 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2103 totlen = 2; 2104 } 2105 break; 2106 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2107 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2108 if (len > 1) { 2109 USETW(((usb_status_t *)buf)->wStatus, 0); 2110 totlen = 2; 2111 } 2112 break; 2113 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2114 if (value >= USB_MAX_DEVICES) { 2115 err = USBD_IOERROR; 2116 goto ret; 2117 } 2118 sc->sc_addr = value; 2119 break; 2120 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2121 if (value != 0 && value != 1) { 2122 err = USBD_IOERROR; 2123 goto ret; 2124 } 2125 sc->sc_conf = value; 2126 break; 2127 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2128 break; 2129 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2130 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2131 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2132 err = USBD_IOERROR; 2133 goto ret; 2134 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2135 break; 2136 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2137 break; 2138 /* Hub requests */ 2139 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2140 break; 2141 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2142 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2143 "port=%d feature=%d\n", 2144 index, value)); 2145 if (index < 1 || index > sc->sc_noport) { 2146 err = USBD_IOERROR; 2147 goto ret; 2148 } 2149 port = OHCI_RH_PORT_STATUS(index); 2150 switch(value) { 2151 case UHF_PORT_ENABLE: 2152 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2153 break; 2154 case UHF_PORT_SUSPEND: 2155 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2156 break; 2157 case UHF_PORT_POWER: 2158 OWRITE4(sc, port, UPS_LOW_SPEED); 2159 break; 2160 case UHF_C_PORT_CONNECTION: 2161 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2162 break; 2163 case UHF_C_PORT_ENABLE: 2164 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2165 break; 2166 case UHF_C_PORT_SUSPEND: 2167 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2168 break; 2169 case UHF_C_PORT_OVER_CURRENT: 2170 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2171 break; 2172 case UHF_C_PORT_RESET: 2173 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2174 break; 2175 default: 2176 err = USBD_IOERROR; 2177 goto ret; 2178 } 2179 switch(value) { 2180 case UHF_C_PORT_CONNECTION: 2181 case UHF_C_PORT_ENABLE: 2182 case UHF_C_PORT_SUSPEND: 2183 case UHF_C_PORT_OVER_CURRENT: 2184 case UHF_C_PORT_RESET: 2185 /* Enable RHSC interrupt if condition is cleared. */ 2186 if ((OREAD4(sc, port) >> 16) == 0) 2187 ohci_rhsc_able(sc, 1); 2188 break; 2189 default: 2190 break; 2191 } 2192 break; 2193 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2194 if (value != 0) { 2195 err = USBD_IOERROR; 2196 goto ret; 2197 } 2198 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2199 hubd = ohci_hubd; 2200 hubd.bNbrPorts = sc->sc_noport; 2201 USETW(hubd.wHubCharacteristics, 2202 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2203 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2204 /* XXX overcurrent */ 2205 ); 2206 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2207 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2208 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2209 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2210 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2211 l = min(len, hubd.bDescLength); 2212 totlen = l; 2213 memcpy(buf, &hubd, l); 2214 break; 2215 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2216 if (len != 4) { 2217 err = USBD_IOERROR; 2218 goto ret; 2219 } 2220 memset(buf, 0, len); /* ? XXX */ 2221 totlen = len; 2222 break; 2223 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2224 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2225 index)); 2226 if (index < 1 || index > sc->sc_noport) { 2227 err = USBD_IOERROR; 2228 goto ret; 2229 } 2230 if (len != 4) { 2231 err = USBD_IOERROR; 2232 goto ret; 2233 } 2234 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2235 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2236 v)); 2237 USETW(ps.wPortStatus, v); 2238 USETW(ps.wPortChange, v >> 16); 2239 l = min(len, sizeof ps); 2240 memcpy(buf, &ps, l); 2241 totlen = l; 2242 break; 2243 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2244 err = USBD_IOERROR; 2245 goto ret; 2246 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2247 break; 2248 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2249 if (index < 1 || index > sc->sc_noport) { 2250 err = USBD_IOERROR; 2251 goto ret; 2252 } 2253 port = OHCI_RH_PORT_STATUS(index); 2254 switch(value) { 2255 case UHF_PORT_ENABLE: 2256 OWRITE4(sc, port, UPS_PORT_ENABLED); 2257 break; 2258 case UHF_PORT_SUSPEND: 2259 OWRITE4(sc, port, UPS_SUSPEND); 2260 break; 2261 case UHF_PORT_RESET: 2262 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2263 index)); 2264 OWRITE4(sc, port, UPS_RESET); 2265 for (i = 0; i < 10; i++) { 2266 usb_delay_ms(&sc->sc_bus, 10); 2267 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2268 break; 2269 } 2270 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2271 index, OREAD4(sc, port))); 2272 break; 2273 case UHF_PORT_POWER: 2274 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2275 "%d\n", index)); 2276 OWRITE4(sc, port, UPS_PORT_POWER); 2277 break; 2278 default: 2279 err = USBD_IOERROR; 2280 goto ret; 2281 } 2282 break; 2283 default: 2284 err = USBD_IOERROR; 2285 goto ret; 2286 } 2287 xfer->actlen = totlen; 2288 err = USBD_NORMAL_COMPLETION; 2289 ret: 2290 xfer->status = err; 2291 s = splusb(); 2292 usb_transfer_complete(xfer); 2293 splx(s); 2294 return (USBD_IN_PROGRESS); 2295 } 2296 2297 /* Abort a root control request. */ 2298 static void 2299 ohci_root_ctrl_abort(xfer) 2300 usbd_xfer_handle xfer; 2301 { 2302 /* Nothing to do, all transfers are synchronous. */ 2303 } 2304 2305 /* Close the root pipe. */ 2306 static void 2307 ohci_root_ctrl_close(pipe) 2308 usbd_pipe_handle pipe; 2309 { 2310 DPRINTF(("ohci_root_ctrl_close\n")); 2311 /* Nothing to do. */ 2312 } 2313 2314 static usbd_status 2315 ohci_root_intr_transfer(xfer) 2316 usbd_xfer_handle xfer; 2317 { 2318 usbd_status err; 2319 2320 /* Insert last in queue. */ 2321 err = usb_insert_transfer(xfer); 2322 if (err) 2323 return (err); 2324 2325 /* Pipe isn't running, start first */ 2326 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2327 } 2328 2329 static usbd_status 2330 ohci_root_intr_start(xfer) 2331 usbd_xfer_handle xfer; 2332 { 2333 usbd_pipe_handle pipe = xfer->pipe; 2334 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2335 2336 sc->sc_intrxfer = xfer; 2337 2338 return (USBD_IN_PROGRESS); 2339 } 2340 2341 /* Abort a root interrupt request. */ 2342 static void 2343 ohci_root_intr_abort(xfer) 2344 usbd_xfer_handle xfer; 2345 { 2346 int s; 2347 2348 if (xfer->pipe->intrxfer == xfer) { 2349 DPRINTF(("ohci_root_intr_abort: remove\n")); 2350 xfer->pipe->intrxfer = NULL; 2351 } 2352 xfer->status = USBD_CANCELLED; 2353 s = splusb(); 2354 usb_transfer_complete(xfer); 2355 splx(s); 2356 } 2357 2358 /* Close the root pipe. */ 2359 static void 2360 ohci_root_intr_close(pipe) 2361 usbd_pipe_handle pipe; 2362 { 2363 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2364 2365 DPRINTF(("ohci_root_intr_close\n")); 2366 2367 sc->sc_intrxfer = NULL; 2368 } 2369 2370 /************************/ 2371 2372 static usbd_status 2373 ohci_device_ctrl_transfer(xfer) 2374 usbd_xfer_handle xfer; 2375 { 2376 usbd_status err; 2377 2378 /* Insert last in queue. */ 2379 err = usb_insert_transfer(xfer); 2380 if (err) 2381 return (err); 2382 2383 /* Pipe isn't running, start first */ 2384 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2385 } 2386 2387 static usbd_status 2388 ohci_device_ctrl_start(xfer) 2389 usbd_xfer_handle xfer; 2390 { 2391 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2392 usbd_status err; 2393 2394 #ifdef DIAGNOSTIC 2395 if (!(xfer->rqflags & URQ_REQUEST)) { 2396 /* XXX panic */ 2397 printf("ohci_device_ctrl_transfer: not a request\n"); 2398 return (USBD_INVAL); 2399 } 2400 #endif 2401 2402 err = ohci_device_request(xfer); 2403 if (err) 2404 return (err); 2405 2406 if (sc->sc_bus.use_polling) 2407 ohci_waitintr(sc, xfer); 2408 return (USBD_IN_PROGRESS); 2409 } 2410 2411 /* Abort a device control request. */ 2412 static void 2413 ohci_device_ctrl_abort(xfer) 2414 usbd_xfer_handle xfer; 2415 { 2416 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2417 ohci_abort_xfer(xfer, USBD_CANCELLED); 2418 } 2419 2420 /* Close a device control pipe. */ 2421 static void 2422 ohci_device_ctrl_close(pipe) 2423 usbd_pipe_handle pipe; 2424 { 2425 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2426 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2427 2428 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2429 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2430 ohci_free_std(sc, opipe->tail.td); 2431 } 2432 2433 /************************/ 2434 2435 static void 2436 ohci_device_clear_toggle(pipe) 2437 usbd_pipe_handle pipe; 2438 { 2439 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2440 2441 opipe->sed->ed.ed_headp &= LE(~OHCI_TOGGLECARRY); 2442 } 2443 2444 static void 2445 ohci_noop(pipe) 2446 usbd_pipe_handle pipe; 2447 { 2448 } 2449 2450 static usbd_status 2451 ohci_device_bulk_transfer(xfer) 2452 usbd_xfer_handle xfer; 2453 { 2454 usbd_status err; 2455 2456 /* Insert last in queue. */ 2457 err = usb_insert_transfer(xfer); 2458 if (err) 2459 return (err); 2460 2461 /* Pipe isn't running, start first */ 2462 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2463 } 2464 2465 static usbd_status 2466 ohci_device_bulk_start(xfer) 2467 usbd_xfer_handle xfer; 2468 { 2469 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2470 usbd_device_handle dev = opipe->pipe.device; 2471 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2472 int addr = dev->address; 2473 ohci_soft_td_t *data, *tail, *tdp; 2474 ohci_soft_ed_t *sed; 2475 int s, len, isread, endpt; 2476 usbd_status err; 2477 2478 #ifdef DIAGNOSTIC 2479 if (xfer->rqflags & URQ_REQUEST) { 2480 /* XXX panic */ 2481 printf("ohci_device_bulk_start: a request\n"); 2482 return (USBD_INVAL); 2483 } 2484 #endif 2485 2486 len = xfer->length; 2487 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2488 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2489 sed = opipe->sed; 2490 2491 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2492 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2493 endpt)); 2494 2495 opipe->u.bulk.isread = isread; 2496 opipe->u.bulk.length = len; 2497 2498 /* Update device address */ 2499 sed->ed.ed_flags = LE( 2500 (LE(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2501 OHCI_ED_SET_FA(addr)); 2502 2503 /* Allocate a chain of new TDs (including a new tail). */ 2504 data = opipe->tail.td; 2505 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer->flags, 2506 &xfer->dmabuf, data, &tail); 2507 if (err) 2508 return (err); 2509 2510 tail->xfer = NULL; 2511 xfer->hcpriv = data; 2512 2513 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2514 "td_cbp=0x%08x td_be=0x%08x\n", 2515 (int)LE(sed->ed.ed_flags), (int)LE(data->td.td_flags), 2516 (int)LE(data->td.td_cbp), (int)LE(data->td.td_be))); 2517 2518 #ifdef OHCI_DEBUG 2519 if (ohcidebug > 5) { 2520 ohci_dump_ed(sed); 2521 ohci_dump_tds(data); 2522 } 2523 #endif 2524 2525 /* Insert ED in schedule */ 2526 s = splusb(); 2527 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2528 tdp->xfer = xfer; 2529 } 2530 sed->ed.ed_tailp = LE(tail->physaddr); 2531 opipe->tail.td = tail; 2532 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); 2533 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2534 if (xfer->timeout && !sc->sc_bus.use_polling) { 2535 usb_timeout(ohci_timeout, xfer, 2536 MS_TO_TICKS(xfer->timeout), xfer->timo_handle); 2537 } 2538 2539 #if 0 2540 /* This goes wrong if we are too slow. */ 2541 if (ohcidebug > 10) { 2542 delay(10000); 2543 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2544 OREAD4(sc, OHCI_COMMAND_STATUS))); 2545 ohci_dump_ed(sed); 2546 ohci_dump_tds(data); 2547 } 2548 #endif 2549 2550 splx(s); 2551 2552 return (USBD_IN_PROGRESS); 2553 } 2554 2555 static void 2556 ohci_device_bulk_abort(xfer) 2557 usbd_xfer_handle xfer; 2558 { 2559 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2560 ohci_abort_xfer(xfer, USBD_CANCELLED); 2561 } 2562 2563 /* 2564 * Close a device bulk pipe. 2565 */ 2566 static void 2567 ohci_device_bulk_close(pipe) 2568 usbd_pipe_handle pipe; 2569 { 2570 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2571 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2572 2573 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2574 ohci_close_pipe(pipe, sc->sc_bulk_head); 2575 ohci_free_std(sc, opipe->tail.td); 2576 } 2577 2578 /************************/ 2579 2580 static usbd_status 2581 ohci_device_intr_transfer(xfer) 2582 usbd_xfer_handle xfer; 2583 { 2584 usbd_status err; 2585 2586 /* Insert last in queue. */ 2587 err = usb_insert_transfer(xfer); 2588 if (err) 2589 return (err); 2590 2591 /* Pipe isn't running, start first */ 2592 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2593 } 2594 2595 static usbd_status 2596 ohci_device_intr_start(xfer) 2597 usbd_xfer_handle xfer; 2598 { 2599 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2600 usbd_device_handle dev = opipe->pipe.device; 2601 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2602 ohci_soft_ed_t *sed = opipe->sed; 2603 ohci_soft_td_t *data, *tail; 2604 int len; 2605 int s; 2606 2607 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2608 "flags=%d priv=%p\n", 2609 xfer, xfer->length, xfer->flags, xfer->priv)); 2610 2611 #ifdef DIAGNOSTIC 2612 if (xfer->rqflags & URQ_REQUEST) 2613 panic("ohci_device_intr_transfer: a request\n"); 2614 #endif 2615 2616 len = xfer->length; 2617 2618 data = opipe->tail.td; 2619 tail = ohci_alloc_std(sc); 2620 if (tail == NULL) 2621 return (USBD_NOMEM); 2622 tail->xfer = NULL; 2623 2624 data->td.td_flags = LE( 2625 OHCI_TD_IN | OHCI_TD_NOCC | 2626 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2627 if (xfer->flags & USBD_SHORT_XFER_OK) 2628 data->td.td_flags |= LE(OHCI_TD_R); 2629 data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf)); 2630 data->nexttd = tail; 2631 data->td.td_nexttd = LE(tail->physaddr); 2632 data->td.td_be = LE(LE(data->td.td_cbp) + len - 1); 2633 data->len = len; 2634 data->xfer = xfer; 2635 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2636 xfer->hcpriv = data; 2637 2638 #ifdef OHCI_DEBUG 2639 if (ohcidebug > 5) { 2640 DPRINTF(("ohci_device_intr_transfer:\n")); 2641 ohci_dump_ed(sed); 2642 ohci_dump_tds(data); 2643 } 2644 #endif 2645 2646 /* Insert ED in schedule */ 2647 s = splusb(); 2648 sed->ed.ed_tailp = LE(tail->physaddr); 2649 opipe->tail.td = tail; 2650 sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); 2651 2652 #if 0 2653 /* 2654 * This goes horribly wrong, printing thousands of descriptors, 2655 * because false references are followed due to the fact that the 2656 * TD is gone. 2657 */ 2658 if (ohcidebug > 5) { 2659 usb_delay_ms(&sc->sc_bus, 5); 2660 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2661 OREAD4(sc, OHCI_COMMAND_STATUS))); 2662 ohci_dump_ed(sed); 2663 ohci_dump_tds(data); 2664 } 2665 #endif 2666 splx(s); 2667 2668 return (USBD_IN_PROGRESS); 2669 } 2670 2671 /* Abort a device control request. */ 2672 static void 2673 ohci_device_intr_abort(xfer) 2674 usbd_xfer_handle xfer; 2675 { 2676 if (xfer->pipe->intrxfer == xfer) { 2677 DPRINTF(("ohci_device_intr_abort: remove\n")); 2678 xfer->pipe->intrxfer = NULL; 2679 } 2680 ohci_abort_xfer(xfer, USBD_CANCELLED); 2681 } 2682 2683 /* Close a device interrupt pipe. */ 2684 static void 2685 ohci_device_intr_close(pipe) 2686 usbd_pipe_handle pipe; 2687 { 2688 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2689 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2690 int nslots = opipe->u.intr.nslots; 2691 int pos = opipe->u.intr.pos; 2692 int j; 2693 ohci_soft_ed_t *p, *sed = opipe->sed; 2694 int s; 2695 2696 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2697 pipe, nslots, pos)); 2698 s = splusb(); 2699 sed->ed.ed_flags |= LE(OHCI_ED_SKIP); 2700 if ((sed->ed.ed_tailp & LE(OHCI_HEADMASK)) != 2701 (sed->ed.ed_headp & LE(OHCI_HEADMASK))) 2702 usb_delay_ms(&sc->sc_bus, 2); 2703 2704 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2705 ; 2706 #ifdef DIAGNOSTIC 2707 if (p == NULL) 2708 panic("ohci_device_intr_close: ED not found\n"); 2709 #endif 2710 p->next = sed->next; 2711 p->ed.ed_nexted = sed->ed.ed_nexted; 2712 splx(s); 2713 2714 for (j = 0; j < nslots; j++) 2715 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2716 2717 ohci_free_std(sc, opipe->tail.td); 2718 ohci_free_sed(sc, opipe->sed); 2719 } 2720 2721 static usbd_status 2722 ohci_device_setintr(sc, opipe, ival) 2723 ohci_softc_t *sc; 2724 struct ohci_pipe *opipe; 2725 int ival; 2726 { 2727 int i, j, s, best; 2728 u_int npoll, slow, shigh, nslots; 2729 u_int bestbw, bw; 2730 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2731 2732 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2733 if (ival == 0) { 2734 printf("ohci_setintr: 0 interval\n"); 2735 return (USBD_INVAL); 2736 } 2737 2738 npoll = OHCI_NO_INTRS; 2739 while (npoll > ival) 2740 npoll /= 2; 2741 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2742 2743 /* 2744 * We now know which level in the tree the ED must go into. 2745 * Figure out which slot has most bandwidth left over. 2746 * Slots to examine: 2747 * npoll 2748 * 1 0 2749 * 2 1 2 2750 * 4 3 4 5 6 2751 * 8 7 8 9 10 11 12 13 14 2752 * N (N-1) .. (N-1+N-1) 2753 */ 2754 slow = npoll-1; 2755 shigh = slow + npoll; 2756 nslots = OHCI_NO_INTRS / npoll; 2757 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2758 bw = 0; 2759 for (j = 0; j < nslots; j++) 2760 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 2761 if (bw < bestbw) { 2762 best = i; 2763 bestbw = bw; 2764 } 2765 } 2766 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2767 best, slow, shigh, bestbw)); 2768 2769 s = splusb(); 2770 hsed = sc->sc_eds[best]; 2771 sed->next = hsed->next; 2772 sed->ed.ed_nexted = hsed->ed.ed_nexted; 2773 hsed->next = sed; 2774 hsed->ed.ed_nexted = LE(sed->physaddr); 2775 splx(s); 2776 2777 for (j = 0; j < nslots; j++) 2778 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 2779 opipe->u.intr.nslots = nslots; 2780 opipe->u.intr.pos = best; 2781 2782 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 2783 return (USBD_NORMAL_COMPLETION); 2784 } 2785 2786 /***********************/ 2787 2788 usbd_status 2789 ohci_device_isoc_transfer(xfer) 2790 usbd_xfer_handle xfer; 2791 { 2792 usbd_status err; 2793 2794 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 2795 2796 /* Put it on our queue, */ 2797 err = usb_insert_transfer(xfer); 2798 2799 /* bail out on error, */ 2800 if (err && err != USBD_IN_PROGRESS) 2801 return (err); 2802 2803 /* XXX should check inuse here */ 2804 2805 /* insert into schedule, */ 2806 ohci_device_isoc_enter(xfer); 2807 2808 /* and put on interrupt list if the pipe wasn't running */ 2809 if (!err) 2810 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2811 2812 return (err); 2813 } 2814 2815 void 2816 ohci_device_isoc_enter(xfer) 2817 usbd_xfer_handle xfer; 2818 { 2819 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2820 usbd_device_handle dev = opipe->pipe.device; 2821 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2822 ohci_soft_ed_t *sed = opipe->sed; 2823 struct iso *iso = &opipe->u.iso; 2824 ohci_soft_itd_t *sitd, *nsitd; 2825 ohci_physaddr_t buf, offs; 2826 int i, ncur, nframes; 2827 int ncross; 2828 int s; 2829 2830 s = splusb(); 2831 sitd = opipe->tail.itd; 2832 buf = DMAADDR(&xfer->dmabuf); 2833 sitd->itd.itd_bp0 = LE(buf & OHCI_ITD_PAGE_MASK); 2834 nframes = xfer->nframes; 2835 offs = buf & OHCI_ITD_OFFSET_MASK; 2836 ncross = 0; 2837 for (i = ncur = 0; i < nframes; i++, ncur++) { 2838 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 2839 ncross > 1) { /* too many page crossings */ 2840 2841 nsitd = ohci_alloc_sitd(sc); 2842 if (nsitd == NULL) { 2843 /* XXX what now? */ 2844 return; 2845 } 2846 sitd->nextitd = nsitd; 2847 sitd->itd.itd_nextitd = LE(nsitd->physaddr); 2848 sitd->itd.itd_flags = LE( 2849 OHCI_ITD_NOCC | 2850 OHCI_ITD_SET_SF(iso->next) | 2851 OHCI_ITD_NOINTR | 2852 OHCI_ITD_SET_FC(OHCI_ITD_NOFFSET)); 2853 sitd->itd.itd_be = LE(LE(sitd->itd.itd_bp0) + offs - 1); 2854 nsitd->itd.itd_bp0 = LE((buf + offs) & OHCI_ITD_PAGE_MASK); 2855 sitd = nsitd; 2856 iso->next = iso->next + ncur; 2857 ncur = 0; 2858 ncross = 0; 2859 } 2860 /* XXX byte order */ 2861 sitd->itd.itd_offset[i] = 2862 offs | (ncross == 1 ? OHCI_ITD_PAGE_SELECT : 0); 2863 offs += xfer->frlengths[i]; 2864 /* XXX update ncross */ 2865 } 2866 nsitd = ohci_alloc_sitd(sc); 2867 if (nsitd == NULL) { 2868 /* XXX what now? */ 2869 return; 2870 } 2871 sitd->nextitd = nsitd; 2872 sitd->itd.itd_nextitd = LE(nsitd->physaddr); 2873 sitd->itd.itd_flags = LE( 2874 OHCI_ITD_NOCC | 2875 OHCI_ITD_SET_SF(iso->next) | 2876 OHCI_ITD_SET_DI(0) | 2877 OHCI_ITD_SET_FC(ncur)); 2878 sitd->itd.itd_be = LE(LE(sitd->itd.itd_bp0) + offs - 1); 2879 iso->next = iso->next + ncur; 2880 2881 opipe->tail.itd = nsitd; 2882 sed->ed.ed_tailp = LE(nsitd->physaddr); 2883 /* XXX update ED */ 2884 splx(s); 2885 } 2886 2887 usbd_status 2888 ohci_device_isoc_start(xfer) 2889 usbd_xfer_handle xfer; 2890 { 2891 printf("ohci_device_isoc_start: not implemented\n"); 2892 return (USBD_INVAL); 2893 } 2894 2895 void 2896 ohci_device_isoc_abort(xfer) 2897 usbd_xfer_handle xfer; 2898 { 2899 } 2900 2901 void 2902 ohci_device_isoc_done(xfer) 2903 usbd_xfer_handle xfer; 2904 { 2905 printf("ohci_device_isoc_done: not implemented\n"); 2906 } 2907 2908 usbd_status 2909 ohci_setup_isoc(pipe) 2910 usbd_pipe_handle pipe; 2911 { 2912 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2913 struct iso *iso = &opipe->u.iso; 2914 2915 iso->next = -1; 2916 iso->inuse = 0; 2917 2918 return (USBD_NORMAL_COMPLETION); 2919 } 2920 2921 void 2922 ohci_device_isoc_close(pipe) 2923 usbd_pipe_handle pipe; 2924 { 2925 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2926 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2927 2928 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 2929 ohci_close_pipe(pipe, sc->sc_isoc_head); 2930 ohci_free_sitd(sc, opipe->tail.itd); 2931 } 2932
Indexes created Tue Sep 23 07:09:52 GMT 2025