ohci.c revision 1.76 1 /* $NetBSD: ohci.c,v 1.76 2000/03/16 12:40:51 tsutsui Exp $ */
2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */
3
4 /*
5 * Copyright (c) 1998 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Lennart Augustsson (augustss (at) carlstedt.se) at
10 * Carlstedt Research & Technology.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. All advertising materials mentioning features or use of this software
21 * must display the following acknowledgement:
22 * This product includes software developed by the NetBSD
23 * Foundation, Inc. and its contributors.
24 * 4. Neither the name of The NetBSD Foundation nor the names of its
25 * contributors may be used to endorse or promote products derived
26 * from this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
39 */
40
41 /*
42 * USB Open Host Controller driver.
43 *
44 * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe
45 * USB spec: http://www.usb.org/developers/data/usb11.pdf
46 */
47
48 #include <sys/param.h>
49 #include <sys/systm.h>
50 #include <sys/malloc.h>
51 #if defined(__NetBSD__) || defined(__OpenBSD__)
52 #include <sys/kernel.h>
53 #include <sys/device.h>
54 #include <sys/select.h>
55 #elif defined(__FreeBSD__)
56 #include <sys/module.h>
57 #include <sys/bus.h>
58 #include <machine/bus_pio.h>
59 #include <machine/bus_memio.h>
60 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__)
61 #include <machine/cpu.h>
62 #endif
63 #endif
64 #include <sys/proc.h>
65 #include <sys/queue.h>
66
67 #include <machine/bus.h>
68 #include <machine/endian.h>
69
70 #include <dev/usb/usb.h>
71 #include <dev/usb/usbdi.h>
72 #include <dev/usb/usbdivar.h>
73 #include <dev/usb/usb_mem.h>
74 #include <dev/usb/usb_quirks.h>
75
76 #include <dev/usb/ohcireg.h>
77 #include <dev/usb/ohcivar.h>
78
79 #if defined(__FreeBSD__)
80 #include <machine/clock.h>
81
82 #define delay(d) DELAY(d)
83 #endif
84
85 #if defined(__OpenBSD__)
86 struct cfdriver ohci_cd = {
87 NULL, "ohci", DV_DULL
88 };
89 #endif
90
91 #ifdef OHCI_DEBUG
92 #define DPRINTF(x) if (ohcidebug) logprintf x
93 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x
94 int ohcidebug = 0;
95 #else
96 #define DPRINTF(x)
97 #define DPRINTFN(n,x)
98 #endif
99
100 /*
101 * The OHCI controller is little endian, so on big endian machines
102 * the data strored in memory needs to be swapped.
103 */
104 #if defined(__FreeBSD__)
105 #if BYTE_ORDER == BIG_ENDIAN
106 #define htole32(x) (bswap32(x))
107 #define le32toh(x) (bswap32(x))
108 #else
109 #define htole32(x) (x)
110 #define le32toh(x) (x)
111 #endif
112 #endif
113
114 struct ohci_pipe;
115
116 static ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *));
117 static void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *));
118
119 static ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *));
120 static void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *));
121
122 static ohci_soft_itd_t *ohci_alloc_sitd __P((ohci_softc_t *));
123 static void ohci_free_sitd __P((ohci_softc_t *,ohci_soft_itd_t *));
124
125 #if 0
126 static void ohci_free_std_chain __P((ohci_softc_t *,
127 ohci_soft_td_t *, ohci_soft_td_t *));
128 #endif
129 static usbd_status ohci_alloc_std_chain __P((struct ohci_pipe *,
130 ohci_softc_t *, int, int, u_int16_t, usb_dma_t *,
131 ohci_soft_td_t *, ohci_soft_td_t **));
132
133 static void ohci_shutdown __P((void *v));
134 static void ohci_power __P((int, void *));
135 static usbd_status ohci_open __P((usbd_pipe_handle));
136 static void ohci_poll __P((struct usbd_bus *));
137 static void ohci_softintr __P((struct usbd_bus *));
138 static void ohci_waitintr __P((ohci_softc_t *,
139 usbd_xfer_handle));
140 static void ohci_rhsc __P((ohci_softc_t *, usbd_xfer_handle));
141
142 static usbd_status ohci_device_request __P((usbd_xfer_handle xfer));
143 static void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
144 static void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
145 static void ohci_hash_add_td __P((ohci_softc_t *,
146 ohci_soft_td_t *));
147 static void ohci_hash_rem_td __P((ohci_softc_t *,
148 ohci_soft_td_t *));
149 static ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *,
150 ohci_physaddr_t));
151
152 static usbd_status ohci_setup_isoc __P((usbd_pipe_handle pipe));
153 static void ohci_device_isoc_enter __P((usbd_xfer_handle));
154
155 static usbd_status ohci_allocm __P((struct usbd_bus *, usb_dma_t *,
156 u_int32_t));
157 static void ohci_freem __P((struct usbd_bus *, usb_dma_t *));
158
159 static usbd_xfer_handle ohci_allocx __P((struct usbd_bus *));
160 static void ohci_freex __P((struct usbd_bus *, usbd_xfer_handle));
161
162 static usbd_status ohci_root_ctrl_transfer __P((usbd_xfer_handle));
163 static usbd_status ohci_root_ctrl_start __P((usbd_xfer_handle));
164 static void ohci_root_ctrl_abort __P((usbd_xfer_handle));
165 static void ohci_root_ctrl_close __P((usbd_pipe_handle));
166 static void ohci_root_ctrl_done __P((usbd_xfer_handle));
167
168 static usbd_status ohci_root_intr_transfer __P((usbd_xfer_handle));
169 static usbd_status ohci_root_intr_start __P((usbd_xfer_handle));
170 static void ohci_root_intr_abort __P((usbd_xfer_handle));
171 static void ohci_root_intr_close __P((usbd_pipe_handle));
172 static void ohci_root_intr_done __P((usbd_xfer_handle));
173
174 static usbd_status ohci_device_ctrl_transfer __P((usbd_xfer_handle));
175 static usbd_status ohci_device_ctrl_start __P((usbd_xfer_handle));
176 static void ohci_device_ctrl_abort __P((usbd_xfer_handle));
177 static void ohci_device_ctrl_close __P((usbd_pipe_handle));
178 static void ohci_device_ctrl_done __P((usbd_xfer_handle));
179
180 static usbd_status ohci_device_bulk_transfer __P((usbd_xfer_handle));
181 static usbd_status ohci_device_bulk_start __P((usbd_xfer_handle));
182 static void ohci_device_bulk_abort __P((usbd_xfer_handle));
183 static void ohci_device_bulk_close __P((usbd_pipe_handle));
184 static void ohci_device_bulk_done __P((usbd_xfer_handle));
185
186 static usbd_status ohci_device_intr_transfer __P((usbd_xfer_handle));
187 static usbd_status ohci_device_intr_start __P((usbd_xfer_handle));
188 static void ohci_device_intr_abort __P((usbd_xfer_handle));
189 static void ohci_device_intr_close __P((usbd_pipe_handle));
190 static void ohci_device_intr_done __P((usbd_xfer_handle));
191
192 static usbd_status ohci_device_isoc_transfer __P((usbd_xfer_handle));
193 static usbd_status ohci_device_isoc_start __P((usbd_xfer_handle));
194 static void ohci_device_isoc_abort __P((usbd_xfer_handle));
195 static void ohci_device_isoc_close __P((usbd_pipe_handle));
196 static void ohci_device_isoc_done __P((usbd_xfer_handle));
197
198 static usbd_status ohci_device_setintr __P((ohci_softc_t *sc,
199 struct ohci_pipe *pipe, int ival));
200
201 static int ohci_str __P((usb_string_descriptor_t *, int, char *));
202
203 static void ohci_timeout __P((void *));
204 static void ohci_rhsc_able __P((ohci_softc_t *, int));
205
206 static void ohci_close_pipe __P((usbd_pipe_handle pipe,
207 ohci_soft_ed_t *head));
208 static void ohci_abort_xfer __P((usbd_xfer_handle xfer,
209 usbd_status status));
210 static void ohci_abort_xfer_end __P((void *));
211
212 static void ohci_device_clear_toggle __P((usbd_pipe_handle pipe));
213 static void ohci_noop __P((usbd_pipe_handle pipe));
214
215 #ifdef OHCI_DEBUG
216 static void ohci_dumpregs __P((ohci_softc_t *));
217 static void ohci_dump_tds __P((ohci_soft_td_t *));
218 static void ohci_dump_td __P((ohci_soft_td_t *));
219 static void ohci_dump_ed __P((ohci_soft_ed_t *));
220 #endif
221
222 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
223 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
224 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
225
226 /* Reverse the bits in a value 0 .. 31 */
227 static u_int8_t revbits[OHCI_NO_INTRS] =
228 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
229 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
230 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
231 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
232
233 struct ohci_pipe {
234 struct usbd_pipe pipe;
235 ohci_soft_ed_t *sed;
236 union {
237 ohci_soft_td_t *td;
238 ohci_soft_itd_t *itd;
239 } tail;
240 /* Info needed for different pipe kinds. */
241 union {
242 /* Control pipe */
243 struct {
244 usb_dma_t reqdma;
245 u_int length;
246 ohci_soft_td_t *setup, *data, *stat;
247 } ctl;
248 /* Interrupt pipe */
249 struct {
250 int nslots;
251 int pos;
252 } intr;
253 /* Bulk pipe */
254 struct {
255 u_int length;
256 int isread;
257 } bulk;
258 /* Iso pipe */
259 struct iso {
260 int next, inuse;
261 } iso;
262 } u;
263 };
264
265 #define OHCI_INTR_ENDPT 1
266
267 static struct usbd_bus_methods ohci_bus_methods = {
268 ohci_open,
269 ohci_softintr,
270 ohci_poll,
271 ohci_allocm,
272 ohci_freem,
273 ohci_allocx,
274 ohci_freex,
275 };
276
277 static struct usbd_pipe_methods ohci_root_ctrl_methods = {
278 ohci_root_ctrl_transfer,
279 ohci_root_ctrl_start,
280 ohci_root_ctrl_abort,
281 ohci_root_ctrl_close,
282 ohci_noop,
283 ohci_root_ctrl_done,
284 };
285
286 static struct usbd_pipe_methods ohci_root_intr_methods = {
287 ohci_root_intr_transfer,
288 ohci_root_intr_start,
289 ohci_root_intr_abort,
290 ohci_root_intr_close,
291 ohci_noop,
292 ohci_root_intr_done,
293 };
294
295 static struct usbd_pipe_methods ohci_device_ctrl_methods = {
296 ohci_device_ctrl_transfer,
297 ohci_device_ctrl_start,
298 ohci_device_ctrl_abort,
299 ohci_device_ctrl_close,
300 ohci_noop,
301 ohci_device_ctrl_done,
302 };
303
304 static struct usbd_pipe_methods ohci_device_intr_methods = {
305 ohci_device_intr_transfer,
306 ohci_device_intr_start,
307 ohci_device_intr_abort,
308 ohci_device_intr_close,
309 ohci_device_clear_toggle,
310 ohci_device_intr_done,
311 };
312
313 static struct usbd_pipe_methods ohci_device_bulk_methods = {
314 ohci_device_bulk_transfer,
315 ohci_device_bulk_start,
316 ohci_device_bulk_abort,
317 ohci_device_bulk_close,
318 ohci_device_clear_toggle,
319 ohci_device_bulk_done,
320 };
321
322 static struct usbd_pipe_methods ohci_device_isoc_methods = {
323 ohci_device_isoc_transfer,
324 ohci_device_isoc_start,
325 ohci_device_isoc_abort,
326 ohci_device_isoc_close,
327 ohci_noop,
328 ohci_device_isoc_done,
329 };
330
331 #if defined(__NetBSD__) || defined(__OpenBSD__)
332 int
333 ohci_activate(self, act)
334 device_ptr_t self;
335 enum devact act;
336 {
337 struct ohci_softc *sc = (struct ohci_softc *)self;
338 int rv = 0;
339
340 switch (act) {
341 case DVACT_ACTIVATE:
342 return (EOPNOTSUPP);
343 break;
344
345 case DVACT_DEACTIVATE:
346 if (sc->sc_child != NULL)
347 rv = config_deactivate(sc->sc_child);
348 break;
349 }
350 return (rv);
351 }
352
353 int
354 ohci_detach(sc, flags)
355 struct ohci_softc *sc;
356 int flags;
357 {
358 int rv = 0;
359
360 if (sc->sc_child != NULL)
361 rv = config_detach(sc->sc_child, flags);
362
363 if (rv != 0)
364 return (rv);
365
366 #if defined(__NetBSD__) || defined(__OpenBSD__)
367 powerhook_disestablish(sc->sc_powerhook);
368 shutdownhook_disestablish(sc->sc_shutdownhook);
369 #endif
370
371 /* free data structures XXX */
372
373 return (rv);
374 }
375 #endif
376
377 ohci_soft_ed_t *
378 ohci_alloc_sed(sc)
379 ohci_softc_t *sc;
380 {
381 ohci_soft_ed_t *sed;
382 usbd_status err;
383 int i, offs;
384 usb_dma_t dma;
385
386 if (sc->sc_freeeds == NULL) {
387 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
388 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
389 OHCI_ED_ALIGN, &dma);
390 if (err)
391 return (0);
392 for(i = 0; i < OHCI_SED_CHUNK; i++) {
393 offs = i * OHCI_SED_SIZE;
394 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs);
395 sed->physaddr = DMAADDR(&dma) + offs;
396 sed->next = sc->sc_freeeds;
397 sc->sc_freeeds = sed;
398 }
399 }
400 sed = sc->sc_freeeds;
401 sc->sc_freeeds = sed->next;
402 memset(&sed->ed, 0, sizeof(ohci_ed_t));
403 sed->next = 0;
404 return (sed);
405 }
406
407 void
408 ohci_free_sed(sc, sed)
409 ohci_softc_t *sc;
410 ohci_soft_ed_t *sed;
411 {
412 sed->next = sc->sc_freeeds;
413 sc->sc_freeeds = sed;
414 }
415
416 ohci_soft_td_t *
417 ohci_alloc_std(sc)
418 ohci_softc_t *sc;
419 {
420 ohci_soft_td_t *std;
421 usbd_status err;
422 int i, offs;
423 usb_dma_t dma;
424 int s;
425
426 if (sc->sc_freetds == NULL) {
427 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
428 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
429 OHCI_TD_ALIGN, &dma);
430 if (err)
431 return (0);
432 s = splusb();
433 for(i = 0; i < OHCI_STD_CHUNK; i++) {
434 offs = i * OHCI_STD_SIZE;
435 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs);
436 std->physaddr = DMAADDR(&dma) + offs;
437 std->nexttd = sc->sc_freetds;
438 sc->sc_freetds = std;
439 }
440 splx(s);
441 }
442
443 s = splusb();
444 std = sc->sc_freetds;
445 sc->sc_freetds = std->nexttd;
446 memset(&std->td, 0, sizeof(ohci_td_t));
447 std->nexttd = 0;
448
449 ohci_hash_add_td(sc, std);
450 splx(s);
451
452 return (std);
453 }
454
455 void
456 ohci_free_std(sc, std)
457 ohci_softc_t *sc;
458 ohci_soft_td_t *std;
459 {
460 int s;
461
462 s = splusb();
463 ohci_hash_rem_td(sc, std);
464
465 std->nexttd = sc->sc_freetds;
466 sc->sc_freetds = std;
467 splx(s);
468 }
469
470 usbd_status
471 ohci_alloc_std_chain(opipe, sc, alen, rd, flags, dma, sp, ep)
472 struct ohci_pipe *opipe;
473 ohci_softc_t *sc;
474 int alen, rd;
475 u_int16_t flags;
476 usb_dma_t *dma;
477 ohci_soft_td_t *sp, **ep;
478 {
479 ohci_soft_td_t *next, *cur;
480 ohci_physaddr_t dataphys, dataphysend;
481 u_int32_t intr, tdflags;
482 int len, curlen;
483
484 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
485
486 len = alen;
487 cur = sp;
488 dataphys = DMAADDR(dma);
489 dataphysend = OHCI_PAGE(dataphys + len - 1);
490 tdflags =
491 (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
492 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY |
493 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0);
494
495 for (;;) {
496 next = ohci_alloc_std(sc);
497 if (next == NULL)
498 goto nomem;
499
500 /* The OHCI hardware can handle at most one page crossing. */
501 if (OHCI_PAGE(dataphys) == dataphysend ||
502 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) {
503 /* we can handle it in this TD */
504 curlen = len;
505 } else {
506 /* must use multiple TDs, fill as much as possible. */
507 curlen = 2 * OHCI_PAGE_SIZE -
508 (dataphys & (OHCI_PAGE_SIZE-1));
509 }
510 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
511 "dataphysend=0x%08x len=%d curlen=%d\n",
512 dataphys, dataphysend,
513 len, curlen));
514 len -= curlen;
515
516 intr = len == 0 ? OHCI_TD_SET_DI(1) : OHCI_TD_NOINTR;
517 cur->td.td_flags = htole32(tdflags | intr);
518 cur->td.td_cbp = htole32(dataphys);
519 cur->nexttd = next;
520 cur->td.td_nexttd = htole32(next->physaddr);
521 cur->td.td_be = htole32(dataphys + curlen - 1);
522 cur->len = curlen;
523 cur->flags = OHCI_ADD_LEN;
524 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
525 dataphys, dataphys + curlen - 1));
526 if (len == 0)
527 break;
528 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
529 dataphys += curlen;
530 cur = next;
531 }
532 if ((flags & USBD_FORCE_SHORT_XFER) &&
533 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) {
534 /* Force a 0 length transfer at the end. */
535
536 cur->td.td_flags = htole32(tdflags | OHCI_TD_NOINTR);
537 cur = next;
538
539 next = ohci_alloc_std(sc);
540 if (next == NULL)
541 goto nomem;
542
543 cur->td.td_flags = htole32(tdflags | OHCI_TD_SET_DI(1));
544 cur->td.td_cbp = 0; /* indicate 0 length packet */
545 cur->nexttd = next;
546 cur->td.td_nexttd = htole32(next->physaddr);
547 cur->td.td_be = ~0;
548 cur->len = 0;
549 cur->flags = 0;
550 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
551 }
552 cur->flags |= OHCI_CALL_DONE;
553 *ep = next;
554
555 return (USBD_NORMAL_COMPLETION);
556
557 nomem:
558 /* XXX free chain */
559 return (USBD_NOMEM);
560 }
561
562 #if 0
563 static void
564 ohci_free_std_chain(sc, std, stdend)
565 ohci_softc_t *sc;
566 ohci_soft_td_t *std;
567 ohci_soft_td_t *stdend;
568 {
569 ohci_soft_td_t *p;
570
571 for (; std != stdend; std = p) {
572 p = std->nexttd;
573 ohci_free_std(sc, std);
574 }
575 }
576 #endif
577
578 ohci_soft_itd_t *
579 ohci_alloc_sitd(sc)
580 ohci_softc_t *sc;
581 {
582 ohci_soft_itd_t *sitd;
583 usbd_status err;
584 int i, offs;
585 usb_dma_t dma;
586
587 if (sc->sc_freeitds == NULL) {
588 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
589 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
590 OHCI_TD_ALIGN, &dma);
591 if (err)
592 return (0);
593 for(i = 0; i < OHCI_STD_CHUNK; i++) {
594 offs = i * OHCI_STD_SIZE;
595 sitd = (ohci_soft_itd_t *)((char*)KERNADDR(&dma)+offs);
596 sitd->physaddr = DMAADDR(&dma) + offs;
597 sitd->nextitd = sc->sc_freeitds;
598 sc->sc_freeitds = sitd;
599 }
600 }
601 sitd = sc->sc_freeitds;
602 sc->sc_freeitds = sitd->nextitd;
603 memset(&sitd->itd, 0, sizeof(ohci_itd_t));
604 sitd->nextitd = 0;
605 return (sitd);
606 }
607
608 void
609 ohci_free_sitd(sc, sitd)
610 ohci_softc_t *sc;
611 ohci_soft_itd_t *sitd;
612 {
613 sitd->nextitd = sc->sc_freeitds;
614 sc->sc_freeitds = sitd;
615 }
616
617 usbd_status
618 ohci_init(sc)
619 ohci_softc_t *sc;
620 {
621 ohci_soft_ed_t *sed, *psed;
622 usbd_status err;
623 int i;
624 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca;
625
626 DPRINTF(("ohci_init: start\n"));
627 #if defined(__OpenBSD__)
628 printf(",");
629 #else
630 printf("%s:", USBDEVNAME(sc->sc_bus.bdev));
631 #endif
632 rev = OREAD4(sc, OHCI_REVISION);
633 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev),
634 OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
635
636 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
637 printf("%s: unsupported OHCI revision\n",
638 USBDEVNAME(sc->sc_bus.bdev));
639 sc->sc_bus.usbrev = USBREV_UNKNOWN;
640 return (USBD_INVAL);
641 }
642 sc->sc_bus.usbrev = USBREV_1_0;
643
644 for (i = 0; i < OHCI_HASH_SIZE; i++)
645 LIST_INIT(&sc->sc_hash_tds[i]);
646
647 SIMPLEQ_INIT(&sc->sc_free_xfers);
648
649 /* XXX determine alignment by R/W */
650 /* Allocate the HCCA area. */
651 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
652 OHCI_HCCA_ALIGN, &sc->sc_hccadma);
653 if (err)
654 return (err);
655 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma);
656 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
657
658 sc->sc_eintrs = OHCI_NORMAL_INTRS;
659
660 /* Allocate dummy ED that starts the control list. */
661 sc->sc_ctrl_head = ohci_alloc_sed(sc);
662 if (sc->sc_ctrl_head == NULL) {
663 err = USBD_NOMEM;
664 goto bad1;
665 }
666 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
667
668 /* Allocate dummy ED that starts the bulk list. */
669 sc->sc_bulk_head = ohci_alloc_sed(sc);
670 if (sc->sc_bulk_head == NULL) {
671 err = USBD_NOMEM;
672 goto bad2;
673 }
674 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
675
676 /* Allocate dummy ED that starts the isochronous list. */
677 sc->sc_isoc_head = ohci_alloc_sed(sc);
678 if (sc->sc_isoc_head == NULL) {
679 err = USBD_NOMEM;
680 goto bad3;
681 }
682 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
683
684 /* Allocate all the dummy EDs that make up the interrupt tree. */
685 for (i = 0; i < OHCI_NO_EDS; i++) {
686 sed = ohci_alloc_sed(sc);
687 if (sed == NULL) {
688 while (--i >= 0)
689 ohci_free_sed(sc, sc->sc_eds[i]);
690 err = USBD_NOMEM;
691 goto bad4;
692 }
693 /* All ED fields are set to 0. */
694 sc->sc_eds[i] = sed;
695 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
696 if (i != 0)
697 psed = sc->sc_eds[(i-1) / 2];
698 else
699 psed= sc->sc_isoc_head;
700 sed->next = psed;
701 sed->ed.ed_nexted = htole32(psed->physaddr);
702 }
703 /*
704 * Fill HCCA interrupt table. The bit reversal is to get
705 * the tree set up properly to spread the interrupts.
706 */
707 for (i = 0; i < OHCI_NO_INTRS; i++)
708 sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
709 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
710
711 #ifdef OHCI_DEBUG
712 if (ohcidebug > 15) {
713 for (i = 0; i < OHCI_NO_EDS; i++) {
714 printf("ed#%d ", i);
715 ohci_dump_ed(sc->sc_eds[i]);
716 }
717 printf("iso ");
718 ohci_dump_ed(sc->sc_isoc_head);
719 }
720 #endif
721
722 /* Determine in what context we are running. */
723 ctl = OREAD4(sc, OHCI_CONTROL);
724 if (ctl & OHCI_IR) {
725 /* SMM active, request change */
726 DPRINTF(("ohci_init: SMM active, request owner change\n"));
727 s = OREAD4(sc, OHCI_COMMAND_STATUS);
728 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
729 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
730 usb_delay_ms(&sc->sc_bus, 1);
731 ctl = OREAD4(sc, OHCI_CONTROL);
732 }
733 if ((ctl & OHCI_IR) == 0) {
734 printf("%s: SMM does not respond, resetting\n",
735 USBDEVNAME(sc->sc_bus.bdev));
736 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
737 goto reset;
738 }
739 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
740 /* BIOS started controller. */
741 DPRINTF(("ohci_init: BIOS active\n"));
742 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
743 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
744 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
745 }
746 } else {
747 DPRINTF(("ohci_init: cold started\n"));
748 reset:
749 /* Controller was cold started. */
750 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
751 }
752
753 /*
754 * This reset should not be necessary according to the OHCI spec, but
755 * without it some controllers do not start.
756 */
757 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
758 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
759 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
760
761 /* We now own the host controller and the bus has been reset. */
762 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
763
764 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
765 /* Nominal time for a reset is 10 us. */
766 for (i = 0; i < 10; i++) {
767 delay(10);
768 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
769 if (!hcr)
770 break;
771 }
772 if (hcr) {
773 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
774 err = USBD_IOERROR;
775 goto bad5;
776 }
777 #ifdef OHCI_DEBUG
778 if (ohcidebug > 15)
779 ohci_dumpregs(sc);
780 #endif
781
782 /* The controller is now in SUSPEND state, we have 2ms to finish. */
783
784 /* Set up HC registers. */
785 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma));
786 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
787 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
788 /* disable all interrupts and then switch on all desired interrupts */
789 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
790 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
791 /* switch on desired functional features */
792 ctl = OREAD4(sc, OHCI_CONTROL);
793 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
794 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
795 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
796 /* And finally start it! */
797 OWRITE4(sc, OHCI_CONTROL, ctl);
798
799 /*
800 * The controller is now OPERATIONAL. Set a some final
801 * registers that should be set earlier, but that the
802 * controller ignores when in the SUSPEND state.
803 */
804 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
805 fm |= OHCI_FSMPS(ival) | ival;
806 OWRITE4(sc, OHCI_FM_INTERVAL, fm);
807 per = OHCI_PERIODIC(ival); /* 90% periodic */
808 OWRITE4(sc, OHCI_PERIODIC_START, per);
809
810 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
811 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
812 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
813 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
814 usb_delay_ms(&sc->sc_bus, 5);
815 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
816
817 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
818
819 #ifdef OHCI_DEBUG
820 if (ohcidebug > 5)
821 ohci_dumpregs(sc);
822 #endif
823
824 /* Set up the bus struct. */
825 sc->sc_bus.methods = &ohci_bus_methods;
826 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
827
828 #if defined(__NetBSD__) || defined(__OpenBSD__)
829 sc->sc_powerhook = powerhook_establish(ohci_power, sc);
830 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc);
831 #endif
832
833 return (USBD_NORMAL_COMPLETION);
834
835 bad5:
836 for (i = 0; i < OHCI_NO_EDS; i++)
837 ohci_free_sed(sc, sc->sc_eds[i]);
838 bad4:
839 ohci_free_sed(sc, sc->sc_isoc_head);
840 bad3:
841 ohci_free_sed(sc, sc->sc_ctrl_head);
842 bad2:
843 ohci_free_sed(sc, sc->sc_bulk_head);
844 bad1:
845 usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
846 return (err);
847 }
848
849 usbd_status
850 ohci_allocm(bus, dma, size)
851 struct usbd_bus *bus;
852 usb_dma_t *dma;
853 u_int32_t size;
854 {
855 #if defined(__NetBSD__) || defined(__OpenBSD__)
856 struct ohci_softc *sc = (struct ohci_softc *)bus;
857 #endif
858
859 return (usb_allocmem(&sc->sc_bus, size, 0, dma));
860 }
861
862 void
863 ohci_freem(bus, dma)
864 struct usbd_bus *bus;
865 usb_dma_t *dma;
866 {
867 #if defined(__NetBSD__) || defined(__OpenBSD__)
868 struct ohci_softc *sc = (struct ohci_softc *)bus;
869 #endif
870
871 usb_freemem(&sc->sc_bus, dma);
872 }
873
874 usbd_xfer_handle
875 ohci_allocx(bus)
876 struct usbd_bus *bus;
877 {
878 struct ohci_softc *sc = (struct ohci_softc *)bus;
879 usbd_xfer_handle xfer;
880
881 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
882 if (xfer != NULL)
883 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next);
884 else
885 xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT);
886 if (xfer != NULL)
887 memset(xfer, 0, sizeof *xfer);
888 return (xfer);
889 }
890
891 void
892 ohci_freex(bus, xfer)
893 struct usbd_bus *bus;
894 usbd_xfer_handle xfer;
895 {
896 struct ohci_softc *sc = (struct ohci_softc *)bus;
897
898 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
899 }
900
901 /*
902 * Shut down the controller when the system is going down.
903 */
904 void
905 ohci_shutdown(v)
906 void *v;
907 {
908 ohci_softc_t *sc = v;
909
910 DPRINTF(("ohci_shutdown: stopping the HC\n"));
911 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
912 }
913
914 /*
915 * Handle suspend/resume.
916 *
917 * We need to switch to polling mode here, because this routine is
918 * called from an intterupt context. This is all right since we
919 * are almost suspended anyway.
920 */
921 void
922 ohci_power(why, v)
923 int why;
924 void *v;
925 {
926 #ifdef OHCI_DEBUG
927 ohci_softc_t *sc = v;
928
929 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why));
930 /* XXX should suspend/resume */
931 ohci_dumpregs(sc);
932 #endif
933 }
934
935 #ifdef OHCI_DEBUG
936 void
937 ohci_dumpregs(sc)
938 ohci_softc_t *sc;
939 {
940 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
941 OREAD4(sc, OHCI_REVISION),
942 OREAD4(sc, OHCI_CONTROL),
943 OREAD4(sc, OHCI_COMMAND_STATUS)));
944 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
945 OREAD4(sc, OHCI_INTERRUPT_STATUS),
946 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
947 OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
948 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
949 OREAD4(sc, OHCI_HCCA),
950 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
951 OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
952 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
953 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
954 OREAD4(sc, OHCI_BULK_HEAD_ED),
955 OREAD4(sc, OHCI_BULK_CURRENT_ED)));
956 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
957 OREAD4(sc, OHCI_DONE_HEAD),
958 OREAD4(sc, OHCI_FM_INTERVAL),
959 OREAD4(sc, OHCI_FM_REMAINING)));
960 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
961 OREAD4(sc, OHCI_FM_NUMBER),
962 OREAD4(sc, OHCI_PERIODIC_START),
963 OREAD4(sc, OHCI_LS_THRESHOLD)));
964 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
965 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
966 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
967 OREAD4(sc, OHCI_RH_STATUS)));
968 DPRINTF((" port1=0x%08x port2=0x%08x\n",
969 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
970 OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
971 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
972 le32toh(sc->sc_hcca->hcca_frame_number),
973 le32toh(sc->sc_hcca->hcca_done_head)));
974 }
975 #endif
976
977 static int ohci_intr1 __P((ohci_softc_t *));
978
979 int
980 ohci_intr(p)
981 void *p;
982 {
983 ohci_softc_t *sc = p;
984
985 /* If we get an interrupt while polling, then just ignore it. */
986 if (sc->sc_bus.use_polling) {
987 #ifdef DIAGNOSTIC
988 printf("ohci_intr: ignored interrupt while polling\n");
989 #endif
990 return (0);
991 }
992
993 return (ohci_intr1(sc));
994 }
995
996 static int
997 ohci_intr1(sc)
998 ohci_softc_t *sc;
999 {
1000 u_int32_t intrs, eintrs;
1001 ohci_physaddr_t done;
1002
1003 /* In case the interrupt occurs before initialization has completed. */
1004 if (sc == NULL || sc->sc_hcca == NULL) {
1005 #ifdef DIAGNOSTIC
1006 printf("ohci_intr: sc->sc_hcca == NULL\n");
1007 #endif
1008 return (0);
1009 }
1010
1011 intrs = 0;
1012 done = le32toh(sc->sc_hcca->hcca_done_head);
1013 if (done != 0) {
1014 if (done & ~OHCI_DONE_INTRS)
1015 intrs = OHCI_WDH;
1016 if (done & OHCI_DONE_INTRS)
1017 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
1018 } else
1019 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1020
1021 if (!intrs)
1022 return (0);
1023
1024 intrs &= ~OHCI_MIE;
1025 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
1026 eintrs = intrs & sc->sc_eintrs;
1027 if (!eintrs)
1028 return (0);
1029
1030 sc->sc_bus.intr_context++;
1031 sc->sc_bus.no_intrs++;
1032 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
1033 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
1034 (u_int)eintrs));
1035
1036 if (eintrs & OHCI_SO) {
1037 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev));
1038 /* XXX do what */
1039 intrs &= ~OHCI_SO;
1040 }
1041 if (eintrs & OHCI_WDH) {
1042 done &= ~OHCI_DONE_INTRS;
1043 if (sc->sc_done == 0)
1044 sc->sc_done = done;
1045 else {
1046 /* Tack on at the end of sc_done. */
1047 ohci_physaddr_t ldone;
1048 ohci_soft_td_t *std;
1049
1050 for (ldone = sc->sc_done; ldone != 0;
1051 ldone = le32toh(std->td.td_nexttd))
1052 std = ohci_hash_find_td(sc, ldone);
1053 std->td.td_nexttd = htole32(done);
1054 }
1055 sc->sc_hcca->hcca_done_head = 0;
1056 usb_schedsoftintr(&sc->sc_bus);
1057 intrs &= ~OHCI_WDH;
1058 }
1059 if (eintrs & OHCI_RD) {
1060 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
1061 /* XXX process resume detect */
1062 }
1063 if (eintrs & OHCI_UE) {
1064 printf("%s: unrecoverable error, controller halted\n",
1065 USBDEVNAME(sc->sc_bus.bdev));
1066 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1067 /* XXX what else */
1068 }
1069 if (eintrs & OHCI_RHSC) {
1070 ohci_rhsc(sc, sc->sc_intrxfer);
1071 intrs &= ~OHCI_RHSC;
1072
1073 /*
1074 * Disable RHSC interrupt for now, because it will be
1075 * on until the port has been reset.
1076 */
1077 ohci_rhsc_able(sc, 0);
1078 }
1079
1080 sc->sc_bus.intr_context--;
1081
1082 /* Block unprocessed interrupts. XXX */
1083 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs);
1084 sc->sc_eintrs &= ~intrs;
1085
1086 return (1);
1087 }
1088
1089 void
1090 ohci_rhsc_able(sc, on)
1091 ohci_softc_t *sc;
1092 int on;
1093 {
1094 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
1095 if (on) {
1096 sc->sc_eintrs |= OHCI_RHSC;
1097 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1098 } else {
1099 sc->sc_eintrs &= ~OHCI_RHSC;
1100 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
1101 }
1102 }
1103
1104 #ifdef OHCI_DEBUG
1105 char *ohci_cc_strs[] = {
1106 "NO_ERROR",
1107 "CRC",
1108 "BIT_STUFFING",
1109 "DATA_TOGGLE_MISMATCH",
1110 "STALL",
1111 "DEVICE_NOT_RESPONDING",
1112 "PID_CHECK_FAILURE",
1113 "UNEXPECTED_PID",
1114 "DATA_OVERRUN",
1115 "DATA_UNDERRUN",
1116 "BUFFER_OVERRUN",
1117 "BUFFER_UNDERRUN",
1118 "reserved",
1119 "reserved",
1120 "NOT_ACCESSED",
1121 "NOT_ACCESSED",
1122 };
1123 #endif
1124
1125 void
1126 ohci_softintr(bus)
1127 struct usbd_bus *bus;
1128 {
1129 ohci_softc_t *sc = (ohci_softc_t *)bus;
1130 ohci_physaddr_t done;
1131 ohci_soft_td_t *std, *sdone, *stdnext;
1132 usbd_xfer_handle xfer;
1133 int len, cc, s;
1134
1135 sc->sc_bus.intr_context++;
1136
1137 s = splhardusb();
1138 done = sc->sc_done;
1139 sc->sc_done = 0;
1140 splx(s);
1141
1142 DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done));
1143
1144 /* Reverse the done list. */
1145 for (sdone = NULL; done != 0; done = le32toh(std->td.td_nexttd)) {
1146 std = ohci_hash_find_td(sc, done);
1147 std->dnext = sdone;
1148 sdone = std;
1149 }
1150
1151 #ifdef OHCI_DEBUG
1152 if (ohcidebug > 10) {
1153 DPRINTF(("ohci_process_done: TD done:\n"));
1154 ohci_dump_tds(sdone);
1155 }
1156 #endif
1157
1158 for (std = sdone; std; std = stdnext) {
1159 xfer = std->xfer;
1160 stdnext = std->dnext;
1161 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
1162 std, xfer, xfer ? xfer->hcpriv : 0));
1163 if (xfer == NULL) {
1164 /* xfer == NULL: There seems to be no xfer associated
1165 * with this TD. It is tailp that happened to end up on
1166 * the done queue.
1167 */
1168 continue;
1169 }
1170 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags));
1171 usb_untimeout(ohci_timeout, xfer, xfer->timo_handle);
1172 if (xfer->status == USBD_CANCELLED ||
1173 xfer->status == USBD_TIMEOUT) {
1174 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1175 xfer));
1176 /* Handled by abort routine. */
1177 } else if (cc == OHCI_CC_NO_ERROR) {
1178 len = std->len;
1179 if (std->td.td_cbp != 0)
1180 len -= le32toh(std->td.td_be) -
1181 le32toh(std->td.td_cbp) + 1;
1182 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n",
1183 len, std->flags));
1184 if (std->flags & OHCI_ADD_LEN)
1185 xfer->actlen += len;
1186 if (std->flags & OHCI_CALL_DONE) {
1187 xfer->status = USBD_NORMAL_COMPLETION;
1188 usb_transfer_complete(xfer);
1189 }
1190 ohci_free_std(sc, std);
1191 } else {
1192 /*
1193 * Endpoint is halted. First unlink all the TDs
1194 * belonging to the failed transfer, and then restart
1195 * the endpoint.
1196 */
1197 ohci_soft_td_t *p, *n;
1198 struct ohci_pipe *opipe =
1199 (struct ohci_pipe *)xfer->pipe;
1200
1201 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
1202 OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
1203 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))]));
1204
1205 /* remove TDs */
1206 for (p = std; p->xfer == xfer; p = n) {
1207 n = p->nexttd;
1208 ohci_free_std(sc, p);
1209 }
1210
1211 /* clear halt */
1212 opipe->sed->ed.ed_headp = htole32(p->physaddr);
1213 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1214
1215 if (cc == OHCI_CC_STALL)
1216 xfer->status = USBD_STALLED;
1217 else
1218 xfer->status = USBD_IOERROR;
1219 usb_transfer_complete(xfer);
1220 }
1221 }
1222
1223 sc->sc_bus.intr_context--;
1224 }
1225
1226 void
1227 ohci_device_ctrl_done(xfer)
1228 usbd_xfer_handle xfer;
1229 {
1230 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer));
1231
1232 #ifdef DIAGNOSTIC
1233 if (!(xfer->rqflags & URQ_REQUEST)) {
1234 panic("ohci_ctrl_done: not a request\n");
1235 }
1236 #endif
1237 xfer->hcpriv = NULL;
1238 }
1239
1240 void
1241 ohci_device_intr_done(xfer)
1242 usbd_xfer_handle xfer;
1243 {
1244 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1245 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1246 ohci_soft_ed_t *sed = opipe->sed;
1247 ohci_soft_td_t *data, *tail;
1248
1249
1250 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n",
1251 xfer, xfer->actlen));
1252
1253 xfer->hcpriv = NULL;
1254
1255 if (xfer->pipe->repeat) {
1256 data = opipe->tail.td;
1257 tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1258 if (tail == NULL) {
1259 xfer->status = USBD_NOMEM;
1260 return;
1261 }
1262 tail->xfer = NULL;
1263
1264 data->td.td_flags = htole32(
1265 OHCI_TD_IN | OHCI_TD_NOCC |
1266 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1267 if (xfer->flags & USBD_SHORT_XFER_OK)
1268 data->td.td_flags |= htole32(OHCI_TD_R);
1269 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf));
1270 data->nexttd = tail;
1271 data->td.td_nexttd = htole32(tail->physaddr);
1272 data->td.td_be = htole32(le32toh(data->td.td_cbp) +
1273 xfer->length - 1);
1274 data->len = xfer->length;
1275 data->xfer = xfer;
1276 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1277 xfer->hcpriv = data;
1278 xfer->actlen = 0;
1279
1280 sed->ed.ed_tailp = htole32(tail->physaddr);
1281 opipe->tail.td = tail;
1282 }
1283 }
1284
1285 void
1286 ohci_device_bulk_done(xfer)
1287 usbd_xfer_handle xfer;
1288 {
1289 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n",
1290 xfer, xfer->actlen));
1291
1292 xfer->hcpriv = NULL;
1293 }
1294
1295 void
1296 ohci_rhsc(sc, xfer)
1297 ohci_softc_t *sc;
1298 usbd_xfer_handle xfer;
1299 {
1300 usbd_pipe_handle pipe;
1301 struct ohci_pipe *opipe;
1302 u_char *p;
1303 int i, m;
1304 int hstatus;
1305
1306 hstatus = OREAD4(sc, OHCI_RH_STATUS);
1307 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1308 sc, xfer, hstatus));
1309
1310 if (xfer == NULL) {
1311 /* Just ignore the change. */
1312 return;
1313 }
1314
1315 pipe = xfer->pipe;
1316 opipe = (struct ohci_pipe *)pipe;
1317
1318 p = KERNADDR(&xfer->dmabuf);
1319 m = min(sc->sc_noport, xfer->length * 8 - 1);
1320 memset(p, 0, xfer->length);
1321 for (i = 1; i <= m; i++) {
1322 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1323 p[i/8] |= 1 << (i%8);
1324 }
1325 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1326 xfer->actlen = xfer->length;
1327 xfer->status = USBD_NORMAL_COMPLETION;
1328
1329 usb_transfer_complete(xfer);
1330 }
1331
1332 void
1333 ohci_root_intr_done(xfer)
1334 usbd_xfer_handle xfer;
1335 {
1336 xfer->hcpriv = NULL;
1337 }
1338
1339 void
1340 ohci_root_ctrl_done(xfer)
1341 usbd_xfer_handle xfer;
1342 {
1343 xfer->hcpriv = NULL;
1344 }
1345
1346 /*
1347 * Wait here until controller claims to have an interrupt.
1348 * Then call ohci_intr and return. Use timeout to avoid waiting
1349 * too long.
1350 */
1351 void
1352 ohci_waitintr(sc, xfer)
1353 ohci_softc_t *sc;
1354 usbd_xfer_handle xfer;
1355 {
1356 int timo = xfer->timeout;
1357 int usecs;
1358 u_int32_t intrs;
1359
1360 xfer->status = USBD_IN_PROGRESS;
1361 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
1362 usb_delay_ms(&sc->sc_bus, 1);
1363 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1364 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1365 #ifdef OHCI_DEBUG
1366 if (ohcidebug > 15)
1367 ohci_dumpregs(sc);
1368 #endif
1369 if (intrs) {
1370 ohci_intr1(sc);
1371 if (xfer->status != USBD_IN_PROGRESS)
1372 return;
1373 }
1374 }
1375
1376 /* Timeout */
1377 DPRINTF(("ohci_waitintr: timeout\n"));
1378 xfer->status = USBD_TIMEOUT;
1379 usb_transfer_complete(xfer);
1380 /* XXX should free TD */
1381 }
1382
1383 void
1384 ohci_poll(bus)
1385 struct usbd_bus *bus;
1386 {
1387 ohci_softc_t *sc = (ohci_softc_t *)bus;
1388
1389 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
1390 ohci_intr1(sc);
1391 }
1392
1393 usbd_status
1394 ohci_device_request(xfer)
1395 usbd_xfer_handle xfer;
1396 {
1397 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1398 usb_device_request_t *req = &xfer->request;
1399 usbd_device_handle dev = opipe->pipe.device;
1400 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1401 int addr = dev->address;
1402 ohci_soft_td_t *setup, *data = 0, *stat, *next, *tail;
1403 ohci_soft_ed_t *sed;
1404 int isread;
1405 int len;
1406 usbd_status err;
1407 int s;
1408
1409 isread = req->bmRequestType & UT_READ;
1410 len = UGETW(req->wLength);
1411
1412 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1413 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1414 req->bmRequestType, req->bRequest, UGETW(req->wValue),
1415 UGETW(req->wIndex), len, addr,
1416 opipe->pipe.endpoint->edesc->bEndpointAddress));
1417
1418 setup = opipe->tail.td;
1419 stat = ohci_alloc_std(sc);
1420 if (stat == NULL) {
1421 err = USBD_NOMEM;
1422 goto bad1;
1423 }
1424 tail = ohci_alloc_std(sc);
1425 if (tail == NULL) {
1426 err = USBD_NOMEM;
1427 goto bad2;
1428 }
1429 tail->xfer = NULL;
1430
1431 sed = opipe->sed;
1432 opipe->u.ctl.length = len;
1433
1434 /* Update device address and length since they may have changed. */
1435 /* XXX This only needs to be done once, but it's too early in open. */
1436 sed->ed.ed_flags = htole32(
1437 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1438 OHCI_ED_SET_FA(addr) |
1439 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1440
1441 /* Set up data transaction */
1442 if (len != 0) {
1443 data = ohci_alloc_std(sc);
1444 if (data == NULL) {
1445 err = USBD_NOMEM;
1446 goto bad3;
1447 }
1448 data->td.td_flags = htole32(
1449 (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
1450 OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR |
1451 (xfer->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0));
1452 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf));
1453 data->nexttd = stat;
1454 data->td.td_nexttd = htole32(stat->physaddr);
1455 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1);
1456 data->len = len;
1457 data->xfer = xfer;
1458 data->flags = OHCI_ADD_LEN;
1459
1460 next = data;
1461 stat->flags = OHCI_CALL_DONE;
1462 } else {
1463 next = stat;
1464 /* XXX ADD_LEN? */
1465 stat->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1466 }
1467
1468 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req);
1469
1470 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1471 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1472 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma));
1473 setup->nexttd = next;
1474 setup->td.td_nexttd = htole32(next->physaddr);
1475 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1);
1476 setup->len = 0; /* XXX The number of byte we count */
1477 setup->xfer = xfer;
1478 setup->flags = 0;
1479 xfer->hcpriv = setup;
1480
1481 stat->td.td_flags = htole32(
1482 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC |
1483 OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1484 stat->td.td_cbp = 0;
1485 stat->nexttd = tail;
1486 stat->td.td_nexttd = htole32(tail->physaddr);
1487 stat->td.td_be = 0;
1488 stat->len = 0;
1489 stat->xfer = xfer;
1490
1491 #ifdef OHCI_DEBUG
1492 if (ohcidebug > 5) {
1493 DPRINTF(("ohci_device_request:\n"));
1494 ohci_dump_ed(sed);
1495 ohci_dump_tds(setup);
1496 }
1497 #endif
1498
1499 /* Insert ED in schedule */
1500 s = splusb();
1501 sed->ed.ed_tailp = htole32(tail->physaddr);
1502 opipe->tail.td = tail;
1503 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1504 if (xfer->timeout && !sc->sc_bus.use_polling) {
1505 usb_timeout(ohci_timeout, xfer,
1506 MS_TO_TICKS(xfer->timeout), xfer->timo_handle);
1507 }
1508 splx(s);
1509
1510 #ifdef OHCI_DEBUG
1511 if (ohcidebug > 5) {
1512 usb_delay_ms(&sc->sc_bus, 5);
1513 DPRINTF(("ohci_device_request: status=%x\n",
1514 OREAD4(sc, OHCI_COMMAND_STATUS)));
1515 ohci_dump_ed(sed);
1516 ohci_dump_tds(setup);
1517 }
1518 #endif
1519
1520 return (USBD_NORMAL_COMPLETION);
1521
1522 bad3:
1523 ohci_free_std(sc, tail);
1524 bad2:
1525 ohci_free_std(sc, stat);
1526 bad1:
1527 return (err);
1528 }
1529
1530 /*
1531 * Add an ED to the schedule. Called at splusb().
1532 */
1533 void
1534 ohci_add_ed(sed, head)
1535 ohci_soft_ed_t *sed;
1536 ohci_soft_ed_t *head;
1537 {
1538 SPLUSBCHECK;
1539 sed->next = head->next;
1540 sed->ed.ed_nexted = head->ed.ed_nexted;
1541 head->next = sed;
1542 head->ed.ed_nexted = htole32(sed->physaddr);
1543 }
1544
1545 /*
1546 * Remove an ED from the schedule. Called at splusb().
1547 */
1548 void
1549 ohci_rem_ed(sed, head)
1550 ohci_soft_ed_t *sed;
1551 ohci_soft_ed_t *head;
1552 {
1553 ohci_soft_ed_t *p;
1554
1555 SPLUSBCHECK;
1556
1557 /* XXX */
1558 for (p = head; p == NULL && p->next != sed; p = p->next)
1559 ;
1560 if (p == NULL)
1561 panic("ohci_rem_ed: ED not found\n");
1562 p->next = sed->next;
1563 p->ed.ed_nexted = sed->ed.ed_nexted;
1564 }
1565
1566 /*
1567 * When a transfer is completed the TD is added to the done queue by
1568 * the host controller. This queue is the processed by software.
1569 * Unfortunately the queue contains the physical address of the TD
1570 * and we have no simple way to translate this back to a kernel address.
1571 * To make the translation possible (and fast) we use a hash table of
1572 * TDs currently in the schedule. The physical address is used as the
1573 * hash value.
1574 */
1575
1576 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1577 /* Called at splusb() */
1578 void
1579 ohci_hash_add_td(sc, std)
1580 ohci_softc_t *sc;
1581 ohci_soft_td_t *std;
1582 {
1583 int h = HASH(std->physaddr);
1584
1585 SPLUSBCHECK;
1586
1587 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1588 }
1589
1590 /* Called at splusb() */
1591 void
1592 ohci_hash_rem_td(sc, std)
1593 ohci_softc_t *sc;
1594 ohci_soft_td_t *std;
1595 {
1596 SPLUSBCHECK;
1597
1598 LIST_REMOVE(std, hnext);
1599 }
1600
1601 ohci_soft_td_t *
1602 ohci_hash_find_td(sc, a)
1603 ohci_softc_t *sc;
1604 ohci_physaddr_t a;
1605 {
1606 int h = HASH(a);
1607 ohci_soft_td_t *std;
1608
1609 for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1610 std != NULL;
1611 std = LIST_NEXT(std, hnext))
1612 if (std->physaddr == a)
1613 return (std);
1614 panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a);
1615 }
1616
1617 void
1618 ohci_timeout(addr)
1619 void *addr;
1620 {
1621 usbd_xfer_handle xfer = addr;
1622 int s;
1623
1624 DPRINTF(("ohci_timeout: xfer=%p\n", xfer));
1625
1626 s = splusb();
1627 xfer->device->bus->intr_context++;
1628 ohci_abort_xfer(xfer, USBD_TIMEOUT);
1629 xfer->device->bus->intr_context--;
1630 splx(s);
1631 }
1632
1633 #ifdef OHCI_DEBUG
1634 void
1635 ohci_dump_tds(std)
1636 ohci_soft_td_t *std;
1637 {
1638 for (; std; std = std->nexttd)
1639 ohci_dump_td(std);
1640 }
1641
1642 void
1643 ohci_dump_td(std)
1644 ohci_soft_td_t *std;
1645 {
1646 DPRINTF(("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx "
1647 "nexttd=0x%08lx be=0x%08lx\n",
1648 std, (u_long)std->physaddr,
1649 (int)le32toh(std->td.td_flags),
1650 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1651 OHCI_TD_GET_DI(le32toh(std->td.td_flags)),
1652 OHCI_TD_GET_EC(le32toh(std->td.td_flags)),
1653 OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
1654 (u_long)le32toh(std->td.td_cbp),
1655 (u_long)le32toh(std->td.td_nexttd),
1656 (u_long)le32toh(std->td.td_be)));
1657 }
1658
1659 void
1660 ohci_dump_ed(sed)
1661 ohci_soft_ed_t *sed;
1662 {
1663 DPRINTF(("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx "
1664 "headflags=%b headp=0x%08lx nexted=0x%08lx\n",
1665 sed, (u_long)sed->physaddr,
1666 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)),
1667 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)),
1668 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)),
1669 (int)le32toh(sed->ed.ed_flags),
1670 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
1671 (u_long)le32toh(sed->ed.ed_tailp),
1672 (u_long)le32toh(sed->ed.ed_headp),
1673 "\20\1HALT\2CARRY",
1674 (u_long)le32toh(sed->ed.ed_headp),
1675 (u_long)le32toh(sed->ed.ed_nexted)));
1676 }
1677 #endif
1678
1679 usbd_status
1680 ohci_open(pipe)
1681 usbd_pipe_handle pipe;
1682 {
1683 usbd_device_handle dev = pipe->device;
1684 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1685 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1686 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1687 u_int8_t addr = dev->address;
1688 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
1689 ohci_soft_ed_t *sed;
1690 ohci_soft_td_t *std;
1691 ohci_soft_itd_t *sitd;
1692 ohci_physaddr_t tdphys;
1693 u_int32_t fmt;
1694 usbd_status err;
1695 int s;
1696 int ival;
1697
1698 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1699 pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1700 if (addr == sc->sc_addr) {
1701 switch (ed->bEndpointAddress) {
1702 case USB_CONTROL_ENDPOINT:
1703 pipe->methods = &ohci_root_ctrl_methods;
1704 break;
1705 case UE_DIR_IN | OHCI_INTR_ENDPT:
1706 pipe->methods = &ohci_root_intr_methods;
1707 break;
1708 default:
1709 return (USBD_INVAL);
1710 }
1711 } else {
1712 sed = ohci_alloc_sed(sc);
1713 if (sed == NULL)
1714 goto bad0;
1715 opipe->sed = sed;
1716 if (xfertype == UE_ISOCHRONOUS) {
1717 sitd = ohci_alloc_sitd(sc);
1718 if (sitd == NULL) {
1719 ohci_free_sitd(sc, sitd);
1720 goto bad1;
1721 }
1722 opipe->tail.itd = sitd;
1723 tdphys = sitd->physaddr;
1724 fmt = OHCI_ED_FORMAT_ISO;
1725 } else {
1726 std = ohci_alloc_std(sc);
1727 if (std == NULL) {
1728 ohci_free_std(sc, std);
1729 goto bad1;
1730 }
1731 opipe->tail.td = std;
1732 tdphys = std->physaddr;
1733 fmt = OHCI_ED_FORMAT_GEN;
1734 }
1735 sed->ed.ed_flags = htole32(
1736 OHCI_ED_SET_FA(addr) |
1737 OHCI_ED_SET_EN(ed->bEndpointAddress) |
1738 OHCI_ED_DIR_TD |
1739 (dev->lowspeed ? OHCI_ED_SPEED : 0) | fmt |
1740 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
1741 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys);
1742
1743 switch (xfertype) {
1744 case UE_CONTROL:
1745 pipe->methods = &ohci_device_ctrl_methods;
1746 err = usb_allocmem(&sc->sc_bus,
1747 sizeof(usb_device_request_t),
1748 0, &opipe->u.ctl.reqdma);
1749 if (err)
1750 goto bad;
1751 s = splusb();
1752 ohci_add_ed(sed, sc->sc_ctrl_head);
1753 splx(s);
1754 break;
1755 case UE_INTERRUPT:
1756 pipe->methods = &ohci_device_intr_methods;
1757 ival = pipe->interval;
1758 if (ival == USBD_DEFAULT_INTERVAL)
1759 ival = ed->bInterval;
1760 return (ohci_device_setintr(sc, opipe, ival));
1761 case UE_ISOCHRONOUS:
1762 pipe->methods = &ohci_device_isoc_methods;
1763 return (ohci_setup_isoc(pipe));
1764 case UE_BULK:
1765 pipe->methods = &ohci_device_bulk_methods;
1766 s = splusb();
1767 ohci_add_ed(sed, sc->sc_bulk_head);
1768 splx(s);
1769 break;
1770 }
1771 }
1772 return (USBD_NORMAL_COMPLETION);
1773
1774 bad:
1775 ohci_free_std(sc, std);
1776 bad1:
1777 ohci_free_sed(sc, sed);
1778 bad0:
1779 return (USBD_NOMEM);
1780
1781 }
1782
1783 /*
1784 * Close a reqular pipe.
1785 * Assumes that there are no pending transactions.
1786 */
1787 void
1788 ohci_close_pipe(pipe, head)
1789 usbd_pipe_handle pipe;
1790 ohci_soft_ed_t *head;
1791 {
1792 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1793 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1794 ohci_soft_ed_t *sed = opipe->sed;
1795 int s;
1796
1797 s = splusb();
1798 #ifdef DIAGNOSTIC
1799 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
1800 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
1801 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) {
1802 ohci_physaddr_t td = le32toh(sed->ed.ed_headp);
1803 ohci_soft_td_t *std;
1804 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]);
1805 std != NULL;
1806 std = LIST_NEXT(std, hnext))
1807 if (std->physaddr == td)
1808 break;
1809 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
1810 "tl=0x%x pipe=%p, std=%p\n", sed,
1811 (int)le32toh(sed->ed.ed_headp),
1812 (int)le32toh(sed->ed.ed_tailp),
1813 pipe, std);
1814 usb_delay_ms(&sc->sc_bus, 2);
1815 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
1816 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
1817 printf("ohci_close_pipe: pipe still not empty\n");
1818 }
1819 #endif
1820 ohci_rem_ed(sed, head);
1821 splx(s);
1822 ohci_free_sed(sc, opipe->sed);
1823 }
1824
1825 /*
1826 * Abort a device request.
1827 * If this routine is called at splusb() it guarantees that the request
1828 * will be removed from the hardware scheduling and that the callback
1829 * for it will be called with USBD_CANCELLED status.
1830 * It's impossible to guarantee that the requested transfer will not
1831 * have happened since the hardware runs concurrently.
1832 * If the transaction has already happened we rely on the ordinary
1833 * interrupt processing to process it.
1834 */
1835 void
1836 ohci_abort_xfer(xfer, status)
1837 usbd_xfer_handle xfer;
1838 usbd_status status;
1839 {
1840 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1841 ohci_soft_ed_t *sed;
1842
1843 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p\n", xfer, opipe));
1844
1845 xfer->status = status;
1846
1847 usb_untimeout(ohci_timeout, xfer, xfer->timo_handle);
1848
1849 sed = opipe->sed;
1850 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
1851 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
1852
1853 #if 1
1854 if (xfer->device->bus->intr_context) {
1855 /* We have no process context, so we can't use tsleep(). */
1856 timeout(ohci_abort_xfer_end, xfer, hz / USB_FRAMES_PER_SECOND);
1857 } else {
1858 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__)
1859 KASSERT(intr_nesting_level == 0,
1860 ("ohci_abort_req in interrupt context"));
1861 #endif
1862 usb_delay_ms(opipe->pipe.device->bus, 1);
1863 ohci_abort_xfer_end(xfer);
1864 }
1865 #else
1866 delay(1000);
1867 ohci_abort_xfer_end(xfer);
1868 #endif
1869 }
1870
1871 void
1872 ohci_abort_xfer_end(v)
1873 void *v;
1874 {
1875 usbd_xfer_handle xfer = v;
1876 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1877 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1878 ohci_soft_ed_t *sed;
1879 ohci_soft_td_t *p, *n;
1880 int s;
1881
1882 s = splusb();
1883
1884 p = xfer->hcpriv;
1885 #ifdef DIAGNOSTIC
1886 if (p == NULL) {
1887 printf("ohci_abort_xfer: hcpriv==0\n");
1888 return;
1889 }
1890 #endif
1891 for (; p->xfer == xfer; p = n) {
1892 n = p->nexttd;
1893 ohci_free_std(sc, p);
1894 }
1895
1896 sed = opipe->sed;
1897 DPRINTFN(2,("ohci_abort_xfer: set hd=%x, tl=%x\n",
1898 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp)));
1899 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */
1900 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
1901
1902 usb_transfer_complete(xfer);
1903
1904 splx(s);
1905 }
1906
1907 /*
1908 * Data structures and routines to emulate the root hub.
1909 */
1910 static usb_device_descriptor_t ohci_devd = {
1911 USB_DEVICE_DESCRIPTOR_SIZE,
1912 UDESC_DEVICE, /* type */
1913 {0x00, 0x01}, /* USB version */
1914 UDCLASS_HUB, /* class */
1915 UDSUBCLASS_HUB, /* subclass */
1916 0, /* protocol */
1917 64, /* max packet */
1918 {0},{0},{0x00,0x01}, /* device id */
1919 1,2,0, /* string indicies */
1920 1 /* # of configurations */
1921 };
1922
1923 static usb_config_descriptor_t ohci_confd = {
1924 USB_CONFIG_DESCRIPTOR_SIZE,
1925 UDESC_CONFIG,
1926 {USB_CONFIG_DESCRIPTOR_SIZE +
1927 USB_INTERFACE_DESCRIPTOR_SIZE +
1928 USB_ENDPOINT_DESCRIPTOR_SIZE},
1929 1,
1930 1,
1931 0,
1932 UC_SELF_POWERED,
1933 0 /* max power */
1934 };
1935
1936 static usb_interface_descriptor_t ohci_ifcd = {
1937 USB_INTERFACE_DESCRIPTOR_SIZE,
1938 UDESC_INTERFACE,
1939 0,
1940 0,
1941 1,
1942 UICLASS_HUB,
1943 UISUBCLASS_HUB,
1944 0,
1945 0
1946 };
1947
1948 static usb_endpoint_descriptor_t ohci_endpd = {
1949 USB_ENDPOINT_DESCRIPTOR_SIZE,
1950 UDESC_ENDPOINT,
1951 UE_DIR_IN | OHCI_INTR_ENDPT,
1952 UE_INTERRUPT,
1953 {8, 0}, /* max packet */
1954 255
1955 };
1956
1957 static usb_hub_descriptor_t ohci_hubd = {
1958 USB_HUB_DESCRIPTOR_SIZE,
1959 UDESC_HUB,
1960 0,
1961 {0,0},
1962 0,
1963 0,
1964 {0},
1965 };
1966
1967 static int
1968 ohci_str(p, l, s)
1969 usb_string_descriptor_t *p;
1970 int l;
1971 char *s;
1972 {
1973 int i;
1974
1975 if (l == 0)
1976 return (0);
1977 p->bLength = 2 * strlen(s) + 2;
1978 if (l == 1)
1979 return (1);
1980 p->bDescriptorType = UDESC_STRING;
1981 l -= 2;
1982 for (i = 0; s[i] && l > 1; i++, l -= 2)
1983 USETW2(p->bString[i], 0, s[i]);
1984 return (2*i+2);
1985 }
1986
1987 /*
1988 * Simulate a hardware hub by handling all the necessary requests.
1989 */
1990 static usbd_status
1991 ohci_root_ctrl_transfer(xfer)
1992 usbd_xfer_handle xfer;
1993 {
1994 usbd_status err;
1995
1996 /* Insert last in queue. */
1997 err = usb_insert_transfer(xfer);
1998 if (err)
1999 return (err);
2000
2001 /* Pipe isn't running, start first */
2002 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2003 }
2004
2005 static usbd_status
2006 ohci_root_ctrl_start(xfer)
2007 usbd_xfer_handle xfer;
2008 {
2009 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2010 usb_device_request_t *req;
2011 void *buf = NULL;
2012 int port, i;
2013 int s, len, value, index, l, totlen = 0;
2014 usb_port_status_t ps;
2015 usb_hub_descriptor_t hubd;
2016 usbd_status err;
2017 u_int32_t v;
2018
2019 #ifdef DIAGNOSTIC
2020 if (!(xfer->rqflags & URQ_REQUEST))
2021 /* XXX panic */
2022 return (USBD_INVAL);
2023 #endif
2024 req = &xfer->request;
2025
2026 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
2027 req->bmRequestType, req->bRequest));
2028
2029 len = UGETW(req->wLength);
2030 value = UGETW(req->wValue);
2031 index = UGETW(req->wIndex);
2032
2033 if (len != 0)
2034 buf = KERNADDR(&xfer->dmabuf);
2035
2036 #define C(x,y) ((x) | ((y) << 8))
2037 switch(C(req->bRequest, req->bmRequestType)) {
2038 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2039 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2040 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2041 /*
2042 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2043 * for the integrated root hub.
2044 */
2045 break;
2046 case C(UR_GET_CONFIG, UT_READ_DEVICE):
2047 if (len > 0) {
2048 *(u_int8_t *)buf = sc->sc_conf;
2049 totlen = 1;
2050 }
2051 break;
2052 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2053 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
2054 switch(value >> 8) {
2055 case UDESC_DEVICE:
2056 if ((value & 0xff) != 0) {
2057 err = USBD_IOERROR;
2058 goto ret;
2059 }
2060 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2061 USETW(ohci_devd.idVendor, sc->sc_id_vendor);
2062 memcpy(buf, &ohci_devd, l);
2063 break;
2064 case UDESC_CONFIG:
2065 if ((value & 0xff) != 0) {
2066 err = USBD_IOERROR;
2067 goto ret;
2068 }
2069 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2070 memcpy(buf, &ohci_confd, l);
2071 buf = (char *)buf + l;
2072 len -= l;
2073 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2074 totlen += l;
2075 memcpy(buf, &ohci_ifcd, l);
2076 buf = (char *)buf + l;
2077 len -= l;
2078 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2079 totlen += l;
2080 memcpy(buf, &ohci_endpd, l);
2081 break;
2082 case UDESC_STRING:
2083 if (len == 0)
2084 break;
2085 *(u_int8_t *)buf = 0;
2086 totlen = 1;
2087 switch (value & 0xff) {
2088 case 1: /* Vendor */
2089 totlen = ohci_str(buf, len, sc->sc_vendor);
2090 break;
2091 case 2: /* Product */
2092 totlen = ohci_str(buf, len, "OHCI root hub");
2093 break;
2094 }
2095 break;
2096 default:
2097 err = USBD_IOERROR;
2098 goto ret;
2099 }
2100 break;
2101 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2102 if (len > 0) {
2103 *(u_int8_t *)buf = 0;
2104 totlen = 1;
2105 }
2106 break;
2107 case C(UR_GET_STATUS, UT_READ_DEVICE):
2108 if (len > 1) {
2109 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2110 totlen = 2;
2111 }
2112 break;
2113 case C(UR_GET_STATUS, UT_READ_INTERFACE):
2114 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2115 if (len > 1) {
2116 USETW(((usb_status_t *)buf)->wStatus, 0);
2117 totlen = 2;
2118 }
2119 break;
2120 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2121 if (value >= USB_MAX_DEVICES) {
2122 err = USBD_IOERROR;
2123 goto ret;
2124 }
2125 sc->sc_addr = value;
2126 break;
2127 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2128 if (value != 0 && value != 1) {
2129 err = USBD_IOERROR;
2130 goto ret;
2131 }
2132 sc->sc_conf = value;
2133 break;
2134 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2135 break;
2136 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2137 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2138 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2139 err = USBD_IOERROR;
2140 goto ret;
2141 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2142 break;
2143 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2144 break;
2145 /* Hub requests */
2146 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2147 break;
2148 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2149 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2150 "port=%d feature=%d\n",
2151 index, value));
2152 if (index < 1 || index > sc->sc_noport) {
2153 err = USBD_IOERROR;
2154 goto ret;
2155 }
2156 port = OHCI_RH_PORT_STATUS(index);
2157 switch(value) {
2158 case UHF_PORT_ENABLE:
2159 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2160 break;
2161 case UHF_PORT_SUSPEND:
2162 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2163 break;
2164 case UHF_PORT_POWER:
2165 OWRITE4(sc, port, UPS_LOW_SPEED);
2166 break;
2167 case UHF_C_PORT_CONNECTION:
2168 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2169 break;
2170 case UHF_C_PORT_ENABLE:
2171 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2172 break;
2173 case UHF_C_PORT_SUSPEND:
2174 OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2175 break;
2176 case UHF_C_PORT_OVER_CURRENT:
2177 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2178 break;
2179 case UHF_C_PORT_RESET:
2180 OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2181 break;
2182 default:
2183 err = USBD_IOERROR;
2184 goto ret;
2185 }
2186 switch(value) {
2187 case UHF_C_PORT_CONNECTION:
2188 case UHF_C_PORT_ENABLE:
2189 case UHF_C_PORT_SUSPEND:
2190 case UHF_C_PORT_OVER_CURRENT:
2191 case UHF_C_PORT_RESET:
2192 /* Enable RHSC interrupt if condition is cleared. */
2193 if ((OREAD4(sc, port) >> 16) == 0)
2194 ohci_rhsc_able(sc, 1);
2195 break;
2196 default:
2197 break;
2198 }
2199 break;
2200 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2201 if (value != 0) {
2202 err = USBD_IOERROR;
2203 goto ret;
2204 }
2205 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2206 hubd = ohci_hubd;
2207 hubd.bNbrPorts = sc->sc_noport;
2208 USETW(hubd.wHubCharacteristics,
2209 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2210 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2211 /* XXX overcurrent */
2212 );
2213 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2214 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2215 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2216 hubd.DeviceRemovable[i++] = (u_int8_t)v;
2217 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2218 l = min(len, hubd.bDescLength);
2219 totlen = l;
2220 memcpy(buf, &hubd, l);
2221 break;
2222 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2223 if (len != 4) {
2224 err = USBD_IOERROR;
2225 goto ret;
2226 }
2227 memset(buf, 0, len); /* ? XXX */
2228 totlen = len;
2229 break;
2230 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2231 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
2232 index));
2233 if (index < 1 || index > sc->sc_noport) {
2234 err = USBD_IOERROR;
2235 goto ret;
2236 }
2237 if (len != 4) {
2238 err = USBD_IOERROR;
2239 goto ret;
2240 }
2241 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2242 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
2243 v));
2244 USETW(ps.wPortStatus, v);
2245 USETW(ps.wPortChange, v >> 16);
2246 l = min(len, sizeof ps);
2247 memcpy(buf, &ps, l);
2248 totlen = l;
2249 break;
2250 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2251 err = USBD_IOERROR;
2252 goto ret;
2253 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2254 break;
2255 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2256 if (index < 1 || index > sc->sc_noport) {
2257 err = USBD_IOERROR;
2258 goto ret;
2259 }
2260 port = OHCI_RH_PORT_STATUS(index);
2261 switch(value) {
2262 case UHF_PORT_ENABLE:
2263 OWRITE4(sc, port, UPS_PORT_ENABLED);
2264 break;
2265 case UHF_PORT_SUSPEND:
2266 OWRITE4(sc, port, UPS_SUSPEND);
2267 break;
2268 case UHF_PORT_RESET:
2269 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2270 index));
2271 OWRITE4(sc, port, UPS_RESET);
2272 for (i = 0; i < 10; i++) {
2273 usb_delay_ms(&sc->sc_bus, 10);
2274 if ((OREAD4(sc, port) & UPS_RESET) == 0)
2275 break;
2276 }
2277 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2278 index, OREAD4(sc, port)));
2279 break;
2280 case UHF_PORT_POWER:
2281 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2282 "%d\n", index));
2283 OWRITE4(sc, port, UPS_PORT_POWER);
2284 break;
2285 default:
2286 err = USBD_IOERROR;
2287 goto ret;
2288 }
2289 break;
2290 default:
2291 err = USBD_IOERROR;
2292 goto ret;
2293 }
2294 xfer->actlen = totlen;
2295 err = USBD_NORMAL_COMPLETION;
2296 ret:
2297 xfer->status = err;
2298 s = splusb();
2299 usb_transfer_complete(xfer);
2300 splx(s);
2301 return (USBD_IN_PROGRESS);
2302 }
2303
2304 /* Abort a root control request. */
2305 static void
2306 ohci_root_ctrl_abort(xfer)
2307 usbd_xfer_handle xfer;
2308 {
2309 /* Nothing to do, all transfers are synchronous. */
2310 }
2311
2312 /* Close the root pipe. */
2313 static void
2314 ohci_root_ctrl_close(pipe)
2315 usbd_pipe_handle pipe;
2316 {
2317 DPRINTF(("ohci_root_ctrl_close\n"));
2318 /* Nothing to do. */
2319 }
2320
2321 static usbd_status
2322 ohci_root_intr_transfer(xfer)
2323 usbd_xfer_handle xfer;
2324 {
2325 usbd_status err;
2326
2327 /* Insert last in queue. */
2328 err = usb_insert_transfer(xfer);
2329 if (err)
2330 return (err);
2331
2332 /* Pipe isn't running, start first */
2333 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2334 }
2335
2336 static usbd_status
2337 ohci_root_intr_start(xfer)
2338 usbd_xfer_handle xfer;
2339 {
2340 usbd_pipe_handle pipe = xfer->pipe;
2341 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2342
2343 sc->sc_intrxfer = xfer;
2344
2345 return (USBD_IN_PROGRESS);
2346 }
2347
2348 /* Abort a root interrupt request. */
2349 static void
2350 ohci_root_intr_abort(xfer)
2351 usbd_xfer_handle xfer;
2352 {
2353 int s;
2354
2355 if (xfer->pipe->intrxfer == xfer) {
2356 DPRINTF(("ohci_root_intr_abort: remove\n"));
2357 xfer->pipe->intrxfer = NULL;
2358 }
2359 xfer->status = USBD_CANCELLED;
2360 s = splusb();
2361 usb_transfer_complete(xfer);
2362 splx(s);
2363 }
2364
2365 /* Close the root pipe. */
2366 static void
2367 ohci_root_intr_close(pipe)
2368 usbd_pipe_handle pipe;
2369 {
2370 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2371
2372 DPRINTF(("ohci_root_intr_close\n"));
2373
2374 sc->sc_intrxfer = NULL;
2375 }
2376
2377 /************************/
2378
2379 static usbd_status
2380 ohci_device_ctrl_transfer(xfer)
2381 usbd_xfer_handle xfer;
2382 {
2383 usbd_status err;
2384
2385 /* Insert last in queue. */
2386 err = usb_insert_transfer(xfer);
2387 if (err)
2388 return (err);
2389
2390 /* Pipe isn't running, start first */
2391 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2392 }
2393
2394 static usbd_status
2395 ohci_device_ctrl_start(xfer)
2396 usbd_xfer_handle xfer;
2397 {
2398 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2399 usbd_status err;
2400
2401 #ifdef DIAGNOSTIC
2402 if (!(xfer->rqflags & URQ_REQUEST)) {
2403 /* XXX panic */
2404 printf("ohci_device_ctrl_transfer: not a request\n");
2405 return (USBD_INVAL);
2406 }
2407 #endif
2408
2409 err = ohci_device_request(xfer);
2410 if (err)
2411 return (err);
2412
2413 if (sc->sc_bus.use_polling)
2414 ohci_waitintr(sc, xfer);
2415 return (USBD_IN_PROGRESS);
2416 }
2417
2418 /* Abort a device control request. */
2419 static void
2420 ohci_device_ctrl_abort(xfer)
2421 usbd_xfer_handle xfer;
2422 {
2423 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2424 ohci_abort_xfer(xfer, USBD_CANCELLED);
2425 }
2426
2427 /* Close a device control pipe. */
2428 static void
2429 ohci_device_ctrl_close(pipe)
2430 usbd_pipe_handle pipe;
2431 {
2432 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2433 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2434
2435 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2436 ohci_close_pipe(pipe, sc->sc_ctrl_head);
2437 ohci_free_std(sc, opipe->tail.td);
2438 }
2439
2440 /************************/
2441
2442 static void
2443 ohci_device_clear_toggle(pipe)
2444 usbd_pipe_handle pipe;
2445 {
2446 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2447
2448 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY);
2449 }
2450
2451 static void
2452 ohci_noop(pipe)
2453 usbd_pipe_handle pipe;
2454 {
2455 }
2456
2457 static usbd_status
2458 ohci_device_bulk_transfer(xfer)
2459 usbd_xfer_handle xfer;
2460 {
2461 usbd_status err;
2462
2463 /* Insert last in queue. */
2464 err = usb_insert_transfer(xfer);
2465 if (err)
2466 return (err);
2467
2468 /* Pipe isn't running, start first */
2469 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2470 }
2471
2472 static usbd_status
2473 ohci_device_bulk_start(xfer)
2474 usbd_xfer_handle xfer;
2475 {
2476 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2477 usbd_device_handle dev = opipe->pipe.device;
2478 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2479 int addr = dev->address;
2480 ohci_soft_td_t *data, *tail, *tdp;
2481 ohci_soft_ed_t *sed;
2482 int s, len, isread, endpt;
2483 usbd_status err;
2484
2485 #ifdef DIAGNOSTIC
2486 if (xfer->rqflags & URQ_REQUEST) {
2487 /* XXX panic */
2488 printf("ohci_device_bulk_start: a request\n");
2489 return (USBD_INVAL);
2490 }
2491 #endif
2492
2493 len = xfer->length;
2494 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
2495 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2496 sed = opipe->sed;
2497
2498 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
2499 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
2500 endpt));
2501
2502 opipe->u.bulk.isread = isread;
2503 opipe->u.bulk.length = len;
2504
2505 /* Update device address */
2506 sed->ed.ed_flags = htole32(
2507 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2508 OHCI_ED_SET_FA(addr));
2509
2510 /* Allocate a chain of new TDs (including a new tail). */
2511 data = opipe->tail.td;
2512 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer->flags,
2513 &xfer->dmabuf, data, &tail);
2514 if (err)
2515 return (err);
2516
2517 tail->xfer = NULL;
2518 xfer->hcpriv = data;
2519
2520 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2521 "td_cbp=0x%08x td_be=0x%08x\n",
2522 (int)le32toh(sed->ed.ed_flags),
2523 (int)le32toh(data->td.td_flags),
2524 (int)le32toh(data->td.td_cbp),
2525 (int)le32toh(data->td.td_be)));
2526
2527 #ifdef OHCI_DEBUG
2528 if (ohcidebug > 5) {
2529 ohci_dump_ed(sed);
2530 ohci_dump_tds(data);
2531 }
2532 #endif
2533
2534 /* Insert ED in schedule */
2535 s = splusb();
2536 for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
2537 tdp->xfer = xfer;
2538 }
2539 sed->ed.ed_tailp = htole32(tail->physaddr);
2540 opipe->tail.td = tail;
2541 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
2542 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2543 if (xfer->timeout && !sc->sc_bus.use_polling) {
2544 usb_timeout(ohci_timeout, xfer,
2545 MS_TO_TICKS(xfer->timeout), xfer->timo_handle);
2546 }
2547
2548 #if 0
2549 /* This goes wrong if we are too slow. */
2550 if (ohcidebug > 10) {
2551 delay(10000);
2552 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2553 OREAD4(sc, OHCI_COMMAND_STATUS)));
2554 ohci_dump_ed(sed);
2555 ohci_dump_tds(data);
2556 }
2557 #endif
2558
2559 splx(s);
2560
2561 return (USBD_IN_PROGRESS);
2562 }
2563
2564 static void
2565 ohci_device_bulk_abort(xfer)
2566 usbd_xfer_handle xfer;
2567 {
2568 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
2569 ohci_abort_xfer(xfer, USBD_CANCELLED);
2570 }
2571
2572 /*
2573 * Close a device bulk pipe.
2574 */
2575 static void
2576 ohci_device_bulk_close(pipe)
2577 usbd_pipe_handle pipe;
2578 {
2579 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2580 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2581
2582 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
2583 ohci_close_pipe(pipe, sc->sc_bulk_head);
2584 ohci_free_std(sc, opipe->tail.td);
2585 }
2586
2587 /************************/
2588
2589 static usbd_status
2590 ohci_device_intr_transfer(xfer)
2591 usbd_xfer_handle xfer;
2592 {
2593 usbd_status err;
2594
2595 /* Insert last in queue. */
2596 err = usb_insert_transfer(xfer);
2597 if (err)
2598 return (err);
2599
2600 /* Pipe isn't running, start first */
2601 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2602 }
2603
2604 static usbd_status
2605 ohci_device_intr_start(xfer)
2606 usbd_xfer_handle xfer;
2607 {
2608 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2609 usbd_device_handle dev = opipe->pipe.device;
2610 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2611 ohci_soft_ed_t *sed = opipe->sed;
2612 ohci_soft_td_t *data, *tail;
2613 int len;
2614 int s;
2615
2616 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
2617 "flags=%d priv=%p\n",
2618 xfer, xfer->length, xfer->flags, xfer->priv));
2619
2620 #ifdef DIAGNOSTIC
2621 if (xfer->rqflags & URQ_REQUEST)
2622 panic("ohci_device_intr_transfer: a request\n");
2623 #endif
2624
2625 len = xfer->length;
2626
2627 data = opipe->tail.td;
2628 tail = ohci_alloc_std(sc);
2629 if (tail == NULL)
2630 return (USBD_NOMEM);
2631 tail->xfer = NULL;
2632
2633 data->td.td_flags = htole32(
2634 OHCI_TD_IN | OHCI_TD_NOCC |
2635 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
2636 if (xfer->flags & USBD_SHORT_XFER_OK)
2637 data->td.td_flags |= htole32(OHCI_TD_R);
2638 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf));
2639 data->nexttd = tail;
2640 data->td.td_nexttd = htole32(tail->physaddr);
2641 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1);
2642 data->len = len;
2643 data->xfer = xfer;
2644 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
2645 xfer->hcpriv = data;
2646
2647 #ifdef OHCI_DEBUG
2648 if (ohcidebug > 5) {
2649 DPRINTF(("ohci_device_intr_transfer:\n"));
2650 ohci_dump_ed(sed);
2651 ohci_dump_tds(data);
2652 }
2653 #endif
2654
2655 /* Insert ED in schedule */
2656 s = splusb();
2657 sed->ed.ed_tailp = htole32(tail->physaddr);
2658 opipe->tail.td = tail;
2659 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
2660
2661 #if 0
2662 /*
2663 * This goes horribly wrong, printing thousands of descriptors,
2664 * because false references are followed due to the fact that the
2665 * TD is gone.
2666 */
2667 if (ohcidebug > 5) {
2668 usb_delay_ms(&sc->sc_bus, 5);
2669 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2670 OREAD4(sc, OHCI_COMMAND_STATUS)));
2671 ohci_dump_ed(sed);
2672 ohci_dump_tds(data);
2673 }
2674 #endif
2675 splx(s);
2676
2677 return (USBD_IN_PROGRESS);
2678 }
2679
2680 /* Abort a device control request. */
2681 static void
2682 ohci_device_intr_abort(xfer)
2683 usbd_xfer_handle xfer;
2684 {
2685 if (xfer->pipe->intrxfer == xfer) {
2686 DPRINTF(("ohci_device_intr_abort: remove\n"));
2687 xfer->pipe->intrxfer = NULL;
2688 }
2689 ohci_abort_xfer(xfer, USBD_CANCELLED);
2690 }
2691
2692 /* Close a device interrupt pipe. */
2693 static void
2694 ohci_device_intr_close(pipe)
2695 usbd_pipe_handle pipe;
2696 {
2697 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2698 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2699 int nslots = opipe->u.intr.nslots;
2700 int pos = opipe->u.intr.pos;
2701 int j;
2702 ohci_soft_ed_t *p, *sed = opipe->sed;
2703 int s;
2704
2705 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
2706 pipe, nslots, pos));
2707 s = splusb();
2708 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
2709 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2710 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
2711 usb_delay_ms(&sc->sc_bus, 2);
2712
2713 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
2714 ;
2715 #ifdef DIAGNOSTIC
2716 if (p == NULL)
2717 panic("ohci_device_intr_close: ED not found\n");
2718 #endif
2719 p->next = sed->next;
2720 p->ed.ed_nexted = sed->ed.ed_nexted;
2721 splx(s);
2722
2723 for (j = 0; j < nslots; j++)
2724 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
2725
2726 ohci_free_std(sc, opipe->tail.td);
2727 ohci_free_sed(sc, opipe->sed);
2728 }
2729
2730 static usbd_status
2731 ohci_device_setintr(sc, opipe, ival)
2732 ohci_softc_t *sc;
2733 struct ohci_pipe *opipe;
2734 int ival;
2735 {
2736 int i, j, s, best;
2737 u_int npoll, slow, shigh, nslots;
2738 u_int bestbw, bw;
2739 ohci_soft_ed_t *hsed, *sed = opipe->sed;
2740
2741 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
2742 if (ival == 0) {
2743 printf("ohci_setintr: 0 interval\n");
2744 return (USBD_INVAL);
2745 }
2746
2747 npoll = OHCI_NO_INTRS;
2748 while (npoll > ival)
2749 npoll /= 2;
2750 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
2751
2752 /*
2753 * We now know which level in the tree the ED must go into.
2754 * Figure out which slot has most bandwidth left over.
2755 * Slots to examine:
2756 * npoll
2757 * 1 0
2758 * 2 1 2
2759 * 4 3 4 5 6
2760 * 8 7 8 9 10 11 12 13 14
2761 * N (N-1) .. (N-1+N-1)
2762 */
2763 slow = npoll-1;
2764 shigh = slow + npoll;
2765 nslots = OHCI_NO_INTRS / npoll;
2766 for (best = i = slow, bestbw = ~0; i < shigh; i++) {
2767 bw = 0;
2768 for (j = 0; j < nslots; j++)
2769 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
2770 if (bw < bestbw) {
2771 best = i;
2772 bestbw = bw;
2773 }
2774 }
2775 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
2776 best, slow, shigh, bestbw));
2777
2778 s = splusb();
2779 hsed = sc->sc_eds[best];
2780 sed->next = hsed->next;
2781 sed->ed.ed_nexted = hsed->ed.ed_nexted;
2782 hsed->next = sed;
2783 hsed->ed.ed_nexted = htole32(sed->physaddr);
2784 splx(s);
2785
2786 for (j = 0; j < nslots; j++)
2787 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
2788 opipe->u.intr.nslots = nslots;
2789 opipe->u.intr.pos = best;
2790
2791 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
2792 return (USBD_NORMAL_COMPLETION);
2793 }
2794
2795 /***********************/
2796
2797 usbd_status
2798 ohci_device_isoc_transfer(xfer)
2799 usbd_xfer_handle xfer;
2800 {
2801 usbd_status err;
2802
2803 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
2804
2805 /* Put it on our queue, */
2806 err = usb_insert_transfer(xfer);
2807
2808 /* bail out on error, */
2809 if (err && err != USBD_IN_PROGRESS)
2810 return (err);
2811
2812 /* XXX should check inuse here */
2813
2814 /* insert into schedule, */
2815 ohci_device_isoc_enter(xfer);
2816
2817 /* and put on interrupt list if the pipe wasn't running */
2818 if (!err)
2819 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
2820
2821 return (err);
2822 }
2823
2824 void
2825 ohci_device_isoc_enter(xfer)
2826 usbd_xfer_handle xfer;
2827 {
2828 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2829 usbd_device_handle dev = opipe->pipe.device;
2830 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2831 ohci_soft_ed_t *sed = opipe->sed;
2832 struct iso *iso = &opipe->u.iso;
2833 ohci_soft_itd_t *sitd, *nsitd;
2834 ohci_physaddr_t buf, offs;
2835 int i, ncur, nframes;
2836 int ncross;
2837 int s;
2838
2839 s = splusb();
2840 sitd = opipe->tail.itd;
2841 buf = DMAADDR(&xfer->dmabuf);
2842 sitd->itd.itd_bp0 = htole32(buf & OHCI_ITD_PAGE_MASK);
2843 nframes = xfer->nframes;
2844 offs = buf & OHCI_ITD_OFFSET_MASK;
2845 ncross = 0;
2846 for (i = ncur = 0; i < nframes; i++, ncur++) {
2847 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */
2848 ncross > 1) { /* too many page crossings */
2849
2850 nsitd = ohci_alloc_sitd(sc);
2851 if (nsitd == NULL) {
2852 /* XXX what now? */
2853 return;
2854 }
2855 sitd->nextitd = nsitd;
2856 sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
2857 sitd->itd.itd_flags = htole32(
2858 OHCI_ITD_NOCC |
2859 OHCI_ITD_SET_SF(iso->next) |
2860 OHCI_ITD_NOINTR |
2861 OHCI_ITD_SET_FC(OHCI_ITD_NOFFSET));
2862 sitd->itd.itd_be = htole32(
2863 le32toh(sitd->itd.itd_bp0) + offs - 1);
2864 nsitd->itd.itd_bp0 = htole32(
2865 (buf + offs) & OHCI_ITD_PAGE_MASK);
2866 sitd = nsitd;
2867 iso->next = iso->next + ncur;
2868 ncur = 0;
2869 ncross = 0;
2870 }
2871 /* XXX byte order */
2872 sitd->itd.itd_offset[i] =
2873 offs | (ncross == 1 ? OHCI_ITD_PAGE_SELECT : 0);
2874 offs += xfer->frlengths[i];
2875 /* XXX update ncross */
2876 }
2877 nsitd = ohci_alloc_sitd(sc);
2878 if (nsitd == NULL) {
2879 /* XXX what now? */
2880 return;
2881 }
2882 sitd->nextitd = nsitd;
2883 sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
2884 sitd->itd.itd_flags = le32toh(
2885 OHCI_ITD_NOCC |
2886 OHCI_ITD_SET_SF(iso->next) |
2887 OHCI_ITD_SET_DI(0) |
2888 OHCI_ITD_SET_FC(ncur));
2889 sitd->itd.itd_be = htole32(le32toh(sitd->itd.itd_bp0) + offs - 1);
2890 iso->next = iso->next + ncur;
2891
2892 opipe->tail.itd = nsitd;
2893 sed->ed.ed_tailp = htole32(nsitd->physaddr);
2894 /* XXX update ED */
2895 splx(s);
2896 }
2897
2898 usbd_status
2899 ohci_device_isoc_start(xfer)
2900 usbd_xfer_handle xfer;
2901 {
2902 printf("ohci_device_isoc_start: not implemented\n");
2903 return (USBD_INVAL);
2904 }
2905
2906 void
2907 ohci_device_isoc_abort(xfer)
2908 usbd_xfer_handle xfer;
2909 {
2910 }
2911
2912 void
2913 ohci_device_isoc_done(xfer)
2914 usbd_xfer_handle xfer;
2915 {
2916 printf("ohci_device_isoc_done: not implemented\n");
2917 }
2918
2919 usbd_status
2920 ohci_setup_isoc(pipe)
2921 usbd_pipe_handle pipe;
2922 {
2923 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2924 struct iso *iso = &opipe->u.iso;
2925
2926 iso->next = -1;
2927 iso->inuse = 0;
2928
2929 return (USBD_NORMAL_COMPLETION);
2930 }
2931
2932 void
2933 ohci_device_isoc_close(pipe)
2934 usbd_pipe_handle pipe;
2935 {
2936 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2937 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2938
2939 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
2940 ohci_close_pipe(pipe, sc->sc_isoc_head);
2941 ohci_free_sitd(sc, opipe->tail.itd);
2942 }
2943