ohci.c revision 1.77
1 /* $NetBSD: ohci.c,v 1.77 2000/03/19 22:24:57 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (augustss (at) carlstedt.se) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe 45 * USB spec: http://www.usb.org/developers/data/usb11.pdf 46 */ 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/kernel.h> 53 #include <sys/device.h> 54 #include <sys/select.h> 55 #elif defined(__FreeBSD__) 56 #include <sys/module.h> 57 #include <sys/bus.h> 58 #include <machine/bus_pio.h> 59 #include <machine/bus_memio.h> 60 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 61 #include <machine/cpu.h> 62 #endif 63 #endif 64 #include <sys/proc.h> 65 #include <sys/queue.h> 66 67 #include <machine/bus.h> 68 #include <machine/endian.h> 69 70 #include <dev/usb/usb.h> 71 #include <dev/usb/usbdi.h> 72 #include <dev/usb/usbdivar.h> 73 #include <dev/usb/usb_mem.h> 74 #include <dev/usb/usb_quirks.h> 75 76 #include <dev/usb/ohcireg.h> 77 #include <dev/usb/ohcivar.h> 78 79 #if defined(__FreeBSD__) 80 #include <machine/clock.h> 81 82 #define delay(d) DELAY(d) 83 #endif 84 85 #if defined(__OpenBSD__) 86 struct cfdriver ohci_cd = { 87 NULL, "ohci", DV_DULL 88 }; 89 #endif 90 91 #ifdef OHCI_DEBUG 92 #define DPRINTF(x) if (ohcidebug) logprintf x 93 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 94 int ohcidebug = 0; 95 #else 96 #define DPRINTF(x) 97 #define DPRINTFN(n,x) 98 #endif 99 100 /* 101 * The OHCI controller is little endian, so on big endian machines 102 * the data strored in memory needs to be swapped. 103 */ 104 #if defined(__FreeBSD__) 105 #if BYTE_ORDER == BIG_ENDIAN 106 #define htole32(x) (bswap32(x)) 107 #define le32toh(x) (bswap32(x)) 108 #else 109 #define htole32(x) (x) 110 #define le32toh(x) (x) 111 #endif 112 #endif 113 114 struct ohci_pipe; 115 116 static ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *)); 117 static void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *)); 118 119 static ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *)); 120 static void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *)); 121 122 static ohci_soft_itd_t *ohci_alloc_sitd __P((ohci_softc_t *)); 123 static void ohci_free_sitd __P((ohci_softc_t *,ohci_soft_itd_t *)); 124 125 #if 0 126 static void ohci_free_std_chain __P((ohci_softc_t *, 127 ohci_soft_td_t *, ohci_soft_td_t *)); 128 #endif 129 static usbd_status ohci_alloc_std_chain __P((struct ohci_pipe *, 130 ohci_softc_t *, int, int, usbd_xfer_handle, 131 ohci_soft_td_t *, ohci_soft_td_t **)); 132 133 static void ohci_shutdown __P((void *v)); 134 static void ohci_power __P((int, void *)); 135 static usbd_status ohci_open __P((usbd_pipe_handle)); 136 static void ohci_poll __P((struct usbd_bus *)); 137 static void ohci_softintr __P((struct usbd_bus *)); 138 static void ohci_waitintr __P((ohci_softc_t *, 139 usbd_xfer_handle)); 140 static void ohci_rhsc __P((ohci_softc_t *, usbd_xfer_handle)); 141 142 static usbd_status ohci_device_request __P((usbd_xfer_handle xfer)); 143 static void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 144 static void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 145 static void ohci_hash_add_td __P((ohci_softc_t *, 146 ohci_soft_td_t *)); 147 static void ohci_hash_rem_td __P((ohci_softc_t *, 148 ohci_soft_td_t *)); 149 static ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, 150 ohci_physaddr_t)); 151 152 static usbd_status ohci_setup_isoc __P((usbd_pipe_handle pipe)); 153 static void ohci_device_isoc_enter __P((usbd_xfer_handle)); 154 155 static usbd_status ohci_allocm __P((struct usbd_bus *, usb_dma_t *, 156 u_int32_t)); 157 static void ohci_freem __P((struct usbd_bus *, usb_dma_t *)); 158 159 static usbd_xfer_handle ohci_allocx __P((struct usbd_bus *)); 160 static void ohci_freex __P((struct usbd_bus *, usbd_xfer_handle)); 161 162 static usbd_status ohci_root_ctrl_transfer __P((usbd_xfer_handle)); 163 static usbd_status ohci_root_ctrl_start __P((usbd_xfer_handle)); 164 static void ohci_root_ctrl_abort __P((usbd_xfer_handle)); 165 static void ohci_root_ctrl_close __P((usbd_pipe_handle)); 166 static void ohci_root_ctrl_done __P((usbd_xfer_handle)); 167 168 static usbd_status ohci_root_intr_transfer __P((usbd_xfer_handle)); 169 static usbd_status ohci_root_intr_start __P((usbd_xfer_handle)); 170 static void ohci_root_intr_abort __P((usbd_xfer_handle)); 171 static void ohci_root_intr_close __P((usbd_pipe_handle)); 172 static void ohci_root_intr_done __P((usbd_xfer_handle)); 173 174 static usbd_status ohci_device_ctrl_transfer __P((usbd_xfer_handle)); 175 static usbd_status ohci_device_ctrl_start __P((usbd_xfer_handle)); 176 static void ohci_device_ctrl_abort __P((usbd_xfer_handle)); 177 static void ohci_device_ctrl_close __P((usbd_pipe_handle)); 178 static void ohci_device_ctrl_done __P((usbd_xfer_handle)); 179 180 static usbd_status ohci_device_bulk_transfer __P((usbd_xfer_handle)); 181 static usbd_status ohci_device_bulk_start __P((usbd_xfer_handle)); 182 static void ohci_device_bulk_abort __P((usbd_xfer_handle)); 183 static void ohci_device_bulk_close __P((usbd_pipe_handle)); 184 static void ohci_device_bulk_done __P((usbd_xfer_handle)); 185 186 static usbd_status ohci_device_intr_transfer __P((usbd_xfer_handle)); 187 static usbd_status ohci_device_intr_start __P((usbd_xfer_handle)); 188 static void ohci_device_intr_abort __P((usbd_xfer_handle)); 189 static void ohci_device_intr_close __P((usbd_pipe_handle)); 190 static void ohci_device_intr_done __P((usbd_xfer_handle)); 191 192 static usbd_status ohci_device_isoc_transfer __P((usbd_xfer_handle)); 193 static usbd_status ohci_device_isoc_start __P((usbd_xfer_handle)); 194 static void ohci_device_isoc_abort __P((usbd_xfer_handle)); 195 static void ohci_device_isoc_close __P((usbd_pipe_handle)); 196 static void ohci_device_isoc_done __P((usbd_xfer_handle)); 197 198 static usbd_status ohci_device_setintr __P((ohci_softc_t *sc, 199 struct ohci_pipe *pipe, int ival)); 200 201 static int ohci_str __P((usb_string_descriptor_t *, int, char *)); 202 203 static void ohci_timeout __P((void *)); 204 static void ohci_rhsc_able __P((ohci_softc_t *, int)); 205 206 static void ohci_close_pipe __P((usbd_pipe_handle pipe, 207 ohci_soft_ed_t *head)); 208 static void ohci_abort_xfer __P((usbd_xfer_handle xfer, 209 usbd_status status)); 210 static void ohci_abort_xfer_end __P((void *)); 211 212 static void ohci_device_clear_toggle __P((usbd_pipe_handle pipe)); 213 static void ohci_noop __P((usbd_pipe_handle pipe)); 214 215 #ifdef OHCI_DEBUG 216 static void ohci_dumpregs __P((ohci_softc_t *)); 217 static void ohci_dump_tds __P((ohci_soft_td_t *)); 218 static void ohci_dump_td __P((ohci_soft_td_t *)); 219 static void ohci_dump_ed __P((ohci_soft_ed_t *)); 220 #endif 221 222 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 223 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 224 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 225 226 /* Reverse the bits in a value 0 .. 31 */ 227 static u_int8_t revbits[OHCI_NO_INTRS] = 228 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 229 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 230 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 231 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 232 233 struct ohci_pipe { 234 struct usbd_pipe pipe; 235 ohci_soft_ed_t *sed; 236 union { 237 ohci_soft_td_t *td; 238 ohci_soft_itd_t *itd; 239 } tail; 240 /* Info needed for different pipe kinds. */ 241 union { 242 /* Control pipe */ 243 struct { 244 usb_dma_t reqdma; 245 u_int length; 246 ohci_soft_td_t *setup, *data, *stat; 247 } ctl; 248 /* Interrupt pipe */ 249 struct { 250 int nslots; 251 int pos; 252 } intr; 253 /* Bulk pipe */ 254 struct { 255 u_int length; 256 int isread; 257 } bulk; 258 /* Iso pipe */ 259 struct iso { 260 int next, inuse; 261 } iso; 262 } u; 263 }; 264 265 #define OHCI_INTR_ENDPT 1 266 267 static struct usbd_bus_methods ohci_bus_methods = { 268 ohci_open, 269 ohci_softintr, 270 ohci_poll, 271 ohci_allocm, 272 ohci_freem, 273 ohci_allocx, 274 ohci_freex, 275 }; 276 277 static struct usbd_pipe_methods ohci_root_ctrl_methods = { 278 ohci_root_ctrl_transfer, 279 ohci_root_ctrl_start, 280 ohci_root_ctrl_abort, 281 ohci_root_ctrl_close, 282 ohci_noop, 283 ohci_root_ctrl_done, 284 }; 285 286 static struct usbd_pipe_methods ohci_root_intr_methods = { 287 ohci_root_intr_transfer, 288 ohci_root_intr_start, 289 ohci_root_intr_abort, 290 ohci_root_intr_close, 291 ohci_noop, 292 ohci_root_intr_done, 293 }; 294 295 static struct usbd_pipe_methods ohci_device_ctrl_methods = { 296 ohci_device_ctrl_transfer, 297 ohci_device_ctrl_start, 298 ohci_device_ctrl_abort, 299 ohci_device_ctrl_close, 300 ohci_noop, 301 ohci_device_ctrl_done, 302 }; 303 304 static struct usbd_pipe_methods ohci_device_intr_methods = { 305 ohci_device_intr_transfer, 306 ohci_device_intr_start, 307 ohci_device_intr_abort, 308 ohci_device_intr_close, 309 ohci_device_clear_toggle, 310 ohci_device_intr_done, 311 }; 312 313 static struct usbd_pipe_methods ohci_device_bulk_methods = { 314 ohci_device_bulk_transfer, 315 ohci_device_bulk_start, 316 ohci_device_bulk_abort, 317 ohci_device_bulk_close, 318 ohci_device_clear_toggle, 319 ohci_device_bulk_done, 320 }; 321 322 static struct usbd_pipe_methods ohci_device_isoc_methods = { 323 ohci_device_isoc_transfer, 324 ohci_device_isoc_start, 325 ohci_device_isoc_abort, 326 ohci_device_isoc_close, 327 ohci_noop, 328 ohci_device_isoc_done, 329 }; 330 331 #if defined(__NetBSD__) || defined(__OpenBSD__) 332 int 333 ohci_activate(self, act) 334 device_ptr_t self; 335 enum devact act; 336 { 337 struct ohci_softc *sc = (struct ohci_softc *)self; 338 int rv = 0; 339 340 switch (act) { 341 case DVACT_ACTIVATE: 342 return (EOPNOTSUPP); 343 break; 344 345 case DVACT_DEACTIVATE: 346 if (sc->sc_child != NULL) 347 rv = config_deactivate(sc->sc_child); 348 break; 349 } 350 return (rv); 351 } 352 353 int 354 ohci_detach(sc, flags) 355 struct ohci_softc *sc; 356 int flags; 357 { 358 int rv = 0; 359 360 if (sc->sc_child != NULL) 361 rv = config_detach(sc->sc_child, flags); 362 363 if (rv != 0) 364 return (rv); 365 366 #if defined(__NetBSD__) || defined(__OpenBSD__) 367 powerhook_disestablish(sc->sc_powerhook); 368 shutdownhook_disestablish(sc->sc_shutdownhook); 369 #endif 370 371 /* free data structures XXX */ 372 373 return (rv); 374 } 375 #endif 376 377 ohci_soft_ed_t * 378 ohci_alloc_sed(sc) 379 ohci_softc_t *sc; 380 { 381 ohci_soft_ed_t *sed; 382 usbd_status err; 383 int i, offs; 384 usb_dma_t dma; 385 386 if (sc->sc_freeeds == NULL) { 387 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 388 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 389 OHCI_ED_ALIGN, &dma); 390 if (err) 391 return (0); 392 for(i = 0; i < OHCI_SED_CHUNK; i++) { 393 offs = i * OHCI_SED_SIZE; 394 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 395 sed->physaddr = DMAADDR(&dma) + offs; 396 sed->next = sc->sc_freeeds; 397 sc->sc_freeeds = sed; 398 } 399 } 400 sed = sc->sc_freeeds; 401 sc->sc_freeeds = sed->next; 402 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 403 sed->next = 0; 404 return (sed); 405 } 406 407 void 408 ohci_free_sed(sc, sed) 409 ohci_softc_t *sc; 410 ohci_soft_ed_t *sed; 411 { 412 sed->next = sc->sc_freeeds; 413 sc->sc_freeeds = sed; 414 } 415 416 ohci_soft_td_t * 417 ohci_alloc_std(sc) 418 ohci_softc_t *sc; 419 { 420 ohci_soft_td_t *std; 421 usbd_status err; 422 int i, offs; 423 usb_dma_t dma; 424 int s; 425 426 if (sc->sc_freetds == NULL) { 427 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 428 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 429 OHCI_TD_ALIGN, &dma); 430 if (err) 431 return (0); 432 s = splusb(); 433 for(i = 0; i < OHCI_STD_CHUNK; i++) { 434 offs = i * OHCI_STD_SIZE; 435 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 436 std->physaddr = DMAADDR(&dma) + offs; 437 std->nexttd = sc->sc_freetds; 438 sc->sc_freetds = std; 439 } 440 splx(s); 441 } 442 443 s = splusb(); 444 std = sc->sc_freetds; 445 sc->sc_freetds = std->nexttd; 446 memset(&std->td, 0, sizeof(ohci_td_t)); 447 std->nexttd = 0; 448 449 ohci_hash_add_td(sc, std); 450 splx(s); 451 452 return (std); 453 } 454 455 void 456 ohci_free_std(sc, std) 457 ohci_softc_t *sc; 458 ohci_soft_td_t *std; 459 { 460 int s; 461 462 s = splusb(); 463 ohci_hash_rem_td(sc, std); 464 465 std->nexttd = sc->sc_freetds; 466 sc->sc_freetds = std; 467 splx(s); 468 } 469 470 usbd_status 471 ohci_alloc_std_chain(opipe, sc, alen, rd, xfer, sp, ep) 472 struct ohci_pipe *opipe; 473 ohci_softc_t *sc; 474 int alen, rd; 475 usbd_xfer_handle xfer; 476 ohci_soft_td_t *sp, **ep; 477 { 478 ohci_soft_td_t *next, *cur; 479 ohci_physaddr_t dataphys, dataphysend; 480 u_int32_t tdflags; 481 int len, curlen; 482 usb_dma_t *dma = &xfer->dmabuf; 483 u_int16_t flags = xfer->flags; 484 485 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 486 487 len = alen; 488 cur = sp; 489 dataphys = DMAADDR(dma); 490 dataphysend = OHCI_PAGE(dataphys + len - 1); 491 tdflags = htole32( 492 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 493 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 494 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 495 496 for (;;) { 497 next = ohci_alloc_std(sc); 498 if (next == NULL) 499 goto nomem; 500 501 /* The OHCI hardware can handle at most one page crossing. */ 502 if (OHCI_PAGE(dataphys) == dataphysend || 503 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 504 /* we can handle it in this TD */ 505 curlen = len; 506 } else { 507 /* must use multiple TDs, fill as much as possible. */ 508 curlen = 2 * OHCI_PAGE_SIZE - 509 (dataphys & (OHCI_PAGE_SIZE-1)); 510 } 511 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 512 "dataphysend=0x%08x len=%d curlen=%d\n", 513 dataphys, dataphysend, 514 len, curlen)); 515 len -= curlen; 516 517 cur->td.td_flags = tdflags; 518 cur->td.td_cbp = htole32(dataphys); 519 cur->nexttd = next; 520 cur->td.td_nexttd = htole32(next->physaddr); 521 cur->td.td_be = htole32(dataphys + curlen - 1); 522 cur->len = curlen; 523 cur->flags = OHCI_ADD_LEN; 524 cur->xfer = xfer; 525 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 526 dataphys, dataphys + curlen - 1)); 527 if (len == 0) 528 break; 529 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 530 dataphys += curlen; 531 cur = next; 532 } 533 if ((flags & USBD_FORCE_SHORT_XFER) && 534 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 535 /* Force a 0 length transfer at the end. */ 536 537 cur = next; 538 next = ohci_alloc_std(sc); 539 if (next == NULL) 540 goto nomem; 541 542 cur->td.td_flags = tdflags; 543 cur->td.td_cbp = 0; /* indicate 0 length packet */ 544 cur->nexttd = next; 545 cur->td.td_nexttd = htole32(next->physaddr); 546 cur->td.td_be = ~0; 547 cur->len = 0; 548 cur->flags = 0; 549 cur->xfer = xfer; 550 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 551 } 552 *ep = cur; 553 554 return (USBD_NORMAL_COMPLETION); 555 556 nomem: 557 /* XXX free chain */ 558 return (USBD_NOMEM); 559 } 560 561 #if 0 562 static void 563 ohci_free_std_chain(sc, std, stdend) 564 ohci_softc_t *sc; 565 ohci_soft_td_t *std; 566 ohci_soft_td_t *stdend; 567 { 568 ohci_soft_td_t *p; 569 570 for (; std != stdend; std = p) { 571 p = std->nexttd; 572 ohci_free_std(sc, std); 573 } 574 } 575 #endif 576 577 ohci_soft_itd_t * 578 ohci_alloc_sitd(sc) 579 ohci_softc_t *sc; 580 { 581 ohci_soft_itd_t *sitd; 582 usbd_status err; 583 int i, offs; 584 usb_dma_t dma; 585 586 if (sc->sc_freeitds == NULL) { 587 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 588 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 589 OHCI_TD_ALIGN, &dma); 590 if (err) 591 return (0); 592 for(i = 0; i < OHCI_STD_CHUNK; i++) { 593 offs = i * OHCI_STD_SIZE; 594 sitd = (ohci_soft_itd_t *)((char*)KERNADDR(&dma)+offs); 595 sitd->physaddr = DMAADDR(&dma) + offs; 596 sitd->nextitd = sc->sc_freeitds; 597 sc->sc_freeitds = sitd; 598 } 599 } 600 sitd = sc->sc_freeitds; 601 sc->sc_freeitds = sitd->nextitd; 602 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 603 sitd->nextitd = 0; 604 return (sitd); 605 } 606 607 void 608 ohci_free_sitd(sc, sitd) 609 ohci_softc_t *sc; 610 ohci_soft_itd_t *sitd; 611 { 612 sitd->nextitd = sc->sc_freeitds; 613 sc->sc_freeitds = sitd; 614 } 615 616 usbd_status 617 ohci_init(sc) 618 ohci_softc_t *sc; 619 { 620 ohci_soft_ed_t *sed, *psed; 621 usbd_status err; 622 int i; 623 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 624 625 DPRINTF(("ohci_init: start\n")); 626 #if defined(__OpenBSD__) 627 printf(","); 628 #else 629 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 630 #endif 631 rev = OREAD4(sc, OHCI_REVISION); 632 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 633 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 634 635 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 636 printf("%s: unsupported OHCI revision\n", 637 USBDEVNAME(sc->sc_bus.bdev)); 638 sc->sc_bus.usbrev = USBREV_UNKNOWN; 639 return (USBD_INVAL); 640 } 641 sc->sc_bus.usbrev = USBREV_1_0; 642 643 for (i = 0; i < OHCI_HASH_SIZE; i++) 644 LIST_INIT(&sc->sc_hash_tds[i]); 645 646 SIMPLEQ_INIT(&sc->sc_free_xfers); 647 648 /* XXX determine alignment by R/W */ 649 /* Allocate the HCCA area. */ 650 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 651 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 652 if (err) 653 return (err); 654 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 655 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 656 657 sc->sc_eintrs = OHCI_NORMAL_INTRS; 658 659 /* Allocate dummy ED that starts the control list. */ 660 sc->sc_ctrl_head = ohci_alloc_sed(sc); 661 if (sc->sc_ctrl_head == NULL) { 662 err = USBD_NOMEM; 663 goto bad1; 664 } 665 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 666 667 /* Allocate dummy ED that starts the bulk list. */ 668 sc->sc_bulk_head = ohci_alloc_sed(sc); 669 if (sc->sc_bulk_head == NULL) { 670 err = USBD_NOMEM; 671 goto bad2; 672 } 673 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 674 675 /* Allocate dummy ED that starts the isochronous list. */ 676 sc->sc_isoc_head = ohci_alloc_sed(sc); 677 if (sc->sc_isoc_head == NULL) { 678 err = USBD_NOMEM; 679 goto bad3; 680 } 681 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 682 683 /* Allocate all the dummy EDs that make up the interrupt tree. */ 684 for (i = 0; i < OHCI_NO_EDS; i++) { 685 sed = ohci_alloc_sed(sc); 686 if (sed == NULL) { 687 while (--i >= 0) 688 ohci_free_sed(sc, sc->sc_eds[i]); 689 err = USBD_NOMEM; 690 goto bad4; 691 } 692 /* All ED fields are set to 0. */ 693 sc->sc_eds[i] = sed; 694 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 695 if (i != 0) 696 psed = sc->sc_eds[(i-1) / 2]; 697 else 698 psed= sc->sc_isoc_head; 699 sed->next = psed; 700 sed->ed.ed_nexted = htole32(psed->physaddr); 701 } 702 /* 703 * Fill HCCA interrupt table. The bit reversal is to get 704 * the tree set up properly to spread the interrupts. 705 */ 706 for (i = 0; i < OHCI_NO_INTRS; i++) 707 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 708 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 709 710 #ifdef OHCI_DEBUG 711 if (ohcidebug > 15) { 712 for (i = 0; i < OHCI_NO_EDS; i++) { 713 printf("ed#%d ", i); 714 ohci_dump_ed(sc->sc_eds[i]); 715 } 716 printf("iso "); 717 ohci_dump_ed(sc->sc_isoc_head); 718 } 719 #endif 720 721 /* Determine in what context we are running. */ 722 ctl = OREAD4(sc, OHCI_CONTROL); 723 if (ctl & OHCI_IR) { 724 /* SMM active, request change */ 725 DPRINTF(("ohci_init: SMM active, request owner change\n")); 726 s = OREAD4(sc, OHCI_COMMAND_STATUS); 727 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 728 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 729 usb_delay_ms(&sc->sc_bus, 1); 730 ctl = OREAD4(sc, OHCI_CONTROL); 731 } 732 if ((ctl & OHCI_IR) == 0) { 733 printf("%s: SMM does not respond, resetting\n", 734 USBDEVNAME(sc->sc_bus.bdev)); 735 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 736 goto reset; 737 } 738 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 739 /* BIOS started controller. */ 740 DPRINTF(("ohci_init: BIOS active\n")); 741 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 742 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 743 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 744 } 745 } else { 746 DPRINTF(("ohci_init: cold started\n")); 747 reset: 748 /* Controller was cold started. */ 749 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 750 } 751 752 /* 753 * This reset should not be necessary according to the OHCI spec, but 754 * without it some controllers do not start. 755 */ 756 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 757 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 758 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 759 760 /* We now own the host controller and the bus has been reset. */ 761 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 762 763 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 764 /* Nominal time for a reset is 10 us. */ 765 for (i = 0; i < 10; i++) { 766 delay(10); 767 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 768 if (!hcr) 769 break; 770 } 771 if (hcr) { 772 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 773 err = USBD_IOERROR; 774 goto bad5; 775 } 776 #ifdef OHCI_DEBUG 777 if (ohcidebug > 15) 778 ohci_dumpregs(sc); 779 #endif 780 781 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 782 783 /* Set up HC registers. */ 784 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 785 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 786 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 787 /* disable all interrupts and then switch on all desired interrupts */ 788 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 789 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 790 /* switch on desired functional features */ 791 ctl = OREAD4(sc, OHCI_CONTROL); 792 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 793 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 794 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 795 /* And finally start it! */ 796 OWRITE4(sc, OHCI_CONTROL, ctl); 797 798 /* 799 * The controller is now OPERATIONAL. Set a some final 800 * registers that should be set earlier, but that the 801 * controller ignores when in the SUSPEND state. 802 */ 803 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 804 fm |= OHCI_FSMPS(ival) | ival; 805 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 806 per = OHCI_PERIODIC(ival); /* 90% periodic */ 807 OWRITE4(sc, OHCI_PERIODIC_START, per); 808 809 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 810 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 811 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 812 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 813 usb_delay_ms(&sc->sc_bus, 5); 814 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 815 816 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 817 818 #ifdef OHCI_DEBUG 819 if (ohcidebug > 5) 820 ohci_dumpregs(sc); 821 #endif 822 823 /* Set up the bus struct. */ 824 sc->sc_bus.methods = &ohci_bus_methods; 825 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 826 827 #if defined(__NetBSD__) || defined(__OpenBSD__) 828 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 829 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 830 #endif 831 832 return (USBD_NORMAL_COMPLETION); 833 834 bad5: 835 for (i = 0; i < OHCI_NO_EDS; i++) 836 ohci_free_sed(sc, sc->sc_eds[i]); 837 bad4: 838 ohci_free_sed(sc, sc->sc_isoc_head); 839 bad3: 840 ohci_free_sed(sc, sc->sc_ctrl_head); 841 bad2: 842 ohci_free_sed(sc, sc->sc_bulk_head); 843 bad1: 844 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 845 return (err); 846 } 847 848 usbd_status 849 ohci_allocm(bus, dma, size) 850 struct usbd_bus *bus; 851 usb_dma_t *dma; 852 u_int32_t size; 853 { 854 #if defined(__NetBSD__) || defined(__OpenBSD__) 855 struct ohci_softc *sc = (struct ohci_softc *)bus; 856 #endif 857 858 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 859 } 860 861 void 862 ohci_freem(bus, dma) 863 struct usbd_bus *bus; 864 usb_dma_t *dma; 865 { 866 #if defined(__NetBSD__) || defined(__OpenBSD__) 867 struct ohci_softc *sc = (struct ohci_softc *)bus; 868 #endif 869 870 usb_freemem(&sc->sc_bus, dma); 871 } 872 873 usbd_xfer_handle 874 ohci_allocx(bus) 875 struct usbd_bus *bus; 876 { 877 struct ohci_softc *sc = (struct ohci_softc *)bus; 878 usbd_xfer_handle xfer; 879 880 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 881 if (xfer != NULL) 882 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 883 else 884 xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT); 885 if (xfer != NULL) 886 memset(xfer, 0, sizeof *xfer); 887 return (xfer); 888 } 889 890 void 891 ohci_freex(bus, xfer) 892 struct usbd_bus *bus; 893 usbd_xfer_handle xfer; 894 { 895 struct ohci_softc *sc = (struct ohci_softc *)bus; 896 897 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 898 } 899 900 /* 901 * Shut down the controller when the system is going down. 902 */ 903 void 904 ohci_shutdown(v) 905 void *v; 906 { 907 ohci_softc_t *sc = v; 908 909 DPRINTF(("ohci_shutdown: stopping the HC\n")); 910 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 911 } 912 913 /* 914 * Handle suspend/resume. 915 * 916 * We need to switch to polling mode here, because this routine is 917 * called from an intterupt context. This is all right since we 918 * are almost suspended anyway. 919 */ 920 void 921 ohci_power(why, v) 922 int why; 923 void *v; 924 { 925 #ifdef OHCI_DEBUG 926 ohci_softc_t *sc = v; 927 928 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 929 /* XXX should suspend/resume */ 930 ohci_dumpregs(sc); 931 #endif 932 } 933 934 #ifdef OHCI_DEBUG 935 void 936 ohci_dumpregs(sc) 937 ohci_softc_t *sc; 938 { 939 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 940 OREAD4(sc, OHCI_REVISION), 941 OREAD4(sc, OHCI_CONTROL), 942 OREAD4(sc, OHCI_COMMAND_STATUS))); 943 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 944 OREAD4(sc, OHCI_INTERRUPT_STATUS), 945 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 946 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 947 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 948 OREAD4(sc, OHCI_HCCA), 949 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 950 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 951 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 952 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 953 OREAD4(sc, OHCI_BULK_HEAD_ED), 954 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 955 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 956 OREAD4(sc, OHCI_DONE_HEAD), 957 OREAD4(sc, OHCI_FM_INTERVAL), 958 OREAD4(sc, OHCI_FM_REMAINING))); 959 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 960 OREAD4(sc, OHCI_FM_NUMBER), 961 OREAD4(sc, OHCI_PERIODIC_START), 962 OREAD4(sc, OHCI_LS_THRESHOLD))); 963 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 964 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 965 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 966 OREAD4(sc, OHCI_RH_STATUS))); 967 DPRINTF((" port1=0x%08x port2=0x%08x\n", 968 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 969 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 970 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 971 le32toh(sc->sc_hcca->hcca_frame_number), 972 le32toh(sc->sc_hcca->hcca_done_head))); 973 } 974 #endif 975 976 static int ohci_intr1 __P((ohci_softc_t *)); 977 978 int 979 ohci_intr(p) 980 void *p; 981 { 982 ohci_softc_t *sc = p; 983 984 /* If we get an interrupt while polling, then just ignore it. */ 985 if (sc->sc_bus.use_polling) { 986 #ifdef DIAGNOSTIC 987 printf("ohci_intr: ignored interrupt while polling\n"); 988 #endif 989 return (0); 990 } 991 992 return (ohci_intr1(sc)); 993 } 994 995 static int 996 ohci_intr1(sc) 997 ohci_softc_t *sc; 998 { 999 u_int32_t intrs, eintrs; 1000 ohci_physaddr_t done; 1001 1002 /* In case the interrupt occurs before initialization has completed. */ 1003 if (sc == NULL || sc->sc_hcca == NULL) { 1004 #ifdef DIAGNOSTIC 1005 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1006 #endif 1007 return (0); 1008 } 1009 1010 intrs = 0; 1011 done = le32toh(sc->sc_hcca->hcca_done_head); 1012 if (done != 0) { 1013 if (done & ~OHCI_DONE_INTRS) 1014 intrs = OHCI_WDH; 1015 if (done & OHCI_DONE_INTRS) 1016 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1017 } else 1018 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1019 1020 if (!intrs) 1021 return (0); 1022 1023 intrs &= ~OHCI_MIE; 1024 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1025 eintrs = intrs & sc->sc_eintrs; 1026 if (!eintrs) 1027 return (0); 1028 1029 sc->sc_bus.intr_context++; 1030 sc->sc_bus.no_intrs++; 1031 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1032 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1033 (u_int)eintrs)); 1034 1035 if (eintrs & OHCI_SO) { 1036 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev)); 1037 /* XXX do what */ 1038 intrs &= ~OHCI_SO; 1039 } 1040 if (eintrs & OHCI_WDH) { 1041 done &= ~OHCI_DONE_INTRS; 1042 if (sc->sc_done == 0) 1043 sc->sc_done = done; 1044 else { 1045 /* Tack on at the end of sc_done. */ 1046 ohci_physaddr_t ldone; 1047 ohci_soft_td_t *std; 1048 1049 for (ldone = sc->sc_done; ldone != 0; 1050 ldone = le32toh(std->td.td_nexttd)) 1051 std = ohci_hash_find_td(sc, ldone); 1052 std->td.td_nexttd = htole32(done); 1053 } 1054 sc->sc_hcca->hcca_done_head = 0; 1055 usb_schedsoftintr(&sc->sc_bus); 1056 intrs &= ~OHCI_WDH; 1057 } 1058 if (eintrs & OHCI_RD) { 1059 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1060 /* XXX process resume detect */ 1061 } 1062 if (eintrs & OHCI_UE) { 1063 printf("%s: unrecoverable error, controller halted\n", 1064 USBDEVNAME(sc->sc_bus.bdev)); 1065 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1066 /* XXX what else */ 1067 } 1068 if (eintrs & OHCI_RHSC) { 1069 ohci_rhsc(sc, sc->sc_intrxfer); 1070 intrs &= ~OHCI_RHSC; 1071 1072 /* 1073 * Disable RHSC interrupt for now, because it will be 1074 * on until the port has been reset. 1075 */ 1076 ohci_rhsc_able(sc, 0); 1077 } 1078 1079 sc->sc_bus.intr_context--; 1080 1081 /* Block unprocessed interrupts. XXX */ 1082 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 1083 sc->sc_eintrs &= ~intrs; 1084 1085 return (1); 1086 } 1087 1088 void 1089 ohci_rhsc_able(sc, on) 1090 ohci_softc_t *sc; 1091 int on; 1092 { 1093 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1094 if (on) { 1095 sc->sc_eintrs |= OHCI_RHSC; 1096 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1097 } else { 1098 sc->sc_eintrs &= ~OHCI_RHSC; 1099 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1100 } 1101 } 1102 1103 #ifdef OHCI_DEBUG 1104 char *ohci_cc_strs[] = { 1105 "NO_ERROR", 1106 "CRC", 1107 "BIT_STUFFING", 1108 "DATA_TOGGLE_MISMATCH", 1109 "STALL", 1110 "DEVICE_NOT_RESPONDING", 1111 "PID_CHECK_FAILURE", 1112 "UNEXPECTED_PID", 1113 "DATA_OVERRUN", 1114 "DATA_UNDERRUN", 1115 "BUFFER_OVERRUN", 1116 "BUFFER_UNDERRUN", 1117 "reserved", 1118 "reserved", 1119 "NOT_ACCESSED", 1120 "NOT_ACCESSED", 1121 }; 1122 #endif 1123 1124 void 1125 ohci_softintr(bus) 1126 struct usbd_bus *bus; 1127 { 1128 ohci_softc_t *sc = (ohci_softc_t *)bus; 1129 ohci_physaddr_t done; 1130 ohci_soft_td_t *std, *sdone, *stdnext; 1131 usbd_xfer_handle xfer; 1132 int len, cc, s; 1133 1134 sc->sc_bus.intr_context++; 1135 1136 s = splhardusb(); 1137 done = sc->sc_done; 1138 sc->sc_done = 0; 1139 splx(s); 1140 1141 DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done)); 1142 1143 /* Reverse the done list. */ 1144 for (sdone = NULL; done != 0; done = le32toh(std->td.td_nexttd)) { 1145 std = ohci_hash_find_td(sc, done); 1146 std->dnext = sdone; 1147 sdone = std; 1148 } 1149 1150 #ifdef OHCI_DEBUG 1151 if (ohcidebug > 10) { 1152 DPRINTF(("ohci_process_done: TD done:\n")); 1153 ohci_dump_tds(sdone); 1154 } 1155 #endif 1156 1157 for (std = sdone; std; std = stdnext) { 1158 xfer = std->xfer; 1159 stdnext = std->dnext; 1160 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1161 std, xfer, xfer ? xfer->hcpriv : 0)); 1162 if (xfer == NULL) { 1163 /* xfer == NULL: There seems to be no xfer associated 1164 * with this TD. It is tailp that happened to end up on 1165 * the done queue. 1166 */ 1167 continue; 1168 } 1169 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1170 usb_untimeout(ohci_timeout, xfer, xfer->timo_handle); 1171 if (xfer->status == USBD_CANCELLED || 1172 xfer->status == USBD_TIMEOUT) { 1173 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1174 xfer)); 1175 /* Handled by abort routine. */ 1176 } else if (cc == OHCI_CC_NO_ERROR) { 1177 len = std->len; 1178 if (std->td.td_cbp != 0) 1179 len -= le32toh(std->td.td_be) - 1180 le32toh(std->td.td_cbp) + 1; 1181 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", 1182 len, std->flags)); 1183 if (std->flags & OHCI_ADD_LEN) 1184 xfer->actlen += len; 1185 if (std->flags & OHCI_CALL_DONE) { 1186 xfer->status = USBD_NORMAL_COMPLETION; 1187 usb_transfer_complete(xfer); 1188 } 1189 ohci_free_std(sc, std); 1190 } else { 1191 /* 1192 * Endpoint is halted. First unlink all the TDs 1193 * belonging to the failed transfer, and then restart 1194 * the endpoint. 1195 */ 1196 ohci_soft_td_t *p, *n; 1197 struct ohci_pipe *opipe = 1198 (struct ohci_pipe *)xfer->pipe; 1199 1200 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1201 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1202 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1203 1204 /* remove TDs */ 1205 for (p = std; p->xfer == xfer; p = n) { 1206 n = p->nexttd; 1207 ohci_free_std(sc, p); 1208 } 1209 1210 /* clear halt */ 1211 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1212 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1213 1214 if (cc == OHCI_CC_STALL) 1215 xfer->status = USBD_STALLED; 1216 else 1217 xfer->status = USBD_IOERROR; 1218 usb_transfer_complete(xfer); 1219 } 1220 } 1221 1222 sc->sc_bus.intr_context--; 1223 } 1224 1225 void 1226 ohci_device_ctrl_done(xfer) 1227 usbd_xfer_handle xfer; 1228 { 1229 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1230 1231 #ifdef DIAGNOSTIC 1232 if (!(xfer->rqflags & URQ_REQUEST)) { 1233 panic("ohci_ctrl_done: not a request\n"); 1234 } 1235 #endif 1236 xfer->hcpriv = NULL; 1237 } 1238 1239 void 1240 ohci_device_intr_done(xfer) 1241 usbd_xfer_handle xfer; 1242 { 1243 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1244 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1245 ohci_soft_ed_t *sed = opipe->sed; 1246 ohci_soft_td_t *data, *tail; 1247 1248 1249 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1250 xfer, xfer->actlen)); 1251 1252 xfer->hcpriv = NULL; 1253 1254 if (xfer->pipe->repeat) { 1255 data = opipe->tail.td; 1256 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1257 if (tail == NULL) { 1258 xfer->status = USBD_NOMEM; 1259 return; 1260 } 1261 tail->xfer = NULL; 1262 1263 data->td.td_flags = htole32( 1264 OHCI_TD_IN | OHCI_TD_NOCC | 1265 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1266 if (xfer->flags & USBD_SHORT_XFER_OK) 1267 data->td.td_flags |= htole32(OHCI_TD_R); 1268 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 1269 data->nexttd = tail; 1270 data->td.td_nexttd = htole32(tail->physaddr); 1271 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1272 xfer->length - 1); 1273 data->len = xfer->length; 1274 data->xfer = xfer; 1275 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1276 xfer->hcpriv = data; 1277 xfer->actlen = 0; 1278 1279 sed->ed.ed_tailp = htole32(tail->physaddr); 1280 opipe->tail.td = tail; 1281 } 1282 } 1283 1284 void 1285 ohci_device_bulk_done(xfer) 1286 usbd_xfer_handle xfer; 1287 { 1288 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1289 xfer, xfer->actlen)); 1290 1291 xfer->hcpriv = NULL; 1292 } 1293 1294 void 1295 ohci_rhsc(sc, xfer) 1296 ohci_softc_t *sc; 1297 usbd_xfer_handle xfer; 1298 { 1299 usbd_pipe_handle pipe; 1300 struct ohci_pipe *opipe; 1301 u_char *p; 1302 int i, m; 1303 int hstatus; 1304 1305 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1306 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1307 sc, xfer, hstatus)); 1308 1309 if (xfer == NULL) { 1310 /* Just ignore the change. */ 1311 return; 1312 } 1313 1314 pipe = xfer->pipe; 1315 opipe = (struct ohci_pipe *)pipe; 1316 1317 p = KERNADDR(&xfer->dmabuf); 1318 m = min(sc->sc_noport, xfer->length * 8 - 1); 1319 memset(p, 0, xfer->length); 1320 for (i = 1; i <= m; i++) { 1321 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1322 p[i/8] |= 1 << (i%8); 1323 } 1324 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1325 xfer->actlen = xfer->length; 1326 xfer->status = USBD_NORMAL_COMPLETION; 1327 1328 usb_transfer_complete(xfer); 1329 } 1330 1331 void 1332 ohci_root_intr_done(xfer) 1333 usbd_xfer_handle xfer; 1334 { 1335 xfer->hcpriv = NULL; 1336 } 1337 1338 void 1339 ohci_root_ctrl_done(xfer) 1340 usbd_xfer_handle xfer; 1341 { 1342 xfer->hcpriv = NULL; 1343 } 1344 1345 /* 1346 * Wait here until controller claims to have an interrupt. 1347 * Then call ohci_intr and return. Use timeout to avoid waiting 1348 * too long. 1349 */ 1350 void 1351 ohci_waitintr(sc, xfer) 1352 ohci_softc_t *sc; 1353 usbd_xfer_handle xfer; 1354 { 1355 int timo = xfer->timeout; 1356 int usecs; 1357 u_int32_t intrs; 1358 1359 xfer->status = USBD_IN_PROGRESS; 1360 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1361 usb_delay_ms(&sc->sc_bus, 1); 1362 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1363 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1364 #ifdef OHCI_DEBUG 1365 if (ohcidebug > 15) 1366 ohci_dumpregs(sc); 1367 #endif 1368 if (intrs) { 1369 ohci_intr1(sc); 1370 if (xfer->status != USBD_IN_PROGRESS) 1371 return; 1372 } 1373 } 1374 1375 /* Timeout */ 1376 DPRINTF(("ohci_waitintr: timeout\n")); 1377 xfer->status = USBD_TIMEOUT; 1378 usb_transfer_complete(xfer); 1379 /* XXX should free TD */ 1380 } 1381 1382 void 1383 ohci_poll(bus) 1384 struct usbd_bus *bus; 1385 { 1386 ohci_softc_t *sc = (ohci_softc_t *)bus; 1387 1388 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1389 ohci_intr1(sc); 1390 } 1391 1392 usbd_status 1393 ohci_device_request(xfer) 1394 usbd_xfer_handle xfer; 1395 { 1396 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1397 usb_device_request_t *req = &xfer->request; 1398 usbd_device_handle dev = opipe->pipe.device; 1399 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1400 int addr = dev->address; 1401 ohci_soft_td_t *setup, *stat, *next, *tail; 1402 ohci_soft_ed_t *sed; 1403 int isread; 1404 int len; 1405 usbd_status err; 1406 int s; 1407 1408 isread = req->bmRequestType & UT_READ; 1409 len = UGETW(req->wLength); 1410 1411 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1412 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1413 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1414 UGETW(req->wIndex), len, addr, 1415 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1416 1417 setup = opipe->tail.td; 1418 stat = ohci_alloc_std(sc); 1419 if (stat == NULL) { 1420 err = USBD_NOMEM; 1421 goto bad1; 1422 } 1423 tail = ohci_alloc_std(sc); 1424 if (tail == NULL) { 1425 err = USBD_NOMEM; 1426 goto bad2; 1427 } 1428 tail->xfer = NULL; 1429 1430 sed = opipe->sed; 1431 opipe->u.ctl.length = len; 1432 1433 /* Update device address and length since they may have changed. */ 1434 /* XXX This only needs to be done once, but it's too early in open. */ 1435 /* XXXX Should not touch ED here! */ 1436 sed->ed.ed_flags = htole32( 1437 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1438 OHCI_ED_SET_FA(addr) | 1439 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1440 1441 next = stat; 1442 1443 /* Set up data transaction */ 1444 if (len != 0) { 1445 ohci_soft_td_t *std = stat; 1446 1447 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1448 std, &stat); 1449 stat = stat->nexttd; /* point at free TD */ 1450 if (err) 1451 goto bad3; 1452 /* Start toggle at 1 and then use the carried toggle. */ 1453 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1454 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1455 } 1456 1457 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1458 1459 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1460 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1461 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma)); 1462 setup->nexttd = next; 1463 setup->td.td_nexttd = htole32(next->physaddr); 1464 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1465 setup->len = 0; 1466 setup->xfer = xfer; 1467 setup->flags = 0; 1468 xfer->hcpriv = setup; 1469 1470 stat->td.td_flags = htole32( 1471 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1472 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1473 stat->td.td_cbp = 0; 1474 stat->nexttd = tail; 1475 stat->td.td_nexttd = htole32(tail->physaddr); 1476 stat->td.td_be = 0; 1477 stat->flags = OHCI_CALL_DONE; 1478 stat->len = 0; 1479 stat->xfer = xfer; 1480 1481 #ifdef OHCI_DEBUG 1482 if (ohcidebug > 5) { 1483 DPRINTF(("ohci_device_request:\n")); 1484 ohci_dump_ed(sed); 1485 ohci_dump_tds(setup); 1486 } 1487 #endif 1488 1489 /* Insert ED in schedule */ 1490 s = splusb(); 1491 sed->ed.ed_tailp = htole32(tail->physaddr); 1492 opipe->tail.td = tail; 1493 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1494 if (xfer->timeout && !sc->sc_bus.use_polling) { 1495 usb_timeout(ohci_timeout, xfer, 1496 MS_TO_TICKS(xfer->timeout), xfer->timo_handle); 1497 } 1498 splx(s); 1499 1500 #if 0 1501 if (ohcidebug > 10) { 1502 delay(10000); 1503 DPRINTF(("ohci_device_request: status=%x\n", 1504 OREAD4(sc, OHCI_COMMAND_STATUS))); 1505 ohci_dump_ed(sed); 1506 ohci_dump_tds(setup); 1507 } 1508 #endif 1509 1510 return (USBD_NORMAL_COMPLETION); 1511 1512 bad3: 1513 ohci_free_std(sc, tail); 1514 bad2: 1515 ohci_free_std(sc, stat); 1516 bad1: 1517 return (err); 1518 } 1519 1520 /* 1521 * Add an ED to the schedule. Called at splusb(). 1522 */ 1523 void 1524 ohci_add_ed(sed, head) 1525 ohci_soft_ed_t *sed; 1526 ohci_soft_ed_t *head; 1527 { 1528 SPLUSBCHECK; 1529 sed->next = head->next; 1530 sed->ed.ed_nexted = head->ed.ed_nexted; 1531 head->next = sed; 1532 head->ed.ed_nexted = htole32(sed->physaddr); 1533 } 1534 1535 /* 1536 * Remove an ED from the schedule. Called at splusb(). 1537 */ 1538 void 1539 ohci_rem_ed(sed, head) 1540 ohci_soft_ed_t *sed; 1541 ohci_soft_ed_t *head; 1542 { 1543 ohci_soft_ed_t *p; 1544 1545 SPLUSBCHECK; 1546 1547 /* XXX */ 1548 for (p = head; p == NULL && p->next != sed; p = p->next) 1549 ; 1550 if (p == NULL) 1551 panic("ohci_rem_ed: ED not found\n"); 1552 p->next = sed->next; 1553 p->ed.ed_nexted = sed->ed.ed_nexted; 1554 } 1555 1556 /* 1557 * When a transfer is completed the TD is added to the done queue by 1558 * the host controller. This queue is the processed by software. 1559 * Unfortunately the queue contains the physical address of the TD 1560 * and we have no simple way to translate this back to a kernel address. 1561 * To make the translation possible (and fast) we use a hash table of 1562 * TDs currently in the schedule. The physical address is used as the 1563 * hash value. 1564 */ 1565 1566 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1567 /* Called at splusb() */ 1568 void 1569 ohci_hash_add_td(sc, std) 1570 ohci_softc_t *sc; 1571 ohci_soft_td_t *std; 1572 { 1573 int h = HASH(std->physaddr); 1574 1575 SPLUSBCHECK; 1576 1577 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1578 } 1579 1580 /* Called at splusb() */ 1581 void 1582 ohci_hash_rem_td(sc, std) 1583 ohci_softc_t *sc; 1584 ohci_soft_td_t *std; 1585 { 1586 SPLUSBCHECK; 1587 1588 LIST_REMOVE(std, hnext); 1589 } 1590 1591 ohci_soft_td_t * 1592 ohci_hash_find_td(sc, a) 1593 ohci_softc_t *sc; 1594 ohci_physaddr_t a; 1595 { 1596 int h = HASH(a); 1597 ohci_soft_td_t *std; 1598 1599 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1600 std != NULL; 1601 std = LIST_NEXT(std, hnext)) 1602 if (std->physaddr == a) 1603 return (std); 1604 panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a); 1605 } 1606 1607 void 1608 ohci_timeout(addr) 1609 void *addr; 1610 { 1611 usbd_xfer_handle xfer = addr; 1612 int s; 1613 1614 DPRINTF(("ohci_timeout: xfer=%p\n", xfer)); 1615 1616 s = splusb(); 1617 xfer->device->bus->intr_context++; 1618 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1619 xfer->device->bus->intr_context--; 1620 splx(s); 1621 } 1622 1623 #ifdef OHCI_DEBUG 1624 void 1625 ohci_dump_tds(std) 1626 ohci_soft_td_t *std; 1627 { 1628 for (; std; std = std->nexttd) 1629 ohci_dump_td(std); 1630 } 1631 1632 void 1633 ohci_dump_td(std) 1634 ohci_soft_td_t *std; 1635 { 1636 DPRINTF(("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1637 "nexttd=0x%08lx be=0x%08lx\n", 1638 std, (u_long)std->physaddr, 1639 (int)le32toh(std->td.td_flags), 1640 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1641 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1642 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1643 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1644 (u_long)le32toh(std->td.td_cbp), 1645 (u_long)le32toh(std->td.td_nexttd), 1646 (u_long)le32toh(std->td.td_be))); 1647 } 1648 1649 void 1650 ohci_dump_ed(sed) 1651 ohci_soft_ed_t *sed; 1652 { 1653 DPRINTF(("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx " 1654 "headflags=%b headp=0x%08lx nexted=0x%08lx\n", 1655 sed, (u_long)sed->physaddr, 1656 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1657 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1658 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), 1659 (int)le32toh(sed->ed.ed_flags), 1660 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1661 (u_long)le32toh(sed->ed.ed_tailp), 1662 (u_long)le32toh(sed->ed.ed_headp), 1663 "\20\1HALT\2CARRY", 1664 (u_long)le32toh(sed->ed.ed_headp), 1665 (u_long)le32toh(sed->ed.ed_nexted))); 1666 } 1667 #endif 1668 1669 usbd_status 1670 ohci_open(pipe) 1671 usbd_pipe_handle pipe; 1672 { 1673 usbd_device_handle dev = pipe->device; 1674 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1675 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1676 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1677 u_int8_t addr = dev->address; 1678 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1679 ohci_soft_ed_t *sed; 1680 ohci_soft_td_t *std; 1681 ohci_soft_itd_t *sitd; 1682 ohci_physaddr_t tdphys; 1683 u_int32_t fmt; 1684 usbd_status err; 1685 int s; 1686 int ival; 1687 1688 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1689 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1690 if (addr == sc->sc_addr) { 1691 switch (ed->bEndpointAddress) { 1692 case USB_CONTROL_ENDPOINT: 1693 pipe->methods = &ohci_root_ctrl_methods; 1694 break; 1695 case UE_DIR_IN | OHCI_INTR_ENDPT: 1696 pipe->methods = &ohci_root_intr_methods; 1697 break; 1698 default: 1699 return (USBD_INVAL); 1700 } 1701 } else { 1702 sed = ohci_alloc_sed(sc); 1703 if (sed == NULL) 1704 goto bad0; 1705 opipe->sed = sed; 1706 if (xfertype == UE_ISOCHRONOUS) { 1707 sitd = ohci_alloc_sitd(sc); 1708 if (sitd == NULL) { 1709 ohci_free_sitd(sc, sitd); 1710 goto bad1; 1711 } 1712 opipe->tail.itd = sitd; 1713 tdphys = sitd->physaddr; 1714 fmt = OHCI_ED_FORMAT_ISO; 1715 } else { 1716 std = ohci_alloc_std(sc); 1717 if (std == NULL) { 1718 ohci_free_std(sc, std); 1719 goto bad1; 1720 } 1721 opipe->tail.td = std; 1722 tdphys = std->physaddr; 1723 fmt = OHCI_ED_FORMAT_GEN; 1724 } 1725 sed->ed.ed_flags = htole32( 1726 OHCI_ED_SET_FA(addr) | 1727 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1728 OHCI_ED_DIR_TD | 1729 (dev->lowspeed ? OHCI_ED_SPEED : 0) | fmt | 1730 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1731 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 1732 1733 switch (xfertype) { 1734 case UE_CONTROL: 1735 pipe->methods = &ohci_device_ctrl_methods; 1736 err = usb_allocmem(&sc->sc_bus, 1737 sizeof(usb_device_request_t), 1738 0, &opipe->u.ctl.reqdma); 1739 if (err) 1740 goto bad; 1741 s = splusb(); 1742 ohci_add_ed(sed, sc->sc_ctrl_head); 1743 splx(s); 1744 break; 1745 case UE_INTERRUPT: 1746 pipe->methods = &ohci_device_intr_methods; 1747 ival = pipe->interval; 1748 if (ival == USBD_DEFAULT_INTERVAL) 1749 ival = ed->bInterval; 1750 return (ohci_device_setintr(sc, opipe, ival)); 1751 case UE_ISOCHRONOUS: 1752 pipe->methods = &ohci_device_isoc_methods; 1753 return (ohci_setup_isoc(pipe)); 1754 case UE_BULK: 1755 pipe->methods = &ohci_device_bulk_methods; 1756 s = splusb(); 1757 ohci_add_ed(sed, sc->sc_bulk_head); 1758 splx(s); 1759 break; 1760 } 1761 } 1762 return (USBD_NORMAL_COMPLETION); 1763 1764 bad: 1765 ohci_free_std(sc, std); 1766 bad1: 1767 ohci_free_sed(sc, sed); 1768 bad0: 1769 return (USBD_NOMEM); 1770 1771 } 1772 1773 /* 1774 * Close a reqular pipe. 1775 * Assumes that there are no pending transactions. 1776 */ 1777 void 1778 ohci_close_pipe(pipe, head) 1779 usbd_pipe_handle pipe; 1780 ohci_soft_ed_t *head; 1781 { 1782 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1783 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1784 ohci_soft_ed_t *sed = opipe->sed; 1785 int s; 1786 1787 s = splusb(); 1788 #ifdef DIAGNOSTIC 1789 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 1790 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 1791 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 1792 ohci_physaddr_t td = le32toh(sed->ed.ed_headp); 1793 ohci_soft_td_t *std; 1794 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]); 1795 std != NULL; 1796 std = LIST_NEXT(std, hnext)) 1797 if (std->physaddr == td) 1798 break; 1799 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 1800 "tl=0x%x pipe=%p, std=%p\n", sed, 1801 (int)le32toh(sed->ed.ed_headp), 1802 (int)le32toh(sed->ed.ed_tailp), 1803 pipe, std); 1804 usb_delay_ms(&sc->sc_bus, 2); 1805 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 1806 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 1807 printf("ohci_close_pipe: pipe still not empty\n"); 1808 } 1809 #endif 1810 ohci_rem_ed(sed, head); 1811 splx(s); 1812 ohci_free_sed(sc, opipe->sed); 1813 } 1814 1815 /* 1816 * Abort a device request. 1817 * If this routine is called at splusb() it guarantees that the request 1818 * will be removed from the hardware scheduling and that the callback 1819 * for it will be called with USBD_CANCELLED status. 1820 * It's impossible to guarantee that the requested transfer will not 1821 * have happened since the hardware runs concurrently. 1822 * If the transaction has already happened we rely on the ordinary 1823 * interrupt processing to process it. 1824 */ 1825 void 1826 ohci_abort_xfer(xfer, status) 1827 usbd_xfer_handle xfer; 1828 usbd_status status; 1829 { 1830 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1831 ohci_soft_ed_t *sed; 1832 1833 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p\n", xfer, opipe)); 1834 1835 xfer->status = status; 1836 1837 usb_untimeout(ohci_timeout, xfer, xfer->timo_handle); 1838 1839 sed = opipe->sed; 1840 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 1841 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 1842 1843 #if 1 1844 if (xfer->device->bus->intr_context) { 1845 /* We have no process context, so we can't use tsleep(). */ 1846 timeout(ohci_abort_xfer_end, xfer, hz / USB_FRAMES_PER_SECOND); 1847 } else { 1848 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 1849 KASSERT(intr_nesting_level == 0, 1850 ("ohci_abort_req in interrupt context")); 1851 #endif 1852 usb_delay_ms(opipe->pipe.device->bus, 1); 1853 ohci_abort_xfer_end(xfer); 1854 } 1855 #else 1856 delay(1000); 1857 ohci_abort_xfer_end(xfer); 1858 #endif 1859 } 1860 1861 void 1862 ohci_abort_xfer_end(v) 1863 void *v; 1864 { 1865 usbd_xfer_handle xfer = v; 1866 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1867 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1868 ohci_soft_ed_t *sed; 1869 ohci_soft_td_t *p, *n; 1870 int s; 1871 1872 s = splusb(); 1873 1874 p = xfer->hcpriv; 1875 #ifdef DIAGNOSTIC 1876 if (p == NULL) { 1877 printf("ohci_abort_xfer: hcpriv==0\n"); 1878 return; 1879 } 1880 #endif 1881 for (; p->xfer == xfer; p = n) { 1882 n = p->nexttd; 1883 ohci_free_std(sc, p); 1884 } 1885 1886 sed = opipe->sed; 1887 DPRINTFN(2,("ohci_abort_xfer: set hd=%x, tl=%x\n", 1888 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 1889 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 1890 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 1891 1892 usb_transfer_complete(xfer); 1893 1894 splx(s); 1895 } 1896 1897 /* 1898 * Data structures and routines to emulate the root hub. 1899 */ 1900 static usb_device_descriptor_t ohci_devd = { 1901 USB_DEVICE_DESCRIPTOR_SIZE, 1902 UDESC_DEVICE, /* type */ 1903 {0x00, 0x01}, /* USB version */ 1904 UDCLASS_HUB, /* class */ 1905 UDSUBCLASS_HUB, /* subclass */ 1906 0, /* protocol */ 1907 64, /* max packet */ 1908 {0},{0},{0x00,0x01}, /* device id */ 1909 1,2,0, /* string indicies */ 1910 1 /* # of configurations */ 1911 }; 1912 1913 static usb_config_descriptor_t ohci_confd = { 1914 USB_CONFIG_DESCRIPTOR_SIZE, 1915 UDESC_CONFIG, 1916 {USB_CONFIG_DESCRIPTOR_SIZE + 1917 USB_INTERFACE_DESCRIPTOR_SIZE + 1918 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1919 1, 1920 1, 1921 0, 1922 UC_SELF_POWERED, 1923 0 /* max power */ 1924 }; 1925 1926 static usb_interface_descriptor_t ohci_ifcd = { 1927 USB_INTERFACE_DESCRIPTOR_SIZE, 1928 UDESC_INTERFACE, 1929 0, 1930 0, 1931 1, 1932 UICLASS_HUB, 1933 UISUBCLASS_HUB, 1934 0, 1935 0 1936 }; 1937 1938 static usb_endpoint_descriptor_t ohci_endpd = { 1939 USB_ENDPOINT_DESCRIPTOR_SIZE, 1940 UDESC_ENDPOINT, 1941 UE_DIR_IN | OHCI_INTR_ENDPT, 1942 UE_INTERRUPT, 1943 {8, 0}, /* max packet */ 1944 255 1945 }; 1946 1947 static usb_hub_descriptor_t ohci_hubd = { 1948 USB_HUB_DESCRIPTOR_SIZE, 1949 UDESC_HUB, 1950 0, 1951 {0,0}, 1952 0, 1953 0, 1954 {0}, 1955 }; 1956 1957 static int 1958 ohci_str(p, l, s) 1959 usb_string_descriptor_t *p; 1960 int l; 1961 char *s; 1962 { 1963 int i; 1964 1965 if (l == 0) 1966 return (0); 1967 p->bLength = 2 * strlen(s) + 2; 1968 if (l == 1) 1969 return (1); 1970 p->bDescriptorType = UDESC_STRING; 1971 l -= 2; 1972 for (i = 0; s[i] && l > 1; i++, l -= 2) 1973 USETW2(p->bString[i], 0, s[i]); 1974 return (2*i+2); 1975 } 1976 1977 /* 1978 * Simulate a hardware hub by handling all the necessary requests. 1979 */ 1980 static usbd_status 1981 ohci_root_ctrl_transfer(xfer) 1982 usbd_xfer_handle xfer; 1983 { 1984 usbd_status err; 1985 1986 /* Insert last in queue. */ 1987 err = usb_insert_transfer(xfer); 1988 if (err) 1989 return (err); 1990 1991 /* Pipe isn't running, start first */ 1992 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1993 } 1994 1995 static usbd_status 1996 ohci_root_ctrl_start(xfer) 1997 usbd_xfer_handle xfer; 1998 { 1999 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2000 usb_device_request_t *req; 2001 void *buf = NULL; 2002 int port, i; 2003 int s, len, value, index, l, totlen = 0; 2004 usb_port_status_t ps; 2005 usb_hub_descriptor_t hubd; 2006 usbd_status err; 2007 u_int32_t v; 2008 2009 #ifdef DIAGNOSTIC 2010 if (!(xfer->rqflags & URQ_REQUEST)) 2011 /* XXX panic */ 2012 return (USBD_INVAL); 2013 #endif 2014 req = &xfer->request; 2015 2016 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2017 req->bmRequestType, req->bRequest)); 2018 2019 len = UGETW(req->wLength); 2020 value = UGETW(req->wValue); 2021 index = UGETW(req->wIndex); 2022 2023 if (len != 0) 2024 buf = KERNADDR(&xfer->dmabuf); 2025 2026 #define C(x,y) ((x) | ((y) << 8)) 2027 switch(C(req->bRequest, req->bmRequestType)) { 2028 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2029 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2030 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2031 /* 2032 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2033 * for the integrated root hub. 2034 */ 2035 break; 2036 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2037 if (len > 0) { 2038 *(u_int8_t *)buf = sc->sc_conf; 2039 totlen = 1; 2040 } 2041 break; 2042 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2043 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2044 switch(value >> 8) { 2045 case UDESC_DEVICE: 2046 if ((value & 0xff) != 0) { 2047 err = USBD_IOERROR; 2048 goto ret; 2049 } 2050 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2051 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2052 memcpy(buf, &ohci_devd, l); 2053 break; 2054 case UDESC_CONFIG: 2055 if ((value & 0xff) != 0) { 2056 err = USBD_IOERROR; 2057 goto ret; 2058 } 2059 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2060 memcpy(buf, &ohci_confd, l); 2061 buf = (char *)buf + l; 2062 len -= l; 2063 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2064 totlen += l; 2065 memcpy(buf, &ohci_ifcd, l); 2066 buf = (char *)buf + l; 2067 len -= l; 2068 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2069 totlen += l; 2070 memcpy(buf, &ohci_endpd, l); 2071 break; 2072 case UDESC_STRING: 2073 if (len == 0) 2074 break; 2075 *(u_int8_t *)buf = 0; 2076 totlen = 1; 2077 switch (value & 0xff) { 2078 case 1: /* Vendor */ 2079 totlen = ohci_str(buf, len, sc->sc_vendor); 2080 break; 2081 case 2: /* Product */ 2082 totlen = ohci_str(buf, len, "OHCI root hub"); 2083 break; 2084 } 2085 break; 2086 default: 2087 err = USBD_IOERROR; 2088 goto ret; 2089 } 2090 break; 2091 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2092 if (len > 0) { 2093 *(u_int8_t *)buf = 0; 2094 totlen = 1; 2095 } 2096 break; 2097 case C(UR_GET_STATUS, UT_READ_DEVICE): 2098 if (len > 1) { 2099 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2100 totlen = 2; 2101 } 2102 break; 2103 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2104 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2105 if (len > 1) { 2106 USETW(((usb_status_t *)buf)->wStatus, 0); 2107 totlen = 2; 2108 } 2109 break; 2110 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2111 if (value >= USB_MAX_DEVICES) { 2112 err = USBD_IOERROR; 2113 goto ret; 2114 } 2115 sc->sc_addr = value; 2116 break; 2117 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2118 if (value != 0 && value != 1) { 2119 err = USBD_IOERROR; 2120 goto ret; 2121 } 2122 sc->sc_conf = value; 2123 break; 2124 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2125 break; 2126 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2127 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2128 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2129 err = USBD_IOERROR; 2130 goto ret; 2131 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2132 break; 2133 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2134 break; 2135 /* Hub requests */ 2136 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2137 break; 2138 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2139 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2140 "port=%d feature=%d\n", 2141 index, value)); 2142 if (index < 1 || index > sc->sc_noport) { 2143 err = USBD_IOERROR; 2144 goto ret; 2145 } 2146 port = OHCI_RH_PORT_STATUS(index); 2147 switch(value) { 2148 case UHF_PORT_ENABLE: 2149 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2150 break; 2151 case UHF_PORT_SUSPEND: 2152 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2153 break; 2154 case UHF_PORT_POWER: 2155 OWRITE4(sc, port, UPS_LOW_SPEED); 2156 break; 2157 case UHF_C_PORT_CONNECTION: 2158 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2159 break; 2160 case UHF_C_PORT_ENABLE: 2161 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2162 break; 2163 case UHF_C_PORT_SUSPEND: 2164 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2165 break; 2166 case UHF_C_PORT_OVER_CURRENT: 2167 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2168 break; 2169 case UHF_C_PORT_RESET: 2170 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2171 break; 2172 default: 2173 err = USBD_IOERROR; 2174 goto ret; 2175 } 2176 switch(value) { 2177 case UHF_C_PORT_CONNECTION: 2178 case UHF_C_PORT_ENABLE: 2179 case UHF_C_PORT_SUSPEND: 2180 case UHF_C_PORT_OVER_CURRENT: 2181 case UHF_C_PORT_RESET: 2182 /* Enable RHSC interrupt if condition is cleared. */ 2183 if ((OREAD4(sc, port) >> 16) == 0) 2184 ohci_rhsc_able(sc, 1); 2185 break; 2186 default: 2187 break; 2188 } 2189 break; 2190 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2191 if (value != 0) { 2192 err = USBD_IOERROR; 2193 goto ret; 2194 } 2195 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2196 hubd = ohci_hubd; 2197 hubd.bNbrPorts = sc->sc_noport; 2198 USETW(hubd.wHubCharacteristics, 2199 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2200 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2201 /* XXX overcurrent */ 2202 ); 2203 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2204 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2205 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2206 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2207 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2208 l = min(len, hubd.bDescLength); 2209 totlen = l; 2210 memcpy(buf, &hubd, l); 2211 break; 2212 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2213 if (len != 4) { 2214 err = USBD_IOERROR; 2215 goto ret; 2216 } 2217 memset(buf, 0, len); /* ? XXX */ 2218 totlen = len; 2219 break; 2220 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2221 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2222 index)); 2223 if (index < 1 || index > sc->sc_noport) { 2224 err = USBD_IOERROR; 2225 goto ret; 2226 } 2227 if (len != 4) { 2228 err = USBD_IOERROR; 2229 goto ret; 2230 } 2231 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2232 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2233 v)); 2234 USETW(ps.wPortStatus, v); 2235 USETW(ps.wPortChange, v >> 16); 2236 l = min(len, sizeof ps); 2237 memcpy(buf, &ps, l); 2238 totlen = l; 2239 break; 2240 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2241 err = USBD_IOERROR; 2242 goto ret; 2243 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2244 break; 2245 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2246 if (index < 1 || index > sc->sc_noport) { 2247 err = USBD_IOERROR; 2248 goto ret; 2249 } 2250 port = OHCI_RH_PORT_STATUS(index); 2251 switch(value) { 2252 case UHF_PORT_ENABLE: 2253 OWRITE4(sc, port, UPS_PORT_ENABLED); 2254 break; 2255 case UHF_PORT_SUSPEND: 2256 OWRITE4(sc, port, UPS_SUSPEND); 2257 break; 2258 case UHF_PORT_RESET: 2259 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2260 index)); 2261 OWRITE4(sc, port, UPS_RESET); 2262 for (i = 0; i < 10; i++) { 2263 usb_delay_ms(&sc->sc_bus, 10); 2264 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2265 break; 2266 } 2267 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2268 index, OREAD4(sc, port))); 2269 break; 2270 case UHF_PORT_POWER: 2271 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2272 "%d\n", index)); 2273 OWRITE4(sc, port, UPS_PORT_POWER); 2274 break; 2275 default: 2276 err = USBD_IOERROR; 2277 goto ret; 2278 } 2279 break; 2280 default: 2281 err = USBD_IOERROR; 2282 goto ret; 2283 } 2284 xfer->actlen = totlen; 2285 err = USBD_NORMAL_COMPLETION; 2286 ret: 2287 xfer->status = err; 2288 s = splusb(); 2289 usb_transfer_complete(xfer); 2290 splx(s); 2291 return (USBD_IN_PROGRESS); 2292 } 2293 2294 /* Abort a root control request. */ 2295 static void 2296 ohci_root_ctrl_abort(xfer) 2297 usbd_xfer_handle xfer; 2298 { 2299 /* Nothing to do, all transfers are synchronous. */ 2300 } 2301 2302 /* Close the root pipe. */ 2303 static void 2304 ohci_root_ctrl_close(pipe) 2305 usbd_pipe_handle pipe; 2306 { 2307 DPRINTF(("ohci_root_ctrl_close\n")); 2308 /* Nothing to do. */ 2309 } 2310 2311 static usbd_status 2312 ohci_root_intr_transfer(xfer) 2313 usbd_xfer_handle xfer; 2314 { 2315 usbd_status err; 2316 2317 /* Insert last in queue. */ 2318 err = usb_insert_transfer(xfer); 2319 if (err) 2320 return (err); 2321 2322 /* Pipe isn't running, start first */ 2323 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2324 } 2325 2326 static usbd_status 2327 ohci_root_intr_start(xfer) 2328 usbd_xfer_handle xfer; 2329 { 2330 usbd_pipe_handle pipe = xfer->pipe; 2331 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2332 2333 sc->sc_intrxfer = xfer; 2334 2335 return (USBD_IN_PROGRESS); 2336 } 2337 2338 /* Abort a root interrupt request. */ 2339 static void 2340 ohci_root_intr_abort(xfer) 2341 usbd_xfer_handle xfer; 2342 { 2343 int s; 2344 2345 if (xfer->pipe->intrxfer == xfer) { 2346 DPRINTF(("ohci_root_intr_abort: remove\n")); 2347 xfer->pipe->intrxfer = NULL; 2348 } 2349 xfer->status = USBD_CANCELLED; 2350 s = splusb(); 2351 usb_transfer_complete(xfer); 2352 splx(s); 2353 } 2354 2355 /* Close the root pipe. */ 2356 static void 2357 ohci_root_intr_close(pipe) 2358 usbd_pipe_handle pipe; 2359 { 2360 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2361 2362 DPRINTF(("ohci_root_intr_close\n")); 2363 2364 sc->sc_intrxfer = NULL; 2365 } 2366 2367 /************************/ 2368 2369 static usbd_status 2370 ohci_device_ctrl_transfer(xfer) 2371 usbd_xfer_handle xfer; 2372 { 2373 usbd_status err; 2374 2375 /* Insert last in queue. */ 2376 err = usb_insert_transfer(xfer); 2377 if (err) 2378 return (err); 2379 2380 /* Pipe isn't running, start first */ 2381 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2382 } 2383 2384 static usbd_status 2385 ohci_device_ctrl_start(xfer) 2386 usbd_xfer_handle xfer; 2387 { 2388 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2389 usbd_status err; 2390 2391 #ifdef DIAGNOSTIC 2392 if (!(xfer->rqflags & URQ_REQUEST)) { 2393 /* XXX panic */ 2394 printf("ohci_device_ctrl_transfer: not a request\n"); 2395 return (USBD_INVAL); 2396 } 2397 #endif 2398 2399 err = ohci_device_request(xfer); 2400 if (err) 2401 return (err); 2402 2403 if (sc->sc_bus.use_polling) 2404 ohci_waitintr(sc, xfer); 2405 return (USBD_IN_PROGRESS); 2406 } 2407 2408 /* Abort a device control request. */ 2409 static void 2410 ohci_device_ctrl_abort(xfer) 2411 usbd_xfer_handle xfer; 2412 { 2413 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2414 ohci_abort_xfer(xfer, USBD_CANCELLED); 2415 } 2416 2417 /* Close a device control pipe. */ 2418 static void 2419 ohci_device_ctrl_close(pipe) 2420 usbd_pipe_handle pipe; 2421 { 2422 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2423 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2424 2425 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2426 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2427 ohci_free_std(sc, opipe->tail.td); 2428 } 2429 2430 /************************/ 2431 2432 static void 2433 ohci_device_clear_toggle(pipe) 2434 usbd_pipe_handle pipe; 2435 { 2436 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2437 2438 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2439 } 2440 2441 static void 2442 ohci_noop(pipe) 2443 usbd_pipe_handle pipe; 2444 { 2445 } 2446 2447 static usbd_status 2448 ohci_device_bulk_transfer(xfer) 2449 usbd_xfer_handle xfer; 2450 { 2451 usbd_status err; 2452 2453 /* Insert last in queue. */ 2454 err = usb_insert_transfer(xfer); 2455 if (err) 2456 return (err); 2457 2458 /* Pipe isn't running, start first */ 2459 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2460 } 2461 2462 static usbd_status 2463 ohci_device_bulk_start(xfer) 2464 usbd_xfer_handle xfer; 2465 { 2466 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2467 usbd_device_handle dev = opipe->pipe.device; 2468 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2469 int addr = dev->address; 2470 ohci_soft_td_t *data, *tail, *tdp; 2471 ohci_soft_ed_t *sed; 2472 int s, len, isread, endpt; 2473 usbd_status err; 2474 2475 #ifdef DIAGNOSTIC 2476 if (xfer->rqflags & URQ_REQUEST) { 2477 /* XXX panic */ 2478 printf("ohci_device_bulk_start: a request\n"); 2479 return (USBD_INVAL); 2480 } 2481 #endif 2482 2483 len = xfer->length; 2484 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2485 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2486 sed = opipe->sed; 2487 2488 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2489 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2490 endpt)); 2491 2492 opipe->u.bulk.isread = isread; 2493 opipe->u.bulk.length = len; 2494 2495 /* Update device address */ 2496 sed->ed.ed_flags = htole32( 2497 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2498 OHCI_ED_SET_FA(addr)); 2499 2500 /* Allocate a chain of new TDs (including a new tail). */ 2501 data = opipe->tail.td; 2502 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2503 data, &tail); 2504 /* We want interrupt at the end of the transfer. */ 2505 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2506 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2507 tail->flags |= OHCI_CALL_DONE; 2508 tail = tail->nexttd; /* point at sentinel */ 2509 if (err) 2510 return (err); 2511 2512 tail->xfer = NULL; 2513 xfer->hcpriv = data; 2514 2515 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2516 "td_cbp=0x%08x td_be=0x%08x\n", 2517 (int)le32toh(sed->ed.ed_flags), 2518 (int)le32toh(data->td.td_flags), 2519 (int)le32toh(data->td.td_cbp), 2520 (int)le32toh(data->td.td_be))); 2521 2522 #ifdef OHCI_DEBUG 2523 if (ohcidebug > 5) { 2524 ohci_dump_ed(sed); 2525 ohci_dump_tds(data); 2526 } 2527 #endif 2528 2529 /* Insert ED in schedule */ 2530 s = splusb(); 2531 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2532 tdp->xfer = xfer; 2533 } 2534 sed->ed.ed_tailp = htole32(tail->physaddr); 2535 opipe->tail.td = tail; 2536 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2537 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2538 if (xfer->timeout && !sc->sc_bus.use_polling) { 2539 usb_timeout(ohci_timeout, xfer, 2540 MS_TO_TICKS(xfer->timeout), xfer->timo_handle); 2541 } 2542 2543 #if 0 2544 /* This goes wrong if we are too slow. */ 2545 if (ohcidebug > 10) { 2546 delay(10000); 2547 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2548 OREAD4(sc, OHCI_COMMAND_STATUS))); 2549 ohci_dump_ed(sed); 2550 ohci_dump_tds(data); 2551 } 2552 #endif 2553 2554 splx(s); 2555 2556 return (USBD_IN_PROGRESS); 2557 } 2558 2559 static void 2560 ohci_device_bulk_abort(xfer) 2561 usbd_xfer_handle xfer; 2562 { 2563 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2564 ohci_abort_xfer(xfer, USBD_CANCELLED); 2565 } 2566 2567 /* 2568 * Close a device bulk pipe. 2569 */ 2570 static void 2571 ohci_device_bulk_close(pipe) 2572 usbd_pipe_handle pipe; 2573 { 2574 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2575 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2576 2577 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2578 ohci_close_pipe(pipe, sc->sc_bulk_head); 2579 ohci_free_std(sc, opipe->tail.td); 2580 } 2581 2582 /************************/ 2583 2584 static usbd_status 2585 ohci_device_intr_transfer(xfer) 2586 usbd_xfer_handle xfer; 2587 { 2588 usbd_status err; 2589 2590 /* Insert last in queue. */ 2591 err = usb_insert_transfer(xfer); 2592 if (err) 2593 return (err); 2594 2595 /* Pipe isn't running, start first */ 2596 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2597 } 2598 2599 static usbd_status 2600 ohci_device_intr_start(xfer) 2601 usbd_xfer_handle xfer; 2602 { 2603 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2604 usbd_device_handle dev = opipe->pipe.device; 2605 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2606 ohci_soft_ed_t *sed = opipe->sed; 2607 ohci_soft_td_t *data, *tail; 2608 int len; 2609 int s; 2610 2611 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2612 "flags=%d priv=%p\n", 2613 xfer, xfer->length, xfer->flags, xfer->priv)); 2614 2615 #ifdef DIAGNOSTIC 2616 if (xfer->rqflags & URQ_REQUEST) 2617 panic("ohci_device_intr_transfer: a request\n"); 2618 #endif 2619 2620 len = xfer->length; 2621 2622 data = opipe->tail.td; 2623 tail = ohci_alloc_std(sc); 2624 if (tail == NULL) 2625 return (USBD_NOMEM); 2626 tail->xfer = NULL; 2627 2628 data->td.td_flags = htole32( 2629 OHCI_TD_IN | OHCI_TD_NOCC | 2630 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2631 if (xfer->flags & USBD_SHORT_XFER_OK) 2632 data->td.td_flags |= htole32(OHCI_TD_R); 2633 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 2634 data->nexttd = tail; 2635 data->td.td_nexttd = htole32(tail->physaddr); 2636 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 2637 data->len = len; 2638 data->xfer = xfer; 2639 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2640 xfer->hcpriv = data; 2641 2642 #ifdef OHCI_DEBUG 2643 if (ohcidebug > 5) { 2644 DPRINTF(("ohci_device_intr_transfer:\n")); 2645 ohci_dump_ed(sed); 2646 ohci_dump_tds(data); 2647 } 2648 #endif 2649 2650 /* Insert ED in schedule */ 2651 s = splusb(); 2652 sed->ed.ed_tailp = htole32(tail->physaddr); 2653 opipe->tail.td = tail; 2654 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2655 2656 #if 0 2657 /* 2658 * This goes horribly wrong, printing thousands of descriptors, 2659 * because false references are followed due to the fact that the 2660 * TD is gone. 2661 */ 2662 if (ohcidebug > 5) { 2663 usb_delay_ms(&sc->sc_bus, 5); 2664 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2665 OREAD4(sc, OHCI_COMMAND_STATUS))); 2666 ohci_dump_ed(sed); 2667 ohci_dump_tds(data); 2668 } 2669 #endif 2670 splx(s); 2671 2672 return (USBD_IN_PROGRESS); 2673 } 2674 2675 /* Abort a device control request. */ 2676 static void 2677 ohci_device_intr_abort(xfer) 2678 usbd_xfer_handle xfer; 2679 { 2680 if (xfer->pipe->intrxfer == xfer) { 2681 DPRINTF(("ohci_device_intr_abort: remove\n")); 2682 xfer->pipe->intrxfer = NULL; 2683 } 2684 ohci_abort_xfer(xfer, USBD_CANCELLED); 2685 } 2686 2687 /* Close a device interrupt pipe. */ 2688 static void 2689 ohci_device_intr_close(pipe) 2690 usbd_pipe_handle pipe; 2691 { 2692 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2693 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2694 int nslots = opipe->u.intr.nslots; 2695 int pos = opipe->u.intr.pos; 2696 int j; 2697 ohci_soft_ed_t *p, *sed = opipe->sed; 2698 int s; 2699 2700 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2701 pipe, nslots, pos)); 2702 s = splusb(); 2703 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2704 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2705 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2706 usb_delay_ms(&sc->sc_bus, 2); 2707 2708 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2709 ; 2710 #ifdef DIAGNOSTIC 2711 if (p == NULL) 2712 panic("ohci_device_intr_close: ED not found\n"); 2713 #endif 2714 p->next = sed->next; 2715 p->ed.ed_nexted = sed->ed.ed_nexted; 2716 splx(s); 2717 2718 for (j = 0; j < nslots; j++) 2719 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2720 2721 ohci_free_std(sc, opipe->tail.td); 2722 ohci_free_sed(sc, opipe->sed); 2723 } 2724 2725 static usbd_status 2726 ohci_device_setintr(sc, opipe, ival) 2727 ohci_softc_t *sc; 2728 struct ohci_pipe *opipe; 2729 int ival; 2730 { 2731 int i, j, s, best; 2732 u_int npoll, slow, shigh, nslots; 2733 u_int bestbw, bw; 2734 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2735 2736 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2737 if (ival == 0) { 2738 printf("ohci_setintr: 0 interval\n"); 2739 return (USBD_INVAL); 2740 } 2741 2742 npoll = OHCI_NO_INTRS; 2743 while (npoll > ival) 2744 npoll /= 2; 2745 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2746 2747 /* 2748 * We now know which level in the tree the ED must go into. 2749 * Figure out which slot has most bandwidth left over. 2750 * Slots to examine: 2751 * npoll 2752 * 1 0 2753 * 2 1 2 2754 * 4 3 4 5 6 2755 * 8 7 8 9 10 11 12 13 14 2756 * N (N-1) .. (N-1+N-1) 2757 */ 2758 slow = npoll-1; 2759 shigh = slow + npoll; 2760 nslots = OHCI_NO_INTRS / npoll; 2761 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2762 bw = 0; 2763 for (j = 0; j < nslots; j++) 2764 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 2765 if (bw < bestbw) { 2766 best = i; 2767 bestbw = bw; 2768 } 2769 } 2770 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2771 best, slow, shigh, bestbw)); 2772 2773 s = splusb(); 2774 hsed = sc->sc_eds[best]; 2775 sed->next = hsed->next; 2776 sed->ed.ed_nexted = hsed->ed.ed_nexted; 2777 hsed->next = sed; 2778 hsed->ed.ed_nexted = htole32(sed->physaddr); 2779 splx(s); 2780 2781 for (j = 0; j < nslots; j++) 2782 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 2783 opipe->u.intr.nslots = nslots; 2784 opipe->u.intr.pos = best; 2785 2786 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 2787 return (USBD_NORMAL_COMPLETION); 2788 } 2789 2790 /***********************/ 2791 2792 usbd_status 2793 ohci_device_isoc_transfer(xfer) 2794 usbd_xfer_handle xfer; 2795 { 2796 usbd_status err; 2797 2798 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 2799 2800 /* Put it on our queue, */ 2801 err = usb_insert_transfer(xfer); 2802 2803 /* bail out on error, */ 2804 if (err && err != USBD_IN_PROGRESS) 2805 return (err); 2806 2807 /* XXX should check inuse here */ 2808 2809 /* insert into schedule, */ 2810 ohci_device_isoc_enter(xfer); 2811 2812 /* and put on interrupt list if the pipe wasn't running */ 2813 if (!err) 2814 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2815 2816 return (err); 2817 } 2818 2819 void 2820 ohci_device_isoc_enter(xfer) 2821 usbd_xfer_handle xfer; 2822 { 2823 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2824 usbd_device_handle dev = opipe->pipe.device; 2825 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2826 ohci_soft_ed_t *sed = opipe->sed; 2827 struct iso *iso = &opipe->u.iso; 2828 ohci_soft_itd_t *sitd, *nsitd; 2829 ohci_physaddr_t buf, offs; 2830 int i, ncur, nframes; 2831 int ncross; 2832 int s; 2833 2834 s = splusb(); 2835 sitd = opipe->tail.itd; 2836 buf = DMAADDR(&xfer->dmabuf); 2837 sitd->itd.itd_bp0 = htole32(buf & OHCI_ITD_PAGE_MASK); 2838 nframes = xfer->nframes; 2839 offs = buf & OHCI_ITD_OFFSET_MASK; 2840 ncross = 0; 2841 for (i = ncur = 0; i < nframes; i++, ncur++) { 2842 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 2843 ncross > 1) { /* too many page crossings */ 2844 2845 nsitd = ohci_alloc_sitd(sc); 2846 if (nsitd == NULL) { 2847 /* XXX what now? */ 2848 return; 2849 } 2850 sitd->nextitd = nsitd; 2851 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 2852 sitd->itd.itd_flags = htole32( 2853 OHCI_ITD_NOCC | 2854 OHCI_ITD_SET_SF(iso->next) | 2855 OHCI_ITD_NOINTR | 2856 OHCI_ITD_SET_FC(OHCI_ITD_NOFFSET)); 2857 sitd->itd.itd_be = htole32( 2858 le32toh(sitd->itd.itd_bp0) + offs - 1); 2859 nsitd->itd.itd_bp0 = htole32( 2860 (buf + offs) & OHCI_ITD_PAGE_MASK); 2861 sitd = nsitd; 2862 iso->next = iso->next + ncur; 2863 ncur = 0; 2864 ncross = 0; 2865 } 2866 /* XXX byte order */ 2867 sitd->itd.itd_offset[i] = 2868 offs | (ncross == 1 ? OHCI_ITD_PAGE_SELECT : 0); 2869 offs += xfer->frlengths[i]; 2870 /* XXX update ncross */ 2871 } 2872 nsitd = ohci_alloc_sitd(sc); 2873 if (nsitd == NULL) { 2874 /* XXX what now? */ 2875 return; 2876 } 2877 sitd->nextitd = nsitd; 2878 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 2879 sitd->itd.itd_flags = le32toh( 2880 OHCI_ITD_NOCC | 2881 OHCI_ITD_SET_SF(iso->next) | 2882 OHCI_ITD_SET_DI(0) | 2883 OHCI_ITD_SET_FC(ncur)); 2884 sitd->itd.itd_be = htole32(le32toh(sitd->itd.itd_bp0) + offs - 1); 2885 iso->next = iso->next + ncur; 2886 2887 opipe->tail.itd = nsitd; 2888 sed->ed.ed_tailp = htole32(nsitd->physaddr); 2889 /* XXX update ED */ 2890 splx(s); 2891 } 2892 2893 usbd_status 2894 ohci_device_isoc_start(xfer) 2895 usbd_xfer_handle xfer; 2896 { 2897 printf("ohci_device_isoc_start: not implemented\n"); 2898 return (USBD_INVAL); 2899 } 2900 2901 void 2902 ohci_device_isoc_abort(xfer) 2903 usbd_xfer_handle xfer; 2904 { 2905 } 2906 2907 void 2908 ohci_device_isoc_done(xfer) 2909 usbd_xfer_handle xfer; 2910 { 2911 printf("ohci_device_isoc_done: not implemented\n"); 2912 } 2913 2914 usbd_status 2915 ohci_setup_isoc(pipe) 2916 usbd_pipe_handle pipe; 2917 { 2918 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2919 struct iso *iso = &opipe->u.iso; 2920 2921 iso->next = -1; 2922 iso->inuse = 0; 2923 2924 return (USBD_NORMAL_COMPLETION); 2925 } 2926 2927 void 2928 ohci_device_isoc_close(pipe) 2929 usbd_pipe_handle pipe; 2930 { 2931 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2932 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2933 2934 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 2935 ohci_close_pipe(pipe, sc->sc_isoc_head); 2936 ohci_free_sitd(sc, opipe->tail.itd); 2937 } 2938
Indexes created Wed Sep 24 05:09:52 GMT 2025