ohci.c revision 1.80
1 /* $NetBSD: ohci.c,v 1.80 2000/03/24 22:03:30 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (augustss (at) carlstedt.se) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe 45 * USB spec: http://www.usb.org/developers/data/usb11.pdf 46 */ 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/kernel.h> 53 #include <sys/device.h> 54 #include <sys/select.h> 55 #elif defined(__FreeBSD__) 56 #include <sys/module.h> 57 #include <sys/bus.h> 58 #include <machine/bus_pio.h> 59 #include <machine/bus_memio.h> 60 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 61 #include <machine/cpu.h> 62 #endif 63 #endif 64 #include <sys/proc.h> 65 #include <sys/queue.h> 66 67 #include <machine/bus.h> 68 #include <machine/endian.h> 69 70 #include <dev/usb/usb.h> 71 #include <dev/usb/usbdi.h> 72 #include <dev/usb/usbdivar.h> 73 #include <dev/usb/usb_mem.h> 74 #include <dev/usb/usb_quirks.h> 75 76 #include <dev/usb/ohcireg.h> 77 #include <dev/usb/ohcivar.h> 78 79 #if defined(__FreeBSD__) 80 #include <machine/clock.h> 81 82 #define delay(d) DELAY(d) 83 #endif 84 85 #if defined(__OpenBSD__) 86 struct cfdriver ohci_cd = { 87 NULL, "ohci", DV_DULL 88 }; 89 #endif 90 91 #ifdef OHCI_DEBUG 92 #define DPRINTF(x) if (ohcidebug) logprintf x 93 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 94 int ohcidebug = 0; 95 #else 96 #define DPRINTF(x) 97 #define DPRINTFN(n,x) 98 #endif 99 100 /* 101 * The OHCI controller is little endian, so on big endian machines 102 * the data strored in memory needs to be swapped. 103 */ 104 #if defined(__FreeBSD__) 105 #if BYTE_ORDER == BIG_ENDIAN 106 #define htole32(x) (bswap32(x)) 107 #define le32toh(x) (bswap32(x)) 108 #else 109 #define htole32(x) (x) 110 #define le32toh(x) (x) 111 #endif 112 #endif 113 114 struct ohci_pipe; 115 116 static ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *)); 117 static void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *)); 118 119 static ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *)); 120 static void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *)); 121 122 static ohci_soft_itd_t *ohci_alloc_sitd __P((ohci_softc_t *)); 123 static void ohci_free_sitd __P((ohci_softc_t *,ohci_soft_itd_t *)); 124 125 #if 0 126 static void ohci_free_std_chain __P((ohci_softc_t *, 127 ohci_soft_td_t *, ohci_soft_td_t *)); 128 #endif 129 static usbd_status ohci_alloc_std_chain __P((struct ohci_pipe *, 130 ohci_softc_t *, int, int, usbd_xfer_handle, 131 ohci_soft_td_t *, ohci_soft_td_t **)); 132 133 static void ohci_shutdown __P((void *v)); 134 static void ohci_power __P((int, void *)); 135 static usbd_status ohci_open __P((usbd_pipe_handle)); 136 static void ohci_poll __P((struct usbd_bus *)); 137 static void ohci_softintr __P((struct usbd_bus *)); 138 static void ohci_waitintr __P((ohci_softc_t *, 139 usbd_xfer_handle)); 140 static void ohci_rhsc __P((ohci_softc_t *, usbd_xfer_handle)); 141 142 static usbd_status ohci_device_request __P((usbd_xfer_handle xfer)); 143 static void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 144 static void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 145 static void ohci_hash_add_td __P((ohci_softc_t *, 146 ohci_soft_td_t *)); 147 static void ohci_hash_rem_td __P((ohci_softc_t *, 148 ohci_soft_td_t *)); 149 static ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, 150 ohci_physaddr_t)); 151 152 static usbd_status ohci_setup_isoc __P((usbd_pipe_handle pipe)); 153 static void ohci_device_isoc_enter __P((usbd_xfer_handle)); 154 155 static usbd_status ohci_allocm __P((struct usbd_bus *, usb_dma_t *, 156 u_int32_t)); 157 static void ohci_freem __P((struct usbd_bus *, usb_dma_t *)); 158 159 static usbd_xfer_handle ohci_allocx __P((struct usbd_bus *)); 160 static void ohci_freex __P((struct usbd_bus *, usbd_xfer_handle)); 161 162 static usbd_status ohci_root_ctrl_transfer __P((usbd_xfer_handle)); 163 static usbd_status ohci_root_ctrl_start __P((usbd_xfer_handle)); 164 static void ohci_root_ctrl_abort __P((usbd_xfer_handle)); 165 static void ohci_root_ctrl_close __P((usbd_pipe_handle)); 166 static void ohci_root_ctrl_done __P((usbd_xfer_handle)); 167 168 static usbd_status ohci_root_intr_transfer __P((usbd_xfer_handle)); 169 static usbd_status ohci_root_intr_start __P((usbd_xfer_handle)); 170 static void ohci_root_intr_abort __P((usbd_xfer_handle)); 171 static void ohci_root_intr_close __P((usbd_pipe_handle)); 172 static void ohci_root_intr_done __P((usbd_xfer_handle)); 173 174 static usbd_status ohci_device_ctrl_transfer __P((usbd_xfer_handle)); 175 static usbd_status ohci_device_ctrl_start __P((usbd_xfer_handle)); 176 static void ohci_device_ctrl_abort __P((usbd_xfer_handle)); 177 static void ohci_device_ctrl_close __P((usbd_pipe_handle)); 178 static void ohci_device_ctrl_done __P((usbd_xfer_handle)); 179 180 static usbd_status ohci_device_bulk_transfer __P((usbd_xfer_handle)); 181 static usbd_status ohci_device_bulk_start __P((usbd_xfer_handle)); 182 static void ohci_device_bulk_abort __P((usbd_xfer_handle)); 183 static void ohci_device_bulk_close __P((usbd_pipe_handle)); 184 static void ohci_device_bulk_done __P((usbd_xfer_handle)); 185 186 static usbd_status ohci_device_intr_transfer __P((usbd_xfer_handle)); 187 static usbd_status ohci_device_intr_start __P((usbd_xfer_handle)); 188 static void ohci_device_intr_abort __P((usbd_xfer_handle)); 189 static void ohci_device_intr_close __P((usbd_pipe_handle)); 190 static void ohci_device_intr_done __P((usbd_xfer_handle)); 191 192 static usbd_status ohci_device_isoc_transfer __P((usbd_xfer_handle)); 193 static usbd_status ohci_device_isoc_start __P((usbd_xfer_handle)); 194 static void ohci_device_isoc_abort __P((usbd_xfer_handle)); 195 static void ohci_device_isoc_close __P((usbd_pipe_handle)); 196 static void ohci_device_isoc_done __P((usbd_xfer_handle)); 197 198 static usbd_status ohci_device_setintr __P((ohci_softc_t *sc, 199 struct ohci_pipe *pipe, int ival)); 200 201 static int ohci_str __P((usb_string_descriptor_t *, int, char *)); 202 203 static void ohci_timeout __P((void *)); 204 static void ohci_rhsc_able __P((ohci_softc_t *, int)); 205 206 static void ohci_close_pipe __P((usbd_pipe_handle pipe, 207 ohci_soft_ed_t *head)); 208 static void ohci_abort_xfer __P((usbd_xfer_handle xfer, 209 usbd_status status)); 210 static void ohci_abort_xfer_end __P((void *)); 211 212 static void ohci_device_clear_toggle __P((usbd_pipe_handle pipe)); 213 static void ohci_noop __P((usbd_pipe_handle pipe)); 214 215 #ifdef OHCI_DEBUG 216 static void ohci_dumpregs __P((ohci_softc_t *)); 217 static void ohci_dump_tds __P((ohci_soft_td_t *)); 218 static void ohci_dump_td __P((ohci_soft_td_t *)); 219 static void ohci_dump_ed __P((ohci_soft_ed_t *)); 220 #endif 221 222 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 223 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 224 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 225 226 /* Reverse the bits in a value 0 .. 31 */ 227 static u_int8_t revbits[OHCI_NO_INTRS] = 228 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 229 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 230 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 231 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 232 233 struct ohci_pipe { 234 struct usbd_pipe pipe; 235 ohci_soft_ed_t *sed; 236 union { 237 ohci_soft_td_t *td; 238 ohci_soft_itd_t *itd; 239 } tail; 240 /* Info needed for different pipe kinds. */ 241 union { 242 /* Control pipe */ 243 struct { 244 usb_dma_t reqdma; 245 u_int length; 246 ohci_soft_td_t *setup, *data, *stat; 247 } ctl; 248 /* Interrupt pipe */ 249 struct { 250 int nslots; 251 int pos; 252 } intr; 253 /* Bulk pipe */ 254 struct { 255 u_int length; 256 int isread; 257 } bulk; 258 /* Iso pipe */ 259 struct iso { 260 int next, inuse; 261 } iso; 262 } u; 263 }; 264 265 #define OHCI_INTR_ENDPT 1 266 267 static struct usbd_bus_methods ohci_bus_methods = { 268 ohci_open, 269 ohci_softintr, 270 ohci_poll, 271 ohci_allocm, 272 ohci_freem, 273 ohci_allocx, 274 ohci_freex, 275 }; 276 277 static struct usbd_pipe_methods ohci_root_ctrl_methods = { 278 ohci_root_ctrl_transfer, 279 ohci_root_ctrl_start, 280 ohci_root_ctrl_abort, 281 ohci_root_ctrl_close, 282 ohci_noop, 283 ohci_root_ctrl_done, 284 }; 285 286 static struct usbd_pipe_methods ohci_root_intr_methods = { 287 ohci_root_intr_transfer, 288 ohci_root_intr_start, 289 ohci_root_intr_abort, 290 ohci_root_intr_close, 291 ohci_noop, 292 ohci_root_intr_done, 293 }; 294 295 static struct usbd_pipe_methods ohci_device_ctrl_methods = { 296 ohci_device_ctrl_transfer, 297 ohci_device_ctrl_start, 298 ohci_device_ctrl_abort, 299 ohci_device_ctrl_close, 300 ohci_noop, 301 ohci_device_ctrl_done, 302 }; 303 304 static struct usbd_pipe_methods ohci_device_intr_methods = { 305 ohci_device_intr_transfer, 306 ohci_device_intr_start, 307 ohci_device_intr_abort, 308 ohci_device_intr_close, 309 ohci_device_clear_toggle, 310 ohci_device_intr_done, 311 }; 312 313 static struct usbd_pipe_methods ohci_device_bulk_methods = { 314 ohci_device_bulk_transfer, 315 ohci_device_bulk_start, 316 ohci_device_bulk_abort, 317 ohci_device_bulk_close, 318 ohci_device_clear_toggle, 319 ohci_device_bulk_done, 320 }; 321 322 static struct usbd_pipe_methods ohci_device_isoc_methods = { 323 ohci_device_isoc_transfer, 324 ohci_device_isoc_start, 325 ohci_device_isoc_abort, 326 ohci_device_isoc_close, 327 ohci_noop, 328 ohci_device_isoc_done, 329 }; 330 331 #if defined(__NetBSD__) || defined(__OpenBSD__) 332 int 333 ohci_activate(self, act) 334 device_ptr_t self; 335 enum devact act; 336 { 337 struct ohci_softc *sc = (struct ohci_softc *)self; 338 int rv = 0; 339 340 switch (act) { 341 case DVACT_ACTIVATE: 342 return (EOPNOTSUPP); 343 break; 344 345 case DVACT_DEACTIVATE: 346 if (sc->sc_child != NULL) 347 rv = config_deactivate(sc->sc_child); 348 break; 349 } 350 return (rv); 351 } 352 353 int 354 ohci_detach(sc, flags) 355 struct ohci_softc *sc; 356 int flags; 357 { 358 int rv = 0; 359 360 if (sc->sc_child != NULL) 361 rv = config_detach(sc->sc_child, flags); 362 363 if (rv != 0) 364 return (rv); 365 366 #if defined(__NetBSD__) || defined(__OpenBSD__) 367 powerhook_disestablish(sc->sc_powerhook); 368 shutdownhook_disestablish(sc->sc_shutdownhook); 369 #endif 370 371 /* free data structures XXX */ 372 373 return (rv); 374 } 375 #endif 376 377 ohci_soft_ed_t * 378 ohci_alloc_sed(sc) 379 ohci_softc_t *sc; 380 { 381 ohci_soft_ed_t *sed; 382 usbd_status err; 383 int i, offs; 384 usb_dma_t dma; 385 386 if (sc->sc_freeeds == NULL) { 387 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 388 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 389 OHCI_ED_ALIGN, &dma); 390 if (err) 391 return (0); 392 for(i = 0; i < OHCI_SED_CHUNK; i++) { 393 offs = i * OHCI_SED_SIZE; 394 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 395 sed->physaddr = DMAADDR(&dma) + offs; 396 sed->next = sc->sc_freeeds; 397 sc->sc_freeeds = sed; 398 } 399 } 400 sed = sc->sc_freeeds; 401 sc->sc_freeeds = sed->next; 402 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 403 sed->next = 0; 404 return (sed); 405 } 406 407 void 408 ohci_free_sed(sc, sed) 409 ohci_softc_t *sc; 410 ohci_soft_ed_t *sed; 411 { 412 sed->next = sc->sc_freeeds; 413 sc->sc_freeeds = sed; 414 } 415 416 ohci_soft_td_t * 417 ohci_alloc_std(sc) 418 ohci_softc_t *sc; 419 { 420 ohci_soft_td_t *std; 421 usbd_status err; 422 int i, offs; 423 usb_dma_t dma; 424 int s; 425 426 if (sc->sc_freetds == NULL) { 427 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 428 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 429 OHCI_TD_ALIGN, &dma); 430 if (err) 431 return (0); 432 s = splusb(); 433 for(i = 0; i < OHCI_STD_CHUNK; i++) { 434 offs = i * OHCI_STD_SIZE; 435 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 436 std->physaddr = DMAADDR(&dma) + offs; 437 std->nexttd = sc->sc_freetds; 438 sc->sc_freetds = std; 439 } 440 splx(s); 441 } 442 443 s = splusb(); 444 std = sc->sc_freetds; 445 sc->sc_freetds = std->nexttd; 446 memset(&std->td, 0, sizeof(ohci_td_t)); 447 std->nexttd = 0; 448 449 ohci_hash_add_td(sc, std); 450 splx(s); 451 452 return (std); 453 } 454 455 void 456 ohci_free_std(sc, std) 457 ohci_softc_t *sc; 458 ohci_soft_td_t *std; 459 { 460 int s; 461 462 s = splusb(); 463 ohci_hash_rem_td(sc, std); 464 465 std->nexttd = sc->sc_freetds; 466 sc->sc_freetds = std; 467 splx(s); 468 } 469 470 usbd_status 471 ohci_alloc_std_chain(opipe, sc, alen, rd, xfer, sp, ep) 472 struct ohci_pipe *opipe; 473 ohci_softc_t *sc; 474 int alen, rd; 475 usbd_xfer_handle xfer; 476 ohci_soft_td_t *sp, **ep; 477 { 478 ohci_soft_td_t *next, *cur; 479 ohci_physaddr_t dataphys, dataphysend; 480 u_int32_t tdflags; 481 int len, curlen; 482 usb_dma_t *dma = &xfer->dmabuf; 483 u_int16_t flags = xfer->flags; 484 485 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 486 487 len = alen; 488 cur = sp; 489 dataphys = DMAADDR(dma); 490 dataphysend = OHCI_PAGE(dataphys + len - 1); 491 tdflags = htole32( 492 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 493 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 494 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 495 496 for (;;) { 497 next = ohci_alloc_std(sc); 498 if (next == NULL) 499 goto nomem; 500 501 /* The OHCI hardware can handle at most one page crossing. */ 502 if (OHCI_PAGE(dataphys) == dataphysend || 503 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 504 /* we can handle it in this TD */ 505 curlen = len; 506 } else { 507 /* must use multiple TDs, fill as much as possible. */ 508 curlen = 2 * OHCI_PAGE_SIZE - 509 (dataphys & (OHCI_PAGE_SIZE-1)); 510 /* the length must be a multiple of the max size */ 511 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 512 #ifdef DIAGNOSTIC 513 if (curlen == 0) 514 panic("ohci_alloc_std: curlen == 0\n"); 515 #endif 516 } 517 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 518 "dataphysend=0x%08x len=%d curlen=%d\n", 519 dataphys, dataphysend, 520 len, curlen)); 521 len -= curlen; 522 523 cur->td.td_flags = tdflags; 524 cur->td.td_cbp = htole32(dataphys); 525 cur->nexttd = next; 526 cur->td.td_nexttd = htole32(next->physaddr); 527 cur->td.td_be = htole32(dataphys + curlen - 1); 528 cur->len = curlen; 529 cur->flags = OHCI_ADD_LEN; 530 cur->xfer = xfer; 531 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 532 dataphys, dataphys + curlen - 1)); 533 if (len == 0) 534 break; 535 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 536 dataphys += curlen; 537 cur = next; 538 } 539 if ((flags & USBD_FORCE_SHORT_XFER) && 540 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 541 /* Force a 0 length transfer at the end. */ 542 543 cur = next; 544 next = ohci_alloc_std(sc); 545 if (next == NULL) 546 goto nomem; 547 548 cur->td.td_flags = tdflags; 549 cur->td.td_cbp = 0; /* indicate 0 length packet */ 550 cur->nexttd = next; 551 cur->td.td_nexttd = htole32(next->physaddr); 552 cur->td.td_be = ~0; 553 cur->len = 0; 554 cur->flags = 0; 555 cur->xfer = xfer; 556 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 557 } 558 *ep = cur; 559 560 return (USBD_NORMAL_COMPLETION); 561 562 nomem: 563 /* XXX free chain */ 564 return (USBD_NOMEM); 565 } 566 567 #if 0 568 static void 569 ohci_free_std_chain(sc, std, stdend) 570 ohci_softc_t *sc; 571 ohci_soft_td_t *std; 572 ohci_soft_td_t *stdend; 573 { 574 ohci_soft_td_t *p; 575 576 for (; std != stdend; std = p) { 577 p = std->nexttd; 578 ohci_free_std(sc, std); 579 } 580 } 581 #endif 582 583 ohci_soft_itd_t * 584 ohci_alloc_sitd(sc) 585 ohci_softc_t *sc; 586 { 587 ohci_soft_itd_t *sitd; 588 usbd_status err; 589 int i, offs; 590 usb_dma_t dma; 591 592 if (sc->sc_freeitds == NULL) { 593 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 594 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 595 OHCI_TD_ALIGN, &dma); 596 if (err) 597 return (0); 598 for(i = 0; i < OHCI_STD_CHUNK; i++) { 599 offs = i * OHCI_STD_SIZE; 600 sitd = (ohci_soft_itd_t *)((char*)KERNADDR(&dma)+offs); 601 sitd->physaddr = DMAADDR(&dma) + offs; 602 sitd->nextitd = sc->sc_freeitds; 603 sc->sc_freeitds = sitd; 604 } 605 } 606 sitd = sc->sc_freeitds; 607 sc->sc_freeitds = sitd->nextitd; 608 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 609 sitd->nextitd = 0; 610 return (sitd); 611 } 612 613 void 614 ohci_free_sitd(sc, sitd) 615 ohci_softc_t *sc; 616 ohci_soft_itd_t *sitd; 617 { 618 sitd->nextitd = sc->sc_freeitds; 619 sc->sc_freeitds = sitd; 620 } 621 622 usbd_status 623 ohci_init(sc) 624 ohci_softc_t *sc; 625 { 626 ohci_soft_ed_t *sed, *psed; 627 usbd_status err; 628 int i; 629 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 630 631 DPRINTF(("ohci_init: start\n")); 632 #if defined(__OpenBSD__) 633 printf(","); 634 #else 635 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 636 #endif 637 rev = OREAD4(sc, OHCI_REVISION); 638 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 639 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 640 641 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 642 printf("%s: unsupported OHCI revision\n", 643 USBDEVNAME(sc->sc_bus.bdev)); 644 sc->sc_bus.usbrev = USBREV_UNKNOWN; 645 return (USBD_INVAL); 646 } 647 sc->sc_bus.usbrev = USBREV_1_0; 648 649 for (i = 0; i < OHCI_HASH_SIZE; i++) 650 LIST_INIT(&sc->sc_hash_tds[i]); 651 652 SIMPLEQ_INIT(&sc->sc_free_xfers); 653 654 /* XXX determine alignment by R/W */ 655 /* Allocate the HCCA area. */ 656 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 657 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 658 if (err) 659 return (err); 660 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 661 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 662 663 sc->sc_eintrs = OHCI_NORMAL_INTRS; 664 665 /* Allocate dummy ED that starts the control list. */ 666 sc->sc_ctrl_head = ohci_alloc_sed(sc); 667 if (sc->sc_ctrl_head == NULL) { 668 err = USBD_NOMEM; 669 goto bad1; 670 } 671 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 672 673 /* Allocate dummy ED that starts the bulk list. */ 674 sc->sc_bulk_head = ohci_alloc_sed(sc); 675 if (sc->sc_bulk_head == NULL) { 676 err = USBD_NOMEM; 677 goto bad2; 678 } 679 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 680 681 /* Allocate dummy ED that starts the isochronous list. */ 682 sc->sc_isoc_head = ohci_alloc_sed(sc); 683 if (sc->sc_isoc_head == NULL) { 684 err = USBD_NOMEM; 685 goto bad3; 686 } 687 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 688 689 /* Allocate all the dummy EDs that make up the interrupt tree. */ 690 for (i = 0; i < OHCI_NO_EDS; i++) { 691 sed = ohci_alloc_sed(sc); 692 if (sed == NULL) { 693 while (--i >= 0) 694 ohci_free_sed(sc, sc->sc_eds[i]); 695 err = USBD_NOMEM; 696 goto bad4; 697 } 698 /* All ED fields are set to 0. */ 699 sc->sc_eds[i] = sed; 700 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 701 if (i != 0) 702 psed = sc->sc_eds[(i-1) / 2]; 703 else 704 psed= sc->sc_isoc_head; 705 sed->next = psed; 706 sed->ed.ed_nexted = htole32(psed->physaddr); 707 } 708 /* 709 * Fill HCCA interrupt table. The bit reversal is to get 710 * the tree set up properly to spread the interrupts. 711 */ 712 for (i = 0; i < OHCI_NO_INTRS; i++) 713 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 714 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 715 716 #ifdef OHCI_DEBUG 717 if (ohcidebug > 15) { 718 for (i = 0; i < OHCI_NO_EDS; i++) { 719 printf("ed#%d ", i); 720 ohci_dump_ed(sc->sc_eds[i]); 721 } 722 printf("iso "); 723 ohci_dump_ed(sc->sc_isoc_head); 724 } 725 #endif 726 727 /* Determine in what context we are running. */ 728 ctl = OREAD4(sc, OHCI_CONTROL); 729 if (ctl & OHCI_IR) { 730 /* SMM active, request change */ 731 DPRINTF(("ohci_init: SMM active, request owner change\n")); 732 s = OREAD4(sc, OHCI_COMMAND_STATUS); 733 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 734 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 735 usb_delay_ms(&sc->sc_bus, 1); 736 ctl = OREAD4(sc, OHCI_CONTROL); 737 } 738 if ((ctl & OHCI_IR) == 0) { 739 printf("%s: SMM does not respond, resetting\n", 740 USBDEVNAME(sc->sc_bus.bdev)); 741 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 742 goto reset; 743 } 744 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 745 /* BIOS started controller. */ 746 DPRINTF(("ohci_init: BIOS active\n")); 747 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 748 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 749 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 750 } 751 } else { 752 DPRINTF(("ohci_init: cold started\n")); 753 reset: 754 /* Controller was cold started. */ 755 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 756 } 757 758 /* 759 * This reset should not be necessary according to the OHCI spec, but 760 * without it some controllers do not start. 761 */ 762 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 763 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 764 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 765 766 /* We now own the host controller and the bus has been reset. */ 767 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 768 769 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 770 /* Nominal time for a reset is 10 us. */ 771 for (i = 0; i < 10; i++) { 772 delay(10); 773 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 774 if (!hcr) 775 break; 776 } 777 if (hcr) { 778 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 779 err = USBD_IOERROR; 780 goto bad5; 781 } 782 #ifdef OHCI_DEBUG 783 if (ohcidebug > 15) 784 ohci_dumpregs(sc); 785 #endif 786 787 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 788 789 /* Set up HC registers. */ 790 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 791 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 792 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 793 /* disable all interrupts and then switch on all desired interrupts */ 794 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 795 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 796 /* switch on desired functional features */ 797 ctl = OREAD4(sc, OHCI_CONTROL); 798 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 799 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 800 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 801 /* And finally start it! */ 802 OWRITE4(sc, OHCI_CONTROL, ctl); 803 804 /* 805 * The controller is now OPERATIONAL. Set a some final 806 * registers that should be set earlier, but that the 807 * controller ignores when in the SUSPEND state. 808 */ 809 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 810 fm |= OHCI_FSMPS(ival) | ival; 811 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 812 per = OHCI_PERIODIC(ival); /* 90% periodic */ 813 OWRITE4(sc, OHCI_PERIODIC_START, per); 814 815 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 816 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 817 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 818 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 819 usb_delay_ms(&sc->sc_bus, 5); 820 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 821 822 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 823 824 #ifdef OHCI_DEBUG 825 if (ohcidebug > 5) 826 ohci_dumpregs(sc); 827 #endif 828 829 /* Set up the bus struct. */ 830 sc->sc_bus.methods = &ohci_bus_methods; 831 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 832 833 #if defined(__NetBSD__) || defined(__OpenBSD__) 834 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 835 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 836 #endif 837 838 return (USBD_NORMAL_COMPLETION); 839 840 bad5: 841 for (i = 0; i < OHCI_NO_EDS; i++) 842 ohci_free_sed(sc, sc->sc_eds[i]); 843 bad4: 844 ohci_free_sed(sc, sc->sc_isoc_head); 845 bad3: 846 ohci_free_sed(sc, sc->sc_ctrl_head); 847 bad2: 848 ohci_free_sed(sc, sc->sc_bulk_head); 849 bad1: 850 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 851 return (err); 852 } 853 854 usbd_status 855 ohci_allocm(bus, dma, size) 856 struct usbd_bus *bus; 857 usb_dma_t *dma; 858 u_int32_t size; 859 { 860 #if defined(__NetBSD__) || defined(__OpenBSD__) 861 struct ohci_softc *sc = (struct ohci_softc *)bus; 862 #endif 863 864 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 865 } 866 867 void 868 ohci_freem(bus, dma) 869 struct usbd_bus *bus; 870 usb_dma_t *dma; 871 { 872 #if defined(__NetBSD__) || defined(__OpenBSD__) 873 struct ohci_softc *sc = (struct ohci_softc *)bus; 874 #endif 875 876 usb_freemem(&sc->sc_bus, dma); 877 } 878 879 usbd_xfer_handle 880 ohci_allocx(bus) 881 struct usbd_bus *bus; 882 { 883 struct ohci_softc *sc = (struct ohci_softc *)bus; 884 usbd_xfer_handle xfer; 885 886 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 887 if (xfer != NULL) 888 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 889 else 890 xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT); 891 if (xfer != NULL) 892 memset(xfer, 0, sizeof *xfer); 893 return (xfer); 894 } 895 896 void 897 ohci_freex(bus, xfer) 898 struct usbd_bus *bus; 899 usbd_xfer_handle xfer; 900 { 901 struct ohci_softc *sc = (struct ohci_softc *)bus; 902 903 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 904 } 905 906 /* 907 * Shut down the controller when the system is going down. 908 */ 909 void 910 ohci_shutdown(v) 911 void *v; 912 { 913 ohci_softc_t *sc = v; 914 915 DPRINTF(("ohci_shutdown: stopping the HC\n")); 916 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 917 } 918 919 /* 920 * Handle suspend/resume. 921 * 922 * We need to switch to polling mode here, because this routine is 923 * called from an intterupt context. This is all right since we 924 * are almost suspended anyway. 925 */ 926 void 927 ohci_power(why, v) 928 int why; 929 void *v; 930 { 931 #ifdef OHCI_DEBUG 932 ohci_softc_t *sc = v; 933 934 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 935 /* XXX should suspend/resume */ 936 ohci_dumpregs(sc); 937 #endif 938 } 939 940 #ifdef OHCI_DEBUG 941 void 942 ohci_dumpregs(sc) 943 ohci_softc_t *sc; 944 { 945 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 946 OREAD4(sc, OHCI_REVISION), 947 OREAD4(sc, OHCI_CONTROL), 948 OREAD4(sc, OHCI_COMMAND_STATUS))); 949 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 950 OREAD4(sc, OHCI_INTERRUPT_STATUS), 951 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 952 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 953 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 954 OREAD4(sc, OHCI_HCCA), 955 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 956 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 957 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 958 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 959 OREAD4(sc, OHCI_BULK_HEAD_ED), 960 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 961 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 962 OREAD4(sc, OHCI_DONE_HEAD), 963 OREAD4(sc, OHCI_FM_INTERVAL), 964 OREAD4(sc, OHCI_FM_REMAINING))); 965 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 966 OREAD4(sc, OHCI_FM_NUMBER), 967 OREAD4(sc, OHCI_PERIODIC_START), 968 OREAD4(sc, OHCI_LS_THRESHOLD))); 969 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 970 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 971 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 972 OREAD4(sc, OHCI_RH_STATUS))); 973 DPRINTF((" port1=0x%08x port2=0x%08x\n", 974 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 975 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 976 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 977 le32toh(sc->sc_hcca->hcca_frame_number), 978 le32toh(sc->sc_hcca->hcca_done_head))); 979 } 980 #endif 981 982 static int ohci_intr1 __P((ohci_softc_t *)); 983 984 int 985 ohci_intr(p) 986 void *p; 987 { 988 ohci_softc_t *sc = p; 989 990 /* If we get an interrupt while polling, then just ignore it. */ 991 if (sc->sc_bus.use_polling) { 992 #ifdef DIAGNOSTIC 993 printf("ohci_intr: ignored interrupt while polling\n"); 994 #endif 995 return (0); 996 } 997 998 return (ohci_intr1(sc)); 999 } 1000 1001 static int 1002 ohci_intr1(sc) 1003 ohci_softc_t *sc; 1004 { 1005 u_int32_t intrs, eintrs; 1006 ohci_physaddr_t done; 1007 1008 /* In case the interrupt occurs before initialization has completed. */ 1009 if (sc == NULL || sc->sc_hcca == NULL) { 1010 #ifdef DIAGNOSTIC 1011 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1012 #endif 1013 return (0); 1014 } 1015 1016 intrs = 0; 1017 done = le32toh(sc->sc_hcca->hcca_done_head); 1018 if (done != 0) { 1019 if (done & ~OHCI_DONE_INTRS) 1020 intrs = OHCI_WDH; 1021 if (done & OHCI_DONE_INTRS) 1022 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1023 } else 1024 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1025 1026 if (!intrs) 1027 return (0); 1028 1029 intrs &= ~OHCI_MIE; 1030 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1031 eintrs = intrs & sc->sc_eintrs; 1032 if (!eintrs) 1033 return (0); 1034 1035 sc->sc_bus.intr_context++; 1036 sc->sc_bus.no_intrs++; 1037 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1038 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1039 (u_int)eintrs)); 1040 1041 if (eintrs & OHCI_SO) { 1042 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev)); 1043 /* XXX do what */ 1044 intrs &= ~OHCI_SO; 1045 } 1046 if (eintrs & OHCI_WDH) { 1047 done &= ~OHCI_DONE_INTRS; 1048 if (sc->sc_done == 0) 1049 sc->sc_done = done; 1050 else { 1051 /* Tack on at the end of sc_done. */ 1052 ohci_physaddr_t ldone; 1053 ohci_soft_td_t *std; 1054 1055 for (ldone = sc->sc_done; ldone != 0; 1056 ldone = le32toh(std->td.td_nexttd)) 1057 std = ohci_hash_find_td(sc, ldone); 1058 std->td.td_nexttd = htole32(done); 1059 } 1060 sc->sc_hcca->hcca_done_head = 0; 1061 usb_schedsoftintr(&sc->sc_bus); 1062 intrs &= ~OHCI_WDH; 1063 } 1064 if (eintrs & OHCI_RD) { 1065 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1066 /* XXX process resume detect */ 1067 } 1068 if (eintrs & OHCI_UE) { 1069 printf("%s: unrecoverable error, controller halted\n", 1070 USBDEVNAME(sc->sc_bus.bdev)); 1071 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1072 /* XXX what else */ 1073 } 1074 if (eintrs & OHCI_RHSC) { 1075 ohci_rhsc(sc, sc->sc_intrxfer); 1076 intrs &= ~OHCI_RHSC; 1077 1078 /* 1079 * Disable RHSC interrupt for now, because it will be 1080 * on until the port has been reset. 1081 */ 1082 ohci_rhsc_able(sc, 0); 1083 } 1084 1085 sc->sc_bus.intr_context--; 1086 1087 /* Block unprocessed interrupts. XXX */ 1088 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 1089 sc->sc_eintrs &= ~intrs; 1090 1091 return (1); 1092 } 1093 1094 void 1095 ohci_rhsc_able(sc, on) 1096 ohci_softc_t *sc; 1097 int on; 1098 { 1099 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1100 if (on) { 1101 sc->sc_eintrs |= OHCI_RHSC; 1102 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1103 } else { 1104 sc->sc_eintrs &= ~OHCI_RHSC; 1105 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1106 } 1107 } 1108 1109 #ifdef OHCI_DEBUG 1110 char *ohci_cc_strs[] = { 1111 "NO_ERROR", 1112 "CRC", 1113 "BIT_STUFFING", 1114 "DATA_TOGGLE_MISMATCH", 1115 "STALL", 1116 "DEVICE_NOT_RESPONDING", 1117 "PID_CHECK_FAILURE", 1118 "UNEXPECTED_PID", 1119 "DATA_OVERRUN", 1120 "DATA_UNDERRUN", 1121 "BUFFER_OVERRUN", 1122 "BUFFER_UNDERRUN", 1123 "reserved", 1124 "reserved", 1125 "NOT_ACCESSED", 1126 "NOT_ACCESSED", 1127 }; 1128 #endif 1129 1130 void 1131 ohci_softintr(bus) 1132 struct usbd_bus *bus; 1133 { 1134 ohci_softc_t *sc = (ohci_softc_t *)bus; 1135 ohci_physaddr_t done; 1136 ohci_soft_td_t *std, *sdone, *stdnext; 1137 usbd_xfer_handle xfer; 1138 int len, cc, s; 1139 1140 sc->sc_bus.intr_context++; 1141 1142 s = splhardusb(); 1143 done = sc->sc_done; 1144 sc->sc_done = 0; 1145 splx(s); 1146 1147 DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done)); 1148 1149 /* Reverse the done list. */ 1150 for (sdone = NULL; done != 0; done = le32toh(std->td.td_nexttd)) { 1151 std = ohci_hash_find_td(sc, done); 1152 std->dnext = sdone; 1153 sdone = std; 1154 } 1155 1156 #ifdef OHCI_DEBUG 1157 if (ohcidebug > 10) { 1158 DPRINTF(("ohci_process_done: TD done:\n")); 1159 ohci_dump_tds(sdone); 1160 } 1161 #endif 1162 1163 for (std = sdone; std; std = stdnext) { 1164 xfer = std->xfer; 1165 stdnext = std->dnext; 1166 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1167 std, xfer, xfer ? xfer->hcpriv : 0)); 1168 if (xfer == NULL) { 1169 /* xfer == NULL: There seems to be no xfer associated 1170 * with this TD. It is tailp that happened to end up on 1171 * the done queue. 1172 */ 1173 continue; 1174 } 1175 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1176 usb_uncallout(xfer->timo_handle, ohci_timeout, xfer); 1177 if (xfer->status == USBD_CANCELLED || 1178 xfer->status == USBD_TIMEOUT) { 1179 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1180 xfer)); 1181 /* Handled by abort routine. */ 1182 } else if (cc == OHCI_CC_NO_ERROR) { 1183 len = std->len; 1184 if (std->td.td_cbp != 0) 1185 len -= le32toh(std->td.td_be) - 1186 le32toh(std->td.td_cbp) + 1; 1187 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", 1188 len, std->flags)); 1189 if (std->flags & OHCI_ADD_LEN) 1190 xfer->actlen += len; 1191 if (std->flags & OHCI_CALL_DONE) { 1192 xfer->status = USBD_NORMAL_COMPLETION; 1193 usb_transfer_complete(xfer); 1194 } 1195 ohci_free_std(sc, std); 1196 } else { 1197 /* 1198 * Endpoint is halted. First unlink all the TDs 1199 * belonging to the failed transfer, and then restart 1200 * the endpoint. 1201 */ 1202 ohci_soft_td_t *p, *n; 1203 struct ohci_pipe *opipe = 1204 (struct ohci_pipe *)xfer->pipe; 1205 1206 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1207 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1208 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1209 1210 /* remove TDs */ 1211 for (p = std; p->xfer == xfer; p = n) { 1212 n = p->nexttd; 1213 ohci_free_std(sc, p); 1214 } 1215 1216 /* clear halt */ 1217 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1218 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1219 1220 if (cc == OHCI_CC_STALL) 1221 xfer->status = USBD_STALLED; 1222 else 1223 xfer->status = USBD_IOERROR; 1224 usb_transfer_complete(xfer); 1225 } 1226 } 1227 1228 sc->sc_bus.intr_context--; 1229 } 1230 1231 void 1232 ohci_device_ctrl_done(xfer) 1233 usbd_xfer_handle xfer; 1234 { 1235 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1236 1237 #ifdef DIAGNOSTIC 1238 if (!(xfer->rqflags & URQ_REQUEST)) { 1239 panic("ohci_ctrl_done: not a request\n"); 1240 } 1241 #endif 1242 xfer->hcpriv = NULL; 1243 } 1244 1245 void 1246 ohci_device_intr_done(xfer) 1247 usbd_xfer_handle xfer; 1248 { 1249 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1250 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1251 ohci_soft_ed_t *sed = opipe->sed; 1252 ohci_soft_td_t *data, *tail; 1253 1254 1255 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1256 xfer, xfer->actlen)); 1257 1258 xfer->hcpriv = NULL; 1259 1260 if (xfer->pipe->repeat) { 1261 data = opipe->tail.td; 1262 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1263 if (tail == NULL) { 1264 xfer->status = USBD_NOMEM; 1265 return; 1266 } 1267 tail->xfer = NULL; 1268 1269 data->td.td_flags = htole32( 1270 OHCI_TD_IN | OHCI_TD_NOCC | 1271 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1272 if (xfer->flags & USBD_SHORT_XFER_OK) 1273 data->td.td_flags |= htole32(OHCI_TD_R); 1274 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 1275 data->nexttd = tail; 1276 data->td.td_nexttd = htole32(tail->physaddr); 1277 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1278 xfer->length - 1); 1279 data->len = xfer->length; 1280 data->xfer = xfer; 1281 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1282 xfer->hcpriv = data; 1283 xfer->actlen = 0; 1284 1285 sed->ed.ed_tailp = htole32(tail->physaddr); 1286 opipe->tail.td = tail; 1287 } 1288 } 1289 1290 void 1291 ohci_device_bulk_done(xfer) 1292 usbd_xfer_handle xfer; 1293 { 1294 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1295 xfer, xfer->actlen)); 1296 1297 xfer->hcpriv = NULL; 1298 } 1299 1300 void 1301 ohci_rhsc(sc, xfer) 1302 ohci_softc_t *sc; 1303 usbd_xfer_handle xfer; 1304 { 1305 usbd_pipe_handle pipe; 1306 struct ohci_pipe *opipe; 1307 u_char *p; 1308 int i, m; 1309 int hstatus; 1310 1311 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1312 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1313 sc, xfer, hstatus)); 1314 1315 if (xfer == NULL) { 1316 /* Just ignore the change. */ 1317 return; 1318 } 1319 1320 pipe = xfer->pipe; 1321 opipe = (struct ohci_pipe *)pipe; 1322 1323 p = KERNADDR(&xfer->dmabuf); 1324 m = min(sc->sc_noport, xfer->length * 8 - 1); 1325 memset(p, 0, xfer->length); 1326 for (i = 1; i <= m; i++) { 1327 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1328 p[i/8] |= 1 << (i%8); 1329 } 1330 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1331 xfer->actlen = xfer->length; 1332 xfer->status = USBD_NORMAL_COMPLETION; 1333 1334 usb_transfer_complete(xfer); 1335 } 1336 1337 void 1338 ohci_root_intr_done(xfer) 1339 usbd_xfer_handle xfer; 1340 { 1341 xfer->hcpriv = NULL; 1342 } 1343 1344 void 1345 ohci_root_ctrl_done(xfer) 1346 usbd_xfer_handle xfer; 1347 { 1348 xfer->hcpriv = NULL; 1349 } 1350 1351 /* 1352 * Wait here until controller claims to have an interrupt. 1353 * Then call ohci_intr and return. Use timeout to avoid waiting 1354 * too long. 1355 */ 1356 void 1357 ohci_waitintr(sc, xfer) 1358 ohci_softc_t *sc; 1359 usbd_xfer_handle xfer; 1360 { 1361 int timo = xfer->timeout; 1362 int usecs; 1363 u_int32_t intrs; 1364 1365 xfer->status = USBD_IN_PROGRESS; 1366 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1367 usb_delay_ms(&sc->sc_bus, 1); 1368 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1369 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1370 #ifdef OHCI_DEBUG 1371 if (ohcidebug > 15) 1372 ohci_dumpregs(sc); 1373 #endif 1374 if (intrs) { 1375 ohci_intr1(sc); 1376 if (xfer->status != USBD_IN_PROGRESS) 1377 return; 1378 } 1379 } 1380 1381 /* Timeout */ 1382 DPRINTF(("ohci_waitintr: timeout\n")); 1383 xfer->status = USBD_TIMEOUT; 1384 usb_transfer_complete(xfer); 1385 /* XXX should free TD */ 1386 } 1387 1388 void 1389 ohci_poll(bus) 1390 struct usbd_bus *bus; 1391 { 1392 ohci_softc_t *sc = (ohci_softc_t *)bus; 1393 1394 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1395 ohci_intr1(sc); 1396 } 1397 1398 usbd_status 1399 ohci_device_request(xfer) 1400 usbd_xfer_handle xfer; 1401 { 1402 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1403 usb_device_request_t *req = &xfer->request; 1404 usbd_device_handle dev = opipe->pipe.device; 1405 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1406 int addr = dev->address; 1407 ohci_soft_td_t *setup, *stat, *next, *tail; 1408 ohci_soft_ed_t *sed; 1409 int isread; 1410 int len; 1411 usbd_status err; 1412 int s; 1413 1414 isread = req->bmRequestType & UT_READ; 1415 len = UGETW(req->wLength); 1416 1417 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1418 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1419 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1420 UGETW(req->wIndex), len, addr, 1421 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1422 1423 setup = opipe->tail.td; 1424 stat = ohci_alloc_std(sc); 1425 if (stat == NULL) { 1426 err = USBD_NOMEM; 1427 goto bad1; 1428 } 1429 tail = ohci_alloc_std(sc); 1430 if (tail == NULL) { 1431 err = USBD_NOMEM; 1432 goto bad2; 1433 } 1434 tail->xfer = NULL; 1435 1436 sed = opipe->sed; 1437 opipe->u.ctl.length = len; 1438 1439 /* Update device address and length since they may have changed. */ 1440 /* XXX This only needs to be done once, but it's too early in open. */ 1441 /* XXXX Should not touch ED here! */ 1442 sed->ed.ed_flags = htole32( 1443 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1444 OHCI_ED_SET_FA(addr) | 1445 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1446 1447 next = stat; 1448 1449 /* Set up data transaction */ 1450 if (len != 0) { 1451 ohci_soft_td_t *std = stat; 1452 1453 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1454 std, &stat); 1455 stat = stat->nexttd; /* point at free TD */ 1456 if (err) 1457 goto bad3; 1458 /* Start toggle at 1 and then use the carried toggle. */ 1459 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1460 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1461 } 1462 1463 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1464 1465 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1466 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1467 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma)); 1468 setup->nexttd = next; 1469 setup->td.td_nexttd = htole32(next->physaddr); 1470 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1471 setup->len = 0; 1472 setup->xfer = xfer; 1473 setup->flags = 0; 1474 xfer->hcpriv = setup; 1475 1476 stat->td.td_flags = htole32( 1477 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1478 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1479 stat->td.td_cbp = 0; 1480 stat->nexttd = tail; 1481 stat->td.td_nexttd = htole32(tail->physaddr); 1482 stat->td.td_be = 0; 1483 stat->flags = OHCI_CALL_DONE; 1484 stat->len = 0; 1485 stat->xfer = xfer; 1486 1487 #ifdef OHCI_DEBUG 1488 if (ohcidebug > 5) { 1489 DPRINTF(("ohci_device_request:\n")); 1490 ohci_dump_ed(sed); 1491 ohci_dump_tds(setup); 1492 } 1493 #endif 1494 1495 /* Insert ED in schedule */ 1496 s = splusb(); 1497 sed->ed.ed_tailp = htole32(tail->physaddr); 1498 opipe->tail.td = tail; 1499 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1500 if (xfer->timeout && !sc->sc_bus.use_polling) { 1501 usb_callout(xfer->timo_handle, MS_TO_TICKS(xfer->timeout), 1502 ohci_timeout, xfer); 1503 } 1504 splx(s); 1505 1506 #if 0 1507 if (ohcidebug > 10) { 1508 delay(10000); 1509 DPRINTF(("ohci_device_request: status=%x\n", 1510 OREAD4(sc, OHCI_COMMAND_STATUS))); 1511 ohci_dump_ed(sed); 1512 ohci_dump_tds(setup); 1513 } 1514 #endif 1515 1516 return (USBD_NORMAL_COMPLETION); 1517 1518 bad3: 1519 ohci_free_std(sc, tail); 1520 bad2: 1521 ohci_free_std(sc, stat); 1522 bad1: 1523 return (err); 1524 } 1525 1526 /* 1527 * Add an ED to the schedule. Called at splusb(). 1528 */ 1529 void 1530 ohci_add_ed(sed, head) 1531 ohci_soft_ed_t *sed; 1532 ohci_soft_ed_t *head; 1533 { 1534 SPLUSBCHECK; 1535 sed->next = head->next; 1536 sed->ed.ed_nexted = head->ed.ed_nexted; 1537 head->next = sed; 1538 head->ed.ed_nexted = htole32(sed->physaddr); 1539 } 1540 1541 /* 1542 * Remove an ED from the schedule. Called at splusb(). 1543 */ 1544 void 1545 ohci_rem_ed(sed, head) 1546 ohci_soft_ed_t *sed; 1547 ohci_soft_ed_t *head; 1548 { 1549 ohci_soft_ed_t *p; 1550 1551 SPLUSBCHECK; 1552 1553 /* XXX */ 1554 for (p = head; p == NULL && p->next != sed; p = p->next) 1555 ; 1556 if (p == NULL) 1557 panic("ohci_rem_ed: ED not found\n"); 1558 p->next = sed->next; 1559 p->ed.ed_nexted = sed->ed.ed_nexted; 1560 } 1561 1562 /* 1563 * When a transfer is completed the TD is added to the done queue by 1564 * the host controller. This queue is the processed by software. 1565 * Unfortunately the queue contains the physical address of the TD 1566 * and we have no simple way to translate this back to a kernel address. 1567 * To make the translation possible (and fast) we use a hash table of 1568 * TDs currently in the schedule. The physical address is used as the 1569 * hash value. 1570 */ 1571 1572 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1573 /* Called at splusb() */ 1574 void 1575 ohci_hash_add_td(sc, std) 1576 ohci_softc_t *sc; 1577 ohci_soft_td_t *std; 1578 { 1579 int h = HASH(std->physaddr); 1580 1581 SPLUSBCHECK; 1582 1583 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1584 } 1585 1586 /* Called at splusb() */ 1587 void 1588 ohci_hash_rem_td(sc, std) 1589 ohci_softc_t *sc; 1590 ohci_soft_td_t *std; 1591 { 1592 SPLUSBCHECK; 1593 1594 LIST_REMOVE(std, hnext); 1595 } 1596 1597 ohci_soft_td_t * 1598 ohci_hash_find_td(sc, a) 1599 ohci_softc_t *sc; 1600 ohci_physaddr_t a; 1601 { 1602 int h = HASH(a); 1603 ohci_soft_td_t *std; 1604 1605 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1606 std != NULL; 1607 std = LIST_NEXT(std, hnext)) 1608 if (std->physaddr == a) 1609 return (std); 1610 panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a); 1611 } 1612 1613 void 1614 ohci_timeout(addr) 1615 void *addr; 1616 { 1617 usbd_xfer_handle xfer = addr; 1618 int s; 1619 1620 DPRINTF(("ohci_timeout: xfer=%p\n", xfer)); 1621 1622 s = splusb(); 1623 xfer->device->bus->intr_context++; 1624 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1625 xfer->device->bus->intr_context--; 1626 splx(s); 1627 } 1628 1629 #ifdef OHCI_DEBUG 1630 void 1631 ohci_dump_tds(std) 1632 ohci_soft_td_t *std; 1633 { 1634 for (; std; std = std->nexttd) 1635 ohci_dump_td(std); 1636 } 1637 1638 void 1639 ohci_dump_td(std) 1640 ohci_soft_td_t *std; 1641 { 1642 DPRINTF(("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1643 "nexttd=0x%08lx be=0x%08lx\n", 1644 std, (u_long)std->physaddr, 1645 (int)le32toh(std->td.td_flags), 1646 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1647 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1648 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1649 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1650 (u_long)le32toh(std->td.td_cbp), 1651 (u_long)le32toh(std->td.td_nexttd), 1652 (u_long)le32toh(std->td.td_be))); 1653 } 1654 1655 void 1656 ohci_dump_ed(sed) 1657 ohci_soft_ed_t *sed; 1658 { 1659 DPRINTF(("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx " 1660 "headflags=%b headp=0x%08lx nexted=0x%08lx\n", 1661 sed, (u_long)sed->physaddr, 1662 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1663 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1664 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), 1665 (int)le32toh(sed->ed.ed_flags), 1666 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1667 (u_long)le32toh(sed->ed.ed_tailp), 1668 (u_long)le32toh(sed->ed.ed_headp), 1669 "\20\1HALT\2CARRY", 1670 (u_long)le32toh(sed->ed.ed_headp), 1671 (u_long)le32toh(sed->ed.ed_nexted))); 1672 } 1673 #endif 1674 1675 usbd_status 1676 ohci_open(pipe) 1677 usbd_pipe_handle pipe; 1678 { 1679 usbd_device_handle dev = pipe->device; 1680 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1681 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1682 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1683 u_int8_t addr = dev->address; 1684 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1685 ohci_soft_ed_t *sed; 1686 ohci_soft_td_t *std; 1687 ohci_soft_itd_t *sitd; 1688 ohci_physaddr_t tdphys; 1689 u_int32_t fmt; 1690 usbd_status err; 1691 int s; 1692 int ival; 1693 1694 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1695 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1696 if (addr == sc->sc_addr) { 1697 switch (ed->bEndpointAddress) { 1698 case USB_CONTROL_ENDPOINT: 1699 pipe->methods = &ohci_root_ctrl_methods; 1700 break; 1701 case UE_DIR_IN | OHCI_INTR_ENDPT: 1702 pipe->methods = &ohci_root_intr_methods; 1703 break; 1704 default: 1705 return (USBD_INVAL); 1706 } 1707 } else { 1708 sed = ohci_alloc_sed(sc); 1709 if (sed == NULL) 1710 goto bad0; 1711 opipe->sed = sed; 1712 if (xfertype == UE_ISOCHRONOUS) { 1713 sitd = ohci_alloc_sitd(sc); 1714 if (sitd == NULL) { 1715 ohci_free_sitd(sc, sitd); 1716 goto bad1; 1717 } 1718 opipe->tail.itd = sitd; 1719 tdphys = sitd->physaddr; 1720 fmt = OHCI_ED_FORMAT_ISO; 1721 } else { 1722 std = ohci_alloc_std(sc); 1723 if (std == NULL) { 1724 ohci_free_std(sc, std); 1725 goto bad1; 1726 } 1727 opipe->tail.td = std; 1728 tdphys = std->physaddr; 1729 fmt = OHCI_ED_FORMAT_GEN; 1730 } 1731 sed->ed.ed_flags = htole32( 1732 OHCI_ED_SET_FA(addr) | 1733 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1734 OHCI_ED_DIR_TD | 1735 (dev->lowspeed ? OHCI_ED_SPEED : 0) | fmt | 1736 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1737 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 1738 1739 switch (xfertype) { 1740 case UE_CONTROL: 1741 pipe->methods = &ohci_device_ctrl_methods; 1742 err = usb_allocmem(&sc->sc_bus, 1743 sizeof(usb_device_request_t), 1744 0, &opipe->u.ctl.reqdma); 1745 if (err) 1746 goto bad; 1747 s = splusb(); 1748 ohci_add_ed(sed, sc->sc_ctrl_head); 1749 splx(s); 1750 break; 1751 case UE_INTERRUPT: 1752 pipe->methods = &ohci_device_intr_methods; 1753 ival = pipe->interval; 1754 if (ival == USBD_DEFAULT_INTERVAL) 1755 ival = ed->bInterval; 1756 return (ohci_device_setintr(sc, opipe, ival)); 1757 case UE_ISOCHRONOUS: 1758 pipe->methods = &ohci_device_isoc_methods; 1759 return (ohci_setup_isoc(pipe)); 1760 case UE_BULK: 1761 pipe->methods = &ohci_device_bulk_methods; 1762 s = splusb(); 1763 ohci_add_ed(sed, sc->sc_bulk_head); 1764 splx(s); 1765 break; 1766 } 1767 } 1768 return (USBD_NORMAL_COMPLETION); 1769 1770 bad: 1771 ohci_free_std(sc, std); 1772 bad1: 1773 ohci_free_sed(sc, sed); 1774 bad0: 1775 return (USBD_NOMEM); 1776 1777 } 1778 1779 /* 1780 * Close a reqular pipe. 1781 * Assumes that there are no pending transactions. 1782 */ 1783 void 1784 ohci_close_pipe(pipe, head) 1785 usbd_pipe_handle pipe; 1786 ohci_soft_ed_t *head; 1787 { 1788 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1789 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1790 ohci_soft_ed_t *sed = opipe->sed; 1791 int s; 1792 1793 s = splusb(); 1794 #ifdef DIAGNOSTIC 1795 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 1796 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 1797 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 1798 ohci_physaddr_t td = le32toh(sed->ed.ed_headp); 1799 ohci_soft_td_t *std; 1800 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]); 1801 std != NULL; 1802 std = LIST_NEXT(std, hnext)) 1803 if (std->physaddr == td) 1804 break; 1805 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 1806 "tl=0x%x pipe=%p, std=%p\n", sed, 1807 (int)le32toh(sed->ed.ed_headp), 1808 (int)le32toh(sed->ed.ed_tailp), 1809 pipe, std); 1810 usb_delay_ms(&sc->sc_bus, 2); 1811 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 1812 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 1813 printf("ohci_close_pipe: pipe still not empty\n"); 1814 } 1815 #endif 1816 ohci_rem_ed(sed, head); 1817 splx(s); 1818 ohci_free_sed(sc, opipe->sed); 1819 } 1820 1821 /* 1822 * Abort a device request. 1823 * If this routine is called at splusb() it guarantees that the request 1824 * will be removed from the hardware scheduling and that the callback 1825 * for it will be called with USBD_CANCELLED status. 1826 * It's impossible to guarantee that the requested transfer will not 1827 * have happened since the hardware runs concurrently. 1828 * If the transaction has already happened we rely on the ordinary 1829 * interrupt processing to process it. 1830 */ 1831 void 1832 ohci_abort_xfer(xfer, status) 1833 usbd_xfer_handle xfer; 1834 usbd_status status; 1835 { 1836 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1837 ohci_soft_ed_t *sed; 1838 1839 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p\n", xfer, opipe)); 1840 1841 xfer->status = status; 1842 1843 usb_uncallout(xfer->timo_handle, ohci_timeout, xfer); 1844 1845 sed = opipe->sed; 1846 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 1847 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 1848 1849 #if 1 1850 if (xfer->device->bus->intr_context) { 1851 /* We have no process context, so we can't use tsleep(). */ 1852 usb_callout(xfer->abort_handle, hz / USB_FRAMES_PER_SECOND, 1853 ohci_abort_xfer_end, xfer); 1854 } else { 1855 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 1856 KASSERT(intr_nesting_level == 0, 1857 ("ohci_abort_req in interrupt context")); 1858 #endif 1859 usb_delay_ms(opipe->pipe.device->bus, 1); 1860 ohci_abort_xfer_end(xfer); 1861 } 1862 #else 1863 delay(1000); 1864 ohci_abort_xfer_end(xfer); 1865 #endif 1866 } 1867 1868 void 1869 ohci_abort_xfer_end(v) 1870 void *v; 1871 { 1872 usbd_xfer_handle xfer = v; 1873 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1874 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1875 ohci_soft_ed_t *sed; 1876 ohci_soft_td_t *p, *n; 1877 int s; 1878 1879 s = splusb(); 1880 1881 p = xfer->hcpriv; 1882 #ifdef DIAGNOSTIC 1883 if (p == NULL) { 1884 printf("ohci_abort_xfer: hcpriv==0\n"); 1885 return; 1886 } 1887 #endif 1888 for (; p->xfer == xfer; p = n) { 1889 n = p->nexttd; 1890 ohci_free_std(sc, p); 1891 } 1892 1893 sed = opipe->sed; 1894 DPRINTFN(2,("ohci_abort_xfer: set hd=%x, tl=%x\n", 1895 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 1896 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 1897 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 1898 1899 usb_transfer_complete(xfer); 1900 1901 splx(s); 1902 } 1903 1904 /* 1905 * Data structures and routines to emulate the root hub. 1906 */ 1907 static usb_device_descriptor_t ohci_devd = { 1908 USB_DEVICE_DESCRIPTOR_SIZE, 1909 UDESC_DEVICE, /* type */ 1910 {0x00, 0x01}, /* USB version */ 1911 UDCLASS_HUB, /* class */ 1912 UDSUBCLASS_HUB, /* subclass */ 1913 0, /* protocol */ 1914 64, /* max packet */ 1915 {0},{0},{0x00,0x01}, /* device id */ 1916 1,2,0, /* string indicies */ 1917 1 /* # of configurations */ 1918 }; 1919 1920 static usb_config_descriptor_t ohci_confd = { 1921 USB_CONFIG_DESCRIPTOR_SIZE, 1922 UDESC_CONFIG, 1923 {USB_CONFIG_DESCRIPTOR_SIZE + 1924 USB_INTERFACE_DESCRIPTOR_SIZE + 1925 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1926 1, 1927 1, 1928 0, 1929 UC_SELF_POWERED, 1930 0 /* max power */ 1931 }; 1932 1933 static usb_interface_descriptor_t ohci_ifcd = { 1934 USB_INTERFACE_DESCRIPTOR_SIZE, 1935 UDESC_INTERFACE, 1936 0, 1937 0, 1938 1, 1939 UICLASS_HUB, 1940 UISUBCLASS_HUB, 1941 0, 1942 0 1943 }; 1944 1945 static usb_endpoint_descriptor_t ohci_endpd = { 1946 USB_ENDPOINT_DESCRIPTOR_SIZE, 1947 UDESC_ENDPOINT, 1948 UE_DIR_IN | OHCI_INTR_ENDPT, 1949 UE_INTERRUPT, 1950 {8, 0}, /* max packet */ 1951 255 1952 }; 1953 1954 static usb_hub_descriptor_t ohci_hubd = { 1955 USB_HUB_DESCRIPTOR_SIZE, 1956 UDESC_HUB, 1957 0, 1958 {0,0}, 1959 0, 1960 0, 1961 {0}, 1962 }; 1963 1964 static int 1965 ohci_str(p, l, s) 1966 usb_string_descriptor_t *p; 1967 int l; 1968 char *s; 1969 { 1970 int i; 1971 1972 if (l == 0) 1973 return (0); 1974 p->bLength = 2 * strlen(s) + 2; 1975 if (l == 1) 1976 return (1); 1977 p->bDescriptorType = UDESC_STRING; 1978 l -= 2; 1979 for (i = 0; s[i] && l > 1; i++, l -= 2) 1980 USETW2(p->bString[i], 0, s[i]); 1981 return (2*i+2); 1982 } 1983 1984 /* 1985 * Simulate a hardware hub by handling all the necessary requests. 1986 */ 1987 static usbd_status 1988 ohci_root_ctrl_transfer(xfer) 1989 usbd_xfer_handle xfer; 1990 { 1991 usbd_status err; 1992 1993 /* Insert last in queue. */ 1994 err = usb_insert_transfer(xfer); 1995 if (err) 1996 return (err); 1997 1998 /* Pipe isn't running, start first */ 1999 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2000 } 2001 2002 static usbd_status 2003 ohci_root_ctrl_start(xfer) 2004 usbd_xfer_handle xfer; 2005 { 2006 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2007 usb_device_request_t *req; 2008 void *buf = NULL; 2009 int port, i; 2010 int s, len, value, index, l, totlen = 0; 2011 usb_port_status_t ps; 2012 usb_hub_descriptor_t hubd; 2013 usbd_status err; 2014 u_int32_t v; 2015 2016 #ifdef DIAGNOSTIC 2017 if (!(xfer->rqflags & URQ_REQUEST)) 2018 /* XXX panic */ 2019 return (USBD_INVAL); 2020 #endif 2021 req = &xfer->request; 2022 2023 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2024 req->bmRequestType, req->bRequest)); 2025 2026 len = UGETW(req->wLength); 2027 value = UGETW(req->wValue); 2028 index = UGETW(req->wIndex); 2029 2030 if (len != 0) 2031 buf = KERNADDR(&xfer->dmabuf); 2032 2033 #define C(x,y) ((x) | ((y) << 8)) 2034 switch(C(req->bRequest, req->bmRequestType)) { 2035 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2036 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2037 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2038 /* 2039 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2040 * for the integrated root hub. 2041 */ 2042 break; 2043 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2044 if (len > 0) { 2045 *(u_int8_t *)buf = sc->sc_conf; 2046 totlen = 1; 2047 } 2048 break; 2049 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2050 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2051 switch(value >> 8) { 2052 case UDESC_DEVICE: 2053 if ((value & 0xff) != 0) { 2054 err = USBD_IOERROR; 2055 goto ret; 2056 } 2057 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2058 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2059 memcpy(buf, &ohci_devd, l); 2060 break; 2061 case UDESC_CONFIG: 2062 if ((value & 0xff) != 0) { 2063 err = USBD_IOERROR; 2064 goto ret; 2065 } 2066 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2067 memcpy(buf, &ohci_confd, l); 2068 buf = (char *)buf + l; 2069 len -= l; 2070 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2071 totlen += l; 2072 memcpy(buf, &ohci_ifcd, l); 2073 buf = (char *)buf + l; 2074 len -= l; 2075 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2076 totlen += l; 2077 memcpy(buf, &ohci_endpd, l); 2078 break; 2079 case UDESC_STRING: 2080 if (len == 0) 2081 break; 2082 *(u_int8_t *)buf = 0; 2083 totlen = 1; 2084 switch (value & 0xff) { 2085 case 1: /* Vendor */ 2086 totlen = ohci_str(buf, len, sc->sc_vendor); 2087 break; 2088 case 2: /* Product */ 2089 totlen = ohci_str(buf, len, "OHCI root hub"); 2090 break; 2091 } 2092 break; 2093 default: 2094 err = USBD_IOERROR; 2095 goto ret; 2096 } 2097 break; 2098 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2099 if (len > 0) { 2100 *(u_int8_t *)buf = 0; 2101 totlen = 1; 2102 } 2103 break; 2104 case C(UR_GET_STATUS, UT_READ_DEVICE): 2105 if (len > 1) { 2106 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2107 totlen = 2; 2108 } 2109 break; 2110 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2111 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2112 if (len > 1) { 2113 USETW(((usb_status_t *)buf)->wStatus, 0); 2114 totlen = 2; 2115 } 2116 break; 2117 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2118 if (value >= USB_MAX_DEVICES) { 2119 err = USBD_IOERROR; 2120 goto ret; 2121 } 2122 sc->sc_addr = value; 2123 break; 2124 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2125 if (value != 0 && value != 1) { 2126 err = USBD_IOERROR; 2127 goto ret; 2128 } 2129 sc->sc_conf = value; 2130 break; 2131 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2132 break; 2133 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2134 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2135 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2136 err = USBD_IOERROR; 2137 goto ret; 2138 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2139 break; 2140 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2141 break; 2142 /* Hub requests */ 2143 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2144 break; 2145 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2146 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2147 "port=%d feature=%d\n", 2148 index, value)); 2149 if (index < 1 || index > sc->sc_noport) { 2150 err = USBD_IOERROR; 2151 goto ret; 2152 } 2153 port = OHCI_RH_PORT_STATUS(index); 2154 switch(value) { 2155 case UHF_PORT_ENABLE: 2156 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2157 break; 2158 case UHF_PORT_SUSPEND: 2159 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2160 break; 2161 case UHF_PORT_POWER: 2162 OWRITE4(sc, port, UPS_LOW_SPEED); 2163 break; 2164 case UHF_C_PORT_CONNECTION: 2165 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2166 break; 2167 case UHF_C_PORT_ENABLE: 2168 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2169 break; 2170 case UHF_C_PORT_SUSPEND: 2171 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2172 break; 2173 case UHF_C_PORT_OVER_CURRENT: 2174 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2175 break; 2176 case UHF_C_PORT_RESET: 2177 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2178 break; 2179 default: 2180 err = USBD_IOERROR; 2181 goto ret; 2182 } 2183 switch(value) { 2184 case UHF_C_PORT_CONNECTION: 2185 case UHF_C_PORT_ENABLE: 2186 case UHF_C_PORT_SUSPEND: 2187 case UHF_C_PORT_OVER_CURRENT: 2188 case UHF_C_PORT_RESET: 2189 /* Enable RHSC interrupt if condition is cleared. */ 2190 if ((OREAD4(sc, port) >> 16) == 0) 2191 ohci_rhsc_able(sc, 1); 2192 break; 2193 default: 2194 break; 2195 } 2196 break; 2197 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2198 if (value != 0) { 2199 err = USBD_IOERROR; 2200 goto ret; 2201 } 2202 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2203 hubd = ohci_hubd; 2204 hubd.bNbrPorts = sc->sc_noport; 2205 USETW(hubd.wHubCharacteristics, 2206 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2207 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2208 /* XXX overcurrent */ 2209 ); 2210 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2211 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2212 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2213 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2214 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2215 l = min(len, hubd.bDescLength); 2216 totlen = l; 2217 memcpy(buf, &hubd, l); 2218 break; 2219 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2220 if (len != 4) { 2221 err = USBD_IOERROR; 2222 goto ret; 2223 } 2224 memset(buf, 0, len); /* ? XXX */ 2225 totlen = len; 2226 break; 2227 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2228 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2229 index)); 2230 if (index < 1 || index > sc->sc_noport) { 2231 err = USBD_IOERROR; 2232 goto ret; 2233 } 2234 if (len != 4) { 2235 err = USBD_IOERROR; 2236 goto ret; 2237 } 2238 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2239 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2240 v)); 2241 USETW(ps.wPortStatus, v); 2242 USETW(ps.wPortChange, v >> 16); 2243 l = min(len, sizeof ps); 2244 memcpy(buf, &ps, l); 2245 totlen = l; 2246 break; 2247 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2248 err = USBD_IOERROR; 2249 goto ret; 2250 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2251 break; 2252 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2253 if (index < 1 || index > sc->sc_noport) { 2254 err = USBD_IOERROR; 2255 goto ret; 2256 } 2257 port = OHCI_RH_PORT_STATUS(index); 2258 switch(value) { 2259 case UHF_PORT_ENABLE: 2260 OWRITE4(sc, port, UPS_PORT_ENABLED); 2261 break; 2262 case UHF_PORT_SUSPEND: 2263 OWRITE4(sc, port, UPS_SUSPEND); 2264 break; 2265 case UHF_PORT_RESET: 2266 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2267 index)); 2268 OWRITE4(sc, port, UPS_RESET); 2269 for (i = 0; i < 10; i++) { 2270 usb_delay_ms(&sc->sc_bus, 10); 2271 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2272 break; 2273 } 2274 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2275 index, OREAD4(sc, port))); 2276 break; 2277 case UHF_PORT_POWER: 2278 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2279 "%d\n", index)); 2280 OWRITE4(sc, port, UPS_PORT_POWER); 2281 break; 2282 default: 2283 err = USBD_IOERROR; 2284 goto ret; 2285 } 2286 break; 2287 default: 2288 err = USBD_IOERROR; 2289 goto ret; 2290 } 2291 xfer->actlen = totlen; 2292 err = USBD_NORMAL_COMPLETION; 2293 ret: 2294 xfer->status = err; 2295 s = splusb(); 2296 usb_transfer_complete(xfer); 2297 splx(s); 2298 return (USBD_IN_PROGRESS); 2299 } 2300 2301 /* Abort a root control request. */ 2302 static void 2303 ohci_root_ctrl_abort(xfer) 2304 usbd_xfer_handle xfer; 2305 { 2306 /* Nothing to do, all transfers are synchronous. */ 2307 } 2308 2309 /* Close the root pipe. */ 2310 static void 2311 ohci_root_ctrl_close(pipe) 2312 usbd_pipe_handle pipe; 2313 { 2314 DPRINTF(("ohci_root_ctrl_close\n")); 2315 /* Nothing to do. */ 2316 } 2317 2318 static usbd_status 2319 ohci_root_intr_transfer(xfer) 2320 usbd_xfer_handle xfer; 2321 { 2322 usbd_status err; 2323 2324 /* Insert last in queue. */ 2325 err = usb_insert_transfer(xfer); 2326 if (err) 2327 return (err); 2328 2329 /* Pipe isn't running, start first */ 2330 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2331 } 2332 2333 static usbd_status 2334 ohci_root_intr_start(xfer) 2335 usbd_xfer_handle xfer; 2336 { 2337 usbd_pipe_handle pipe = xfer->pipe; 2338 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2339 2340 sc->sc_intrxfer = xfer; 2341 2342 return (USBD_IN_PROGRESS); 2343 } 2344 2345 /* Abort a root interrupt request. */ 2346 static void 2347 ohci_root_intr_abort(xfer) 2348 usbd_xfer_handle xfer; 2349 { 2350 int s; 2351 2352 if (xfer->pipe->intrxfer == xfer) { 2353 DPRINTF(("ohci_root_intr_abort: remove\n")); 2354 xfer->pipe->intrxfer = NULL; 2355 } 2356 xfer->status = USBD_CANCELLED; 2357 s = splusb(); 2358 usb_transfer_complete(xfer); 2359 splx(s); 2360 } 2361 2362 /* Close the root pipe. */ 2363 static void 2364 ohci_root_intr_close(pipe) 2365 usbd_pipe_handle pipe; 2366 { 2367 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2368 2369 DPRINTF(("ohci_root_intr_close\n")); 2370 2371 sc->sc_intrxfer = NULL; 2372 } 2373 2374 /************************/ 2375 2376 static usbd_status 2377 ohci_device_ctrl_transfer(xfer) 2378 usbd_xfer_handle xfer; 2379 { 2380 usbd_status err; 2381 2382 /* Insert last in queue. */ 2383 err = usb_insert_transfer(xfer); 2384 if (err) 2385 return (err); 2386 2387 /* Pipe isn't running, start first */ 2388 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2389 } 2390 2391 static usbd_status 2392 ohci_device_ctrl_start(xfer) 2393 usbd_xfer_handle xfer; 2394 { 2395 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2396 usbd_status err; 2397 2398 #ifdef DIAGNOSTIC 2399 if (!(xfer->rqflags & URQ_REQUEST)) { 2400 /* XXX panic */ 2401 printf("ohci_device_ctrl_transfer: not a request\n"); 2402 return (USBD_INVAL); 2403 } 2404 #endif 2405 2406 err = ohci_device_request(xfer); 2407 if (err) 2408 return (err); 2409 2410 if (sc->sc_bus.use_polling) 2411 ohci_waitintr(sc, xfer); 2412 return (USBD_IN_PROGRESS); 2413 } 2414 2415 /* Abort a device control request. */ 2416 static void 2417 ohci_device_ctrl_abort(xfer) 2418 usbd_xfer_handle xfer; 2419 { 2420 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2421 ohci_abort_xfer(xfer, USBD_CANCELLED); 2422 } 2423 2424 /* Close a device control pipe. */ 2425 static void 2426 ohci_device_ctrl_close(pipe) 2427 usbd_pipe_handle pipe; 2428 { 2429 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2430 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2431 2432 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2433 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2434 ohci_free_std(sc, opipe->tail.td); 2435 } 2436 2437 /************************/ 2438 2439 static void 2440 ohci_device_clear_toggle(pipe) 2441 usbd_pipe_handle pipe; 2442 { 2443 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2444 2445 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2446 } 2447 2448 static void 2449 ohci_noop(pipe) 2450 usbd_pipe_handle pipe; 2451 { 2452 } 2453 2454 static usbd_status 2455 ohci_device_bulk_transfer(xfer) 2456 usbd_xfer_handle xfer; 2457 { 2458 usbd_status err; 2459 2460 /* Insert last in queue. */ 2461 err = usb_insert_transfer(xfer); 2462 if (err) 2463 return (err); 2464 2465 /* Pipe isn't running, start first */ 2466 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2467 } 2468 2469 static usbd_status 2470 ohci_device_bulk_start(xfer) 2471 usbd_xfer_handle xfer; 2472 { 2473 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2474 usbd_device_handle dev = opipe->pipe.device; 2475 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2476 int addr = dev->address; 2477 ohci_soft_td_t *data, *tail, *tdp; 2478 ohci_soft_ed_t *sed; 2479 int s, len, isread, endpt; 2480 usbd_status err; 2481 2482 #ifdef DIAGNOSTIC 2483 if (xfer->rqflags & URQ_REQUEST) { 2484 /* XXX panic */ 2485 printf("ohci_device_bulk_start: a request\n"); 2486 return (USBD_INVAL); 2487 } 2488 #endif 2489 2490 len = xfer->length; 2491 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2492 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2493 sed = opipe->sed; 2494 2495 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2496 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2497 endpt)); 2498 2499 opipe->u.bulk.isread = isread; 2500 opipe->u.bulk.length = len; 2501 2502 /* Update device address */ 2503 sed->ed.ed_flags = htole32( 2504 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2505 OHCI_ED_SET_FA(addr)); 2506 2507 /* Allocate a chain of new TDs (including a new tail). */ 2508 data = opipe->tail.td; 2509 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2510 data, &tail); 2511 /* We want interrupt at the end of the transfer. */ 2512 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2513 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2514 tail->flags |= OHCI_CALL_DONE; 2515 tail = tail->nexttd; /* point at sentinel */ 2516 if (err) 2517 return (err); 2518 2519 tail->xfer = NULL; 2520 xfer->hcpriv = data; 2521 2522 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2523 "td_cbp=0x%08x td_be=0x%08x\n", 2524 (int)le32toh(sed->ed.ed_flags), 2525 (int)le32toh(data->td.td_flags), 2526 (int)le32toh(data->td.td_cbp), 2527 (int)le32toh(data->td.td_be))); 2528 2529 #ifdef OHCI_DEBUG 2530 if (ohcidebug > 5) { 2531 ohci_dump_ed(sed); 2532 ohci_dump_tds(data); 2533 } 2534 #endif 2535 2536 /* Insert ED in schedule */ 2537 s = splusb(); 2538 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2539 tdp->xfer = xfer; 2540 } 2541 sed->ed.ed_tailp = htole32(tail->physaddr); 2542 opipe->tail.td = tail; 2543 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2544 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2545 if (xfer->timeout && !sc->sc_bus.use_polling) { 2546 usb_callout(xfer->timo_handle, MS_TO_TICKS(xfer->timeout), 2547 ohci_timeout, xfer); 2548 } 2549 2550 #if 0 2551 /* This goes wrong if we are too slow. */ 2552 if (ohcidebug > 10) { 2553 delay(10000); 2554 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2555 OREAD4(sc, OHCI_COMMAND_STATUS))); 2556 ohci_dump_ed(sed); 2557 ohci_dump_tds(data); 2558 } 2559 #endif 2560 2561 splx(s); 2562 2563 return (USBD_IN_PROGRESS); 2564 } 2565 2566 static void 2567 ohci_device_bulk_abort(xfer) 2568 usbd_xfer_handle xfer; 2569 { 2570 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2571 ohci_abort_xfer(xfer, USBD_CANCELLED); 2572 } 2573 2574 /* 2575 * Close a device bulk pipe. 2576 */ 2577 static void 2578 ohci_device_bulk_close(pipe) 2579 usbd_pipe_handle pipe; 2580 { 2581 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2582 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2583 2584 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2585 ohci_close_pipe(pipe, sc->sc_bulk_head); 2586 ohci_free_std(sc, opipe->tail.td); 2587 } 2588 2589 /************************/ 2590 2591 static usbd_status 2592 ohci_device_intr_transfer(xfer) 2593 usbd_xfer_handle xfer; 2594 { 2595 usbd_status err; 2596 2597 /* Insert last in queue. */ 2598 err = usb_insert_transfer(xfer); 2599 if (err) 2600 return (err); 2601 2602 /* Pipe isn't running, start first */ 2603 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2604 } 2605 2606 static usbd_status 2607 ohci_device_intr_start(xfer) 2608 usbd_xfer_handle xfer; 2609 { 2610 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2611 usbd_device_handle dev = opipe->pipe.device; 2612 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2613 ohci_soft_ed_t *sed = opipe->sed; 2614 ohci_soft_td_t *data, *tail; 2615 int len; 2616 int s; 2617 2618 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2619 "flags=%d priv=%p\n", 2620 xfer, xfer->length, xfer->flags, xfer->priv)); 2621 2622 #ifdef DIAGNOSTIC 2623 if (xfer->rqflags & URQ_REQUEST) 2624 panic("ohci_device_intr_transfer: a request\n"); 2625 #endif 2626 2627 len = xfer->length; 2628 2629 data = opipe->tail.td; 2630 tail = ohci_alloc_std(sc); 2631 if (tail == NULL) 2632 return (USBD_NOMEM); 2633 tail->xfer = NULL; 2634 2635 data->td.td_flags = htole32( 2636 OHCI_TD_IN | OHCI_TD_NOCC | 2637 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2638 if (xfer->flags & USBD_SHORT_XFER_OK) 2639 data->td.td_flags |= htole32(OHCI_TD_R); 2640 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 2641 data->nexttd = tail; 2642 data->td.td_nexttd = htole32(tail->physaddr); 2643 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 2644 data->len = len; 2645 data->xfer = xfer; 2646 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2647 xfer->hcpriv = data; 2648 2649 #ifdef OHCI_DEBUG 2650 if (ohcidebug > 5) { 2651 DPRINTF(("ohci_device_intr_transfer:\n")); 2652 ohci_dump_ed(sed); 2653 ohci_dump_tds(data); 2654 } 2655 #endif 2656 2657 /* Insert ED in schedule */ 2658 s = splusb(); 2659 sed->ed.ed_tailp = htole32(tail->physaddr); 2660 opipe->tail.td = tail; 2661 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2662 2663 #if 0 2664 /* 2665 * This goes horribly wrong, printing thousands of descriptors, 2666 * because false references are followed due to the fact that the 2667 * TD is gone. 2668 */ 2669 if (ohcidebug > 5) { 2670 usb_delay_ms(&sc->sc_bus, 5); 2671 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2672 OREAD4(sc, OHCI_COMMAND_STATUS))); 2673 ohci_dump_ed(sed); 2674 ohci_dump_tds(data); 2675 } 2676 #endif 2677 splx(s); 2678 2679 return (USBD_IN_PROGRESS); 2680 } 2681 2682 /* Abort a device control request. */ 2683 static void 2684 ohci_device_intr_abort(xfer) 2685 usbd_xfer_handle xfer; 2686 { 2687 if (xfer->pipe->intrxfer == xfer) { 2688 DPRINTF(("ohci_device_intr_abort: remove\n")); 2689 xfer->pipe->intrxfer = NULL; 2690 } 2691 ohci_abort_xfer(xfer, USBD_CANCELLED); 2692 } 2693 2694 /* Close a device interrupt pipe. */ 2695 static void 2696 ohci_device_intr_close(pipe) 2697 usbd_pipe_handle pipe; 2698 { 2699 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2700 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2701 int nslots = opipe->u.intr.nslots; 2702 int pos = opipe->u.intr.pos; 2703 int j; 2704 ohci_soft_ed_t *p, *sed = opipe->sed; 2705 int s; 2706 2707 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2708 pipe, nslots, pos)); 2709 s = splusb(); 2710 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2711 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2712 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2713 usb_delay_ms(&sc->sc_bus, 2); 2714 2715 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2716 ; 2717 #ifdef DIAGNOSTIC 2718 if (p == NULL) 2719 panic("ohci_device_intr_close: ED not found\n"); 2720 #endif 2721 p->next = sed->next; 2722 p->ed.ed_nexted = sed->ed.ed_nexted; 2723 splx(s); 2724 2725 for (j = 0; j < nslots; j++) 2726 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2727 2728 ohci_free_std(sc, opipe->tail.td); 2729 ohci_free_sed(sc, opipe->sed); 2730 } 2731 2732 static usbd_status 2733 ohci_device_setintr(sc, opipe, ival) 2734 ohci_softc_t *sc; 2735 struct ohci_pipe *opipe; 2736 int ival; 2737 { 2738 int i, j, s, best; 2739 u_int npoll, slow, shigh, nslots; 2740 u_int bestbw, bw; 2741 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2742 2743 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2744 if (ival == 0) { 2745 printf("ohci_setintr: 0 interval\n"); 2746 return (USBD_INVAL); 2747 } 2748 2749 npoll = OHCI_NO_INTRS; 2750 while (npoll > ival) 2751 npoll /= 2; 2752 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2753 2754 /* 2755 * We now know which level in the tree the ED must go into. 2756 * Figure out which slot has most bandwidth left over. 2757 * Slots to examine: 2758 * npoll 2759 * 1 0 2760 * 2 1 2 2761 * 4 3 4 5 6 2762 * 8 7 8 9 10 11 12 13 14 2763 * N (N-1) .. (N-1+N-1) 2764 */ 2765 slow = npoll-1; 2766 shigh = slow + npoll; 2767 nslots = OHCI_NO_INTRS / npoll; 2768 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2769 bw = 0; 2770 for (j = 0; j < nslots; j++) 2771 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 2772 if (bw < bestbw) { 2773 best = i; 2774 bestbw = bw; 2775 } 2776 } 2777 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2778 best, slow, shigh, bestbw)); 2779 2780 s = splusb(); 2781 hsed = sc->sc_eds[best]; 2782 sed->next = hsed->next; 2783 sed->ed.ed_nexted = hsed->ed.ed_nexted; 2784 hsed->next = sed; 2785 hsed->ed.ed_nexted = htole32(sed->physaddr); 2786 splx(s); 2787 2788 for (j = 0; j < nslots; j++) 2789 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 2790 opipe->u.intr.nslots = nslots; 2791 opipe->u.intr.pos = best; 2792 2793 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 2794 return (USBD_NORMAL_COMPLETION); 2795 } 2796 2797 /***********************/ 2798 2799 usbd_status 2800 ohci_device_isoc_transfer(xfer) 2801 usbd_xfer_handle xfer; 2802 { 2803 usbd_status err; 2804 2805 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 2806 2807 /* Put it on our queue, */ 2808 err = usb_insert_transfer(xfer); 2809 2810 /* bail out on error, */ 2811 if (err && err != USBD_IN_PROGRESS) 2812 return (err); 2813 2814 /* XXX should check inuse here */ 2815 2816 /* insert into schedule, */ 2817 ohci_device_isoc_enter(xfer); 2818 2819 /* and put on interrupt list if the pipe wasn't running */ 2820 if (!err) 2821 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2822 2823 return (err); 2824 } 2825 2826 void 2827 ohci_device_isoc_enter(xfer) 2828 usbd_xfer_handle xfer; 2829 { 2830 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2831 usbd_device_handle dev = opipe->pipe.device; 2832 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2833 ohci_soft_ed_t *sed = opipe->sed; 2834 struct iso *iso = &opipe->u.iso; 2835 ohci_soft_itd_t *sitd, *nsitd; 2836 ohci_physaddr_t buf, offs; 2837 int i, ncur, nframes; 2838 int ncross; 2839 int s; 2840 2841 s = splusb(); 2842 sitd = opipe->tail.itd; 2843 buf = DMAADDR(&xfer->dmabuf); 2844 sitd->itd.itd_bp0 = htole32(buf & OHCI_ITD_PAGE_MASK); 2845 nframes = xfer->nframes; 2846 offs = buf & OHCI_ITD_OFFSET_MASK; 2847 ncross = 0; 2848 for (i = ncur = 0; i < nframes; i++, ncur++) { 2849 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 2850 ncross > 1) { /* too many page crossings */ 2851 2852 nsitd = ohci_alloc_sitd(sc); 2853 if (nsitd == NULL) { 2854 /* XXX what now? */ 2855 return; 2856 } 2857 sitd->nextitd = nsitd; 2858 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 2859 sitd->itd.itd_flags = htole32( 2860 OHCI_ITD_NOCC | 2861 OHCI_ITD_SET_SF(iso->next) | 2862 OHCI_ITD_NOINTR | 2863 OHCI_ITD_SET_FC(OHCI_ITD_NOFFSET)); 2864 sitd->itd.itd_be = htole32( 2865 le32toh(sitd->itd.itd_bp0) + offs - 1); 2866 nsitd->itd.itd_bp0 = htole32( 2867 (buf + offs) & OHCI_ITD_PAGE_MASK); 2868 sitd = nsitd; 2869 iso->next = iso->next + ncur; 2870 ncur = 0; 2871 ncross = 0; 2872 } 2873 /* XXX byte order */ 2874 sitd->itd.itd_offset[i] = 2875 offs | (ncross == 1 ? OHCI_ITD_PAGE_SELECT : 0); 2876 offs += xfer->frlengths[i]; 2877 /* XXX update ncross */ 2878 } 2879 nsitd = ohci_alloc_sitd(sc); 2880 if (nsitd == NULL) { 2881 /* XXX what now? */ 2882 return; 2883 } 2884 sitd->nextitd = nsitd; 2885 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 2886 sitd->itd.itd_flags = le32toh( 2887 OHCI_ITD_NOCC | 2888 OHCI_ITD_SET_SF(iso->next) | 2889 OHCI_ITD_SET_DI(0) | 2890 OHCI_ITD_SET_FC(ncur)); 2891 sitd->itd.itd_be = htole32(le32toh(sitd->itd.itd_bp0) + offs - 1); 2892 iso->next = iso->next + ncur; 2893 2894 opipe->tail.itd = nsitd; 2895 sed->ed.ed_tailp = htole32(nsitd->physaddr); 2896 /* XXX update ED */ 2897 splx(s); 2898 } 2899 2900 usbd_status 2901 ohci_device_isoc_start(xfer) 2902 usbd_xfer_handle xfer; 2903 { 2904 printf("ohci_device_isoc_start: not implemented\n"); 2905 return (USBD_INVAL); 2906 } 2907 2908 void 2909 ohci_device_isoc_abort(xfer) 2910 usbd_xfer_handle xfer; 2911 { 2912 } 2913 2914 void 2915 ohci_device_isoc_done(xfer) 2916 usbd_xfer_handle xfer; 2917 { 2918 printf("ohci_device_isoc_done: not implemented\n"); 2919 } 2920 2921 usbd_status 2922 ohci_setup_isoc(pipe) 2923 usbd_pipe_handle pipe; 2924 { 2925 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2926 struct iso *iso = &opipe->u.iso; 2927 2928 iso->next = -1; 2929 iso->inuse = 0; 2930 2931 return (USBD_NORMAL_COMPLETION); 2932 } 2933 2934 void 2935 ohci_device_isoc_close(pipe) 2936 usbd_pipe_handle pipe; 2937 { 2938 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2939 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2940 2941 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 2942 ohci_close_pipe(pipe, sc->sc_isoc_head); 2943 ohci_free_sitd(sc, opipe->tail.itd); 2944 } 2945
Indexes created Tue Sep 23 21:09:50 GMT 2025