ohci.c revision 1.86
1 /* $NetBSD: ohci.c,v 1.86 2000/04/21 15:38:55 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (augustss (at) carlstedt.se) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe 45 * USB spec: http://www.usb.org/developers/data/usb11.pdf 46 */ 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/kernel.h> 53 #include <sys/device.h> 54 #include <sys/select.h> 55 #elif defined(__FreeBSD__) 56 #include <sys/module.h> 57 #include <sys/bus.h> 58 #include <machine/bus_pio.h> 59 #include <machine/bus_memio.h> 60 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 61 #include <machine/cpu.h> 62 #endif 63 #endif 64 #include <sys/proc.h> 65 #include <sys/queue.h> 66 67 #include <machine/bus.h> 68 #include <machine/endian.h> 69 70 #include <dev/usb/usb.h> 71 #include <dev/usb/usbdi.h> 72 #include <dev/usb/usbdivar.h> 73 #include <dev/usb/usb_mem.h> 74 #include <dev/usb/usb_quirks.h> 75 76 #include <dev/usb/ohcireg.h> 77 #include <dev/usb/ohcivar.h> 78 79 #if defined(__FreeBSD__) 80 #include <machine/clock.h> 81 82 #define delay(d) DELAY(d) 83 #endif 84 85 #if defined(__OpenBSD__) 86 struct cfdriver ohci_cd = { 87 NULL, "ohci", DV_DULL 88 }; 89 #endif 90 91 #ifdef OHCI_DEBUG 92 #define DPRINTF(x) if (ohcidebug) logprintf x 93 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 94 int ohcidebug = 0; 95 #else 96 #define DPRINTF(x) 97 #define DPRINTFN(n,x) 98 #endif 99 100 /* 101 * The OHCI controller is little endian, so on big endian machines 102 * the data strored in memory needs to be swapped. 103 */ 104 #if defined(__FreeBSD__) || defined(__OpenBSD__) 105 #if BYTE_ORDER == BIG_ENDIAN 106 #define htole32(x) (bswap32(x)) 107 #define le32toh(x) (bswap32(x)) 108 #else 109 #define htole32(x) (x) 110 #define le32toh(x) (x) 111 #endif 112 #endif 113 114 struct ohci_pipe; 115 116 Static ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *)); 117 Static void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *)); 118 119 Static ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *)); 120 Static void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *)); 121 122 Static ohci_soft_itd_t *ohci_alloc_sitd __P((ohci_softc_t *)); 123 Static void ohci_free_sitd __P((ohci_softc_t *,ohci_soft_itd_t *)); 124 125 #if 0 126 Static void ohci_free_std_chain __P((ohci_softc_t *, 127 ohci_soft_td_t *, ohci_soft_td_t *)); 128 #endif 129 Static usbd_status ohci_alloc_std_chain __P((struct ohci_pipe *, 130 ohci_softc_t *, int, int, usbd_xfer_handle, 131 ohci_soft_td_t *, ohci_soft_td_t **)); 132 133 Static void ohci_shutdown __P((void *v)); 134 Static void ohci_power __P((int, void *)); 135 Static usbd_status ohci_open __P((usbd_pipe_handle)); 136 Static void ohci_poll __P((struct usbd_bus *)); 137 Static void ohci_softintr __P((struct usbd_bus *)); 138 Static void ohci_waitintr __P((ohci_softc_t *, usbd_xfer_handle)); 139 Static void ohci_add_done __P((ohci_softc_t *, ohci_physaddr_t)); 140 Static void ohci_rhsc __P((ohci_softc_t *, usbd_xfer_handle)); 141 142 Static usbd_status ohci_device_request __P((usbd_xfer_handle xfer)); 143 Static void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 144 Static void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 145 Static void ohci_hash_add_td __P((ohci_softc_t *, 146 ohci_soft_td_t *)); 147 Static void ohci_hash_rem_td __P((ohci_softc_t *, 148 ohci_soft_td_t *)); 149 Static ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, 150 ohci_physaddr_t)); 151 Static void ohci_hash_add_itd __P((ohci_softc_t *, 152 ohci_soft_itd_t *)); 153 Static void ohci_hash_rem_itd __P((ohci_softc_t *, 154 ohci_soft_itd_t *)); 155 Static ohci_soft_itd_t *ohci_hash_find_itd __P((ohci_softc_t *, 156 ohci_physaddr_t)); 157 158 Static usbd_status ohci_setup_isoc __P((usbd_pipe_handle pipe)); 159 Static void ohci_device_isoc_enter __P((usbd_xfer_handle)); 160 161 Static usbd_status ohci_allocm __P((struct usbd_bus *, usb_dma_t *, 162 u_int32_t)); 163 Static void ohci_freem __P((struct usbd_bus *, usb_dma_t *)); 164 165 Static usbd_xfer_handle ohci_allocx __P((struct usbd_bus *)); 166 Static void ohci_freex __P((struct usbd_bus *, usbd_xfer_handle)); 167 168 Static usbd_status ohci_root_ctrl_transfer __P((usbd_xfer_handle)); 169 Static usbd_status ohci_root_ctrl_start __P((usbd_xfer_handle)); 170 Static void ohci_root_ctrl_abort __P((usbd_xfer_handle)); 171 Static void ohci_root_ctrl_close __P((usbd_pipe_handle)); 172 Static void ohci_root_ctrl_done __P((usbd_xfer_handle)); 173 174 Static usbd_status ohci_root_intr_transfer __P((usbd_xfer_handle)); 175 Static usbd_status ohci_root_intr_start __P((usbd_xfer_handle)); 176 Static void ohci_root_intr_abort __P((usbd_xfer_handle)); 177 Static void ohci_root_intr_close __P((usbd_pipe_handle)); 178 Static void ohci_root_intr_done __P((usbd_xfer_handle)); 179 180 Static usbd_status ohci_device_ctrl_transfer __P((usbd_xfer_handle)); 181 Static usbd_status ohci_device_ctrl_start __P((usbd_xfer_handle)); 182 Static void ohci_device_ctrl_abort __P((usbd_xfer_handle)); 183 Static void ohci_device_ctrl_close __P((usbd_pipe_handle)); 184 Static void ohci_device_ctrl_done __P((usbd_xfer_handle)); 185 186 Static usbd_status ohci_device_bulk_transfer __P((usbd_xfer_handle)); 187 Static usbd_status ohci_device_bulk_start __P((usbd_xfer_handle)); 188 Static void ohci_device_bulk_abort __P((usbd_xfer_handle)); 189 Static void ohci_device_bulk_close __P((usbd_pipe_handle)); 190 Static void ohci_device_bulk_done __P((usbd_xfer_handle)); 191 192 Static usbd_status ohci_device_intr_transfer __P((usbd_xfer_handle)); 193 Static usbd_status ohci_device_intr_start __P((usbd_xfer_handle)); 194 Static void ohci_device_intr_abort __P((usbd_xfer_handle)); 195 Static void ohci_device_intr_close __P((usbd_pipe_handle)); 196 Static void ohci_device_intr_done __P((usbd_xfer_handle)); 197 198 Static usbd_status ohci_device_isoc_transfer __P((usbd_xfer_handle)); 199 Static usbd_status ohci_device_isoc_start __P((usbd_xfer_handle)); 200 Static void ohci_device_isoc_abort __P((usbd_xfer_handle)); 201 Static void ohci_device_isoc_close __P((usbd_pipe_handle)); 202 Static void ohci_device_isoc_done __P((usbd_xfer_handle)); 203 204 Static usbd_status ohci_device_setintr __P((ohci_softc_t *sc, 205 struct ohci_pipe *pipe, int ival)); 206 207 Static int ohci_str __P((usb_string_descriptor_t *, int, char *)); 208 209 Static void ohci_timeout __P((void *)); 210 Static void ohci_rhsc_able __P((ohci_softc_t *, int)); 211 212 Static void ohci_close_pipe __P((usbd_pipe_handle pipe, 213 ohci_soft_ed_t *head)); 214 Static void ohci_abort_xfer __P((usbd_xfer_handle xfer, 215 usbd_status status)); 216 Static void ohci_abort_xfer_end __P((void *)); 217 218 Static void ohci_device_clear_toggle __P((usbd_pipe_handle pipe)); 219 Static void ohci_noop __P((usbd_pipe_handle pipe)); 220 221 #ifdef OHCI_DEBUG 222 Static void ohci_dumpregs __P((ohci_softc_t *)); 223 Static void ohci_dump_tds __P((ohci_soft_td_t *)); 224 Static void ohci_dump_td __P((ohci_soft_td_t *)); 225 Static void ohci_dump_ed __P((ohci_soft_ed_t *)); 226 Static void ohci_dump_itd __P((ohci_soft_itd_t *)); 227 Static void ohci_dump_itds __P((ohci_soft_itd_t *)); 228 #endif 229 230 #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 231 #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 232 #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 233 234 /* Reverse the bits in a value 0 .. 31 */ 235 Static u_int8_t revbits[OHCI_NO_INTRS] = 236 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 237 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 238 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 239 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 240 241 struct ohci_pipe { 242 struct usbd_pipe pipe; 243 ohci_soft_ed_t *sed; 244 union { 245 ohci_soft_td_t *td; 246 ohci_soft_itd_t *itd; 247 } tail; 248 /* Info needed for different pipe kinds. */ 249 union { 250 /* Control pipe */ 251 struct { 252 usb_dma_t reqdma; 253 u_int length; 254 ohci_soft_td_t *setup, *data, *stat; 255 } ctl; 256 /* Interrupt pipe */ 257 struct { 258 int nslots; 259 int pos; 260 } intr; 261 /* Bulk pipe */ 262 struct { 263 u_int length; 264 int isread; 265 } bulk; 266 /* Iso pipe */ 267 struct iso { 268 int next, inuse; 269 } iso; 270 } u; 271 }; 272 273 #define OHCI_INTR_ENDPT 1 274 275 Static struct usbd_bus_methods ohci_bus_methods = { 276 ohci_open, 277 ohci_softintr, 278 ohci_poll, 279 ohci_allocm, 280 ohci_freem, 281 ohci_allocx, 282 ohci_freex, 283 }; 284 285 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 286 ohci_root_ctrl_transfer, 287 ohci_root_ctrl_start, 288 ohci_root_ctrl_abort, 289 ohci_root_ctrl_close, 290 ohci_noop, 291 ohci_root_ctrl_done, 292 }; 293 294 Static struct usbd_pipe_methods ohci_root_intr_methods = { 295 ohci_root_intr_transfer, 296 ohci_root_intr_start, 297 ohci_root_intr_abort, 298 ohci_root_intr_close, 299 ohci_noop, 300 ohci_root_intr_done, 301 }; 302 303 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 304 ohci_device_ctrl_transfer, 305 ohci_device_ctrl_start, 306 ohci_device_ctrl_abort, 307 ohci_device_ctrl_close, 308 ohci_noop, 309 ohci_device_ctrl_done, 310 }; 311 312 Static struct usbd_pipe_methods ohci_device_intr_methods = { 313 ohci_device_intr_transfer, 314 ohci_device_intr_start, 315 ohci_device_intr_abort, 316 ohci_device_intr_close, 317 ohci_device_clear_toggle, 318 ohci_device_intr_done, 319 }; 320 321 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 322 ohci_device_bulk_transfer, 323 ohci_device_bulk_start, 324 ohci_device_bulk_abort, 325 ohci_device_bulk_close, 326 ohci_device_clear_toggle, 327 ohci_device_bulk_done, 328 }; 329 330 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 331 ohci_device_isoc_transfer, 332 ohci_device_isoc_start, 333 ohci_device_isoc_abort, 334 ohci_device_isoc_close, 335 ohci_noop, 336 ohci_device_isoc_done, 337 }; 338 339 #if defined(__NetBSD__) || defined(__OpenBSD__) 340 int 341 ohci_activate(self, act) 342 device_ptr_t self; 343 enum devact act; 344 { 345 struct ohci_softc *sc = (struct ohci_softc *)self; 346 int rv = 0; 347 348 switch (act) { 349 case DVACT_ACTIVATE: 350 return (EOPNOTSUPP); 351 break; 352 353 case DVACT_DEACTIVATE: 354 if (sc->sc_child != NULL) 355 rv = config_deactivate(sc->sc_child); 356 sc->sc_dying = 1; 357 break; 358 } 359 return (rv); 360 } 361 362 int 363 ohci_detach(sc, flags) 364 struct ohci_softc *sc; 365 int flags; 366 { 367 int rv = 0; 368 369 if (sc->sc_child != NULL) 370 rv = config_detach(sc->sc_child, flags); 371 372 if (rv != 0) 373 return (rv); 374 375 #if defined(__NetBSD__) || defined(__OpenBSD__) 376 powerhook_disestablish(sc->sc_powerhook); 377 shutdownhook_disestablish(sc->sc_shutdownhook); 378 #endif 379 380 /* free data structures XXX */ 381 382 return (rv); 383 } 384 #endif 385 386 ohci_soft_ed_t * 387 ohci_alloc_sed(sc) 388 ohci_softc_t *sc; 389 { 390 ohci_soft_ed_t *sed; 391 usbd_status err; 392 int i, offs; 393 usb_dma_t dma; 394 395 if (sc->sc_freeeds == NULL) { 396 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 397 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 398 OHCI_ED_ALIGN, &dma); 399 if (err) 400 return (0); 401 for(i = 0; i < OHCI_SED_CHUNK; i++) { 402 offs = i * OHCI_SED_SIZE; 403 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 404 sed->physaddr = DMAADDR(&dma) + offs; 405 sed->next = sc->sc_freeeds; 406 sc->sc_freeeds = sed; 407 } 408 } 409 sed = sc->sc_freeeds; 410 sc->sc_freeeds = sed->next; 411 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 412 sed->next = 0; 413 return (sed); 414 } 415 416 void 417 ohci_free_sed(sc, sed) 418 ohci_softc_t *sc; 419 ohci_soft_ed_t *sed; 420 { 421 sed->next = sc->sc_freeeds; 422 sc->sc_freeeds = sed; 423 } 424 425 ohci_soft_td_t * 426 ohci_alloc_std(sc) 427 ohci_softc_t *sc; 428 { 429 ohci_soft_td_t *std; 430 usbd_status err; 431 int i, offs; 432 usb_dma_t dma; 433 int s; 434 435 if (sc->sc_freetds == NULL) { 436 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 437 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 438 OHCI_TD_ALIGN, &dma); 439 if (err) 440 return (NULL); 441 s = splusb(); 442 for(i = 0; i < OHCI_STD_CHUNK; i++) { 443 offs = i * OHCI_STD_SIZE; 444 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 445 std->physaddr = DMAADDR(&dma) + offs; 446 std->nexttd = sc->sc_freetds; 447 sc->sc_freetds = std; 448 } 449 splx(s); 450 } 451 452 s = splusb(); 453 std = sc->sc_freetds; 454 sc->sc_freetds = std->nexttd; 455 memset(&std->td, 0, sizeof(ohci_td_t)); 456 std->nexttd = NULL; 457 std->xfer = NULL; 458 ohci_hash_add_td(sc, std); 459 splx(s); 460 461 return (std); 462 } 463 464 void 465 ohci_free_std(sc, std) 466 ohci_softc_t *sc; 467 ohci_soft_td_t *std; 468 { 469 int s; 470 471 s = splusb(); 472 ohci_hash_rem_td(sc, std); 473 std->nexttd = sc->sc_freetds; 474 sc->sc_freetds = std; 475 splx(s); 476 } 477 478 usbd_status 479 ohci_alloc_std_chain(opipe, sc, alen, rd, xfer, sp, ep) 480 struct ohci_pipe *opipe; 481 ohci_softc_t *sc; 482 int alen, rd; 483 usbd_xfer_handle xfer; 484 ohci_soft_td_t *sp, **ep; 485 { 486 ohci_soft_td_t *next, *cur; 487 ohci_physaddr_t dataphys, dataphysend; 488 u_int32_t tdflags; 489 int len, curlen; 490 usb_dma_t *dma = &xfer->dmabuf; 491 u_int16_t flags = xfer->flags; 492 493 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 494 495 len = alen; 496 cur = sp; 497 dataphys = DMAADDR(dma); 498 dataphysend = OHCI_PAGE(dataphys + len - 1); 499 tdflags = htole32( 500 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 501 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 502 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 503 504 for (;;) { 505 next = ohci_alloc_std(sc); 506 if (next == NULL) 507 goto nomem; 508 509 /* The OHCI hardware can handle at most one page crossing. */ 510 if (OHCI_PAGE(dataphys) == dataphysend || 511 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 512 /* we can handle it in this TD */ 513 curlen = len; 514 } else { 515 /* must use multiple TDs, fill as much as possible. */ 516 curlen = 2 * OHCI_PAGE_SIZE - 517 (dataphys & (OHCI_PAGE_SIZE-1)); 518 /* the length must be a multiple of the max size */ 519 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 520 #ifdef DIAGNOSTIC 521 if (curlen == 0) 522 panic("ohci_alloc_std: curlen == 0\n"); 523 #endif 524 } 525 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 526 "dataphysend=0x%08x len=%d curlen=%d\n", 527 dataphys, dataphysend, 528 len, curlen)); 529 len -= curlen; 530 531 cur->td.td_flags = tdflags; 532 cur->td.td_cbp = htole32(dataphys); 533 cur->nexttd = next; 534 cur->td.td_nexttd = htole32(next->physaddr); 535 cur->td.td_be = htole32(dataphys + curlen - 1); 536 cur->len = curlen; 537 cur->flags = OHCI_ADD_LEN; 538 cur->xfer = xfer; 539 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 540 dataphys, dataphys + curlen - 1)); 541 if (len == 0) 542 break; 543 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 544 dataphys += curlen; 545 cur = next; 546 } 547 if ((flags & USBD_FORCE_SHORT_XFER) && 548 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 549 /* Force a 0 length transfer at the end. */ 550 551 cur = next; 552 next = ohci_alloc_std(sc); 553 if (next == NULL) 554 goto nomem; 555 556 cur->td.td_flags = tdflags; 557 cur->td.td_cbp = 0; /* indicate 0 length packet */ 558 cur->nexttd = next; 559 cur->td.td_nexttd = htole32(next->physaddr); 560 cur->td.td_be = ~0; 561 cur->len = 0; 562 cur->flags = 0; 563 cur->xfer = xfer; 564 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 565 } 566 *ep = cur; 567 568 return (USBD_NORMAL_COMPLETION); 569 570 nomem: 571 /* XXX free chain */ 572 return (USBD_NOMEM); 573 } 574 575 #if 0 576 Static void 577 ohci_free_std_chain(sc, std, stdend) 578 ohci_softc_t *sc; 579 ohci_soft_td_t *std; 580 ohci_soft_td_t *stdend; 581 { 582 ohci_soft_td_t *p; 583 584 for (; std != stdend; std = p) { 585 p = std->nexttd; 586 ohci_free_std(sc, std); 587 } 588 } 589 #endif 590 591 ohci_soft_itd_t * 592 ohci_alloc_sitd(sc) 593 ohci_softc_t *sc; 594 { 595 ohci_soft_itd_t *sitd; 596 usbd_status err; 597 int i, s, offs; 598 usb_dma_t dma; 599 600 if (sc->sc_freeitds == NULL) { 601 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 602 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 603 OHCI_ITD_ALIGN, &dma); 604 if (err) 605 return (NULL); 606 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 607 offs = i * OHCI_SITD_SIZE; 608 sitd = (ohci_soft_itd_t *)((char*)KERNADDR(&dma)+offs); 609 sitd->physaddr = DMAADDR(&dma) + offs; 610 sitd->nextitd = sc->sc_freeitds; 611 sc->sc_freeitds = sitd; 612 } 613 } 614 615 s = splusb(); 616 sitd = sc->sc_freeitds; 617 sc->sc_freeitds = sitd->nextitd; 618 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 619 sitd->nextitd = NULL; 620 sitd->xfer = NULL; 621 ohci_hash_add_itd(sc, sitd); 622 splx(s); 623 624 #ifdef DIAGNOSTIC 625 sitd->isdone = 0; 626 #endif 627 628 return (sitd); 629 } 630 631 void 632 ohci_free_sitd(sc, sitd) 633 ohci_softc_t *sc; 634 ohci_soft_itd_t *sitd; 635 { 636 int s; 637 638 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 639 640 #ifdef DIAGNOSTIC 641 if (!sitd->isdone) { 642 panic("ohci_free_sitd: sitd=%p not done\n", sitd); 643 return; 644 } 645 #endif 646 647 s = splusb(); 648 ohci_hash_rem_itd(sc, sitd); 649 sitd->nextitd = sc->sc_freeitds; 650 sc->sc_freeitds = sitd; 651 splx(s); 652 } 653 654 usbd_status 655 ohci_init(sc) 656 ohci_softc_t *sc; 657 { 658 ohci_soft_ed_t *sed, *psed; 659 usbd_status err; 660 int i; 661 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 662 663 DPRINTF(("ohci_init: start\n")); 664 #if defined(__OpenBSD__) 665 printf(","); 666 #else 667 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 668 #endif 669 rev = OREAD4(sc, OHCI_REVISION); 670 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 671 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 672 673 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 674 printf("%s: unsupported OHCI revision\n", 675 USBDEVNAME(sc->sc_bus.bdev)); 676 sc->sc_bus.usbrev = USBREV_UNKNOWN; 677 return (USBD_INVAL); 678 } 679 sc->sc_bus.usbrev = USBREV_1_0; 680 681 for (i = 0; i < OHCI_HASH_SIZE; i++) 682 LIST_INIT(&sc->sc_hash_tds[i]); 683 for (i = 0; i < OHCI_HASH_SIZE; i++) 684 LIST_INIT(&sc->sc_hash_itds[i]); 685 686 SIMPLEQ_INIT(&sc->sc_free_xfers); 687 688 /* XXX determine alignment by R/W */ 689 /* Allocate the HCCA area. */ 690 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 691 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 692 if (err) 693 return (err); 694 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 695 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 696 697 sc->sc_eintrs = OHCI_NORMAL_INTRS; 698 699 /* Allocate dummy ED that starts the control list. */ 700 sc->sc_ctrl_head = ohci_alloc_sed(sc); 701 if (sc->sc_ctrl_head == NULL) { 702 err = USBD_NOMEM; 703 goto bad1; 704 } 705 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 706 707 /* Allocate dummy ED that starts the bulk list. */ 708 sc->sc_bulk_head = ohci_alloc_sed(sc); 709 if (sc->sc_bulk_head == NULL) { 710 err = USBD_NOMEM; 711 goto bad2; 712 } 713 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 714 715 /* Allocate dummy ED that starts the isochronous list. */ 716 sc->sc_isoc_head = ohci_alloc_sed(sc); 717 if (sc->sc_isoc_head == NULL) { 718 err = USBD_NOMEM; 719 goto bad3; 720 } 721 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 722 723 /* Allocate all the dummy EDs that make up the interrupt tree. */ 724 for (i = 0; i < OHCI_NO_EDS; i++) { 725 sed = ohci_alloc_sed(sc); 726 if (sed == NULL) { 727 while (--i >= 0) 728 ohci_free_sed(sc, sc->sc_eds[i]); 729 err = USBD_NOMEM; 730 goto bad4; 731 } 732 /* All ED fields are set to 0. */ 733 sc->sc_eds[i] = sed; 734 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 735 if (i != 0) 736 psed = sc->sc_eds[(i-1) / 2]; 737 else 738 psed= sc->sc_isoc_head; 739 sed->next = psed; 740 sed->ed.ed_nexted = htole32(psed->physaddr); 741 } 742 /* 743 * Fill HCCA interrupt table. The bit reversal is to get 744 * the tree set up properly to spread the interrupts. 745 */ 746 for (i = 0; i < OHCI_NO_INTRS; i++) 747 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 748 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 749 750 #ifdef OHCI_DEBUG 751 if (ohcidebug > 15) { 752 for (i = 0; i < OHCI_NO_EDS; i++) { 753 printf("ed#%d ", i); 754 ohci_dump_ed(sc->sc_eds[i]); 755 } 756 printf("iso "); 757 ohci_dump_ed(sc->sc_isoc_head); 758 } 759 #endif 760 761 /* Determine in what context we are running. */ 762 ctl = OREAD4(sc, OHCI_CONTROL); 763 if (ctl & OHCI_IR) { 764 /* SMM active, request change */ 765 DPRINTF(("ohci_init: SMM active, request owner change\n")); 766 s = OREAD4(sc, OHCI_COMMAND_STATUS); 767 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 768 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 769 usb_delay_ms(&sc->sc_bus, 1); 770 ctl = OREAD4(sc, OHCI_CONTROL); 771 } 772 if ((ctl & OHCI_IR) == 0) { 773 printf("%s: SMM does not respond, resetting\n", 774 USBDEVNAME(sc->sc_bus.bdev)); 775 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 776 goto reset; 777 } 778 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 779 /* BIOS started controller. */ 780 DPRINTF(("ohci_init: BIOS active\n")); 781 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 782 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 783 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 784 } 785 } else { 786 DPRINTF(("ohci_init: cold started\n")); 787 reset: 788 /* Controller was cold started. */ 789 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 790 } 791 792 /* 793 * This reset should not be necessary according to the OHCI spec, but 794 * without it some controllers do not start. 795 */ 796 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 797 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 798 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 799 800 /* We now own the host controller and the bus has been reset. */ 801 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 802 803 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 804 /* Nominal time for a reset is 10 us. */ 805 for (i = 0; i < 10; i++) { 806 delay(10); 807 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 808 if (!hcr) 809 break; 810 } 811 if (hcr) { 812 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 813 err = USBD_IOERROR; 814 goto bad5; 815 } 816 #ifdef OHCI_DEBUG 817 if (ohcidebug > 15) 818 ohci_dumpregs(sc); 819 #endif 820 821 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 822 823 /* Set up HC registers. */ 824 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 825 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 826 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 827 /* disable all interrupts and then switch on all desired interrupts */ 828 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 829 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 830 /* switch on desired functional features */ 831 ctl = OREAD4(sc, OHCI_CONTROL); 832 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 833 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 834 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 835 /* And finally start it! */ 836 OWRITE4(sc, OHCI_CONTROL, ctl); 837 838 /* 839 * The controller is now OPERATIONAL. Set a some final 840 * registers that should be set earlier, but that the 841 * controller ignores when in the SUSPEND state. 842 */ 843 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 844 fm |= OHCI_FSMPS(ival) | ival; 845 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 846 per = OHCI_PERIODIC(ival); /* 90% periodic */ 847 OWRITE4(sc, OHCI_PERIODIC_START, per); 848 849 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 850 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 851 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 852 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 853 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 854 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 855 856 /* 857 * The AMD756 requires a delay before re-reading the register, 858 * otherwise it will occasionally report 0 ports. 859 */ 860 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 861 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 862 863 #ifdef OHCI_DEBUG 864 if (ohcidebug > 5) 865 ohci_dumpregs(sc); 866 #endif 867 868 /* Set up the bus struct. */ 869 sc->sc_bus.methods = &ohci_bus_methods; 870 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 871 872 #if defined(__NetBSD__) || defined(__OpenBSD__) 873 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 874 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 875 #endif 876 877 return (USBD_NORMAL_COMPLETION); 878 879 bad5: 880 for (i = 0; i < OHCI_NO_EDS; i++) 881 ohci_free_sed(sc, sc->sc_eds[i]); 882 bad4: 883 ohci_free_sed(sc, sc->sc_isoc_head); 884 bad3: 885 ohci_free_sed(sc, sc->sc_ctrl_head); 886 bad2: 887 ohci_free_sed(sc, sc->sc_bulk_head); 888 bad1: 889 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 890 return (err); 891 } 892 893 usbd_status 894 ohci_allocm(bus, dma, size) 895 struct usbd_bus *bus; 896 usb_dma_t *dma; 897 u_int32_t size; 898 { 899 #if defined(__NetBSD__) || defined(__OpenBSD__) 900 struct ohci_softc *sc = (struct ohci_softc *)bus; 901 #endif 902 903 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 904 } 905 906 void 907 ohci_freem(bus, dma) 908 struct usbd_bus *bus; 909 usb_dma_t *dma; 910 { 911 #if defined(__NetBSD__) || defined(__OpenBSD__) 912 struct ohci_softc *sc = (struct ohci_softc *)bus; 913 #endif 914 915 usb_freemem(&sc->sc_bus, dma); 916 } 917 918 usbd_xfer_handle 919 ohci_allocx(bus) 920 struct usbd_bus *bus; 921 { 922 struct ohci_softc *sc = (struct ohci_softc *)bus; 923 usbd_xfer_handle xfer; 924 925 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 926 if (xfer != NULL) 927 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 928 else 929 xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT); 930 if (xfer != NULL) 931 memset(xfer, 0, sizeof *xfer); 932 return (xfer); 933 } 934 935 void 936 ohci_freex(bus, xfer) 937 struct usbd_bus *bus; 938 usbd_xfer_handle xfer; 939 { 940 struct ohci_softc *sc = (struct ohci_softc *)bus; 941 942 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 943 } 944 945 /* 946 * Shut down the controller when the system is going down. 947 */ 948 void 949 ohci_shutdown(v) 950 void *v; 951 { 952 ohci_softc_t *sc = v; 953 954 DPRINTF(("ohci_shutdown: stopping the HC\n")); 955 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 956 } 957 958 /* 959 * Handle suspend/resume. 960 * 961 * We need to switch to polling mode here, because this routine is 962 * called from an intterupt context. This is all right since we 963 * are almost suspended anyway. 964 */ 965 void 966 ohci_power(why, v) 967 int why; 968 void *v; 969 { 970 #ifdef OHCI_DEBUG 971 ohci_softc_t *sc = v; 972 973 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 974 /* XXX should suspend/resume */ 975 ohci_dumpregs(sc); 976 #endif 977 } 978 979 #ifdef OHCI_DEBUG 980 void 981 ohci_dumpregs(sc) 982 ohci_softc_t *sc; 983 { 984 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 985 OREAD4(sc, OHCI_REVISION), 986 OREAD4(sc, OHCI_CONTROL), 987 OREAD4(sc, OHCI_COMMAND_STATUS))); 988 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 989 OREAD4(sc, OHCI_INTERRUPT_STATUS), 990 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 991 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 992 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 993 OREAD4(sc, OHCI_HCCA), 994 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 995 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 996 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 997 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 998 OREAD4(sc, OHCI_BULK_HEAD_ED), 999 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1000 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1001 OREAD4(sc, OHCI_DONE_HEAD), 1002 OREAD4(sc, OHCI_FM_INTERVAL), 1003 OREAD4(sc, OHCI_FM_REMAINING))); 1004 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1005 OREAD4(sc, OHCI_FM_NUMBER), 1006 OREAD4(sc, OHCI_PERIODIC_START), 1007 OREAD4(sc, OHCI_LS_THRESHOLD))); 1008 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1009 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1010 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1011 OREAD4(sc, OHCI_RH_STATUS))); 1012 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1013 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1014 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1015 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1016 le32toh(sc->sc_hcca->hcca_frame_number), 1017 le32toh(sc->sc_hcca->hcca_done_head))); 1018 } 1019 #endif 1020 1021 Static int ohci_intr1 __P((ohci_softc_t *)); 1022 1023 int 1024 ohci_intr(p) 1025 void *p; 1026 { 1027 ohci_softc_t *sc = p; 1028 1029 /* If we get an interrupt while polling, then just ignore it. */ 1030 if (sc->sc_bus.use_polling) { 1031 #ifdef DIAGNOSTIC 1032 printf("ohci_intr: ignored interrupt while polling\n"); 1033 #endif 1034 return (0); 1035 } 1036 1037 return (ohci_intr1(sc)); 1038 } 1039 1040 Static int 1041 ohci_intr1(sc) 1042 ohci_softc_t *sc; 1043 { 1044 u_int32_t intrs, eintrs; 1045 ohci_physaddr_t done; 1046 1047 /* In case the interrupt occurs before initialization has completed. */ 1048 if (sc == NULL || sc->sc_hcca == NULL) { 1049 #ifdef DIAGNOSTIC 1050 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1051 #endif 1052 return (0); 1053 } 1054 1055 intrs = 0; 1056 done = le32toh(sc->sc_hcca->hcca_done_head); 1057 if (done != 0) { 1058 if (done & ~OHCI_DONE_INTRS) 1059 intrs = OHCI_WDH; 1060 if (done & OHCI_DONE_INTRS) 1061 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1062 } else 1063 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1064 1065 if (!intrs) 1066 return (0); 1067 1068 intrs &= ~OHCI_MIE; 1069 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1070 eintrs = intrs & sc->sc_eintrs; 1071 if (!eintrs) 1072 return (0); 1073 1074 sc->sc_bus.intr_context++; 1075 sc->sc_bus.no_intrs++; 1076 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1077 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1078 (u_int)eintrs)); 1079 1080 if (eintrs & OHCI_SO) { 1081 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev)); 1082 /* XXX do what */ 1083 intrs &= ~OHCI_SO; 1084 } 1085 if (eintrs & OHCI_WDH) { 1086 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1087 sc->sc_hcca->hcca_done_head = 0; 1088 usb_schedsoftintr(&sc->sc_bus); 1089 intrs &= ~OHCI_WDH; 1090 } 1091 if (eintrs & OHCI_RD) { 1092 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1093 /* XXX process resume detect */ 1094 } 1095 if (eintrs & OHCI_UE) { 1096 printf("%s: unrecoverable error, controller halted\n", 1097 USBDEVNAME(sc->sc_bus.bdev)); 1098 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1099 /* XXX what else */ 1100 } 1101 if (eintrs & OHCI_RHSC) { 1102 ohci_rhsc(sc, sc->sc_intrxfer); 1103 intrs &= ~OHCI_RHSC; 1104 1105 /* 1106 * Disable RHSC interrupt for now, because it will be 1107 * on until the port has been reset. 1108 */ 1109 ohci_rhsc_able(sc, 0); 1110 } 1111 1112 sc->sc_bus.intr_context--; 1113 1114 /* Block unprocessed interrupts. XXX */ 1115 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 1116 sc->sc_eintrs &= ~intrs; 1117 1118 return (1); 1119 } 1120 1121 void 1122 ohci_rhsc_able(sc, on) 1123 ohci_softc_t *sc; 1124 int on; 1125 { 1126 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1127 if (on) { 1128 sc->sc_eintrs |= OHCI_RHSC; 1129 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1130 } else { 1131 sc->sc_eintrs &= ~OHCI_RHSC; 1132 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1133 } 1134 } 1135 1136 #ifdef OHCI_DEBUG 1137 char *ohci_cc_strs[] = { 1138 "NO_ERROR", 1139 "CRC", 1140 "BIT_STUFFING", 1141 "DATA_TOGGLE_MISMATCH", 1142 "STALL", 1143 "DEVICE_NOT_RESPONDING", 1144 "PID_CHECK_FAILURE", 1145 "UNEXPECTED_PID", 1146 "DATA_OVERRUN", 1147 "DATA_UNDERRUN", 1148 "BUFFER_OVERRUN", 1149 "BUFFER_UNDERRUN", 1150 "reserved", 1151 "reserved", 1152 "NOT_ACCESSED", 1153 "NOT_ACCESSED", 1154 }; 1155 #endif 1156 1157 void 1158 ohci_add_done(sc, done) 1159 ohci_softc_t *sc; 1160 ohci_physaddr_t done; 1161 { 1162 ohci_soft_itd_t *sitd, *sidone, **ip; 1163 ohci_soft_td_t *std, *sdone, **p; 1164 1165 /* Reverse the done list. */ 1166 for (sdone = NULL, sidone = NULL; done != 0; ) { 1167 std = ohci_hash_find_td(sc, done); 1168 if (std != NULL) { 1169 std->dnext = sdone; 1170 done = le32toh(std->td.td_nexttd); 1171 sdone = std; 1172 DPRINTFN(10,("add TD %p\n", std)); 1173 continue; 1174 } 1175 sitd = ohci_hash_find_itd(sc, done); 1176 if (sitd != NULL) { 1177 sitd->dnext = sidone; 1178 done = le32toh(sitd->itd.itd_nextitd); 1179 sidone = sitd; 1180 DPRINTFN(5,("add ITD %p\n", sitd)); 1181 continue; 1182 } 1183 panic("ohci_add_done: addr 0x%08lx not found\n", (u_long)done); 1184 } 1185 1186 /* sdone & sidone now hold the done lists. */ 1187 /* Put them on the already processed lists. */ 1188 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1189 ; 1190 *p = sdone; 1191 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1192 ; 1193 *ip = sidone; 1194 } 1195 1196 void baaz(void); 1197 void baaz(void) {} 1198 1199 void 1200 ohci_softintr(bus) 1201 struct usbd_bus *bus; 1202 { 1203 ohci_softc_t *sc = (ohci_softc_t *)bus; 1204 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1205 ohci_soft_td_t *std, *sdone, *stdnext; 1206 usbd_xfer_handle xfer; 1207 int len, cc, s; 1208 1209 sc->sc_bus.intr_context++; 1210 1211 s = splhardusb(); 1212 sdone = sc->sc_sdone; 1213 sc->sc_sdone = NULL; 1214 sidone = sc->sc_sidone; 1215 sc->sc_sidone = NULL; 1216 splx(s); 1217 1218 DPRINTFN(10,("ohci_process_done: sdone=%p sidone=%p\n", sdone, sidone)); 1219 1220 #ifdef OHCI_DEBUG 1221 if (ohcidebug > 10) { 1222 DPRINTF(("ohci_process_done: TD done:\n")); 1223 ohci_dump_tds(sdone); 1224 } 1225 #endif 1226 1227 for (std = sdone; std; std = stdnext) { 1228 xfer = std->xfer; 1229 stdnext = std->dnext; 1230 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1231 std, xfer, xfer ? xfer->hcpriv : 0)); 1232 if (xfer == NULL) { 1233 /* xfer == NULL: There seems to be no xfer associated 1234 * with this TD. It is tailp that happened to end up on 1235 * the done queue. 1236 */ 1237 continue; 1238 } 1239 if (xfer->status == USBD_CANCELLED || 1240 xfer->status == USBD_TIMEOUT) { 1241 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1242 xfer)); 1243 /* Handled by abort routine. */ 1244 continue; 1245 } 1246 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1247 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1248 if (cc == OHCI_CC_NO_ERROR) { 1249 len = std->len; 1250 if (std->td.td_cbp != 0) 1251 len -= le32toh(std->td.td_be) - 1252 le32toh(std->td.td_cbp) + 1; 1253 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", 1254 len, std->flags)); 1255 if (std->flags & OHCI_ADD_LEN) 1256 xfer->actlen += len; 1257 if (std->flags & OHCI_CALL_DONE) { 1258 xfer->status = USBD_NORMAL_COMPLETION; 1259 usb_transfer_complete(xfer); 1260 } 1261 ohci_free_std(sc, std); 1262 } else { 1263 /* 1264 * Endpoint is halted. First unlink all the TDs 1265 * belonging to the failed transfer, and then restart 1266 * the endpoint. 1267 */ 1268 ohci_soft_td_t *p, *n; 1269 struct ohci_pipe *opipe = 1270 (struct ohci_pipe *)xfer->pipe; 1271 1272 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1273 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1274 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1275 1276 /* remove TDs */ 1277 for (p = std; p->xfer == xfer; p = n) { 1278 n = p->nexttd; 1279 ohci_free_std(sc, p); 1280 } 1281 1282 /* clear halt */ 1283 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1284 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1285 1286 if (cc == OHCI_CC_STALL) 1287 xfer->status = USBD_STALLED; 1288 else 1289 xfer->status = USBD_IOERROR; 1290 usb_transfer_complete(xfer); 1291 } 1292 } 1293 1294 #ifdef OHCI_DEBUG 1295 if (ohcidebug > 10) { 1296 DPRINTF(("ohci_process_done: ITD done:\n")); 1297 ohci_dump_itds(sidone); 1298 } 1299 #endif 1300 1301 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1302 xfer = sitd->xfer; 1303 sitdnext = sitd->dnext; 1304 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1305 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1306 if (xfer == NULL) 1307 continue; 1308 if (xfer->status == USBD_CANCELLED || 1309 xfer->status == USBD_TIMEOUT) { 1310 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1311 xfer)); 1312 /* Handled by abort routine. */ 1313 continue; 1314 } 1315 #ifdef DIAGNOSTIC 1316 if (sitd->isdone) 1317 printf("ohci_softintr: sitd=%p is done\n", sitd); 1318 sitd->isdone = 1; 1319 #endif 1320 cc = OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)); 1321 if (cc == OHCI_CC_NO_ERROR) { 1322 /* XXX compute length for input */ 1323 struct ohci_pipe *opipe = 1324 (struct ohci_pipe *)xfer->pipe; 1325 if (sitd->flags & OHCI_CALL_DONE) { 1326 opipe->u.iso.inuse -= xfer->nframes; 1327 /* XXX xfer->actlen = actlen; */ 1328 xfer->status = USBD_NORMAL_COMPLETION; 1329 usb_transfer_complete(xfer); 1330 } 1331 } else { 1332 /* XXX Do more */ 1333 xfer->status = USBD_IOERROR; 1334 usb_transfer_complete(xfer); 1335 } 1336 } 1337 1338 sc->sc_bus.intr_context--; 1339 } 1340 1341 void 1342 ohci_device_ctrl_done(xfer) 1343 usbd_xfer_handle xfer; 1344 { 1345 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1346 1347 #ifdef DIAGNOSTIC 1348 if (!(xfer->rqflags & URQ_REQUEST)) { 1349 panic("ohci_ctrl_done: not a request\n"); 1350 } 1351 #endif 1352 xfer->hcpriv = NULL; 1353 } 1354 1355 void 1356 ohci_device_intr_done(xfer) 1357 usbd_xfer_handle xfer; 1358 { 1359 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1360 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1361 ohci_soft_ed_t *sed = opipe->sed; 1362 ohci_soft_td_t *data, *tail; 1363 1364 1365 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1366 xfer, xfer->actlen)); 1367 1368 xfer->hcpriv = NULL; 1369 1370 if (xfer->pipe->repeat) { 1371 data = opipe->tail.td; 1372 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1373 if (tail == NULL) { 1374 xfer->status = USBD_NOMEM; 1375 return; 1376 } 1377 tail->xfer = NULL; 1378 1379 data->td.td_flags = htole32( 1380 OHCI_TD_IN | OHCI_TD_NOCC | 1381 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1382 if (xfer->flags & USBD_SHORT_XFER_OK) 1383 data->td.td_flags |= htole32(OHCI_TD_R); 1384 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 1385 data->nexttd = tail; 1386 data->td.td_nexttd = htole32(tail->physaddr); 1387 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1388 xfer->length - 1); 1389 data->len = xfer->length; 1390 data->xfer = xfer; 1391 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1392 xfer->hcpriv = data; 1393 xfer->actlen = 0; 1394 1395 sed->ed.ed_tailp = htole32(tail->physaddr); 1396 opipe->tail.td = tail; 1397 } 1398 } 1399 1400 void 1401 ohci_device_bulk_done(xfer) 1402 usbd_xfer_handle xfer; 1403 { 1404 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1405 xfer, xfer->actlen)); 1406 1407 xfer->hcpriv = NULL; 1408 } 1409 1410 void 1411 ohci_rhsc(sc, xfer) 1412 ohci_softc_t *sc; 1413 usbd_xfer_handle xfer; 1414 { 1415 usbd_pipe_handle pipe; 1416 struct ohci_pipe *opipe; 1417 u_char *p; 1418 int i, m; 1419 int hstatus; 1420 1421 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1422 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1423 sc, xfer, hstatus)); 1424 1425 if (xfer == NULL) { 1426 /* Just ignore the change. */ 1427 return; 1428 } 1429 1430 pipe = xfer->pipe; 1431 opipe = (struct ohci_pipe *)pipe; 1432 1433 p = KERNADDR(&xfer->dmabuf); 1434 m = min(sc->sc_noport, xfer->length * 8 - 1); 1435 memset(p, 0, xfer->length); 1436 for (i = 1; i <= m; i++) { 1437 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1438 p[i/8] |= 1 << (i%8); 1439 } 1440 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1441 xfer->actlen = xfer->length; 1442 xfer->status = USBD_NORMAL_COMPLETION; 1443 1444 usb_transfer_complete(xfer); 1445 } 1446 1447 void 1448 ohci_root_intr_done(xfer) 1449 usbd_xfer_handle xfer; 1450 { 1451 xfer->hcpriv = NULL; 1452 } 1453 1454 void 1455 ohci_root_ctrl_done(xfer) 1456 usbd_xfer_handle xfer; 1457 { 1458 xfer->hcpriv = NULL; 1459 } 1460 1461 /* 1462 * Wait here until controller claims to have an interrupt. 1463 * Then call ohci_intr and return. Use timeout to avoid waiting 1464 * too long. 1465 */ 1466 void 1467 ohci_waitintr(sc, xfer) 1468 ohci_softc_t *sc; 1469 usbd_xfer_handle xfer; 1470 { 1471 int timo = xfer->timeout; 1472 int usecs; 1473 u_int32_t intrs; 1474 1475 xfer->status = USBD_IN_PROGRESS; 1476 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1477 usb_delay_ms(&sc->sc_bus, 1); 1478 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1479 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1480 #ifdef OHCI_DEBUG 1481 if (ohcidebug > 15) 1482 ohci_dumpregs(sc); 1483 #endif 1484 if (intrs) { 1485 ohci_intr1(sc); 1486 if (xfer->status != USBD_IN_PROGRESS) 1487 return; 1488 } 1489 } 1490 1491 /* Timeout */ 1492 DPRINTF(("ohci_waitintr: timeout\n")); 1493 xfer->status = USBD_TIMEOUT; 1494 usb_transfer_complete(xfer); 1495 /* XXX should free TD */ 1496 } 1497 1498 void 1499 ohci_poll(bus) 1500 struct usbd_bus *bus; 1501 { 1502 ohci_softc_t *sc = (ohci_softc_t *)bus; 1503 1504 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1505 ohci_intr1(sc); 1506 } 1507 1508 usbd_status 1509 ohci_device_request(xfer) 1510 usbd_xfer_handle xfer; 1511 { 1512 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1513 usb_device_request_t *req = &xfer->request; 1514 usbd_device_handle dev = opipe->pipe.device; 1515 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1516 int addr = dev->address; 1517 ohci_soft_td_t *setup, *stat, *next, *tail; 1518 ohci_soft_ed_t *sed; 1519 int isread; 1520 int len; 1521 usbd_status err; 1522 int s; 1523 1524 isread = req->bmRequestType & UT_READ; 1525 len = UGETW(req->wLength); 1526 1527 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1528 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1529 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1530 UGETW(req->wIndex), len, addr, 1531 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1532 1533 setup = opipe->tail.td; 1534 stat = ohci_alloc_std(sc); 1535 if (stat == NULL) { 1536 err = USBD_NOMEM; 1537 goto bad1; 1538 } 1539 tail = ohci_alloc_std(sc); 1540 if (tail == NULL) { 1541 err = USBD_NOMEM; 1542 goto bad2; 1543 } 1544 tail->xfer = NULL; 1545 1546 sed = opipe->sed; 1547 opipe->u.ctl.length = len; 1548 1549 /* Update device address and length since they may have changed. */ 1550 /* XXX This only needs to be done once, but it's too early in open. */ 1551 /* XXXX Should not touch ED here! */ 1552 sed->ed.ed_flags = htole32( 1553 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1554 OHCI_ED_SET_FA(addr) | 1555 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1556 1557 next = stat; 1558 1559 /* Set up data transaction */ 1560 if (len != 0) { 1561 ohci_soft_td_t *std = stat; 1562 1563 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1564 std, &stat); 1565 stat = stat->nexttd; /* point at free TD */ 1566 if (err) 1567 goto bad3; 1568 /* Start toggle at 1 and then use the carried toggle. */ 1569 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1570 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1571 } 1572 1573 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1574 1575 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1576 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1577 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma)); 1578 setup->nexttd = next; 1579 setup->td.td_nexttd = htole32(next->physaddr); 1580 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1581 setup->len = 0; 1582 setup->xfer = xfer; 1583 setup->flags = 0; 1584 xfer->hcpriv = setup; 1585 1586 stat->td.td_flags = htole32( 1587 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1588 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1589 stat->td.td_cbp = 0; 1590 stat->nexttd = tail; 1591 stat->td.td_nexttd = htole32(tail->physaddr); 1592 stat->td.td_be = 0; 1593 stat->flags = OHCI_CALL_DONE; 1594 stat->len = 0; 1595 stat->xfer = xfer; 1596 1597 #ifdef OHCI_DEBUG 1598 if (ohcidebug > 5) { 1599 DPRINTF(("ohci_device_request:\n")); 1600 ohci_dump_ed(sed); 1601 ohci_dump_tds(setup); 1602 } 1603 #endif 1604 1605 /* Insert ED in schedule */ 1606 s = splusb(); 1607 sed->ed.ed_tailp = htole32(tail->physaddr); 1608 opipe->tail.td = tail; 1609 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1610 if (xfer->timeout && !sc->sc_bus.use_polling) { 1611 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 1612 ohci_timeout, xfer); 1613 } 1614 splx(s); 1615 1616 #if 0 1617 if (ohcidebug > 10) { 1618 delay(10000); 1619 DPRINTF(("ohci_device_request: status=%x\n", 1620 OREAD4(sc, OHCI_COMMAND_STATUS))); 1621 ohci_dump_ed(sed); 1622 ohci_dump_tds(setup); 1623 } 1624 #endif 1625 1626 return (USBD_NORMAL_COMPLETION); 1627 1628 bad3: 1629 ohci_free_std(sc, tail); 1630 bad2: 1631 ohci_free_std(sc, stat); 1632 bad1: 1633 return (err); 1634 } 1635 1636 /* 1637 * Add an ED to the schedule. Called at splusb(). 1638 */ 1639 void 1640 ohci_add_ed(sed, head) 1641 ohci_soft_ed_t *sed; 1642 ohci_soft_ed_t *head; 1643 { 1644 SPLUSBCHECK; 1645 sed->next = head->next; 1646 sed->ed.ed_nexted = head->ed.ed_nexted; 1647 head->next = sed; 1648 head->ed.ed_nexted = htole32(sed->physaddr); 1649 } 1650 1651 /* 1652 * Remove an ED from the schedule. Called at splusb(). 1653 */ 1654 void 1655 ohci_rem_ed(sed, head) 1656 ohci_soft_ed_t *sed; 1657 ohci_soft_ed_t *head; 1658 { 1659 ohci_soft_ed_t *p; 1660 1661 SPLUSBCHECK; 1662 1663 /* XXX */ 1664 for (p = head; p == NULL && p->next != sed; p = p->next) 1665 ; 1666 if (p == NULL) 1667 panic("ohci_rem_ed: ED not found\n"); 1668 p->next = sed->next; 1669 p->ed.ed_nexted = sed->ed.ed_nexted; 1670 } 1671 1672 /* 1673 * When a transfer is completed the TD is added to the done queue by 1674 * the host controller. This queue is the processed by software. 1675 * Unfortunately the queue contains the physical address of the TD 1676 * and we have no simple way to translate this back to a kernel address. 1677 * To make the translation possible (and fast) we use a hash table of 1678 * TDs currently in the schedule. The physical address is used as the 1679 * hash value. 1680 */ 1681 1682 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1683 /* Called at splusb() */ 1684 void 1685 ohci_hash_add_td(sc, std) 1686 ohci_softc_t *sc; 1687 ohci_soft_td_t *std; 1688 { 1689 int h = HASH(std->physaddr); 1690 1691 SPLUSBCHECK; 1692 1693 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1694 } 1695 1696 /* Called at splusb() */ 1697 void 1698 ohci_hash_rem_td(sc, std) 1699 ohci_softc_t *sc; 1700 ohci_soft_td_t *std; 1701 { 1702 SPLUSBCHECK; 1703 1704 LIST_REMOVE(std, hnext); 1705 } 1706 1707 ohci_soft_td_t * 1708 ohci_hash_find_td(sc, a) 1709 ohci_softc_t *sc; 1710 ohci_physaddr_t a; 1711 { 1712 int h = HASH(a); 1713 ohci_soft_td_t *std; 1714 1715 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1716 std != NULL; 1717 std = LIST_NEXT(std, hnext)) 1718 if (std->physaddr == a) 1719 return (std); 1720 return (NULL); 1721 } 1722 1723 /* Called at splusb() */ 1724 void 1725 ohci_hash_add_itd(sc, sitd) 1726 ohci_softc_t *sc; 1727 ohci_soft_itd_t *sitd; 1728 { 1729 int h = HASH(sitd->physaddr); 1730 1731 SPLUSBCHECK; 1732 1733 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1734 sitd, (u_long)sitd->physaddr)); 1735 1736 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1737 } 1738 1739 /* Called at splusb() */ 1740 void 1741 ohci_hash_rem_itd(sc, sitd) 1742 ohci_softc_t *sc; 1743 ohci_soft_itd_t *sitd; 1744 { 1745 SPLUSBCHECK; 1746 1747 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1748 sitd, (u_long)sitd->physaddr)); 1749 1750 LIST_REMOVE(sitd, hnext); 1751 } 1752 1753 ohci_soft_itd_t * 1754 ohci_hash_find_itd(sc, a) 1755 ohci_softc_t *sc; 1756 ohci_physaddr_t a; 1757 { 1758 int h = HASH(a); 1759 ohci_soft_itd_t *sitd; 1760 1761 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1762 sitd != NULL; 1763 sitd = LIST_NEXT(sitd, hnext)) 1764 if (sitd->physaddr == a) 1765 return (sitd); 1766 return (NULL); 1767 } 1768 1769 void 1770 ohci_timeout(addr) 1771 void *addr; 1772 { 1773 usbd_xfer_handle xfer = addr; 1774 int s; 1775 1776 DPRINTF(("ohci_timeout: xfer=%p\n", xfer)); 1777 1778 s = splusb(); 1779 xfer->device->bus->intr_context++; 1780 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1781 xfer->device->bus->intr_context--; 1782 splx(s); 1783 } 1784 1785 #ifdef OHCI_DEBUG 1786 void 1787 ohci_dump_tds(std) 1788 ohci_soft_td_t *std; 1789 { 1790 for (; std; std = std->nexttd) 1791 ohci_dump_td(std); 1792 } 1793 1794 void 1795 ohci_dump_td(std) 1796 ohci_soft_td_t *std; 1797 { 1798 DPRINTF(("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1799 "nexttd=0x%08lx be=0x%08lx\n", 1800 std, (u_long)std->physaddr, 1801 (int)le32toh(std->td.td_flags), 1802 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1803 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1804 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1805 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1806 (u_long)le32toh(std->td.td_cbp), 1807 (u_long)le32toh(std->td.td_nexttd), 1808 (u_long)le32toh(std->td.td_be))); 1809 } 1810 1811 void 1812 ohci_dump_itd(sitd) 1813 ohci_soft_itd_t *sitd; 1814 { 1815 int i; 1816 1817 DPRINTF(("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1818 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1819 sitd, (u_long)sitd->physaddr, 1820 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1821 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1822 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1823 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1824 (u_long)le32toh(sitd->itd.itd_bp0), 1825 (u_long)le32toh(sitd->itd.itd_nextitd), 1826 (u_long)le32toh(sitd->itd.itd_be))); 1827 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1828 DPRINTF(("offs[%d]=0x%04x ", i, 1829 (u_int)le16toh(sitd->itd.itd_offset[i]))); 1830 DPRINTF(("\n")); 1831 } 1832 1833 void 1834 ohci_dump_itds(sitd) 1835 ohci_soft_itd_t *sitd; 1836 { 1837 for (; sitd; sitd = sitd->nextitd) 1838 ohci_dump_itd(sitd); 1839 } 1840 1841 void 1842 ohci_dump_ed(sed) 1843 ohci_soft_ed_t *sed; 1844 { 1845 DPRINTF(("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx " 1846 "headflags=%b headp=0x%08lx nexted=0x%08lx\n", 1847 sed, (u_long)sed->physaddr, 1848 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1849 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1850 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), 1851 (int)le32toh(sed->ed.ed_flags), 1852 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1853 (u_long)le32toh(sed->ed.ed_tailp), 1854 (u_long)le32toh(sed->ed.ed_headp), 1855 "\20\1HALT\2CARRY", 1856 (u_long)le32toh(sed->ed.ed_headp), 1857 (u_long)le32toh(sed->ed.ed_nexted))); 1858 } 1859 #endif 1860 1861 usbd_status 1862 ohci_open(pipe) 1863 usbd_pipe_handle pipe; 1864 { 1865 usbd_device_handle dev = pipe->device; 1866 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1867 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1868 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1869 u_int8_t addr = dev->address; 1870 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1871 ohci_soft_ed_t *sed; 1872 ohci_soft_td_t *std; 1873 ohci_soft_itd_t *sitd; 1874 ohci_physaddr_t tdphys; 1875 u_int32_t fmt; 1876 usbd_status err; 1877 int s; 1878 int ival; 1879 1880 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1881 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1882 1883 if (addr == sc->sc_addr) { 1884 switch (ed->bEndpointAddress) { 1885 case USB_CONTROL_ENDPOINT: 1886 pipe->methods = &ohci_root_ctrl_methods; 1887 break; 1888 case UE_DIR_IN | OHCI_INTR_ENDPT: 1889 pipe->methods = &ohci_root_intr_methods; 1890 break; 1891 default: 1892 return (USBD_INVAL); 1893 } 1894 } else { 1895 sed = ohci_alloc_sed(sc); 1896 if (sed == NULL) 1897 goto bad0; 1898 opipe->sed = sed; 1899 if (xfertype == UE_ISOCHRONOUS) { 1900 sitd = ohci_alloc_sitd(sc); 1901 if (sitd == NULL) { 1902 ohci_free_sitd(sc, sitd); 1903 goto bad1; 1904 } 1905 opipe->tail.itd = sitd; 1906 tdphys = sitd->physaddr; 1907 fmt = OHCI_ED_FORMAT_ISO; 1908 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 1909 fmt |= OHCI_ED_DIR_IN; 1910 else 1911 fmt |= OHCI_ED_DIR_OUT; 1912 } else { 1913 std = ohci_alloc_std(sc); 1914 if (std == NULL) { 1915 ohci_free_std(sc, std); 1916 goto bad1; 1917 } 1918 opipe->tail.td = std; 1919 tdphys = std->physaddr; 1920 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 1921 } 1922 sed->ed.ed_flags = htole32( 1923 OHCI_ED_SET_FA(addr) | 1924 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1925 (dev->lowspeed ? OHCI_ED_SPEED : 0) | fmt | 1926 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1927 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 1928 1929 switch (xfertype) { 1930 case UE_CONTROL: 1931 pipe->methods = &ohci_device_ctrl_methods; 1932 err = usb_allocmem(&sc->sc_bus, 1933 sizeof(usb_device_request_t), 1934 0, &opipe->u.ctl.reqdma); 1935 if (err) 1936 goto bad; 1937 s = splusb(); 1938 ohci_add_ed(sed, sc->sc_ctrl_head); 1939 splx(s); 1940 break; 1941 case UE_INTERRUPT: 1942 pipe->methods = &ohci_device_intr_methods; 1943 ival = pipe->interval; 1944 if (ival == USBD_DEFAULT_INTERVAL) 1945 ival = ed->bInterval; 1946 return (ohci_device_setintr(sc, opipe, ival)); 1947 case UE_ISOCHRONOUS: 1948 pipe->methods = &ohci_device_isoc_methods; 1949 return (ohci_setup_isoc(pipe)); 1950 case UE_BULK: 1951 pipe->methods = &ohci_device_bulk_methods; 1952 s = splusb(); 1953 ohci_add_ed(sed, sc->sc_bulk_head); 1954 splx(s); 1955 break; 1956 } 1957 } 1958 return (USBD_NORMAL_COMPLETION); 1959 1960 bad: 1961 ohci_free_std(sc, std); 1962 bad1: 1963 ohci_free_sed(sc, sed); 1964 bad0: 1965 return (USBD_NOMEM); 1966 1967 } 1968 1969 /* 1970 * Close a reqular pipe. 1971 * Assumes that there are no pending transactions. 1972 */ 1973 void 1974 ohci_close_pipe(pipe, head) 1975 usbd_pipe_handle pipe; 1976 ohci_soft_ed_t *head; 1977 { 1978 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1979 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1980 ohci_soft_ed_t *sed = opipe->sed; 1981 int s; 1982 1983 s = splusb(); 1984 #ifdef DIAGNOSTIC 1985 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 1986 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 1987 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 1988 ohci_physaddr_t td = le32toh(sed->ed.ed_headp); 1989 ohci_soft_td_t *std; 1990 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]); 1991 std != NULL; 1992 std = LIST_NEXT(std, hnext)) 1993 if (std->physaddr == td) 1994 break; 1995 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 1996 "tl=0x%x pipe=%p, std=%p\n", sed, 1997 (int)le32toh(sed->ed.ed_headp), 1998 (int)le32toh(sed->ed.ed_tailp), 1999 pipe, std); 2000 usb_delay_ms(&sc->sc_bus, 2); 2001 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2002 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2003 printf("ohci_close_pipe: pipe still not empty\n"); 2004 } 2005 #endif 2006 ohci_rem_ed(sed, head); 2007 splx(s); 2008 ohci_free_sed(sc, opipe->sed); 2009 } 2010 2011 /* 2012 * Abort a device request. 2013 * If this routine is called at splusb() it guarantees that the request 2014 * will be removed from the hardware scheduling and that the callback 2015 * for it will be called with USBD_CANCELLED status. 2016 * It's impossible to guarantee that the requested transfer will not 2017 * have happened since the hardware runs concurrently. 2018 * If the transaction has already happened we rely on the ordinary 2019 * interrupt processing to process it. 2020 */ 2021 void 2022 ohci_abort_xfer(xfer, status) 2023 usbd_xfer_handle xfer; 2024 usbd_status status; 2025 { 2026 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2027 ohci_soft_ed_t *sed; 2028 2029 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p\n", xfer, opipe)); 2030 2031 xfer->status = status; 2032 2033 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2034 2035 sed = opipe->sed; 2036 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2037 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2038 2039 #if 1 2040 if (xfer->device->bus->intr_context) { 2041 /* We have no process context, so we can't use tsleep(). */ 2042 usb_callout(xfer->pipe->abort_handle, 2043 hz / USB_FRAMES_PER_SECOND, ohci_abort_xfer_end, xfer); 2044 } else { 2045 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 2046 KASSERT(intr_nesting_level == 0, 2047 ("ohci_abort_req in interrupt context")); 2048 #endif 2049 usb_delay_ms(opipe->pipe.device->bus, 1); 2050 ohci_abort_xfer_end(xfer); 2051 } 2052 #else 2053 delay(1000); 2054 ohci_abort_xfer_end(xfer); 2055 #endif 2056 } 2057 2058 void 2059 ohci_abort_xfer_end(v) 2060 void *v; 2061 { 2062 usbd_xfer_handle xfer = v; 2063 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2064 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2065 ohci_soft_ed_t *sed; 2066 ohci_soft_td_t *p, *n; 2067 int s; 2068 2069 s = splusb(); 2070 2071 p = xfer->hcpriv; 2072 #ifdef DIAGNOSTIC 2073 if (p == NULL) { 2074 printf("ohci_abort_xfer: hcpriv==0\n"); 2075 return; 2076 } 2077 #endif 2078 for (; p->xfer == xfer; p = n) { 2079 n = p->nexttd; 2080 ohci_free_std(sc, p); 2081 } 2082 2083 sed = opipe->sed; 2084 DPRINTFN(2,("ohci_abort_xfer: set hd=%x, tl=%x\n", 2085 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2086 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2087 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2088 2089 usb_transfer_complete(xfer); 2090 2091 splx(s); 2092 } 2093 2094 /* 2095 * Data structures and routines to emulate the root hub. 2096 */ 2097 Static usb_device_descriptor_t ohci_devd = { 2098 USB_DEVICE_DESCRIPTOR_SIZE, 2099 UDESC_DEVICE, /* type */ 2100 {0x00, 0x01}, /* USB version */ 2101 UDCLASS_HUB, /* class */ 2102 UDSUBCLASS_HUB, /* subclass */ 2103 0, /* protocol */ 2104 64, /* max packet */ 2105 {0},{0},{0x00,0x01}, /* device id */ 2106 1,2,0, /* string indicies */ 2107 1 /* # of configurations */ 2108 }; 2109 2110 Static usb_config_descriptor_t ohci_confd = { 2111 USB_CONFIG_DESCRIPTOR_SIZE, 2112 UDESC_CONFIG, 2113 {USB_CONFIG_DESCRIPTOR_SIZE + 2114 USB_INTERFACE_DESCRIPTOR_SIZE + 2115 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2116 1, 2117 1, 2118 0, 2119 UC_SELF_POWERED, 2120 0 /* max power */ 2121 }; 2122 2123 Static usb_interface_descriptor_t ohci_ifcd = { 2124 USB_INTERFACE_DESCRIPTOR_SIZE, 2125 UDESC_INTERFACE, 2126 0, 2127 0, 2128 1, 2129 UICLASS_HUB, 2130 UISUBCLASS_HUB, 2131 0, 2132 0 2133 }; 2134 2135 Static usb_endpoint_descriptor_t ohci_endpd = { 2136 USB_ENDPOINT_DESCRIPTOR_SIZE, 2137 UDESC_ENDPOINT, 2138 UE_DIR_IN | OHCI_INTR_ENDPT, 2139 UE_INTERRUPT, 2140 {8, 0}, /* max packet */ 2141 255 2142 }; 2143 2144 Static usb_hub_descriptor_t ohci_hubd = { 2145 USB_HUB_DESCRIPTOR_SIZE, 2146 UDESC_HUB, 2147 0, 2148 {0,0}, 2149 0, 2150 0, 2151 {0}, 2152 }; 2153 2154 Static int 2155 ohci_str(p, l, s) 2156 usb_string_descriptor_t *p; 2157 int l; 2158 char *s; 2159 { 2160 int i; 2161 2162 if (l == 0) 2163 return (0); 2164 p->bLength = 2 * strlen(s) + 2; 2165 if (l == 1) 2166 return (1); 2167 p->bDescriptorType = UDESC_STRING; 2168 l -= 2; 2169 for (i = 0; s[i] && l > 1; i++, l -= 2) 2170 USETW2(p->bString[i], 0, s[i]); 2171 return (2*i+2); 2172 } 2173 2174 /* 2175 * Simulate a hardware hub by handling all the necessary requests. 2176 */ 2177 Static usbd_status 2178 ohci_root_ctrl_transfer(xfer) 2179 usbd_xfer_handle xfer; 2180 { 2181 usbd_status err; 2182 2183 /* Insert last in queue. */ 2184 err = usb_insert_transfer(xfer); 2185 if (err) 2186 return (err); 2187 2188 /* Pipe isn't running, start first */ 2189 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2190 } 2191 2192 Static usbd_status 2193 ohci_root_ctrl_start(xfer) 2194 usbd_xfer_handle xfer; 2195 { 2196 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2197 usb_device_request_t *req; 2198 void *buf = NULL; 2199 int port, i; 2200 int s, len, value, index, l, totlen = 0; 2201 usb_port_status_t ps; 2202 usb_hub_descriptor_t hubd; 2203 usbd_status err; 2204 u_int32_t v; 2205 2206 if (sc->sc_dying) 2207 return (USBD_IOERROR); 2208 2209 #ifdef DIAGNOSTIC 2210 if (!(xfer->rqflags & URQ_REQUEST)) 2211 /* XXX panic */ 2212 return (USBD_INVAL); 2213 #endif 2214 req = &xfer->request; 2215 2216 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2217 req->bmRequestType, req->bRequest)); 2218 2219 len = UGETW(req->wLength); 2220 value = UGETW(req->wValue); 2221 index = UGETW(req->wIndex); 2222 2223 if (len != 0) 2224 buf = KERNADDR(&xfer->dmabuf); 2225 2226 #define C(x,y) ((x) | ((y) << 8)) 2227 switch(C(req->bRequest, req->bmRequestType)) { 2228 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2229 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2230 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2231 /* 2232 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2233 * for the integrated root hub. 2234 */ 2235 break; 2236 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2237 if (len > 0) { 2238 *(u_int8_t *)buf = sc->sc_conf; 2239 totlen = 1; 2240 } 2241 break; 2242 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2243 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2244 switch(value >> 8) { 2245 case UDESC_DEVICE: 2246 if ((value & 0xff) != 0) { 2247 err = USBD_IOERROR; 2248 goto ret; 2249 } 2250 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2251 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2252 memcpy(buf, &ohci_devd, l); 2253 break; 2254 case UDESC_CONFIG: 2255 if ((value & 0xff) != 0) { 2256 err = USBD_IOERROR; 2257 goto ret; 2258 } 2259 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2260 memcpy(buf, &ohci_confd, l); 2261 buf = (char *)buf + l; 2262 len -= l; 2263 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2264 totlen += l; 2265 memcpy(buf, &ohci_ifcd, l); 2266 buf = (char *)buf + l; 2267 len -= l; 2268 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2269 totlen += l; 2270 memcpy(buf, &ohci_endpd, l); 2271 break; 2272 case UDESC_STRING: 2273 if (len == 0) 2274 break; 2275 *(u_int8_t *)buf = 0; 2276 totlen = 1; 2277 switch (value & 0xff) { 2278 case 1: /* Vendor */ 2279 totlen = ohci_str(buf, len, sc->sc_vendor); 2280 break; 2281 case 2: /* Product */ 2282 totlen = ohci_str(buf, len, "OHCI root hub"); 2283 break; 2284 } 2285 break; 2286 default: 2287 err = USBD_IOERROR; 2288 goto ret; 2289 } 2290 break; 2291 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2292 if (len > 0) { 2293 *(u_int8_t *)buf = 0; 2294 totlen = 1; 2295 } 2296 break; 2297 case C(UR_GET_STATUS, UT_READ_DEVICE): 2298 if (len > 1) { 2299 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2300 totlen = 2; 2301 } 2302 break; 2303 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2304 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2305 if (len > 1) { 2306 USETW(((usb_status_t *)buf)->wStatus, 0); 2307 totlen = 2; 2308 } 2309 break; 2310 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2311 if (value >= USB_MAX_DEVICES) { 2312 err = USBD_IOERROR; 2313 goto ret; 2314 } 2315 sc->sc_addr = value; 2316 break; 2317 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2318 if (value != 0 && value != 1) { 2319 err = USBD_IOERROR; 2320 goto ret; 2321 } 2322 sc->sc_conf = value; 2323 break; 2324 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2325 break; 2326 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2327 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2328 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2329 err = USBD_IOERROR; 2330 goto ret; 2331 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2332 break; 2333 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2334 break; 2335 /* Hub requests */ 2336 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2337 break; 2338 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2339 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2340 "port=%d feature=%d\n", 2341 index, value)); 2342 if (index < 1 || index > sc->sc_noport) { 2343 err = USBD_IOERROR; 2344 goto ret; 2345 } 2346 port = OHCI_RH_PORT_STATUS(index); 2347 switch(value) { 2348 case UHF_PORT_ENABLE: 2349 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2350 break; 2351 case UHF_PORT_SUSPEND: 2352 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2353 break; 2354 case UHF_PORT_POWER: 2355 /* Yes, writing to the LOW_SPEED bit clears power. */ 2356 OWRITE4(sc, port, UPS_LOW_SPEED); 2357 break; 2358 case UHF_C_PORT_CONNECTION: 2359 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2360 break; 2361 case UHF_C_PORT_ENABLE: 2362 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2363 break; 2364 case UHF_C_PORT_SUSPEND: 2365 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2366 break; 2367 case UHF_C_PORT_OVER_CURRENT: 2368 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2369 break; 2370 case UHF_C_PORT_RESET: 2371 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2372 break; 2373 default: 2374 err = USBD_IOERROR; 2375 goto ret; 2376 } 2377 switch(value) { 2378 case UHF_C_PORT_CONNECTION: 2379 case UHF_C_PORT_ENABLE: 2380 case UHF_C_PORT_SUSPEND: 2381 case UHF_C_PORT_OVER_CURRENT: 2382 case UHF_C_PORT_RESET: 2383 /* Enable RHSC interrupt if condition is cleared. */ 2384 if ((OREAD4(sc, port) >> 16) == 0) 2385 ohci_rhsc_able(sc, 1); 2386 break; 2387 default: 2388 break; 2389 } 2390 break; 2391 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2392 if (value != 0) { 2393 err = USBD_IOERROR; 2394 goto ret; 2395 } 2396 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2397 hubd = ohci_hubd; 2398 hubd.bNbrPorts = sc->sc_noport; 2399 USETW(hubd.wHubCharacteristics, 2400 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2401 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2402 /* XXX overcurrent */ 2403 ); 2404 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2405 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2406 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2407 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2408 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2409 l = min(len, hubd.bDescLength); 2410 totlen = l; 2411 memcpy(buf, &hubd, l); 2412 break; 2413 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2414 if (len != 4) { 2415 err = USBD_IOERROR; 2416 goto ret; 2417 } 2418 memset(buf, 0, len); /* ? XXX */ 2419 totlen = len; 2420 break; 2421 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2422 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2423 index)); 2424 if (index < 1 || index > sc->sc_noport) { 2425 err = USBD_IOERROR; 2426 goto ret; 2427 } 2428 if (len != 4) { 2429 err = USBD_IOERROR; 2430 goto ret; 2431 } 2432 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2433 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2434 v)); 2435 USETW(ps.wPortStatus, v); 2436 USETW(ps.wPortChange, v >> 16); 2437 l = min(len, sizeof ps); 2438 memcpy(buf, &ps, l); 2439 totlen = l; 2440 break; 2441 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2442 err = USBD_IOERROR; 2443 goto ret; 2444 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2445 break; 2446 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2447 if (index < 1 || index > sc->sc_noport) { 2448 err = USBD_IOERROR; 2449 goto ret; 2450 } 2451 port = OHCI_RH_PORT_STATUS(index); 2452 switch(value) { 2453 case UHF_PORT_ENABLE: 2454 OWRITE4(sc, port, UPS_PORT_ENABLED); 2455 break; 2456 case UHF_PORT_SUSPEND: 2457 OWRITE4(sc, port, UPS_SUSPEND); 2458 break; 2459 case UHF_PORT_RESET: 2460 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2461 index)); 2462 OWRITE4(sc, port, UPS_RESET); 2463 for (i = 0; i < 10; i++) { 2464 usb_delay_ms(&sc->sc_bus, 10); 2465 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2466 break; 2467 } 2468 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2469 index, OREAD4(sc, port))); 2470 break; 2471 case UHF_PORT_POWER: 2472 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2473 "%d\n", index)); 2474 OWRITE4(sc, port, UPS_PORT_POWER); 2475 break; 2476 default: 2477 err = USBD_IOERROR; 2478 goto ret; 2479 } 2480 break; 2481 default: 2482 err = USBD_IOERROR; 2483 goto ret; 2484 } 2485 xfer->actlen = totlen; 2486 err = USBD_NORMAL_COMPLETION; 2487 ret: 2488 xfer->status = err; 2489 s = splusb(); 2490 usb_transfer_complete(xfer); 2491 splx(s); 2492 return (USBD_IN_PROGRESS); 2493 } 2494 2495 /* Abort a root control request. */ 2496 Static void 2497 ohci_root_ctrl_abort(xfer) 2498 usbd_xfer_handle xfer; 2499 { 2500 /* Nothing to do, all transfers are synchronous. */ 2501 } 2502 2503 /* Close the root pipe. */ 2504 Static void 2505 ohci_root_ctrl_close(pipe) 2506 usbd_pipe_handle pipe; 2507 { 2508 DPRINTF(("ohci_root_ctrl_close\n")); 2509 /* Nothing to do. */ 2510 } 2511 2512 Static usbd_status 2513 ohci_root_intr_transfer(xfer) 2514 usbd_xfer_handle xfer; 2515 { 2516 usbd_status err; 2517 2518 /* Insert last in queue. */ 2519 err = usb_insert_transfer(xfer); 2520 if (err) 2521 return (err); 2522 2523 /* Pipe isn't running, start first */ 2524 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2525 } 2526 2527 Static usbd_status 2528 ohci_root_intr_start(xfer) 2529 usbd_xfer_handle xfer; 2530 { 2531 usbd_pipe_handle pipe = xfer->pipe; 2532 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2533 2534 if (sc->sc_dying) 2535 return (USBD_IOERROR); 2536 2537 sc->sc_intrxfer = xfer; 2538 2539 return (USBD_IN_PROGRESS); 2540 } 2541 2542 /* Abort a root interrupt request. */ 2543 Static void 2544 ohci_root_intr_abort(xfer) 2545 usbd_xfer_handle xfer; 2546 { 2547 int s; 2548 2549 if (xfer->pipe->intrxfer == xfer) { 2550 DPRINTF(("ohci_root_intr_abort: remove\n")); 2551 xfer->pipe->intrxfer = NULL; 2552 } 2553 xfer->status = USBD_CANCELLED; 2554 s = splusb(); 2555 usb_transfer_complete(xfer); 2556 splx(s); 2557 } 2558 2559 /* Close the root pipe. */ 2560 Static void 2561 ohci_root_intr_close(pipe) 2562 usbd_pipe_handle pipe; 2563 { 2564 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2565 2566 DPRINTF(("ohci_root_intr_close\n")); 2567 2568 sc->sc_intrxfer = NULL; 2569 } 2570 2571 /************************/ 2572 2573 Static usbd_status 2574 ohci_device_ctrl_transfer(xfer) 2575 usbd_xfer_handle xfer; 2576 { 2577 usbd_status err; 2578 2579 /* Insert last in queue. */ 2580 err = usb_insert_transfer(xfer); 2581 if (err) 2582 return (err); 2583 2584 /* Pipe isn't running, start first */ 2585 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2586 } 2587 2588 Static usbd_status 2589 ohci_device_ctrl_start(xfer) 2590 usbd_xfer_handle xfer; 2591 { 2592 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2593 usbd_status err; 2594 2595 if (sc->sc_dying) 2596 return (USBD_IOERROR); 2597 2598 #ifdef DIAGNOSTIC 2599 if (!(xfer->rqflags & URQ_REQUEST)) { 2600 /* XXX panic */ 2601 printf("ohci_device_ctrl_transfer: not a request\n"); 2602 return (USBD_INVAL); 2603 } 2604 #endif 2605 2606 err = ohci_device_request(xfer); 2607 if (err) 2608 return (err); 2609 2610 if (sc->sc_bus.use_polling) 2611 ohci_waitintr(sc, xfer); 2612 return (USBD_IN_PROGRESS); 2613 } 2614 2615 /* Abort a device control request. */ 2616 Static void 2617 ohci_device_ctrl_abort(xfer) 2618 usbd_xfer_handle xfer; 2619 { 2620 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2621 ohci_abort_xfer(xfer, USBD_CANCELLED); 2622 } 2623 2624 /* Close a device control pipe. */ 2625 Static void 2626 ohci_device_ctrl_close(pipe) 2627 usbd_pipe_handle pipe; 2628 { 2629 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2630 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2631 2632 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2633 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2634 ohci_free_std(sc, opipe->tail.td); 2635 } 2636 2637 /************************/ 2638 2639 Static void 2640 ohci_device_clear_toggle(pipe) 2641 usbd_pipe_handle pipe; 2642 { 2643 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2644 2645 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2646 } 2647 2648 Static void 2649 ohci_noop(pipe) 2650 usbd_pipe_handle pipe; 2651 { 2652 } 2653 2654 Static usbd_status 2655 ohci_device_bulk_transfer(xfer) 2656 usbd_xfer_handle xfer; 2657 { 2658 usbd_status err; 2659 2660 /* Insert last in queue. */ 2661 err = usb_insert_transfer(xfer); 2662 if (err) 2663 return (err); 2664 2665 /* Pipe isn't running, start first */ 2666 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2667 } 2668 2669 Static usbd_status 2670 ohci_device_bulk_start(xfer) 2671 usbd_xfer_handle xfer; 2672 { 2673 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2674 usbd_device_handle dev = opipe->pipe.device; 2675 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2676 int addr = dev->address; 2677 ohci_soft_td_t *data, *tail, *tdp; 2678 ohci_soft_ed_t *sed; 2679 int s, len, isread, endpt; 2680 usbd_status err; 2681 2682 if (sc->sc_dying) 2683 return (USBD_IOERROR); 2684 2685 #ifdef DIAGNOSTIC 2686 if (xfer->rqflags & URQ_REQUEST) { 2687 /* XXX panic */ 2688 printf("ohci_device_bulk_start: a request\n"); 2689 return (USBD_INVAL); 2690 } 2691 #endif 2692 2693 len = xfer->length; 2694 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2695 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2696 sed = opipe->sed; 2697 2698 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2699 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2700 endpt)); 2701 2702 opipe->u.bulk.isread = isread; 2703 opipe->u.bulk.length = len; 2704 2705 /* Update device address */ 2706 sed->ed.ed_flags = htole32( 2707 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2708 OHCI_ED_SET_FA(addr)); 2709 2710 /* Allocate a chain of new TDs (including a new tail). */ 2711 data = opipe->tail.td; 2712 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2713 data, &tail); 2714 /* We want interrupt at the end of the transfer. */ 2715 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2716 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2717 tail->flags |= OHCI_CALL_DONE; 2718 tail = tail->nexttd; /* point at sentinel */ 2719 if (err) 2720 return (err); 2721 2722 tail->xfer = NULL; 2723 xfer->hcpriv = data; 2724 2725 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2726 "td_cbp=0x%08x td_be=0x%08x\n", 2727 (int)le32toh(sed->ed.ed_flags), 2728 (int)le32toh(data->td.td_flags), 2729 (int)le32toh(data->td.td_cbp), 2730 (int)le32toh(data->td.td_be))); 2731 2732 #ifdef OHCI_DEBUG 2733 if (ohcidebug > 5) { 2734 ohci_dump_ed(sed); 2735 ohci_dump_tds(data); 2736 } 2737 #endif 2738 2739 /* Insert ED in schedule */ 2740 s = splusb(); 2741 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2742 tdp->xfer = xfer; 2743 } 2744 sed->ed.ed_tailp = htole32(tail->physaddr); 2745 opipe->tail.td = tail; 2746 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2747 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2748 if (xfer->timeout && !sc->sc_bus.use_polling) { 2749 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2750 ohci_timeout, xfer); 2751 } 2752 2753 #if 0 2754 /* This goes wrong if we are too slow. */ 2755 if (ohcidebug > 10) { 2756 delay(10000); 2757 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2758 OREAD4(sc, OHCI_COMMAND_STATUS))); 2759 ohci_dump_ed(sed); 2760 ohci_dump_tds(data); 2761 } 2762 #endif 2763 2764 splx(s); 2765 2766 return (USBD_IN_PROGRESS); 2767 } 2768 2769 Static void 2770 ohci_device_bulk_abort(xfer) 2771 usbd_xfer_handle xfer; 2772 { 2773 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2774 ohci_abort_xfer(xfer, USBD_CANCELLED); 2775 } 2776 2777 /* 2778 * Close a device bulk pipe. 2779 */ 2780 Static void 2781 ohci_device_bulk_close(pipe) 2782 usbd_pipe_handle pipe; 2783 { 2784 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2785 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2786 2787 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2788 ohci_close_pipe(pipe, sc->sc_bulk_head); 2789 ohci_free_std(sc, opipe->tail.td); 2790 } 2791 2792 /************************/ 2793 2794 Static usbd_status 2795 ohci_device_intr_transfer(xfer) 2796 usbd_xfer_handle xfer; 2797 { 2798 usbd_status err; 2799 2800 /* Insert last in queue. */ 2801 err = usb_insert_transfer(xfer); 2802 if (err) 2803 return (err); 2804 2805 /* Pipe isn't running, start first */ 2806 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2807 } 2808 2809 Static usbd_status 2810 ohci_device_intr_start(xfer) 2811 usbd_xfer_handle xfer; 2812 { 2813 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2814 usbd_device_handle dev = opipe->pipe.device; 2815 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2816 ohci_soft_ed_t *sed = opipe->sed; 2817 ohci_soft_td_t *data, *tail; 2818 int len; 2819 int s; 2820 2821 if (sc->sc_dying) 2822 return (USBD_IOERROR); 2823 2824 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2825 "flags=%d priv=%p\n", 2826 xfer, xfer->length, xfer->flags, xfer->priv)); 2827 2828 #ifdef DIAGNOSTIC 2829 if (xfer->rqflags & URQ_REQUEST) 2830 panic("ohci_device_intr_transfer: a request\n"); 2831 #endif 2832 2833 len = xfer->length; 2834 2835 data = opipe->tail.td; 2836 tail = ohci_alloc_std(sc); 2837 if (tail == NULL) 2838 return (USBD_NOMEM); 2839 tail->xfer = NULL; 2840 2841 data->td.td_flags = htole32( 2842 OHCI_TD_IN | OHCI_TD_NOCC | 2843 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2844 if (xfer->flags & USBD_SHORT_XFER_OK) 2845 data->td.td_flags |= htole32(OHCI_TD_R); 2846 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 2847 data->nexttd = tail; 2848 data->td.td_nexttd = htole32(tail->physaddr); 2849 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 2850 data->len = len; 2851 data->xfer = xfer; 2852 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2853 xfer->hcpriv = data; 2854 2855 #ifdef OHCI_DEBUG 2856 if (ohcidebug > 5) { 2857 DPRINTF(("ohci_device_intr_transfer:\n")); 2858 ohci_dump_ed(sed); 2859 ohci_dump_tds(data); 2860 } 2861 #endif 2862 2863 /* Insert ED in schedule */ 2864 s = splusb(); 2865 sed->ed.ed_tailp = htole32(tail->physaddr); 2866 opipe->tail.td = tail; 2867 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2868 2869 #if 0 2870 /* 2871 * This goes horribly wrong, printing thousands of descriptors, 2872 * because false references are followed due to the fact that the 2873 * TD is gone. 2874 */ 2875 if (ohcidebug > 5) { 2876 usb_delay_ms(&sc->sc_bus, 5); 2877 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2878 OREAD4(sc, OHCI_COMMAND_STATUS))); 2879 ohci_dump_ed(sed); 2880 ohci_dump_tds(data); 2881 } 2882 #endif 2883 splx(s); 2884 2885 return (USBD_IN_PROGRESS); 2886 } 2887 2888 /* Abort a device control request. */ 2889 Static void 2890 ohci_device_intr_abort(xfer) 2891 usbd_xfer_handle xfer; 2892 { 2893 if (xfer->pipe->intrxfer == xfer) { 2894 DPRINTF(("ohci_device_intr_abort: remove\n")); 2895 xfer->pipe->intrxfer = NULL; 2896 } 2897 ohci_abort_xfer(xfer, USBD_CANCELLED); 2898 } 2899 2900 /* Close a device interrupt pipe. */ 2901 Static void 2902 ohci_device_intr_close(pipe) 2903 usbd_pipe_handle pipe; 2904 { 2905 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2906 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2907 int nslots = opipe->u.intr.nslots; 2908 int pos = opipe->u.intr.pos; 2909 int j; 2910 ohci_soft_ed_t *p, *sed = opipe->sed; 2911 int s; 2912 2913 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2914 pipe, nslots, pos)); 2915 s = splusb(); 2916 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2917 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2918 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2919 usb_delay_ms(&sc->sc_bus, 2); 2920 2921 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2922 ; 2923 #ifdef DIAGNOSTIC 2924 if (p == NULL) 2925 panic("ohci_device_intr_close: ED not found\n"); 2926 #endif 2927 p->next = sed->next; 2928 p->ed.ed_nexted = sed->ed.ed_nexted; 2929 splx(s); 2930 2931 for (j = 0; j < nslots; j++) 2932 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2933 2934 ohci_free_std(sc, opipe->tail.td); 2935 ohci_free_sed(sc, opipe->sed); 2936 } 2937 2938 Static usbd_status 2939 ohci_device_setintr(sc, opipe, ival) 2940 ohci_softc_t *sc; 2941 struct ohci_pipe *opipe; 2942 int ival; 2943 { 2944 int i, j, s, best; 2945 u_int npoll, slow, shigh, nslots; 2946 u_int bestbw, bw; 2947 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2948 2949 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2950 if (ival == 0) { 2951 printf("ohci_setintr: 0 interval\n"); 2952 return (USBD_INVAL); 2953 } 2954 2955 npoll = OHCI_NO_INTRS; 2956 while (npoll > ival) 2957 npoll /= 2; 2958 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2959 2960 /* 2961 * We now know which level in the tree the ED must go into. 2962 * Figure out which slot has most bandwidth left over. 2963 * Slots to examine: 2964 * npoll 2965 * 1 0 2966 * 2 1 2 2967 * 4 3 4 5 6 2968 * 8 7 8 9 10 11 12 13 14 2969 * N (N-1) .. (N-1+N-1) 2970 */ 2971 slow = npoll-1; 2972 shigh = slow + npoll; 2973 nslots = OHCI_NO_INTRS / npoll; 2974 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2975 bw = 0; 2976 for (j = 0; j < nslots; j++) 2977 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 2978 if (bw < bestbw) { 2979 best = i; 2980 bestbw = bw; 2981 } 2982 } 2983 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2984 best, slow, shigh, bestbw)); 2985 2986 s = splusb(); 2987 hsed = sc->sc_eds[best]; 2988 sed->next = hsed->next; 2989 sed->ed.ed_nexted = hsed->ed.ed_nexted; 2990 hsed->next = sed; 2991 hsed->ed.ed_nexted = htole32(sed->physaddr); 2992 splx(s); 2993 2994 for (j = 0; j < nslots; j++) 2995 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 2996 opipe->u.intr.nslots = nslots; 2997 opipe->u.intr.pos = best; 2998 2999 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3000 return (USBD_NORMAL_COMPLETION); 3001 } 3002 3003 /***********************/ 3004 3005 usbd_status 3006 ohci_device_isoc_transfer(xfer) 3007 usbd_xfer_handle xfer; 3008 { 3009 usbd_status err; 3010 3011 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3012 3013 /* Put it on our queue, */ 3014 err = usb_insert_transfer(xfer); 3015 3016 /* bail out on error, */ 3017 if (err && err != USBD_IN_PROGRESS) 3018 return (err); 3019 3020 /* XXX should check inuse here */ 3021 3022 /* insert into schedule, */ 3023 ohci_device_isoc_enter(xfer); 3024 3025 /* and start if the pipe wasn't running */ 3026 if (!err) 3027 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3028 3029 return (err); 3030 } 3031 3032 void 3033 ohci_device_isoc_enter(xfer) 3034 usbd_xfer_handle xfer; 3035 { 3036 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3037 usbd_device_handle dev = opipe->pipe.device; 3038 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3039 ohci_soft_ed_t *sed = opipe->sed; 3040 struct iso *iso = &opipe->u.iso; 3041 ohci_soft_itd_t *sitd, *nsitd; 3042 ohci_physaddr_t buf, offs, noffs, bp0; 3043 int i, ncur, nframes; 3044 int s; 3045 3046 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3047 "nframes=%d\n", 3048 iso->inuse, iso->next, xfer, xfer->nframes)); 3049 3050 if (sc->sc_dying) 3051 return; 3052 3053 if (iso->next == -1) { 3054 /* Not in use yet, schedule it a few frames ahead. */ 3055 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3056 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3057 iso->next)); 3058 } 3059 3060 sitd = opipe->tail.itd; 3061 buf = DMAADDR(&xfer->dmabuf); 3062 bp0 = OHCI_PAGE(buf); 3063 offs = OHCI_PAGE_OFFSET(buf); 3064 nframes = xfer->nframes; 3065 xfer->hcpriv = sitd; 3066 for (i = ncur = 0; i < nframes; i++, ncur++) { 3067 noffs = offs + xfer->frlengths[i]; 3068 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3069 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3070 3071 /* Allocate next ITD */ 3072 nsitd = ohci_alloc_sitd(sc); 3073 if (nsitd == NULL) { 3074 /* XXX what now? */ 3075 printf("%s: isoc TD alloc failed\n", 3076 USBDEVNAME(sc->sc_bus.bdev)); 3077 return; 3078 } 3079 3080 /* Fill current ITD */ 3081 sitd->itd.itd_flags = htole32( 3082 OHCI_ITD_NOCC | 3083 OHCI_ITD_SET_SF(iso->next) | 3084 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3085 OHCI_ITD_SET_FC(ncur)); 3086 sitd->itd.itd_bp0 = htole32(bp0); 3087 sitd->nextitd = nsitd; 3088 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3089 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3090 sitd->xfer = xfer; 3091 sitd->flags = 0; 3092 3093 sitd = nsitd; 3094 iso->next = iso->next + ncur; 3095 bp0 = OHCI_PAGE(buf + offs); 3096 ncur = 0; 3097 } 3098 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3099 offs = noffs; 3100 } 3101 nsitd = ohci_alloc_sitd(sc); 3102 if (nsitd == NULL) { 3103 /* XXX what now? */ 3104 printf("%s: isoc TD alloc failed\n", 3105 USBDEVNAME(sc->sc_bus.bdev)); 3106 return; 3107 } 3108 /* Fixup last used ITD */ 3109 sitd->itd.itd_flags = htole32( 3110 OHCI_ITD_NOCC | 3111 OHCI_ITD_SET_SF(iso->next) | 3112 OHCI_ITD_SET_DI(0) | 3113 OHCI_ITD_SET_FC(ncur)); 3114 sitd->itd.itd_bp0 = htole32(bp0); 3115 sitd->nextitd = nsitd; 3116 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3117 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3118 sitd->xfer = xfer; 3119 sitd->flags = OHCI_CALL_DONE; 3120 3121 iso->next = iso->next + ncur; 3122 iso->inuse += nframes; 3123 3124 xfer->actlen = offs; /* XXX pretend we did it all */ 3125 3126 xfer->status = USBD_IN_PROGRESS; 3127 3128 #ifdef OHCI_DEBUG 3129 if (ohcidebug > 5) { 3130 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3131 le32toh(sc->sc_hcca->hcca_frame_number))); 3132 ohci_dump_itds(xfer->hcpriv); 3133 ohci_dump_ed(sed); 3134 } 3135 #endif 3136 3137 s = splusb(); 3138 opipe->tail.itd = nsitd; 3139 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3140 splx(s); 3141 3142 #ifdef OHCI_DEBUG 3143 if (ohcidebug > 5) { 3144 delay(150000); 3145 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3146 le32toh(sc->sc_hcca->hcca_frame_number))); 3147 ohci_dump_itds(xfer->hcpriv); 3148 ohci_dump_ed(sed); 3149 } 3150 #endif 3151 } 3152 3153 usbd_status 3154 ohci_device_isoc_start(xfer) 3155 usbd_xfer_handle xfer; 3156 { 3157 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3158 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3159 3160 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3161 3162 if (sc->sc_dying) 3163 return (USBD_IOERROR); 3164 3165 #ifdef DIAGNOSTIC 3166 if (xfer->status != USBD_IN_PROGRESS) 3167 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 3168 #endif 3169 3170 /* XXX anything to do? */ 3171 3172 return (USBD_IN_PROGRESS); 3173 } 3174 3175 void 3176 ohci_device_isoc_abort(xfer) 3177 usbd_xfer_handle xfer; 3178 { 3179 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3180 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3181 ohci_soft_ed_t *sed; 3182 ohci_soft_itd_t *sitd; 3183 int s; 3184 3185 s = splusb(); 3186 3187 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3188 3189 /* Transfer is already done. */ 3190 if (xfer->status != USBD_NOT_STARTED && 3191 xfer->status != USBD_IN_PROGRESS) { 3192 splx(s); 3193 printf("ohci_device_isoc_abort: early return\n"); 3194 return; 3195 } 3196 3197 /* Give xfer the requested abort code. */ 3198 xfer->status = USBD_CANCELLED; 3199 3200 sed = opipe->sed; 3201 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3202 3203 sitd = xfer->hcpriv; 3204 #ifdef DIAGNOSTIC 3205 if (sitd == NULL) { 3206 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3207 return; 3208 } 3209 #endif 3210 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3211 #ifdef DIAGNOSTIC 3212 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3213 sitd->isdone = 1; 3214 #endif 3215 } 3216 3217 splx(s); 3218 3219 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3220 3221 s = splusb(); 3222 3223 /* Run callback. */ 3224 usb_transfer_complete(xfer); 3225 3226 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3227 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3228 3229 splx(s); 3230 } 3231 3232 void 3233 ohci_device_isoc_done(xfer) 3234 usbd_xfer_handle xfer; 3235 { 3236 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3237 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3238 ohci_soft_itd_t *sitd, *nsitd; 3239 3240 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3241 3242 for (sitd = xfer->hcpriv; 3243 !(sitd->flags & OHCI_CALL_DONE); 3244 sitd = nsitd) { 3245 nsitd = sitd->nextitd; 3246 DPRINTFN(1,("ohci_device_isoc_done: free sitd=%p\n", sitd)); 3247 ohci_free_sitd(sc, sitd); 3248 } 3249 ohci_free_sitd(sc, sitd); 3250 xfer->hcpriv = NULL; 3251 } 3252 3253 usbd_status 3254 ohci_setup_isoc(pipe) 3255 usbd_pipe_handle pipe; 3256 { 3257 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3258 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3259 struct iso *iso = &opipe->u.iso; 3260 int s; 3261 3262 iso->next = -1; 3263 iso->inuse = 0; 3264 3265 s = splusb(); 3266 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3267 splx(s); 3268 3269 return (USBD_NORMAL_COMPLETION); 3270 } 3271 3272 void 3273 ohci_device_isoc_close(pipe) 3274 usbd_pipe_handle pipe; 3275 { 3276 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3277 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3278 int s; 3279 3280 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3281 3282 s = splusb(); 3283 ohci_rem_ed(opipe->sed, sc->sc_isoc_head); 3284 splx(s); 3285 ohci_close_pipe(pipe, sc->sc_isoc_head); 3286 #ifdef DIAGNOSTIC 3287 opipe->tail.itd->isdone = 1; 3288 #endif 3289 ohci_free_sitd(sc, opipe->tail.itd); 3290 } 3291
Indexes created Tue Sep 23 07:09:52 GMT 2025