ohci.c revision 1.90
1 /* $NetBSD: ohci.c,v 1.90 2000/05/08 18:28:46 thorpej Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe 45 * USB spec: http://www.usb.org/developers/data/usb11.pdf 46 */ 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/kernel.h> 53 #include <sys/device.h> 54 #include <sys/select.h> 55 #elif defined(__FreeBSD__) 56 #include <sys/module.h> 57 #include <sys/bus.h> 58 #include <machine/bus_pio.h> 59 #include <machine/bus_memio.h> 60 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 61 #include <machine/cpu.h> 62 #endif 63 #endif 64 #include <sys/proc.h> 65 #include <sys/queue.h> 66 67 #include <machine/bus.h> 68 #include <machine/endian.h> 69 70 #include <dev/usb/usb.h> 71 #include <dev/usb/usbdi.h> 72 #include <dev/usb/usbdivar.h> 73 #include <dev/usb/usb_mem.h> 74 #include <dev/usb/usb_quirks.h> 75 76 #include <dev/usb/ohcireg.h> 77 #include <dev/usb/ohcivar.h> 78 79 #if defined(__FreeBSD__) 80 #include <machine/clock.h> 81 82 #define delay(d) DELAY(d) 83 #endif 84 85 #if defined(__OpenBSD__) 86 struct cfdriver ohci_cd = { 87 NULL, "ohci", DV_DULL 88 }; 89 #endif 90 91 #ifdef OHCI_DEBUG 92 #define DPRINTF(x) if (ohcidebug) logprintf x 93 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 94 int ohcidebug = 0; 95 #else 96 #define DPRINTF(x) 97 #define DPRINTFN(n,x) 98 #endif 99 100 /* 101 * The OHCI controller is little endian, so on big endian machines 102 * the data strored in memory needs to be swapped. 103 */ 104 #if defined(__FreeBSD__) || defined(__OpenBSD__) 105 #if BYTE_ORDER == BIG_ENDIAN 106 #define htole32(x) (bswap32(x)) 107 #define le32toh(x) (bswap32(x)) 108 #else 109 #define htole32(x) (x) 110 #define le32toh(x) (x) 111 #endif 112 #endif 113 114 struct ohci_pipe; 115 116 Static ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *)); 117 Static void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *)); 118 119 Static ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *)); 120 Static void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *)); 121 122 Static ohci_soft_itd_t *ohci_alloc_sitd __P((ohci_softc_t *)); 123 Static void ohci_free_sitd __P((ohci_softc_t *,ohci_soft_itd_t *)); 124 125 #if 0 126 Static void ohci_free_std_chain __P((ohci_softc_t *, 127 ohci_soft_td_t *, ohci_soft_td_t *)); 128 #endif 129 Static usbd_status ohci_alloc_std_chain __P((struct ohci_pipe *, 130 ohci_softc_t *, int, int, usbd_xfer_handle, 131 ohci_soft_td_t *, ohci_soft_td_t **)); 132 133 Static void ohci_shutdown __P((void *v)); 134 Static void ohci_power __P((int, void *)); 135 Static usbd_status ohci_open __P((usbd_pipe_handle)); 136 Static void ohci_poll __P((struct usbd_bus *)); 137 Static void ohci_softintr __P((struct usbd_bus *)); 138 Static void ohci_waitintr __P((ohci_softc_t *, usbd_xfer_handle)); 139 Static void ohci_add_done __P((ohci_softc_t *, ohci_physaddr_t)); 140 Static void ohci_rhsc __P((ohci_softc_t *, usbd_xfer_handle)); 141 142 Static usbd_status ohci_device_request __P((usbd_xfer_handle xfer)); 143 Static void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 144 Static void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *)); 145 Static void ohci_hash_add_td __P((ohci_softc_t *, 146 ohci_soft_td_t *)); 147 Static void ohci_hash_rem_td __P((ohci_softc_t *, 148 ohci_soft_td_t *)); 149 Static ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, 150 ohci_physaddr_t)); 151 Static void ohci_hash_add_itd __P((ohci_softc_t *, 152 ohci_soft_itd_t *)); 153 Static void ohci_hash_rem_itd __P((ohci_softc_t *, 154 ohci_soft_itd_t *)); 155 Static ohci_soft_itd_t *ohci_hash_find_itd __P((ohci_softc_t *, 156 ohci_physaddr_t)); 157 158 Static usbd_status ohci_setup_isoc __P((usbd_pipe_handle pipe)); 159 Static void ohci_device_isoc_enter __P((usbd_xfer_handle)); 160 161 Static usbd_status ohci_allocm __P((struct usbd_bus *, usb_dma_t *, 162 u_int32_t)); 163 Static void ohci_freem __P((struct usbd_bus *, usb_dma_t *)); 164 165 Static usbd_xfer_handle ohci_allocx __P((struct usbd_bus *)); 166 Static void ohci_freex __P((struct usbd_bus *, usbd_xfer_handle)); 167 168 Static usbd_status ohci_root_ctrl_transfer __P((usbd_xfer_handle)); 169 Static usbd_status ohci_root_ctrl_start __P((usbd_xfer_handle)); 170 Static void ohci_root_ctrl_abort __P((usbd_xfer_handle)); 171 Static void ohci_root_ctrl_close __P((usbd_pipe_handle)); 172 Static void ohci_root_ctrl_done __P((usbd_xfer_handle)); 173 174 Static usbd_status ohci_root_intr_transfer __P((usbd_xfer_handle)); 175 Static usbd_status ohci_root_intr_start __P((usbd_xfer_handle)); 176 Static void ohci_root_intr_abort __P((usbd_xfer_handle)); 177 Static void ohci_root_intr_close __P((usbd_pipe_handle)); 178 Static void ohci_root_intr_done __P((usbd_xfer_handle)); 179 180 Static usbd_status ohci_device_ctrl_transfer __P((usbd_xfer_handle)); 181 Static usbd_status ohci_device_ctrl_start __P((usbd_xfer_handle)); 182 Static void ohci_device_ctrl_abort __P((usbd_xfer_handle)); 183 Static void ohci_device_ctrl_close __P((usbd_pipe_handle)); 184 Static void ohci_device_ctrl_done __P((usbd_xfer_handle)); 185 186 Static usbd_status ohci_device_bulk_transfer __P((usbd_xfer_handle)); 187 Static usbd_status ohci_device_bulk_start __P((usbd_xfer_handle)); 188 Static void ohci_device_bulk_abort __P((usbd_xfer_handle)); 189 Static void ohci_device_bulk_close __P((usbd_pipe_handle)); 190 Static void ohci_device_bulk_done __P((usbd_xfer_handle)); 191 192 Static usbd_status ohci_device_intr_transfer __P((usbd_xfer_handle)); 193 Static usbd_status ohci_device_intr_start __P((usbd_xfer_handle)); 194 Static void ohci_device_intr_abort __P((usbd_xfer_handle)); 195 Static void ohci_device_intr_close __P((usbd_pipe_handle)); 196 Static void ohci_device_intr_done __P((usbd_xfer_handle)); 197 198 Static usbd_status ohci_device_isoc_transfer __P((usbd_xfer_handle)); 199 Static usbd_status ohci_device_isoc_start __P((usbd_xfer_handle)); 200 Static void ohci_device_isoc_abort __P((usbd_xfer_handle)); 201 Static void ohci_device_isoc_close __P((usbd_pipe_handle)); 202 Static void ohci_device_isoc_done __P((usbd_xfer_handle)); 203 204 Static usbd_status ohci_device_setintr __P((ohci_softc_t *sc, 205 struct ohci_pipe *pipe, int ival)); 206 207 Static int ohci_str __P((usb_string_descriptor_t *, int, char *)); 208 209 Static void ohci_timeout __P((void *)); 210 Static void ohci_rhsc_able __P((ohci_softc_t *, int)); 211 212 Static void ohci_close_pipe __P((usbd_pipe_handle pipe, 213 ohci_soft_ed_t *head)); 214 Static void ohci_abort_xfer __P((usbd_xfer_handle xfer, 215 usbd_status status)); 216 Static void ohci_abort_xfer_end __P((void *)); 217 218 Static void ohci_device_clear_toggle __P((usbd_pipe_handle pipe)); 219 Static void ohci_noop __P((usbd_pipe_handle pipe)); 220 221 #ifdef OHCI_DEBUG 222 Static void ohci_dumpregs __P((ohci_softc_t *)); 223 Static void ohci_dump_tds __P((ohci_soft_td_t *)); 224 Static void ohci_dump_td __P((ohci_soft_td_t *)); 225 Static void ohci_dump_ed __P((ohci_soft_ed_t *)); 226 Static void ohci_dump_itd __P((ohci_soft_itd_t *)); 227 Static void ohci_dump_itds __P((ohci_soft_itd_t *)); 228 #endif 229 230 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 231 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 232 #define OWRITE1(sc, r, x) \ 233 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 234 #define OWRITE2(sc, r, x) \ 235 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 236 #define OWRITE4(sc, r, x) \ 237 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 238 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 239 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 240 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 241 242 /* Reverse the bits in a value 0 .. 31 */ 243 Static u_int8_t revbits[OHCI_NO_INTRS] = 244 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 245 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 246 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 247 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 248 249 struct ohci_pipe { 250 struct usbd_pipe pipe; 251 ohci_soft_ed_t *sed; 252 union { 253 ohci_soft_td_t *td; 254 ohci_soft_itd_t *itd; 255 } tail; 256 /* Info needed for different pipe kinds. */ 257 union { 258 /* Control pipe */ 259 struct { 260 usb_dma_t reqdma; 261 u_int length; 262 ohci_soft_td_t *setup, *data, *stat; 263 } ctl; 264 /* Interrupt pipe */ 265 struct { 266 int nslots; 267 int pos; 268 } intr; 269 /* Bulk pipe */ 270 struct { 271 u_int length; 272 int isread; 273 } bulk; 274 /* Iso pipe */ 275 struct iso { 276 int next, inuse; 277 } iso; 278 } u; 279 }; 280 281 #define OHCI_INTR_ENDPT 1 282 283 Static struct usbd_bus_methods ohci_bus_methods = { 284 ohci_open, 285 ohci_softintr, 286 ohci_poll, 287 ohci_allocm, 288 ohci_freem, 289 ohci_allocx, 290 ohci_freex, 291 }; 292 293 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 294 ohci_root_ctrl_transfer, 295 ohci_root_ctrl_start, 296 ohci_root_ctrl_abort, 297 ohci_root_ctrl_close, 298 ohci_noop, 299 ohci_root_ctrl_done, 300 }; 301 302 Static struct usbd_pipe_methods ohci_root_intr_methods = { 303 ohci_root_intr_transfer, 304 ohci_root_intr_start, 305 ohci_root_intr_abort, 306 ohci_root_intr_close, 307 ohci_noop, 308 ohci_root_intr_done, 309 }; 310 311 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 312 ohci_device_ctrl_transfer, 313 ohci_device_ctrl_start, 314 ohci_device_ctrl_abort, 315 ohci_device_ctrl_close, 316 ohci_noop, 317 ohci_device_ctrl_done, 318 }; 319 320 Static struct usbd_pipe_methods ohci_device_intr_methods = { 321 ohci_device_intr_transfer, 322 ohci_device_intr_start, 323 ohci_device_intr_abort, 324 ohci_device_intr_close, 325 ohci_device_clear_toggle, 326 ohci_device_intr_done, 327 }; 328 329 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 330 ohci_device_bulk_transfer, 331 ohci_device_bulk_start, 332 ohci_device_bulk_abort, 333 ohci_device_bulk_close, 334 ohci_device_clear_toggle, 335 ohci_device_bulk_done, 336 }; 337 338 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 339 ohci_device_isoc_transfer, 340 ohci_device_isoc_start, 341 ohci_device_isoc_abort, 342 ohci_device_isoc_close, 343 ohci_noop, 344 ohci_device_isoc_done, 345 }; 346 347 #if defined(__NetBSD__) || defined(__OpenBSD__) 348 int 349 ohci_activate(self, act) 350 device_ptr_t self; 351 enum devact act; 352 { 353 struct ohci_softc *sc = (struct ohci_softc *)self; 354 int rv = 0; 355 356 switch (act) { 357 case DVACT_ACTIVATE: 358 return (EOPNOTSUPP); 359 break; 360 361 case DVACT_DEACTIVATE: 362 if (sc->sc_child != NULL) 363 rv = config_deactivate(sc->sc_child); 364 sc->sc_dying = 1; 365 break; 366 } 367 return (rv); 368 } 369 370 int 371 ohci_detach(sc, flags) 372 struct ohci_softc *sc; 373 int flags; 374 { 375 int rv = 0; 376 377 if (sc->sc_child != NULL) 378 rv = config_detach(sc->sc_child, flags); 379 380 if (rv != 0) 381 return (rv); 382 383 #if defined(__NetBSD__) || defined(__OpenBSD__) 384 powerhook_disestablish(sc->sc_powerhook); 385 shutdownhook_disestablish(sc->sc_shutdownhook); 386 #endif 387 388 /* free data structures XXX */ 389 390 return (rv); 391 } 392 #endif 393 394 ohci_soft_ed_t * 395 ohci_alloc_sed(sc) 396 ohci_softc_t *sc; 397 { 398 ohci_soft_ed_t *sed; 399 usbd_status err; 400 int i, offs; 401 usb_dma_t dma; 402 403 if (sc->sc_freeeds == NULL) { 404 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 405 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 406 OHCI_ED_ALIGN, &dma); 407 if (err) 408 return (0); 409 for(i = 0; i < OHCI_SED_CHUNK; i++) { 410 offs = i * OHCI_SED_SIZE; 411 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 412 sed->physaddr = DMAADDR(&dma) + offs; 413 sed->next = sc->sc_freeeds; 414 sc->sc_freeeds = sed; 415 } 416 } 417 sed = sc->sc_freeeds; 418 sc->sc_freeeds = sed->next; 419 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 420 sed->next = 0; 421 return (sed); 422 } 423 424 void 425 ohci_free_sed(sc, sed) 426 ohci_softc_t *sc; 427 ohci_soft_ed_t *sed; 428 { 429 sed->next = sc->sc_freeeds; 430 sc->sc_freeeds = sed; 431 } 432 433 ohci_soft_td_t * 434 ohci_alloc_std(sc) 435 ohci_softc_t *sc; 436 { 437 ohci_soft_td_t *std; 438 usbd_status err; 439 int i, offs; 440 usb_dma_t dma; 441 int s; 442 443 if (sc->sc_freetds == NULL) { 444 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 445 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 446 OHCI_TD_ALIGN, &dma); 447 if (err) 448 return (NULL); 449 s = splusb(); 450 for(i = 0; i < OHCI_STD_CHUNK; i++) { 451 offs = i * OHCI_STD_SIZE; 452 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 453 std->physaddr = DMAADDR(&dma) + offs; 454 std->nexttd = sc->sc_freetds; 455 sc->sc_freetds = std; 456 } 457 splx(s); 458 } 459 460 s = splusb(); 461 std = sc->sc_freetds; 462 sc->sc_freetds = std->nexttd; 463 memset(&std->td, 0, sizeof(ohci_td_t)); 464 std->nexttd = NULL; 465 std->xfer = NULL; 466 ohci_hash_add_td(sc, std); 467 splx(s); 468 469 return (std); 470 } 471 472 void 473 ohci_free_std(sc, std) 474 ohci_softc_t *sc; 475 ohci_soft_td_t *std; 476 { 477 int s; 478 479 s = splusb(); 480 ohci_hash_rem_td(sc, std); 481 std->nexttd = sc->sc_freetds; 482 sc->sc_freetds = std; 483 splx(s); 484 } 485 486 usbd_status 487 ohci_alloc_std_chain(opipe, sc, alen, rd, xfer, sp, ep) 488 struct ohci_pipe *opipe; 489 ohci_softc_t *sc; 490 int alen, rd; 491 usbd_xfer_handle xfer; 492 ohci_soft_td_t *sp, **ep; 493 { 494 ohci_soft_td_t *next, *cur; 495 ohci_physaddr_t dataphys, dataphysend; 496 u_int32_t tdflags; 497 int len, curlen; 498 usb_dma_t *dma = &xfer->dmabuf; 499 u_int16_t flags = xfer->flags; 500 501 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 502 503 len = alen; 504 cur = sp; 505 dataphys = DMAADDR(dma); 506 dataphysend = OHCI_PAGE(dataphys + len - 1); 507 tdflags = htole32( 508 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 509 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 510 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 511 512 for (;;) { 513 next = ohci_alloc_std(sc); 514 if (next == NULL) 515 goto nomem; 516 517 /* The OHCI hardware can handle at most one page crossing. */ 518 if (OHCI_PAGE(dataphys) == dataphysend || 519 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 520 /* we can handle it in this TD */ 521 curlen = len; 522 } else { 523 /* must use multiple TDs, fill as much as possible. */ 524 curlen = 2 * OHCI_PAGE_SIZE - 525 (dataphys & (OHCI_PAGE_SIZE-1)); 526 /* the length must be a multiple of the max size */ 527 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 528 #ifdef DIAGNOSTIC 529 if (curlen == 0) 530 panic("ohci_alloc_std: curlen == 0\n"); 531 #endif 532 } 533 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 534 "dataphysend=0x%08x len=%d curlen=%d\n", 535 dataphys, dataphysend, 536 len, curlen)); 537 len -= curlen; 538 539 cur->td.td_flags = tdflags; 540 cur->td.td_cbp = htole32(dataphys); 541 cur->nexttd = next; 542 cur->td.td_nexttd = htole32(next->physaddr); 543 cur->td.td_be = htole32(dataphys + curlen - 1); 544 cur->len = curlen; 545 cur->flags = OHCI_ADD_LEN; 546 cur->xfer = xfer; 547 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 548 dataphys, dataphys + curlen - 1)); 549 if (len == 0) 550 break; 551 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 552 dataphys += curlen; 553 cur = next; 554 } 555 if ((flags & USBD_FORCE_SHORT_XFER) && 556 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 557 /* Force a 0 length transfer at the end. */ 558 559 cur = next; 560 next = ohci_alloc_std(sc); 561 if (next == NULL) 562 goto nomem; 563 564 cur->td.td_flags = tdflags; 565 cur->td.td_cbp = 0; /* indicate 0 length packet */ 566 cur->nexttd = next; 567 cur->td.td_nexttd = htole32(next->physaddr); 568 cur->td.td_be = ~0; 569 cur->len = 0; 570 cur->flags = 0; 571 cur->xfer = xfer; 572 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 573 } 574 *ep = cur; 575 576 return (USBD_NORMAL_COMPLETION); 577 578 nomem: 579 /* XXX free chain */ 580 return (USBD_NOMEM); 581 } 582 583 #if 0 584 Static void 585 ohci_free_std_chain(sc, std, stdend) 586 ohci_softc_t *sc; 587 ohci_soft_td_t *std; 588 ohci_soft_td_t *stdend; 589 { 590 ohci_soft_td_t *p; 591 592 for (; std != stdend; std = p) { 593 p = std->nexttd; 594 ohci_free_std(sc, std); 595 } 596 } 597 #endif 598 599 ohci_soft_itd_t * 600 ohci_alloc_sitd(sc) 601 ohci_softc_t *sc; 602 { 603 ohci_soft_itd_t *sitd; 604 usbd_status err; 605 int i, s, offs; 606 usb_dma_t dma; 607 608 if (sc->sc_freeitds == NULL) { 609 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 610 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 611 OHCI_ITD_ALIGN, &dma); 612 if (err) 613 return (NULL); 614 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 615 offs = i * OHCI_SITD_SIZE; 616 sitd = (ohci_soft_itd_t *)((char*)KERNADDR(&dma)+offs); 617 sitd->physaddr = DMAADDR(&dma) + offs; 618 sitd->nextitd = sc->sc_freeitds; 619 sc->sc_freeitds = sitd; 620 } 621 } 622 623 s = splusb(); 624 sitd = sc->sc_freeitds; 625 sc->sc_freeitds = sitd->nextitd; 626 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 627 sitd->nextitd = NULL; 628 sitd->xfer = NULL; 629 ohci_hash_add_itd(sc, sitd); 630 splx(s); 631 632 #ifdef DIAGNOSTIC 633 sitd->isdone = 0; 634 #endif 635 636 return (sitd); 637 } 638 639 void 640 ohci_free_sitd(sc, sitd) 641 ohci_softc_t *sc; 642 ohci_soft_itd_t *sitd; 643 { 644 int s; 645 646 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 647 648 #ifdef DIAGNOSTIC 649 if (!sitd->isdone) { 650 panic("ohci_free_sitd: sitd=%p not done\n", sitd); 651 return; 652 } 653 #endif 654 655 s = splusb(); 656 ohci_hash_rem_itd(sc, sitd); 657 sitd->nextitd = sc->sc_freeitds; 658 sc->sc_freeitds = sitd; 659 splx(s); 660 } 661 662 usbd_status 663 ohci_init(sc) 664 ohci_softc_t *sc; 665 { 666 ohci_soft_ed_t *sed, *psed; 667 usbd_status err; 668 int i; 669 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 670 671 DPRINTF(("ohci_init: start\n")); 672 #if defined(__OpenBSD__) 673 printf(","); 674 #else 675 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 676 #endif 677 rev = OREAD4(sc, OHCI_REVISION); 678 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 679 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 680 681 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 682 printf("%s: unsupported OHCI revision\n", 683 USBDEVNAME(sc->sc_bus.bdev)); 684 sc->sc_bus.usbrev = USBREV_UNKNOWN; 685 return (USBD_INVAL); 686 } 687 sc->sc_bus.usbrev = USBREV_1_0; 688 689 for (i = 0; i < OHCI_HASH_SIZE; i++) 690 LIST_INIT(&sc->sc_hash_tds[i]); 691 for (i = 0; i < OHCI_HASH_SIZE; i++) 692 LIST_INIT(&sc->sc_hash_itds[i]); 693 694 SIMPLEQ_INIT(&sc->sc_free_xfers); 695 696 /* XXX determine alignment by R/W */ 697 /* Allocate the HCCA area. */ 698 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 699 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 700 if (err) 701 return (err); 702 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 703 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 704 705 sc->sc_eintrs = OHCI_NORMAL_INTRS; 706 707 /* Allocate dummy ED that starts the control list. */ 708 sc->sc_ctrl_head = ohci_alloc_sed(sc); 709 if (sc->sc_ctrl_head == NULL) { 710 err = USBD_NOMEM; 711 goto bad1; 712 } 713 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 714 715 /* Allocate dummy ED that starts the bulk list. */ 716 sc->sc_bulk_head = ohci_alloc_sed(sc); 717 if (sc->sc_bulk_head == NULL) { 718 err = USBD_NOMEM; 719 goto bad2; 720 } 721 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 722 723 /* Allocate dummy ED that starts the isochronous list. */ 724 sc->sc_isoc_head = ohci_alloc_sed(sc); 725 if (sc->sc_isoc_head == NULL) { 726 err = USBD_NOMEM; 727 goto bad3; 728 } 729 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 730 731 /* Allocate all the dummy EDs that make up the interrupt tree. */ 732 for (i = 0; i < OHCI_NO_EDS; i++) { 733 sed = ohci_alloc_sed(sc); 734 if (sed == NULL) { 735 while (--i >= 0) 736 ohci_free_sed(sc, sc->sc_eds[i]); 737 err = USBD_NOMEM; 738 goto bad4; 739 } 740 /* All ED fields are set to 0. */ 741 sc->sc_eds[i] = sed; 742 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 743 if (i != 0) 744 psed = sc->sc_eds[(i-1) / 2]; 745 else 746 psed= sc->sc_isoc_head; 747 sed->next = psed; 748 sed->ed.ed_nexted = htole32(psed->physaddr); 749 } 750 /* 751 * Fill HCCA interrupt table. The bit reversal is to get 752 * the tree set up properly to spread the interrupts. 753 */ 754 for (i = 0; i < OHCI_NO_INTRS; i++) 755 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 756 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 757 758 #ifdef OHCI_DEBUG 759 if (ohcidebug > 15) { 760 for (i = 0; i < OHCI_NO_EDS; i++) { 761 printf("ed#%d ", i); 762 ohci_dump_ed(sc->sc_eds[i]); 763 } 764 printf("iso "); 765 ohci_dump_ed(sc->sc_isoc_head); 766 } 767 #endif 768 769 /* Determine in what context we are running. */ 770 ctl = OREAD4(sc, OHCI_CONTROL); 771 if (ctl & OHCI_IR) { 772 /* SMM active, request change */ 773 DPRINTF(("ohci_init: SMM active, request owner change\n")); 774 s = OREAD4(sc, OHCI_COMMAND_STATUS); 775 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 776 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 777 usb_delay_ms(&sc->sc_bus, 1); 778 ctl = OREAD4(sc, OHCI_CONTROL); 779 } 780 if ((ctl & OHCI_IR) == 0) { 781 printf("%s: SMM does not respond, resetting\n", 782 USBDEVNAME(sc->sc_bus.bdev)); 783 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 784 goto reset; 785 } 786 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 787 /* BIOS started controller. */ 788 DPRINTF(("ohci_init: BIOS active\n")); 789 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 790 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 791 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 792 } 793 } else { 794 DPRINTF(("ohci_init: cold started\n")); 795 reset: 796 /* Controller was cold started. */ 797 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 798 } 799 800 /* 801 * This reset should not be necessary according to the OHCI spec, but 802 * without it some controllers do not start. 803 */ 804 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 805 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 806 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 807 808 /* We now own the host controller and the bus has been reset. */ 809 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 810 811 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 812 /* Nominal time for a reset is 10 us. */ 813 for (i = 0; i < 10; i++) { 814 delay(10); 815 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 816 if (!hcr) 817 break; 818 } 819 if (hcr) { 820 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 821 err = USBD_IOERROR; 822 goto bad5; 823 } 824 #ifdef OHCI_DEBUG 825 if (ohcidebug > 15) 826 ohci_dumpregs(sc); 827 #endif 828 829 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 830 831 /* Set up HC registers. */ 832 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 833 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 834 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 835 /* disable all interrupts and then switch on all desired interrupts */ 836 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 837 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 838 /* switch on desired functional features */ 839 ctl = OREAD4(sc, OHCI_CONTROL); 840 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 841 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 842 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 843 /* And finally start it! */ 844 OWRITE4(sc, OHCI_CONTROL, ctl); 845 846 /* 847 * The controller is now OPERATIONAL. Set a some final 848 * registers that should be set earlier, but that the 849 * controller ignores when in the SUSPEND state. 850 */ 851 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 852 fm |= OHCI_FSMPS(ival) | ival; 853 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 854 per = OHCI_PERIODIC(ival); /* 90% periodic */ 855 OWRITE4(sc, OHCI_PERIODIC_START, per); 856 857 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 858 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 859 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 860 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 861 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 862 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 863 864 /* 865 * The AMD756 requires a delay before re-reading the register, 866 * otherwise it will occasionally report 0 ports. 867 */ 868 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 869 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 870 871 #ifdef OHCI_DEBUG 872 if (ohcidebug > 5) 873 ohci_dumpregs(sc); 874 #endif 875 876 /* Set up the bus struct. */ 877 sc->sc_bus.methods = &ohci_bus_methods; 878 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 879 880 #if defined(__NetBSD__) || defined(__OpenBSD__) 881 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 882 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 883 #endif 884 885 return (USBD_NORMAL_COMPLETION); 886 887 bad5: 888 for (i = 0; i < OHCI_NO_EDS; i++) 889 ohci_free_sed(sc, sc->sc_eds[i]); 890 bad4: 891 ohci_free_sed(sc, sc->sc_isoc_head); 892 bad3: 893 ohci_free_sed(sc, sc->sc_ctrl_head); 894 bad2: 895 ohci_free_sed(sc, sc->sc_bulk_head); 896 bad1: 897 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 898 return (err); 899 } 900 901 usbd_status 902 ohci_allocm(bus, dma, size) 903 struct usbd_bus *bus; 904 usb_dma_t *dma; 905 u_int32_t size; 906 { 907 #if defined(__NetBSD__) || defined(__OpenBSD__) 908 struct ohci_softc *sc = (struct ohci_softc *)bus; 909 #endif 910 911 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 912 } 913 914 void 915 ohci_freem(bus, dma) 916 struct usbd_bus *bus; 917 usb_dma_t *dma; 918 { 919 #if defined(__NetBSD__) || defined(__OpenBSD__) 920 struct ohci_softc *sc = (struct ohci_softc *)bus; 921 #endif 922 923 usb_freemem(&sc->sc_bus, dma); 924 } 925 926 usbd_xfer_handle 927 ohci_allocx(bus) 928 struct usbd_bus *bus; 929 { 930 struct ohci_softc *sc = (struct ohci_softc *)bus; 931 usbd_xfer_handle xfer; 932 933 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 934 if (xfer != NULL) 935 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 936 else 937 xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT); 938 if (xfer != NULL) 939 memset(xfer, 0, sizeof *xfer); 940 return (xfer); 941 } 942 943 void 944 ohci_freex(bus, xfer) 945 struct usbd_bus *bus; 946 usbd_xfer_handle xfer; 947 { 948 struct ohci_softc *sc = (struct ohci_softc *)bus; 949 950 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 951 } 952 953 /* 954 * Shut down the controller when the system is going down. 955 */ 956 void 957 ohci_shutdown(v) 958 void *v; 959 { 960 ohci_softc_t *sc = v; 961 962 DPRINTF(("ohci_shutdown: stopping the HC\n")); 963 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 964 } 965 966 /* 967 * Handle suspend/resume. 968 * 969 * We need to switch to polling mode here, because this routine is 970 * called from an intterupt context. This is all right since we 971 * are almost suspended anyway. 972 */ 973 void 974 ohci_power(why, v) 975 int why; 976 void *v; 977 { 978 #ifdef OHCI_DEBUG 979 ohci_softc_t *sc = v; 980 981 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 982 /* XXX should suspend/resume */ 983 ohci_dumpregs(sc); 984 #endif 985 } 986 987 #ifdef OHCI_DEBUG 988 void 989 ohci_dumpregs(sc) 990 ohci_softc_t *sc; 991 { 992 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 993 OREAD4(sc, OHCI_REVISION), 994 OREAD4(sc, OHCI_CONTROL), 995 OREAD4(sc, OHCI_COMMAND_STATUS))); 996 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 997 OREAD4(sc, OHCI_INTERRUPT_STATUS), 998 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 999 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1000 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1001 OREAD4(sc, OHCI_HCCA), 1002 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1003 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1004 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1005 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1006 OREAD4(sc, OHCI_BULK_HEAD_ED), 1007 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1008 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1009 OREAD4(sc, OHCI_DONE_HEAD), 1010 OREAD4(sc, OHCI_FM_INTERVAL), 1011 OREAD4(sc, OHCI_FM_REMAINING))); 1012 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1013 OREAD4(sc, OHCI_FM_NUMBER), 1014 OREAD4(sc, OHCI_PERIODIC_START), 1015 OREAD4(sc, OHCI_LS_THRESHOLD))); 1016 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1017 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1018 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1019 OREAD4(sc, OHCI_RH_STATUS))); 1020 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1021 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1022 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1023 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1024 le32toh(sc->sc_hcca->hcca_frame_number), 1025 le32toh(sc->sc_hcca->hcca_done_head))); 1026 } 1027 #endif 1028 1029 Static int ohci_intr1 __P((ohci_softc_t *)); 1030 1031 int 1032 ohci_intr(p) 1033 void *p; 1034 { 1035 ohci_softc_t *sc = p; 1036 1037 /* If we get an interrupt while polling, then just ignore it. */ 1038 if (sc->sc_bus.use_polling) { 1039 #ifdef DIAGNOSTIC 1040 printf("ohci_intr: ignored interrupt while polling\n"); 1041 #endif 1042 return (0); 1043 } 1044 1045 return (ohci_intr1(sc)); 1046 } 1047 1048 Static int 1049 ohci_intr1(sc) 1050 ohci_softc_t *sc; 1051 { 1052 u_int32_t intrs, eintrs; 1053 ohci_physaddr_t done; 1054 1055 /* In case the interrupt occurs before initialization has completed. */ 1056 if (sc == NULL || sc->sc_hcca == NULL) { 1057 #ifdef DIAGNOSTIC 1058 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1059 #endif 1060 return (0); 1061 } 1062 1063 intrs = 0; 1064 done = le32toh(sc->sc_hcca->hcca_done_head); 1065 if (done != 0) { 1066 if (done & ~OHCI_DONE_INTRS) 1067 intrs = OHCI_WDH; 1068 if (done & OHCI_DONE_INTRS) 1069 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1070 } else 1071 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1072 1073 if (!intrs) 1074 return (0); 1075 1076 intrs &= ~OHCI_MIE; 1077 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1078 eintrs = intrs & sc->sc_eintrs; 1079 if (!eintrs) 1080 return (0); 1081 1082 sc->sc_bus.intr_context++; 1083 sc->sc_bus.no_intrs++; 1084 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1085 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1086 (u_int)eintrs)); 1087 1088 if (eintrs & OHCI_SO) { 1089 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev)); 1090 /* XXX do what */ 1091 intrs &= ~OHCI_SO; 1092 } 1093 if (eintrs & OHCI_WDH) { 1094 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1095 sc->sc_hcca->hcca_done_head = 0; 1096 usb_schedsoftintr(&sc->sc_bus); 1097 intrs &= ~OHCI_WDH; 1098 } 1099 if (eintrs & OHCI_RD) { 1100 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1101 /* XXX process resume detect */ 1102 } 1103 if (eintrs & OHCI_UE) { 1104 printf("%s: unrecoverable error, controller halted\n", 1105 USBDEVNAME(sc->sc_bus.bdev)); 1106 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1107 /* XXX what else */ 1108 } 1109 if (eintrs & OHCI_RHSC) { 1110 ohci_rhsc(sc, sc->sc_intrxfer); 1111 intrs &= ~OHCI_RHSC; 1112 1113 /* 1114 * Disable RHSC interrupt for now, because it will be 1115 * on until the port has been reset. 1116 */ 1117 ohci_rhsc_able(sc, 0); 1118 } 1119 1120 sc->sc_bus.intr_context--; 1121 1122 /* Block unprocessed interrupts. XXX */ 1123 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 1124 sc->sc_eintrs &= ~intrs; 1125 1126 return (1); 1127 } 1128 1129 void 1130 ohci_rhsc_able(sc, on) 1131 ohci_softc_t *sc; 1132 int on; 1133 { 1134 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1135 if (on) { 1136 sc->sc_eintrs |= OHCI_RHSC; 1137 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1138 } else { 1139 sc->sc_eintrs &= ~OHCI_RHSC; 1140 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1141 } 1142 } 1143 1144 #ifdef OHCI_DEBUG 1145 char *ohci_cc_strs[] = { 1146 "NO_ERROR", 1147 "CRC", 1148 "BIT_STUFFING", 1149 "DATA_TOGGLE_MISMATCH", 1150 "STALL", 1151 "DEVICE_NOT_RESPONDING", 1152 "PID_CHECK_FAILURE", 1153 "UNEXPECTED_PID", 1154 "DATA_OVERRUN", 1155 "DATA_UNDERRUN", 1156 "BUFFER_OVERRUN", 1157 "BUFFER_UNDERRUN", 1158 "reserved", 1159 "reserved", 1160 "NOT_ACCESSED", 1161 "NOT_ACCESSED", 1162 }; 1163 #endif 1164 1165 void 1166 ohci_add_done(sc, done) 1167 ohci_softc_t *sc; 1168 ohci_physaddr_t done; 1169 { 1170 ohci_soft_itd_t *sitd, *sidone, **ip; 1171 ohci_soft_td_t *std, *sdone, **p; 1172 1173 /* Reverse the done list. */ 1174 for (sdone = NULL, sidone = NULL; done != 0; ) { 1175 std = ohci_hash_find_td(sc, done); 1176 if (std != NULL) { 1177 std->dnext = sdone; 1178 done = le32toh(std->td.td_nexttd); 1179 sdone = std; 1180 DPRINTFN(10,("add TD %p\n", std)); 1181 continue; 1182 } 1183 sitd = ohci_hash_find_itd(sc, done); 1184 if (sitd != NULL) { 1185 sitd->dnext = sidone; 1186 done = le32toh(sitd->itd.itd_nextitd); 1187 sidone = sitd; 1188 DPRINTFN(5,("add ITD %p\n", sitd)); 1189 continue; 1190 } 1191 panic("ohci_add_done: addr 0x%08lx not found\n", (u_long)done); 1192 } 1193 1194 /* sdone & sidone now hold the done lists. */ 1195 /* Put them on the already processed lists. */ 1196 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1197 ; 1198 *p = sdone; 1199 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1200 ; 1201 *ip = sidone; 1202 } 1203 1204 void baaz(void); 1205 void baaz(void) {} 1206 1207 void 1208 ohci_softintr(bus) 1209 struct usbd_bus *bus; 1210 { 1211 ohci_softc_t *sc = (ohci_softc_t *)bus; 1212 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1213 ohci_soft_td_t *std, *sdone, *stdnext; 1214 usbd_xfer_handle xfer; 1215 int len, cc, s; 1216 1217 sc->sc_bus.intr_context++; 1218 1219 s = splhardusb(); 1220 sdone = sc->sc_sdone; 1221 sc->sc_sdone = NULL; 1222 sidone = sc->sc_sidone; 1223 sc->sc_sidone = NULL; 1224 splx(s); 1225 1226 DPRINTFN(10,("ohci_process_done: sdone=%p sidone=%p\n", sdone, sidone)); 1227 1228 #ifdef OHCI_DEBUG 1229 if (ohcidebug > 10) { 1230 DPRINTF(("ohci_process_done: TD done:\n")); 1231 ohci_dump_tds(sdone); 1232 } 1233 #endif 1234 1235 for (std = sdone; std; std = stdnext) { 1236 xfer = std->xfer; 1237 stdnext = std->dnext; 1238 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1239 std, xfer, xfer ? xfer->hcpriv : 0)); 1240 if (xfer == NULL) { 1241 /* xfer == NULL: There seems to be no xfer associated 1242 * with this TD. It is tailp that happened to end up on 1243 * the done queue. 1244 */ 1245 continue; 1246 } 1247 if (xfer->status == USBD_CANCELLED || 1248 xfer->status == USBD_TIMEOUT) { 1249 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1250 xfer)); 1251 /* Handled by abort routine. */ 1252 continue; 1253 } 1254 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1255 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1256 if (cc == OHCI_CC_NO_ERROR) { 1257 len = std->len; 1258 if (std->td.td_cbp != 0) 1259 len -= le32toh(std->td.td_be) - 1260 le32toh(std->td.td_cbp) + 1; 1261 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", 1262 len, std->flags)); 1263 if (std->flags & OHCI_ADD_LEN) 1264 xfer->actlen += len; 1265 if (std->flags & OHCI_CALL_DONE) { 1266 xfer->status = USBD_NORMAL_COMPLETION; 1267 usb_transfer_complete(xfer); 1268 } 1269 ohci_free_std(sc, std); 1270 } else { 1271 /* 1272 * Endpoint is halted. First unlink all the TDs 1273 * belonging to the failed transfer, and then restart 1274 * the endpoint. 1275 */ 1276 ohci_soft_td_t *p, *n; 1277 struct ohci_pipe *opipe = 1278 (struct ohci_pipe *)xfer->pipe; 1279 1280 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1281 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1282 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1283 1284 /* remove TDs */ 1285 for (p = std; p->xfer == xfer; p = n) { 1286 n = p->nexttd; 1287 ohci_free_std(sc, p); 1288 } 1289 1290 /* clear halt */ 1291 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1292 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1293 1294 if (cc == OHCI_CC_STALL) 1295 xfer->status = USBD_STALLED; 1296 else 1297 xfer->status = USBD_IOERROR; 1298 usb_transfer_complete(xfer); 1299 } 1300 } 1301 1302 #ifdef OHCI_DEBUG 1303 if (ohcidebug > 10) { 1304 DPRINTF(("ohci_process_done: ITD done:\n")); 1305 ohci_dump_itds(sidone); 1306 } 1307 #endif 1308 1309 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1310 xfer = sitd->xfer; 1311 sitdnext = sitd->dnext; 1312 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1313 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1314 if (xfer == NULL) 1315 continue; 1316 if (xfer->status == USBD_CANCELLED || 1317 xfer->status == USBD_TIMEOUT) { 1318 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1319 xfer)); 1320 /* Handled by abort routine. */ 1321 continue; 1322 } 1323 #ifdef DIAGNOSTIC 1324 if (sitd->isdone) 1325 printf("ohci_softintr: sitd=%p is done\n", sitd); 1326 sitd->isdone = 1; 1327 #endif 1328 cc = OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)); 1329 if (cc == OHCI_CC_NO_ERROR) { 1330 /* XXX compute length for input */ 1331 struct ohci_pipe *opipe = 1332 (struct ohci_pipe *)xfer->pipe; 1333 if (sitd->flags & OHCI_CALL_DONE) { 1334 opipe->u.iso.inuse -= xfer->nframes; 1335 /* XXX xfer->actlen = actlen; */ 1336 xfer->status = USBD_NORMAL_COMPLETION; 1337 usb_transfer_complete(xfer); 1338 } 1339 } else { 1340 /* XXX Do more */ 1341 xfer->status = USBD_IOERROR; 1342 usb_transfer_complete(xfer); 1343 } 1344 } 1345 1346 sc->sc_bus.intr_context--; 1347 } 1348 1349 void 1350 ohci_device_ctrl_done(xfer) 1351 usbd_xfer_handle xfer; 1352 { 1353 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1354 1355 #ifdef DIAGNOSTIC 1356 if (!(xfer->rqflags & URQ_REQUEST)) { 1357 panic("ohci_ctrl_done: not a request\n"); 1358 } 1359 #endif 1360 xfer->hcpriv = NULL; 1361 } 1362 1363 void 1364 ohci_device_intr_done(xfer) 1365 usbd_xfer_handle xfer; 1366 { 1367 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1368 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1369 ohci_soft_ed_t *sed = opipe->sed; 1370 ohci_soft_td_t *data, *tail; 1371 1372 1373 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1374 xfer, xfer->actlen)); 1375 1376 xfer->hcpriv = NULL; 1377 1378 if (xfer->pipe->repeat) { 1379 data = opipe->tail.td; 1380 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1381 if (tail == NULL) { 1382 xfer->status = USBD_NOMEM; 1383 return; 1384 } 1385 tail->xfer = NULL; 1386 1387 data->td.td_flags = htole32( 1388 OHCI_TD_IN | OHCI_TD_NOCC | 1389 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1390 if (xfer->flags & USBD_SHORT_XFER_OK) 1391 data->td.td_flags |= htole32(OHCI_TD_R); 1392 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 1393 data->nexttd = tail; 1394 data->td.td_nexttd = htole32(tail->physaddr); 1395 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1396 xfer->length - 1); 1397 data->len = xfer->length; 1398 data->xfer = xfer; 1399 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1400 xfer->hcpriv = data; 1401 xfer->actlen = 0; 1402 1403 sed->ed.ed_tailp = htole32(tail->physaddr); 1404 opipe->tail.td = tail; 1405 } 1406 } 1407 1408 void 1409 ohci_device_bulk_done(xfer) 1410 usbd_xfer_handle xfer; 1411 { 1412 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1413 xfer, xfer->actlen)); 1414 1415 xfer->hcpriv = NULL; 1416 } 1417 1418 void 1419 ohci_rhsc(sc, xfer) 1420 ohci_softc_t *sc; 1421 usbd_xfer_handle xfer; 1422 { 1423 usbd_pipe_handle pipe; 1424 struct ohci_pipe *opipe; 1425 u_char *p; 1426 int i, m; 1427 int hstatus; 1428 1429 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1430 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1431 sc, xfer, hstatus)); 1432 1433 if (xfer == NULL) { 1434 /* Just ignore the change. */ 1435 return; 1436 } 1437 1438 pipe = xfer->pipe; 1439 opipe = (struct ohci_pipe *)pipe; 1440 1441 p = KERNADDR(&xfer->dmabuf); 1442 m = min(sc->sc_noport, xfer->length * 8 - 1); 1443 memset(p, 0, xfer->length); 1444 for (i = 1; i <= m; i++) { 1445 /* Pick out CHANGE bits from the status reg. */ 1446 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1447 p[i/8] |= 1 << (i%8); 1448 } 1449 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1450 xfer->actlen = xfer->length; 1451 xfer->status = USBD_NORMAL_COMPLETION; 1452 1453 usb_transfer_complete(xfer); 1454 } 1455 1456 void 1457 ohci_root_intr_done(xfer) 1458 usbd_xfer_handle xfer; 1459 { 1460 xfer->hcpriv = NULL; 1461 } 1462 1463 void 1464 ohci_root_ctrl_done(xfer) 1465 usbd_xfer_handle xfer; 1466 { 1467 xfer->hcpriv = NULL; 1468 } 1469 1470 /* 1471 * Wait here until controller claims to have an interrupt. 1472 * Then call ohci_intr and return. Use timeout to avoid waiting 1473 * too long. 1474 */ 1475 void 1476 ohci_waitintr(sc, xfer) 1477 ohci_softc_t *sc; 1478 usbd_xfer_handle xfer; 1479 { 1480 int timo = xfer->timeout; 1481 int usecs; 1482 u_int32_t intrs; 1483 1484 xfer->status = USBD_IN_PROGRESS; 1485 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1486 usb_delay_ms(&sc->sc_bus, 1); 1487 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1488 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1489 #ifdef OHCI_DEBUG 1490 if (ohcidebug > 15) 1491 ohci_dumpregs(sc); 1492 #endif 1493 if (intrs) { 1494 ohci_intr1(sc); 1495 if (xfer->status != USBD_IN_PROGRESS) 1496 return; 1497 } 1498 } 1499 1500 /* Timeout */ 1501 DPRINTF(("ohci_waitintr: timeout\n")); 1502 xfer->status = USBD_TIMEOUT; 1503 usb_transfer_complete(xfer); 1504 /* XXX should free TD */ 1505 } 1506 1507 void 1508 ohci_poll(bus) 1509 struct usbd_bus *bus; 1510 { 1511 ohci_softc_t *sc = (ohci_softc_t *)bus; 1512 1513 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1514 ohci_intr1(sc); 1515 } 1516 1517 usbd_status 1518 ohci_device_request(xfer) 1519 usbd_xfer_handle xfer; 1520 { 1521 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1522 usb_device_request_t *req = &xfer->request; 1523 usbd_device_handle dev = opipe->pipe.device; 1524 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1525 int addr = dev->address; 1526 ohci_soft_td_t *setup, *stat, *next, *tail; 1527 ohci_soft_ed_t *sed; 1528 int isread; 1529 int len; 1530 usbd_status err; 1531 int s; 1532 1533 isread = req->bmRequestType & UT_READ; 1534 len = UGETW(req->wLength); 1535 1536 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1537 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1538 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1539 UGETW(req->wIndex), len, addr, 1540 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1541 1542 setup = opipe->tail.td; 1543 stat = ohci_alloc_std(sc); 1544 if (stat == NULL) { 1545 err = USBD_NOMEM; 1546 goto bad1; 1547 } 1548 tail = ohci_alloc_std(sc); 1549 if (tail == NULL) { 1550 err = USBD_NOMEM; 1551 goto bad2; 1552 } 1553 tail->xfer = NULL; 1554 1555 sed = opipe->sed; 1556 opipe->u.ctl.length = len; 1557 1558 /* Update device address and length since they may have changed. */ 1559 /* XXX This only needs to be done once, but it's too early in open. */ 1560 /* XXXX Should not touch ED here! */ 1561 sed->ed.ed_flags = htole32( 1562 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1563 OHCI_ED_SET_FA(addr) | 1564 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1565 1566 next = stat; 1567 1568 /* Set up data transaction */ 1569 if (len != 0) { 1570 ohci_soft_td_t *std = stat; 1571 1572 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1573 std, &stat); 1574 stat = stat->nexttd; /* point at free TD */ 1575 if (err) 1576 goto bad3; 1577 /* Start toggle at 1 and then use the carried toggle. */ 1578 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1579 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1580 } 1581 1582 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1583 1584 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1585 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1586 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma)); 1587 setup->nexttd = next; 1588 setup->td.td_nexttd = htole32(next->physaddr); 1589 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1590 setup->len = 0; 1591 setup->xfer = xfer; 1592 setup->flags = 0; 1593 xfer->hcpriv = setup; 1594 1595 stat->td.td_flags = htole32( 1596 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1597 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1598 stat->td.td_cbp = 0; 1599 stat->nexttd = tail; 1600 stat->td.td_nexttd = htole32(tail->physaddr); 1601 stat->td.td_be = 0; 1602 stat->flags = OHCI_CALL_DONE; 1603 stat->len = 0; 1604 stat->xfer = xfer; 1605 1606 #ifdef OHCI_DEBUG 1607 if (ohcidebug > 5) { 1608 DPRINTF(("ohci_device_request:\n")); 1609 ohci_dump_ed(sed); 1610 ohci_dump_tds(setup); 1611 } 1612 #endif 1613 1614 /* Insert ED in schedule */ 1615 s = splusb(); 1616 sed->ed.ed_tailp = htole32(tail->physaddr); 1617 opipe->tail.td = tail; 1618 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1619 if (xfer->timeout && !sc->sc_bus.use_polling) { 1620 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 1621 ohci_timeout, xfer); 1622 } 1623 splx(s); 1624 1625 #if 0 1626 if (ohcidebug > 10) { 1627 delay(10000); 1628 DPRINTF(("ohci_device_request: status=%x\n", 1629 OREAD4(sc, OHCI_COMMAND_STATUS))); 1630 ohci_dump_ed(sed); 1631 ohci_dump_tds(setup); 1632 } 1633 #endif 1634 1635 return (USBD_NORMAL_COMPLETION); 1636 1637 bad3: 1638 ohci_free_std(sc, tail); 1639 bad2: 1640 ohci_free_std(sc, stat); 1641 bad1: 1642 return (err); 1643 } 1644 1645 /* 1646 * Add an ED to the schedule. Called at splusb(). 1647 */ 1648 void 1649 ohci_add_ed(sed, head) 1650 ohci_soft_ed_t *sed; 1651 ohci_soft_ed_t *head; 1652 { 1653 SPLUSBCHECK; 1654 sed->next = head->next; 1655 sed->ed.ed_nexted = head->ed.ed_nexted; 1656 head->next = sed; 1657 head->ed.ed_nexted = htole32(sed->physaddr); 1658 } 1659 1660 /* 1661 * Remove an ED from the schedule. Called at splusb(). 1662 */ 1663 void 1664 ohci_rem_ed(sed, head) 1665 ohci_soft_ed_t *sed; 1666 ohci_soft_ed_t *head; 1667 { 1668 ohci_soft_ed_t *p; 1669 1670 SPLUSBCHECK; 1671 1672 /* XXX */ 1673 for (p = head; p == NULL && p->next != sed; p = p->next) 1674 ; 1675 if (p == NULL) 1676 panic("ohci_rem_ed: ED not found\n"); 1677 p->next = sed->next; 1678 p->ed.ed_nexted = sed->ed.ed_nexted; 1679 } 1680 1681 /* 1682 * When a transfer is completed the TD is added to the done queue by 1683 * the host controller. This queue is the processed by software. 1684 * Unfortunately the queue contains the physical address of the TD 1685 * and we have no simple way to translate this back to a kernel address. 1686 * To make the translation possible (and fast) we use a hash table of 1687 * TDs currently in the schedule. The physical address is used as the 1688 * hash value. 1689 */ 1690 1691 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1692 /* Called at splusb() */ 1693 void 1694 ohci_hash_add_td(sc, std) 1695 ohci_softc_t *sc; 1696 ohci_soft_td_t *std; 1697 { 1698 int h = HASH(std->physaddr); 1699 1700 SPLUSBCHECK; 1701 1702 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1703 } 1704 1705 /* Called at splusb() */ 1706 void 1707 ohci_hash_rem_td(sc, std) 1708 ohci_softc_t *sc; 1709 ohci_soft_td_t *std; 1710 { 1711 SPLUSBCHECK; 1712 1713 LIST_REMOVE(std, hnext); 1714 } 1715 1716 ohci_soft_td_t * 1717 ohci_hash_find_td(sc, a) 1718 ohci_softc_t *sc; 1719 ohci_physaddr_t a; 1720 { 1721 int h = HASH(a); 1722 ohci_soft_td_t *std; 1723 1724 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1725 std != NULL; 1726 std = LIST_NEXT(std, hnext)) 1727 if (std->physaddr == a) 1728 return (std); 1729 return (NULL); 1730 } 1731 1732 /* Called at splusb() */ 1733 void 1734 ohci_hash_add_itd(sc, sitd) 1735 ohci_softc_t *sc; 1736 ohci_soft_itd_t *sitd; 1737 { 1738 int h = HASH(sitd->physaddr); 1739 1740 SPLUSBCHECK; 1741 1742 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1743 sitd, (u_long)sitd->physaddr)); 1744 1745 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1746 } 1747 1748 /* Called at splusb() */ 1749 void 1750 ohci_hash_rem_itd(sc, sitd) 1751 ohci_softc_t *sc; 1752 ohci_soft_itd_t *sitd; 1753 { 1754 SPLUSBCHECK; 1755 1756 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1757 sitd, (u_long)sitd->physaddr)); 1758 1759 LIST_REMOVE(sitd, hnext); 1760 } 1761 1762 ohci_soft_itd_t * 1763 ohci_hash_find_itd(sc, a) 1764 ohci_softc_t *sc; 1765 ohci_physaddr_t a; 1766 { 1767 int h = HASH(a); 1768 ohci_soft_itd_t *sitd; 1769 1770 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1771 sitd != NULL; 1772 sitd = LIST_NEXT(sitd, hnext)) 1773 if (sitd->physaddr == a) 1774 return (sitd); 1775 return (NULL); 1776 } 1777 1778 void 1779 ohci_timeout(addr) 1780 void *addr; 1781 { 1782 usbd_xfer_handle xfer = addr; 1783 int s; 1784 1785 DPRINTF(("ohci_timeout: xfer=%p\n", xfer)); 1786 1787 s = splusb(); 1788 xfer->device->bus->intr_context++; 1789 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1790 xfer->device->bus->intr_context--; 1791 splx(s); 1792 } 1793 1794 #ifdef OHCI_DEBUG 1795 void 1796 ohci_dump_tds(std) 1797 ohci_soft_td_t *std; 1798 { 1799 for (; std; std = std->nexttd) 1800 ohci_dump_td(std); 1801 } 1802 1803 void 1804 ohci_dump_td(std) 1805 ohci_soft_td_t *std; 1806 { 1807 DPRINTF(("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1808 "nexttd=0x%08lx be=0x%08lx\n", 1809 std, (u_long)std->physaddr, 1810 (int)le32toh(std->td.td_flags), 1811 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1812 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1813 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1814 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1815 (u_long)le32toh(std->td.td_cbp), 1816 (u_long)le32toh(std->td.td_nexttd), 1817 (u_long)le32toh(std->td.td_be))); 1818 } 1819 1820 void 1821 ohci_dump_itd(sitd) 1822 ohci_soft_itd_t *sitd; 1823 { 1824 int i; 1825 1826 DPRINTF(("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1827 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1828 sitd, (u_long)sitd->physaddr, 1829 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1830 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1831 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1832 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1833 (u_long)le32toh(sitd->itd.itd_bp0), 1834 (u_long)le32toh(sitd->itd.itd_nextitd), 1835 (u_long)le32toh(sitd->itd.itd_be))); 1836 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1837 DPRINTF(("offs[%d]=0x%04x ", i, 1838 (u_int)le16toh(sitd->itd.itd_offset[i]))); 1839 DPRINTF(("\n")); 1840 } 1841 1842 void 1843 ohci_dump_itds(sitd) 1844 ohci_soft_itd_t *sitd; 1845 { 1846 for (; sitd; sitd = sitd->nextitd) 1847 ohci_dump_itd(sitd); 1848 } 1849 1850 void 1851 ohci_dump_ed(sed) 1852 ohci_soft_ed_t *sed; 1853 { 1854 DPRINTF(("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx " 1855 "headflags=%b headp=0x%08lx nexted=0x%08lx\n", 1856 sed, (u_long)sed->physaddr, 1857 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1858 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1859 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), 1860 (int)le32toh(sed->ed.ed_flags), 1861 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1862 (u_long)le32toh(sed->ed.ed_tailp), 1863 (u_long)le32toh(sed->ed.ed_headp), 1864 "\20\1HALT\2CARRY", 1865 (u_long)le32toh(sed->ed.ed_headp), 1866 (u_long)le32toh(sed->ed.ed_nexted))); 1867 } 1868 #endif 1869 1870 usbd_status 1871 ohci_open(pipe) 1872 usbd_pipe_handle pipe; 1873 { 1874 usbd_device_handle dev = pipe->device; 1875 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1876 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1877 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1878 u_int8_t addr = dev->address; 1879 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1880 ohci_soft_ed_t *sed; 1881 ohci_soft_td_t *std; 1882 ohci_soft_itd_t *sitd; 1883 ohci_physaddr_t tdphys; 1884 u_int32_t fmt; 1885 usbd_status err; 1886 int s; 1887 int ival; 1888 1889 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1890 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1891 1892 std = NULL; 1893 sed = NULL; 1894 1895 if (addr == sc->sc_addr) { 1896 switch (ed->bEndpointAddress) { 1897 case USB_CONTROL_ENDPOINT: 1898 pipe->methods = &ohci_root_ctrl_methods; 1899 break; 1900 case UE_DIR_IN | OHCI_INTR_ENDPT: 1901 pipe->methods = &ohci_root_intr_methods; 1902 break; 1903 default: 1904 return (USBD_INVAL); 1905 } 1906 } else { 1907 sed = ohci_alloc_sed(sc); 1908 if (sed == NULL) 1909 goto bad0; 1910 opipe->sed = sed; 1911 if (xfertype == UE_ISOCHRONOUS) { 1912 sitd = ohci_alloc_sitd(sc); 1913 if (sitd == NULL) { 1914 ohci_free_sitd(sc, sitd); 1915 goto bad1; 1916 } 1917 opipe->tail.itd = sitd; 1918 tdphys = sitd->physaddr; 1919 fmt = OHCI_ED_FORMAT_ISO; 1920 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 1921 fmt |= OHCI_ED_DIR_IN; 1922 else 1923 fmt |= OHCI_ED_DIR_OUT; 1924 } else { 1925 std = ohci_alloc_std(sc); 1926 if (std == NULL) { 1927 ohci_free_std(sc, std); 1928 goto bad1; 1929 } 1930 opipe->tail.td = std; 1931 tdphys = std->physaddr; 1932 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 1933 } 1934 sed->ed.ed_flags = htole32( 1935 OHCI_ED_SET_FA(addr) | 1936 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1937 (dev->lowspeed ? OHCI_ED_SPEED : 0) | fmt | 1938 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1939 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 1940 1941 switch (xfertype) { 1942 case UE_CONTROL: 1943 pipe->methods = &ohci_device_ctrl_methods; 1944 err = usb_allocmem(&sc->sc_bus, 1945 sizeof(usb_device_request_t), 1946 0, &opipe->u.ctl.reqdma); 1947 if (err) 1948 goto bad; 1949 s = splusb(); 1950 ohci_add_ed(sed, sc->sc_ctrl_head); 1951 splx(s); 1952 break; 1953 case UE_INTERRUPT: 1954 pipe->methods = &ohci_device_intr_methods; 1955 ival = pipe->interval; 1956 if (ival == USBD_DEFAULT_INTERVAL) 1957 ival = ed->bInterval; 1958 return (ohci_device_setintr(sc, opipe, ival)); 1959 case UE_ISOCHRONOUS: 1960 pipe->methods = &ohci_device_isoc_methods; 1961 return (ohci_setup_isoc(pipe)); 1962 case UE_BULK: 1963 pipe->methods = &ohci_device_bulk_methods; 1964 s = splusb(); 1965 ohci_add_ed(sed, sc->sc_bulk_head); 1966 splx(s); 1967 break; 1968 } 1969 } 1970 return (USBD_NORMAL_COMPLETION); 1971 1972 bad: 1973 if (std != NULL) 1974 ohci_free_std(sc, std); 1975 bad1: 1976 if (sed != NULL) 1977 ohci_free_sed(sc, sed); 1978 bad0: 1979 return (USBD_NOMEM); 1980 1981 } 1982 1983 /* 1984 * Close a reqular pipe. 1985 * Assumes that there are no pending transactions. 1986 */ 1987 void 1988 ohci_close_pipe(pipe, head) 1989 usbd_pipe_handle pipe; 1990 ohci_soft_ed_t *head; 1991 { 1992 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1993 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1994 ohci_soft_ed_t *sed = opipe->sed; 1995 int s; 1996 1997 s = splusb(); 1998 #ifdef DIAGNOSTIC 1999 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2000 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2001 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2002 ohci_physaddr_t td = le32toh(sed->ed.ed_headp); 2003 ohci_soft_td_t *std; 2004 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]); 2005 std != NULL; 2006 std = LIST_NEXT(std, hnext)) 2007 if (std->physaddr == td) 2008 break; 2009 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2010 "tl=0x%x pipe=%p, std=%p\n", sed, 2011 (int)le32toh(sed->ed.ed_headp), 2012 (int)le32toh(sed->ed.ed_tailp), 2013 pipe, std); 2014 usb_delay_ms(&sc->sc_bus, 2); 2015 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2016 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2017 printf("ohci_close_pipe: pipe still not empty\n"); 2018 } 2019 #endif 2020 ohci_rem_ed(sed, head); 2021 splx(s); 2022 ohci_free_sed(sc, opipe->sed); 2023 } 2024 2025 /* 2026 * Abort a device request. 2027 * If this routine is called at splusb() it guarantees that the request 2028 * will be removed from the hardware scheduling and that the callback 2029 * for it will be called with USBD_CANCELLED status. 2030 * It's impossible to guarantee that the requested transfer will not 2031 * have happened since the hardware runs concurrently. 2032 * If the transaction has already happened we rely on the ordinary 2033 * interrupt processing to process it. 2034 */ 2035 void 2036 ohci_abort_xfer(xfer, status) 2037 usbd_xfer_handle xfer; 2038 usbd_status status; 2039 { 2040 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2041 ohci_soft_ed_t *sed; 2042 2043 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p\n", xfer, opipe)); 2044 2045 xfer->status = status; 2046 2047 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2048 2049 sed = opipe->sed; 2050 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2051 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2052 2053 #if 1 2054 if (xfer->device->bus->intr_context) { 2055 /* We have no process context, so we can't use tsleep(). */ 2056 usb_callout(xfer->pipe->abort_handle, 2057 hz / USB_FRAMES_PER_SECOND, ohci_abort_xfer_end, xfer); 2058 } else { 2059 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 2060 KASSERT(intr_nesting_level == 0, 2061 ("ohci_abort_req in interrupt context")); 2062 #endif 2063 usb_delay_ms(opipe->pipe.device->bus, 1); 2064 ohci_abort_xfer_end(xfer); 2065 } 2066 #else 2067 delay(1000); 2068 ohci_abort_xfer_end(xfer); 2069 #endif 2070 } 2071 2072 void 2073 ohci_abort_xfer_end(v) 2074 void *v; 2075 { 2076 usbd_xfer_handle xfer = v; 2077 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2078 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2079 ohci_soft_ed_t *sed; 2080 ohci_soft_td_t *p, *n; 2081 int s; 2082 2083 s = splusb(); 2084 2085 p = xfer->hcpriv; 2086 #ifdef DIAGNOSTIC 2087 if (p == NULL) { 2088 printf("ohci_abort_xfer: hcpriv==0\n"); 2089 return; 2090 } 2091 #endif 2092 for (; p->xfer == xfer; p = n) { 2093 n = p->nexttd; 2094 ohci_free_std(sc, p); 2095 } 2096 2097 sed = opipe->sed; 2098 DPRINTFN(2,("ohci_abort_xfer: set hd=%x, tl=%x\n", 2099 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2100 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2101 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2102 2103 usb_transfer_complete(xfer); 2104 2105 splx(s); 2106 } 2107 2108 /* 2109 * Data structures and routines to emulate the root hub. 2110 */ 2111 Static usb_device_descriptor_t ohci_devd = { 2112 USB_DEVICE_DESCRIPTOR_SIZE, 2113 UDESC_DEVICE, /* type */ 2114 {0x00, 0x01}, /* USB version */ 2115 UDCLASS_HUB, /* class */ 2116 UDSUBCLASS_HUB, /* subclass */ 2117 0, /* protocol */ 2118 64, /* max packet */ 2119 {0},{0},{0x00,0x01}, /* device id */ 2120 1,2,0, /* string indicies */ 2121 1 /* # of configurations */ 2122 }; 2123 2124 Static usb_config_descriptor_t ohci_confd = { 2125 USB_CONFIG_DESCRIPTOR_SIZE, 2126 UDESC_CONFIG, 2127 {USB_CONFIG_DESCRIPTOR_SIZE + 2128 USB_INTERFACE_DESCRIPTOR_SIZE + 2129 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2130 1, 2131 1, 2132 0, 2133 UC_SELF_POWERED, 2134 0 /* max power */ 2135 }; 2136 2137 Static usb_interface_descriptor_t ohci_ifcd = { 2138 USB_INTERFACE_DESCRIPTOR_SIZE, 2139 UDESC_INTERFACE, 2140 0, 2141 0, 2142 1, 2143 UICLASS_HUB, 2144 UISUBCLASS_HUB, 2145 0, 2146 0 2147 }; 2148 2149 Static usb_endpoint_descriptor_t ohci_endpd = { 2150 USB_ENDPOINT_DESCRIPTOR_SIZE, 2151 UDESC_ENDPOINT, 2152 UE_DIR_IN | OHCI_INTR_ENDPT, 2153 UE_INTERRUPT, 2154 {8, 0}, /* max packet */ 2155 255 2156 }; 2157 2158 Static usb_hub_descriptor_t ohci_hubd = { 2159 USB_HUB_DESCRIPTOR_SIZE, 2160 UDESC_HUB, 2161 0, 2162 {0,0}, 2163 0, 2164 0, 2165 {0}, 2166 }; 2167 2168 Static int 2169 ohci_str(p, l, s) 2170 usb_string_descriptor_t *p; 2171 int l; 2172 char *s; 2173 { 2174 int i; 2175 2176 if (l == 0) 2177 return (0); 2178 p->bLength = 2 * strlen(s) + 2; 2179 if (l == 1) 2180 return (1); 2181 p->bDescriptorType = UDESC_STRING; 2182 l -= 2; 2183 for (i = 0; s[i] && l > 1; i++, l -= 2) 2184 USETW2(p->bString[i], 0, s[i]); 2185 return (2*i+2); 2186 } 2187 2188 /* 2189 * Simulate a hardware hub by handling all the necessary requests. 2190 */ 2191 Static usbd_status 2192 ohci_root_ctrl_transfer(xfer) 2193 usbd_xfer_handle xfer; 2194 { 2195 usbd_status err; 2196 2197 /* Insert last in queue. */ 2198 err = usb_insert_transfer(xfer); 2199 if (err) 2200 return (err); 2201 2202 /* Pipe isn't running, start first */ 2203 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2204 } 2205 2206 Static usbd_status 2207 ohci_root_ctrl_start(xfer) 2208 usbd_xfer_handle xfer; 2209 { 2210 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2211 usb_device_request_t *req; 2212 void *buf = NULL; 2213 int port, i; 2214 int s, len, value, index, l, totlen = 0; 2215 usb_port_status_t ps; 2216 usb_hub_descriptor_t hubd; 2217 usbd_status err; 2218 u_int32_t v; 2219 2220 if (sc->sc_dying) 2221 return (USBD_IOERROR); 2222 2223 #ifdef DIAGNOSTIC 2224 if (!(xfer->rqflags & URQ_REQUEST)) 2225 /* XXX panic */ 2226 return (USBD_INVAL); 2227 #endif 2228 req = &xfer->request; 2229 2230 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2231 req->bmRequestType, req->bRequest)); 2232 2233 len = UGETW(req->wLength); 2234 value = UGETW(req->wValue); 2235 index = UGETW(req->wIndex); 2236 2237 if (len != 0) 2238 buf = KERNADDR(&xfer->dmabuf); 2239 2240 #define C(x,y) ((x) | ((y) << 8)) 2241 switch(C(req->bRequest, req->bmRequestType)) { 2242 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2243 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2244 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2245 /* 2246 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2247 * for the integrated root hub. 2248 */ 2249 break; 2250 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2251 if (len > 0) { 2252 *(u_int8_t *)buf = sc->sc_conf; 2253 totlen = 1; 2254 } 2255 break; 2256 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2257 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2258 switch(value >> 8) { 2259 case UDESC_DEVICE: 2260 if ((value & 0xff) != 0) { 2261 err = USBD_IOERROR; 2262 goto ret; 2263 } 2264 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2265 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2266 memcpy(buf, &ohci_devd, l); 2267 break; 2268 case UDESC_CONFIG: 2269 if ((value & 0xff) != 0) { 2270 err = USBD_IOERROR; 2271 goto ret; 2272 } 2273 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2274 memcpy(buf, &ohci_confd, l); 2275 buf = (char *)buf + l; 2276 len -= l; 2277 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2278 totlen += l; 2279 memcpy(buf, &ohci_ifcd, l); 2280 buf = (char *)buf + l; 2281 len -= l; 2282 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2283 totlen += l; 2284 memcpy(buf, &ohci_endpd, l); 2285 break; 2286 case UDESC_STRING: 2287 if (len == 0) 2288 break; 2289 *(u_int8_t *)buf = 0; 2290 totlen = 1; 2291 switch (value & 0xff) { 2292 case 1: /* Vendor */ 2293 totlen = ohci_str(buf, len, sc->sc_vendor); 2294 break; 2295 case 2: /* Product */ 2296 totlen = ohci_str(buf, len, "OHCI root hub"); 2297 break; 2298 } 2299 break; 2300 default: 2301 err = USBD_IOERROR; 2302 goto ret; 2303 } 2304 break; 2305 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2306 if (len > 0) { 2307 *(u_int8_t *)buf = 0; 2308 totlen = 1; 2309 } 2310 break; 2311 case C(UR_GET_STATUS, UT_READ_DEVICE): 2312 if (len > 1) { 2313 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2314 totlen = 2; 2315 } 2316 break; 2317 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2318 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2319 if (len > 1) { 2320 USETW(((usb_status_t *)buf)->wStatus, 0); 2321 totlen = 2; 2322 } 2323 break; 2324 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2325 if (value >= USB_MAX_DEVICES) { 2326 err = USBD_IOERROR; 2327 goto ret; 2328 } 2329 sc->sc_addr = value; 2330 break; 2331 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2332 if (value != 0 && value != 1) { 2333 err = USBD_IOERROR; 2334 goto ret; 2335 } 2336 sc->sc_conf = value; 2337 break; 2338 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2339 break; 2340 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2341 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2342 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2343 err = USBD_IOERROR; 2344 goto ret; 2345 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2346 break; 2347 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2348 break; 2349 /* Hub requests */ 2350 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2351 break; 2352 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2353 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2354 "port=%d feature=%d\n", 2355 index, value)); 2356 if (index < 1 || index > sc->sc_noport) { 2357 err = USBD_IOERROR; 2358 goto ret; 2359 } 2360 port = OHCI_RH_PORT_STATUS(index); 2361 switch(value) { 2362 case UHF_PORT_ENABLE: 2363 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2364 break; 2365 case UHF_PORT_SUSPEND: 2366 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2367 break; 2368 case UHF_PORT_POWER: 2369 /* Yes, writing to the LOW_SPEED bit clears power. */ 2370 OWRITE4(sc, port, UPS_LOW_SPEED); 2371 break; 2372 case UHF_C_PORT_CONNECTION: 2373 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2374 break; 2375 case UHF_C_PORT_ENABLE: 2376 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2377 break; 2378 case UHF_C_PORT_SUSPEND: 2379 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2380 break; 2381 case UHF_C_PORT_OVER_CURRENT: 2382 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2383 break; 2384 case UHF_C_PORT_RESET: 2385 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2386 break; 2387 default: 2388 err = USBD_IOERROR; 2389 goto ret; 2390 } 2391 switch(value) { 2392 case UHF_C_PORT_CONNECTION: 2393 case UHF_C_PORT_ENABLE: 2394 case UHF_C_PORT_SUSPEND: 2395 case UHF_C_PORT_OVER_CURRENT: 2396 case UHF_C_PORT_RESET: 2397 /* Enable RHSC interrupt if condition is cleared. */ 2398 if ((OREAD4(sc, port) >> 16) == 0) 2399 ohci_rhsc_able(sc, 1); 2400 break; 2401 default: 2402 break; 2403 } 2404 break; 2405 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2406 if (value != 0) { 2407 err = USBD_IOERROR; 2408 goto ret; 2409 } 2410 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2411 hubd = ohci_hubd; 2412 hubd.bNbrPorts = sc->sc_noport; 2413 USETW(hubd.wHubCharacteristics, 2414 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2415 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2416 /* XXX overcurrent */ 2417 ); 2418 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2419 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2420 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2421 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2422 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2423 l = min(len, hubd.bDescLength); 2424 totlen = l; 2425 memcpy(buf, &hubd, l); 2426 break; 2427 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2428 if (len != 4) { 2429 err = USBD_IOERROR; 2430 goto ret; 2431 } 2432 memset(buf, 0, len); /* ? XXX */ 2433 totlen = len; 2434 break; 2435 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2436 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2437 index)); 2438 if (index < 1 || index > sc->sc_noport) { 2439 err = USBD_IOERROR; 2440 goto ret; 2441 } 2442 if (len != 4) { 2443 err = USBD_IOERROR; 2444 goto ret; 2445 } 2446 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2447 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2448 v)); 2449 USETW(ps.wPortStatus, v); 2450 USETW(ps.wPortChange, v >> 16); 2451 l = min(len, sizeof ps); 2452 memcpy(buf, &ps, l); 2453 totlen = l; 2454 break; 2455 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2456 err = USBD_IOERROR; 2457 goto ret; 2458 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2459 break; 2460 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2461 if (index < 1 || index > sc->sc_noport) { 2462 err = USBD_IOERROR; 2463 goto ret; 2464 } 2465 port = OHCI_RH_PORT_STATUS(index); 2466 switch(value) { 2467 case UHF_PORT_ENABLE: 2468 OWRITE4(sc, port, UPS_PORT_ENABLED); 2469 break; 2470 case UHF_PORT_SUSPEND: 2471 OWRITE4(sc, port, UPS_SUSPEND); 2472 break; 2473 case UHF_PORT_RESET: 2474 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2475 index)); 2476 OWRITE4(sc, port, UPS_RESET); 2477 for (i = 0; i < 10; i++) { 2478 usb_delay_ms(&sc->sc_bus, 10); 2479 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2480 break; 2481 } 2482 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2483 index, OREAD4(sc, port))); 2484 break; 2485 case UHF_PORT_POWER: 2486 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2487 "%d\n", index)); 2488 OWRITE4(sc, port, UPS_PORT_POWER); 2489 break; 2490 default: 2491 err = USBD_IOERROR; 2492 goto ret; 2493 } 2494 break; 2495 default: 2496 err = USBD_IOERROR; 2497 goto ret; 2498 } 2499 xfer->actlen = totlen; 2500 err = USBD_NORMAL_COMPLETION; 2501 ret: 2502 xfer->status = err; 2503 s = splusb(); 2504 usb_transfer_complete(xfer); 2505 splx(s); 2506 return (USBD_IN_PROGRESS); 2507 } 2508 2509 /* Abort a root control request. */ 2510 Static void 2511 ohci_root_ctrl_abort(xfer) 2512 usbd_xfer_handle xfer; 2513 { 2514 /* Nothing to do, all transfers are synchronous. */ 2515 } 2516 2517 /* Close the root pipe. */ 2518 Static void 2519 ohci_root_ctrl_close(pipe) 2520 usbd_pipe_handle pipe; 2521 { 2522 DPRINTF(("ohci_root_ctrl_close\n")); 2523 /* Nothing to do. */ 2524 } 2525 2526 Static usbd_status 2527 ohci_root_intr_transfer(xfer) 2528 usbd_xfer_handle xfer; 2529 { 2530 usbd_status err; 2531 2532 /* Insert last in queue. */ 2533 err = usb_insert_transfer(xfer); 2534 if (err) 2535 return (err); 2536 2537 /* Pipe isn't running, start first */ 2538 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2539 } 2540 2541 Static usbd_status 2542 ohci_root_intr_start(xfer) 2543 usbd_xfer_handle xfer; 2544 { 2545 usbd_pipe_handle pipe = xfer->pipe; 2546 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2547 2548 if (sc->sc_dying) 2549 return (USBD_IOERROR); 2550 2551 sc->sc_intrxfer = xfer; 2552 2553 return (USBD_IN_PROGRESS); 2554 } 2555 2556 /* Abort a root interrupt request. */ 2557 Static void 2558 ohci_root_intr_abort(xfer) 2559 usbd_xfer_handle xfer; 2560 { 2561 int s; 2562 2563 if (xfer->pipe->intrxfer == xfer) { 2564 DPRINTF(("ohci_root_intr_abort: remove\n")); 2565 xfer->pipe->intrxfer = NULL; 2566 } 2567 xfer->status = USBD_CANCELLED; 2568 s = splusb(); 2569 usb_transfer_complete(xfer); 2570 splx(s); 2571 } 2572 2573 /* Close the root pipe. */ 2574 Static void 2575 ohci_root_intr_close(pipe) 2576 usbd_pipe_handle pipe; 2577 { 2578 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2579 2580 DPRINTF(("ohci_root_intr_close\n")); 2581 2582 sc->sc_intrxfer = NULL; 2583 } 2584 2585 /************************/ 2586 2587 Static usbd_status 2588 ohci_device_ctrl_transfer(xfer) 2589 usbd_xfer_handle xfer; 2590 { 2591 usbd_status err; 2592 2593 /* Insert last in queue. */ 2594 err = usb_insert_transfer(xfer); 2595 if (err) 2596 return (err); 2597 2598 /* Pipe isn't running, start first */ 2599 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2600 } 2601 2602 Static usbd_status 2603 ohci_device_ctrl_start(xfer) 2604 usbd_xfer_handle xfer; 2605 { 2606 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2607 usbd_status err; 2608 2609 if (sc->sc_dying) 2610 return (USBD_IOERROR); 2611 2612 #ifdef DIAGNOSTIC 2613 if (!(xfer->rqflags & URQ_REQUEST)) { 2614 /* XXX panic */ 2615 printf("ohci_device_ctrl_transfer: not a request\n"); 2616 return (USBD_INVAL); 2617 } 2618 #endif 2619 2620 err = ohci_device_request(xfer); 2621 if (err) 2622 return (err); 2623 2624 if (sc->sc_bus.use_polling) 2625 ohci_waitintr(sc, xfer); 2626 return (USBD_IN_PROGRESS); 2627 } 2628 2629 /* Abort a device control request. */ 2630 Static void 2631 ohci_device_ctrl_abort(xfer) 2632 usbd_xfer_handle xfer; 2633 { 2634 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2635 ohci_abort_xfer(xfer, USBD_CANCELLED); 2636 } 2637 2638 /* Close a device control pipe. */ 2639 Static void 2640 ohci_device_ctrl_close(pipe) 2641 usbd_pipe_handle pipe; 2642 { 2643 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2644 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2645 2646 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2647 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2648 ohci_free_std(sc, opipe->tail.td); 2649 } 2650 2651 /************************/ 2652 2653 Static void 2654 ohci_device_clear_toggle(pipe) 2655 usbd_pipe_handle pipe; 2656 { 2657 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2658 2659 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2660 } 2661 2662 Static void 2663 ohci_noop(pipe) 2664 usbd_pipe_handle pipe; 2665 { 2666 } 2667 2668 Static usbd_status 2669 ohci_device_bulk_transfer(xfer) 2670 usbd_xfer_handle xfer; 2671 { 2672 usbd_status err; 2673 2674 /* Insert last in queue. */ 2675 err = usb_insert_transfer(xfer); 2676 if (err) 2677 return (err); 2678 2679 /* Pipe isn't running, start first */ 2680 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2681 } 2682 2683 Static usbd_status 2684 ohci_device_bulk_start(xfer) 2685 usbd_xfer_handle xfer; 2686 { 2687 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2688 usbd_device_handle dev = opipe->pipe.device; 2689 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2690 int addr = dev->address; 2691 ohci_soft_td_t *data, *tail, *tdp; 2692 ohci_soft_ed_t *sed; 2693 int s, len, isread, endpt; 2694 usbd_status err; 2695 2696 if (sc->sc_dying) 2697 return (USBD_IOERROR); 2698 2699 #ifdef DIAGNOSTIC 2700 if (xfer->rqflags & URQ_REQUEST) { 2701 /* XXX panic */ 2702 printf("ohci_device_bulk_start: a request\n"); 2703 return (USBD_INVAL); 2704 } 2705 #endif 2706 2707 len = xfer->length; 2708 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2709 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2710 sed = opipe->sed; 2711 2712 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2713 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2714 endpt)); 2715 2716 opipe->u.bulk.isread = isread; 2717 opipe->u.bulk.length = len; 2718 2719 /* Update device address */ 2720 sed->ed.ed_flags = htole32( 2721 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2722 OHCI_ED_SET_FA(addr)); 2723 2724 /* Allocate a chain of new TDs (including a new tail). */ 2725 data = opipe->tail.td; 2726 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2727 data, &tail); 2728 /* We want interrupt at the end of the transfer. */ 2729 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2730 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2731 tail->flags |= OHCI_CALL_DONE; 2732 tail = tail->nexttd; /* point at sentinel */ 2733 if (err) 2734 return (err); 2735 2736 tail->xfer = NULL; 2737 xfer->hcpriv = data; 2738 2739 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2740 "td_cbp=0x%08x td_be=0x%08x\n", 2741 (int)le32toh(sed->ed.ed_flags), 2742 (int)le32toh(data->td.td_flags), 2743 (int)le32toh(data->td.td_cbp), 2744 (int)le32toh(data->td.td_be))); 2745 2746 #ifdef OHCI_DEBUG 2747 if (ohcidebug > 5) { 2748 ohci_dump_ed(sed); 2749 ohci_dump_tds(data); 2750 } 2751 #endif 2752 2753 /* Insert ED in schedule */ 2754 s = splusb(); 2755 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2756 tdp->xfer = xfer; 2757 } 2758 sed->ed.ed_tailp = htole32(tail->physaddr); 2759 opipe->tail.td = tail; 2760 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2761 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2762 if (xfer->timeout && !sc->sc_bus.use_polling) { 2763 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2764 ohci_timeout, xfer); 2765 } 2766 2767 #if 0 2768 /* This goes wrong if we are too slow. */ 2769 if (ohcidebug > 10) { 2770 delay(10000); 2771 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2772 OREAD4(sc, OHCI_COMMAND_STATUS))); 2773 ohci_dump_ed(sed); 2774 ohci_dump_tds(data); 2775 } 2776 #endif 2777 2778 splx(s); 2779 2780 return (USBD_IN_PROGRESS); 2781 } 2782 2783 Static void 2784 ohci_device_bulk_abort(xfer) 2785 usbd_xfer_handle xfer; 2786 { 2787 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2788 ohci_abort_xfer(xfer, USBD_CANCELLED); 2789 } 2790 2791 /* 2792 * Close a device bulk pipe. 2793 */ 2794 Static void 2795 ohci_device_bulk_close(pipe) 2796 usbd_pipe_handle pipe; 2797 { 2798 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2799 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2800 2801 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2802 ohci_close_pipe(pipe, sc->sc_bulk_head); 2803 ohci_free_std(sc, opipe->tail.td); 2804 } 2805 2806 /************************/ 2807 2808 Static usbd_status 2809 ohci_device_intr_transfer(xfer) 2810 usbd_xfer_handle xfer; 2811 { 2812 usbd_status err; 2813 2814 /* Insert last in queue. */ 2815 err = usb_insert_transfer(xfer); 2816 if (err) 2817 return (err); 2818 2819 /* Pipe isn't running, start first */ 2820 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2821 } 2822 2823 Static usbd_status 2824 ohci_device_intr_start(xfer) 2825 usbd_xfer_handle xfer; 2826 { 2827 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2828 usbd_device_handle dev = opipe->pipe.device; 2829 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2830 ohci_soft_ed_t *sed = opipe->sed; 2831 ohci_soft_td_t *data, *tail; 2832 int len; 2833 int s; 2834 2835 if (sc->sc_dying) 2836 return (USBD_IOERROR); 2837 2838 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2839 "flags=%d priv=%p\n", 2840 xfer, xfer->length, xfer->flags, xfer->priv)); 2841 2842 #ifdef DIAGNOSTIC 2843 if (xfer->rqflags & URQ_REQUEST) 2844 panic("ohci_device_intr_transfer: a request\n"); 2845 #endif 2846 2847 len = xfer->length; 2848 2849 data = opipe->tail.td; 2850 tail = ohci_alloc_std(sc); 2851 if (tail == NULL) 2852 return (USBD_NOMEM); 2853 tail->xfer = NULL; 2854 2855 data->td.td_flags = htole32( 2856 OHCI_TD_IN | OHCI_TD_NOCC | 2857 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2858 if (xfer->flags & USBD_SHORT_XFER_OK) 2859 data->td.td_flags |= htole32(OHCI_TD_R); 2860 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 2861 data->nexttd = tail; 2862 data->td.td_nexttd = htole32(tail->physaddr); 2863 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 2864 data->len = len; 2865 data->xfer = xfer; 2866 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2867 xfer->hcpriv = data; 2868 2869 #ifdef OHCI_DEBUG 2870 if (ohcidebug > 5) { 2871 DPRINTF(("ohci_device_intr_transfer:\n")); 2872 ohci_dump_ed(sed); 2873 ohci_dump_tds(data); 2874 } 2875 #endif 2876 2877 /* Insert ED in schedule */ 2878 s = splusb(); 2879 sed->ed.ed_tailp = htole32(tail->physaddr); 2880 opipe->tail.td = tail; 2881 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2882 2883 #if 0 2884 /* 2885 * This goes horribly wrong, printing thousands of descriptors, 2886 * because false references are followed due to the fact that the 2887 * TD is gone. 2888 */ 2889 if (ohcidebug > 5) { 2890 usb_delay_ms(&sc->sc_bus, 5); 2891 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2892 OREAD4(sc, OHCI_COMMAND_STATUS))); 2893 ohci_dump_ed(sed); 2894 ohci_dump_tds(data); 2895 } 2896 #endif 2897 splx(s); 2898 2899 return (USBD_IN_PROGRESS); 2900 } 2901 2902 /* Abort a device control request. */ 2903 Static void 2904 ohci_device_intr_abort(xfer) 2905 usbd_xfer_handle xfer; 2906 { 2907 if (xfer->pipe->intrxfer == xfer) { 2908 DPRINTF(("ohci_device_intr_abort: remove\n")); 2909 xfer->pipe->intrxfer = NULL; 2910 } 2911 ohci_abort_xfer(xfer, USBD_CANCELLED); 2912 } 2913 2914 /* Close a device interrupt pipe. */ 2915 Static void 2916 ohci_device_intr_close(pipe) 2917 usbd_pipe_handle pipe; 2918 { 2919 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2920 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2921 int nslots = opipe->u.intr.nslots; 2922 int pos = opipe->u.intr.pos; 2923 int j; 2924 ohci_soft_ed_t *p, *sed = opipe->sed; 2925 int s; 2926 2927 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2928 pipe, nslots, pos)); 2929 s = splusb(); 2930 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2931 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2932 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2933 usb_delay_ms(&sc->sc_bus, 2); 2934 2935 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2936 ; 2937 #ifdef DIAGNOSTIC 2938 if (p == NULL) 2939 panic("ohci_device_intr_close: ED not found\n"); 2940 #endif 2941 p->next = sed->next; 2942 p->ed.ed_nexted = sed->ed.ed_nexted; 2943 splx(s); 2944 2945 for (j = 0; j < nslots; j++) 2946 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2947 2948 ohci_free_std(sc, opipe->tail.td); 2949 ohci_free_sed(sc, opipe->sed); 2950 } 2951 2952 Static usbd_status 2953 ohci_device_setintr(sc, opipe, ival) 2954 ohci_softc_t *sc; 2955 struct ohci_pipe *opipe; 2956 int ival; 2957 { 2958 int i, j, s, best; 2959 u_int npoll, slow, shigh, nslots; 2960 u_int bestbw, bw; 2961 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2962 2963 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2964 if (ival == 0) { 2965 printf("ohci_setintr: 0 interval\n"); 2966 return (USBD_INVAL); 2967 } 2968 2969 npoll = OHCI_NO_INTRS; 2970 while (npoll > ival) 2971 npoll /= 2; 2972 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2973 2974 /* 2975 * We now know which level in the tree the ED must go into. 2976 * Figure out which slot has most bandwidth left over. 2977 * Slots to examine: 2978 * npoll 2979 * 1 0 2980 * 2 1 2 2981 * 4 3 4 5 6 2982 * 8 7 8 9 10 11 12 13 14 2983 * N (N-1) .. (N-1+N-1) 2984 */ 2985 slow = npoll-1; 2986 shigh = slow + npoll; 2987 nslots = OHCI_NO_INTRS / npoll; 2988 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2989 bw = 0; 2990 for (j = 0; j < nslots; j++) 2991 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 2992 if (bw < bestbw) { 2993 best = i; 2994 bestbw = bw; 2995 } 2996 } 2997 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2998 best, slow, shigh, bestbw)); 2999 3000 s = splusb(); 3001 hsed = sc->sc_eds[best]; 3002 sed->next = hsed->next; 3003 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3004 hsed->next = sed; 3005 hsed->ed.ed_nexted = htole32(sed->physaddr); 3006 splx(s); 3007 3008 for (j = 0; j < nslots; j++) 3009 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3010 opipe->u.intr.nslots = nslots; 3011 opipe->u.intr.pos = best; 3012 3013 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3014 return (USBD_NORMAL_COMPLETION); 3015 } 3016 3017 /***********************/ 3018 3019 usbd_status 3020 ohci_device_isoc_transfer(xfer) 3021 usbd_xfer_handle xfer; 3022 { 3023 usbd_status err; 3024 3025 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3026 3027 /* Put it on our queue, */ 3028 err = usb_insert_transfer(xfer); 3029 3030 /* bail out on error, */ 3031 if (err && err != USBD_IN_PROGRESS) 3032 return (err); 3033 3034 /* XXX should check inuse here */ 3035 3036 /* insert into schedule, */ 3037 ohci_device_isoc_enter(xfer); 3038 3039 /* and start if the pipe wasn't running */ 3040 if (!err) 3041 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3042 3043 return (err); 3044 } 3045 3046 void 3047 ohci_device_isoc_enter(xfer) 3048 usbd_xfer_handle xfer; 3049 { 3050 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3051 usbd_device_handle dev = opipe->pipe.device; 3052 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3053 ohci_soft_ed_t *sed = opipe->sed; 3054 struct iso *iso = &opipe->u.iso; 3055 ohci_soft_itd_t *sitd, *nsitd; 3056 ohci_physaddr_t buf, offs, noffs, bp0; 3057 int i, ncur, nframes; 3058 int s; 3059 3060 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3061 "nframes=%d\n", 3062 iso->inuse, iso->next, xfer, xfer->nframes)); 3063 3064 if (sc->sc_dying) 3065 return; 3066 3067 if (iso->next == -1) { 3068 /* Not in use yet, schedule it a few frames ahead. */ 3069 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3070 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3071 iso->next)); 3072 } 3073 3074 sitd = opipe->tail.itd; 3075 buf = DMAADDR(&xfer->dmabuf); 3076 bp0 = OHCI_PAGE(buf); 3077 offs = OHCI_PAGE_OFFSET(buf); 3078 nframes = xfer->nframes; 3079 xfer->hcpriv = sitd; 3080 for (i = ncur = 0; i < nframes; i++, ncur++) { 3081 noffs = offs + xfer->frlengths[i]; 3082 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3083 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3084 3085 /* Allocate next ITD */ 3086 nsitd = ohci_alloc_sitd(sc); 3087 if (nsitd == NULL) { 3088 /* XXX what now? */ 3089 printf("%s: isoc TD alloc failed\n", 3090 USBDEVNAME(sc->sc_bus.bdev)); 3091 return; 3092 } 3093 3094 /* Fill current ITD */ 3095 sitd->itd.itd_flags = htole32( 3096 OHCI_ITD_NOCC | 3097 OHCI_ITD_SET_SF(iso->next) | 3098 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3099 OHCI_ITD_SET_FC(ncur)); 3100 sitd->itd.itd_bp0 = htole32(bp0); 3101 sitd->nextitd = nsitd; 3102 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3103 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3104 sitd->xfer = xfer; 3105 sitd->flags = 0; 3106 3107 sitd = nsitd; 3108 iso->next = iso->next + ncur; 3109 bp0 = OHCI_PAGE(buf + offs); 3110 ncur = 0; 3111 } 3112 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3113 offs = noffs; 3114 } 3115 nsitd = ohci_alloc_sitd(sc); 3116 if (nsitd == NULL) { 3117 /* XXX what now? */ 3118 printf("%s: isoc TD alloc failed\n", 3119 USBDEVNAME(sc->sc_bus.bdev)); 3120 return; 3121 } 3122 /* Fixup last used ITD */ 3123 sitd->itd.itd_flags = htole32( 3124 OHCI_ITD_NOCC | 3125 OHCI_ITD_SET_SF(iso->next) | 3126 OHCI_ITD_SET_DI(0) | 3127 OHCI_ITD_SET_FC(ncur)); 3128 sitd->itd.itd_bp0 = htole32(bp0); 3129 sitd->nextitd = nsitd; 3130 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3131 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3132 sitd->xfer = xfer; 3133 sitd->flags = OHCI_CALL_DONE; 3134 3135 iso->next = iso->next + ncur; 3136 iso->inuse += nframes; 3137 3138 xfer->actlen = offs; /* XXX pretend we did it all */ 3139 3140 xfer->status = USBD_IN_PROGRESS; 3141 3142 #ifdef OHCI_DEBUG 3143 if (ohcidebug > 5) { 3144 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3145 le32toh(sc->sc_hcca->hcca_frame_number))); 3146 ohci_dump_itds(xfer->hcpriv); 3147 ohci_dump_ed(sed); 3148 } 3149 #endif 3150 3151 s = splusb(); 3152 opipe->tail.itd = nsitd; 3153 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3154 splx(s); 3155 3156 #ifdef OHCI_DEBUG 3157 if (ohcidebug > 5) { 3158 delay(150000); 3159 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3160 le32toh(sc->sc_hcca->hcca_frame_number))); 3161 ohci_dump_itds(xfer->hcpriv); 3162 ohci_dump_ed(sed); 3163 } 3164 #endif 3165 } 3166 3167 usbd_status 3168 ohci_device_isoc_start(xfer) 3169 usbd_xfer_handle xfer; 3170 { 3171 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3172 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3173 3174 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3175 3176 if (sc->sc_dying) 3177 return (USBD_IOERROR); 3178 3179 #ifdef DIAGNOSTIC 3180 if (xfer->status != USBD_IN_PROGRESS) 3181 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 3182 #endif 3183 3184 /* XXX anything to do? */ 3185 3186 return (USBD_IN_PROGRESS); 3187 } 3188 3189 void 3190 ohci_device_isoc_abort(xfer) 3191 usbd_xfer_handle xfer; 3192 { 3193 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3194 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3195 ohci_soft_ed_t *sed; 3196 ohci_soft_itd_t *sitd; 3197 int s; 3198 3199 s = splusb(); 3200 3201 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3202 3203 /* Transfer is already done. */ 3204 if (xfer->status != USBD_NOT_STARTED && 3205 xfer->status != USBD_IN_PROGRESS) { 3206 splx(s); 3207 printf("ohci_device_isoc_abort: early return\n"); 3208 return; 3209 } 3210 3211 /* Give xfer the requested abort code. */ 3212 xfer->status = USBD_CANCELLED; 3213 3214 sed = opipe->sed; 3215 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3216 3217 sitd = xfer->hcpriv; 3218 #ifdef DIAGNOSTIC 3219 if (sitd == NULL) { 3220 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3221 return; 3222 } 3223 #endif 3224 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3225 #ifdef DIAGNOSTIC 3226 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3227 sitd->isdone = 1; 3228 #endif 3229 } 3230 3231 splx(s); 3232 3233 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3234 3235 s = splusb(); 3236 3237 /* Run callback. */ 3238 usb_transfer_complete(xfer); 3239 3240 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3241 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3242 3243 splx(s); 3244 } 3245 3246 void 3247 ohci_device_isoc_done(xfer) 3248 usbd_xfer_handle xfer; 3249 { 3250 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3251 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3252 ohci_soft_itd_t *sitd, *nsitd; 3253 3254 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3255 3256 for (sitd = xfer->hcpriv; 3257 !(sitd->flags & OHCI_CALL_DONE); 3258 sitd = nsitd) { 3259 nsitd = sitd->nextitd; 3260 DPRINTFN(1,("ohci_device_isoc_done: free sitd=%p\n", sitd)); 3261 ohci_free_sitd(sc, sitd); 3262 } 3263 ohci_free_sitd(sc, sitd); 3264 xfer->hcpriv = NULL; 3265 } 3266 3267 usbd_status 3268 ohci_setup_isoc(pipe) 3269 usbd_pipe_handle pipe; 3270 { 3271 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3272 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3273 struct iso *iso = &opipe->u.iso; 3274 int s; 3275 3276 iso->next = -1; 3277 iso->inuse = 0; 3278 3279 s = splusb(); 3280 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3281 splx(s); 3282 3283 return (USBD_NORMAL_COMPLETION); 3284 } 3285 3286 void 3287 ohci_device_isoc_close(pipe) 3288 usbd_pipe_handle pipe; 3289 { 3290 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3291 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3292 int s; 3293 3294 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3295 3296 s = splusb(); 3297 ohci_rem_ed(opipe->sed, sc->sc_isoc_head); 3298 splx(s); 3299 ohci_close_pipe(pipe, sc->sc_isoc_head); 3300 #ifdef DIAGNOSTIC 3301 opipe->tail.itd->isdone = 1; 3302 #endif 3303 ohci_free_sitd(sc, opipe->tail.itd); 3304 } 3305
Indexes created Wed Sep 24 05:09:52 GMT 2025