ohci.c revision 1.93
1 /* $NetBSD: ohci.c,v 1.93 2000/08/17 23:18:56 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe 45 * USB spec: http://www.usb.org/developers/data/usb11.pdf 46 */ 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/kernel.h> 53 #include <sys/device.h> 54 #include <sys/select.h> 55 #elif defined(__FreeBSD__) 56 #include <sys/module.h> 57 #include <sys/bus.h> 58 #include <machine/bus_pio.h> 59 #include <machine/bus_memio.h> 60 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 61 #include <machine/cpu.h> 62 #endif 63 #endif 64 #include <sys/proc.h> 65 #include <sys/queue.h> 66 67 #include <machine/bus.h> 68 #include <machine/endian.h> 69 70 #include <dev/usb/usb.h> 71 #include <dev/usb/usbdi.h> 72 #include <dev/usb/usbdivar.h> 73 #include <dev/usb/usb_mem.h> 74 #include <dev/usb/usb_quirks.h> 75 76 #include <dev/usb/ohcireg.h> 77 #include <dev/usb/ohcivar.h> 78 79 #if defined(__FreeBSD__) 80 #include <machine/clock.h> 81 82 #define delay(d) DELAY(d) 83 #endif 84 85 #if defined(__OpenBSD__) 86 struct cfdriver ohci_cd = { 87 NULL, "ohci", DV_DULL 88 }; 89 #endif 90 91 #ifdef OHCI_DEBUG 92 #define DPRINTF(x) if (ohcidebug) logprintf x 93 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 94 int ohcidebug = 0; 95 #ifndef __NetBSD__ 96 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 97 #endif 98 #else 99 #define DPRINTF(x) 100 #define DPRINTFN(n,x) 101 #endif 102 103 /* 104 * The OHCI controller is little endian, so on big endian machines 105 * the data strored in memory needs to be swapped. 106 */ 107 #if defined(__FreeBSD__) || defined(__OpenBSD__) 108 #if BYTE_ORDER == BIG_ENDIAN 109 #define htole32(x) (bswap32(x)) 110 #define le32toh(x) (bswap32(x)) 111 #else 112 #define htole32(x) (x) 113 #define le32toh(x) (x) 114 #endif 115 #endif 116 117 struct ohci_pipe; 118 119 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 120 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 121 122 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 123 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 124 125 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 126 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 127 128 #if 0 129 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 130 ohci_soft_td_t *); 131 #endif 132 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 133 ohci_softc_t *, int, int, usbd_xfer_handle, 134 ohci_soft_td_t *, ohci_soft_td_t **); 135 136 Static void ohci_shutdown(void *v); 137 Static void ohci_power(int, void *); 138 Static usbd_status ohci_open(usbd_pipe_handle); 139 Static void ohci_poll(struct usbd_bus *); 140 Static void ohci_softintr(struct usbd_bus *); 141 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 142 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t); 143 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 144 145 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 146 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 147 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 148 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 149 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 150 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 151 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 152 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 153 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 154 155 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 156 Static void ohci_device_isoc_enter(usbd_xfer_handle); 157 158 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 159 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 160 161 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 162 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 163 164 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 165 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 166 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 167 Static void ohci_root_ctrl_close(usbd_pipe_handle); 168 Static void ohci_root_ctrl_done(usbd_xfer_handle); 169 170 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 171 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 172 Static void ohci_root_intr_abort(usbd_xfer_handle); 173 Static void ohci_root_intr_close(usbd_pipe_handle); 174 Static void ohci_root_intr_done(usbd_xfer_handle); 175 176 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 177 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 178 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 179 Static void ohci_device_ctrl_close(usbd_pipe_handle); 180 Static void ohci_device_ctrl_done(usbd_xfer_handle); 181 182 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 183 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 184 Static void ohci_device_bulk_abort(usbd_xfer_handle); 185 Static void ohci_device_bulk_close(usbd_pipe_handle); 186 Static void ohci_device_bulk_done(usbd_xfer_handle); 187 188 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 189 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 190 Static void ohci_device_intr_abort(usbd_xfer_handle); 191 Static void ohci_device_intr_close(usbd_pipe_handle); 192 Static void ohci_device_intr_done(usbd_xfer_handle); 193 194 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 195 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 196 Static void ohci_device_isoc_abort(usbd_xfer_handle); 197 Static void ohci_device_isoc_close(usbd_pipe_handle); 198 Static void ohci_device_isoc_done(usbd_xfer_handle); 199 200 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 201 struct ohci_pipe *pipe, int ival); 202 203 Static int ohci_str(usb_string_descriptor_t *, int, char *); 204 205 Static void ohci_timeout(void *); 206 Static void ohci_rhsc_able(ohci_softc_t *, int); 207 208 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 209 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 210 Static void ohci_abort_xfer_end(void *); 211 212 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 213 Static void ohci_noop(usbd_pipe_handle pipe); 214 215 #ifdef OHCI_DEBUG 216 Static void ohci_dumpregs(ohci_softc_t *); 217 Static void ohci_dump_tds(ohci_soft_td_t *); 218 Static void ohci_dump_td(ohci_soft_td_t *); 219 Static void ohci_dump_ed(ohci_soft_ed_t *); 220 Static void ohci_dump_itd(ohci_soft_itd_t *); 221 Static void ohci_dump_itds(ohci_soft_itd_t *); 222 #endif 223 224 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 225 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 226 #define OWRITE1(sc, r, x) \ 227 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 228 #define OWRITE2(sc, r, x) \ 229 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 230 #define OWRITE4(sc, r, x) \ 231 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 232 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 233 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 234 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 235 236 /* Reverse the bits in a value 0 .. 31 */ 237 Static u_int8_t revbits[OHCI_NO_INTRS] = 238 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 239 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 240 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 241 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 242 243 struct ohci_pipe { 244 struct usbd_pipe pipe; 245 ohci_soft_ed_t *sed; 246 union { 247 ohci_soft_td_t *td; 248 ohci_soft_itd_t *itd; 249 } tail; 250 /* Info needed for different pipe kinds. */ 251 union { 252 /* Control pipe */ 253 struct { 254 usb_dma_t reqdma; 255 u_int length; 256 ohci_soft_td_t *setup, *data, *stat; 257 } ctl; 258 /* Interrupt pipe */ 259 struct { 260 int nslots; 261 int pos; 262 } intr; 263 /* Bulk pipe */ 264 struct { 265 u_int length; 266 int isread; 267 } bulk; 268 /* Iso pipe */ 269 struct iso { 270 int next, inuse; 271 } iso; 272 } u; 273 }; 274 275 #define OHCI_INTR_ENDPT 1 276 277 Static struct usbd_bus_methods ohci_bus_methods = { 278 ohci_open, 279 ohci_softintr, 280 ohci_poll, 281 ohci_allocm, 282 ohci_freem, 283 ohci_allocx, 284 ohci_freex, 285 }; 286 287 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 288 ohci_root_ctrl_transfer, 289 ohci_root_ctrl_start, 290 ohci_root_ctrl_abort, 291 ohci_root_ctrl_close, 292 ohci_noop, 293 ohci_root_ctrl_done, 294 }; 295 296 Static struct usbd_pipe_methods ohci_root_intr_methods = { 297 ohci_root_intr_transfer, 298 ohci_root_intr_start, 299 ohci_root_intr_abort, 300 ohci_root_intr_close, 301 ohci_noop, 302 ohci_root_intr_done, 303 }; 304 305 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 306 ohci_device_ctrl_transfer, 307 ohci_device_ctrl_start, 308 ohci_device_ctrl_abort, 309 ohci_device_ctrl_close, 310 ohci_noop, 311 ohci_device_ctrl_done, 312 }; 313 314 Static struct usbd_pipe_methods ohci_device_intr_methods = { 315 ohci_device_intr_transfer, 316 ohci_device_intr_start, 317 ohci_device_intr_abort, 318 ohci_device_intr_close, 319 ohci_device_clear_toggle, 320 ohci_device_intr_done, 321 }; 322 323 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 324 ohci_device_bulk_transfer, 325 ohci_device_bulk_start, 326 ohci_device_bulk_abort, 327 ohci_device_bulk_close, 328 ohci_device_clear_toggle, 329 ohci_device_bulk_done, 330 }; 331 332 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 333 ohci_device_isoc_transfer, 334 ohci_device_isoc_start, 335 ohci_device_isoc_abort, 336 ohci_device_isoc_close, 337 ohci_noop, 338 ohci_device_isoc_done, 339 }; 340 341 #if defined(__NetBSD__) || defined(__OpenBSD__) 342 int 343 ohci_activate(device_ptr_t self, enum devact act) 344 { 345 struct ohci_softc *sc = (struct ohci_softc *)self; 346 int rv = 0; 347 348 switch (act) { 349 case DVACT_ACTIVATE: 350 return (EOPNOTSUPP); 351 break; 352 353 case DVACT_DEACTIVATE: 354 if (sc->sc_child != NULL) 355 rv = config_deactivate(sc->sc_child); 356 sc->sc_dying = 1; 357 break; 358 } 359 return (rv); 360 } 361 362 int 363 ohci_detach(struct ohci_softc *sc, int flags) 364 { 365 int rv = 0; 366 367 if (sc->sc_child != NULL) 368 rv = config_detach(sc->sc_child, flags); 369 370 if (rv != 0) 371 return (rv); 372 373 #if defined(__NetBSD__) || defined(__OpenBSD__) 374 powerhook_disestablish(sc->sc_powerhook); 375 shutdownhook_disestablish(sc->sc_shutdownhook); 376 #endif 377 378 /* free data structures XXX */ 379 380 return (rv); 381 } 382 #endif 383 384 ohci_soft_ed_t * 385 ohci_alloc_sed(ohci_softc_t *sc) 386 { 387 ohci_soft_ed_t *sed; 388 usbd_status err; 389 int i, offs; 390 usb_dma_t dma; 391 392 if (sc->sc_freeeds == NULL) { 393 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 394 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 395 OHCI_ED_ALIGN, &dma); 396 if (err) 397 return (0); 398 for(i = 0; i < OHCI_SED_CHUNK; i++) { 399 offs = i * OHCI_SED_SIZE; 400 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 401 sed->physaddr = DMAADDR(&dma) + offs; 402 sed->next = sc->sc_freeeds; 403 sc->sc_freeeds = sed; 404 } 405 } 406 sed = sc->sc_freeeds; 407 sc->sc_freeeds = sed->next; 408 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 409 sed->next = 0; 410 return (sed); 411 } 412 413 void 414 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 415 { 416 sed->next = sc->sc_freeeds; 417 sc->sc_freeeds = sed; 418 } 419 420 ohci_soft_td_t * 421 ohci_alloc_std(ohci_softc_t *sc) 422 { 423 ohci_soft_td_t *std; 424 usbd_status err; 425 int i, offs; 426 usb_dma_t dma; 427 int s; 428 429 if (sc->sc_freetds == NULL) { 430 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 431 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 432 OHCI_TD_ALIGN, &dma); 433 if (err) 434 return (NULL); 435 s = splusb(); 436 for(i = 0; i < OHCI_STD_CHUNK; i++) { 437 offs = i * OHCI_STD_SIZE; 438 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 439 std->physaddr = DMAADDR(&dma) + offs; 440 std->nexttd = sc->sc_freetds; 441 sc->sc_freetds = std; 442 } 443 splx(s); 444 } 445 446 s = splusb(); 447 std = sc->sc_freetds; 448 sc->sc_freetds = std->nexttd; 449 memset(&std->td, 0, sizeof(ohci_td_t)); 450 std->nexttd = NULL; 451 std->xfer = NULL; 452 ohci_hash_add_td(sc, std); 453 splx(s); 454 455 return (std); 456 } 457 458 void 459 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 460 { 461 int s; 462 463 s = splusb(); 464 ohci_hash_rem_td(sc, std); 465 std->nexttd = sc->sc_freetds; 466 sc->sc_freetds = std; 467 splx(s); 468 } 469 470 usbd_status 471 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 472 int alen, int rd, usbd_xfer_handle xfer, 473 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 474 { 475 ohci_soft_td_t *next, *cur; 476 ohci_physaddr_t dataphys, dataphysend; 477 u_int32_t tdflags; 478 int len, curlen; 479 usb_dma_t *dma = &xfer->dmabuf; 480 u_int16_t flags = xfer->flags; 481 482 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 483 484 len = alen; 485 cur = sp; 486 dataphys = DMAADDR(dma); 487 dataphysend = OHCI_PAGE(dataphys + len - 1); 488 tdflags = htole32( 489 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 490 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 491 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 492 493 for (;;) { 494 next = ohci_alloc_std(sc); 495 if (next == NULL) 496 goto nomem; 497 498 /* The OHCI hardware can handle at most one page crossing. */ 499 if (OHCI_PAGE(dataphys) == dataphysend || 500 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 501 /* we can handle it in this TD */ 502 curlen = len; 503 } else { 504 /* must use multiple TDs, fill as much as possible. */ 505 curlen = 2 * OHCI_PAGE_SIZE - 506 (dataphys & (OHCI_PAGE_SIZE-1)); 507 /* the length must be a multiple of the max size */ 508 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 509 #ifdef DIAGNOSTIC 510 if (curlen == 0) 511 panic("ohci_alloc_std: curlen == 0\n"); 512 #endif 513 } 514 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 515 "dataphysend=0x%08x len=%d curlen=%d\n", 516 dataphys, dataphysend, 517 len, curlen)); 518 len -= curlen; 519 520 cur->td.td_flags = tdflags; 521 cur->td.td_cbp = htole32(dataphys); 522 cur->nexttd = next; 523 cur->td.td_nexttd = htole32(next->physaddr); 524 cur->td.td_be = htole32(dataphys + curlen - 1); 525 cur->len = curlen; 526 cur->flags = OHCI_ADD_LEN; 527 cur->xfer = xfer; 528 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 529 dataphys, dataphys + curlen - 1)); 530 if (len == 0) 531 break; 532 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 533 dataphys += curlen; 534 cur = next; 535 } 536 if ((flags & USBD_FORCE_SHORT_XFER) && 537 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 538 /* Force a 0 length transfer at the end. */ 539 540 cur = next; 541 next = ohci_alloc_std(sc); 542 if (next == NULL) 543 goto nomem; 544 545 cur->td.td_flags = tdflags; 546 cur->td.td_cbp = 0; /* indicate 0 length packet */ 547 cur->nexttd = next; 548 cur->td.td_nexttd = htole32(next->physaddr); 549 cur->td.td_be = ~0; 550 cur->len = 0; 551 cur->flags = 0; 552 cur->xfer = xfer; 553 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 554 } 555 *ep = cur; 556 557 return (USBD_NORMAL_COMPLETION); 558 559 nomem: 560 /* XXX free chain */ 561 return (USBD_NOMEM); 562 } 563 564 #if 0 565 Static void 566 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 567 ohci_soft_td_t *stdend) 568 { 569 ohci_soft_td_t *p; 570 571 for (; std != stdend; std = p) { 572 p = std->nexttd; 573 ohci_free_std(sc, std); 574 } 575 } 576 #endif 577 578 ohci_soft_itd_t * 579 ohci_alloc_sitd(ohci_softc_t *sc) 580 { 581 ohci_soft_itd_t *sitd; 582 usbd_status err; 583 int i, s, offs; 584 usb_dma_t dma; 585 586 if (sc->sc_freeitds == NULL) { 587 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 588 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 589 OHCI_ITD_ALIGN, &dma); 590 if (err) 591 return (NULL); 592 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 593 offs = i * OHCI_SITD_SIZE; 594 sitd = (ohci_soft_itd_t *)((char*)KERNADDR(&dma)+offs); 595 sitd->physaddr = DMAADDR(&dma) + offs; 596 sitd->nextitd = sc->sc_freeitds; 597 sc->sc_freeitds = sitd; 598 } 599 } 600 601 s = splusb(); 602 sitd = sc->sc_freeitds; 603 sc->sc_freeitds = sitd->nextitd; 604 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 605 sitd->nextitd = NULL; 606 sitd->xfer = NULL; 607 ohci_hash_add_itd(sc, sitd); 608 splx(s); 609 610 #ifdef DIAGNOSTIC 611 sitd->isdone = 0; 612 #endif 613 614 return (sitd); 615 } 616 617 void 618 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 619 { 620 int s; 621 622 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 623 624 #ifdef DIAGNOSTIC 625 if (!sitd->isdone) { 626 panic("ohci_free_sitd: sitd=%p not done\n", sitd); 627 return; 628 } 629 #endif 630 631 s = splusb(); 632 ohci_hash_rem_itd(sc, sitd); 633 sitd->nextitd = sc->sc_freeitds; 634 sc->sc_freeitds = sitd; 635 splx(s); 636 } 637 638 usbd_status 639 ohci_init(ohci_softc_t *sc) 640 { 641 ohci_soft_ed_t *sed, *psed; 642 usbd_status err; 643 int i; 644 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 645 646 DPRINTF(("ohci_init: start\n")); 647 #if defined(__OpenBSD__) 648 printf(","); 649 #else 650 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 651 #endif 652 rev = OREAD4(sc, OHCI_REVISION); 653 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 654 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 655 656 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 657 printf("%s: unsupported OHCI revision\n", 658 USBDEVNAME(sc->sc_bus.bdev)); 659 sc->sc_bus.usbrev = USBREV_UNKNOWN; 660 return (USBD_INVAL); 661 } 662 sc->sc_bus.usbrev = USBREV_1_0; 663 664 for (i = 0; i < OHCI_HASH_SIZE; i++) 665 LIST_INIT(&sc->sc_hash_tds[i]); 666 for (i = 0; i < OHCI_HASH_SIZE; i++) 667 LIST_INIT(&sc->sc_hash_itds[i]); 668 669 SIMPLEQ_INIT(&sc->sc_free_xfers); 670 671 /* XXX determine alignment by R/W */ 672 /* Allocate the HCCA area. */ 673 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 674 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 675 if (err) 676 return (err); 677 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 678 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 679 680 sc->sc_eintrs = OHCI_NORMAL_INTRS; 681 682 /* Allocate dummy ED that starts the control list. */ 683 sc->sc_ctrl_head = ohci_alloc_sed(sc); 684 if (sc->sc_ctrl_head == NULL) { 685 err = USBD_NOMEM; 686 goto bad1; 687 } 688 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 689 690 /* Allocate dummy ED that starts the bulk list. */ 691 sc->sc_bulk_head = ohci_alloc_sed(sc); 692 if (sc->sc_bulk_head == NULL) { 693 err = USBD_NOMEM; 694 goto bad2; 695 } 696 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 697 698 /* Allocate dummy ED that starts the isochronous list. */ 699 sc->sc_isoc_head = ohci_alloc_sed(sc); 700 if (sc->sc_isoc_head == NULL) { 701 err = USBD_NOMEM; 702 goto bad3; 703 } 704 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 705 706 /* Allocate all the dummy EDs that make up the interrupt tree. */ 707 for (i = 0; i < OHCI_NO_EDS; i++) { 708 sed = ohci_alloc_sed(sc); 709 if (sed == NULL) { 710 while (--i >= 0) 711 ohci_free_sed(sc, sc->sc_eds[i]); 712 err = USBD_NOMEM; 713 goto bad4; 714 } 715 /* All ED fields are set to 0. */ 716 sc->sc_eds[i] = sed; 717 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 718 if (i != 0) 719 psed = sc->sc_eds[(i-1) / 2]; 720 else 721 psed= sc->sc_isoc_head; 722 sed->next = psed; 723 sed->ed.ed_nexted = htole32(psed->physaddr); 724 } 725 /* 726 * Fill HCCA interrupt table. The bit reversal is to get 727 * the tree set up properly to spread the interrupts. 728 */ 729 for (i = 0; i < OHCI_NO_INTRS; i++) 730 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 731 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 732 733 #ifdef OHCI_DEBUG 734 if (ohcidebug > 15) { 735 for (i = 0; i < OHCI_NO_EDS; i++) { 736 printf("ed#%d ", i); 737 ohci_dump_ed(sc->sc_eds[i]); 738 } 739 printf("iso "); 740 ohci_dump_ed(sc->sc_isoc_head); 741 } 742 #endif 743 744 /* Determine in what context we are running. */ 745 ctl = OREAD4(sc, OHCI_CONTROL); 746 if (ctl & OHCI_IR) { 747 /* SMM active, request change */ 748 DPRINTF(("ohci_init: SMM active, request owner change\n")); 749 s = OREAD4(sc, OHCI_COMMAND_STATUS); 750 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 751 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 752 usb_delay_ms(&sc->sc_bus, 1); 753 ctl = OREAD4(sc, OHCI_CONTROL); 754 } 755 if ((ctl & OHCI_IR) == 0) { 756 printf("%s: SMM does not respond, resetting\n", 757 USBDEVNAME(sc->sc_bus.bdev)); 758 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 759 goto reset; 760 } 761 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 762 /* BIOS started controller. */ 763 DPRINTF(("ohci_init: BIOS active\n")); 764 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 765 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 766 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 767 } 768 } else { 769 DPRINTF(("ohci_init: cold started\n")); 770 reset: 771 /* Controller was cold started. */ 772 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 773 } 774 775 /* 776 * This reset should not be necessary according to the OHCI spec, but 777 * without it some controllers do not start. 778 */ 779 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 780 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 781 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 782 783 /* We now own the host controller and the bus has been reset. */ 784 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 785 786 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 787 /* Nominal time for a reset is 10 us. */ 788 for (i = 0; i < 10; i++) { 789 delay(10); 790 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 791 if (!hcr) 792 break; 793 } 794 if (hcr) { 795 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 796 err = USBD_IOERROR; 797 goto bad5; 798 } 799 #ifdef OHCI_DEBUG 800 if (ohcidebug > 15) 801 ohci_dumpregs(sc); 802 #endif 803 804 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 805 806 /* Set up HC registers. */ 807 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 808 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 809 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 810 /* disable all interrupts and then switch on all desired interrupts */ 811 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 812 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 813 /* switch on desired functional features */ 814 ctl = OREAD4(sc, OHCI_CONTROL); 815 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 816 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 817 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 818 /* And finally start it! */ 819 OWRITE4(sc, OHCI_CONTROL, ctl); 820 821 /* 822 * The controller is now OPERATIONAL. Set a some final 823 * registers that should be set earlier, but that the 824 * controller ignores when in the SUSPEND state. 825 */ 826 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 827 fm |= OHCI_FSMPS(ival) | ival; 828 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 829 per = OHCI_PERIODIC(ival); /* 90% periodic */ 830 OWRITE4(sc, OHCI_PERIODIC_START, per); 831 832 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 833 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 834 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 835 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 836 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 837 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 838 839 /* 840 * The AMD756 requires a delay before re-reading the register, 841 * otherwise it will occasionally report 0 ports. 842 */ 843 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 844 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 845 846 #ifdef OHCI_DEBUG 847 if (ohcidebug > 5) 848 ohci_dumpregs(sc); 849 #endif 850 851 /* Set up the bus struct. */ 852 sc->sc_bus.methods = &ohci_bus_methods; 853 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 854 855 #if defined(__NetBSD__) || defined(__OpenBSD__) 856 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 857 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 858 #endif 859 860 return (USBD_NORMAL_COMPLETION); 861 862 bad5: 863 for (i = 0; i < OHCI_NO_EDS; i++) 864 ohci_free_sed(sc, sc->sc_eds[i]); 865 bad4: 866 ohci_free_sed(sc, sc->sc_isoc_head); 867 bad3: 868 ohci_free_sed(sc, sc->sc_ctrl_head); 869 bad2: 870 ohci_free_sed(sc, sc->sc_bulk_head); 871 bad1: 872 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 873 return (err); 874 } 875 876 usbd_status 877 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 878 { 879 #if defined(__NetBSD__) || defined(__OpenBSD__) 880 struct ohci_softc *sc = (struct ohci_softc *)bus; 881 #endif 882 883 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 884 } 885 886 void 887 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 888 { 889 #if defined(__NetBSD__) || defined(__OpenBSD__) 890 struct ohci_softc *sc = (struct ohci_softc *)bus; 891 #endif 892 893 usb_freemem(&sc->sc_bus, dma); 894 } 895 896 usbd_xfer_handle 897 ohci_allocx(struct usbd_bus *bus) 898 { 899 struct ohci_softc *sc = (struct ohci_softc *)bus; 900 usbd_xfer_handle xfer; 901 902 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 903 if (xfer != NULL) 904 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 905 else 906 xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT); 907 if (xfer != NULL) 908 memset(xfer, 0, sizeof *xfer); 909 return (xfer); 910 } 911 912 void 913 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 914 { 915 struct ohci_softc *sc = (struct ohci_softc *)bus; 916 917 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 918 } 919 920 /* 921 * Shut down the controller when the system is going down. 922 */ 923 void 924 ohci_shutdown(void *v) 925 { 926 ohci_softc_t *sc = v; 927 928 DPRINTF(("ohci_shutdown: stopping the HC\n")); 929 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 930 } 931 932 /* 933 * Handle suspend/resume. 934 * 935 * We need to switch to polling mode here, because this routine is 936 * called from an intterupt context. This is all right since we 937 * are almost suspended anyway. 938 */ 939 void 940 ohci_power(int why, void *v) 941 { 942 #ifdef OHCI_DEBUG 943 ohci_softc_t *sc = v; 944 945 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 946 /* XXX should suspend/resume */ 947 ohci_dumpregs(sc); 948 #endif 949 } 950 951 #ifdef OHCI_DEBUG 952 void 953 ohci_dumpregs(ohci_softc_t *sc) 954 { 955 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 956 OREAD4(sc, OHCI_REVISION), 957 OREAD4(sc, OHCI_CONTROL), 958 OREAD4(sc, OHCI_COMMAND_STATUS))); 959 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 960 OREAD4(sc, OHCI_INTERRUPT_STATUS), 961 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 962 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 963 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 964 OREAD4(sc, OHCI_HCCA), 965 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 966 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 967 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 968 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 969 OREAD4(sc, OHCI_BULK_HEAD_ED), 970 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 971 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 972 OREAD4(sc, OHCI_DONE_HEAD), 973 OREAD4(sc, OHCI_FM_INTERVAL), 974 OREAD4(sc, OHCI_FM_REMAINING))); 975 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 976 OREAD4(sc, OHCI_FM_NUMBER), 977 OREAD4(sc, OHCI_PERIODIC_START), 978 OREAD4(sc, OHCI_LS_THRESHOLD))); 979 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 980 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 981 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 982 OREAD4(sc, OHCI_RH_STATUS))); 983 DPRINTF((" port1=0x%08x port2=0x%08x\n", 984 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 985 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 986 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 987 le32toh(sc->sc_hcca->hcca_frame_number), 988 le32toh(sc->sc_hcca->hcca_done_head))); 989 } 990 #endif 991 992 Static int ohci_intr1(ohci_softc_t *); 993 994 int 995 ohci_intr(void *p) 996 { 997 ohci_softc_t *sc = p; 998 999 /* If we get an interrupt while polling, then just ignore it. */ 1000 if (sc->sc_bus.use_polling) { 1001 #ifdef DIAGNOSTIC 1002 printf("ohci_intr: ignored interrupt while polling\n"); 1003 #endif 1004 return (0); 1005 } 1006 1007 return (ohci_intr1(sc)); 1008 } 1009 1010 Static int 1011 ohci_intr1(ohci_softc_t *sc) 1012 { 1013 u_int32_t intrs, eintrs; 1014 ohci_physaddr_t done; 1015 1016 /* In case the interrupt occurs before initialization has completed. */ 1017 if (sc == NULL || sc->sc_hcca == NULL) { 1018 #ifdef DIAGNOSTIC 1019 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1020 #endif 1021 return (0); 1022 } 1023 1024 intrs = 0; 1025 done = le32toh(sc->sc_hcca->hcca_done_head); 1026 if (done != 0) { 1027 if (done & ~OHCI_DONE_INTRS) 1028 intrs = OHCI_WDH; 1029 if (done & OHCI_DONE_INTRS) 1030 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1031 } else 1032 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1033 1034 if (!intrs) 1035 return (0); 1036 1037 intrs &= ~OHCI_MIE; 1038 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1039 eintrs = intrs & sc->sc_eintrs; 1040 if (!eintrs) 1041 return (0); 1042 1043 sc->sc_bus.intr_context++; 1044 sc->sc_bus.no_intrs++; 1045 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1046 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1047 (u_int)eintrs)); 1048 1049 if (eintrs & OHCI_SO) { 1050 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev)); 1051 /* XXX do what */ 1052 intrs &= ~OHCI_SO; 1053 } 1054 if (eintrs & OHCI_WDH) { 1055 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1056 sc->sc_hcca->hcca_done_head = 0; 1057 usb_schedsoftintr(&sc->sc_bus); 1058 intrs &= ~OHCI_WDH; 1059 } 1060 if (eintrs & OHCI_RD) { 1061 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1062 /* XXX process resume detect */ 1063 } 1064 if (eintrs & OHCI_UE) { 1065 printf("%s: unrecoverable error, controller halted\n", 1066 USBDEVNAME(sc->sc_bus.bdev)); 1067 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1068 /* XXX what else */ 1069 } 1070 if (eintrs & OHCI_RHSC) { 1071 ohci_rhsc(sc, sc->sc_intrxfer); 1072 intrs &= ~OHCI_RHSC; 1073 1074 /* 1075 * Disable RHSC interrupt for now, because it will be 1076 * on until the port has been reset. 1077 */ 1078 ohci_rhsc_able(sc, 0); 1079 } 1080 1081 sc->sc_bus.intr_context--; 1082 1083 /* Block unprocessed interrupts. XXX */ 1084 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 1085 sc->sc_eintrs &= ~intrs; 1086 1087 return (1); 1088 } 1089 1090 void 1091 ohci_rhsc_able(ohci_softc_t *sc, int on) 1092 { 1093 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1094 if (on) { 1095 sc->sc_eintrs |= OHCI_RHSC; 1096 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1097 } else { 1098 sc->sc_eintrs &= ~OHCI_RHSC; 1099 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1100 } 1101 } 1102 1103 #ifdef OHCI_DEBUG 1104 char *ohci_cc_strs[] = { 1105 "NO_ERROR", 1106 "CRC", 1107 "BIT_STUFFING", 1108 "DATA_TOGGLE_MISMATCH", 1109 "STALL", 1110 "DEVICE_NOT_RESPONDING", 1111 "PID_CHECK_FAILURE", 1112 "UNEXPECTED_PID", 1113 "DATA_OVERRUN", 1114 "DATA_UNDERRUN", 1115 "BUFFER_OVERRUN", 1116 "BUFFER_UNDERRUN", 1117 "reserved", 1118 "reserved", 1119 "NOT_ACCESSED", 1120 "NOT_ACCESSED", 1121 }; 1122 #endif 1123 1124 void 1125 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done) 1126 { 1127 ohci_soft_itd_t *sitd, *sidone, **ip; 1128 ohci_soft_td_t *std, *sdone, **p; 1129 1130 /* Reverse the done list. */ 1131 for (sdone = NULL, sidone = NULL; done != 0; ) { 1132 std = ohci_hash_find_td(sc, done); 1133 if (std != NULL) { 1134 std->dnext = sdone; 1135 done = le32toh(std->td.td_nexttd); 1136 sdone = std; 1137 DPRINTFN(10,("add TD %p\n", std)); 1138 continue; 1139 } 1140 sitd = ohci_hash_find_itd(sc, done); 1141 if (sitd != NULL) { 1142 sitd->dnext = sidone; 1143 done = le32toh(sitd->itd.itd_nextitd); 1144 sidone = sitd; 1145 DPRINTFN(5,("add ITD %p\n", sitd)); 1146 continue; 1147 } 1148 panic("ohci_add_done: addr 0x%08lx not found\n", (u_long)done); 1149 } 1150 1151 /* sdone & sidone now hold the done lists. */ 1152 /* Put them on the already processed lists. */ 1153 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1154 ; 1155 *p = sdone; 1156 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1157 ; 1158 *ip = sidone; 1159 } 1160 1161 void 1162 ohci_softintr(struct usbd_bus *bus) 1163 { 1164 ohci_softc_t *sc = (ohci_softc_t *)bus; 1165 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1166 ohci_soft_td_t *std, *sdone, *stdnext; 1167 usbd_xfer_handle xfer; 1168 int len, cc, s; 1169 1170 sc->sc_bus.intr_context++; 1171 1172 s = splhardusb(); 1173 sdone = sc->sc_sdone; 1174 sc->sc_sdone = NULL; 1175 sidone = sc->sc_sidone; 1176 sc->sc_sidone = NULL; 1177 splx(s); 1178 1179 DPRINTFN(10,("ohci_process_done: sdone=%p sidone=%p\n", sdone, sidone)); 1180 1181 #ifdef OHCI_DEBUG 1182 if (ohcidebug > 10) { 1183 DPRINTF(("ohci_process_done: TD done:\n")); 1184 ohci_dump_tds(sdone); 1185 } 1186 #endif 1187 1188 for (std = sdone; std; std = stdnext) { 1189 xfer = std->xfer; 1190 stdnext = std->dnext; 1191 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1192 std, xfer, xfer ? xfer->hcpriv : 0)); 1193 if (xfer == NULL) { 1194 /* xfer == NULL: There seems to be no xfer associated 1195 * with this TD. It is tailp that happened to end up on 1196 * the done queue. 1197 */ 1198 continue; 1199 } 1200 if (xfer->status == USBD_CANCELLED || 1201 xfer->status == USBD_TIMEOUT) { 1202 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1203 xfer)); 1204 /* Handled by abort routine. */ 1205 continue; 1206 } 1207 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1208 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1209 if (cc == OHCI_CC_NO_ERROR) { 1210 len = std->len; 1211 if (std->td.td_cbp != 0) 1212 len -= le32toh(std->td.td_be) - 1213 le32toh(std->td.td_cbp) + 1; 1214 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", 1215 len, std->flags)); 1216 if (std->flags & OHCI_ADD_LEN) 1217 xfer->actlen += len; 1218 if (std->flags & OHCI_CALL_DONE) { 1219 xfer->status = USBD_NORMAL_COMPLETION; 1220 usb_transfer_complete(xfer); 1221 } 1222 ohci_free_std(sc, std); 1223 } else { 1224 /* 1225 * Endpoint is halted. First unlink all the TDs 1226 * belonging to the failed transfer, and then restart 1227 * the endpoint. 1228 */ 1229 ohci_soft_td_t *p, *n; 1230 struct ohci_pipe *opipe = 1231 (struct ohci_pipe *)xfer->pipe; 1232 1233 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1234 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1235 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1236 1237 /* remove TDs */ 1238 for (p = std; p->xfer == xfer; p = n) { 1239 n = p->nexttd; 1240 ohci_free_std(sc, p); 1241 } 1242 1243 /* clear halt */ 1244 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1245 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1246 1247 if (cc == OHCI_CC_STALL) 1248 xfer->status = USBD_STALLED; 1249 else 1250 xfer->status = USBD_IOERROR; 1251 usb_transfer_complete(xfer); 1252 } 1253 } 1254 1255 #ifdef OHCI_DEBUG 1256 if (ohcidebug > 10) { 1257 DPRINTF(("ohci_process_done: ITD done:\n")); 1258 ohci_dump_itds(sidone); 1259 } 1260 #endif 1261 1262 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1263 xfer = sitd->xfer; 1264 sitdnext = sitd->dnext; 1265 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1266 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1267 if (xfer == NULL) 1268 continue; 1269 if (xfer->status == USBD_CANCELLED || 1270 xfer->status == USBD_TIMEOUT) { 1271 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1272 xfer)); 1273 /* Handled by abort routine. */ 1274 continue; 1275 } 1276 #ifdef DIAGNOSTIC 1277 if (sitd->isdone) 1278 printf("ohci_softintr: sitd=%p is done\n", sitd); 1279 sitd->isdone = 1; 1280 #endif 1281 cc = OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)); 1282 if (cc == OHCI_CC_NO_ERROR) { 1283 /* XXX compute length for input */ 1284 struct ohci_pipe *opipe = 1285 (struct ohci_pipe *)xfer->pipe; 1286 if (sitd->flags & OHCI_CALL_DONE) { 1287 opipe->u.iso.inuse -= xfer->nframes; 1288 /* XXX xfer->actlen = actlen; */ 1289 xfer->status = USBD_NORMAL_COMPLETION; 1290 usb_transfer_complete(xfer); 1291 } 1292 } else { 1293 /* XXX Do more */ 1294 xfer->status = USBD_IOERROR; 1295 usb_transfer_complete(xfer); 1296 } 1297 } 1298 1299 sc->sc_bus.intr_context--; 1300 } 1301 1302 void 1303 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1304 { 1305 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1306 1307 #ifdef DIAGNOSTIC 1308 if (!(xfer->rqflags & URQ_REQUEST)) { 1309 panic("ohci_ctrl_done: not a request\n"); 1310 } 1311 #endif 1312 xfer->hcpriv = NULL; 1313 } 1314 1315 void 1316 ohci_device_intr_done(usbd_xfer_handle xfer) 1317 { 1318 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1319 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1320 ohci_soft_ed_t *sed = opipe->sed; 1321 ohci_soft_td_t *data, *tail; 1322 1323 1324 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1325 xfer, xfer->actlen)); 1326 1327 xfer->hcpriv = NULL; 1328 1329 if (xfer->pipe->repeat) { 1330 data = opipe->tail.td; 1331 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1332 if (tail == NULL) { 1333 xfer->status = USBD_NOMEM; 1334 return; 1335 } 1336 tail->xfer = NULL; 1337 1338 data->td.td_flags = htole32( 1339 OHCI_TD_IN | OHCI_TD_NOCC | 1340 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1341 if (xfer->flags & USBD_SHORT_XFER_OK) 1342 data->td.td_flags |= htole32(OHCI_TD_R); 1343 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 1344 data->nexttd = tail; 1345 data->td.td_nexttd = htole32(tail->physaddr); 1346 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1347 xfer->length - 1); 1348 data->len = xfer->length; 1349 data->xfer = xfer; 1350 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1351 xfer->hcpriv = data; 1352 xfer->actlen = 0; 1353 1354 sed->ed.ed_tailp = htole32(tail->physaddr); 1355 opipe->tail.td = tail; 1356 } 1357 } 1358 1359 void 1360 ohci_device_bulk_done(usbd_xfer_handle xfer) 1361 { 1362 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1363 xfer, xfer->actlen)); 1364 1365 xfer->hcpriv = NULL; 1366 } 1367 1368 void 1369 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1370 { 1371 usbd_pipe_handle pipe; 1372 struct ohci_pipe *opipe; 1373 u_char *p; 1374 int i, m; 1375 int hstatus; 1376 1377 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1378 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1379 sc, xfer, hstatus)); 1380 1381 if (xfer == NULL) { 1382 /* Just ignore the change. */ 1383 return; 1384 } 1385 1386 pipe = xfer->pipe; 1387 opipe = (struct ohci_pipe *)pipe; 1388 1389 p = KERNADDR(&xfer->dmabuf); 1390 m = min(sc->sc_noport, xfer->length * 8 - 1); 1391 memset(p, 0, xfer->length); 1392 for (i = 1; i <= m; i++) { 1393 /* Pick out CHANGE bits from the status reg. */ 1394 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1395 p[i/8] |= 1 << (i%8); 1396 } 1397 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1398 xfer->actlen = xfer->length; 1399 xfer->status = USBD_NORMAL_COMPLETION; 1400 1401 usb_transfer_complete(xfer); 1402 } 1403 1404 void 1405 ohci_root_intr_done(usbd_xfer_handle xfer) 1406 { 1407 xfer->hcpriv = NULL; 1408 } 1409 1410 void 1411 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1412 { 1413 xfer->hcpriv = NULL; 1414 } 1415 1416 /* 1417 * Wait here until controller claims to have an interrupt. 1418 * Then call ohci_intr and return. Use timeout to avoid waiting 1419 * too long. 1420 */ 1421 void 1422 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1423 { 1424 int timo = xfer->timeout; 1425 int usecs; 1426 u_int32_t intrs; 1427 1428 xfer->status = USBD_IN_PROGRESS; 1429 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1430 usb_delay_ms(&sc->sc_bus, 1); 1431 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1432 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1433 #ifdef OHCI_DEBUG 1434 if (ohcidebug > 15) 1435 ohci_dumpregs(sc); 1436 #endif 1437 if (intrs) { 1438 ohci_intr1(sc); 1439 if (xfer->status != USBD_IN_PROGRESS) 1440 return; 1441 } 1442 } 1443 1444 /* Timeout */ 1445 DPRINTF(("ohci_waitintr: timeout\n")); 1446 xfer->status = USBD_TIMEOUT; 1447 usb_transfer_complete(xfer); 1448 /* XXX should free TD */ 1449 } 1450 1451 void 1452 ohci_poll(struct usbd_bus *bus) 1453 { 1454 ohci_softc_t *sc = (ohci_softc_t *)bus; 1455 1456 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1457 ohci_intr1(sc); 1458 } 1459 1460 usbd_status 1461 ohci_device_request(usbd_xfer_handle xfer) 1462 { 1463 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1464 usb_device_request_t *req = &xfer->request; 1465 usbd_device_handle dev = opipe->pipe.device; 1466 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1467 int addr = dev->address; 1468 ohci_soft_td_t *setup, *stat, *next, *tail; 1469 ohci_soft_ed_t *sed; 1470 int isread; 1471 int len; 1472 usbd_status err; 1473 int s; 1474 1475 isread = req->bmRequestType & UT_READ; 1476 len = UGETW(req->wLength); 1477 1478 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1479 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1480 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1481 UGETW(req->wIndex), len, addr, 1482 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1483 1484 setup = opipe->tail.td; 1485 stat = ohci_alloc_std(sc); 1486 if (stat == NULL) { 1487 err = USBD_NOMEM; 1488 goto bad1; 1489 } 1490 tail = ohci_alloc_std(sc); 1491 if (tail == NULL) { 1492 err = USBD_NOMEM; 1493 goto bad2; 1494 } 1495 tail->xfer = NULL; 1496 1497 sed = opipe->sed; 1498 opipe->u.ctl.length = len; 1499 1500 /* Update device address and length since they may have changed. */ 1501 /* XXX This only needs to be done once, but it's too early in open. */ 1502 /* XXXX Should not touch ED here! */ 1503 sed->ed.ed_flags = htole32( 1504 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1505 OHCI_ED_SET_FA(addr) | 1506 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1507 1508 next = stat; 1509 1510 /* Set up data transaction */ 1511 if (len != 0) { 1512 ohci_soft_td_t *std = stat; 1513 1514 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1515 std, &stat); 1516 stat = stat->nexttd; /* point at free TD */ 1517 if (err) 1518 goto bad3; 1519 /* Start toggle at 1 and then use the carried toggle. */ 1520 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1521 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1522 } 1523 1524 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1525 1526 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1527 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1528 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma)); 1529 setup->nexttd = next; 1530 setup->td.td_nexttd = htole32(next->physaddr); 1531 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1532 setup->len = 0; 1533 setup->xfer = xfer; 1534 setup->flags = 0; 1535 xfer->hcpriv = setup; 1536 1537 stat->td.td_flags = htole32( 1538 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1539 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1540 stat->td.td_cbp = 0; 1541 stat->nexttd = tail; 1542 stat->td.td_nexttd = htole32(tail->physaddr); 1543 stat->td.td_be = 0; 1544 stat->flags = OHCI_CALL_DONE; 1545 stat->len = 0; 1546 stat->xfer = xfer; 1547 1548 #ifdef OHCI_DEBUG 1549 if (ohcidebug > 5) { 1550 DPRINTF(("ohci_device_request:\n")); 1551 ohci_dump_ed(sed); 1552 ohci_dump_tds(setup); 1553 } 1554 #endif 1555 1556 /* Insert ED in schedule */ 1557 s = splusb(); 1558 sed->ed.ed_tailp = htole32(tail->physaddr); 1559 opipe->tail.td = tail; 1560 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1561 if (xfer->timeout && !sc->sc_bus.use_polling) { 1562 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 1563 ohci_timeout, xfer); 1564 } 1565 splx(s); 1566 1567 #if 0 1568 if (ohcidebug > 10) { 1569 delay(10000); 1570 DPRINTF(("ohci_device_request: status=%x\n", 1571 OREAD4(sc, OHCI_COMMAND_STATUS))); 1572 ohci_dump_ed(sed); 1573 ohci_dump_tds(setup); 1574 } 1575 #endif 1576 1577 return (USBD_NORMAL_COMPLETION); 1578 1579 bad3: 1580 ohci_free_std(sc, tail); 1581 bad2: 1582 ohci_free_std(sc, stat); 1583 bad1: 1584 return (err); 1585 } 1586 1587 /* 1588 * Add an ED to the schedule. Called at splusb(). 1589 */ 1590 void 1591 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1592 { 1593 SPLUSBCHECK; 1594 sed->next = head->next; 1595 sed->ed.ed_nexted = head->ed.ed_nexted; 1596 head->next = sed; 1597 head->ed.ed_nexted = htole32(sed->physaddr); 1598 } 1599 1600 /* 1601 * Remove an ED from the schedule. Called at splusb(). 1602 */ 1603 void 1604 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1605 { 1606 ohci_soft_ed_t *p; 1607 1608 SPLUSBCHECK; 1609 1610 /* XXX */ 1611 for (p = head; p == NULL && p->next != sed; p = p->next) 1612 ; 1613 if (p == NULL) 1614 panic("ohci_rem_ed: ED not found\n"); 1615 p->next = sed->next; 1616 p->ed.ed_nexted = sed->ed.ed_nexted; 1617 } 1618 1619 /* 1620 * When a transfer is completed the TD is added to the done queue by 1621 * the host controller. This queue is the processed by software. 1622 * Unfortunately the queue contains the physical address of the TD 1623 * and we have no simple way to translate this back to a kernel address. 1624 * To make the translation possible (and fast) we use a hash table of 1625 * TDs currently in the schedule. The physical address is used as the 1626 * hash value. 1627 */ 1628 1629 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1630 /* Called at splusb() */ 1631 void 1632 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1633 { 1634 int h = HASH(std->physaddr); 1635 1636 SPLUSBCHECK; 1637 1638 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1639 } 1640 1641 /* Called at splusb() */ 1642 void 1643 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1644 { 1645 SPLUSBCHECK; 1646 1647 LIST_REMOVE(std, hnext); 1648 } 1649 1650 ohci_soft_td_t * 1651 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1652 { 1653 int h = HASH(a); 1654 ohci_soft_td_t *std; 1655 1656 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1657 std != NULL; 1658 std = LIST_NEXT(std, hnext)) 1659 if (std->physaddr == a) 1660 return (std); 1661 return (NULL); 1662 } 1663 1664 /* Called at splusb() */ 1665 void 1666 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1667 { 1668 int h = HASH(sitd->physaddr); 1669 1670 SPLUSBCHECK; 1671 1672 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1673 sitd, (u_long)sitd->physaddr)); 1674 1675 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1676 } 1677 1678 /* Called at splusb() */ 1679 void 1680 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1681 { 1682 SPLUSBCHECK; 1683 1684 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1685 sitd, (u_long)sitd->physaddr)); 1686 1687 LIST_REMOVE(sitd, hnext); 1688 } 1689 1690 ohci_soft_itd_t * 1691 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1692 { 1693 int h = HASH(a); 1694 ohci_soft_itd_t *sitd; 1695 1696 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1697 sitd != NULL; 1698 sitd = LIST_NEXT(sitd, hnext)) 1699 if (sitd->physaddr == a) 1700 return (sitd); 1701 return (NULL); 1702 } 1703 1704 void 1705 ohci_timeout(void *addr) 1706 { 1707 usbd_xfer_handle xfer = addr; 1708 int s; 1709 1710 DPRINTF(("ohci_timeout: xfer=%p\n", xfer)); 1711 1712 s = splusb(); 1713 xfer->device->bus->intr_context++; 1714 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1715 xfer->device->bus->intr_context--; 1716 splx(s); 1717 } 1718 1719 #ifdef OHCI_DEBUG 1720 void 1721 ohci_dump_tds(ohci_soft_td_t *std) 1722 { 1723 for (; std; std = std->nexttd) 1724 ohci_dump_td(std); 1725 } 1726 1727 void 1728 ohci_dump_td(ohci_soft_td_t *std) 1729 { 1730 char sbuf[128]; 1731 1732 bitmask_snprintf((int)le32toh(std->td.td_flags), 1733 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1734 sbuf, sizeof(sbuf)); 1735 1736 DPRINTF(("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1737 "nexttd=0x%08lx be=0x%08lx\n", 1738 std, (u_long)std->physaddr, sbuf, 1739 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1740 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1741 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1742 (u_long)le32toh(std->td.td_cbp), 1743 (u_long)le32toh(std->td.td_nexttd), 1744 (u_long)le32toh(std->td.td_be))); 1745 } 1746 1747 void 1748 ohci_dump_itd(ohci_soft_itd_t *sitd) 1749 { 1750 int i; 1751 1752 DPRINTF(("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1753 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1754 sitd, (u_long)sitd->physaddr, 1755 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1756 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1757 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1758 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1759 (u_long)le32toh(sitd->itd.itd_bp0), 1760 (u_long)le32toh(sitd->itd.itd_nextitd), 1761 (u_long)le32toh(sitd->itd.itd_be))); 1762 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1763 DPRINTF(("offs[%d]=0x%04x ", i, 1764 (u_int)le16toh(sitd->itd.itd_offset[i]))); 1765 DPRINTF(("\n")); 1766 } 1767 1768 void 1769 ohci_dump_itds(ohci_soft_itd_t *sitd) 1770 { 1771 for (; sitd; sitd = sitd->nextitd) 1772 ohci_dump_itd(sitd); 1773 } 1774 1775 void 1776 ohci_dump_ed(ohci_soft_ed_t *sed) 1777 { 1778 char sbuf[128], sbuf2[128]; 1779 1780 bitmask_snprintf((int)le32toh(sed->ed.ed_flags), 1781 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1782 sbuf, sizeof(sbuf)); 1783 bitmask_snprintf((u_long)le32toh(sed->ed.ed_headp), 1784 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1785 1786 DPRINTF(("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d %s\ntailp=0x%08lx " 1787 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1788 sed, (u_long)sed->physaddr, 1789 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1790 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1791 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 1792 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 1793 (u_long)le32toh(sed->ed.ed_headp), 1794 (u_long)le32toh(sed->ed.ed_nexted))); 1795 } 1796 #endif 1797 1798 usbd_status 1799 ohci_open(usbd_pipe_handle pipe) 1800 { 1801 usbd_device_handle dev = pipe->device; 1802 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1803 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1804 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1805 u_int8_t addr = dev->address; 1806 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1807 ohci_soft_ed_t *sed; 1808 ohci_soft_td_t *std; 1809 ohci_soft_itd_t *sitd; 1810 ohci_physaddr_t tdphys; 1811 u_int32_t fmt; 1812 usbd_status err; 1813 int s; 1814 int ival; 1815 1816 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1817 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1818 1819 std = NULL; 1820 sed = NULL; 1821 1822 if (addr == sc->sc_addr) { 1823 switch (ed->bEndpointAddress) { 1824 case USB_CONTROL_ENDPOINT: 1825 pipe->methods = &ohci_root_ctrl_methods; 1826 break; 1827 case UE_DIR_IN | OHCI_INTR_ENDPT: 1828 pipe->methods = &ohci_root_intr_methods; 1829 break; 1830 default: 1831 return (USBD_INVAL); 1832 } 1833 } else { 1834 sed = ohci_alloc_sed(sc); 1835 if (sed == NULL) 1836 goto bad0; 1837 opipe->sed = sed; 1838 if (xfertype == UE_ISOCHRONOUS) { 1839 sitd = ohci_alloc_sitd(sc); 1840 if (sitd == NULL) { 1841 ohci_free_sitd(sc, sitd); 1842 goto bad1; 1843 } 1844 opipe->tail.itd = sitd; 1845 tdphys = sitd->physaddr; 1846 fmt = OHCI_ED_FORMAT_ISO; 1847 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 1848 fmt |= OHCI_ED_DIR_IN; 1849 else 1850 fmt |= OHCI_ED_DIR_OUT; 1851 } else { 1852 std = ohci_alloc_std(sc); 1853 if (std == NULL) { 1854 ohci_free_std(sc, std); 1855 goto bad1; 1856 } 1857 opipe->tail.td = std; 1858 tdphys = std->physaddr; 1859 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 1860 } 1861 sed->ed.ed_flags = htole32( 1862 OHCI_ED_SET_FA(addr) | 1863 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1864 (dev->lowspeed ? OHCI_ED_SPEED : 0) | fmt | 1865 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1866 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 1867 1868 switch (xfertype) { 1869 case UE_CONTROL: 1870 pipe->methods = &ohci_device_ctrl_methods; 1871 err = usb_allocmem(&sc->sc_bus, 1872 sizeof(usb_device_request_t), 1873 0, &opipe->u.ctl.reqdma); 1874 if (err) 1875 goto bad; 1876 s = splusb(); 1877 ohci_add_ed(sed, sc->sc_ctrl_head); 1878 splx(s); 1879 break; 1880 case UE_INTERRUPT: 1881 pipe->methods = &ohci_device_intr_methods; 1882 ival = pipe->interval; 1883 if (ival == USBD_DEFAULT_INTERVAL) 1884 ival = ed->bInterval; 1885 return (ohci_device_setintr(sc, opipe, ival)); 1886 case UE_ISOCHRONOUS: 1887 pipe->methods = &ohci_device_isoc_methods; 1888 return (ohci_setup_isoc(pipe)); 1889 case UE_BULK: 1890 pipe->methods = &ohci_device_bulk_methods; 1891 s = splusb(); 1892 ohci_add_ed(sed, sc->sc_bulk_head); 1893 splx(s); 1894 break; 1895 } 1896 } 1897 return (USBD_NORMAL_COMPLETION); 1898 1899 bad: 1900 if (std != NULL) 1901 ohci_free_std(sc, std); 1902 bad1: 1903 if (sed != NULL) 1904 ohci_free_sed(sc, sed); 1905 bad0: 1906 return (USBD_NOMEM); 1907 1908 } 1909 1910 /* 1911 * Close a reqular pipe. 1912 * Assumes that there are no pending transactions. 1913 */ 1914 void 1915 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 1916 { 1917 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1918 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1919 ohci_soft_ed_t *sed = opipe->sed; 1920 int s; 1921 1922 s = splusb(); 1923 #ifdef DIAGNOSTIC 1924 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 1925 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 1926 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 1927 ohci_physaddr_t td = le32toh(sed->ed.ed_headp); 1928 ohci_soft_td_t *std; 1929 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]); 1930 std != NULL; 1931 std = LIST_NEXT(std, hnext)) 1932 if (std->physaddr == td) 1933 break; 1934 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 1935 "tl=0x%x pipe=%p, std=%p\n", sed, 1936 (int)le32toh(sed->ed.ed_headp), 1937 (int)le32toh(sed->ed.ed_tailp), 1938 pipe, std); 1939 usb_delay_ms(&sc->sc_bus, 2); 1940 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 1941 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 1942 printf("ohci_close_pipe: pipe still not empty\n"); 1943 } 1944 #endif 1945 ohci_rem_ed(sed, head); 1946 splx(s); 1947 ohci_free_sed(sc, opipe->sed); 1948 } 1949 1950 /* 1951 * Abort a device request. 1952 * If this routine is called at splusb() it guarantees that the request 1953 * will be removed from the hardware scheduling and that the callback 1954 * for it will be called with USBD_CANCELLED status. 1955 * It's impossible to guarantee that the requested transfer will not 1956 * have happened since the hardware runs concurrently. 1957 * If the transaction has already happened we rely on the ordinary 1958 * interrupt processing to process it. 1959 */ 1960 void 1961 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 1962 { 1963 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1964 ohci_soft_ed_t *sed; 1965 1966 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p\n", xfer, opipe)); 1967 1968 xfer->status = status; 1969 1970 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1971 1972 sed = opipe->sed; 1973 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 1974 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 1975 1976 #if 1 1977 if (xfer->device->bus->intr_context) { 1978 /* We have no process context, so we can't use tsleep(). */ 1979 usb_callout(xfer->pipe->abort_handle, 1980 hz / USB_FRAMES_PER_SECOND, ohci_abort_xfer_end, xfer); 1981 } else { 1982 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 1983 KASSERT(intr_nesting_level == 0, 1984 ("ohci_abort_req in interrupt context")); 1985 #endif 1986 usb_delay_ms(opipe->pipe.device->bus, 1); 1987 ohci_abort_xfer_end(xfer); 1988 } 1989 #else 1990 delay(1000); 1991 ohci_abort_xfer_end(xfer); 1992 #endif 1993 } 1994 1995 void 1996 ohci_abort_xfer_end(void *v) 1997 { 1998 usbd_xfer_handle xfer = v; 1999 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2000 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2001 ohci_soft_ed_t *sed; 2002 ohci_soft_td_t *p, *n; 2003 int s; 2004 2005 s = splusb(); 2006 2007 p = xfer->hcpriv; 2008 #ifdef DIAGNOSTIC 2009 if (p == NULL) { 2010 printf("ohci_abort_xfer: hcpriv==0\n"); 2011 return; 2012 } 2013 #endif 2014 for (; p->xfer == xfer; p = n) { 2015 n = p->nexttd; 2016 ohci_free_std(sc, p); 2017 } 2018 2019 sed = opipe->sed; 2020 DPRINTFN(2,("ohci_abort_xfer: set hd=%x, tl=%x\n", 2021 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2022 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2023 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2024 2025 usb_transfer_complete(xfer); 2026 2027 splx(s); 2028 } 2029 2030 /* 2031 * Data structures and routines to emulate the root hub. 2032 */ 2033 Static usb_device_descriptor_t ohci_devd = { 2034 USB_DEVICE_DESCRIPTOR_SIZE, 2035 UDESC_DEVICE, /* type */ 2036 {0x00, 0x01}, /* USB version */ 2037 UDCLASS_HUB, /* class */ 2038 UDSUBCLASS_HUB, /* subclass */ 2039 0, /* protocol */ 2040 64, /* max packet */ 2041 {0},{0},{0x00,0x01}, /* device id */ 2042 1,2,0, /* string indicies */ 2043 1 /* # of configurations */ 2044 }; 2045 2046 Static usb_config_descriptor_t ohci_confd = { 2047 USB_CONFIG_DESCRIPTOR_SIZE, 2048 UDESC_CONFIG, 2049 {USB_CONFIG_DESCRIPTOR_SIZE + 2050 USB_INTERFACE_DESCRIPTOR_SIZE + 2051 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2052 1, 2053 1, 2054 0, 2055 UC_SELF_POWERED, 2056 0 /* max power */ 2057 }; 2058 2059 Static usb_interface_descriptor_t ohci_ifcd = { 2060 USB_INTERFACE_DESCRIPTOR_SIZE, 2061 UDESC_INTERFACE, 2062 0, 2063 0, 2064 1, 2065 UICLASS_HUB, 2066 UISUBCLASS_HUB, 2067 0, 2068 0 2069 }; 2070 2071 Static usb_endpoint_descriptor_t ohci_endpd = { 2072 USB_ENDPOINT_DESCRIPTOR_SIZE, 2073 UDESC_ENDPOINT, 2074 UE_DIR_IN | OHCI_INTR_ENDPT, 2075 UE_INTERRUPT, 2076 {8, 0}, /* max packet */ 2077 255 2078 }; 2079 2080 Static usb_hub_descriptor_t ohci_hubd = { 2081 USB_HUB_DESCRIPTOR_SIZE, 2082 UDESC_HUB, 2083 0, 2084 {0,0}, 2085 0, 2086 0, 2087 {0}, 2088 }; 2089 2090 Static int 2091 ohci_str(p, l, s) 2092 usb_string_descriptor_t *p; 2093 int l; 2094 char *s; 2095 { 2096 int i; 2097 2098 if (l == 0) 2099 return (0); 2100 p->bLength = 2 * strlen(s) + 2; 2101 if (l == 1) 2102 return (1); 2103 p->bDescriptorType = UDESC_STRING; 2104 l -= 2; 2105 for (i = 0; s[i] && l > 1; i++, l -= 2) 2106 USETW2(p->bString[i], 0, s[i]); 2107 return (2*i+2); 2108 } 2109 2110 /* 2111 * Simulate a hardware hub by handling all the necessary requests. 2112 */ 2113 Static usbd_status 2114 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2115 { 2116 usbd_status err; 2117 2118 /* Insert last in queue. */ 2119 err = usb_insert_transfer(xfer); 2120 if (err) 2121 return (err); 2122 2123 /* Pipe isn't running, start first */ 2124 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2125 } 2126 2127 Static usbd_status 2128 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2129 { 2130 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2131 usb_device_request_t *req; 2132 void *buf = NULL; 2133 int port, i; 2134 int s, len, value, index, l, totlen = 0; 2135 usb_port_status_t ps; 2136 usb_hub_descriptor_t hubd; 2137 usbd_status err; 2138 u_int32_t v; 2139 2140 if (sc->sc_dying) 2141 return (USBD_IOERROR); 2142 2143 #ifdef DIAGNOSTIC 2144 if (!(xfer->rqflags & URQ_REQUEST)) 2145 /* XXX panic */ 2146 return (USBD_INVAL); 2147 #endif 2148 req = &xfer->request; 2149 2150 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2151 req->bmRequestType, req->bRequest)); 2152 2153 len = UGETW(req->wLength); 2154 value = UGETW(req->wValue); 2155 index = UGETW(req->wIndex); 2156 2157 if (len != 0) 2158 buf = KERNADDR(&xfer->dmabuf); 2159 2160 #define C(x,y) ((x) | ((y) << 8)) 2161 switch(C(req->bRequest, req->bmRequestType)) { 2162 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2163 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2164 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2165 /* 2166 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2167 * for the integrated root hub. 2168 */ 2169 break; 2170 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2171 if (len > 0) { 2172 *(u_int8_t *)buf = sc->sc_conf; 2173 totlen = 1; 2174 } 2175 break; 2176 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2177 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2178 switch(value >> 8) { 2179 case UDESC_DEVICE: 2180 if ((value & 0xff) != 0) { 2181 err = USBD_IOERROR; 2182 goto ret; 2183 } 2184 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2185 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2186 memcpy(buf, &ohci_devd, l); 2187 break; 2188 case UDESC_CONFIG: 2189 if ((value & 0xff) != 0) { 2190 err = USBD_IOERROR; 2191 goto ret; 2192 } 2193 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2194 memcpy(buf, &ohci_confd, l); 2195 buf = (char *)buf + l; 2196 len -= l; 2197 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2198 totlen += l; 2199 memcpy(buf, &ohci_ifcd, l); 2200 buf = (char *)buf + l; 2201 len -= l; 2202 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2203 totlen += l; 2204 memcpy(buf, &ohci_endpd, l); 2205 break; 2206 case UDESC_STRING: 2207 if (len == 0) 2208 break; 2209 *(u_int8_t *)buf = 0; 2210 totlen = 1; 2211 switch (value & 0xff) { 2212 case 1: /* Vendor */ 2213 totlen = ohci_str(buf, len, sc->sc_vendor); 2214 break; 2215 case 2: /* Product */ 2216 totlen = ohci_str(buf, len, "OHCI root hub"); 2217 break; 2218 } 2219 break; 2220 default: 2221 err = USBD_IOERROR; 2222 goto ret; 2223 } 2224 break; 2225 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2226 if (len > 0) { 2227 *(u_int8_t *)buf = 0; 2228 totlen = 1; 2229 } 2230 break; 2231 case C(UR_GET_STATUS, UT_READ_DEVICE): 2232 if (len > 1) { 2233 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2234 totlen = 2; 2235 } 2236 break; 2237 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2238 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2239 if (len > 1) { 2240 USETW(((usb_status_t *)buf)->wStatus, 0); 2241 totlen = 2; 2242 } 2243 break; 2244 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2245 if (value >= USB_MAX_DEVICES) { 2246 err = USBD_IOERROR; 2247 goto ret; 2248 } 2249 sc->sc_addr = value; 2250 break; 2251 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2252 if (value != 0 && value != 1) { 2253 err = USBD_IOERROR; 2254 goto ret; 2255 } 2256 sc->sc_conf = value; 2257 break; 2258 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2259 break; 2260 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2261 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2262 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2263 err = USBD_IOERROR; 2264 goto ret; 2265 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2266 break; 2267 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2268 break; 2269 /* Hub requests */ 2270 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2271 break; 2272 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2273 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2274 "port=%d feature=%d\n", 2275 index, value)); 2276 if (index < 1 || index > sc->sc_noport) { 2277 err = USBD_IOERROR; 2278 goto ret; 2279 } 2280 port = OHCI_RH_PORT_STATUS(index); 2281 switch(value) { 2282 case UHF_PORT_ENABLE: 2283 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2284 break; 2285 case UHF_PORT_SUSPEND: 2286 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2287 break; 2288 case UHF_PORT_POWER: 2289 /* Yes, writing to the LOW_SPEED bit clears power. */ 2290 OWRITE4(sc, port, UPS_LOW_SPEED); 2291 break; 2292 case UHF_C_PORT_CONNECTION: 2293 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2294 break; 2295 case UHF_C_PORT_ENABLE: 2296 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2297 break; 2298 case UHF_C_PORT_SUSPEND: 2299 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2300 break; 2301 case UHF_C_PORT_OVER_CURRENT: 2302 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2303 break; 2304 case UHF_C_PORT_RESET: 2305 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2306 break; 2307 default: 2308 err = USBD_IOERROR; 2309 goto ret; 2310 } 2311 switch(value) { 2312 case UHF_C_PORT_CONNECTION: 2313 case UHF_C_PORT_ENABLE: 2314 case UHF_C_PORT_SUSPEND: 2315 case UHF_C_PORT_OVER_CURRENT: 2316 case UHF_C_PORT_RESET: 2317 /* Enable RHSC interrupt if condition is cleared. */ 2318 if ((OREAD4(sc, port) >> 16) == 0) 2319 ohci_rhsc_able(sc, 1); 2320 break; 2321 default: 2322 break; 2323 } 2324 break; 2325 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2326 if (value != 0) { 2327 err = USBD_IOERROR; 2328 goto ret; 2329 } 2330 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2331 hubd = ohci_hubd; 2332 hubd.bNbrPorts = sc->sc_noport; 2333 USETW(hubd.wHubCharacteristics, 2334 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2335 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2336 /* XXX overcurrent */ 2337 ); 2338 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2339 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2340 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2341 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2342 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2343 l = min(len, hubd.bDescLength); 2344 totlen = l; 2345 memcpy(buf, &hubd, l); 2346 break; 2347 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2348 if (len != 4) { 2349 err = USBD_IOERROR; 2350 goto ret; 2351 } 2352 memset(buf, 0, len); /* ? XXX */ 2353 totlen = len; 2354 break; 2355 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2356 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2357 index)); 2358 if (index < 1 || index > sc->sc_noport) { 2359 err = USBD_IOERROR; 2360 goto ret; 2361 } 2362 if (len != 4) { 2363 err = USBD_IOERROR; 2364 goto ret; 2365 } 2366 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2367 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2368 v)); 2369 USETW(ps.wPortStatus, v); 2370 USETW(ps.wPortChange, v >> 16); 2371 l = min(len, sizeof ps); 2372 memcpy(buf, &ps, l); 2373 totlen = l; 2374 break; 2375 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2376 err = USBD_IOERROR; 2377 goto ret; 2378 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2379 break; 2380 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2381 if (index < 1 || index > sc->sc_noport) { 2382 err = USBD_IOERROR; 2383 goto ret; 2384 } 2385 port = OHCI_RH_PORT_STATUS(index); 2386 switch(value) { 2387 case UHF_PORT_ENABLE: 2388 OWRITE4(sc, port, UPS_PORT_ENABLED); 2389 break; 2390 case UHF_PORT_SUSPEND: 2391 OWRITE4(sc, port, UPS_SUSPEND); 2392 break; 2393 case UHF_PORT_RESET: 2394 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2395 index)); 2396 OWRITE4(sc, port, UPS_RESET); 2397 for (i = 0; i < 10; i++) { 2398 usb_delay_ms(&sc->sc_bus, 10); /* XXX */ 2399 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2400 break; 2401 } 2402 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2403 index, OREAD4(sc, port))); 2404 break; 2405 case UHF_PORT_POWER: 2406 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2407 "%d\n", index)); 2408 OWRITE4(sc, port, UPS_PORT_POWER); 2409 break; 2410 default: 2411 err = USBD_IOERROR; 2412 goto ret; 2413 } 2414 break; 2415 default: 2416 err = USBD_IOERROR; 2417 goto ret; 2418 } 2419 xfer->actlen = totlen; 2420 err = USBD_NORMAL_COMPLETION; 2421 ret: 2422 xfer->status = err; 2423 s = splusb(); 2424 usb_transfer_complete(xfer); 2425 splx(s); 2426 return (USBD_IN_PROGRESS); 2427 } 2428 2429 /* Abort a root control request. */ 2430 Static void 2431 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2432 { 2433 /* Nothing to do, all transfers are synchronous. */ 2434 } 2435 2436 /* Close the root pipe. */ 2437 Static void 2438 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2439 { 2440 DPRINTF(("ohci_root_ctrl_close\n")); 2441 /* Nothing to do. */ 2442 } 2443 2444 Static usbd_status 2445 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2446 { 2447 usbd_status err; 2448 2449 /* Insert last in queue. */ 2450 err = usb_insert_transfer(xfer); 2451 if (err) 2452 return (err); 2453 2454 /* Pipe isn't running, start first */ 2455 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2456 } 2457 2458 Static usbd_status 2459 ohci_root_intr_start(usbd_xfer_handle xfer) 2460 { 2461 usbd_pipe_handle pipe = xfer->pipe; 2462 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2463 2464 if (sc->sc_dying) 2465 return (USBD_IOERROR); 2466 2467 sc->sc_intrxfer = xfer; 2468 2469 return (USBD_IN_PROGRESS); 2470 } 2471 2472 /* Abort a root interrupt request. */ 2473 Static void 2474 ohci_root_intr_abort(usbd_xfer_handle xfer) 2475 { 2476 int s; 2477 2478 if (xfer->pipe->intrxfer == xfer) { 2479 DPRINTF(("ohci_root_intr_abort: remove\n")); 2480 xfer->pipe->intrxfer = NULL; 2481 } 2482 xfer->status = USBD_CANCELLED; 2483 s = splusb(); 2484 usb_transfer_complete(xfer); 2485 splx(s); 2486 } 2487 2488 /* Close the root pipe. */ 2489 Static void 2490 ohci_root_intr_close(usbd_pipe_handle pipe) 2491 { 2492 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2493 2494 DPRINTF(("ohci_root_intr_close\n")); 2495 2496 sc->sc_intrxfer = NULL; 2497 } 2498 2499 /************************/ 2500 2501 Static usbd_status 2502 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2503 { 2504 usbd_status err; 2505 2506 /* Insert last in queue. */ 2507 err = usb_insert_transfer(xfer); 2508 if (err) 2509 return (err); 2510 2511 /* Pipe isn't running, start first */ 2512 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2513 } 2514 2515 Static usbd_status 2516 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2517 { 2518 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2519 usbd_status err; 2520 2521 if (sc->sc_dying) 2522 return (USBD_IOERROR); 2523 2524 #ifdef DIAGNOSTIC 2525 if (!(xfer->rqflags & URQ_REQUEST)) { 2526 /* XXX panic */ 2527 printf("ohci_device_ctrl_transfer: not a request\n"); 2528 return (USBD_INVAL); 2529 } 2530 #endif 2531 2532 err = ohci_device_request(xfer); 2533 if (err) 2534 return (err); 2535 2536 if (sc->sc_bus.use_polling) 2537 ohci_waitintr(sc, xfer); 2538 return (USBD_IN_PROGRESS); 2539 } 2540 2541 /* Abort a device control request. */ 2542 Static void 2543 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2544 { 2545 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2546 ohci_abort_xfer(xfer, USBD_CANCELLED); 2547 } 2548 2549 /* Close a device control pipe. */ 2550 Static void 2551 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2552 { 2553 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2554 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2555 2556 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2557 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2558 ohci_free_std(sc, opipe->tail.td); 2559 } 2560 2561 /************************/ 2562 2563 Static void 2564 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2565 { 2566 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2567 2568 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2569 } 2570 2571 Static void 2572 ohci_noop(usbd_pipe_handle pipe) 2573 { 2574 } 2575 2576 Static usbd_status 2577 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2578 { 2579 usbd_status err; 2580 2581 /* Insert last in queue. */ 2582 err = usb_insert_transfer(xfer); 2583 if (err) 2584 return (err); 2585 2586 /* Pipe isn't running, start first */ 2587 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2588 } 2589 2590 Static usbd_status 2591 ohci_device_bulk_start(usbd_xfer_handle xfer) 2592 { 2593 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2594 usbd_device_handle dev = opipe->pipe.device; 2595 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2596 int addr = dev->address; 2597 ohci_soft_td_t *data, *tail, *tdp; 2598 ohci_soft_ed_t *sed; 2599 int s, len, isread, endpt; 2600 usbd_status err; 2601 2602 if (sc->sc_dying) 2603 return (USBD_IOERROR); 2604 2605 #ifdef DIAGNOSTIC 2606 if (xfer->rqflags & URQ_REQUEST) { 2607 /* XXX panic */ 2608 printf("ohci_device_bulk_start: a request\n"); 2609 return (USBD_INVAL); 2610 } 2611 #endif 2612 2613 len = xfer->length; 2614 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2615 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2616 sed = opipe->sed; 2617 2618 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2619 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2620 endpt)); 2621 2622 opipe->u.bulk.isread = isread; 2623 opipe->u.bulk.length = len; 2624 2625 /* Update device address */ 2626 sed->ed.ed_flags = htole32( 2627 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2628 OHCI_ED_SET_FA(addr)); 2629 2630 /* Allocate a chain of new TDs (including a new tail). */ 2631 data = opipe->tail.td; 2632 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2633 data, &tail); 2634 /* We want interrupt at the end of the transfer. */ 2635 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2636 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2637 tail->flags |= OHCI_CALL_DONE; 2638 tail = tail->nexttd; /* point at sentinel */ 2639 if (err) 2640 return (err); 2641 2642 tail->xfer = NULL; 2643 xfer->hcpriv = data; 2644 2645 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2646 "td_cbp=0x%08x td_be=0x%08x\n", 2647 (int)le32toh(sed->ed.ed_flags), 2648 (int)le32toh(data->td.td_flags), 2649 (int)le32toh(data->td.td_cbp), 2650 (int)le32toh(data->td.td_be))); 2651 2652 #ifdef OHCI_DEBUG 2653 if (ohcidebug > 5) { 2654 ohci_dump_ed(sed); 2655 ohci_dump_tds(data); 2656 } 2657 #endif 2658 2659 /* Insert ED in schedule */ 2660 s = splusb(); 2661 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2662 tdp->xfer = xfer; 2663 } 2664 sed->ed.ed_tailp = htole32(tail->physaddr); 2665 opipe->tail.td = tail; 2666 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2667 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2668 if (xfer->timeout && !sc->sc_bus.use_polling) { 2669 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2670 ohci_timeout, xfer); 2671 } 2672 2673 #if 0 2674 /* This goes wrong if we are too slow. */ 2675 if (ohcidebug > 10) { 2676 delay(10000); 2677 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2678 OREAD4(sc, OHCI_COMMAND_STATUS))); 2679 ohci_dump_ed(sed); 2680 ohci_dump_tds(data); 2681 } 2682 #endif 2683 2684 splx(s); 2685 2686 return (USBD_IN_PROGRESS); 2687 } 2688 2689 Static void 2690 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2691 { 2692 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2693 ohci_abort_xfer(xfer, USBD_CANCELLED); 2694 } 2695 2696 /* 2697 * Close a device bulk pipe. 2698 */ 2699 Static void 2700 ohci_device_bulk_close(usbd_pipe_handle pipe) 2701 { 2702 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2703 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2704 2705 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2706 ohci_close_pipe(pipe, sc->sc_bulk_head); 2707 ohci_free_std(sc, opipe->tail.td); 2708 } 2709 2710 /************************/ 2711 2712 Static usbd_status 2713 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2714 { 2715 usbd_status err; 2716 2717 /* Insert last in queue. */ 2718 err = usb_insert_transfer(xfer); 2719 if (err) 2720 return (err); 2721 2722 /* Pipe isn't running, start first */ 2723 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2724 } 2725 2726 Static usbd_status 2727 ohci_device_intr_start(usbd_xfer_handle xfer) 2728 { 2729 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2730 usbd_device_handle dev = opipe->pipe.device; 2731 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2732 ohci_soft_ed_t *sed = opipe->sed; 2733 ohci_soft_td_t *data, *tail; 2734 int len; 2735 int s; 2736 2737 if (sc->sc_dying) 2738 return (USBD_IOERROR); 2739 2740 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2741 "flags=%d priv=%p\n", 2742 xfer, xfer->length, xfer->flags, xfer->priv)); 2743 2744 #ifdef DIAGNOSTIC 2745 if (xfer->rqflags & URQ_REQUEST) 2746 panic("ohci_device_intr_transfer: a request\n"); 2747 #endif 2748 2749 len = xfer->length; 2750 2751 data = opipe->tail.td; 2752 tail = ohci_alloc_std(sc); 2753 if (tail == NULL) 2754 return (USBD_NOMEM); 2755 tail->xfer = NULL; 2756 2757 data->td.td_flags = htole32( 2758 OHCI_TD_IN | OHCI_TD_NOCC | 2759 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2760 if (xfer->flags & USBD_SHORT_XFER_OK) 2761 data->td.td_flags |= htole32(OHCI_TD_R); 2762 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 2763 data->nexttd = tail; 2764 data->td.td_nexttd = htole32(tail->physaddr); 2765 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 2766 data->len = len; 2767 data->xfer = xfer; 2768 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2769 xfer->hcpriv = data; 2770 2771 #ifdef OHCI_DEBUG 2772 if (ohcidebug > 5) { 2773 DPRINTF(("ohci_device_intr_transfer:\n")); 2774 ohci_dump_ed(sed); 2775 ohci_dump_tds(data); 2776 } 2777 #endif 2778 2779 /* Insert ED in schedule */ 2780 s = splusb(); 2781 sed->ed.ed_tailp = htole32(tail->physaddr); 2782 opipe->tail.td = tail; 2783 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2784 2785 #if 0 2786 /* 2787 * This goes horribly wrong, printing thousands of descriptors, 2788 * because false references are followed due to the fact that the 2789 * TD is gone. 2790 */ 2791 if (ohcidebug > 5) { 2792 usb_delay_ms(&sc->sc_bus, 5); 2793 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2794 OREAD4(sc, OHCI_COMMAND_STATUS))); 2795 ohci_dump_ed(sed); 2796 ohci_dump_tds(data); 2797 } 2798 #endif 2799 splx(s); 2800 2801 return (USBD_IN_PROGRESS); 2802 } 2803 2804 /* Abort a device control request. */ 2805 Static void 2806 ohci_device_intr_abort(usbd_xfer_handle xfer) 2807 { 2808 if (xfer->pipe->intrxfer == xfer) { 2809 DPRINTF(("ohci_device_intr_abort: remove\n")); 2810 xfer->pipe->intrxfer = NULL; 2811 } 2812 ohci_abort_xfer(xfer, USBD_CANCELLED); 2813 } 2814 2815 /* Close a device interrupt pipe. */ 2816 Static void 2817 ohci_device_intr_close(usbd_pipe_handle pipe) 2818 { 2819 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2820 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2821 int nslots = opipe->u.intr.nslots; 2822 int pos = opipe->u.intr.pos; 2823 int j; 2824 ohci_soft_ed_t *p, *sed = opipe->sed; 2825 int s; 2826 2827 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2828 pipe, nslots, pos)); 2829 s = splusb(); 2830 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2831 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2832 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2833 usb_delay_ms(&sc->sc_bus, 2); 2834 2835 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2836 ; 2837 #ifdef DIAGNOSTIC 2838 if (p == NULL) 2839 panic("ohci_device_intr_close: ED not found\n"); 2840 #endif 2841 p->next = sed->next; 2842 p->ed.ed_nexted = sed->ed.ed_nexted; 2843 splx(s); 2844 2845 for (j = 0; j < nslots; j++) 2846 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2847 2848 ohci_free_std(sc, opipe->tail.td); 2849 ohci_free_sed(sc, opipe->sed); 2850 } 2851 2852 Static usbd_status 2853 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 2854 { 2855 int i, j, s, best; 2856 u_int npoll, slow, shigh, nslots; 2857 u_int bestbw, bw; 2858 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2859 2860 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2861 if (ival == 0) { 2862 printf("ohci_setintr: 0 interval\n"); 2863 return (USBD_INVAL); 2864 } 2865 2866 npoll = OHCI_NO_INTRS; 2867 while (npoll > ival) 2868 npoll /= 2; 2869 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2870 2871 /* 2872 * We now know which level in the tree the ED must go into. 2873 * Figure out which slot has most bandwidth left over. 2874 * Slots to examine: 2875 * npoll 2876 * 1 0 2877 * 2 1 2 2878 * 4 3 4 5 6 2879 * 8 7 8 9 10 11 12 13 14 2880 * N (N-1) .. (N-1+N-1) 2881 */ 2882 slow = npoll-1; 2883 shigh = slow + npoll; 2884 nslots = OHCI_NO_INTRS / npoll; 2885 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2886 bw = 0; 2887 for (j = 0; j < nslots; j++) 2888 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 2889 if (bw < bestbw) { 2890 best = i; 2891 bestbw = bw; 2892 } 2893 } 2894 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2895 best, slow, shigh, bestbw)); 2896 2897 s = splusb(); 2898 hsed = sc->sc_eds[best]; 2899 sed->next = hsed->next; 2900 sed->ed.ed_nexted = hsed->ed.ed_nexted; 2901 hsed->next = sed; 2902 hsed->ed.ed_nexted = htole32(sed->physaddr); 2903 splx(s); 2904 2905 for (j = 0; j < nslots; j++) 2906 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 2907 opipe->u.intr.nslots = nslots; 2908 opipe->u.intr.pos = best; 2909 2910 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 2911 return (USBD_NORMAL_COMPLETION); 2912 } 2913 2914 /***********************/ 2915 2916 usbd_status 2917 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 2918 { 2919 usbd_status err; 2920 2921 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 2922 2923 /* Put it on our queue, */ 2924 err = usb_insert_transfer(xfer); 2925 2926 /* bail out on error, */ 2927 if (err && err != USBD_IN_PROGRESS) 2928 return (err); 2929 2930 /* XXX should check inuse here */ 2931 2932 /* insert into schedule, */ 2933 ohci_device_isoc_enter(xfer); 2934 2935 /* and start if the pipe wasn't running */ 2936 if (!err) 2937 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2938 2939 return (err); 2940 } 2941 2942 void 2943 ohci_device_isoc_enter(usbd_xfer_handle xfer) 2944 { 2945 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2946 usbd_device_handle dev = opipe->pipe.device; 2947 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2948 ohci_soft_ed_t *sed = opipe->sed; 2949 struct iso *iso = &opipe->u.iso; 2950 ohci_soft_itd_t *sitd, *nsitd; 2951 ohci_physaddr_t buf, offs, noffs, bp0; 2952 int i, ncur, nframes; 2953 int s; 2954 2955 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 2956 "nframes=%d\n", 2957 iso->inuse, iso->next, xfer, xfer->nframes)); 2958 2959 if (sc->sc_dying) 2960 return; 2961 2962 if (iso->next == -1) { 2963 /* Not in use yet, schedule it a few frames ahead. */ 2964 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 2965 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 2966 iso->next)); 2967 } 2968 2969 sitd = opipe->tail.itd; 2970 buf = DMAADDR(&xfer->dmabuf); 2971 bp0 = OHCI_PAGE(buf); 2972 offs = OHCI_PAGE_OFFSET(buf); 2973 nframes = xfer->nframes; 2974 xfer->hcpriv = sitd; 2975 for (i = ncur = 0; i < nframes; i++, ncur++) { 2976 noffs = offs + xfer->frlengths[i]; 2977 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 2978 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 2979 2980 /* Allocate next ITD */ 2981 nsitd = ohci_alloc_sitd(sc); 2982 if (nsitd == NULL) { 2983 /* XXX what now? */ 2984 printf("%s: isoc TD alloc failed\n", 2985 USBDEVNAME(sc->sc_bus.bdev)); 2986 return; 2987 } 2988 2989 /* Fill current ITD */ 2990 sitd->itd.itd_flags = htole32( 2991 OHCI_ITD_NOCC | 2992 OHCI_ITD_SET_SF(iso->next) | 2993 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 2994 OHCI_ITD_SET_FC(ncur)); 2995 sitd->itd.itd_bp0 = htole32(bp0); 2996 sitd->nextitd = nsitd; 2997 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 2998 sitd->itd.itd_be = htole32(bp0 + offs - 1); 2999 sitd->xfer = xfer; 3000 sitd->flags = 0; 3001 3002 sitd = nsitd; 3003 iso->next = iso->next + ncur; 3004 bp0 = OHCI_PAGE(buf + offs); 3005 ncur = 0; 3006 } 3007 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3008 offs = noffs; 3009 } 3010 nsitd = ohci_alloc_sitd(sc); 3011 if (nsitd == NULL) { 3012 /* XXX what now? */ 3013 printf("%s: isoc TD alloc failed\n", 3014 USBDEVNAME(sc->sc_bus.bdev)); 3015 return; 3016 } 3017 /* Fixup last used ITD */ 3018 sitd->itd.itd_flags = htole32( 3019 OHCI_ITD_NOCC | 3020 OHCI_ITD_SET_SF(iso->next) | 3021 OHCI_ITD_SET_DI(0) | 3022 OHCI_ITD_SET_FC(ncur)); 3023 sitd->itd.itd_bp0 = htole32(bp0); 3024 sitd->nextitd = nsitd; 3025 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3026 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3027 sitd->xfer = xfer; 3028 sitd->flags = OHCI_CALL_DONE; 3029 3030 iso->next = iso->next + ncur; 3031 iso->inuse += nframes; 3032 3033 xfer->actlen = offs; /* XXX pretend we did it all */ 3034 3035 xfer->status = USBD_IN_PROGRESS; 3036 3037 #ifdef OHCI_DEBUG 3038 if (ohcidebug > 5) { 3039 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3040 le32toh(sc->sc_hcca->hcca_frame_number))); 3041 ohci_dump_itds(xfer->hcpriv); 3042 ohci_dump_ed(sed); 3043 } 3044 #endif 3045 3046 s = splusb(); 3047 opipe->tail.itd = nsitd; 3048 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3049 splx(s); 3050 3051 #ifdef OHCI_DEBUG 3052 if (ohcidebug > 5) { 3053 delay(150000); 3054 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3055 le32toh(sc->sc_hcca->hcca_frame_number))); 3056 ohci_dump_itds(xfer->hcpriv); 3057 ohci_dump_ed(sed); 3058 } 3059 #endif 3060 } 3061 3062 usbd_status 3063 ohci_device_isoc_start(usbd_xfer_handle xfer) 3064 { 3065 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3066 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3067 3068 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3069 3070 if (sc->sc_dying) 3071 return (USBD_IOERROR); 3072 3073 #ifdef DIAGNOSTIC 3074 if (xfer->status != USBD_IN_PROGRESS) 3075 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 3076 #endif 3077 3078 /* XXX anything to do? */ 3079 3080 return (USBD_IN_PROGRESS); 3081 } 3082 3083 void 3084 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3085 { 3086 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3087 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3088 ohci_soft_ed_t *sed; 3089 ohci_soft_itd_t *sitd; 3090 int s; 3091 3092 s = splusb(); 3093 3094 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3095 3096 /* Transfer is already done. */ 3097 if (xfer->status != USBD_NOT_STARTED && 3098 xfer->status != USBD_IN_PROGRESS) { 3099 splx(s); 3100 printf("ohci_device_isoc_abort: early return\n"); 3101 return; 3102 } 3103 3104 /* Give xfer the requested abort code. */ 3105 xfer->status = USBD_CANCELLED; 3106 3107 sed = opipe->sed; 3108 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3109 3110 sitd = xfer->hcpriv; 3111 #ifdef DIAGNOSTIC 3112 if (sitd == NULL) { 3113 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3114 return; 3115 } 3116 #endif 3117 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3118 #ifdef DIAGNOSTIC 3119 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3120 sitd->isdone = 1; 3121 #endif 3122 } 3123 3124 splx(s); 3125 3126 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3127 3128 s = splusb(); 3129 3130 /* Run callback. */ 3131 usb_transfer_complete(xfer); 3132 3133 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3134 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3135 3136 splx(s); 3137 } 3138 3139 void 3140 ohci_device_isoc_done(usbd_xfer_handle xfer) 3141 { 3142 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3143 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3144 ohci_soft_itd_t *sitd, *nsitd; 3145 3146 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3147 3148 for (sitd = xfer->hcpriv; 3149 !(sitd->flags & OHCI_CALL_DONE); 3150 sitd = nsitd) { 3151 nsitd = sitd->nextitd; 3152 DPRINTFN(1,("ohci_device_isoc_done: free sitd=%p\n", sitd)); 3153 ohci_free_sitd(sc, sitd); 3154 } 3155 ohci_free_sitd(sc, sitd); 3156 xfer->hcpriv = NULL; 3157 } 3158 3159 usbd_status 3160 ohci_setup_isoc(usbd_pipe_handle pipe) 3161 { 3162 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3163 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3164 struct iso *iso = &opipe->u.iso; 3165 int s; 3166 3167 iso->next = -1; 3168 iso->inuse = 0; 3169 3170 s = splusb(); 3171 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3172 splx(s); 3173 3174 return (USBD_NORMAL_COMPLETION); 3175 } 3176 3177 void 3178 ohci_device_isoc_close(usbd_pipe_handle pipe) 3179 { 3180 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3181 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3182 int s; 3183 3184 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3185 3186 s = splusb(); 3187 ohci_rem_ed(opipe->sed, sc->sc_isoc_head); 3188 splx(s); 3189 ohci_close_pipe(pipe, sc->sc_isoc_head); 3190 #ifdef DIAGNOSTIC 3191 opipe->tail.itd->isdone = 1; 3192 #endif 3193 ohci_free_sitd(sc, opipe->tail.itd); 3194 } 3195
Indexes created Tue Sep 23 07:09:52 GMT 2025