ohci.c revision 1.95
1 /* $NetBSD: ohci.c,v 1.95 2000/12/13 03:09:06 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe 45 * USB spec: http://www.usb.org/developers/data/usb11.pdf 46 */ 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/kernel.h> 53 #include <sys/device.h> 54 #include <sys/select.h> 55 #elif defined(__FreeBSD__) 56 #include <sys/module.h> 57 #include <sys/bus.h> 58 #include <machine/bus_pio.h> 59 #include <machine/bus_memio.h> 60 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 61 #include <machine/cpu.h> 62 #endif 63 #endif 64 #include <sys/proc.h> 65 #include <sys/queue.h> 66 67 #include <machine/bus.h> 68 #include <machine/endian.h> 69 70 #include <dev/usb/usb.h> 71 #include <dev/usb/usbdi.h> 72 #include <dev/usb/usbdivar.h> 73 #include <dev/usb/usb_mem.h> 74 #include <dev/usb/usb_quirks.h> 75 76 #include <dev/usb/ohcireg.h> 77 #include <dev/usb/ohcivar.h> 78 79 #if defined(__FreeBSD__) 80 #include <machine/clock.h> 81 82 #define delay(d) DELAY(d) 83 #endif 84 85 #if defined(__OpenBSD__) 86 struct cfdriver ohci_cd = { 87 NULL, "ohci", DV_DULL 88 }; 89 #endif 90 91 #ifdef OHCI_DEBUG 92 #define DPRINTF(x) if (ohcidebug) logprintf x 93 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 94 int ohcidebug = 0; 95 #ifndef __NetBSD__ 96 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 97 #endif 98 #else 99 #define DPRINTF(x) 100 #define DPRINTFN(n,x) 101 #endif 102 103 /* 104 * The OHCI controller is little endian, so on big endian machines 105 * the data strored in memory needs to be swapped. 106 */ 107 #if defined(__FreeBSD__) || defined(__OpenBSD__) 108 #if BYTE_ORDER == BIG_ENDIAN 109 #define htole32(x) (bswap32(x)) 110 #define le32toh(x) (bswap32(x)) 111 #else 112 #define htole32(x) (x) 113 #define le32toh(x) (x) 114 #endif 115 #endif 116 117 struct ohci_pipe; 118 119 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 120 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 121 122 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 123 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 124 125 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 126 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 127 128 #if 0 129 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 130 ohci_soft_td_t *); 131 #endif 132 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 133 ohci_softc_t *, int, int, usbd_xfer_handle, 134 ohci_soft_td_t *, ohci_soft_td_t **); 135 136 Static void ohci_shutdown(void *v); 137 Static void ohci_power(int, void *); 138 Static usbd_status ohci_open(usbd_pipe_handle); 139 Static void ohci_poll(struct usbd_bus *); 140 Static void ohci_softintr(struct usbd_bus *); 141 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 142 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t); 143 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 144 145 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 146 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 147 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 148 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 149 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 150 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 151 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 152 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 153 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 154 155 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 156 Static void ohci_device_isoc_enter(usbd_xfer_handle); 157 158 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 159 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 160 161 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 162 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 163 164 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 165 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 166 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 167 Static void ohci_root_ctrl_close(usbd_pipe_handle); 168 Static void ohci_root_ctrl_done(usbd_xfer_handle); 169 170 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 171 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 172 Static void ohci_root_intr_abort(usbd_xfer_handle); 173 Static void ohci_root_intr_close(usbd_pipe_handle); 174 Static void ohci_root_intr_done(usbd_xfer_handle); 175 176 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 177 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 178 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 179 Static void ohci_device_ctrl_close(usbd_pipe_handle); 180 Static void ohci_device_ctrl_done(usbd_xfer_handle); 181 182 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 183 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 184 Static void ohci_device_bulk_abort(usbd_xfer_handle); 185 Static void ohci_device_bulk_close(usbd_pipe_handle); 186 Static void ohci_device_bulk_done(usbd_xfer_handle); 187 188 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 189 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 190 Static void ohci_device_intr_abort(usbd_xfer_handle); 191 Static void ohci_device_intr_close(usbd_pipe_handle); 192 Static void ohci_device_intr_done(usbd_xfer_handle); 193 194 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 195 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 196 Static void ohci_device_isoc_abort(usbd_xfer_handle); 197 Static void ohci_device_isoc_close(usbd_pipe_handle); 198 Static void ohci_device_isoc_done(usbd_xfer_handle); 199 200 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 201 struct ohci_pipe *pipe, int ival); 202 203 Static int ohci_str(usb_string_descriptor_t *, int, char *); 204 205 Static void ohci_timeout(void *); 206 Static void ohci_rhsc_able(ohci_softc_t *, int); 207 208 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 209 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 210 Static void ohci_abort_xfer_end(void *); 211 212 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 213 Static void ohci_noop(usbd_pipe_handle pipe); 214 215 #ifdef OHCI_DEBUG 216 Static void ohci_dumpregs(ohci_softc_t *); 217 Static void ohci_dump_tds(ohci_soft_td_t *); 218 Static void ohci_dump_td(ohci_soft_td_t *); 219 Static void ohci_dump_ed(ohci_soft_ed_t *); 220 Static void ohci_dump_itd(ohci_soft_itd_t *); 221 Static void ohci_dump_itds(ohci_soft_itd_t *); 222 #endif 223 224 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 225 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 226 #define OWRITE1(sc, r, x) \ 227 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 228 #define OWRITE2(sc, r, x) \ 229 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 230 #define OWRITE4(sc, r, x) \ 231 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 232 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 233 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 234 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 235 236 /* Reverse the bits in a value 0 .. 31 */ 237 Static u_int8_t revbits[OHCI_NO_INTRS] = 238 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 239 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 240 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 241 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 242 243 struct ohci_pipe { 244 struct usbd_pipe pipe; 245 ohci_soft_ed_t *sed; 246 union { 247 ohci_soft_td_t *td; 248 ohci_soft_itd_t *itd; 249 } tail; 250 /* Info needed for different pipe kinds. */ 251 union { 252 /* Control pipe */ 253 struct { 254 usb_dma_t reqdma; 255 u_int length; 256 ohci_soft_td_t *setup, *data, *stat; 257 } ctl; 258 /* Interrupt pipe */ 259 struct { 260 int nslots; 261 int pos; 262 } intr; 263 /* Bulk pipe */ 264 struct { 265 u_int length; 266 int isread; 267 } bulk; 268 /* Iso pipe */ 269 struct iso { 270 int next, inuse; 271 } iso; 272 } u; 273 }; 274 275 #define OHCI_INTR_ENDPT 1 276 277 Static struct usbd_bus_methods ohci_bus_methods = { 278 ohci_open, 279 ohci_softintr, 280 ohci_poll, 281 ohci_allocm, 282 ohci_freem, 283 ohci_allocx, 284 ohci_freex, 285 }; 286 287 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 288 ohci_root_ctrl_transfer, 289 ohci_root_ctrl_start, 290 ohci_root_ctrl_abort, 291 ohci_root_ctrl_close, 292 ohci_noop, 293 ohci_root_ctrl_done, 294 }; 295 296 Static struct usbd_pipe_methods ohci_root_intr_methods = { 297 ohci_root_intr_transfer, 298 ohci_root_intr_start, 299 ohci_root_intr_abort, 300 ohci_root_intr_close, 301 ohci_noop, 302 ohci_root_intr_done, 303 }; 304 305 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 306 ohci_device_ctrl_transfer, 307 ohci_device_ctrl_start, 308 ohci_device_ctrl_abort, 309 ohci_device_ctrl_close, 310 ohci_noop, 311 ohci_device_ctrl_done, 312 }; 313 314 Static struct usbd_pipe_methods ohci_device_intr_methods = { 315 ohci_device_intr_transfer, 316 ohci_device_intr_start, 317 ohci_device_intr_abort, 318 ohci_device_intr_close, 319 ohci_device_clear_toggle, 320 ohci_device_intr_done, 321 }; 322 323 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 324 ohci_device_bulk_transfer, 325 ohci_device_bulk_start, 326 ohci_device_bulk_abort, 327 ohci_device_bulk_close, 328 ohci_device_clear_toggle, 329 ohci_device_bulk_done, 330 }; 331 332 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 333 ohci_device_isoc_transfer, 334 ohci_device_isoc_start, 335 ohci_device_isoc_abort, 336 ohci_device_isoc_close, 337 ohci_noop, 338 ohci_device_isoc_done, 339 }; 340 341 #if defined(__NetBSD__) || defined(__OpenBSD__) 342 int 343 ohci_activate(device_ptr_t self, enum devact act) 344 { 345 struct ohci_softc *sc = (struct ohci_softc *)self; 346 int rv = 0; 347 348 switch (act) { 349 case DVACT_ACTIVATE: 350 return (EOPNOTSUPP); 351 break; 352 353 case DVACT_DEACTIVATE: 354 if (sc->sc_child != NULL) 355 rv = config_deactivate(sc->sc_child); 356 sc->sc_dying = 1; 357 break; 358 } 359 return (rv); 360 } 361 362 int 363 ohci_detach(struct ohci_softc *sc, int flags) 364 { 365 int rv = 0; 366 367 if (sc->sc_child != NULL) 368 rv = config_detach(sc->sc_child, flags); 369 370 if (rv != 0) 371 return (rv); 372 373 #if defined(__NetBSD__) || defined(__OpenBSD__) 374 powerhook_disestablish(sc->sc_powerhook); 375 shutdownhook_disestablish(sc->sc_shutdownhook); 376 #endif 377 378 /* free data structures XXX */ 379 380 return (rv); 381 } 382 #endif 383 384 ohci_soft_ed_t * 385 ohci_alloc_sed(ohci_softc_t *sc) 386 { 387 ohci_soft_ed_t *sed; 388 usbd_status err; 389 int i, offs; 390 usb_dma_t dma; 391 392 if (sc->sc_freeeds == NULL) { 393 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 394 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 395 OHCI_ED_ALIGN, &dma); 396 if (err) 397 return (0); 398 for(i = 0; i < OHCI_SED_CHUNK; i++) { 399 offs = i * OHCI_SED_SIZE; 400 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 401 sed->physaddr = DMAADDR(&dma) + offs; 402 sed->next = sc->sc_freeeds; 403 sc->sc_freeeds = sed; 404 } 405 } 406 sed = sc->sc_freeeds; 407 sc->sc_freeeds = sed->next; 408 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 409 sed->next = 0; 410 return (sed); 411 } 412 413 void 414 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 415 { 416 sed->next = sc->sc_freeeds; 417 sc->sc_freeeds = sed; 418 } 419 420 ohci_soft_td_t * 421 ohci_alloc_std(ohci_softc_t *sc) 422 { 423 ohci_soft_td_t *std; 424 usbd_status err; 425 int i, offs; 426 usb_dma_t dma; 427 int s; 428 429 if (sc->sc_freetds == NULL) { 430 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 431 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 432 OHCI_TD_ALIGN, &dma); 433 if (err) 434 return (NULL); 435 s = splusb(); 436 for(i = 0; i < OHCI_STD_CHUNK; i++) { 437 offs = i * OHCI_STD_SIZE; 438 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 439 std->physaddr = DMAADDR(&dma) + offs; 440 std->nexttd = sc->sc_freetds; 441 sc->sc_freetds = std; 442 } 443 splx(s); 444 } 445 446 s = splusb(); 447 std = sc->sc_freetds; 448 sc->sc_freetds = std->nexttd; 449 memset(&std->td, 0, sizeof(ohci_td_t)); 450 std->nexttd = NULL; 451 std->xfer = NULL; 452 ohci_hash_add_td(sc, std); 453 splx(s); 454 455 return (std); 456 } 457 458 void 459 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 460 { 461 int s; 462 463 s = splusb(); 464 ohci_hash_rem_td(sc, std); 465 std->nexttd = sc->sc_freetds; 466 sc->sc_freetds = std; 467 splx(s); 468 } 469 470 usbd_status 471 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 472 int alen, int rd, usbd_xfer_handle xfer, 473 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 474 { 475 ohci_soft_td_t *next, *cur; 476 ohci_physaddr_t dataphys, dataphysend; 477 u_int32_t tdflags; 478 int len, curlen; 479 usb_dma_t *dma = &xfer->dmabuf; 480 u_int16_t flags = xfer->flags; 481 482 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 483 484 len = alen; 485 cur = sp; 486 dataphys = DMAADDR(dma); 487 dataphysend = OHCI_PAGE(dataphys + len - 1); 488 tdflags = htole32( 489 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 490 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 491 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 492 493 for (;;) { 494 next = ohci_alloc_std(sc); 495 if (next == NULL) 496 goto nomem; 497 498 /* The OHCI hardware can handle at most one page crossing. */ 499 if (OHCI_PAGE(dataphys) == dataphysend || 500 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 501 /* we can handle it in this TD */ 502 curlen = len; 503 } else { 504 /* must use multiple TDs, fill as much as possible. */ 505 curlen = 2 * OHCI_PAGE_SIZE - 506 (dataphys & (OHCI_PAGE_SIZE-1)); 507 /* the length must be a multiple of the max size */ 508 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 509 #ifdef DIAGNOSTIC 510 if (curlen == 0) 511 panic("ohci_alloc_std: curlen == 0\n"); 512 #endif 513 } 514 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 515 "dataphysend=0x%08x len=%d curlen=%d\n", 516 dataphys, dataphysend, 517 len, curlen)); 518 len -= curlen; 519 520 cur->td.td_flags = tdflags; 521 cur->td.td_cbp = htole32(dataphys); 522 cur->nexttd = next; 523 cur->td.td_nexttd = htole32(next->physaddr); 524 cur->td.td_be = htole32(dataphys + curlen - 1); 525 cur->len = curlen; 526 cur->flags = OHCI_ADD_LEN; 527 cur->xfer = xfer; 528 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 529 dataphys, dataphys + curlen - 1)); 530 if (len == 0) 531 break; 532 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 533 dataphys += curlen; 534 cur = next; 535 } 536 if ((flags & USBD_FORCE_SHORT_XFER) && 537 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 538 /* Force a 0 length transfer at the end. */ 539 540 cur = next; 541 next = ohci_alloc_std(sc); 542 if (next == NULL) 543 goto nomem; 544 545 cur->td.td_flags = tdflags; 546 cur->td.td_cbp = 0; /* indicate 0 length packet */ 547 cur->nexttd = next; 548 cur->td.td_nexttd = htole32(next->physaddr); 549 cur->td.td_be = ~0; 550 cur->len = 0; 551 cur->flags = 0; 552 cur->xfer = xfer; 553 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 554 } 555 *ep = cur; 556 557 return (USBD_NORMAL_COMPLETION); 558 559 nomem: 560 /* XXX free chain */ 561 return (USBD_NOMEM); 562 } 563 564 #if 0 565 Static void 566 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 567 ohci_soft_td_t *stdend) 568 { 569 ohci_soft_td_t *p; 570 571 for (; std != stdend; std = p) { 572 p = std->nexttd; 573 ohci_free_std(sc, std); 574 } 575 } 576 #endif 577 578 ohci_soft_itd_t * 579 ohci_alloc_sitd(ohci_softc_t *sc) 580 { 581 ohci_soft_itd_t *sitd; 582 usbd_status err; 583 int i, s, offs; 584 usb_dma_t dma; 585 586 if (sc->sc_freeitds == NULL) { 587 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 588 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 589 OHCI_ITD_ALIGN, &dma); 590 if (err) 591 return (NULL); 592 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 593 offs = i * OHCI_SITD_SIZE; 594 sitd = (ohci_soft_itd_t *)((char*)KERNADDR(&dma)+offs); 595 sitd->physaddr = DMAADDR(&dma) + offs; 596 sitd->nextitd = sc->sc_freeitds; 597 sc->sc_freeitds = sitd; 598 } 599 } 600 601 s = splusb(); 602 sitd = sc->sc_freeitds; 603 sc->sc_freeitds = sitd->nextitd; 604 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 605 sitd->nextitd = NULL; 606 sitd->xfer = NULL; 607 ohci_hash_add_itd(sc, sitd); 608 splx(s); 609 610 #ifdef DIAGNOSTIC 611 sitd->isdone = 0; 612 #endif 613 614 return (sitd); 615 } 616 617 void 618 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 619 { 620 int s; 621 622 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 623 624 #ifdef DIAGNOSTIC 625 if (!sitd->isdone) { 626 panic("ohci_free_sitd: sitd=%p not done\n", sitd); 627 return; 628 } 629 #endif 630 631 s = splusb(); 632 ohci_hash_rem_itd(sc, sitd); 633 sitd->nextitd = sc->sc_freeitds; 634 sc->sc_freeitds = sitd; 635 splx(s); 636 } 637 638 usbd_status 639 ohci_init(ohci_softc_t *sc) 640 { 641 ohci_soft_ed_t *sed, *psed; 642 usbd_status err; 643 int i; 644 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 645 646 DPRINTF(("ohci_init: start\n")); 647 #if defined(__OpenBSD__) 648 printf(","); 649 #else 650 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 651 #endif 652 rev = OREAD4(sc, OHCI_REVISION); 653 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 654 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 655 656 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 657 printf("%s: unsupported OHCI revision\n", 658 USBDEVNAME(sc->sc_bus.bdev)); 659 sc->sc_bus.usbrev = USBREV_UNKNOWN; 660 return (USBD_INVAL); 661 } 662 sc->sc_bus.usbrev = USBREV_1_0; 663 664 for (i = 0; i < OHCI_HASH_SIZE; i++) 665 LIST_INIT(&sc->sc_hash_tds[i]); 666 for (i = 0; i < OHCI_HASH_SIZE; i++) 667 LIST_INIT(&sc->sc_hash_itds[i]); 668 669 SIMPLEQ_INIT(&sc->sc_free_xfers); 670 671 /* XXX determine alignment by R/W */ 672 /* Allocate the HCCA area. */ 673 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 674 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 675 if (err) 676 return (err); 677 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 678 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 679 680 sc->sc_eintrs = OHCI_NORMAL_INTRS; 681 682 /* Allocate dummy ED that starts the control list. */ 683 sc->sc_ctrl_head = ohci_alloc_sed(sc); 684 if (sc->sc_ctrl_head == NULL) { 685 err = USBD_NOMEM; 686 goto bad1; 687 } 688 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 689 690 /* Allocate dummy ED that starts the bulk list. */ 691 sc->sc_bulk_head = ohci_alloc_sed(sc); 692 if (sc->sc_bulk_head == NULL) { 693 err = USBD_NOMEM; 694 goto bad2; 695 } 696 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 697 698 /* Allocate dummy ED that starts the isochronous list. */ 699 sc->sc_isoc_head = ohci_alloc_sed(sc); 700 if (sc->sc_isoc_head == NULL) { 701 err = USBD_NOMEM; 702 goto bad3; 703 } 704 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 705 706 /* Allocate all the dummy EDs that make up the interrupt tree. */ 707 for (i = 0; i < OHCI_NO_EDS; i++) { 708 sed = ohci_alloc_sed(sc); 709 if (sed == NULL) { 710 while (--i >= 0) 711 ohci_free_sed(sc, sc->sc_eds[i]); 712 err = USBD_NOMEM; 713 goto bad4; 714 } 715 /* All ED fields are set to 0. */ 716 sc->sc_eds[i] = sed; 717 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 718 if (i != 0) 719 psed = sc->sc_eds[(i-1) / 2]; 720 else 721 psed= sc->sc_isoc_head; 722 sed->next = psed; 723 sed->ed.ed_nexted = htole32(psed->physaddr); 724 } 725 /* 726 * Fill HCCA interrupt table. The bit reversal is to get 727 * the tree set up properly to spread the interrupts. 728 */ 729 for (i = 0; i < OHCI_NO_INTRS; i++) 730 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 731 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 732 733 #ifdef OHCI_DEBUG 734 if (ohcidebug > 15) { 735 for (i = 0; i < OHCI_NO_EDS; i++) { 736 printf("ed#%d ", i); 737 ohci_dump_ed(sc->sc_eds[i]); 738 } 739 printf("iso "); 740 ohci_dump_ed(sc->sc_isoc_head); 741 } 742 #endif 743 744 /* Determine in what context we are running. */ 745 ctl = OREAD4(sc, OHCI_CONTROL); 746 if (ctl & OHCI_IR) { 747 /* SMM active, request change */ 748 DPRINTF(("ohci_init: SMM active, request owner change\n")); 749 s = OREAD4(sc, OHCI_COMMAND_STATUS); 750 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 751 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 752 usb_delay_ms(&sc->sc_bus, 1); 753 ctl = OREAD4(sc, OHCI_CONTROL); 754 } 755 if ((ctl & OHCI_IR) == 0) { 756 printf("%s: SMM does not respond, resetting\n", 757 USBDEVNAME(sc->sc_bus.bdev)); 758 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 759 goto reset; 760 } 761 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 762 /* BIOS started controller. */ 763 DPRINTF(("ohci_init: BIOS active\n")); 764 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 765 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 766 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 767 } 768 } else { 769 DPRINTF(("ohci_init: cold started\n")); 770 reset: 771 /* Controller was cold started. */ 772 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 773 } 774 775 /* 776 * This reset should not be necessary according to the OHCI spec, but 777 * without it some controllers do not start. 778 */ 779 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 780 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 781 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 782 783 /* We now own the host controller and the bus has been reset. */ 784 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 785 786 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 787 /* Nominal time for a reset is 10 us. */ 788 for (i = 0; i < 10; i++) { 789 delay(10); 790 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 791 if (!hcr) 792 break; 793 } 794 if (hcr) { 795 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 796 err = USBD_IOERROR; 797 goto bad5; 798 } 799 #ifdef OHCI_DEBUG 800 if (ohcidebug > 15) 801 ohci_dumpregs(sc); 802 #endif 803 804 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 805 806 /* Set up HC registers. */ 807 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 808 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 809 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 810 /* disable all interrupts and then switch on all desired interrupts */ 811 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 812 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 813 /* switch on desired functional features */ 814 ctl = OREAD4(sc, OHCI_CONTROL); 815 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 816 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 817 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 818 /* And finally start it! */ 819 OWRITE4(sc, OHCI_CONTROL, ctl); 820 821 /* 822 * The controller is now OPERATIONAL. Set a some final 823 * registers that should be set earlier, but that the 824 * controller ignores when in the SUSPEND state. 825 */ 826 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 827 fm |= OHCI_FSMPS(ival) | ival; 828 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 829 per = OHCI_PERIODIC(ival); /* 90% periodic */ 830 OWRITE4(sc, OHCI_PERIODIC_START, per); 831 832 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 833 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 834 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 835 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 836 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 837 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 838 839 /* 840 * The AMD756 requires a delay before re-reading the register, 841 * otherwise it will occasionally report 0 ports. 842 */ 843 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 844 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 845 846 #ifdef OHCI_DEBUG 847 if (ohcidebug > 5) 848 ohci_dumpregs(sc); 849 #endif 850 851 /* Set up the bus struct. */ 852 sc->sc_bus.methods = &ohci_bus_methods; 853 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 854 855 #if defined(__NetBSD__) || defined(__OpenBSD__) 856 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 857 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 858 #endif 859 860 return (USBD_NORMAL_COMPLETION); 861 862 bad5: 863 for (i = 0; i < OHCI_NO_EDS; i++) 864 ohci_free_sed(sc, sc->sc_eds[i]); 865 bad4: 866 ohci_free_sed(sc, sc->sc_isoc_head); 867 bad3: 868 ohci_free_sed(sc, sc->sc_ctrl_head); 869 bad2: 870 ohci_free_sed(sc, sc->sc_bulk_head); 871 bad1: 872 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 873 return (err); 874 } 875 876 usbd_status 877 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 878 { 879 #if defined(__NetBSD__) || defined(__OpenBSD__) 880 struct ohci_softc *sc = (struct ohci_softc *)bus; 881 #endif 882 883 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 884 } 885 886 void 887 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 888 { 889 #if defined(__NetBSD__) || defined(__OpenBSD__) 890 struct ohci_softc *sc = (struct ohci_softc *)bus; 891 #endif 892 893 usb_freemem(&sc->sc_bus, dma); 894 } 895 896 usbd_xfer_handle 897 ohci_allocx(struct usbd_bus *bus) 898 { 899 struct ohci_softc *sc = (struct ohci_softc *)bus; 900 usbd_xfer_handle xfer; 901 902 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 903 if (xfer != NULL) 904 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 905 else 906 xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT); 907 if (xfer != NULL) 908 memset(xfer, 0, sizeof *xfer); 909 return (xfer); 910 } 911 912 void 913 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 914 { 915 struct ohci_softc *sc = (struct ohci_softc *)bus; 916 917 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 918 } 919 920 /* 921 * Shut down the controller when the system is going down. 922 */ 923 void 924 ohci_shutdown(void *v) 925 { 926 ohci_softc_t *sc = v; 927 928 DPRINTF(("ohci_shutdown: stopping the HC\n")); 929 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 930 } 931 932 /* 933 * Handle suspend/resume. 934 * 935 * We need to switch to polling mode here, because this routine is 936 * called from an intterupt context. This is all right since we 937 * are almost suspended anyway. 938 */ 939 void 940 ohci_power(int why, void *v) 941 { 942 ohci_softc_t *sc = v; 943 int s; 944 945 #ifdef OHCI_DEBUG 946 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 947 ohci_dumpregs(sc); 948 #endif 949 950 s = splusb(); 951 switch (why) { 952 case PWR_SUSPEND: 953 case PWR_STANDBY: 954 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_SUSPEND); 955 break; 956 case PWR_RESUME: 957 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESUME); 958 break; 959 case PWR_SOFTSUSPEND: 960 case PWR_SOFTSTANDBY: 961 case PWR_SOFTRESUME: 962 break; 963 } 964 splx(s); 965 } 966 967 #ifdef OHCI_DEBUG 968 void 969 ohci_dumpregs(ohci_softc_t *sc) 970 { 971 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 972 OREAD4(sc, OHCI_REVISION), 973 OREAD4(sc, OHCI_CONTROL), 974 OREAD4(sc, OHCI_COMMAND_STATUS))); 975 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 976 OREAD4(sc, OHCI_INTERRUPT_STATUS), 977 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 978 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 979 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 980 OREAD4(sc, OHCI_HCCA), 981 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 982 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 983 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 984 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 985 OREAD4(sc, OHCI_BULK_HEAD_ED), 986 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 987 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 988 OREAD4(sc, OHCI_DONE_HEAD), 989 OREAD4(sc, OHCI_FM_INTERVAL), 990 OREAD4(sc, OHCI_FM_REMAINING))); 991 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 992 OREAD4(sc, OHCI_FM_NUMBER), 993 OREAD4(sc, OHCI_PERIODIC_START), 994 OREAD4(sc, OHCI_LS_THRESHOLD))); 995 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 996 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 997 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 998 OREAD4(sc, OHCI_RH_STATUS))); 999 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1000 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1001 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1002 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1003 le32toh(sc->sc_hcca->hcca_frame_number), 1004 le32toh(sc->sc_hcca->hcca_done_head))); 1005 } 1006 #endif 1007 1008 Static int ohci_intr1(ohci_softc_t *); 1009 1010 int 1011 ohci_intr(void *p) 1012 { 1013 ohci_softc_t *sc = p; 1014 1015 /* If we get an interrupt while polling, then just ignore it. */ 1016 if (sc->sc_bus.use_polling) { 1017 #ifdef DIAGNOSTIC 1018 printf("ohci_intr: ignored interrupt while polling\n"); 1019 #endif 1020 return (0); 1021 } 1022 1023 return (ohci_intr1(sc)); 1024 } 1025 1026 Static int 1027 ohci_intr1(ohci_softc_t *sc) 1028 { 1029 u_int32_t intrs, eintrs; 1030 ohci_physaddr_t done; 1031 1032 /* In case the interrupt occurs before initialization has completed. */ 1033 if (sc == NULL || sc->sc_hcca == NULL) { 1034 #ifdef DIAGNOSTIC 1035 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1036 #endif 1037 return (0); 1038 } 1039 1040 intrs = 0; 1041 done = le32toh(sc->sc_hcca->hcca_done_head); 1042 if (done != 0) { 1043 if (done & ~OHCI_DONE_INTRS) 1044 intrs = OHCI_WDH; 1045 if (done & OHCI_DONE_INTRS) 1046 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1047 } else 1048 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1049 1050 if (!intrs) 1051 return (0); 1052 1053 intrs &= ~OHCI_MIE; 1054 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1055 eintrs = intrs & sc->sc_eintrs; 1056 if (!eintrs) 1057 return (0); 1058 1059 sc->sc_bus.intr_context++; 1060 sc->sc_bus.no_intrs++; 1061 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1062 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1063 (u_int)eintrs)); 1064 1065 if (eintrs & OHCI_SO) { 1066 printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev)); 1067 /* XXX do what */ 1068 intrs &= ~OHCI_SO; 1069 } 1070 if (eintrs & OHCI_WDH) { 1071 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1072 sc->sc_hcca->hcca_done_head = 0; 1073 usb_schedsoftintr(&sc->sc_bus); 1074 intrs &= ~OHCI_WDH; 1075 } 1076 if (eintrs & OHCI_RD) { 1077 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1078 /* XXX process resume detect */ 1079 } 1080 if (eintrs & OHCI_UE) { 1081 printf("%s: unrecoverable error, controller halted\n", 1082 USBDEVNAME(sc->sc_bus.bdev)); 1083 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1084 /* XXX what else */ 1085 } 1086 if (eintrs & OHCI_RHSC) { 1087 ohci_rhsc(sc, sc->sc_intrxfer); 1088 intrs &= ~OHCI_RHSC; 1089 1090 /* 1091 * Disable RHSC interrupt for now, because it will be 1092 * on until the port has been reset. 1093 */ 1094 ohci_rhsc_able(sc, 0); 1095 } 1096 1097 sc->sc_bus.intr_context--; 1098 1099 /* Block unprocessed interrupts. XXX */ 1100 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 1101 sc->sc_eintrs &= ~intrs; 1102 1103 return (1); 1104 } 1105 1106 void 1107 ohci_rhsc_able(ohci_softc_t *sc, int on) 1108 { 1109 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1110 if (on) { 1111 sc->sc_eintrs |= OHCI_RHSC; 1112 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1113 } else { 1114 sc->sc_eintrs &= ~OHCI_RHSC; 1115 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1116 } 1117 } 1118 1119 #ifdef OHCI_DEBUG 1120 char *ohci_cc_strs[] = { 1121 "NO_ERROR", 1122 "CRC", 1123 "BIT_STUFFING", 1124 "DATA_TOGGLE_MISMATCH", 1125 "STALL", 1126 "DEVICE_NOT_RESPONDING", 1127 "PID_CHECK_FAILURE", 1128 "UNEXPECTED_PID", 1129 "DATA_OVERRUN", 1130 "DATA_UNDERRUN", 1131 "BUFFER_OVERRUN", 1132 "BUFFER_UNDERRUN", 1133 "reserved", 1134 "reserved", 1135 "NOT_ACCESSED", 1136 "NOT_ACCESSED", 1137 }; 1138 #endif 1139 1140 void 1141 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done) 1142 { 1143 ohci_soft_itd_t *sitd, *sidone, **ip; 1144 ohci_soft_td_t *std, *sdone, **p; 1145 1146 /* Reverse the done list. */ 1147 for (sdone = NULL, sidone = NULL; done != 0; ) { 1148 std = ohci_hash_find_td(sc, done); 1149 if (std != NULL) { 1150 std->dnext = sdone; 1151 done = le32toh(std->td.td_nexttd); 1152 sdone = std; 1153 DPRINTFN(10,("add TD %p\n", std)); 1154 continue; 1155 } 1156 sitd = ohci_hash_find_itd(sc, done); 1157 if (sitd != NULL) { 1158 sitd->dnext = sidone; 1159 done = le32toh(sitd->itd.itd_nextitd); 1160 sidone = sitd; 1161 DPRINTFN(5,("add ITD %p\n", sitd)); 1162 continue; 1163 } 1164 panic("ohci_add_done: addr 0x%08lx not found\n", (u_long)done); 1165 } 1166 1167 /* sdone & sidone now hold the done lists. */ 1168 /* Put them on the already processed lists. */ 1169 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1170 ; 1171 *p = sdone; 1172 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1173 ; 1174 *ip = sidone; 1175 } 1176 1177 void 1178 ohci_softintr(struct usbd_bus *bus) 1179 { 1180 ohci_softc_t *sc = (ohci_softc_t *)bus; 1181 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1182 ohci_soft_td_t *std, *sdone, *stdnext; 1183 usbd_xfer_handle xfer; 1184 int len, cc, s; 1185 1186 sc->sc_bus.intr_context++; 1187 1188 s = splhardusb(); 1189 sdone = sc->sc_sdone; 1190 sc->sc_sdone = NULL; 1191 sidone = sc->sc_sidone; 1192 sc->sc_sidone = NULL; 1193 splx(s); 1194 1195 DPRINTFN(10,("ohci_process_done: sdone=%p sidone=%p\n", sdone, sidone)); 1196 1197 #ifdef OHCI_DEBUG 1198 if (ohcidebug > 10) { 1199 DPRINTF(("ohci_process_done: TD done:\n")); 1200 ohci_dump_tds(sdone); 1201 } 1202 #endif 1203 1204 for (std = sdone; std; std = stdnext) { 1205 xfer = std->xfer; 1206 stdnext = std->dnext; 1207 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1208 std, xfer, xfer ? xfer->hcpriv : 0)); 1209 if (xfer == NULL) { 1210 /* xfer == NULL: There seems to be no xfer associated 1211 * with this TD. It is tailp that happened to end up on 1212 * the done queue. 1213 */ 1214 continue; 1215 } 1216 if (xfer->status == USBD_CANCELLED || 1217 xfer->status == USBD_TIMEOUT) { 1218 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1219 xfer)); 1220 /* Handled by abort routine. */ 1221 continue; 1222 } 1223 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1224 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1225 if (cc == OHCI_CC_NO_ERROR) { 1226 len = std->len; 1227 if (std->td.td_cbp != 0) 1228 len -= le32toh(std->td.td_be) - 1229 le32toh(std->td.td_cbp) + 1; 1230 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", 1231 len, std->flags)); 1232 if (std->flags & OHCI_ADD_LEN) 1233 xfer->actlen += len; 1234 if (std->flags & OHCI_CALL_DONE) { 1235 xfer->status = USBD_NORMAL_COMPLETION; 1236 usb_transfer_complete(xfer); 1237 } 1238 ohci_free_std(sc, std); 1239 } else { 1240 /* 1241 * Endpoint is halted. First unlink all the TDs 1242 * belonging to the failed transfer, and then restart 1243 * the endpoint. 1244 */ 1245 ohci_soft_td_t *p, *n; 1246 struct ohci_pipe *opipe = 1247 (struct ohci_pipe *)xfer->pipe; 1248 1249 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1250 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1251 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1252 1253 /* remove TDs */ 1254 for (p = std; p->xfer == xfer; p = n) { 1255 n = p->nexttd; 1256 ohci_free_std(sc, p); 1257 } 1258 1259 /* clear halt */ 1260 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1261 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1262 1263 if (cc == OHCI_CC_STALL) 1264 xfer->status = USBD_STALLED; 1265 else 1266 xfer->status = USBD_IOERROR; 1267 usb_transfer_complete(xfer); 1268 } 1269 } 1270 1271 #ifdef OHCI_DEBUG 1272 if (ohcidebug > 10) { 1273 DPRINTF(("ohci_process_done: ITD done:\n")); 1274 ohci_dump_itds(sidone); 1275 } 1276 #endif 1277 1278 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1279 xfer = sitd->xfer; 1280 sitdnext = sitd->dnext; 1281 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1282 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1283 if (xfer == NULL) 1284 continue; 1285 if (xfer->status == USBD_CANCELLED || 1286 xfer->status == USBD_TIMEOUT) { 1287 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1288 xfer)); 1289 /* Handled by abort routine. */ 1290 continue; 1291 } 1292 #ifdef DIAGNOSTIC 1293 if (sitd->isdone) 1294 printf("ohci_softintr: sitd=%p is done\n", sitd); 1295 sitd->isdone = 1; 1296 #endif 1297 cc = OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)); 1298 if (cc == OHCI_CC_NO_ERROR) { 1299 /* XXX compute length for input */ 1300 struct ohci_pipe *opipe = 1301 (struct ohci_pipe *)xfer->pipe; 1302 if (sitd->flags & OHCI_CALL_DONE) { 1303 opipe->u.iso.inuse -= xfer->nframes; 1304 /* XXX update frlengths with actual length */ 1305 /* XXX xfer->actlen = actlen; */ 1306 xfer->status = USBD_NORMAL_COMPLETION; 1307 usb_transfer_complete(xfer); 1308 } 1309 } else { 1310 /* XXX Do more */ 1311 xfer->status = USBD_IOERROR; 1312 usb_transfer_complete(xfer); 1313 } 1314 } 1315 1316 sc->sc_bus.intr_context--; 1317 } 1318 1319 void 1320 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1321 { 1322 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1323 1324 #ifdef DIAGNOSTIC 1325 if (!(xfer->rqflags & URQ_REQUEST)) { 1326 panic("ohci_ctrl_done: not a request\n"); 1327 } 1328 #endif 1329 xfer->hcpriv = NULL; 1330 } 1331 1332 void 1333 ohci_device_intr_done(usbd_xfer_handle xfer) 1334 { 1335 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1336 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1337 ohci_soft_ed_t *sed = opipe->sed; 1338 ohci_soft_td_t *data, *tail; 1339 1340 1341 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1342 xfer, xfer->actlen)); 1343 1344 xfer->hcpriv = NULL; 1345 1346 if (xfer->pipe->repeat) { 1347 data = opipe->tail.td; 1348 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1349 if (tail == NULL) { 1350 xfer->status = USBD_NOMEM; 1351 return; 1352 } 1353 tail->xfer = NULL; 1354 1355 data->td.td_flags = htole32( 1356 OHCI_TD_IN | OHCI_TD_NOCC | 1357 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1358 if (xfer->flags & USBD_SHORT_XFER_OK) 1359 data->td.td_flags |= htole32(OHCI_TD_R); 1360 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 1361 data->nexttd = tail; 1362 data->td.td_nexttd = htole32(tail->physaddr); 1363 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1364 xfer->length - 1); 1365 data->len = xfer->length; 1366 data->xfer = xfer; 1367 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1368 xfer->hcpriv = data; 1369 xfer->actlen = 0; 1370 1371 sed->ed.ed_tailp = htole32(tail->physaddr); 1372 opipe->tail.td = tail; 1373 } 1374 } 1375 1376 void 1377 ohci_device_bulk_done(usbd_xfer_handle xfer) 1378 { 1379 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1380 xfer, xfer->actlen)); 1381 1382 xfer->hcpriv = NULL; 1383 } 1384 1385 void 1386 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1387 { 1388 usbd_pipe_handle pipe; 1389 struct ohci_pipe *opipe; 1390 u_char *p; 1391 int i, m; 1392 int hstatus; 1393 1394 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1395 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1396 sc, xfer, hstatus)); 1397 1398 if (xfer == NULL) { 1399 /* Just ignore the change. */ 1400 return; 1401 } 1402 1403 pipe = xfer->pipe; 1404 opipe = (struct ohci_pipe *)pipe; 1405 1406 p = KERNADDR(&xfer->dmabuf); 1407 m = min(sc->sc_noport, xfer->length * 8 - 1); 1408 memset(p, 0, xfer->length); 1409 for (i = 1; i <= m; i++) { 1410 /* Pick out CHANGE bits from the status reg. */ 1411 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1412 p[i/8] |= 1 << (i%8); 1413 } 1414 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1415 xfer->actlen = xfer->length; 1416 xfer->status = USBD_NORMAL_COMPLETION; 1417 1418 usb_transfer_complete(xfer); 1419 } 1420 1421 void 1422 ohci_root_intr_done(usbd_xfer_handle xfer) 1423 { 1424 xfer->hcpriv = NULL; 1425 } 1426 1427 void 1428 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1429 { 1430 xfer->hcpriv = NULL; 1431 } 1432 1433 /* 1434 * Wait here until controller claims to have an interrupt. 1435 * Then call ohci_intr and return. Use timeout to avoid waiting 1436 * too long. 1437 */ 1438 void 1439 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1440 { 1441 int timo = xfer->timeout; 1442 int usecs; 1443 u_int32_t intrs; 1444 1445 xfer->status = USBD_IN_PROGRESS; 1446 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1447 usb_delay_ms(&sc->sc_bus, 1); 1448 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1449 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1450 #ifdef OHCI_DEBUG 1451 if (ohcidebug > 15) 1452 ohci_dumpregs(sc); 1453 #endif 1454 if (intrs) { 1455 ohci_intr1(sc); 1456 if (xfer->status != USBD_IN_PROGRESS) 1457 return; 1458 } 1459 } 1460 1461 /* Timeout */ 1462 DPRINTF(("ohci_waitintr: timeout\n")); 1463 xfer->status = USBD_TIMEOUT; 1464 usb_transfer_complete(xfer); 1465 /* XXX should free TD */ 1466 } 1467 1468 void 1469 ohci_poll(struct usbd_bus *bus) 1470 { 1471 ohci_softc_t *sc = (ohci_softc_t *)bus; 1472 1473 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1474 ohci_intr1(sc); 1475 } 1476 1477 usbd_status 1478 ohci_device_request(usbd_xfer_handle xfer) 1479 { 1480 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1481 usb_device_request_t *req = &xfer->request; 1482 usbd_device_handle dev = opipe->pipe.device; 1483 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1484 int addr = dev->address; 1485 ohci_soft_td_t *setup, *stat, *next, *tail; 1486 ohci_soft_ed_t *sed; 1487 int isread; 1488 int len; 1489 usbd_status err; 1490 int s; 1491 1492 isread = req->bmRequestType & UT_READ; 1493 len = UGETW(req->wLength); 1494 1495 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1496 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1497 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1498 UGETW(req->wIndex), len, addr, 1499 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1500 1501 setup = opipe->tail.td; 1502 stat = ohci_alloc_std(sc); 1503 if (stat == NULL) { 1504 err = USBD_NOMEM; 1505 goto bad1; 1506 } 1507 tail = ohci_alloc_std(sc); 1508 if (tail == NULL) { 1509 err = USBD_NOMEM; 1510 goto bad2; 1511 } 1512 tail->xfer = NULL; 1513 1514 sed = opipe->sed; 1515 opipe->u.ctl.length = len; 1516 1517 /* Update device address and length since they may have changed. */ 1518 /* XXX This only needs to be done once, but it's too early in open. */ 1519 /* XXXX Should not touch ED here! */ 1520 sed->ed.ed_flags = htole32( 1521 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1522 OHCI_ED_SET_FA(addr) | 1523 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1524 1525 next = stat; 1526 1527 /* Set up data transaction */ 1528 if (len != 0) { 1529 ohci_soft_td_t *std = stat; 1530 1531 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1532 std, &stat); 1533 stat = stat->nexttd; /* point at free TD */ 1534 if (err) 1535 goto bad3; 1536 /* Start toggle at 1 and then use the carried toggle. */ 1537 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1538 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1539 } 1540 1541 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1542 1543 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1544 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1545 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma)); 1546 setup->nexttd = next; 1547 setup->td.td_nexttd = htole32(next->physaddr); 1548 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1549 setup->len = 0; 1550 setup->xfer = xfer; 1551 setup->flags = 0; 1552 xfer->hcpriv = setup; 1553 1554 stat->td.td_flags = htole32( 1555 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1556 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1557 stat->td.td_cbp = 0; 1558 stat->nexttd = tail; 1559 stat->td.td_nexttd = htole32(tail->physaddr); 1560 stat->td.td_be = 0; 1561 stat->flags = OHCI_CALL_DONE; 1562 stat->len = 0; 1563 stat->xfer = xfer; 1564 1565 #ifdef OHCI_DEBUG 1566 if (ohcidebug > 5) { 1567 DPRINTF(("ohci_device_request:\n")); 1568 ohci_dump_ed(sed); 1569 ohci_dump_tds(setup); 1570 } 1571 #endif 1572 1573 /* Insert ED in schedule */ 1574 s = splusb(); 1575 sed->ed.ed_tailp = htole32(tail->physaddr); 1576 opipe->tail.td = tail; 1577 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1578 if (xfer->timeout && !sc->sc_bus.use_polling) { 1579 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 1580 ohci_timeout, xfer); 1581 } 1582 splx(s); 1583 1584 #if 0 1585 if (ohcidebug > 10) { 1586 delay(10000); 1587 DPRINTF(("ohci_device_request: status=%x\n", 1588 OREAD4(sc, OHCI_COMMAND_STATUS))); 1589 ohci_dump_ed(sed); 1590 ohci_dump_tds(setup); 1591 } 1592 #endif 1593 1594 return (USBD_NORMAL_COMPLETION); 1595 1596 bad3: 1597 ohci_free_std(sc, tail); 1598 bad2: 1599 ohci_free_std(sc, stat); 1600 bad1: 1601 return (err); 1602 } 1603 1604 /* 1605 * Add an ED to the schedule. Called at splusb(). 1606 */ 1607 void 1608 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1609 { 1610 SPLUSBCHECK; 1611 sed->next = head->next; 1612 sed->ed.ed_nexted = head->ed.ed_nexted; 1613 head->next = sed; 1614 head->ed.ed_nexted = htole32(sed->physaddr); 1615 } 1616 1617 /* 1618 * Remove an ED from the schedule. Called at splusb(). 1619 */ 1620 void 1621 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1622 { 1623 ohci_soft_ed_t *p; 1624 1625 SPLUSBCHECK; 1626 1627 /* XXX */ 1628 for (p = head; p == NULL && p->next != sed; p = p->next) 1629 ; 1630 if (p == NULL) 1631 panic("ohci_rem_ed: ED not found\n"); 1632 p->next = sed->next; 1633 p->ed.ed_nexted = sed->ed.ed_nexted; 1634 } 1635 1636 /* 1637 * When a transfer is completed the TD is added to the done queue by 1638 * the host controller. This queue is the processed by software. 1639 * Unfortunately the queue contains the physical address of the TD 1640 * and we have no simple way to translate this back to a kernel address. 1641 * To make the translation possible (and fast) we use a hash table of 1642 * TDs currently in the schedule. The physical address is used as the 1643 * hash value. 1644 */ 1645 1646 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1647 /* Called at splusb() */ 1648 void 1649 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1650 { 1651 int h = HASH(std->physaddr); 1652 1653 SPLUSBCHECK; 1654 1655 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1656 } 1657 1658 /* Called at splusb() */ 1659 void 1660 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1661 { 1662 SPLUSBCHECK; 1663 1664 LIST_REMOVE(std, hnext); 1665 } 1666 1667 ohci_soft_td_t * 1668 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1669 { 1670 int h = HASH(a); 1671 ohci_soft_td_t *std; 1672 1673 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1674 std != NULL; 1675 std = LIST_NEXT(std, hnext)) 1676 if (std->physaddr == a) 1677 return (std); 1678 return (NULL); 1679 } 1680 1681 /* Called at splusb() */ 1682 void 1683 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1684 { 1685 int h = HASH(sitd->physaddr); 1686 1687 SPLUSBCHECK; 1688 1689 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1690 sitd, (u_long)sitd->physaddr)); 1691 1692 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1693 } 1694 1695 /* Called at splusb() */ 1696 void 1697 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1698 { 1699 SPLUSBCHECK; 1700 1701 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1702 sitd, (u_long)sitd->physaddr)); 1703 1704 LIST_REMOVE(sitd, hnext); 1705 } 1706 1707 ohci_soft_itd_t * 1708 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1709 { 1710 int h = HASH(a); 1711 ohci_soft_itd_t *sitd; 1712 1713 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1714 sitd != NULL; 1715 sitd = LIST_NEXT(sitd, hnext)) 1716 if (sitd->physaddr == a) 1717 return (sitd); 1718 return (NULL); 1719 } 1720 1721 void 1722 ohci_timeout(void *addr) 1723 { 1724 usbd_xfer_handle xfer = addr; 1725 int s; 1726 1727 DPRINTF(("ohci_timeout: xfer=%p\n", xfer)); 1728 1729 s = splusb(); 1730 xfer->device->bus->intr_context++; 1731 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1732 xfer->device->bus->intr_context--; 1733 splx(s); 1734 } 1735 1736 #ifdef OHCI_DEBUG 1737 void 1738 ohci_dump_tds(ohci_soft_td_t *std) 1739 { 1740 for (; std; std = std->nexttd) 1741 ohci_dump_td(std); 1742 } 1743 1744 void 1745 ohci_dump_td(ohci_soft_td_t *std) 1746 { 1747 char sbuf[128]; 1748 1749 bitmask_snprintf((int)le32toh(std->td.td_flags), 1750 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1751 sbuf, sizeof(sbuf)); 1752 1753 DPRINTF(("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1754 "nexttd=0x%08lx be=0x%08lx\n", 1755 std, (u_long)std->physaddr, sbuf, 1756 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1757 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1758 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1759 (u_long)le32toh(std->td.td_cbp), 1760 (u_long)le32toh(std->td.td_nexttd), 1761 (u_long)le32toh(std->td.td_be))); 1762 } 1763 1764 void 1765 ohci_dump_itd(ohci_soft_itd_t *sitd) 1766 { 1767 int i; 1768 1769 DPRINTF(("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1770 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1771 sitd, (u_long)sitd->physaddr, 1772 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1773 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1774 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1775 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1776 (u_long)le32toh(sitd->itd.itd_bp0), 1777 (u_long)le32toh(sitd->itd.itd_nextitd), 1778 (u_long)le32toh(sitd->itd.itd_be))); 1779 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1780 DPRINTF(("offs[%d]=0x%04x ", i, 1781 (u_int)le16toh(sitd->itd.itd_offset[i]))); 1782 DPRINTF(("\n")); 1783 } 1784 1785 void 1786 ohci_dump_itds(ohci_soft_itd_t *sitd) 1787 { 1788 for (; sitd; sitd = sitd->nextitd) 1789 ohci_dump_itd(sitd); 1790 } 1791 1792 void 1793 ohci_dump_ed(ohci_soft_ed_t *sed) 1794 { 1795 char sbuf[128], sbuf2[128]; 1796 1797 bitmask_snprintf((int)le32toh(sed->ed.ed_flags), 1798 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1799 sbuf, sizeof(sbuf)); 1800 bitmask_snprintf((u_long)le32toh(sed->ed.ed_headp), 1801 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1802 1803 DPRINTF(("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d %s\ntailp=0x%08lx " 1804 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1805 sed, (u_long)sed->physaddr, 1806 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1807 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1808 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 1809 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 1810 (u_long)le32toh(sed->ed.ed_headp), 1811 (u_long)le32toh(sed->ed.ed_nexted))); 1812 } 1813 #endif 1814 1815 usbd_status 1816 ohci_open(usbd_pipe_handle pipe) 1817 { 1818 usbd_device_handle dev = pipe->device; 1819 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1820 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1821 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1822 u_int8_t addr = dev->address; 1823 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1824 ohci_soft_ed_t *sed; 1825 ohci_soft_td_t *std; 1826 ohci_soft_itd_t *sitd; 1827 ohci_physaddr_t tdphys; 1828 u_int32_t fmt; 1829 usbd_status err; 1830 int s; 1831 int ival; 1832 1833 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1834 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1835 1836 std = NULL; 1837 sed = NULL; 1838 1839 if (addr == sc->sc_addr) { 1840 switch (ed->bEndpointAddress) { 1841 case USB_CONTROL_ENDPOINT: 1842 pipe->methods = &ohci_root_ctrl_methods; 1843 break; 1844 case UE_DIR_IN | OHCI_INTR_ENDPT: 1845 pipe->methods = &ohci_root_intr_methods; 1846 break; 1847 default: 1848 return (USBD_INVAL); 1849 } 1850 } else { 1851 sed = ohci_alloc_sed(sc); 1852 if (sed == NULL) 1853 goto bad0; 1854 opipe->sed = sed; 1855 if (xfertype == UE_ISOCHRONOUS) { 1856 sitd = ohci_alloc_sitd(sc); 1857 if (sitd == NULL) { 1858 ohci_free_sitd(sc, sitd); 1859 goto bad1; 1860 } 1861 opipe->tail.itd = sitd; 1862 tdphys = sitd->physaddr; 1863 fmt = OHCI_ED_FORMAT_ISO; 1864 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 1865 fmt |= OHCI_ED_DIR_IN; 1866 else 1867 fmt |= OHCI_ED_DIR_OUT; 1868 } else { 1869 std = ohci_alloc_std(sc); 1870 if (std == NULL) { 1871 ohci_free_std(sc, std); 1872 goto bad1; 1873 } 1874 opipe->tail.td = std; 1875 tdphys = std->physaddr; 1876 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 1877 } 1878 sed->ed.ed_flags = htole32( 1879 OHCI_ED_SET_FA(addr) | 1880 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1881 (dev->lowspeed ? OHCI_ED_SPEED : 0) | fmt | 1882 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1883 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 1884 1885 switch (xfertype) { 1886 case UE_CONTROL: 1887 pipe->methods = &ohci_device_ctrl_methods; 1888 err = usb_allocmem(&sc->sc_bus, 1889 sizeof(usb_device_request_t), 1890 0, &opipe->u.ctl.reqdma); 1891 if (err) 1892 goto bad; 1893 s = splusb(); 1894 ohci_add_ed(sed, sc->sc_ctrl_head); 1895 splx(s); 1896 break; 1897 case UE_INTERRUPT: 1898 pipe->methods = &ohci_device_intr_methods; 1899 ival = pipe->interval; 1900 if (ival == USBD_DEFAULT_INTERVAL) 1901 ival = ed->bInterval; 1902 return (ohci_device_setintr(sc, opipe, ival)); 1903 case UE_ISOCHRONOUS: 1904 pipe->methods = &ohci_device_isoc_methods; 1905 return (ohci_setup_isoc(pipe)); 1906 case UE_BULK: 1907 pipe->methods = &ohci_device_bulk_methods; 1908 s = splusb(); 1909 ohci_add_ed(sed, sc->sc_bulk_head); 1910 splx(s); 1911 break; 1912 } 1913 } 1914 return (USBD_NORMAL_COMPLETION); 1915 1916 bad: 1917 if (std != NULL) 1918 ohci_free_std(sc, std); 1919 bad1: 1920 if (sed != NULL) 1921 ohci_free_sed(sc, sed); 1922 bad0: 1923 return (USBD_NOMEM); 1924 1925 } 1926 1927 /* 1928 * Close a reqular pipe. 1929 * Assumes that there are no pending transactions. 1930 */ 1931 void 1932 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 1933 { 1934 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1935 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1936 ohci_soft_ed_t *sed = opipe->sed; 1937 int s; 1938 1939 s = splusb(); 1940 #ifdef DIAGNOSTIC 1941 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 1942 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 1943 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 1944 ohci_physaddr_t td = le32toh(sed->ed.ed_headp); 1945 ohci_soft_td_t *std; 1946 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]); 1947 std != NULL; 1948 std = LIST_NEXT(std, hnext)) 1949 if (std->physaddr == td) 1950 break; 1951 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 1952 "tl=0x%x pipe=%p, std=%p\n", sed, 1953 (int)le32toh(sed->ed.ed_headp), 1954 (int)le32toh(sed->ed.ed_tailp), 1955 pipe, std); 1956 usb_delay_ms(&sc->sc_bus, 2); 1957 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 1958 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 1959 printf("ohci_close_pipe: pipe still not empty\n"); 1960 } 1961 #endif 1962 ohci_rem_ed(sed, head); 1963 splx(s); 1964 ohci_free_sed(sc, opipe->sed); 1965 } 1966 1967 /* 1968 * Abort a device request. 1969 * If this routine is called at splusb() it guarantees that the request 1970 * will be removed from the hardware scheduling and that the callback 1971 * for it will be called with USBD_CANCELLED status. 1972 * It's impossible to guarantee that the requested transfer will not 1973 * have happened since the hardware runs concurrently. 1974 * If the transaction has already happened we rely on the ordinary 1975 * interrupt processing to process it. 1976 */ 1977 void 1978 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 1979 { 1980 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1981 ohci_soft_ed_t *sed; 1982 1983 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p\n", xfer, opipe)); 1984 1985 xfer->status = status; 1986 1987 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1988 1989 sed = opipe->sed; 1990 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 1991 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 1992 1993 #if 1 1994 if (xfer->device->bus->intr_context) { 1995 /* We have no process context, so we can't use tsleep(). */ 1996 usb_callout(xfer->pipe->abort_handle, 1997 hz / USB_FRAMES_PER_SECOND, ohci_abort_xfer_end, xfer); 1998 } else { 1999 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 2000 KASSERT(intr_nesting_level == 0, 2001 ("ohci_abort_req in interrupt context")); 2002 #endif 2003 usb_delay_ms(opipe->pipe.device->bus, 1); 2004 ohci_abort_xfer_end(xfer); 2005 } 2006 #else 2007 delay(1000); 2008 ohci_abort_xfer_end(xfer); 2009 #endif 2010 } 2011 2012 void 2013 ohci_abort_xfer_end(void *v) 2014 { 2015 usbd_xfer_handle xfer = v; 2016 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2017 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2018 ohci_soft_ed_t *sed; 2019 ohci_soft_td_t *p, *n; 2020 int s; 2021 2022 s = splusb(); 2023 2024 p = xfer->hcpriv; 2025 #ifdef DIAGNOSTIC 2026 if (p == NULL) { 2027 printf("ohci_abort_xfer: hcpriv==0\n"); 2028 return; 2029 } 2030 #endif 2031 for (; p->xfer == xfer; p = n) { 2032 n = p->nexttd; 2033 ohci_free_std(sc, p); 2034 } 2035 2036 sed = opipe->sed; 2037 DPRINTFN(2,("ohci_abort_xfer: set hd=%x, tl=%x\n", 2038 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2039 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2040 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2041 2042 usb_transfer_complete(xfer); 2043 2044 splx(s); 2045 } 2046 2047 /* 2048 * Data structures and routines to emulate the root hub. 2049 */ 2050 Static usb_device_descriptor_t ohci_devd = { 2051 USB_DEVICE_DESCRIPTOR_SIZE, 2052 UDESC_DEVICE, /* type */ 2053 {0x00, 0x01}, /* USB version */ 2054 UDCLASS_HUB, /* class */ 2055 UDSUBCLASS_HUB, /* subclass */ 2056 0, /* protocol */ 2057 64, /* max packet */ 2058 {0},{0},{0x00,0x01}, /* device id */ 2059 1,2,0, /* string indicies */ 2060 1 /* # of configurations */ 2061 }; 2062 2063 Static usb_config_descriptor_t ohci_confd = { 2064 USB_CONFIG_DESCRIPTOR_SIZE, 2065 UDESC_CONFIG, 2066 {USB_CONFIG_DESCRIPTOR_SIZE + 2067 USB_INTERFACE_DESCRIPTOR_SIZE + 2068 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2069 1, 2070 1, 2071 0, 2072 UC_SELF_POWERED, 2073 0 /* max power */ 2074 }; 2075 2076 Static usb_interface_descriptor_t ohci_ifcd = { 2077 USB_INTERFACE_DESCRIPTOR_SIZE, 2078 UDESC_INTERFACE, 2079 0, 2080 0, 2081 1, 2082 UICLASS_HUB, 2083 UISUBCLASS_HUB, 2084 0, 2085 0 2086 }; 2087 2088 Static usb_endpoint_descriptor_t ohci_endpd = { 2089 USB_ENDPOINT_DESCRIPTOR_SIZE, 2090 UDESC_ENDPOINT, 2091 UE_DIR_IN | OHCI_INTR_ENDPT, 2092 UE_INTERRUPT, 2093 {8, 0}, /* max packet */ 2094 255 2095 }; 2096 2097 Static usb_hub_descriptor_t ohci_hubd = { 2098 USB_HUB_DESCRIPTOR_SIZE, 2099 UDESC_HUB, 2100 0, 2101 {0,0}, 2102 0, 2103 0, 2104 {0}, 2105 }; 2106 2107 Static int 2108 ohci_str(p, l, s) 2109 usb_string_descriptor_t *p; 2110 int l; 2111 char *s; 2112 { 2113 int i; 2114 2115 if (l == 0) 2116 return (0); 2117 p->bLength = 2 * strlen(s) + 2; 2118 if (l == 1) 2119 return (1); 2120 p->bDescriptorType = UDESC_STRING; 2121 l -= 2; 2122 for (i = 0; s[i] && l > 1; i++, l -= 2) 2123 USETW2(p->bString[i], 0, s[i]); 2124 return (2*i+2); 2125 } 2126 2127 /* 2128 * Simulate a hardware hub by handling all the necessary requests. 2129 */ 2130 Static usbd_status 2131 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2132 { 2133 usbd_status err; 2134 2135 /* Insert last in queue. */ 2136 err = usb_insert_transfer(xfer); 2137 if (err) 2138 return (err); 2139 2140 /* Pipe isn't running, start first */ 2141 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2142 } 2143 2144 Static usbd_status 2145 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2146 { 2147 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2148 usb_device_request_t *req; 2149 void *buf = NULL; 2150 int port, i; 2151 int s, len, value, index, l, totlen = 0; 2152 usb_port_status_t ps; 2153 usb_hub_descriptor_t hubd; 2154 usbd_status err; 2155 u_int32_t v; 2156 2157 if (sc->sc_dying) 2158 return (USBD_IOERROR); 2159 2160 #ifdef DIAGNOSTIC 2161 if (!(xfer->rqflags & URQ_REQUEST)) 2162 /* XXX panic */ 2163 return (USBD_INVAL); 2164 #endif 2165 req = &xfer->request; 2166 2167 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2168 req->bmRequestType, req->bRequest)); 2169 2170 len = UGETW(req->wLength); 2171 value = UGETW(req->wValue); 2172 index = UGETW(req->wIndex); 2173 2174 if (len != 0) 2175 buf = KERNADDR(&xfer->dmabuf); 2176 2177 #define C(x,y) ((x) | ((y) << 8)) 2178 switch(C(req->bRequest, req->bmRequestType)) { 2179 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2180 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2181 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2182 /* 2183 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2184 * for the integrated root hub. 2185 */ 2186 break; 2187 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2188 if (len > 0) { 2189 *(u_int8_t *)buf = sc->sc_conf; 2190 totlen = 1; 2191 } 2192 break; 2193 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2194 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2195 switch(value >> 8) { 2196 case UDESC_DEVICE: 2197 if ((value & 0xff) != 0) { 2198 err = USBD_IOERROR; 2199 goto ret; 2200 } 2201 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2202 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2203 memcpy(buf, &ohci_devd, l); 2204 break; 2205 case UDESC_CONFIG: 2206 if ((value & 0xff) != 0) { 2207 err = USBD_IOERROR; 2208 goto ret; 2209 } 2210 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2211 memcpy(buf, &ohci_confd, l); 2212 buf = (char *)buf + l; 2213 len -= l; 2214 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2215 totlen += l; 2216 memcpy(buf, &ohci_ifcd, l); 2217 buf = (char *)buf + l; 2218 len -= l; 2219 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2220 totlen += l; 2221 memcpy(buf, &ohci_endpd, l); 2222 break; 2223 case UDESC_STRING: 2224 if (len == 0) 2225 break; 2226 *(u_int8_t *)buf = 0; 2227 totlen = 1; 2228 switch (value & 0xff) { 2229 case 1: /* Vendor */ 2230 totlen = ohci_str(buf, len, sc->sc_vendor); 2231 break; 2232 case 2: /* Product */ 2233 totlen = ohci_str(buf, len, "OHCI root hub"); 2234 break; 2235 } 2236 break; 2237 default: 2238 err = USBD_IOERROR; 2239 goto ret; 2240 } 2241 break; 2242 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2243 if (len > 0) { 2244 *(u_int8_t *)buf = 0; 2245 totlen = 1; 2246 } 2247 break; 2248 case C(UR_GET_STATUS, UT_READ_DEVICE): 2249 if (len > 1) { 2250 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2251 totlen = 2; 2252 } 2253 break; 2254 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2255 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2256 if (len > 1) { 2257 USETW(((usb_status_t *)buf)->wStatus, 0); 2258 totlen = 2; 2259 } 2260 break; 2261 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2262 if (value >= USB_MAX_DEVICES) { 2263 err = USBD_IOERROR; 2264 goto ret; 2265 } 2266 sc->sc_addr = value; 2267 break; 2268 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2269 if (value != 0 && value != 1) { 2270 err = USBD_IOERROR; 2271 goto ret; 2272 } 2273 sc->sc_conf = value; 2274 break; 2275 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2276 break; 2277 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2278 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2279 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2280 err = USBD_IOERROR; 2281 goto ret; 2282 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2283 break; 2284 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2285 break; 2286 /* Hub requests */ 2287 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2288 break; 2289 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2290 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2291 "port=%d feature=%d\n", 2292 index, value)); 2293 if (index < 1 || index > sc->sc_noport) { 2294 err = USBD_IOERROR; 2295 goto ret; 2296 } 2297 port = OHCI_RH_PORT_STATUS(index); 2298 switch(value) { 2299 case UHF_PORT_ENABLE: 2300 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2301 break; 2302 case UHF_PORT_SUSPEND: 2303 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2304 break; 2305 case UHF_PORT_POWER: 2306 /* Yes, writing to the LOW_SPEED bit clears power. */ 2307 OWRITE4(sc, port, UPS_LOW_SPEED); 2308 break; 2309 case UHF_C_PORT_CONNECTION: 2310 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2311 break; 2312 case UHF_C_PORT_ENABLE: 2313 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2314 break; 2315 case UHF_C_PORT_SUSPEND: 2316 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2317 break; 2318 case UHF_C_PORT_OVER_CURRENT: 2319 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2320 break; 2321 case UHF_C_PORT_RESET: 2322 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2323 break; 2324 default: 2325 err = USBD_IOERROR; 2326 goto ret; 2327 } 2328 switch(value) { 2329 case UHF_C_PORT_CONNECTION: 2330 case UHF_C_PORT_ENABLE: 2331 case UHF_C_PORT_SUSPEND: 2332 case UHF_C_PORT_OVER_CURRENT: 2333 case UHF_C_PORT_RESET: 2334 /* Enable RHSC interrupt if condition is cleared. */ 2335 if ((OREAD4(sc, port) >> 16) == 0) 2336 ohci_rhsc_able(sc, 1); 2337 break; 2338 default: 2339 break; 2340 } 2341 break; 2342 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2343 if (value != 0) { 2344 err = USBD_IOERROR; 2345 goto ret; 2346 } 2347 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2348 hubd = ohci_hubd; 2349 hubd.bNbrPorts = sc->sc_noport; 2350 USETW(hubd.wHubCharacteristics, 2351 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2352 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2353 /* XXX overcurrent */ 2354 ); 2355 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2356 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2357 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2358 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2359 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2360 l = min(len, hubd.bDescLength); 2361 totlen = l; 2362 memcpy(buf, &hubd, l); 2363 break; 2364 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2365 if (len != 4) { 2366 err = USBD_IOERROR; 2367 goto ret; 2368 } 2369 memset(buf, 0, len); /* ? XXX */ 2370 totlen = len; 2371 break; 2372 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2373 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2374 index)); 2375 if (index < 1 || index > sc->sc_noport) { 2376 err = USBD_IOERROR; 2377 goto ret; 2378 } 2379 if (len != 4) { 2380 err = USBD_IOERROR; 2381 goto ret; 2382 } 2383 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2384 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2385 v)); 2386 USETW(ps.wPortStatus, v); 2387 USETW(ps.wPortChange, v >> 16); 2388 l = min(len, sizeof ps); 2389 memcpy(buf, &ps, l); 2390 totlen = l; 2391 break; 2392 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2393 err = USBD_IOERROR; 2394 goto ret; 2395 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2396 break; 2397 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2398 if (index < 1 || index > sc->sc_noport) { 2399 err = USBD_IOERROR; 2400 goto ret; 2401 } 2402 port = OHCI_RH_PORT_STATUS(index); 2403 switch(value) { 2404 case UHF_PORT_ENABLE: 2405 OWRITE4(sc, port, UPS_PORT_ENABLED); 2406 break; 2407 case UHF_PORT_SUSPEND: 2408 OWRITE4(sc, port, UPS_SUSPEND); 2409 break; 2410 case UHF_PORT_RESET: 2411 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2412 index)); 2413 OWRITE4(sc, port, UPS_RESET); 2414 for (i = 0; i < 10; i++) { 2415 usb_delay_ms(&sc->sc_bus, 10); /* XXX */ 2416 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2417 break; 2418 } 2419 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2420 index, OREAD4(sc, port))); 2421 break; 2422 case UHF_PORT_POWER: 2423 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2424 "%d\n", index)); 2425 OWRITE4(sc, port, UPS_PORT_POWER); 2426 break; 2427 default: 2428 err = USBD_IOERROR; 2429 goto ret; 2430 } 2431 break; 2432 default: 2433 err = USBD_IOERROR; 2434 goto ret; 2435 } 2436 xfer->actlen = totlen; 2437 err = USBD_NORMAL_COMPLETION; 2438 ret: 2439 xfer->status = err; 2440 s = splusb(); 2441 usb_transfer_complete(xfer); 2442 splx(s); 2443 return (USBD_IN_PROGRESS); 2444 } 2445 2446 /* Abort a root control request. */ 2447 Static void 2448 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2449 { 2450 /* Nothing to do, all transfers are synchronous. */ 2451 } 2452 2453 /* Close the root pipe. */ 2454 Static void 2455 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2456 { 2457 DPRINTF(("ohci_root_ctrl_close\n")); 2458 /* Nothing to do. */ 2459 } 2460 2461 Static usbd_status 2462 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2463 { 2464 usbd_status err; 2465 2466 /* Insert last in queue. */ 2467 err = usb_insert_transfer(xfer); 2468 if (err) 2469 return (err); 2470 2471 /* Pipe isn't running, start first */ 2472 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2473 } 2474 2475 Static usbd_status 2476 ohci_root_intr_start(usbd_xfer_handle xfer) 2477 { 2478 usbd_pipe_handle pipe = xfer->pipe; 2479 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2480 2481 if (sc->sc_dying) 2482 return (USBD_IOERROR); 2483 2484 sc->sc_intrxfer = xfer; 2485 2486 return (USBD_IN_PROGRESS); 2487 } 2488 2489 /* Abort a root interrupt request. */ 2490 Static void 2491 ohci_root_intr_abort(usbd_xfer_handle xfer) 2492 { 2493 int s; 2494 2495 if (xfer->pipe->intrxfer == xfer) { 2496 DPRINTF(("ohci_root_intr_abort: remove\n")); 2497 xfer->pipe->intrxfer = NULL; 2498 } 2499 xfer->status = USBD_CANCELLED; 2500 s = splusb(); 2501 usb_transfer_complete(xfer); 2502 splx(s); 2503 } 2504 2505 /* Close the root pipe. */ 2506 Static void 2507 ohci_root_intr_close(usbd_pipe_handle pipe) 2508 { 2509 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2510 2511 DPRINTF(("ohci_root_intr_close\n")); 2512 2513 sc->sc_intrxfer = NULL; 2514 } 2515 2516 /************************/ 2517 2518 Static usbd_status 2519 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2520 { 2521 usbd_status err; 2522 2523 /* Insert last in queue. */ 2524 err = usb_insert_transfer(xfer); 2525 if (err) 2526 return (err); 2527 2528 /* Pipe isn't running, start first */ 2529 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2530 } 2531 2532 Static usbd_status 2533 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2534 { 2535 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2536 usbd_status err; 2537 2538 if (sc->sc_dying) 2539 return (USBD_IOERROR); 2540 2541 #ifdef DIAGNOSTIC 2542 if (!(xfer->rqflags & URQ_REQUEST)) { 2543 /* XXX panic */ 2544 printf("ohci_device_ctrl_transfer: not a request\n"); 2545 return (USBD_INVAL); 2546 } 2547 #endif 2548 2549 err = ohci_device_request(xfer); 2550 if (err) 2551 return (err); 2552 2553 if (sc->sc_bus.use_polling) 2554 ohci_waitintr(sc, xfer); 2555 return (USBD_IN_PROGRESS); 2556 } 2557 2558 /* Abort a device control request. */ 2559 Static void 2560 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2561 { 2562 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2563 ohci_abort_xfer(xfer, USBD_CANCELLED); 2564 } 2565 2566 /* Close a device control pipe. */ 2567 Static void 2568 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2569 { 2570 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2571 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2572 2573 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2574 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2575 ohci_free_std(sc, opipe->tail.td); 2576 } 2577 2578 /************************/ 2579 2580 Static void 2581 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2582 { 2583 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2584 2585 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2586 } 2587 2588 Static void 2589 ohci_noop(usbd_pipe_handle pipe) 2590 { 2591 } 2592 2593 Static usbd_status 2594 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2595 { 2596 usbd_status err; 2597 2598 /* Insert last in queue. */ 2599 err = usb_insert_transfer(xfer); 2600 if (err) 2601 return (err); 2602 2603 /* Pipe isn't running, start first */ 2604 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2605 } 2606 2607 Static usbd_status 2608 ohci_device_bulk_start(usbd_xfer_handle xfer) 2609 { 2610 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2611 usbd_device_handle dev = opipe->pipe.device; 2612 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2613 int addr = dev->address; 2614 ohci_soft_td_t *data, *tail, *tdp; 2615 ohci_soft_ed_t *sed; 2616 int s, len, isread, endpt; 2617 usbd_status err; 2618 2619 if (sc->sc_dying) 2620 return (USBD_IOERROR); 2621 2622 #ifdef DIAGNOSTIC 2623 if (xfer->rqflags & URQ_REQUEST) { 2624 /* XXX panic */ 2625 printf("ohci_device_bulk_start: a request\n"); 2626 return (USBD_INVAL); 2627 } 2628 #endif 2629 2630 len = xfer->length; 2631 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2632 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2633 sed = opipe->sed; 2634 2635 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2636 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2637 endpt)); 2638 2639 opipe->u.bulk.isread = isread; 2640 opipe->u.bulk.length = len; 2641 2642 /* Update device address */ 2643 sed->ed.ed_flags = htole32( 2644 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2645 OHCI_ED_SET_FA(addr)); 2646 2647 /* Allocate a chain of new TDs (including a new tail). */ 2648 data = opipe->tail.td; 2649 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2650 data, &tail); 2651 /* We want interrupt at the end of the transfer. */ 2652 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2653 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2654 tail->flags |= OHCI_CALL_DONE; 2655 tail = tail->nexttd; /* point at sentinel */ 2656 if (err) 2657 return (err); 2658 2659 tail->xfer = NULL; 2660 xfer->hcpriv = data; 2661 2662 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2663 "td_cbp=0x%08x td_be=0x%08x\n", 2664 (int)le32toh(sed->ed.ed_flags), 2665 (int)le32toh(data->td.td_flags), 2666 (int)le32toh(data->td.td_cbp), 2667 (int)le32toh(data->td.td_be))); 2668 2669 #ifdef OHCI_DEBUG 2670 if (ohcidebug > 5) { 2671 ohci_dump_ed(sed); 2672 ohci_dump_tds(data); 2673 } 2674 #endif 2675 2676 /* Insert ED in schedule */ 2677 s = splusb(); 2678 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2679 tdp->xfer = xfer; 2680 } 2681 sed->ed.ed_tailp = htole32(tail->physaddr); 2682 opipe->tail.td = tail; 2683 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2684 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2685 if (xfer->timeout && !sc->sc_bus.use_polling) { 2686 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2687 ohci_timeout, xfer); 2688 } 2689 2690 #if 0 2691 /* This goes wrong if we are too slow. */ 2692 if (ohcidebug > 10) { 2693 delay(10000); 2694 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2695 OREAD4(sc, OHCI_COMMAND_STATUS))); 2696 ohci_dump_ed(sed); 2697 ohci_dump_tds(data); 2698 } 2699 #endif 2700 2701 splx(s); 2702 2703 return (USBD_IN_PROGRESS); 2704 } 2705 2706 Static void 2707 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2708 { 2709 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2710 ohci_abort_xfer(xfer, USBD_CANCELLED); 2711 } 2712 2713 /* 2714 * Close a device bulk pipe. 2715 */ 2716 Static void 2717 ohci_device_bulk_close(usbd_pipe_handle pipe) 2718 { 2719 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2720 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2721 2722 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2723 ohci_close_pipe(pipe, sc->sc_bulk_head); 2724 ohci_free_std(sc, opipe->tail.td); 2725 } 2726 2727 /************************/ 2728 2729 Static usbd_status 2730 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2731 { 2732 usbd_status err; 2733 2734 /* Insert last in queue. */ 2735 err = usb_insert_transfer(xfer); 2736 if (err) 2737 return (err); 2738 2739 /* Pipe isn't running, start first */ 2740 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2741 } 2742 2743 Static usbd_status 2744 ohci_device_intr_start(usbd_xfer_handle xfer) 2745 { 2746 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2747 usbd_device_handle dev = opipe->pipe.device; 2748 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2749 ohci_soft_ed_t *sed = opipe->sed; 2750 ohci_soft_td_t *data, *tail; 2751 int len; 2752 int s; 2753 2754 if (sc->sc_dying) 2755 return (USBD_IOERROR); 2756 2757 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2758 "flags=%d priv=%p\n", 2759 xfer, xfer->length, xfer->flags, xfer->priv)); 2760 2761 #ifdef DIAGNOSTIC 2762 if (xfer->rqflags & URQ_REQUEST) 2763 panic("ohci_device_intr_transfer: a request\n"); 2764 #endif 2765 2766 len = xfer->length; 2767 2768 data = opipe->tail.td; 2769 tail = ohci_alloc_std(sc); 2770 if (tail == NULL) 2771 return (USBD_NOMEM); 2772 tail->xfer = NULL; 2773 2774 data->td.td_flags = htole32( 2775 OHCI_TD_IN | OHCI_TD_NOCC | 2776 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2777 if (xfer->flags & USBD_SHORT_XFER_OK) 2778 data->td.td_flags |= htole32(OHCI_TD_R); 2779 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 2780 data->nexttd = tail; 2781 data->td.td_nexttd = htole32(tail->physaddr); 2782 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 2783 data->len = len; 2784 data->xfer = xfer; 2785 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2786 xfer->hcpriv = data; 2787 2788 #ifdef OHCI_DEBUG 2789 if (ohcidebug > 5) { 2790 DPRINTF(("ohci_device_intr_transfer:\n")); 2791 ohci_dump_ed(sed); 2792 ohci_dump_tds(data); 2793 } 2794 #endif 2795 2796 /* Insert ED in schedule */ 2797 s = splusb(); 2798 sed->ed.ed_tailp = htole32(tail->physaddr); 2799 opipe->tail.td = tail; 2800 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2801 2802 #if 0 2803 /* 2804 * This goes horribly wrong, printing thousands of descriptors, 2805 * because false references are followed due to the fact that the 2806 * TD is gone. 2807 */ 2808 if (ohcidebug > 5) { 2809 usb_delay_ms(&sc->sc_bus, 5); 2810 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2811 OREAD4(sc, OHCI_COMMAND_STATUS))); 2812 ohci_dump_ed(sed); 2813 ohci_dump_tds(data); 2814 } 2815 #endif 2816 splx(s); 2817 2818 return (USBD_IN_PROGRESS); 2819 } 2820 2821 /* Abort a device control request. */ 2822 Static void 2823 ohci_device_intr_abort(usbd_xfer_handle xfer) 2824 { 2825 if (xfer->pipe->intrxfer == xfer) { 2826 DPRINTF(("ohci_device_intr_abort: remove\n")); 2827 xfer->pipe->intrxfer = NULL; 2828 } 2829 ohci_abort_xfer(xfer, USBD_CANCELLED); 2830 } 2831 2832 /* Close a device interrupt pipe. */ 2833 Static void 2834 ohci_device_intr_close(usbd_pipe_handle pipe) 2835 { 2836 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2837 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2838 int nslots = opipe->u.intr.nslots; 2839 int pos = opipe->u.intr.pos; 2840 int j; 2841 ohci_soft_ed_t *p, *sed = opipe->sed; 2842 int s; 2843 2844 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2845 pipe, nslots, pos)); 2846 s = splusb(); 2847 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2848 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2849 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2850 usb_delay_ms(&sc->sc_bus, 2); 2851 2852 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2853 ; 2854 #ifdef DIAGNOSTIC 2855 if (p == NULL) 2856 panic("ohci_device_intr_close: ED not found\n"); 2857 #endif 2858 p->next = sed->next; 2859 p->ed.ed_nexted = sed->ed.ed_nexted; 2860 splx(s); 2861 2862 for (j = 0; j < nslots; j++) 2863 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2864 2865 ohci_free_std(sc, opipe->tail.td); 2866 ohci_free_sed(sc, opipe->sed); 2867 } 2868 2869 Static usbd_status 2870 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 2871 { 2872 int i, j, s, best; 2873 u_int npoll, slow, shigh, nslots; 2874 u_int bestbw, bw; 2875 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2876 2877 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2878 if (ival == 0) { 2879 printf("ohci_setintr: 0 interval\n"); 2880 return (USBD_INVAL); 2881 } 2882 2883 npoll = OHCI_NO_INTRS; 2884 while (npoll > ival) 2885 npoll /= 2; 2886 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2887 2888 /* 2889 * We now know which level in the tree the ED must go into. 2890 * Figure out which slot has most bandwidth left over. 2891 * Slots to examine: 2892 * npoll 2893 * 1 0 2894 * 2 1 2 2895 * 4 3 4 5 6 2896 * 8 7 8 9 10 11 12 13 14 2897 * N (N-1) .. (N-1+N-1) 2898 */ 2899 slow = npoll-1; 2900 shigh = slow + npoll; 2901 nslots = OHCI_NO_INTRS / npoll; 2902 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2903 bw = 0; 2904 for (j = 0; j < nslots; j++) 2905 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 2906 if (bw < bestbw) { 2907 best = i; 2908 bestbw = bw; 2909 } 2910 } 2911 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2912 best, slow, shigh, bestbw)); 2913 2914 s = splusb(); 2915 hsed = sc->sc_eds[best]; 2916 sed->next = hsed->next; 2917 sed->ed.ed_nexted = hsed->ed.ed_nexted; 2918 hsed->next = sed; 2919 hsed->ed.ed_nexted = htole32(sed->physaddr); 2920 splx(s); 2921 2922 for (j = 0; j < nslots; j++) 2923 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 2924 opipe->u.intr.nslots = nslots; 2925 opipe->u.intr.pos = best; 2926 2927 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 2928 return (USBD_NORMAL_COMPLETION); 2929 } 2930 2931 /***********************/ 2932 2933 usbd_status 2934 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 2935 { 2936 usbd_status err; 2937 2938 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 2939 2940 /* Put it on our queue, */ 2941 err = usb_insert_transfer(xfer); 2942 2943 /* bail out on error, */ 2944 if (err && err != USBD_IN_PROGRESS) 2945 return (err); 2946 2947 /* XXX should check inuse here */ 2948 2949 /* insert into schedule, */ 2950 ohci_device_isoc_enter(xfer); 2951 2952 /* and start if the pipe wasn't running */ 2953 if (!err) 2954 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2955 2956 return (err); 2957 } 2958 2959 void 2960 ohci_device_isoc_enter(usbd_xfer_handle xfer) 2961 { 2962 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2963 usbd_device_handle dev = opipe->pipe.device; 2964 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2965 ohci_soft_ed_t *sed = opipe->sed; 2966 struct iso *iso = &opipe->u.iso; 2967 ohci_soft_itd_t *sitd, *nsitd; 2968 ohci_physaddr_t buf, offs, noffs, bp0; 2969 int i, ncur, nframes; 2970 int s; 2971 2972 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 2973 "nframes=%d\n", 2974 iso->inuse, iso->next, xfer, xfer->nframes)); 2975 2976 if (sc->sc_dying) 2977 return; 2978 2979 if (iso->next == -1) { 2980 /* Not in use yet, schedule it a few frames ahead. */ 2981 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 2982 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 2983 iso->next)); 2984 } 2985 2986 sitd = opipe->tail.itd; 2987 buf = DMAADDR(&xfer->dmabuf); 2988 bp0 = OHCI_PAGE(buf); 2989 offs = OHCI_PAGE_OFFSET(buf); 2990 nframes = xfer->nframes; 2991 xfer->hcpriv = sitd; 2992 for (i = ncur = 0; i < nframes; i++, ncur++) { 2993 noffs = offs + xfer->frlengths[i]; 2994 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 2995 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 2996 2997 /* Allocate next ITD */ 2998 nsitd = ohci_alloc_sitd(sc); 2999 if (nsitd == NULL) { 3000 /* XXX what now? */ 3001 printf("%s: isoc TD alloc failed\n", 3002 USBDEVNAME(sc->sc_bus.bdev)); 3003 return; 3004 } 3005 3006 /* Fill current ITD */ 3007 sitd->itd.itd_flags = htole32( 3008 OHCI_ITD_NOCC | 3009 OHCI_ITD_SET_SF(iso->next) | 3010 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3011 OHCI_ITD_SET_FC(ncur)); 3012 sitd->itd.itd_bp0 = htole32(bp0); 3013 sitd->nextitd = nsitd; 3014 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3015 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3016 sitd->xfer = xfer; 3017 sitd->flags = 0; 3018 3019 sitd = nsitd; 3020 iso->next = iso->next + ncur; 3021 bp0 = OHCI_PAGE(buf + offs); 3022 ncur = 0; 3023 } 3024 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3025 offs = noffs; 3026 } 3027 nsitd = ohci_alloc_sitd(sc); 3028 if (nsitd == NULL) { 3029 /* XXX what now? */ 3030 printf("%s: isoc TD alloc failed\n", 3031 USBDEVNAME(sc->sc_bus.bdev)); 3032 return; 3033 } 3034 /* Fixup last used ITD */ 3035 sitd->itd.itd_flags = htole32( 3036 OHCI_ITD_NOCC | 3037 OHCI_ITD_SET_SF(iso->next) | 3038 OHCI_ITD_SET_DI(0) | 3039 OHCI_ITD_SET_FC(ncur)); 3040 sitd->itd.itd_bp0 = htole32(bp0); 3041 sitd->nextitd = nsitd; 3042 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3043 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3044 sitd->xfer = xfer; 3045 sitd->flags = OHCI_CALL_DONE; 3046 3047 iso->next = iso->next + ncur; 3048 iso->inuse += nframes; 3049 3050 xfer->actlen = offs; /* XXX pretend we did it all */ 3051 3052 xfer->status = USBD_IN_PROGRESS; 3053 3054 #ifdef OHCI_DEBUG 3055 if (ohcidebug > 5) { 3056 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3057 le32toh(sc->sc_hcca->hcca_frame_number))); 3058 ohci_dump_itds(xfer->hcpriv); 3059 ohci_dump_ed(sed); 3060 } 3061 #endif 3062 3063 s = splusb(); 3064 opipe->tail.itd = nsitd; 3065 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3066 splx(s); 3067 3068 #ifdef OHCI_DEBUG 3069 if (ohcidebug > 5) { 3070 delay(150000); 3071 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3072 le32toh(sc->sc_hcca->hcca_frame_number))); 3073 ohci_dump_itds(xfer->hcpriv); 3074 ohci_dump_ed(sed); 3075 } 3076 #endif 3077 } 3078 3079 usbd_status 3080 ohci_device_isoc_start(usbd_xfer_handle xfer) 3081 { 3082 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3083 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3084 3085 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3086 3087 if (sc->sc_dying) 3088 return (USBD_IOERROR); 3089 3090 #ifdef DIAGNOSTIC 3091 if (xfer->status != USBD_IN_PROGRESS) 3092 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 3093 #endif 3094 3095 /* XXX anything to do? */ 3096 3097 return (USBD_IN_PROGRESS); 3098 } 3099 3100 void 3101 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3102 { 3103 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3104 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3105 ohci_soft_ed_t *sed; 3106 ohci_soft_itd_t *sitd; 3107 int s; 3108 3109 s = splusb(); 3110 3111 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3112 3113 /* Transfer is already done. */ 3114 if (xfer->status != USBD_NOT_STARTED && 3115 xfer->status != USBD_IN_PROGRESS) { 3116 splx(s); 3117 printf("ohci_device_isoc_abort: early return\n"); 3118 return; 3119 } 3120 3121 /* Give xfer the requested abort code. */ 3122 xfer->status = USBD_CANCELLED; 3123 3124 sed = opipe->sed; 3125 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3126 3127 sitd = xfer->hcpriv; 3128 #ifdef DIAGNOSTIC 3129 if (sitd == NULL) { 3130 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3131 return; 3132 } 3133 #endif 3134 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3135 #ifdef DIAGNOSTIC 3136 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3137 sitd->isdone = 1; 3138 #endif 3139 } 3140 3141 splx(s); 3142 3143 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3144 3145 s = splusb(); 3146 3147 /* Run callback. */ 3148 usb_transfer_complete(xfer); 3149 3150 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3151 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3152 3153 splx(s); 3154 } 3155 3156 void 3157 ohci_device_isoc_done(usbd_xfer_handle xfer) 3158 { 3159 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3160 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3161 ohci_soft_itd_t *sitd, *nsitd; 3162 3163 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3164 3165 for (sitd = xfer->hcpriv; 3166 !(sitd->flags & OHCI_CALL_DONE); 3167 sitd = nsitd) { 3168 nsitd = sitd->nextitd; 3169 DPRINTFN(1,("ohci_device_isoc_done: free sitd=%p\n", sitd)); 3170 ohci_free_sitd(sc, sitd); 3171 } 3172 ohci_free_sitd(sc, sitd); 3173 xfer->hcpriv = NULL; 3174 } 3175 3176 usbd_status 3177 ohci_setup_isoc(usbd_pipe_handle pipe) 3178 { 3179 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3180 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3181 struct iso *iso = &opipe->u.iso; 3182 int s; 3183 3184 iso->next = -1; 3185 iso->inuse = 0; 3186 3187 s = splusb(); 3188 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3189 splx(s); 3190 3191 return (USBD_NORMAL_COMPLETION); 3192 } 3193 3194 void 3195 ohci_device_isoc_close(usbd_pipe_handle pipe) 3196 { 3197 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3198 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3199 int s; 3200 3201 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3202 3203 s = splusb(); 3204 ohci_rem_ed(opipe->sed, sc->sc_isoc_head); 3205 splx(s); 3206 ohci_close_pipe(pipe, sc->sc_isoc_head); 3207 #ifdef DIAGNOSTIC 3208 opipe->tail.itd->isdone = 1; 3209 #endif 3210 ohci_free_sitd(sc, opipe->tail.itd); 3211 } 3212
Indexes created Tue Sep 23 21:09:50 GMT 2025