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ohcireg.h revision 1.9.2.1
      1  1.9.2.1    bouyer /*	$NetBSD: ohcireg.h,v 1.9.2.1 2000/11/20 11:43:21 bouyer Exp $	*/
      2  1.9.2.1    bouyer /*	$FreeBSD: src/sys/dev/usb/ohcireg.h,v 1.8 1999/11/17 22:33:40 n_hibma Exp $	*/
      3  1.9.2.1    bouyer 
      4      1.1  augustss 
      5      1.1  augustss /*
      6      1.1  augustss  * Copyright (c) 1998 The NetBSD Foundation, Inc.
      7      1.1  augustss  * All rights reserved.
      8      1.1  augustss  *
      9      1.6  augustss  * This code is derived from software contributed to The NetBSD Foundation
     10  1.9.2.1    bouyer  * by Lennart Augustsson (lennart (at) augustsson.net) at
     11      1.6  augustss  * Carlstedt Research & Technology.
     12      1.1  augustss  *
     13      1.1  augustss  * Redistribution and use in source and binary forms, with or without
     14      1.1  augustss  * modification, are permitted provided that the following conditions
     15      1.1  augustss  * are met:
     16      1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     17      1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     18      1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     19      1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     20      1.1  augustss  *    documentation and/or other materials provided with the distribution.
     21      1.1  augustss  * 3. All advertising materials mentioning features or use of this software
     22      1.1  augustss  *    must display the following acknowledgement:
     23      1.1  augustss  *        This product includes software developed by the NetBSD
     24      1.1  augustss  *        Foundation, Inc. and its contributors.
     25      1.1  augustss  * 4. Neither the name of The NetBSD Foundation nor the names of its
     26      1.1  augustss  *    contributors may be used to endorse or promote products derived
     27      1.1  augustss  *    from this software without specific prior written permission.
     28      1.1  augustss  *
     29      1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     30      1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     31      1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     32      1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     33      1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     34      1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     35      1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     36      1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     37      1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     38      1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     39      1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     40      1.1  augustss  */
     41      1.1  augustss 
     42      1.4  augustss #ifndef _DEV_PCI_OHCIREG_H_
     43      1.4  augustss #define _DEV_PCI_OHCIREG_H_
     44      1.1  augustss 
     45      1.1  augustss /*** PCI config registers ***/
     46      1.1  augustss 
     47      1.1  augustss #define PCI_CBMEM		0x10	/* configuration base memory */
     48      1.2  augustss 
     49      1.2  augustss #define PCI_INTERFACE_OHCI	0x10
     50      1.1  augustss 
     51      1.1  augustss /*** OHCI registers */
     52      1.1  augustss 
     53      1.1  augustss #define OHCI_REVISION		0x00	/* OHCI revision # */
     54      1.1  augustss #define  OHCI_REV_LO(rev)	((rev)&0xf)
     55      1.1  augustss #define  OHCI_REV_HI(rev)	(((rev)>>4)&0xf)
     56      1.1  augustss #define  OHCI_REV_LEGACY(rev)	((rev) & 0x100)
     57      1.1  augustss 
     58      1.1  augustss #define OHCI_CONTROL		0x04
     59      1.1  augustss #define  OHCI_CBSR_MASK		0x00000003 /* Control/Bulk Service Ratio */
     60      1.1  augustss #define  OHCI_RATIO_1_1		0x00000000
     61      1.1  augustss #define  OHCI_RATIO_1_2		0x00000001
     62      1.1  augustss #define  OHCI_RATIO_1_3		0x00000002
     63      1.1  augustss #define  OHCI_RATIO_1_4		0x00000003
     64      1.1  augustss #define  OHCI_PLE		0x00000004 /* Periodic List Enable */
     65      1.1  augustss #define  OHCI_IE		0x00000008 /* Isochronous Enable */
     66      1.1  augustss #define  OHCI_CLE		0x00000010 /* Control List Enable */
     67      1.1  augustss #define  OHCI_BLE		0x00000020 /* Bulk List Enable */
     68      1.1  augustss #define  OHCI_HCFS_MASK		0x000000c0 /* HostControllerFunctionalState */
     69      1.1  augustss #define  OHCI_HCFS_RESET	0x00000000
     70      1.1  augustss #define  OHCI_HCFS_RESUME	0x00000040
     71      1.1  augustss #define  OHCI_HCFS_OPERATIONAL	0x00000080
     72      1.1  augustss #define  OHCI_HCFS_SUSPEND	0x000000c0
     73      1.1  augustss #define  OHCI_IR		0x00000100 /* Interrupt Routing */
     74      1.1  augustss #define  OHCI_RWC		0x00000200 /* Remote Wakeup Connected */
     75      1.1  augustss #define  OHCI_RWE		0x00000400 /* Remote Wakeup Enabled */
     76      1.1  augustss #define OHCI_COMMAND_STATUS	0x08
     77      1.1  augustss #define  OHCI_HCR		0x00000001 /* Host Controller Reset */
     78      1.1  augustss #define  OHCI_CLF		0x00000002 /* Control List Filled */
     79      1.1  augustss #define  OHCI_BLF		0x00000004 /* Bulk List Filled */
     80      1.1  augustss #define  OHCI_OCR		0x00000008 /* Ownership Change Request */
     81      1.1  augustss #define  OHCI_SOC_MASK		0x00030000 /* Scheduling Overrun Count */
     82      1.1  augustss #define OHCI_INTERRUPT_STATUS	0x0c
     83      1.1  augustss #define  OHCI_SO		0x00000001 /* Scheduling Overrun */
     84      1.1  augustss #define  OHCI_WDH		0x00000002 /* Writeback Done Head */
     85      1.1  augustss #define  OHCI_SF		0x00000004 /* Start of Frame */
     86      1.1  augustss #define  OHCI_RD		0x00000008 /* Resume Detected */
     87      1.1  augustss #define  OHCI_UE		0x00000010 /* Unrecoverable Error */
     88      1.1  augustss #define  OHCI_FNO		0x00000020 /* Frame Number Overflow */
     89      1.1  augustss #define  OHCI_RHSC		0x00000040 /* Root Hub Status Change */
     90      1.1  augustss #define  OHCI_OC		0x40000000 /* Ownership Change */
     91      1.1  augustss #define  OHCI_MIE		0x80000000 /* Master Interrupt Enable */
     92      1.1  augustss #define OHCI_INTERRUPT_ENABLE	0x10
     93      1.1  augustss #define OHCI_INTERRUPT_DISABLE	0x14
     94      1.1  augustss #define OHCI_HCCA		0x18
     95      1.1  augustss #define OHCI_PERIOD_CURRENT_ED	0x1c
     96      1.1  augustss #define OHCI_CONTROL_HEAD_ED	0x20
     97      1.1  augustss #define OHCI_CONTROL_CURRENT_ED	0x24
     98      1.1  augustss #define OHCI_BULK_HEAD_ED	0x28
     99      1.1  augustss #define OHCI_BULK_CURRENT_ED	0x2c
    100      1.1  augustss #define OHCI_DONE_HEAD		0x30
    101      1.1  augustss #define OHCI_FM_INTERVAL	0x34
    102      1.1  augustss #define  OHCI_GET_IVAL(s)	((s) & 0x3fff)
    103      1.1  augustss #define  OHCI_GET_FSMPS(s)	(((s) >> 16) & 0x7fff)
    104      1.1  augustss #define  OHCI_FIT		0x80000000
    105      1.1  augustss #define OHCI_FM_REMAINING	0x38
    106      1.1  augustss #define OHCI_FM_NUMBER		0x3c
    107      1.1  augustss #define OHCI_PERIODIC_START	0x40
    108      1.1  augustss #define OHCI_LS_THRESHOLD	0x44
    109      1.1  augustss #define OHCI_RH_DESCRIPTOR_A	0x48
    110      1.1  augustss #define  OHCI_GET_NDP(s)	((s) & 0xff)
    111      1.3  augustss #define  OHCI_PSM		0x0100     /* Power Switching Mode */
    112      1.3  augustss #define  OHCI_NPS		0x0200	   /* No Power Switching */
    113  1.9.2.1    bouyer #define  OHCI_DT		0x0400     /* Device Type */
    114  1.9.2.1    bouyer #define  OHCI_OCPM		0x0800     /* Overcurrent Protection Mode */
    115  1.9.2.1    bouyer #define  OHCI_NOCP		0x1000     /* No Overcurrent Protection */
    116      1.1  augustss #define  OHCI_GET_POTPGT(s)	((s) >> 24)
    117      1.1  augustss #define OHCI_RH_DESCRIPTOR_B	0x4c
    118      1.1  augustss #define OHCI_RH_STATUS		0x50
    119      1.1  augustss #define  OHCI_LPS		0x00000001 /* Local Power Status */
    120      1.1  augustss #define  OHCI_OCI		0x00000002 /* OverCurrent Indicator */
    121      1.1  augustss #define  OHCI_DRWE		0x00008000 /* Device Remote Wakeup Enable */
    122      1.1  augustss #define  OHCI_LPSC		0x00010000 /* Local Power Status Change */
    123      1.1  augustss #define  OHCI_CCIC		0x00020000 /* OverCurrent Indicator Change */
    124      1.1  augustss #define  OHCI_CRWE		0x80000000 /* Clear Remote Wakeup Enable */
    125      1.1  augustss #define OHCI_RH_PORT_STATUS(n)	(0x50 + (n)*4) /* 1 based indexing */
    126      1.1  augustss 
    127      1.1  augustss #define OHCI_LES (OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE)
    128      1.7  augustss #define OHCI_ALL_INTRS (OHCI_SO | OHCI_WDH | OHCI_SF | OHCI_RD | OHCI_UE | \
    129      1.7  augustss                         OHCI_FNO | OHCI_RHSC | OHCI_OC)
    130      1.1  augustss #define OHCI_NORMAL_INTRS (OHCI_SO | OHCI_WDH | OHCI_RD | OHCI_UE | OHCI_RHSC)
    131      1.1  augustss 
    132      1.1  augustss #define OHCI_FSMPS(i) (((i-210)*6/7) << 16)
    133      1.1  augustss #define OHCI_PERIODIC(i) ((i)*9/10)
    134      1.1  augustss 
    135      1.1  augustss typedef u_int32_t ohci_physaddr_t;
    136      1.1  augustss 
    137      1.1  augustss #define OHCI_NO_INTRS 32
    138      1.1  augustss struct ohci_hcca {
    139      1.1  augustss 	ohci_physaddr_t	hcca_interrupt_table[OHCI_NO_INTRS];
    140      1.1  augustss 	u_int32_t	hcca_frame_number;
    141      1.1  augustss 	ohci_physaddr_t	hcca_done_head;
    142      1.1  augustss #define OHCI_DONE_INTRS 1
    143      1.1  augustss };
    144      1.1  augustss #define OHCI_HCCA_SIZE 256
    145      1.1  augustss #define OHCI_HCCA_ALIGN 256
    146      1.9  augustss 
    147      1.9  augustss #define OHCI_PAGE_SIZE 0x1000
    148      1.9  augustss #define OHCI_PAGE(x) ((x) &~ 0xfff)
    149  1.9.2.1    bouyer #define OHCI_PAGE_OFFSET(x) ((x) & 0xfff)
    150      1.1  augustss 
    151      1.1  augustss typedef struct {
    152      1.1  augustss 	u_int32_t	ed_flags;
    153      1.1  augustss #define OHCI_ED_GET_FA(s)	((s) & 0x7f)
    154      1.1  augustss #define OHCI_ED_ADDRMASK	0x0000007f
    155      1.1  augustss #define OHCI_ED_SET_FA(s)	(s)
    156      1.1  augustss #define OHCI_ED_GET_EN(s)	(((s) >> 7) & 0xf)
    157      1.1  augustss #define OHCI_ED_SET_EN(s)	((s) << 7)
    158      1.1  augustss #define OHCI_ED_DIR_MASK	0x00001800
    159      1.1  augustss #define  OHCI_ED_DIR_TD		0x00000000
    160      1.1  augustss #define  OHCI_ED_DIR_OUT	0x00000800
    161      1.1  augustss #define  OHCI_ED_DIR_IN		0x00001000
    162      1.1  augustss #define OHCI_ED_SPEED		0x00002000
    163      1.1  augustss #define OHCI_ED_SKIP		0x00004000
    164      1.1  augustss #define OHCI_ED_FORMAT_GEN	0x00000000
    165      1.1  augustss #define OHCI_ED_FORMAT_ISO	0x00008000
    166      1.1  augustss #define OHCI_ED_GET_MAXP(s)	(((s) >> 16) & 0x07ff)
    167      1.1  augustss #define OHCI_ED_SET_MAXP(s)	((s) << 16)
    168      1.5  augustss #define OHCI_ED_MAXPMASK	(0x7ff << 16)
    169      1.1  augustss 	ohci_physaddr_t	ed_tailp;
    170      1.1  augustss 	ohci_physaddr_t	ed_headp;
    171  1.9.2.1    bouyer #define OHCI_HALTED		0x00000001
    172  1.9.2.1    bouyer #define OHCI_TOGGLECARRY	0x00000002
    173  1.9.2.1    bouyer #define OHCI_HEADMASK		0xfffffffc
    174      1.1  augustss 	ohci_physaddr_t	ed_nexted;
    175      1.1  augustss } ohci_ed_t;
    176      1.8  augustss /* #define OHCI_ED_SIZE 16 */
    177      1.1  augustss #define OHCI_ED_ALIGN 16
    178      1.1  augustss 
    179      1.1  augustss typedef struct {
    180      1.1  augustss 	u_int32_t	td_flags;
    181      1.1  augustss #define OHCI_TD_R		0x00040000		/* Buffer Rounding  */
    182      1.1  augustss #define OHCI_TD_DP_MASK		0x00180000		/* Direction / PID */
    183      1.1  augustss #define  OHCI_TD_SETUP		0x00000000
    184      1.1  augustss #define  OHCI_TD_OUT		0x00080000
    185      1.1  augustss #define  OHCI_TD_IN		0x00100000
    186      1.1  augustss #define OHCI_TD_GET_DI(x)	(((x) >> 21) & 7)	/* Delay Interrupt */
    187      1.1  augustss #define OHCI_TD_SET_DI(x)	((x) << 21)
    188      1.1  augustss #define  OHCI_TD_NOINTR		0x00e00000
    189  1.9.2.1    bouyer #define  OHCI_TD_INTR_MASK	0x00e00000
    190      1.1  augustss #define OHCI_TD_TOGGLE_CARRY	0x00000000
    191      1.1  augustss #define OHCI_TD_TOGGLE_0	0x02000000
    192      1.1  augustss #define OHCI_TD_TOGGLE_1	0x03000000
    193  1.9.2.1    bouyer #define OHCI_TD_TOGGLE_MASK	0x03000000
    194      1.1  augustss #define OHCI_TD_GET_EC(x)	(((x) >> 26) & 3)	/* Error Count */
    195      1.1  augustss #define OHCI_TD_GET_CC(x)	((x) >> 28)		/* Condition Code */
    196      1.1  augustss #define  OHCI_TD_NOCC		0xf0000000
    197      1.1  augustss 	ohci_physaddr_t	td_cbp;		/* Current Buffer Pointer */
    198      1.1  augustss 	ohci_physaddr_t td_nexttd;	/* Next TD */
    199      1.1  augustss 	ohci_physaddr_t td_be;		/* Buffer End */
    200      1.1  augustss } ohci_td_t;
    201      1.8  augustss /* #define OHCI_TD_SIZE 16 */
    202      1.1  augustss #define OHCI_TD_ALIGN 16
    203      1.1  augustss 
    204  1.9.2.1    bouyer #define OHCI_ITD_NOFFSET 8
    205  1.9.2.1    bouyer typedef struct {
    206  1.9.2.1    bouyer 	u_int32_t	itd_flags;
    207  1.9.2.1    bouyer #define OHCI_ITD_GET_SF(x)	((x) & 0x0000ffff)
    208  1.9.2.1    bouyer #define OHCI_ITD_SET_SF(x)	((x) & 0xffff)
    209  1.9.2.1    bouyer #define OHCI_ITD_GET_DI(x)	(((x) >> 21) & 7)	/* Delay Interrupt */
    210  1.9.2.1    bouyer #define OHCI_ITD_SET_DI(x)	((x) << 21)
    211  1.9.2.1    bouyer #define  OHCI_ITD_NOINTR	0x00e00000
    212  1.9.2.1    bouyer #define OHCI_ITD_GET_FC(x)	((((x) >> 24) & 7)+1)	/* Frame Count */
    213  1.9.2.1    bouyer #define OHCI_ITD_SET_FC(x)	(((x)-1) << 24)
    214  1.9.2.1    bouyer #define OHCI_ITD_GET_CC(x)	((x) >> 28)		/* Condition Code */
    215  1.9.2.1    bouyer #define  OHCI_ITD_NOCC		0xf0000000
    216  1.9.2.1    bouyer 	ohci_physaddr_t	itd_bp0;			/* Buffer Page 0 */
    217  1.9.2.1    bouyer 	ohci_physaddr_t	itd_nextitd;			/* Next ITD */
    218  1.9.2.1    bouyer 	ohci_physaddr_t	itd_be;				/* Buffer End */
    219  1.9.2.1    bouyer 	u_int16_t	itd_offset[OHCI_ITD_NOFFSET];	/* Buffer offsets */
    220  1.9.2.1    bouyer #define itd_pswn itd_offset				/* Packet Status Word*/
    221  1.9.2.1    bouyer #define OHCI_ITD_PAGE_SELECT	0x00001000
    222  1.9.2.1    bouyer #define OHCI_ITD_MK_OFFS(len)	(0xe000 | ((len) & 0x1fff))
    223  1.9.2.1    bouyer #define OHCI_ITD_PSW_LENGTH(x)	((x) & 0xfff)		/* Transfer length */
    224  1.9.2.1    bouyer #define OHCI_ITD_PSW_GET_CC(x)	((x) >> 12)		/* Condition Code */
    225  1.9.2.1    bouyer } ohci_itd_t;
    226  1.9.2.1    bouyer /* #define OHCI_ITD_SIZE 32 */
    227  1.9.2.1    bouyer #define OHCI_ITD_ALIGN 32
    228  1.9.2.1    bouyer 
    229  1.9.2.1    bouyer 
    230      1.1  augustss #define OHCI_CC_NO_ERROR		0
    231      1.1  augustss #define OHCI_CC_CRC			1
    232      1.1  augustss #define OHCI_CC_BIT_STUFFING		2
    233      1.1  augustss #define OHCI_CC_DATA_TOGGLE_MISMATCH	3
    234      1.1  augustss #define OHCI_CC_STALL			4
    235      1.1  augustss #define OHCI_CC_DEVICE_NOT_RESPONDING	5
    236      1.1  augustss #define OHCI_CC_PID_CHECK_FAILURE	6
    237      1.1  augustss #define OHCI_CC_UNEXPECTED_PID		7
    238      1.1  augustss #define OHCI_CC_DATA_OVERRUN		8
    239      1.1  augustss #define OHCI_CC_DATA_UNDERRUN		9
    240      1.1  augustss #define OHCI_CC_BUFFER_OVERRUN		12
    241      1.1  augustss #define OHCI_CC_BUFFER_UNDERRUN		13
    242      1.1  augustss #define OHCI_CC_NOT_ACCESSED		15
    243  1.9.2.1    bouyer 
    244  1.9.2.1    bouyer /* Some delay needed when changing certain registers. */
    245  1.9.2.1    bouyer #define OHCI_ENABLE_POWER_DELAY	5
    246  1.9.2.1    bouyer #define OHCI_READ_DESC_DELAY	5
    247      1.1  augustss 
    248      1.4  augustss #endif /* _DEV_PCI_OHCIREG_H_ */
    249