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ohcivar.h revision 1.53 
      1 /*	$NetBSD: ohcivar.h,v 1.53 2012/06/10 06:15:53 mrg Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Lennart Augustsson (lennart (at) augustsson.net) at
      9  * Carlstedt Research & Technology.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  *
     20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     30  * POSSIBILITY OF SUCH DAMAGE.
     31  */
     32 
     33 typedef struct ohci_soft_ed {
     34 	ohci_ed_t ed;
     35 	struct ohci_soft_ed *next;
     36 	ohci_physaddr_t physaddr;
     37 	usb_dma_t dma;
     38 	int offs;
     39 } ohci_soft_ed_t;
     40 #define OHCI_SED_SIZE ((sizeof (struct ohci_soft_ed) + OHCI_ED_ALIGN - 1) / OHCI_ED_ALIGN * OHCI_ED_ALIGN)
     41 #define OHCI_SED_CHUNK 128
     42 
     43 
     44 typedef struct ohci_soft_td {
     45 	ohci_td_t td;
     46 	struct ohci_soft_td *nexttd; /* mirrors nexttd in TD */
     47 	struct ohci_soft_td *dnext; /* next in done list */
     48 	ohci_physaddr_t physaddr;
     49 	usb_dma_t dma;
     50 	int offs;
     51 	LIST_ENTRY(ohci_soft_td) hnext;
     52 	usbd_xfer_handle xfer;
     53 	u_int16_t len;
     54 	u_int16_t flags;
     55 #define OHCI_CALL_DONE	0x0001
     56 #define OHCI_ADD_LEN	0x0002
     57 } ohci_soft_td_t;
     58 #define OHCI_STD_SIZE ((sizeof (struct ohci_soft_td) + OHCI_TD_ALIGN - 1) / OHCI_TD_ALIGN * OHCI_TD_ALIGN)
     59 #define OHCI_STD_CHUNK 128
     60 
     61 
     62 typedef struct ohci_soft_itd {
     63 	ohci_itd_t itd;
     64 	struct ohci_soft_itd *nextitd; /* mirrors nexttd in ITD */
     65 	struct ohci_soft_itd *dnext; /* next in done list */
     66 	ohci_physaddr_t physaddr;
     67 	usb_dma_t dma;
     68 	int offs;
     69 	LIST_ENTRY(ohci_soft_itd) hnext;
     70 	usbd_xfer_handle xfer;
     71 	u_int16_t flags;
     72 	char isdone;	/* used only when DIAGNOSTIC is defined */
     73 } ohci_soft_itd_t;
     74 #define OHCI_SITD_SIZE ((sizeof (struct ohci_soft_itd) + OHCI_ITD_ALIGN - 1) / OHCI_ITD_ALIGN * OHCI_ITD_ALIGN)
     75 #define OHCI_SITD_CHUNK 64
     76 
     77 
     78 #define OHCI_NO_EDS (2*OHCI_NO_INTRS-1)
     79 
     80 #define OHCI_HASH_SIZE 128
     81 
     82 typedef struct ohci_softc {
     83 	device_t sc_dev;
     84 	struct usbd_bus sc_bus;
     85 	bus_space_tag_t iot;
     86 	bus_space_handle_t ioh;
     87 	bus_size_t sc_size;
     88 
     89 	kmutex_t sc_lock;
     90 	kmutex_t sc_intr_lock;
     91 	void *sc_rhsc_si;
     92 
     93 	usb_dma_t sc_hccadma;
     94 	struct ohci_hcca *sc_hcca;
     95 	ohci_soft_ed_t *sc_eds[OHCI_NO_EDS];
     96 	u_int sc_bws[OHCI_NO_INTRS];
     97 
     98 	u_int32_t sc_eintrs;
     99 	ohci_soft_ed_t *sc_isoc_head;
    100 	ohci_soft_ed_t *sc_ctrl_head;
    101 	ohci_soft_ed_t *sc_bulk_head;
    102 
    103 	LIST_HEAD(, ohci_soft_td)  sc_hash_tds[OHCI_HASH_SIZE];
    104 	LIST_HEAD(, ohci_soft_itd) sc_hash_itds[OHCI_HASH_SIZE];
    105 
    106 	int sc_noport;
    107 	u_int8_t sc_addr;		/* device address */
    108 	u_int8_t sc_conf;		/* device configuration */
    109 
    110 	int sc_endian;
    111 #define	OHCI_LITTLE_ENDIAN	0	/* typical (uninitialized default) */
    112 #define	OHCI_BIG_ENDIAN		1	/* big endian OHCI? never seen it */
    113 #define	OHCI_HOST_ENDIAN	2	/* if OHCI always matches CPU */
    114 
    115 	char sc_softwake;
    116 	kcondvar_t sc_softwake_cv;
    117 
    118 	ohci_soft_ed_t *sc_freeeds;
    119 	ohci_soft_td_t *sc_freetds;
    120 	ohci_soft_itd_t *sc_freeitds;
    121 
    122 	SIMPLEQ_HEAD(, usbd_xfer) sc_free_xfers; /* free xfers */
    123 
    124 	usbd_xfer_handle sc_intrxfer;
    125 
    126 	char sc_vendor[32];
    127 	int sc_id_vendor;
    128 
    129 	u_int32_t sc_control;		/* Preserved during suspend/standby */
    130 	u_int32_t sc_intre;
    131 
    132 	u_int sc_overrun_cnt;
    133 	struct timeval sc_overrun_ntc;
    134 
    135 	struct callout sc_tmo_rhsc;
    136 	device_t sc_child;
    137 	char sc_dying;
    138 	struct usb_dma_reserve sc_dma_reserve;
    139 } ohci_softc_t;
    140 
    141 struct ohci_xfer {
    142 	struct usbd_xfer xfer;
    143 	struct usb_task	abort_task;
    144 };
    145 
    146 usbd_status	ohci_init(ohci_softc_t *);
    147 int		ohci_intr(void *);
    148 int		ohci_detach(ohci_softc_t *, int);
    149 bool		ohci_shutdown(device_t, int);
    150 void		ohci_childdet(device_t, device_t);
    151 int		ohci_activate(device_t, enum devact);
    152 bool		ohci_resume(device_t, const pmf_qual_t *);
    153 bool		ohci_suspend(device_t, const pmf_qual_t *);
    154