ohcivar.h revision 1.61
1 /* $NetBSD: ohcivar.h,v 1.61 2020/03/15 07:56:19 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) at 9 * Carlstedt Research & Technology. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #ifndef _OHCIVAR_H_ 34 #define _OHCIVAR_H_ 35 36 #include <sys/pool.h> 37 38 typedef struct ohci_soft_ed { 39 ohci_ed_t ed; 40 struct ohci_soft_ed *next; 41 ohci_physaddr_t physaddr; 42 usb_dma_t dma; 43 int offs; 44 } ohci_soft_ed_t; 45 #define OHCI_SED_SIZE (roundup(sizeof(struct ohci_soft_ed), OHCI_ED_ALIGN)) 46 #define OHCI_SED_CHUNK 128 47 48 49 typedef struct ohci_soft_td { 50 ohci_td_t td; 51 struct ohci_soft_td *nexttd; /* mirrors nexttd in TD */ 52 struct ohci_soft_td *dnext; /* next in done list */ 53 ohci_physaddr_t physaddr; 54 usb_dma_t dma; 55 int offs; 56 LIST_ENTRY(ohci_soft_td) hnext; /* next on hash list */ 57 struct usbd_xfer *xfer; 58 uint16_t len; 59 uint16_t flags; 60 #define OHCI_CALL_DONE 0x0001 61 #define OHCI_ADD_LEN 0x0002 62 } ohci_soft_td_t; 63 #define OHCI_STD_SIZE (roundup(sizeof(struct ohci_soft_td), OHCI_TD_ALIGN)) 64 #define OHCI_STD_CHUNK 128 65 66 67 typedef struct ohci_soft_itd { 68 ohci_itd_t itd; 69 struct ohci_soft_itd *nextitd; /* mirrors nexttd in ITD */ 70 struct ohci_soft_itd *dnext; /* next in done list */ 71 ohci_physaddr_t physaddr; 72 usb_dma_t dma; 73 int offs; 74 LIST_ENTRY(ohci_soft_itd) hnext;/* next on hash list */ 75 struct usbd_xfer *xfer; 76 uint16_t flags; 77 bool isdone; /* used only when DIAGNOSTIC is defined */ 78 } ohci_soft_itd_t; 79 #define OHCI_SITD_SIZE (roundup(sizeof(struct ohci_soft_itd), OHCI_ITD_ALIGN)) 80 #define OHCI_SITD_CHUNK 64 81 82 83 #define OHCI_NO_EDS (2*OHCI_NO_INTRS-1) 84 85 #define OHCI_HASH_SIZE 128 86 87 typedef struct ohci_softc { 88 device_t sc_dev; 89 struct usbd_bus sc_bus; 90 bus_space_tag_t iot; 91 bus_space_handle_t ioh; 92 bus_size_t sc_size; 93 94 kmutex_t sc_lock; 95 kmutex_t sc_intr_lock; 96 void *sc_rhsc_si; 97 98 usb_dma_t sc_hccadma; 99 struct ohci_hcca *sc_hcca; 100 ohci_soft_ed_t *sc_eds[OHCI_NO_EDS]; 101 u_int sc_bws[OHCI_NO_INTRS]; 102 103 uint32_t sc_eintrs; 104 ohci_soft_ed_t *sc_isoc_head; 105 ohci_soft_ed_t *sc_ctrl_head; 106 ohci_soft_ed_t *sc_bulk_head; 107 108 LIST_HEAD(, ohci_soft_td) sc_hash_tds[OHCI_HASH_SIZE]; 109 LIST_HEAD(, ohci_soft_itd) sc_hash_itds[OHCI_HASH_SIZE]; 110 111 int sc_noport; 112 113 int sc_endian; 114 #define OHCI_LITTLE_ENDIAN 0 /* typical (uninitialized default) */ 115 #define OHCI_BIG_ENDIAN 1 /* big endian OHCI? never seen it */ 116 #define OHCI_HOST_ENDIAN 2 /* if OHCI always matches CPU */ 117 118 int sc_flags; 119 #define OHCIF_SUPERIO 0x0001 120 121 ohci_soft_ed_t *sc_freeeds; 122 ohci_soft_td_t *sc_freetds; 123 ohci_soft_itd_t *sc_freeitds; 124 125 pool_cache_t sc_xferpool; /* free xfer pool */ 126 127 struct usbd_xfer *sc_intrxfer; 128 129 uint32_t sc_control; /* Preserved during suspend/standby */ 130 uint32_t sc_intre; 131 132 u_int sc_overrun_cnt; 133 struct timeval sc_overrun_ntc; 134 135 struct callout sc_tmo_rhsc; 136 device_t sc_child; 137 char sc_dying; 138 } ohci_softc_t; 139 140 struct ohci_xfer { 141 struct usbd_xfer xfer; 142 /* ctrl */ 143 ohci_soft_td_t *ox_setup; 144 ohci_soft_td_t *ox_stat; 145 union { 146 /* ctrl/bulk/intr */ 147 struct { 148 ohci_soft_td_t **ox_stds; 149 size_t ox_nstd; 150 }; 151 /* isoc */ 152 struct { 153 ohci_soft_itd_t **ox_sitds; 154 size_t ox_nsitd; 155 }; 156 }; 157 }; 158 159 #define OHCI_BUS2SC(bus) ((bus)->ub_hcpriv) 160 #define OHCI_PIPE2SC(pipe) OHCI_BUS2SC((pipe)->up_dev->ud_bus) 161 #define OHCI_XFER2SC(xfer) OHCI_BUS2SC((xfer)->ux_bus) 162 163 #define OHCI_XFER2OXFER(xfer) ((struct ohci_xfer *)(xfer)) 164 #define OHCI_PIPE2OPIPE(pipe) ((struct ohci_pipe *)(pipe)) 165 166 int ohci_init(ohci_softc_t *); 167 int ohci_intr(void *); 168 int ohci_detach(ohci_softc_t *, int); 169 bool ohci_shutdown(device_t, int); 170 void ohci_childdet(device_t, device_t); 171 int ohci_activate(device_t, enum devact); 172 bool ohci_resume(device_t, const pmf_qual_t *); 173 bool ohci_suspend(device_t, const pmf_qual_t *); 174 175 #endif /* _OHCIVAR_H_ */ 176
Indexes created Wed Oct 01 07:09:59 GMT 2025