1 1.11 mrg /* $NetBSD: ubsavar.h,v 1.11 2019/05/09 02:43:35 mrg Exp $ */ 2 1.1 ichiro /*- 3 1.1 ichiro * Copyright (c) 2002, Alexander Kabaev <kan.FreeBSD.org>. 4 1.1 ichiro * All rights reserved. 5 1.1 ichiro * 6 1.1 ichiro * Redistribution and use in source and binary forms, with or without 7 1.1 ichiro * modification, are permitted provided that the following conditions 8 1.1 ichiro * are met: 9 1.1 ichiro * 1. Redistributions of source code must retain the above copyright 10 1.1 ichiro * notice, this list of conditions and the following disclaimer. 11 1.1 ichiro * 2. Redistributions in binary form must reproduce the above copyright 12 1.1 ichiro * notice, this list of conditions and the following disclaimer in the 13 1.1 ichiro * documentation and/or other materials provided with the distribution. 14 1.1 ichiro * 15 1.1 ichiro * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 1.1 ichiro * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 1.1 ichiro * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 1.1 ichiro * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 1.1 ichiro * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 1.1 ichiro * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 1.1 ichiro * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 1.1 ichiro * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 1.1 ichiro * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 1.1 ichiro * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 1.1 ichiro * SUCH DAMAGE. 26 1.1 ichiro */ 27 1.1 ichiro /* 28 1.1 ichiro * Copyright (c) 2001 The NetBSD Foundation, Inc. 29 1.1 ichiro * All rights reserved. 30 1.1 ichiro * 31 1.1 ichiro * This code is derived from software contributed to The NetBSD Foundation 32 1.1 ichiro * by Ichiro FUKUHARA (ichiro (at) ichiro.org). 33 1.1 ichiro * 34 1.1 ichiro * Redistribution and use in source and binary forms, with or without 35 1.1 ichiro * modification, are permitted provided that the following conditions 36 1.1 ichiro * are met: 37 1.1 ichiro * 1. Redistributions of source code must retain the above copyright 38 1.1 ichiro * notice, this list of conditions and the following disclaimer. 39 1.1 ichiro * 2. Redistributions in binary form must reproduce the above copyright 40 1.1 ichiro * notice, this list of conditions and the following disclaimer in the 41 1.1 ichiro * documentation and/or other materials provided with the distribution. 42 1.1 ichiro * 43 1.1 ichiro * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 44 1.1 ichiro * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 45 1.1 ichiro * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 46 1.1 ichiro * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 47 1.1 ichiro * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 48 1.1 ichiro * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 49 1.1 ichiro * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 50 1.1 ichiro * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 51 1.1 ichiro * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 52 1.1 ichiro * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 53 1.1 ichiro * POSSIBILITY OF SUCH DAMAGE. 54 1.1 ichiro */ 55 1.1 ichiro 56 1.1 ichiro #define UBSA_MODVER 1 /* module version */ 57 1.1 ichiro 58 1.6 drochner #define UBSA_DEFAULT_CONFIG_INDEX 0 59 1.1 ichiro #define UBSA_IFACE_INDEX_OFFSET 0 60 1.1 ichiro 61 1.1 ichiro #define UBSA_INTR_INTERVAL 100 /* ms */ 62 1.1 ichiro 63 1.1 ichiro #define UBSA_SET_BAUDRATE 0x00 64 1.1 ichiro #define UBSA_SET_STOP_BITS 0x01 65 1.1 ichiro #define UBSA_SET_DATA_BITS 0x02 66 1.1 ichiro #define UBSA_SET_PARITY 0x03 67 1.1 ichiro #define UBSA_SET_DTR 0x0A 68 1.1 ichiro #define UBSA_SET_RTS 0x0B 69 1.1 ichiro #define UBSA_SET_BREAK 0x0C 70 1.1 ichiro #define UBSA_SET_FLOW_CTRL 0x10 71 1.1 ichiro 72 1.1 ichiro #define UBSA_QUADUMTS_SET_PIN 0x22 73 1.1 ichiro 74 1.1 ichiro #define UBSA_PARITY_NONE 0x00 75 1.1 ichiro #define UBSA_PARITY_EVEN 0x01 76 1.1 ichiro #define UBSA_PARITY_ODD 0x02 77 1.1 ichiro #define UBSA_PARITY_MARK 0x03 78 1.1 ichiro #define UBSA_PARITY_SPACE 0x04 79 1.1 ichiro 80 1.1 ichiro #define UBSA_FLOW_NONE 0x0000 81 1.1 ichiro #define UBSA_FLOW_OCTS 0x0001 82 1.1 ichiro #define UBSA_FLOW_ODSR 0x0002 83 1.1 ichiro #define UBSA_FLOW_IDSR 0x0004 84 1.1 ichiro #define UBSA_FLOW_IDTR 0x0008 85 1.1 ichiro #define UBSA_FLOW_IRTS 0x0010 86 1.1 ichiro #define UBSA_FLOW_ORTS 0x0020 87 1.1 ichiro #define UBSA_FLOW_UNKNOWN 0x0040 88 1.1 ichiro #define UBSA_FLOW_OXON 0x0080 89 1.1 ichiro #define UBSA_FLOW_IXON 0x0100 90 1.1 ichiro 91 1.1 ichiro /* line status register */ 92 1.1 ichiro #define UBSA_LSR_TSRE 0x40 /* Transmitter empty: byte sent */ 93 1.1 ichiro #define UBSA_LSR_TXRDY 0x20 /* Transmitter buffer empty */ 94 1.1 ichiro #define UBSA_LSR_BI 0x10 /* Break detected */ 95 1.1 ichiro #define UBSA_LSR_FE 0x08 /* Framing error: bad stop bit */ 96 1.1 ichiro #define UBSA_LSR_PE 0x04 /* Parity error */ 97 1.1 ichiro #define UBSA_LSR_OE 0x02 /* Overrun, lost incoming byte */ 98 1.1 ichiro #define UBSA_LSR_RXRDY 0x01 /* Byte ready in Receive Buffer */ 99 1.1 ichiro #define UBSA_LSR_RCV_MASK 0x1f /* Mask for incoming data or error */ 100 1.1 ichiro 101 1.1 ichiro /* modem status register */ 102 1.1 ichiro /* All deltas are from the last read of the MSR. */ 103 1.1 ichiro #define UBSA_MSR_DCD 0x80 /* Current Data Carrier Detect */ 104 1.1 ichiro #define UBSA_MSR_RI 0x40 /* Current Ring Indicator */ 105 1.1 ichiro #define UBSA_MSR_DSR 0x20 /* Current Data Set Ready */ 106 1.1 ichiro #define UBSA_MSR_CTS 0x10 /* Current Clear to Send */ 107 1.1 ichiro #define UBSA_MSR_DDCD 0x08 /* DCD has changed state */ 108 1.1 ichiro #define UBSA_MSR_TERI 0x04 /* RI has toggled low to high */ 109 1.1 ichiro #define UBSA_MSR_DDSR 0x02 /* DSR has changed state */ 110 1.1 ichiro #define UBSA_MSR_DCTS 0x01 /* CTS has changed state */ 111 1.1 ichiro 112 1.1 ichiro #define UBSA_MAXCONN 3 113 1.1 ichiro 114 1.1 ichiro struct ubsa_softc { 115 1.7 dyoung device_t sc_dev; /* base device */ 116 1.10 skrll struct usbd_device * sc_udev; /* USB device */ 117 1.10 skrll struct usbd_interface * sc_iface[UBSA_MAXCONN]; /* interface */ 118 1.1 ichiro 119 1.1 ichiro int sc_iface_number[UBSA_MAXCONN]; /* interface number */ 120 1.1 ichiro int sc_config_index; /* USB CONFIG_INDEX */ 121 1.1 ichiro 122 1.1 ichiro int sc_intr_number; /* interrupt number */ 123 1.10 skrll struct usbd_pipe * sc_intr_pipe; /* interrupt pipe */ 124 1.1 ichiro u_char *sc_intr_buf; /* interrupt buffer */ 125 1.1 ichiro int sc_isize; 126 1.1 ichiro 127 1.1 ichiro u_char sc_dtr; /* current DTR state */ 128 1.1 ichiro u_char sc_rts; /* current RTS state */ 129 1.1 ichiro 130 1.1 ichiro u_char sc_lsr; /* Local status register */ 131 1.1 ichiro u_char sc_msr; /* ubsa status register */ 132 1.1 ichiro 133 1.5 cube device_t sc_subdevs[UBSA_MAXCONN]; /* ucom device */ 134 1.1 ichiro int sc_numif; /* number of interfaces */ 135 1.1 ichiro 136 1.11 mrg bool sc_dying; /* disconnecting */ 137 1.1 ichiro u_char sc_quadumts; 138 1.10 skrll uint16_t sc_devflags; 139 1.1 ichiro }; 140 1.1 ichiro 141 1.1 ichiro 142 1.10 skrll void ubsa_intr(struct usbd_xfer *, void *, usbd_status); 143 1.1 ichiro 144 1.2 ichiro void ubsa_get_status(void *, int, u_char *, u_char *); 145 1.2 ichiro void ubsa_set(void *, int, int, int); 146 1.2 ichiro int ubsa_param(void *, int, struct termios *); 147 1.2 ichiro int ubsa_open(void *, int); 148 1.2 ichiro void ubsa_close(void *, int); 149 1.11 mrg void ubsa_close_pipe(struct ubsa_softc *); 150 1.2 ichiro 151 1.10 skrll void ubsa_break(struct ubsa_softc *, int, int); 152 1.10 skrll int ubsa_request(struct ubsa_softc *, int, uint8_t, uint16_t); 153 1.2 ichiro void ubsa_dtr(struct ubsa_softc *, int, int); 154 1.2 ichiro void ubsa_quadumts_dtr(struct ubsa_softc *, int, int); 155 1.2 ichiro void ubsa_rts(struct ubsa_softc *, int, int); 156 1.2 ichiro void ubsa_quadumts_rts(struct ubsa_softc *, int, int); 157 1.2 ichiro void ubsa_baudrate(struct ubsa_softc *, int, speed_t); 158 1.2 ichiro void ubsa_parity(struct ubsa_softc *, int, tcflag_t); 159 1.2 ichiro void ubsa_databits(struct ubsa_softc *, int, tcflag_t); 160 1.2 ichiro void ubsa_stopbits(struct ubsa_softc *, int, tcflag_t); 161 1.2 ichiro void ubsa_flow(struct ubsa_softc *, int, tcflag_t, tcflag_t); 162