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uhci.c revision 1.133.2.11
      1  1.133.2.11   nathanw /*	$NetBSD: uhci.c,v 1.133.2.11 2002/08/01 02:45:57 nathanw Exp $	*/
      2        1.67  augustss /*	$FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $	*/
      3         1.1  augustss 
      4         1.1  augustss /*
      5         1.1  augustss  * Copyright (c) 1998 The NetBSD Foundation, Inc.
      6         1.1  augustss  * All rights reserved.
      7         1.1  augustss  *
      8        1.11  augustss  * This code is derived from software contributed to The NetBSD Foundation
      9       1.113  augustss  * by Lennart Augustsson (lennart (at) augustsson.net) at
     10        1.11  augustss  * Carlstedt Research & Technology.
     11         1.1  augustss  *
     12         1.1  augustss  * Redistribution and use in source and binary forms, with or without
     13         1.1  augustss  * modification, are permitted provided that the following conditions
     14         1.1  augustss  * are met:
     15         1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     16         1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     17         1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     18         1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     19         1.1  augustss  *    documentation and/or other materials provided with the distribution.
     20         1.1  augustss  * 3. All advertising materials mentioning features or use of this software
     21         1.1  augustss  *    must display the following acknowledgement:
     22         1.1  augustss  *        This product includes software developed by the NetBSD
     23         1.1  augustss  *        Foundation, Inc. and its contributors.
     24         1.1  augustss  * 4. Neither the name of The NetBSD Foundation nor the names of its
     25         1.1  augustss  *    contributors may be used to endorse or promote products derived
     26         1.1  augustss  *    from this software without specific prior written permission.
     27         1.1  augustss  *
     28         1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     29         1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     30         1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     31         1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     32         1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     33         1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     34         1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     35         1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     36         1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     37         1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     38         1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     39         1.1  augustss  */
     40         1.1  augustss 
     41         1.1  augustss /*
     42         1.1  augustss  * USB Universal Host Controller driver.
     43        1.28  augustss  * Handles e.g. PIIX3 and PIIX4.
     44         1.1  augustss  *
     45       1.131  augustss  * UHCI spec: http://developer.intel.com/design/USB/UHCI11D.htm
     46       1.131  augustss  * USB spec: http://www.usb.org/developers/data/usbspec.zip
     47        1.71  augustss  * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
     48        1.71  augustss  *             ftp://download.intel.com/design/intarch/datashts/29056201.pdf
     49         1.1  augustss  */
     50         1.1  augustss 
     51   1.133.2.4   nathanw #include <sys/cdefs.h>
     52  1.133.2.11   nathanw __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.133.2.11 2002/08/01 02:45:57 nathanw Exp $");
     53   1.133.2.4   nathanw 
     54         1.1  augustss #include <sys/param.h>
     55         1.1  augustss #include <sys/systm.h>
     56         1.1  augustss #include <sys/kernel.h>
     57         1.1  augustss #include <sys/malloc.h>
     58        1.37  augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
     59         1.1  augustss #include <sys/device.h>
     60        1.67  augustss #include <sys/select.h>
     61        1.13  augustss #elif defined(__FreeBSD__)
     62        1.13  augustss #include <sys/module.h>
     63        1.13  augustss #include <sys/bus.h>
     64        1.67  augustss #include <machine/bus_pio.h>
     65        1.67  augustss #if defined(DIAGNOSTIC) && defined(__i386__)
     66        1.67  augustss #include <machine/cpu.h>
     67        1.67  augustss #endif
     68        1.13  augustss #endif
     69         1.1  augustss #include <sys/proc.h>
     70         1.1  augustss #include <sys/queue.h>
     71         1.1  augustss 
     72         1.7  augustss #include <machine/bus.h>
     73        1.39  augustss #include <machine/endian.h>
     74         1.7  augustss 
     75         1.1  augustss #include <dev/usb/usb.h>
     76         1.1  augustss #include <dev/usb/usbdi.h>
     77         1.1  augustss #include <dev/usb/usbdivar.h>
     78         1.7  augustss #include <dev/usb/usb_mem.h>
     79         1.1  augustss #include <dev/usb/usb_quirks.h>
     80         1.1  augustss 
     81         1.1  augustss #include <dev/usb/uhcireg.h>
     82         1.1  augustss #include <dev/usb/uhcivar.h>
     83         1.1  augustss 
     84       1.125  augustss /* Use bandwidth reclamation for control transfers. Some devices choke on it. */
     85       1.125  augustss /*#define UHCI_CTL_LOOP */
     86       1.125  augustss 
     87        1.13  augustss #if defined(__FreeBSD__)
     88        1.13  augustss #include <machine/clock.h>
     89        1.13  augustss 
     90        1.13  augustss #define delay(d)		DELAY(d)
     91        1.13  augustss #endif
     92        1.13  augustss 
     93         1.1  augustss #define MS_TO_TICKS(ms) ((ms) * hz / 1000)
     94         1.1  augustss 
     95        1.37  augustss #if defined(__OpenBSD__)
     96        1.37  augustss struct cfdriver uhci_cd = {
     97        1.37  augustss 	NULL, "uhci", DV_DULL
     98        1.37  augustss };
     99        1.37  augustss #endif
    100        1.37  augustss 
    101        1.67  augustss #ifdef UHCI_DEBUG
    102        1.92  augustss uhci_softc_t *thesc;
    103        1.59  augustss #define DPRINTF(x)	if (uhcidebug) printf x
    104        1.59  augustss #define DPRINTFN(n,x)	if (uhcidebug>(n)) printf x
    105        1.67  augustss int uhcidebug = 0;
    106       1.125  augustss int uhcinoloop = 0;
    107       1.122        tv #ifndef __NetBSD__
    108       1.122        tv #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
    109       1.122        tv #endif
    110        1.59  augustss #else
    111        1.59  augustss #define DPRINTF(x)
    112        1.59  augustss #define DPRINTFN(n,x)
    113        1.59  augustss #endif
    114        1.59  augustss 
    115        1.39  augustss /*
    116        1.39  augustss  * The UHCI controller is little endian, so on big endian machines
    117        1.39  augustss  * the data strored in memory needs to be swapped.
    118        1.39  augustss  */
    119       1.107  augustss #if defined(__FreeBSD__) || defined(__OpenBSD__)
    120        1.39  augustss #if BYTE_ORDER == BIG_ENDIAN
    121        1.88   tsutsui #define htole32(x) (bswap32(x))
    122        1.88   tsutsui #define le32toh(x) (bswap32(x))
    123        1.39  augustss #else
    124        1.88   tsutsui #define htole32(x) (x)
    125        1.88   tsutsui #define le32toh(x) (x)
    126        1.88   tsutsui #endif
    127        1.39  augustss #endif
    128        1.39  augustss 
    129         1.1  augustss struct uhci_pipe {
    130         1.1  augustss 	struct usbd_pipe pipe;
    131        1.32  augustss 	int nexttoggle;
    132        1.92  augustss 
    133        1.92  augustss 	u_char aborting;
    134        1.92  augustss 	usbd_xfer_handle abortstart, abortend;
    135        1.92  augustss 
    136         1.1  augustss 	/* Info needed for different pipe kinds. */
    137         1.1  augustss 	union {
    138         1.1  augustss 		/* Control pipe */
    139         1.1  augustss 		struct {
    140         1.1  augustss 			uhci_soft_qh_t *sqh;
    141         1.7  augustss 			usb_dma_t reqdma;
    142        1.16  augustss 			uhci_soft_td_t *setup, *stat;
    143         1.1  augustss 			u_int length;
    144         1.1  augustss 		} ctl;
    145         1.1  augustss 		/* Interrupt pipe */
    146         1.1  augustss 		struct {
    147         1.1  augustss 			int npoll;
    148         1.1  augustss 			uhci_soft_qh_t **qhs;
    149         1.1  augustss 		} intr;
    150         1.1  augustss 		/* Bulk pipe */
    151         1.1  augustss 		struct {
    152         1.1  augustss 			uhci_soft_qh_t *sqh;
    153         1.1  augustss 			u_int length;
    154         1.1  augustss 			int isread;
    155         1.1  augustss 		} bulk;
    156        1.16  augustss 		/* Iso pipe */
    157        1.16  augustss 		struct iso {
    158        1.16  augustss 			uhci_soft_td_t **stds;
    159        1.48  augustss 			int next, inuse;
    160        1.16  augustss 		} iso;
    161         1.1  augustss 	} u;
    162         1.1  augustss };
    163         1.1  augustss 
    164   1.133.2.4   nathanw Static void		uhci_globalreset(uhci_softc_t *);
    165   1.133.2.4   nathanw Static void		uhci_reset(uhci_softc_t *);
    166       1.119  augustss Static void		uhci_shutdown(void *v);
    167       1.119  augustss Static void		uhci_power(int, void *);
    168       1.119  augustss Static usbd_status	uhci_run(uhci_softc_t *, int run);
    169       1.123  augustss Static uhci_soft_td_t  *uhci_alloc_std(uhci_softc_t *);
    170       1.119  augustss Static void		uhci_free_std(uhci_softc_t *, uhci_soft_td_t *);
    171       1.123  augustss Static uhci_soft_qh_t  *uhci_alloc_sqh(uhci_softc_t *);
    172       1.119  augustss Static void		uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *);
    173        1.16  augustss #if 0
    174       1.119  augustss Static void		uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *,
    175       1.119  augustss 					 uhci_intr_info_t *);
    176       1.119  augustss Static void		uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *);
    177        1.16  augustss #endif
    178         1.1  augustss 
    179   1.133.2.6   nathanw Static void		uhci_free_std_chain(uhci_softc_t *,
    180       1.119  augustss 					    uhci_soft_td_t *, uhci_soft_td_t *);
    181       1.119  augustss Static usbd_status	uhci_alloc_std_chain(struct uhci_pipe *,
    182   1.133.2.6   nathanw 			    uhci_softc_t *, int, int, u_int16_t, usb_dma_t *,
    183       1.119  augustss 			    uhci_soft_td_t **, uhci_soft_td_t **);
    184       1.119  augustss Static void		uhci_poll_hub(void *);
    185       1.119  augustss Static void		uhci_waitintr(uhci_softc_t *, usbd_xfer_handle);
    186       1.119  augustss Static void		uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *);
    187       1.119  augustss Static void		uhci_idone(uhci_intr_info_t *);
    188       1.119  augustss 
    189       1.119  augustss Static void		uhci_abort_xfer(usbd_xfer_handle, usbd_status status);
    190       1.119  augustss 
    191       1.119  augustss Static void		uhci_timeout(void *);
    192   1.133.2.6   nathanw Static void		uhci_timeout_task(void *);
    193       1.123  augustss Static void		uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
    194       1.123  augustss Static void		uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
    195       1.119  augustss Static void		uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *);
    196       1.123  augustss Static void		uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
    197       1.123  augustss Static void		uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
    198       1.119  augustss Static void		uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *);
    199       1.119  augustss Static int		uhci_str(usb_string_descriptor_t *, int, char *);
    200       1.123  augustss Static void		uhci_add_loop(uhci_softc_t *sc);
    201       1.123  augustss Static void		uhci_rem_loop(uhci_softc_t *sc);
    202       1.119  augustss 
    203       1.119  augustss Static usbd_status	uhci_setup_isoc(usbd_pipe_handle pipe);
    204       1.119  augustss Static void		uhci_device_isoc_enter(usbd_xfer_handle);
    205       1.119  augustss 
    206       1.119  augustss Static usbd_status	uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
    207       1.119  augustss Static void		uhci_freem(struct usbd_bus *, usb_dma_t *);
    208       1.119  augustss 
    209       1.119  augustss Static usbd_xfer_handle	uhci_allocx(struct usbd_bus *);
    210       1.119  augustss Static void		uhci_freex(struct usbd_bus *, usbd_xfer_handle);
    211       1.119  augustss 
    212       1.119  augustss Static usbd_status	uhci_device_ctrl_transfer(usbd_xfer_handle);
    213       1.119  augustss Static usbd_status	uhci_device_ctrl_start(usbd_xfer_handle);
    214       1.119  augustss Static void		uhci_device_ctrl_abort(usbd_xfer_handle);
    215       1.119  augustss Static void		uhci_device_ctrl_close(usbd_pipe_handle);
    216       1.119  augustss Static void		uhci_device_ctrl_done(usbd_xfer_handle);
    217       1.119  augustss 
    218       1.119  augustss Static usbd_status	uhci_device_intr_transfer(usbd_xfer_handle);
    219       1.119  augustss Static usbd_status	uhci_device_intr_start(usbd_xfer_handle);
    220       1.119  augustss Static void		uhci_device_intr_abort(usbd_xfer_handle);
    221       1.119  augustss Static void		uhci_device_intr_close(usbd_pipe_handle);
    222       1.119  augustss Static void		uhci_device_intr_done(usbd_xfer_handle);
    223       1.119  augustss 
    224       1.119  augustss Static usbd_status	uhci_device_bulk_transfer(usbd_xfer_handle);
    225       1.119  augustss Static usbd_status	uhci_device_bulk_start(usbd_xfer_handle);
    226       1.119  augustss Static void		uhci_device_bulk_abort(usbd_xfer_handle);
    227       1.119  augustss Static void		uhci_device_bulk_close(usbd_pipe_handle);
    228       1.119  augustss Static void		uhci_device_bulk_done(usbd_xfer_handle);
    229       1.119  augustss 
    230       1.119  augustss Static usbd_status	uhci_device_isoc_transfer(usbd_xfer_handle);
    231       1.119  augustss Static usbd_status	uhci_device_isoc_start(usbd_xfer_handle);
    232       1.119  augustss Static void		uhci_device_isoc_abort(usbd_xfer_handle);
    233       1.119  augustss Static void		uhci_device_isoc_close(usbd_pipe_handle);
    234       1.119  augustss Static void		uhci_device_isoc_done(usbd_xfer_handle);
    235       1.119  augustss 
    236       1.119  augustss Static usbd_status	uhci_root_ctrl_transfer(usbd_xfer_handle);
    237       1.119  augustss Static usbd_status	uhci_root_ctrl_start(usbd_xfer_handle);
    238       1.119  augustss Static void		uhci_root_ctrl_abort(usbd_xfer_handle);
    239       1.119  augustss Static void		uhci_root_ctrl_close(usbd_pipe_handle);
    240       1.119  augustss Static void		uhci_root_ctrl_done(usbd_xfer_handle);
    241       1.119  augustss 
    242       1.119  augustss Static usbd_status	uhci_root_intr_transfer(usbd_xfer_handle);
    243       1.119  augustss Static usbd_status	uhci_root_intr_start(usbd_xfer_handle);
    244       1.119  augustss Static void		uhci_root_intr_abort(usbd_xfer_handle);
    245       1.119  augustss Static void		uhci_root_intr_close(usbd_pipe_handle);
    246       1.119  augustss Static void		uhci_root_intr_done(usbd_xfer_handle);
    247       1.119  augustss 
    248       1.119  augustss Static usbd_status	uhci_open(usbd_pipe_handle);
    249       1.119  augustss Static void		uhci_poll(struct usbd_bus *);
    250       1.133  augustss Static void		uhci_softintr(void *);
    251       1.119  augustss 
    252       1.119  augustss Static usbd_status	uhci_device_request(usbd_xfer_handle xfer);
    253       1.119  augustss 
    254       1.119  augustss Static void		uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *);
    255   1.133.2.7   nathanw Static void		uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *);
    256   1.133.2.6   nathanw Static usbd_status	uhci_device_setintr(uhci_softc_t *sc,
    257       1.119  augustss 			    struct uhci_pipe *pipe, int ival);
    258       1.119  augustss 
    259       1.119  augustss Static void		uhci_device_clear_toggle(usbd_pipe_handle pipe);
    260       1.119  augustss Static void		uhci_noop(usbd_pipe_handle pipe);
    261       1.119  augustss 
    262       1.119  augustss Static __inline__ uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *,
    263       1.119  augustss 						    uhci_soft_qh_t *);
    264       1.119  augustss 
    265       1.119  augustss #ifdef UHCI_DEBUG
    266       1.119  augustss Static void		uhci_dump_all(uhci_softc_t *);
    267       1.119  augustss Static void		uhci_dumpregs(uhci_softc_t *);
    268       1.119  augustss Static void		uhci_dump_qhs(uhci_soft_qh_t *);
    269       1.119  augustss Static void		uhci_dump_qh(uhci_soft_qh_t *);
    270       1.119  augustss Static void		uhci_dump_tds(uhci_soft_td_t *);
    271       1.119  augustss Static void		uhci_dump_td(uhci_soft_td_t *);
    272       1.119  augustss Static void		uhci_dump_ii(uhci_intr_info_t *ii);
    273       1.119  augustss void			uhci_dump(void);
    274         1.1  augustss #endif
    275         1.1  augustss 
    276       1.112  augustss #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
    277       1.112  augustss 			BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
    278       1.112  augustss #define UWRITE1(sc, r, x) \
    279       1.112  augustss  do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
    280       1.112  augustss #define UWRITE2(sc, r, x) \
    281       1.112  augustss  do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
    282       1.112  augustss #define UWRITE4(sc, r, x) \
    283       1.112  augustss  do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
    284       1.112  augustss #define UREAD1(sc, r) (UBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r)))
    285       1.112  augustss #define UREAD2(sc, r) (UBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r)))
    286       1.112  augustss #define UREAD4(sc, r) (UBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r)))
    287         1.1  augustss 
    288         1.1  augustss #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
    289         1.1  augustss #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
    290         1.1  augustss 
    291   1.133.2.4   nathanw #define UHCI_RESET_TIMEOUT 100	/* ms, reset timeout */
    292         1.1  augustss 
    293         1.1  augustss #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
    294         1.1  augustss 
    295         1.1  augustss #define UHCI_INTR_ENDPT 1
    296         1.1  augustss 
    297        1.48  augustss struct usbd_bus_methods uhci_bus_methods = {
    298        1.48  augustss 	uhci_open,
    299        1.85  augustss 	uhci_softintr,
    300        1.48  augustss 	uhci_poll,
    301        1.48  augustss 	uhci_allocm,
    302        1.48  augustss 	uhci_freem,
    303        1.76  augustss 	uhci_allocx,
    304        1.76  augustss 	uhci_freex,
    305        1.48  augustss };
    306        1.48  augustss 
    307   1.133.2.6   nathanw struct usbd_pipe_methods uhci_root_ctrl_methods = {
    308         1.1  augustss 	uhci_root_ctrl_transfer,
    309        1.16  augustss 	uhci_root_ctrl_start,
    310         1.1  augustss 	uhci_root_ctrl_abort,
    311         1.1  augustss 	uhci_root_ctrl_close,
    312        1.38  augustss 	uhci_noop,
    313        1.84  augustss 	uhci_root_ctrl_done,
    314         1.1  augustss };
    315         1.1  augustss 
    316   1.133.2.6   nathanw struct usbd_pipe_methods uhci_root_intr_methods = {
    317         1.1  augustss 	uhci_root_intr_transfer,
    318        1.16  augustss 	uhci_root_intr_start,
    319         1.1  augustss 	uhci_root_intr_abort,
    320         1.1  augustss 	uhci_root_intr_close,
    321        1.38  augustss 	uhci_noop,
    322        1.41  augustss 	uhci_root_intr_done,
    323         1.1  augustss };
    324         1.1  augustss 
    325        1.48  augustss struct usbd_pipe_methods uhci_device_ctrl_methods = {
    326         1.1  augustss 	uhci_device_ctrl_transfer,
    327        1.16  augustss 	uhci_device_ctrl_start,
    328         1.1  augustss 	uhci_device_ctrl_abort,
    329         1.1  augustss 	uhci_device_ctrl_close,
    330        1.38  augustss 	uhci_noop,
    331        1.41  augustss 	uhci_device_ctrl_done,
    332         1.1  augustss };
    333         1.1  augustss 
    334        1.48  augustss struct usbd_pipe_methods uhci_device_intr_methods = {
    335         1.1  augustss 	uhci_device_intr_transfer,
    336        1.16  augustss 	uhci_device_intr_start,
    337         1.1  augustss 	uhci_device_intr_abort,
    338         1.1  augustss 	uhci_device_intr_close,
    339        1.38  augustss 	uhci_device_clear_toggle,
    340        1.41  augustss 	uhci_device_intr_done,
    341         1.1  augustss };
    342         1.1  augustss 
    343        1.48  augustss struct usbd_pipe_methods uhci_device_bulk_methods = {
    344         1.1  augustss 	uhci_device_bulk_transfer,
    345        1.16  augustss 	uhci_device_bulk_start,
    346         1.1  augustss 	uhci_device_bulk_abort,
    347         1.1  augustss 	uhci_device_bulk_close,
    348        1.38  augustss 	uhci_device_clear_toggle,
    349        1.41  augustss 	uhci_device_bulk_done,
    350         1.1  augustss };
    351         1.1  augustss 
    352        1.48  augustss struct usbd_pipe_methods uhci_device_isoc_methods = {
    353        1.16  augustss 	uhci_device_isoc_transfer,
    354        1.16  augustss 	uhci_device_isoc_start,
    355        1.16  augustss 	uhci_device_isoc_abort,
    356        1.16  augustss 	uhci_device_isoc_close,
    357        1.38  augustss 	uhci_noop,
    358        1.41  augustss 	uhci_device_isoc_done,
    359        1.16  augustss };
    360        1.16  augustss 
    361        1.92  augustss #define uhci_add_intr_info(sc, ii) \
    362        1.92  augustss 	LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list);
    363        1.92  augustss #define uhci_del_intr_info(ii) \
    364        1.92  augustss 	LIST_REMOVE((ii), list)
    365        1.92  augustss 
    366       1.101  augustss Static __inline__ uhci_soft_qh_t *
    367       1.119  augustss uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh)
    368        1.92  augustss {
    369        1.92  augustss 	DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh));
    370        1.92  augustss 
    371        1.92  augustss 	for (; pqh->hlink != sqh; pqh = pqh->hlink) {
    372   1.133.2.6   nathanw #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG)
    373        1.92  augustss 		if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) {
    374       1.102  augustss 			printf("uhci_find_prev_qh: QH not found\n");
    375        1.92  augustss 			return (NULL);
    376        1.92  augustss 		}
    377        1.92  augustss #endif
    378        1.92  augustss 	}
    379        1.92  augustss 	return (pqh);
    380        1.92  augustss }
    381        1.92  augustss 
    382         1.1  augustss void
    383   1.133.2.4   nathanw uhci_globalreset(uhci_softc_t *sc)
    384         1.1  augustss {
    385         1.1  augustss 	UHCICMD(sc, UHCI_CMD_GRESET);	/* global reset */
    386        1.20  augustss 	usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
    387         1.1  augustss 	UHCICMD(sc, 0);			/* do nothing */
    388         1.1  augustss }
    389         1.1  augustss 
    390         1.1  augustss usbd_status
    391       1.119  augustss uhci_init(uhci_softc_t *sc)
    392         1.1  augustss {
    393        1.63  augustss 	usbd_status err;
    394         1.1  augustss 	int i, j;
    395       1.123  augustss 	uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh;
    396         1.1  augustss 	uhci_soft_td_t *std;
    397         1.1  augustss 
    398         1.1  augustss 	DPRINTFN(1,("uhci_init: start\n"));
    399         1.1  augustss 
    400        1.67  augustss #ifdef UHCI_DEBUG
    401        1.92  augustss 	thesc = sc;
    402        1.92  augustss 
    403         1.1  augustss 	if (uhcidebug > 2)
    404         1.1  augustss 		uhci_dumpregs(sc);
    405         1.1  augustss #endif
    406         1.1  augustss 
    407         1.1  augustss 	UWRITE2(sc, UHCI_INTR, 0);		/* disable interrupts */
    408   1.133.2.4   nathanw 	uhci_globalreset(sc);			/* reset the controller */
    409   1.133.2.4   nathanw 	uhci_reset(sc);
    410        1.24  augustss 
    411         1.1  augustss 	/* Allocate and initialize real frame array. */
    412   1.133.2.6   nathanw 	err = usb_allocmem(&sc->sc_bus,
    413        1.63  augustss 		  UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
    414        1.63  augustss 		  UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
    415        1.63  augustss 	if (err)
    416        1.63  augustss 		return (err);
    417   1.133.2.8   nathanw 	sc->sc_pframes = KERNADDR(&sc->sc_dma, 0);
    418         1.1  augustss 	UWRITE2(sc, UHCI_FRNUM, 0);		/* set frame number to 0 */
    419   1.133.2.8   nathanw 	UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/
    420         1.1  augustss 
    421   1.133.2.6   nathanw 	/*
    422       1.123  augustss 	 * Allocate a TD, inactive, that hangs from the last QH.
    423       1.123  augustss 	 * This is to avoid a bug in the PIIX that makes it run berserk
    424       1.123  augustss 	 * otherwise.
    425       1.123  augustss 	 */
    426       1.123  augustss 	std = uhci_alloc_std(sc);
    427       1.123  augustss 	if (std == NULL)
    428       1.123  augustss 		return (USBD_NOMEM);
    429       1.123  augustss 	std->link.std = NULL;
    430       1.123  augustss 	std->td.td_link = htole32(UHCI_PTR_T);
    431       1.123  augustss 	std->td.td_status = htole32(0); /* inactive */
    432       1.123  augustss 	std->td.td_token = htole32(0);
    433       1.123  augustss 	std->td.td_buffer = htole32(0);
    434       1.123  augustss 
    435       1.123  augustss 	/* Allocate the dummy QH marking the end and used for looping the QHs.*/
    436       1.123  augustss 	lsqh = uhci_alloc_sqh(sc);
    437       1.123  augustss 	if (lsqh == NULL)
    438       1.123  augustss 		return (USBD_NOMEM);
    439       1.123  augustss 	lsqh->hlink = NULL;
    440       1.123  augustss 	lsqh->qh.qh_hlink = htole32(UHCI_PTR_T);	/* end of QH chain */
    441       1.123  augustss 	lsqh->elink = std;
    442       1.123  augustss 	lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD);
    443       1.123  augustss 	sc->sc_last_qh = lsqh;
    444       1.123  augustss 
    445         1.1  augustss 	/* Allocate the dummy QH where bulk traffic will be queued. */
    446         1.1  augustss 	bsqh = uhci_alloc_sqh(sc);
    447        1.63  augustss 	if (bsqh == NULL)
    448         1.1  augustss 		return (USBD_NOMEM);
    449       1.123  augustss 	bsqh->hlink = lsqh;
    450       1.123  augustss 	bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH);
    451       1.121  augustss 	bsqh->elink = NULL;
    452        1.88   tsutsui 	bsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    453         1.1  augustss 	sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
    454         1.1  augustss 
    455       1.123  augustss 	/* Allocate dummy QH where high speed control traffic will be queued. */
    456       1.123  augustss 	chsqh = uhci_alloc_sqh(sc);
    457       1.123  augustss 	if (chsqh == NULL)
    458       1.123  augustss 		return (USBD_NOMEM);
    459       1.123  augustss 	chsqh->hlink = bsqh;
    460       1.123  augustss 	chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH);
    461       1.123  augustss 	chsqh->elink = NULL;
    462       1.123  augustss 	chsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    463       1.123  augustss 	sc->sc_hctl_start = sc->sc_hctl_end = chsqh;
    464       1.123  augustss 
    465       1.123  augustss 	/* Allocate dummy QH where control traffic will be queued. */
    466       1.123  augustss 	clsqh = uhci_alloc_sqh(sc);
    467       1.123  augustss 	if (clsqh == NULL)
    468         1.1  augustss 		return (USBD_NOMEM);
    469       1.123  augustss 	clsqh->hlink = bsqh;
    470       1.123  augustss 	clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH);
    471       1.123  augustss 	clsqh->elink = NULL;
    472       1.123  augustss 	clsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    473       1.123  augustss 	sc->sc_lctl_start = sc->sc_lctl_end = clsqh;
    474         1.1  augustss 
    475   1.133.2.6   nathanw 	/*
    476         1.1  augustss 	 * Make all (virtual) frame list pointers point to the interrupt
    477         1.1  augustss 	 * queue heads and the interrupt queue heads at the control
    478         1.1  augustss 	 * queue head and point the physical frame list to the virtual.
    479         1.1  augustss 	 */
    480         1.1  augustss 	for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
    481         1.1  augustss 		std = uhci_alloc_std(sc);
    482         1.1  augustss 		sqh = uhci_alloc_sqh(sc);
    483        1.67  augustss 		if (std == NULL || sqh == NULL)
    484        1.13  augustss 			return (USBD_NOMEM);
    485        1.42  augustss 		std->link.sqh = sqh;
    486       1.121  augustss 		std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH);
    487        1.88   tsutsui 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
    488        1.88   tsutsui 		std->td.td_token = htole32(0);
    489        1.88   tsutsui 		std->td.td_buffer = htole32(0);
    490       1.123  augustss 		sqh->hlink = clsqh;
    491       1.123  augustss 		sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH);
    492       1.121  augustss 		sqh->elink = NULL;
    493        1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
    494         1.1  augustss 		sc->sc_vframes[i].htd = std;
    495         1.1  augustss 		sc->sc_vframes[i].etd = std;
    496         1.1  augustss 		sc->sc_vframes[i].hqh = sqh;
    497         1.1  augustss 		sc->sc_vframes[i].eqh = sqh;
    498   1.133.2.6   nathanw 		for (j = i;
    499   1.133.2.6   nathanw 		     j < UHCI_FRAMELIST_COUNT;
    500         1.1  augustss 		     j += UHCI_VFRAMELIST_COUNT)
    501        1.88   tsutsui 			sc->sc_pframes[j] = htole32(std->physaddr);
    502         1.1  augustss 	}
    503         1.1  augustss 
    504         1.1  augustss 	LIST_INIT(&sc->sc_intrhead);
    505         1.1  augustss 
    506        1.76  augustss 	SIMPLEQ_INIT(&sc->sc_free_xfers);
    507        1.76  augustss 
    508        1.96  augustss 	usb_callout_init(sc->sc_poll_handle);
    509        1.96  augustss 
    510         1.1  augustss 	/* Set up the bus struct. */
    511        1.48  augustss 	sc->sc_bus.methods = &uhci_bus_methods;
    512         1.1  augustss 	sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
    513         1.1  augustss 
    514        1.92  augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
    515        1.30  augustss 	sc->sc_suspend = PWR_RESUME;
    516        1.53  augustss 	sc->sc_powerhook = powerhook_establish(uhci_power, sc);
    517        1.72  augustss 	sc->sc_shutdownhook = shutdownhook_establish(uhci_shutdown, sc);
    518        1.92  augustss #endif
    519        1.72  augustss 
    520         1.1  augustss 	DPRINTFN(1,("uhci_init: enabling\n"));
    521   1.133.2.6   nathanw 	UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
    522         1.1  augustss 		UHCI_INTR_IOCE | UHCI_INTR_SPIE);	/* enable interrupts */
    523         1.1  augustss 
    524        1.71  augustss 	UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */
    525        1.71  augustss 
    526        1.16  augustss 	return (uhci_run(sc, 1));		/* and here we go... */
    527        1.53  augustss }
    528        1.53  augustss 
    529        1.67  augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
    530        1.53  augustss int
    531       1.119  augustss uhci_activate(device_ptr_t self, enum devact act)
    532        1.53  augustss {
    533        1.56  augustss 	struct uhci_softc *sc = (struct uhci_softc *)self;
    534        1.53  augustss 	int rv = 0;
    535        1.53  augustss 
    536        1.53  augustss 	switch (act) {
    537        1.53  augustss 	case DVACT_ACTIVATE:
    538        1.53  augustss 		return (EOPNOTSUPP);
    539        1.53  augustss 		break;
    540        1.53  augustss 
    541        1.53  augustss 	case DVACT_DEACTIVATE:
    542        1.56  augustss 		if (sc->sc_child != NULL)
    543        1.56  augustss 			rv = config_deactivate(sc->sc_child);
    544        1.53  augustss 		break;
    545        1.53  augustss 	}
    546        1.53  augustss 	return (rv);
    547        1.53  augustss }
    548        1.53  augustss 
    549        1.53  augustss int
    550       1.119  augustss uhci_detach(struct uhci_softc *sc, int flags)
    551        1.53  augustss {
    552        1.76  augustss 	usbd_xfer_handle xfer;
    553        1.53  augustss 	int rv = 0;
    554        1.53  augustss 
    555        1.53  augustss 	if (sc->sc_child != NULL)
    556        1.53  augustss 		rv = config_detach(sc->sc_child, flags);
    557   1.133.2.6   nathanw 
    558        1.53  augustss 	if (rv != 0)
    559        1.53  augustss 		return (rv);
    560        1.53  augustss 
    561        1.92  augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
    562        1.53  augustss 	powerhook_disestablish(sc->sc_powerhook);
    563        1.72  augustss 	shutdownhook_disestablish(sc->sc_shutdownhook);
    564        1.92  augustss #endif
    565        1.72  augustss 
    566        1.76  augustss 	/* Free all xfers associated with this HC. */
    567        1.76  augustss 	for (;;) {
    568        1.76  augustss 		xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
    569        1.76  augustss 		if (xfer == NULL)
    570        1.76  augustss 			break;
    571   1.133.2.8   nathanw 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
    572        1.76  augustss 		free(xfer, M_USB);
    573   1.133.2.6   nathanw 	}
    574        1.76  augustss 
    575        1.76  augustss 	/* XXX free other data structures XXX */
    576        1.53  augustss 
    577        1.53  augustss 	return (rv);
    578         1.1  augustss }
    579        1.67  augustss #endif
    580         1.1  augustss 
    581        1.48  augustss usbd_status
    582       1.119  augustss uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
    583        1.48  augustss {
    584       1.102  augustss 	struct uhci_softc *sc = (struct uhci_softc *)bus;
    585       1.102  augustss 	u_int32_t n;
    586       1.102  augustss 
    587   1.133.2.6   nathanw 	/*
    588       1.102  augustss 	 * XXX
    589       1.102  augustss 	 * Since we are allocating a buffer we can assume that we will
    590   1.133.2.5   nathanw 	 * need TDs for it.  Since we don't want to allocate those from
    591       1.102  augustss 	 * an interrupt context, we allocate them here and free them again.
    592       1.102  augustss 	 * This is no guarantee that we'll get the TDs next time...
    593       1.102  augustss 	 */
    594       1.102  augustss 	n = size / 8;
    595       1.102  augustss 	if (n > 16) {
    596       1.102  augustss 		u_int32_t i;
    597       1.102  augustss 		uhci_soft_td_t **stds;
    598       1.102  augustss 		DPRINTF(("uhci_allocm: get %d TDs\n", n));
    599   1.133.2.6   nathanw 		stds = malloc(sizeof(uhci_soft_td_t *) * n, M_TEMP,
    600   1.133.2.6   nathanw 		    M_WAITOK|M_ZERO);
    601       1.102  augustss 		for(i=0; i < n; i++)
    602       1.102  augustss 			stds[i] = uhci_alloc_std(sc);
    603       1.102  augustss 		for(i=0; i < n; i++)
    604       1.102  augustss 			if (stds[i] != NULL)
    605       1.102  augustss 				uhci_free_std(sc, stds[i]);
    606       1.102  augustss 		free(stds, M_TEMP);
    607       1.102  augustss 	}
    608       1.102  augustss 
    609       1.102  augustss 	return (usb_allocmem(&sc->sc_bus, size, 0, dma));
    610        1.48  augustss }
    611        1.48  augustss 
    612        1.48  augustss void
    613       1.119  augustss uhci_freem(struct usbd_bus *bus, usb_dma_t *dma)
    614        1.48  augustss {
    615        1.63  augustss 	usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma);
    616        1.76  augustss }
    617        1.76  augustss 
    618        1.76  augustss usbd_xfer_handle
    619       1.119  augustss uhci_allocx(struct usbd_bus *bus)
    620        1.76  augustss {
    621        1.76  augustss 	struct uhci_softc *sc = (struct uhci_softc *)bus;
    622        1.76  augustss 	usbd_xfer_handle xfer;
    623        1.76  augustss 
    624        1.76  augustss 	xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
    625        1.94  augustss 	if (xfer != NULL) {
    626   1.133.2.8   nathanw 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
    627        1.98  augustss #ifdef DIAGNOSTIC
    628        1.94  augustss 		if (xfer->busy_free != XFER_FREE) {
    629       1.105  augustss 			printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer,
    630        1.94  augustss 			       xfer->busy_free);
    631        1.94  augustss 		}
    632        1.98  augustss #endif
    633        1.94  augustss 	} else {
    634        1.92  augustss 		xfer = malloc(sizeof(struct uhci_xfer), M_USB, M_NOWAIT);
    635        1.94  augustss 	}
    636        1.92  augustss 	if (xfer != NULL) {
    637        1.92  augustss 		memset(xfer, 0, sizeof (struct uhci_xfer));
    638        1.92  augustss 		UXFER(xfer)->iinfo.sc = sc;
    639        1.92  augustss #ifdef DIAGNOSTIC
    640        1.92  augustss 		UXFER(xfer)->iinfo.isdone = 1;
    641   1.133.2.1   nathanw 		xfer->busy_free = XFER_BUSY;
    642        1.92  augustss #endif
    643        1.92  augustss 	}
    644        1.76  augustss 	return (xfer);
    645        1.76  augustss }
    646        1.76  augustss 
    647        1.76  augustss void
    648       1.119  augustss uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
    649        1.76  augustss {
    650        1.76  augustss 	struct uhci_softc *sc = (struct uhci_softc *)bus;
    651        1.76  augustss 
    652        1.93  augustss #ifdef DIAGNOSTIC
    653        1.94  augustss 	if (xfer->busy_free != XFER_BUSY) {
    654        1.94  augustss 		printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer,
    655        1.94  augustss 		       xfer->busy_free);
    656        1.93  augustss 		return;
    657        1.93  augustss 	}
    658        1.94  augustss 	xfer->busy_free = XFER_FREE;
    659       1.105  augustss 	if (!UXFER(xfer)->iinfo.isdone) {
    660        1.96  augustss 		printf("uhci_freex: !isdone\n");
    661       1.105  augustss 		return;
    662       1.105  augustss 	}
    663        1.93  augustss #endif
    664        1.76  augustss 	SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
    665        1.48  augustss }
    666        1.48  augustss 
    667        1.72  augustss /*
    668        1.72  augustss  * Shut down the controller when the system is going down.
    669        1.72  augustss  */
    670        1.72  augustss void
    671       1.119  augustss uhci_shutdown(void *v)
    672        1.72  augustss {
    673        1.72  augustss 	uhci_softc_t *sc = v;
    674        1.72  augustss 
    675        1.72  augustss 	DPRINTF(("uhci_shutdown: stopping the HC\n"));
    676        1.72  augustss 	uhci_run(sc, 0); /* stop the controller */
    677        1.72  augustss }
    678        1.72  augustss 
    679        1.30  augustss /*
    680        1.30  augustss  * Handle suspend/resume.
    681        1.30  augustss  *
    682        1.40  augustss  * We need to switch to polling mode here, because this routine is
    683       1.109  augustss  * called from an interrupt context.  This is all right since we
    684        1.40  augustss  * are almost suspended anyway.
    685        1.30  augustss  */
    686        1.30  augustss void
    687       1.119  augustss uhci_power(int why, void *v)
    688        1.30  augustss {
    689        1.30  augustss 	uhci_softc_t *sc = v;
    690        1.30  augustss 	int cmd;
    691        1.30  augustss 	int s;
    692        1.30  augustss 
    693       1.132  augustss 	s = splhardusb();
    694        1.30  augustss 	cmd = UREAD2(sc, UHCI_CMD);
    695        1.30  augustss 
    696   1.133.2.6   nathanw 	DPRINTF(("uhci_power: sc=%p, why=%d (was %d), cmd=0x%x\n",
    697        1.30  augustss 		 sc, why, sc->sc_suspend, cmd));
    698        1.30  augustss 
    699       1.128  takemura 	switch (why) {
    700       1.128  takemura 	case PWR_SUSPEND:
    701       1.128  takemura 	case PWR_STANDBY:
    702        1.67  augustss #ifdef UHCI_DEBUG
    703        1.30  augustss 		if (uhcidebug > 2)
    704        1.30  augustss 			uhci_dumpregs(sc);
    705        1.30  augustss #endif
    706        1.96  augustss 		if (sc->sc_intr_xfer != NULL)
    707        1.96  augustss 			usb_uncallout(sc->sc_poll_handle, uhci_poll_hub,
    708        1.96  augustss 			    sc->sc_intr_xfer);
    709        1.54  augustss 		sc->sc_bus.use_polling++;
    710        1.30  augustss 		uhci_run(sc, 0); /* stop the controller */
    711        1.86  augustss 
    712        1.86  augustss 		/* save some state if BIOS doesn't */
    713        1.86  augustss 		sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM);
    714        1.86  augustss 		sc->sc_saved_sof = UREAD1(sc, UHCI_SOF);
    715        1.88   tsutsui 
    716   1.133.2.1   nathanw 		UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */
    717   1.133.2.1   nathanw 
    718        1.30  augustss 		UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */
    719        1.40  augustss 		usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
    720        1.30  augustss 		sc->sc_suspend = why;
    721        1.61  augustss 		sc->sc_bus.use_polling--;
    722        1.30  augustss 		DPRINTF(("uhci_power: cmd=0x%x\n", UREAD2(sc, UHCI_CMD)));
    723       1.128  takemura 		break;
    724       1.128  takemura 	case PWR_RESUME:
    725        1.60  augustss #ifdef DIAGNOSTIC
    726        1.61  augustss 		if (sc->sc_suspend == PWR_RESUME)
    727        1.61  augustss 			printf("uhci_power: weird, resume without suspend.\n");
    728        1.60  augustss #endif
    729        1.61  augustss 		sc->sc_bus.use_polling++;
    730        1.30  augustss 		sc->sc_suspend = why;
    731        1.30  augustss 		if (cmd & UHCI_CMD_RS)
    732        1.30  augustss 			uhci_run(sc, 0); /* in case BIOS has started it */
    733        1.86  augustss 
    734        1.86  augustss 		/* restore saved state */
    735   1.133.2.8   nathanw 		UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0));
    736        1.86  augustss 		UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum);
    737        1.86  augustss 		UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof);
    738        1.86  augustss 
    739        1.30  augustss 		UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */
    740        1.40  augustss 		usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
    741        1.30  augustss 		UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
    742   1.133.2.6   nathanw 		UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
    743        1.30  augustss 			UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */
    744        1.30  augustss 		uhci_run(sc, 1); /* and start traffic again */
    745        1.40  augustss 		usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
    746        1.54  augustss 		sc->sc_bus.use_polling--;
    747        1.96  augustss 		if (sc->sc_intr_xfer != NULL)
    748        1.96  augustss 			usb_callout(sc->sc_poll_handle, sc->sc_ival,
    749        1.96  augustss 				    uhci_poll_hub, sc->sc_intr_xfer);
    750        1.67  augustss #ifdef UHCI_DEBUG
    751        1.30  augustss 		if (uhcidebug > 2)
    752        1.30  augustss 			uhci_dumpregs(sc);
    753        1.30  augustss #endif
    754       1.128  takemura 		break;
    755       1.128  takemura 	case PWR_SOFTSUSPEND:
    756       1.128  takemura 	case PWR_SOFTSTANDBY:
    757       1.128  takemura 	case PWR_SOFTRESUME:
    758       1.128  takemura 		break;
    759        1.30  augustss 	}
    760        1.30  augustss 	splx(s);
    761        1.30  augustss }
    762        1.30  augustss 
    763        1.59  augustss #ifdef UHCI_DEBUG
    764       1.101  augustss Static void
    765       1.119  augustss uhci_dumpregs(uhci_softc_t *sc)
    766         1.1  augustss {
    767        1.48  augustss 	DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
    768        1.48  augustss 		     "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
    769        1.48  augustss 		     USBDEVNAME(sc->sc_bus.bdev),
    770        1.48  augustss 		     UREAD2(sc, UHCI_CMD),
    771        1.48  augustss 		     UREAD2(sc, UHCI_STS),
    772        1.48  augustss 		     UREAD2(sc, UHCI_INTR),
    773        1.48  augustss 		     UREAD2(sc, UHCI_FRNUM),
    774        1.48  augustss 		     UREAD4(sc, UHCI_FLBASEADDR),
    775        1.48  augustss 		     UREAD1(sc, UHCI_SOF),
    776        1.48  augustss 		     UREAD2(sc, UHCI_PORTSC1),
    777        1.48  augustss 		     UREAD2(sc, UHCI_PORTSC2)));
    778         1.1  augustss }
    779         1.1  augustss 
    780         1.1  augustss void
    781       1.119  augustss uhci_dump_td(uhci_soft_td_t *p)
    782         1.1  augustss {
    783       1.122        tv 	char sbuf[128], sbuf2[128];
    784       1.122        tv 
    785        1.48  augustss 	DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
    786        1.48  augustss 		     "token=0x%08lx buffer=0x%08lx\n",
    787        1.48  augustss 		     p, (long)p->physaddr,
    788        1.88   tsutsui 		     (long)le32toh(p->td.td_link),
    789        1.88   tsutsui 		     (long)le32toh(p->td.td_status),
    790        1.88   tsutsui 		     (long)le32toh(p->td.td_token),
    791        1.88   tsutsui 		     (long)le32toh(p->td.td_buffer)));
    792       1.122        tv 
    793   1.133.2.5   nathanw 	bitmask_snprintf((u_int32_t)le32toh(p->td.td_link), "\20\1T\2Q\3VF",
    794       1.122        tv 			 sbuf, sizeof(sbuf));
    795   1.133.2.5   nathanw 	bitmask_snprintf((u_int32_t)le32toh(p->td.td_status),
    796       1.122        tv 			 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
    797       1.122        tv 			 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
    798       1.122        tv 			 sbuf2, sizeof(sbuf2));
    799       1.122        tv 
    800       1.122        tv 	DPRINTFN(-1,("  %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
    801       1.122        tv 		     "D=%d,maxlen=%d\n", sbuf, sbuf2,
    802        1.88   tsutsui 		     UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)),
    803        1.88   tsutsui 		     UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)),
    804        1.88   tsutsui 		     UHCI_TD_GET_PID(le32toh(p->td.td_token)),
    805        1.88   tsutsui 		     UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)),
    806        1.88   tsutsui 		     UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)),
    807        1.88   tsutsui 		     UHCI_TD_GET_DT(le32toh(p->td.td_token)),
    808        1.88   tsutsui 		     UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token))));
    809         1.1  augustss }
    810         1.1  augustss 
    811         1.1  augustss void
    812       1.119  augustss uhci_dump_qh(uhci_soft_qh_t *sqh)
    813         1.1  augustss {
    814        1.67  augustss 	DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh,
    815        1.88   tsutsui 	    (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink),
    816        1.88   tsutsui 	    le32toh(sqh->qh.qh_elink)));
    817         1.1  augustss }
    818         1.1  augustss 
    819        1.13  augustss 
    820       1.110  augustss #if 1
    821         1.1  augustss void
    822       1.119  augustss uhci_dump(void)
    823         1.1  augustss {
    824       1.110  augustss 	uhci_dump_all(thesc);
    825       1.110  augustss }
    826       1.110  augustss #endif
    827         1.1  augustss 
    828       1.110  augustss void
    829       1.119  augustss uhci_dump_all(uhci_softc_t *sc)
    830       1.110  augustss {
    831         1.1  augustss 	uhci_dumpregs(sc);
    832        1.50  augustss 	printf("intrs=%d\n", sc->sc_bus.no_intrs);
    833       1.110  augustss 	/*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/
    834       1.123  augustss 	uhci_dump_qh(sc->sc_lctl_start);
    835         1.1  augustss }
    836         1.1  augustss 
    837        1.67  augustss 
    838        1.67  augustss void
    839       1.119  augustss uhci_dump_qhs(uhci_soft_qh_t *sqh)
    840        1.67  augustss {
    841        1.67  augustss 	uhci_dump_qh(sqh);
    842        1.67  augustss 
    843        1.67  augustss 	/* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards
    844        1.67  augustss 	 * Traverses sideways first, then down.
    845        1.67  augustss 	 *
    846        1.67  augustss 	 * QH1
    847        1.67  augustss 	 * QH2
    848        1.67  augustss 	 * No QH
    849        1.67  augustss 	 * TD2.1
    850        1.67  augustss 	 * TD2.2
    851        1.67  augustss 	 * TD1.1
    852        1.67  augustss 	 * etc.
    853        1.67  augustss 	 *
    854        1.67  augustss 	 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
    855        1.67  augustss 	 */
    856        1.67  augustss 
    857        1.67  augustss 
    858        1.88   tsutsui 	if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T))
    859        1.67  augustss 		uhci_dump_qhs(sqh->hlink);
    860        1.67  augustss 	else
    861        1.67  augustss 		DPRINTF(("No QH\n"));
    862        1.67  augustss 
    863        1.88   tsutsui 	if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T))
    864        1.67  augustss 		uhci_dump_tds(sqh->elink);
    865        1.67  augustss 	else
    866        1.67  augustss 		DPRINTF(("No TD\n"));
    867        1.67  augustss }
    868        1.67  augustss 
    869         1.1  augustss void
    870       1.119  augustss uhci_dump_tds(uhci_soft_td_t *std)
    871         1.1  augustss {
    872        1.67  augustss 	uhci_soft_td_t *td;
    873        1.67  augustss 
    874        1.67  augustss 	for(td = std; td != NULL; td = td->link.std) {
    875        1.67  augustss 		uhci_dump_td(td);
    876         1.1  augustss 
    877        1.67  augustss 		/* Check whether the link pointer in this TD marks
    878        1.67  augustss 		 * the link pointer as end of queue. This avoids
    879        1.67  augustss 		 * printing the free list in case the queue/TD has
    880        1.67  augustss 		 * already been moved there (seatbelt).
    881        1.67  augustss 		 */
    882        1.88   tsutsui 		if (le32toh(td->td.td_link) & UHCI_PTR_T ||
    883        1.88   tsutsui 		    le32toh(td->td.td_link) == 0)
    884        1.67  augustss 			break;
    885        1.67  augustss 	}
    886         1.1  augustss }
    887        1.92  augustss 
    888       1.101  augustss Static void
    889       1.119  augustss uhci_dump_ii(uhci_intr_info_t *ii)
    890        1.92  augustss {
    891        1.95  augustss 	usbd_pipe_handle pipe;
    892        1.95  augustss 	usb_endpoint_descriptor_t *ed;
    893        1.95  augustss 	usbd_device_handle dev;
    894   1.133.2.6   nathanw 
    895        1.98  augustss #ifdef DIAGNOSTIC
    896        1.98  augustss #define DONE ii->isdone
    897        1.98  augustss #else
    898        1.98  augustss #define DONE 0
    899        1.98  augustss #endif
    900        1.95  augustss         if (ii == NULL) {
    901        1.95  augustss                 printf("ii NULL\n");
    902        1.95  augustss                 return;
    903        1.95  augustss         }
    904        1.95  augustss         if (ii->xfer == NULL) {
    905        1.95  augustss 		printf("ii %p: done=%d xfer=NULL\n",
    906        1.98  augustss 		       ii, DONE);
    907        1.95  augustss                 return;
    908        1.95  augustss         }
    909        1.95  augustss         pipe = ii->xfer->pipe;
    910        1.95  augustss         if (pipe == NULL) {
    911        1.95  augustss 		printf("ii %p: done=%d xfer=%p pipe=NULL\n",
    912        1.98  augustss 		       ii, DONE, ii->xfer);
    913        1.95  augustss                 return;
    914        1.95  augustss 	}
    915   1.133.2.4   nathanw         if (pipe->endpoint == NULL) {
    916   1.133.2.4   nathanw 		printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n",
    917   1.133.2.4   nathanw 		       ii, DONE, ii->xfer, pipe);
    918   1.133.2.4   nathanw                 return;
    919   1.133.2.4   nathanw 	}
    920   1.133.2.4   nathanw         if (pipe->device == NULL) {
    921   1.133.2.4   nathanw 		printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n",
    922   1.133.2.4   nathanw 		       ii, DONE, ii->xfer, pipe);
    923   1.133.2.4   nathanw                 return;
    924   1.133.2.4   nathanw 	}
    925        1.95  augustss         ed = pipe->endpoint->edesc;
    926        1.95  augustss         dev = pipe->device;
    927   1.133.2.6   nathanw 	printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n",
    928   1.133.2.6   nathanw 	       ii, DONE, ii->xfer, dev,
    929        1.95  augustss 	       UGETW(dev->ddesc.idVendor),
    930        1.92  augustss 	       UGETW(dev->ddesc.idProduct),
    931        1.92  augustss 	       dev->address, pipe,
    932        1.92  augustss 	       ed->bEndpointAddress, ed->bmAttributes);
    933        1.98  augustss #undef DONE
    934        1.92  augustss }
    935        1.92  augustss 
    936       1.120  augustss void uhci_dump_iis(struct uhci_softc *sc);
    937        1.92  augustss void
    938       1.119  augustss uhci_dump_iis(struct uhci_softc *sc)
    939        1.92  augustss {
    940        1.92  augustss 	uhci_intr_info_t *ii;
    941        1.92  augustss 
    942        1.92  augustss 	printf("intr_info list:\n");
    943        1.92  augustss 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
    944        1.92  augustss 		uhci_dump_ii(ii);
    945        1.92  augustss }
    946        1.92  augustss 
    947       1.120  augustss void iidump(void);
    948       1.119  augustss void iidump(void) { uhci_dump_iis(thesc); }
    949        1.92  augustss 
    950         1.1  augustss #endif
    951         1.1  augustss 
    952         1.1  augustss /*
    953         1.1  augustss  * This routine is executed periodically and simulates interrupts
    954         1.1  augustss  * from the root controller interrupt pipe for port status change.
    955         1.1  augustss  */
    956         1.1  augustss void
    957       1.119  augustss uhci_poll_hub(void *addr)
    958         1.1  augustss {
    959        1.63  augustss 	usbd_xfer_handle xfer = addr;
    960        1.63  augustss 	usbd_pipe_handle pipe = xfer->pipe;
    961         1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
    962         1.1  augustss 	int s;
    963         1.1  augustss 	u_char *p;
    964         1.1  augustss 
    965        1.96  augustss 	DPRINTFN(20, ("uhci_poll_hub\n"));
    966         1.1  augustss 
    967        1.96  augustss 	usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
    968        1.41  augustss 
    969   1.133.2.8   nathanw 	p = KERNADDR(&xfer->dmabuf, 0);
    970         1.1  augustss 	p[0] = 0;
    971         1.1  augustss 	if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
    972         1.1  augustss 		p[0] |= 1<<1;
    973         1.1  augustss 	if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
    974         1.1  augustss 		p[0] |= 1<<2;
    975        1.41  augustss 	if (p[0] == 0)
    976        1.41  augustss 		/* No change, try again in a while */
    977        1.41  augustss 		return;
    978        1.41  augustss 
    979        1.63  augustss 	xfer->actlen = 1;
    980        1.63  augustss 	xfer->status = USBD_NORMAL_COMPLETION;
    981        1.16  augustss 	s = splusb();
    982        1.63  augustss 	xfer->device->bus->intr_context++;
    983        1.63  augustss 	usb_transfer_complete(xfer);
    984        1.63  augustss 	xfer->device->bus->intr_context--;
    985        1.41  augustss 	splx(s);
    986        1.41  augustss }
    987        1.41  augustss 
    988        1.41  augustss void
    989       1.119  augustss uhci_root_intr_done(usbd_xfer_handle xfer)
    990        1.84  augustss {
    991        1.84  augustss }
    992        1.84  augustss 
    993        1.84  augustss void
    994       1.119  augustss uhci_root_ctrl_done(usbd_xfer_handle xfer)
    995        1.41  augustss {
    996         1.1  augustss }
    997         1.1  augustss 
    998       1.123  augustss /*
    999       1.123  augustss  * Let the last QH loop back to the high speed control transfer QH.
   1000       1.123  augustss  * This is what intel calls "bandwidth reclamation" and improves
   1001       1.123  augustss  * USB performance a lot for some devices.
   1002       1.123  augustss  * If we are already looping, just count it.
   1003       1.123  augustss  */
   1004         1.1  augustss void
   1005       1.123  augustss uhci_add_loop(uhci_softc_t *sc) {
   1006       1.125  augustss #ifdef UHCI_DEBUG
   1007       1.125  augustss 	if (uhcinoloop)
   1008       1.125  augustss 		return;
   1009       1.125  augustss #endif
   1010       1.123  augustss 	if (++sc->sc_loops == 1) {
   1011       1.125  augustss 		DPRINTFN(5,("uhci_start_loop: add\n"));
   1012       1.123  augustss 		/* Note, we don't loop back the soft pointer. */
   1013   1.133.2.6   nathanw 		sc->sc_last_qh->qh.qh_hlink =
   1014       1.123  augustss 		    htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH);
   1015       1.123  augustss 	}
   1016       1.123  augustss }
   1017       1.123  augustss 
   1018       1.123  augustss void
   1019       1.123  augustss uhci_rem_loop(uhci_softc_t *sc) {
   1020       1.125  augustss #ifdef UHCI_DEBUG
   1021       1.125  augustss 	if (uhcinoloop)
   1022       1.125  augustss 		return;
   1023       1.125  augustss #endif
   1024       1.123  augustss 	if (--sc->sc_loops == 0) {
   1025       1.123  augustss 		DPRINTFN(5,("uhci_end_loop: remove\n"));
   1026       1.123  augustss 		sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T);
   1027       1.123  augustss 	}
   1028       1.123  augustss }
   1029       1.123  augustss 
   1030       1.123  augustss /* Add high speed control QH, called at splusb(). */
   1031       1.123  augustss void
   1032       1.123  augustss uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1033         1.1  augustss {
   1034        1.42  augustss 	uhci_soft_qh_t *eqh;
   1035         1.1  augustss 
   1036        1.52  augustss 	SPLUSBCHECK;
   1037        1.52  augustss 
   1038         1.1  augustss 	DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
   1039       1.123  augustss 	eqh = sc->sc_hctl_end;
   1040        1.42  augustss 	sqh->hlink       = eqh->hlink;
   1041        1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1042        1.42  augustss 	eqh->hlink       = sqh;
   1043       1.121  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1044       1.123  augustss 	sc->sc_hctl_end = sqh;
   1045       1.125  augustss #ifdef UHCI_CTL_LOOP
   1046       1.123  augustss 	uhci_add_loop(sc);
   1047       1.125  augustss #endif
   1048         1.1  augustss }
   1049         1.1  augustss 
   1050       1.123  augustss /* Remove high speed control QH, called at splusb(). */
   1051         1.1  augustss void
   1052       1.123  augustss uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1053         1.1  augustss {
   1054         1.1  augustss 	uhci_soft_qh_t *pqh;
   1055         1.1  augustss 
   1056        1.52  augustss 	SPLUSBCHECK;
   1057        1.52  augustss 
   1058       1.123  augustss 	DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh));
   1059       1.125  augustss #ifdef UHCI_CTL_LOOP
   1060       1.123  augustss 	uhci_rem_loop(sc);
   1061       1.125  augustss #endif
   1062       1.124  augustss 	/*
   1063       1.124  augustss 	 * The T bit should be set in the elink of the QH so that the HC
   1064       1.124  augustss 	 * doesn't follow the pointer.  This condition may fail if the
   1065       1.124  augustss 	 * the transferred packet was short so that the QH still points
   1066       1.124  augustss 	 * at the last used TD.
   1067       1.124  augustss 	 * In this case we set the T bit and wait a little for the HC
   1068       1.124  augustss 	 * to stop looking at the TD.
   1069       1.124  augustss 	 */
   1070       1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1071       1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1072       1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1073       1.124  augustss 	}
   1074       1.124  augustss 
   1075       1.123  augustss 	pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh);
   1076   1.133.2.6   nathanw 	pqh->hlink = sqh->hlink;
   1077        1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1078       1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1079       1.123  augustss 	if (sc->sc_hctl_end == sqh)
   1080       1.123  augustss 		sc->sc_hctl_end = pqh;
   1081       1.123  augustss }
   1082       1.123  augustss 
   1083       1.123  augustss /* Add low speed control QH, called at splusb(). */
   1084       1.123  augustss void
   1085       1.123  augustss uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1086       1.123  augustss {
   1087       1.123  augustss 	uhci_soft_qh_t *eqh;
   1088       1.123  augustss 
   1089       1.123  augustss 	SPLUSBCHECK;
   1090       1.123  augustss 
   1091       1.123  augustss 	DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh));
   1092       1.123  augustss 	eqh = sc->sc_lctl_end;
   1093   1.133.2.6   nathanw 	sqh->hlink = eqh->hlink;
   1094       1.123  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1095   1.133.2.6   nathanw 	eqh->hlink = sqh;
   1096       1.123  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1097       1.123  augustss 	sc->sc_lctl_end = sqh;
   1098       1.123  augustss }
   1099       1.123  augustss 
   1100       1.123  augustss /* Remove low speed control QH, called at splusb(). */
   1101       1.123  augustss void
   1102       1.123  augustss uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1103       1.123  augustss {
   1104       1.123  augustss 	uhci_soft_qh_t *pqh;
   1105       1.123  augustss 
   1106       1.123  augustss 	SPLUSBCHECK;
   1107       1.123  augustss 
   1108       1.123  augustss 	DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh));
   1109       1.124  augustss 	/* See comment in uhci_remove_hs_ctrl() */
   1110       1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1111       1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1112       1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1113       1.124  augustss 	}
   1114       1.123  augustss 	pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh);
   1115   1.133.2.6   nathanw 	pqh->hlink = sqh->hlink;
   1116       1.123  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1117       1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1118       1.123  augustss 	if (sc->sc_lctl_end == sqh)
   1119       1.123  augustss 		sc->sc_lctl_end = pqh;
   1120         1.1  augustss }
   1121         1.1  augustss 
   1122         1.1  augustss /* Add bulk QH, called at splusb(). */
   1123         1.1  augustss void
   1124       1.119  augustss uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1125         1.1  augustss {
   1126        1.42  augustss 	uhci_soft_qh_t *eqh;
   1127         1.1  augustss 
   1128        1.52  augustss 	SPLUSBCHECK;
   1129        1.52  augustss 
   1130         1.1  augustss 	DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
   1131        1.42  augustss 	eqh = sc->sc_bulk_end;
   1132   1.133.2.6   nathanw 	sqh->hlink = eqh->hlink;
   1133        1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1134   1.133.2.6   nathanw 	eqh->hlink = sqh;
   1135       1.121  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1136         1.1  augustss 	sc->sc_bulk_end = sqh;
   1137       1.123  augustss 	uhci_add_loop(sc);
   1138         1.1  augustss }
   1139         1.1  augustss 
   1140         1.1  augustss /* Remove bulk QH, called at splusb(). */
   1141         1.1  augustss void
   1142       1.119  augustss uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1143         1.1  augustss {
   1144         1.1  augustss 	uhci_soft_qh_t *pqh;
   1145         1.1  augustss 
   1146        1.52  augustss 	SPLUSBCHECK;
   1147        1.52  augustss 
   1148         1.1  augustss 	DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
   1149       1.123  augustss 	uhci_rem_loop(sc);
   1150       1.124  augustss 	/* See comment in uhci_remove_hs_ctrl() */
   1151       1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1152       1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1153       1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1154       1.124  augustss 	}
   1155        1.92  augustss 	pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh);
   1156        1.42  augustss 	pqh->hlink       = sqh->hlink;
   1157        1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1158       1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1159         1.1  augustss 	if (sc->sc_bulk_end == sqh)
   1160         1.1  augustss 		sc->sc_bulk_end = pqh;
   1161         1.1  augustss }
   1162         1.1  augustss 
   1163   1.133.2.4   nathanw Static int uhci_intr1(uhci_softc_t *);
   1164   1.133.2.4   nathanw 
   1165         1.1  augustss int
   1166       1.119  augustss uhci_intr(void *arg)
   1167         1.1  augustss {
   1168        1.44  augustss 	uhci_softc_t *sc = arg;
   1169   1.133.2.4   nathanw 
   1170   1.133.2.5   nathanw 	if (sc->sc_dying)
   1171   1.133.2.5   nathanw 		return (0);
   1172   1.133.2.5   nathanw 
   1173   1.133.2.4   nathanw 	DPRINTFN(15,("uhci_intr: real interrupt\n"));
   1174   1.133.2.4   nathanw 	if (sc->sc_bus.use_polling) {
   1175   1.133.2.4   nathanw #ifdef DIAGNOSTIC
   1176   1.133.2.4   nathanw 		printf("uhci_intr: ignored interrupt while polling\n");
   1177   1.133.2.4   nathanw #endif
   1178   1.133.2.4   nathanw 		return (0);
   1179   1.133.2.4   nathanw 	}
   1180   1.133.2.4   nathanw 	return (uhci_intr1(sc));
   1181   1.133.2.4   nathanw }
   1182   1.133.2.4   nathanw 
   1183   1.133.2.4   nathanw int
   1184   1.133.2.4   nathanw uhci_intr1(uhci_softc_t *sc)
   1185   1.133.2.4   nathanw {
   1186        1.44  augustss 	int status;
   1187        1.44  augustss 	int ack;
   1188         1.1  augustss 
   1189        1.67  augustss #ifdef UHCI_DEBUG
   1190        1.44  augustss 	if (uhcidebug > 15) {
   1191   1.133.2.4   nathanw 		DPRINTF(("%s: uhci_intr1\n", USBDEVNAME(sc->sc_bus.bdev)));
   1192         1.1  augustss 		uhci_dumpregs(sc);
   1193         1.1  augustss 	}
   1194         1.1  augustss #endif
   1195       1.117  augustss 
   1196   1.133.2.6   nathanw 	status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS;
   1197       1.127     soren 	if (status == 0)	/* The interrupt was not for us. */
   1198       1.127     soren 		return (0);
   1199       1.127     soren 
   1200       1.117  augustss 	if (sc->sc_suspend != PWR_RESUME) {
   1201       1.117  augustss 		printf("%s: interrupt while not operating ignored\n",
   1202       1.117  augustss 		       USBDEVNAME(sc->sc_bus.bdev));
   1203   1.133.2.1   nathanw 		UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */
   1204       1.117  augustss 		return (0);
   1205       1.117  augustss 	}
   1206        1.44  augustss 
   1207        1.44  augustss 	ack = 0;
   1208        1.44  augustss 	if (status & UHCI_STS_USBINT)
   1209        1.44  augustss 		ack |= UHCI_STS_USBINT;
   1210        1.44  augustss 	if (status & UHCI_STS_USBEI)
   1211        1.44  augustss 		ack |= UHCI_STS_USBEI;
   1212         1.1  augustss 	if (status & UHCI_STS_RD) {
   1213        1.44  augustss 		ack |= UHCI_STS_RD;
   1214       1.118  augustss #ifdef UHCI_DEBUG
   1215        1.46  augustss 		printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
   1216       1.118  augustss #endif
   1217         1.1  augustss 	}
   1218         1.1  augustss 	if (status & UHCI_STS_HSE) {
   1219        1.44  augustss 		ack |= UHCI_STS_HSE;
   1220        1.81  augustss 		printf("%s: host system error\n", USBDEVNAME(sc->sc_bus.bdev));
   1221         1.1  augustss 	}
   1222         1.1  augustss 	if (status & UHCI_STS_HCPE) {
   1223        1.44  augustss 		ack |= UHCI_STS_HCPE;
   1224   1.133.2.6   nathanw 		printf("%s: host controller process error\n",
   1225        1.81  augustss 		       USBDEVNAME(sc->sc_bus.bdev));
   1226        1.44  augustss 	}
   1227        1.44  augustss 	if (status & UHCI_STS_HCH) {
   1228        1.44  augustss 		/* no acknowledge needed */
   1229   1.133.2.2   nathanw 		if (!sc->sc_dying) {
   1230   1.133.2.6   nathanw 			printf("%s: host controller halted\n",
   1231       1.129  augustss 			    USBDEVNAME(sc->sc_bus.bdev));
   1232       1.110  augustss #ifdef UHCI_DEBUG
   1233   1.133.2.2   nathanw 			uhci_dump_all(sc);
   1234       1.110  augustss #endif
   1235   1.133.2.2   nathanw 		}
   1236   1.133.2.2   nathanw 		sc->sc_dying = 1;
   1237         1.1  augustss 	}
   1238        1.44  augustss 
   1239       1.132  augustss 	if (!ack)
   1240       1.132  augustss 		return (0);	/* nothing to acknowledge */
   1241       1.132  augustss 	UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */
   1242         1.1  augustss 
   1243        1.85  augustss 	sc->sc_bus.no_intrs++;
   1244        1.85  augustss 	usb_schedsoftintr(&sc->sc_bus);
   1245        1.85  augustss 
   1246        1.85  augustss 	DPRINTFN(10, ("%s: uhci_intr: exit\n", USBDEVNAME(sc->sc_bus.bdev)));
   1247        1.85  augustss 
   1248        1.85  augustss 	return (1);
   1249        1.85  augustss }
   1250        1.85  augustss 
   1251        1.85  augustss void
   1252       1.133  augustss uhci_softintr(void *v)
   1253        1.85  augustss {
   1254       1.133  augustss 	uhci_softc_t *sc = v;
   1255        1.85  augustss 	uhci_intr_info_t *ii;
   1256        1.85  augustss 
   1257   1.133.2.4   nathanw 	DPRINTFN(10,("%s: uhci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev),
   1258   1.133.2.4   nathanw 		     sc->sc_bus.intr_context));
   1259        1.85  augustss 
   1260        1.51  augustss 	sc->sc_bus.intr_context++;
   1261        1.50  augustss 
   1262         1.1  augustss 	/*
   1263         1.1  augustss 	 * Interrupts on UHCI really suck.  When the host controller
   1264         1.1  augustss 	 * interrupts because a transfer is completed there is no
   1265         1.1  augustss 	 * way of knowing which transfer it was.  You can scan down
   1266         1.1  augustss 	 * the TDs and QHs of the previous frame to limit the search,
   1267         1.1  augustss 	 * but that assumes that the interrupt was not delayed by more
   1268         1.1  augustss 	 * than 1 ms, which may not always be true (e.g. after debug
   1269         1.1  augustss 	 * output on a slow console).
   1270         1.1  augustss 	 * We scan all interrupt descriptors to see if any have
   1271         1.1  augustss 	 * completed.
   1272         1.1  augustss 	 */
   1273         1.1  augustss 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
   1274         1.1  augustss 		uhci_check_intr(sc, ii);
   1275         1.1  augustss 
   1276   1.133.2.6   nathanw 	if (sc->sc_softwake) {
   1277   1.133.2.6   nathanw 		sc->sc_softwake = 0;
   1278   1.133.2.6   nathanw 		wakeup(&sc->sc_softwake);
   1279   1.133.2.6   nathanw 	}
   1280   1.133.2.6   nathanw 
   1281        1.51  augustss 	sc->sc_bus.intr_context--;
   1282         1.1  augustss }
   1283         1.1  augustss 
   1284         1.1  augustss /* Check for an interrupt. */
   1285         1.1  augustss void
   1286       1.119  augustss uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii)
   1287         1.1  augustss {
   1288         1.1  augustss 	uhci_soft_td_t *std, *lstd;
   1289        1.18  augustss 	u_int32_t status;
   1290         1.1  augustss 
   1291         1.1  augustss 	DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
   1292         1.1  augustss #ifdef DIAGNOSTIC
   1293        1.63  augustss 	if (ii == NULL) {
   1294         1.1  augustss 		printf("uhci_check_intr: no ii? %p\n", ii);
   1295         1.1  augustss 		return;
   1296         1.1  augustss 	}
   1297         1.1  augustss #endif
   1298   1.133.2.6   nathanw 	if (ii->xfer->status == USBD_CANCELLED ||
   1299   1.133.2.6   nathanw 	    ii->xfer->status == USBD_TIMEOUT) {
   1300   1.133.2.6   nathanw 		DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer));
   1301   1.133.2.6   nathanw 		return;
   1302   1.133.2.6   nathanw 	}
   1303   1.133.2.6   nathanw 
   1304        1.63  augustss 	if (ii->stdstart == NULL)
   1305         1.1  augustss 		return;
   1306         1.1  augustss 	lstd = ii->stdend;
   1307         1.1  augustss #ifdef DIAGNOSTIC
   1308        1.63  augustss 	if (lstd == NULL) {
   1309         1.1  augustss 		printf("uhci_check_intr: std==0\n");
   1310         1.1  augustss 		return;
   1311         1.1  augustss 	}
   1312         1.1  augustss #endif
   1313   1.133.2.6   nathanw 	/*
   1314        1.26  augustss 	 * If the last TD is still active we need to check whether there
   1315        1.26  augustss 	 * is a an error somewhere in the middle, or whether there was a
   1316        1.26  augustss 	 * short packet (SPD and not ACTIVE).
   1317        1.26  augustss 	 */
   1318        1.88   tsutsui 	if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) {
   1319        1.92  augustss 		DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii));
   1320        1.48  augustss 		for (std = ii->stdstart; std != lstd; std = std->link.std) {
   1321        1.88   tsutsui 			status = le32toh(std->td.td_status);
   1322        1.83  augustss 			/* If there's an active TD the xfer isn't done. */
   1323        1.83  augustss 			if (status & UHCI_TD_ACTIVE)
   1324        1.83  augustss 				break;
   1325        1.83  augustss 			/* Any kind of error makes the xfer done. */
   1326        1.83  augustss 			if (status & UHCI_TD_STALLED)
   1327        1.83  augustss 				goto done;
   1328        1.83  augustss 			/* We want short packets, and it is short: it's done */
   1329        1.83  augustss 			if ((status & UHCI_TD_SPD) &&
   1330   1.133.2.6   nathanw 			      UHCI_TD_GET_ACTLEN(status) <
   1331        1.88   tsutsui 			      UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)))
   1332         1.1  augustss 				goto done;
   1333        1.18  augustss 		}
   1334        1.92  augustss 		DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n",
   1335        1.18  augustss 			      ii, ii->stdstart));
   1336         1.1  augustss 		return;
   1337         1.1  augustss 	}
   1338         1.1  augustss  done:
   1339        1.92  augustss 	DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii));
   1340        1.96  augustss 	usb_uncallout(ii->xfer->timeout_handle, uhci_timeout, ii);
   1341        1.36  augustss 	uhci_idone(ii);
   1342         1.1  augustss }
   1343         1.1  augustss 
   1344        1.52  augustss /* Called at splusb() */
   1345         1.1  augustss void
   1346       1.119  augustss uhci_idone(uhci_intr_info_t *ii)
   1347         1.1  augustss {
   1348        1.63  augustss 	usbd_xfer_handle xfer = ii->xfer;
   1349        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   1350         1.1  augustss 	uhci_soft_td_t *std;
   1351        1.67  augustss 	u_int32_t status = 0, nstatus;
   1352        1.26  augustss 	int actlen;
   1353         1.1  augustss 
   1354   1.133.2.4   nathanw 	DPRINTFN(12, ("uhci_idone: ii=%p\n", ii));
   1355         1.7  augustss #ifdef DIAGNOSTIC
   1356         1.7  augustss 	{
   1357         1.7  augustss 		int s = splhigh();
   1358         1.7  augustss 		if (ii->isdone) {
   1359        1.26  augustss 			splx(s);
   1360        1.92  augustss #ifdef UHCI_DEBUG
   1361        1.92  augustss 			printf("uhci_idone: ii is done!\n   ");
   1362        1.92  augustss 			uhci_dump_ii(ii);
   1363        1.92  augustss #else
   1364        1.36  augustss 			printf("uhci_idone: ii=%p is done!\n", ii);
   1365        1.92  augustss #endif
   1366         1.7  augustss 			return;
   1367         1.7  augustss 		}
   1368         1.7  augustss 		ii->isdone = 1;
   1369         1.7  augustss 		splx(s);
   1370         1.7  augustss 	}
   1371         1.7  augustss #endif
   1372         1.1  augustss 
   1373        1.63  augustss 	if (xfer->nframes != 0) {
   1374        1.48  augustss 		/* Isoc transfer, do things differently. */
   1375        1.48  augustss 		uhci_soft_td_t **stds = upipe->u.iso.stds;
   1376       1.126  augustss 		int i, n, nframes, len;
   1377        1.48  augustss 
   1378        1.48  augustss 		DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii));
   1379        1.48  augustss 
   1380        1.63  augustss 		nframes = xfer->nframes;
   1381        1.48  augustss 		actlen = 0;
   1382        1.92  augustss 		n = UXFER(xfer)->curframe;
   1383        1.48  augustss 		for (i = 0; i < nframes; i++) {
   1384        1.48  augustss 			std = stds[n];
   1385        1.59  augustss #ifdef UHCI_DEBUG
   1386        1.48  augustss 			if (uhcidebug > 5) {
   1387        1.48  augustss 				DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i));
   1388        1.48  augustss 				uhci_dump_td(std);
   1389        1.48  augustss 			}
   1390        1.48  augustss #endif
   1391        1.48  augustss 			if (++n >= UHCI_VFRAMELIST_COUNT)
   1392        1.48  augustss 				n = 0;
   1393        1.88   tsutsui 			status = le32toh(std->td.td_status);
   1394       1.126  augustss 			len = UHCI_TD_GET_ACTLEN(status);
   1395       1.126  augustss 			xfer->frlengths[i] = len;
   1396       1.126  augustss 			actlen += len;
   1397        1.48  augustss 		}
   1398        1.48  augustss 		upipe->u.iso.inuse -= nframes;
   1399        1.63  augustss 		xfer->actlen = actlen;
   1400        1.63  augustss 		xfer->status = USBD_NORMAL_COMPLETION;
   1401   1.133.2.4   nathanw 		goto end;
   1402        1.48  augustss 	}
   1403        1.48  augustss 
   1404        1.59  augustss #ifdef UHCI_DEBUG
   1405        1.65  augustss 	DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n",
   1406        1.65  augustss 		      ii, xfer, upipe));
   1407        1.48  augustss 	if (uhcidebug > 10)
   1408        1.48  augustss 		uhci_dump_tds(ii->stdstart);
   1409        1.48  augustss #endif
   1410        1.48  augustss 
   1411        1.26  augustss 	/* The transfer is done, compute actual length and status. */
   1412        1.26  augustss 	actlen = 0;
   1413        1.63  augustss 	for (std = ii->stdstart; std != NULL; std = std->link.std) {
   1414        1.88   tsutsui 		nstatus = le32toh(std->td.td_status);
   1415        1.64  augustss 		if (nstatus & UHCI_TD_ACTIVE)
   1416        1.26  augustss 			break;
   1417        1.67  augustss 
   1418        1.64  augustss 		status = nstatus;
   1419        1.88   tsutsui 		if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) !=
   1420        1.88   tsutsui 			UHCI_TD_PID_SETUP)
   1421        1.26  augustss 			actlen += UHCI_TD_GET_ACTLEN(status);
   1422         1.1  augustss 	}
   1423        1.38  augustss 	/* If there are left over TDs we need to update the toggle. */
   1424        1.63  augustss 	if (std != NULL)
   1425        1.88   tsutsui 		upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token));
   1426        1.38  augustss 
   1427         1.1  augustss 	status &= UHCI_TD_ERROR;
   1428   1.133.2.6   nathanw 	DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n",
   1429        1.26  augustss 		      actlen, status));
   1430        1.63  augustss 	xfer->actlen = actlen;
   1431         1.1  augustss 	if (status != 0) {
   1432       1.122        tv #ifdef UHCI_DEBUG
   1433       1.122        tv 		char sbuf[128];
   1434       1.122        tv 
   1435   1.133.2.5   nathanw 		bitmask_snprintf((u_int32_t)status,
   1436   1.133.2.5   nathanw 				 "\20\22BITSTUFF\23CRCTO\24NAK\25"
   1437       1.122        tv 				 "BABBLE\26DBUFFER\27STALLED\30ACTIVE",
   1438       1.122        tv 				 sbuf, sizeof(sbuf));
   1439       1.122        tv 
   1440        1.75  augustss 		DPRINTFN((status == UHCI_TD_STALLED)*10,
   1441        1.36  augustss 			 ("uhci_idone: error, addr=%d, endpt=0x%02x, "
   1442       1.122        tv 			  "status 0x%s\n",
   1443        1.63  augustss 			  xfer->pipe->device->address,
   1444        1.63  augustss 			  xfer->pipe->endpoint->edesc->bEndpointAddress,
   1445       1.122        tv 			  sbuf));
   1446       1.122        tv #endif
   1447       1.122        tv 
   1448         1.1  augustss 		if (status == UHCI_TD_STALLED)
   1449        1.63  augustss 			xfer->status = USBD_STALLED;
   1450         1.1  augustss 		else
   1451        1.63  augustss 			xfer->status = USBD_IOERROR; /* more info XXX */
   1452         1.1  augustss 	} else {
   1453        1.63  augustss 		xfer->status = USBD_NORMAL_COMPLETION;
   1454         1.1  augustss 	}
   1455   1.133.2.4   nathanw 
   1456   1.133.2.4   nathanw  end:
   1457        1.63  augustss 	usb_transfer_complete(xfer);
   1458   1.133.2.4   nathanw 	DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii));
   1459         1.1  augustss }
   1460         1.1  augustss 
   1461        1.13  augustss /*
   1462        1.13  augustss  * Called when a request does not complete.
   1463        1.13  augustss  */
   1464         1.1  augustss void
   1465       1.119  augustss uhci_timeout(void *addr)
   1466         1.1  augustss {
   1467         1.1  augustss 	uhci_intr_info_t *ii = addr;
   1468   1.133.2.6   nathanw 	struct uhci_xfer *uxfer = UXFER(ii->xfer);
   1469   1.133.2.6   nathanw 	struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe;
   1470   1.133.2.6   nathanw 	uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
   1471         1.1  augustss 
   1472   1.133.2.6   nathanw 	DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer));
   1473        1.51  augustss 
   1474   1.133.2.6   nathanw 	if (sc->sc_dying) {
   1475   1.133.2.6   nathanw 		uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT);
   1476   1.133.2.6   nathanw 		return;
   1477   1.133.2.6   nathanw 	}
   1478   1.133.2.6   nathanw 
   1479   1.133.2.6   nathanw 	/* Execute the abort in a process context. */
   1480   1.133.2.7   nathanw 	usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer);
   1481   1.133.2.6   nathanw 	usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task);
   1482   1.133.2.6   nathanw }
   1483   1.133.2.6   nathanw 
   1484   1.133.2.6   nathanw void
   1485   1.133.2.6   nathanw uhci_timeout_task(void *addr)
   1486   1.133.2.6   nathanw {
   1487   1.133.2.6   nathanw 	usbd_xfer_handle xfer = addr;
   1488   1.133.2.6   nathanw 	int s;
   1489        1.67  augustss 
   1490   1.133.2.6   nathanw 	DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer));
   1491   1.133.2.6   nathanw 
   1492   1.133.2.6   nathanw 	s = splusb();
   1493   1.133.2.6   nathanw 	uhci_abort_xfer(xfer, USBD_TIMEOUT);
   1494   1.133.2.6   nathanw 	splx(s);
   1495         1.1  augustss }
   1496         1.1  augustss 
   1497         1.1  augustss /*
   1498         1.1  augustss  * Wait here until controller claims to have an interrupt.
   1499         1.1  augustss  * Then call uhci_intr and return.  Use timeout to avoid waiting
   1500         1.1  augustss  * too long.
   1501        1.13  augustss  * Only used during boot when interrupts are not enabled yet.
   1502         1.1  augustss  */
   1503         1.1  augustss void
   1504       1.119  augustss uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer)
   1505         1.1  augustss {
   1506        1.63  augustss 	int timo = xfer->timeout;
   1507        1.13  augustss 	uhci_intr_info_t *ii;
   1508        1.13  augustss 
   1509        1.26  augustss 	DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
   1510         1.1  augustss 
   1511        1.63  augustss 	xfer->status = USBD_IN_PROGRESS;
   1512        1.26  augustss 	for (; timo >= 0; timo--) {
   1513        1.20  augustss 		usb_delay_ms(&sc->sc_bus, 1);
   1514        1.26  augustss 		DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
   1515         1.1  augustss 		if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
   1516   1.133.2.4   nathanw 			uhci_intr1(sc);
   1517        1.63  augustss 			if (xfer->status != USBD_IN_PROGRESS)
   1518         1.1  augustss 				return;
   1519         1.1  augustss 		}
   1520         1.1  augustss 	}
   1521        1.13  augustss 
   1522        1.13  augustss 	/* Timeout */
   1523        1.13  augustss 	DPRINTF(("uhci_waitintr: timeout\n"));
   1524        1.13  augustss 	for (ii = LIST_FIRST(&sc->sc_intrhead);
   1525   1.133.2.6   nathanw 	     ii != NULL && ii->xfer != xfer;
   1526        1.13  augustss 	     ii = LIST_NEXT(ii, list))
   1527        1.13  augustss 		;
   1528        1.41  augustss #ifdef DIAGNOSTIC
   1529        1.63  augustss 	if (ii == NULL)
   1530        1.13  augustss 		panic("uhci_waitintr: lost intr_info\n");
   1531        1.41  augustss #endif
   1532        1.41  augustss 	uhci_idone(ii);
   1533         1.1  augustss }
   1534         1.1  augustss 
   1535         1.8  augustss void
   1536       1.119  augustss uhci_poll(struct usbd_bus *bus)
   1537         1.8  augustss {
   1538         1.8  augustss 	uhci_softc_t *sc = (uhci_softc_t *)bus;
   1539         1.8  augustss 
   1540         1.8  augustss 	if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT)
   1541   1.133.2.4   nathanw 		uhci_intr1(sc);
   1542         1.8  augustss }
   1543         1.8  augustss 
   1544         1.1  augustss void
   1545       1.119  augustss uhci_reset(uhci_softc_t *sc)
   1546         1.1  augustss {
   1547         1.1  augustss 	int n;
   1548         1.1  augustss 
   1549         1.1  augustss 	UHCICMD(sc, UHCI_CMD_HCRESET);
   1550         1.1  augustss 	/* The reset bit goes low when the controller is done. */
   1551   1.133.2.6   nathanw 	for (n = 0; n < UHCI_RESET_TIMEOUT &&
   1552         1.1  augustss 		    (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
   1553        1.92  augustss 		usb_delay_ms(&sc->sc_bus, 1);
   1554         1.1  augustss 	if (n >= UHCI_RESET_TIMEOUT)
   1555   1.133.2.6   nathanw 		printf("%s: controller did not reset\n",
   1556        1.13  augustss 		       USBDEVNAME(sc->sc_bus.bdev));
   1557         1.1  augustss }
   1558         1.1  augustss 
   1559        1.16  augustss usbd_status
   1560       1.119  augustss uhci_run(uhci_softc_t *sc, int run)
   1561         1.1  augustss {
   1562         1.1  augustss 	int s, n, running;
   1563        1.71  augustss 	u_int16_t cmd;
   1564         1.1  augustss 
   1565         1.1  augustss 	run = run != 0;
   1566       1.132  augustss 	s = splhardusb();
   1567        1.30  augustss 	DPRINTF(("uhci_run: setting run=%d\n", run));
   1568        1.71  augustss 	cmd = UREAD2(sc, UHCI_CMD);
   1569        1.71  augustss 	if (run)
   1570        1.71  augustss 		cmd |= UHCI_CMD_RS;
   1571        1.71  augustss 	else
   1572        1.71  augustss 		cmd &= ~UHCI_CMD_RS;
   1573        1.71  augustss 	UHCICMD(sc, cmd);
   1574        1.13  augustss 	for(n = 0; n < 10; n++) {
   1575         1.1  augustss 		running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
   1576         1.1  augustss 		/* return when we've entered the state we want */
   1577         1.1  augustss 		if (run == running) {
   1578         1.1  augustss 			splx(s);
   1579        1.30  augustss 			DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
   1580        1.30  augustss 				 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
   1581        1.16  augustss 			return (USBD_NORMAL_COMPLETION);
   1582         1.1  augustss 		}
   1583        1.20  augustss 		usb_delay_ms(&sc->sc_bus, 1);
   1584         1.1  augustss 	}
   1585         1.1  augustss 	splx(s);
   1586        1.13  augustss 	printf("%s: cannot %s\n", USBDEVNAME(sc->sc_bus.bdev),
   1587        1.14  augustss 	       run ? "start" : "stop");
   1588        1.16  augustss 	return (USBD_IOERROR);
   1589         1.1  augustss }
   1590         1.1  augustss 
   1591         1.1  augustss /*
   1592         1.1  augustss  * Memory management routines.
   1593         1.1  augustss  *  uhci_alloc_std allocates TDs
   1594         1.1  augustss  *  uhci_alloc_sqh allocates QHs
   1595         1.7  augustss  * These two routines do their own free list management,
   1596         1.1  augustss  * partly for speed, partly because allocating DMAable memory
   1597         1.1  augustss  * has page size granularaity so much memory would be wasted if
   1598        1.16  augustss  * only one TD/QH (32 bytes) was placed in each allocated chunk.
   1599         1.1  augustss  */
   1600         1.1  augustss 
   1601         1.1  augustss uhci_soft_td_t *
   1602       1.119  augustss uhci_alloc_std(uhci_softc_t *sc)
   1603         1.1  augustss {
   1604         1.1  augustss 	uhci_soft_td_t *std;
   1605        1.63  augustss 	usbd_status err;
   1606        1.42  augustss 	int i, offs;
   1607         1.7  augustss 	usb_dma_t dma;
   1608         1.1  augustss 
   1609        1.63  augustss 	if (sc->sc_freetds == NULL) {
   1610         1.1  augustss 		DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
   1611        1.63  augustss 		err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK,
   1612        1.63  augustss 			  UHCI_TD_ALIGN, &dma);
   1613        1.63  augustss 		if (err)
   1614        1.16  augustss 			return (0);
   1615        1.43  augustss 		for(i = 0; i < UHCI_STD_CHUNK; i++) {
   1616        1.42  augustss 			offs = i * UHCI_STD_SIZE;
   1617   1.133.2.8   nathanw 			std = KERNADDR(&dma, offs);
   1618   1.133.2.8   nathanw 			std->physaddr = DMAADDR(&dma, offs);
   1619        1.42  augustss 			std->link.std = sc->sc_freetds;
   1620         1.1  augustss 			sc->sc_freetds = std;
   1621         1.1  augustss 		}
   1622         1.1  augustss 	}
   1623         1.1  augustss 	std = sc->sc_freetds;
   1624        1.42  augustss 	sc->sc_freetds = std->link.std;
   1625        1.42  augustss 	memset(&std->td, 0, sizeof(uhci_td_t));
   1626         1.1  augustss 	return std;
   1627         1.1  augustss }
   1628         1.1  augustss 
   1629         1.1  augustss void
   1630       1.119  augustss uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std)
   1631         1.1  augustss {
   1632         1.7  augustss #ifdef DIAGNOSTIC
   1633         1.7  augustss #define TD_IS_FREE 0x12345678
   1634        1.88   tsutsui 	if (le32toh(std->td.td_token) == TD_IS_FREE) {
   1635         1.7  augustss 		printf("uhci_free_std: freeing free TD %p\n", std);
   1636         1.7  augustss 		return;
   1637         1.7  augustss 	}
   1638        1.88   tsutsui 	std->td.td_token = htole32(TD_IS_FREE);
   1639         1.7  augustss #endif
   1640        1.42  augustss 	std->link.std = sc->sc_freetds;
   1641         1.1  augustss 	sc->sc_freetds = std;
   1642         1.1  augustss }
   1643         1.1  augustss 
   1644         1.1  augustss uhci_soft_qh_t *
   1645       1.119  augustss uhci_alloc_sqh(uhci_softc_t *sc)
   1646         1.1  augustss {
   1647         1.1  augustss 	uhci_soft_qh_t *sqh;
   1648        1.63  augustss 	usbd_status err;
   1649         1.1  augustss 	int i, offs;
   1650         1.7  augustss 	usb_dma_t dma;
   1651         1.1  augustss 
   1652        1.63  augustss 	if (sc->sc_freeqhs == NULL) {
   1653         1.1  augustss 		DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
   1654        1.63  augustss 		err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK,
   1655        1.63  augustss 			  UHCI_QH_ALIGN, &dma);
   1656        1.63  augustss 		if (err)
   1657        1.63  augustss 			return (0);
   1658        1.43  augustss 		for(i = 0; i < UHCI_SQH_CHUNK; i++) {
   1659        1.42  augustss 			offs = i * UHCI_SQH_SIZE;
   1660   1.133.2.8   nathanw 			sqh = KERNADDR(&dma, offs);
   1661   1.133.2.8   nathanw 			sqh->physaddr = DMAADDR(&dma, offs);
   1662        1.42  augustss 			sqh->hlink = sc->sc_freeqhs;
   1663         1.1  augustss 			sc->sc_freeqhs = sqh;
   1664         1.1  augustss 		}
   1665         1.1  augustss 	}
   1666         1.1  augustss 	sqh = sc->sc_freeqhs;
   1667        1.42  augustss 	sc->sc_freeqhs = sqh->hlink;
   1668        1.42  augustss 	memset(&sqh->qh, 0, sizeof(uhci_qh_t));
   1669        1.16  augustss 	return (sqh);
   1670         1.1  augustss }
   1671         1.1  augustss 
   1672         1.1  augustss void
   1673       1.119  augustss uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1674         1.1  augustss {
   1675        1.42  augustss 	sqh->hlink = sc->sc_freeqhs;
   1676         1.1  augustss 	sc->sc_freeqhs = sqh;
   1677         1.1  augustss }
   1678         1.1  augustss 
   1679         1.1  augustss void
   1680       1.119  augustss uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std,
   1681       1.119  augustss 		    uhci_soft_td_t *stdend)
   1682         1.1  augustss {
   1683         1.1  augustss 	uhci_soft_td_t *p;
   1684         1.1  augustss 
   1685         1.1  augustss 	for (; std != stdend; std = p) {
   1686        1.42  augustss 		p = std->link.std;
   1687         1.1  augustss 		uhci_free_std(sc, std);
   1688         1.1  augustss 	}
   1689         1.1  augustss }
   1690         1.1  augustss 
   1691         1.1  augustss usbd_status
   1692       1.119  augustss uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len,
   1693       1.119  augustss 		     int rd, u_int16_t flags, usb_dma_t *dma,
   1694       1.119  augustss 		     uhci_soft_td_t **sp, uhci_soft_td_t **ep)
   1695         1.1  augustss {
   1696         1.1  augustss 	uhci_soft_td_t *p, *lastp;
   1697         1.1  augustss 	uhci_physaddr_t lastlink;
   1698         1.1  augustss 	int i, ntd, l, tog, maxp;
   1699        1.18  augustss 	u_int32_t status;
   1700         1.1  augustss 	int addr = upipe->pipe.device->address;
   1701         1.1  augustss 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   1702         1.1  augustss 
   1703   1.133.2.5   nathanw 	DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d "
   1704   1.133.2.6   nathanw 		      "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len,
   1705   1.133.2.5   nathanw 		      upipe->pipe.device->speed, flags));
   1706         1.4  augustss 	maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
   1707         1.1  augustss 	if (maxp == 0) {
   1708         1.1  augustss 		printf("uhci_alloc_std_chain: maxp=0\n");
   1709         1.1  augustss 		return (USBD_INVAL);
   1710         1.1  augustss 	}
   1711         1.1  augustss 	ntd = (len + maxp - 1) / maxp;
   1712        1.73  augustss 	if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0)
   1713        1.73  augustss 		ntd++;
   1714        1.39  augustss 	DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd));
   1715        1.73  augustss 	if (ntd == 0) {
   1716        1.73  augustss 		*sp = *ep = 0;
   1717        1.73  augustss 		DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n"));
   1718        1.73  augustss 		return (USBD_NORMAL_COMPLETION);
   1719        1.73  augustss 	}
   1720        1.38  augustss 	tog = upipe->nexttoggle;
   1721         1.1  augustss 	if (ntd % 2 == 0)
   1722         1.1  augustss 		tog ^= 1;
   1723        1.32  augustss 	upipe->nexttoggle = tog ^ 1;
   1724       1.121  augustss 	lastp = NULL;
   1725         1.1  augustss 	lastlink = UHCI_PTR_T;
   1726         1.1  augustss 	ntd--;
   1727        1.33  augustss 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
   1728   1.133.2.5   nathanw 	if (upipe->pipe.device->speed == USB_SPEED_LOW)
   1729        1.18  augustss 		status |= UHCI_TD_LS;
   1730        1.73  augustss 	if (flags & USBD_SHORT_XFER_OK)
   1731        1.18  augustss 		status |= UHCI_TD_SPD;
   1732         1.1  augustss 	for (i = ntd; i >= 0; i--) {
   1733         1.1  augustss 		p = uhci_alloc_std(sc);
   1734        1.63  augustss 		if (p == NULL) {
   1735   1.133.2.5   nathanw 			uhci_free_std_chain(sc, lastp, NULL);
   1736         1.1  augustss 			return (USBD_NOMEM);
   1737         1.1  augustss 		}
   1738        1.42  augustss 		p->link.std = lastp;
   1739       1.121  augustss 		p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD);
   1740         1.1  augustss 		lastp = p;
   1741         1.1  augustss 		lastlink = p->physaddr;
   1742        1.88   tsutsui 		p->td.td_status = htole32(status);
   1743         1.1  augustss 		if (i == ntd) {
   1744         1.1  augustss 			/* last TD */
   1745         1.1  augustss 			l = len % maxp;
   1746        1.73  augustss 			if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER))
   1747        1.73  augustss 				l = maxp;
   1748         1.1  augustss 			*ep = p;
   1749         1.1  augustss 		} else
   1750         1.1  augustss 			l = maxp;
   1751   1.133.2.6   nathanw 		p->td.td_token =
   1752        1.88   tsutsui 		    htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) :
   1753        1.88   tsutsui 				 UHCI_TD_OUT(l, endpt, addr, tog));
   1754   1.133.2.8   nathanw 		p->td.td_buffer = htole32(DMAADDR(dma, i * maxp));
   1755         1.1  augustss 		tog ^= 1;
   1756         1.1  augustss 	}
   1757         1.1  augustss 	*sp = lastp;
   1758   1.133.2.6   nathanw 	DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n",
   1759        1.38  augustss 		      upipe->nexttoggle));
   1760         1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   1761         1.1  augustss }
   1762         1.1  augustss 
   1763        1.38  augustss void
   1764       1.119  augustss uhci_device_clear_toggle(usbd_pipe_handle pipe)
   1765        1.38  augustss {
   1766        1.38  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   1767        1.38  augustss 	upipe->nexttoggle = 0;
   1768        1.38  augustss }
   1769        1.38  augustss 
   1770        1.38  augustss void
   1771       1.119  augustss uhci_noop(usbd_pipe_handle pipe)
   1772        1.38  augustss {
   1773        1.38  augustss }
   1774        1.38  augustss 
   1775         1.1  augustss usbd_status
   1776       1.119  augustss uhci_device_bulk_transfer(usbd_xfer_handle xfer)
   1777         1.1  augustss {
   1778        1.63  augustss 	usbd_status err;
   1779        1.16  augustss 
   1780        1.52  augustss 	/* Insert last in queue. */
   1781        1.63  augustss 	err = usb_insert_transfer(xfer);
   1782        1.63  augustss 	if (err)
   1783        1.63  augustss 		return (err);
   1784        1.52  augustss 
   1785   1.133.2.6   nathanw 	/*
   1786        1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   1787        1.92  augustss 	 * so start it first.
   1788        1.67  augustss 	 */
   1789        1.63  augustss 	return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   1790        1.16  augustss }
   1791        1.16  augustss 
   1792        1.16  augustss usbd_status
   1793       1.119  augustss uhci_device_bulk_start(usbd_xfer_handle xfer)
   1794        1.16  augustss {
   1795        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   1796         1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   1797         1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   1798        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   1799        1.55  augustss 	uhci_soft_td_t *data, *dataend;
   1800         1.1  augustss 	uhci_soft_qh_t *sqh;
   1801        1.63  augustss 	usbd_status err;
   1802        1.45  augustss 	int len, isread, endpt;
   1803         1.1  augustss 	int s;
   1804         1.1  augustss 
   1805        1.63  augustss 	DPRINTFN(3, ("uhci_device_bulk_transfer: xfer=%p len=%d flags=%d\n",
   1806        1.63  augustss 		     xfer, xfer->length, xfer->flags));
   1807         1.1  augustss 
   1808        1.82  augustss 	if (sc->sc_dying)
   1809        1.82  augustss 		return (USBD_IOERROR);
   1810        1.82  augustss 
   1811        1.48  augustss #ifdef DIAGNOSTIC
   1812        1.63  augustss 	if (xfer->rqflags & URQ_REQUEST)
   1813         1.1  augustss 		panic("uhci_device_bulk_transfer: a request\n");
   1814        1.48  augustss #endif
   1815         1.1  augustss 
   1816        1.63  augustss 	len = xfer->length;
   1817       1.102  augustss 	endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   1818        1.45  augustss 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   1819         1.1  augustss 	sqh = upipe->u.bulk.sqh;
   1820         1.1  augustss 
   1821         1.1  augustss 	upipe->u.bulk.isread = isread;
   1822         1.1  augustss 	upipe->u.bulk.length = len;
   1823         1.1  augustss 
   1824        1.73  augustss 	err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
   1825        1.73  augustss 				   &xfer->dmabuf, &data, &dataend);
   1826        1.63  augustss 	if (err)
   1827        1.63  augustss 		return (err);
   1828        1.88   tsutsui 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
   1829         1.1  augustss 
   1830        1.59  augustss #ifdef UHCI_DEBUG
   1831        1.33  augustss 	if (uhcidebug > 8) {
   1832        1.55  augustss 		DPRINTF(("uhci_device_bulk_transfer: data(1)\n"));
   1833        1.55  augustss 		uhci_dump_tds(data);
   1834         1.1  augustss 	}
   1835         1.1  augustss #endif
   1836         1.1  augustss 
   1837         1.1  augustss 	/* Set up interrupt info. */
   1838        1.63  augustss 	ii->xfer = xfer;
   1839        1.55  augustss 	ii->stdstart = data;
   1840        1.55  augustss 	ii->stdend = dataend;
   1841         1.7  augustss #ifdef DIAGNOSTIC
   1842        1.70  augustss 	if (!ii->isdone) {
   1843        1.70  augustss 		printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii);
   1844        1.70  augustss 	}
   1845         1.7  augustss 	ii->isdone = 0;
   1846         1.7  augustss #endif
   1847         1.1  augustss 
   1848        1.55  augustss 	sqh->elink = data;
   1849       1.121  augustss 	sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   1850         1.1  augustss 
   1851         1.1  augustss 	s = splusb();
   1852         1.1  augustss 	uhci_add_bulk(sc, sqh);
   1853        1.92  augustss 	uhci_add_intr_info(sc, ii);
   1854         1.1  augustss 
   1855        1.63  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   1856        1.96  augustss 		usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
   1857        1.91  augustss 			    uhci_timeout, ii);
   1858        1.13  augustss 	}
   1859        1.92  augustss 	xfer->status = USBD_IN_PROGRESS;
   1860         1.1  augustss 	splx(s);
   1861         1.1  augustss 
   1862        1.59  augustss #ifdef UHCI_DEBUG
   1863         1.1  augustss 	if (uhcidebug > 10) {
   1864        1.55  augustss 		DPRINTF(("uhci_device_bulk_transfer: data(2)\n"));
   1865        1.55  augustss 		uhci_dump_tds(data);
   1866         1.1  augustss 	}
   1867         1.1  augustss #endif
   1868         1.1  augustss 
   1869        1.26  augustss 	if (sc->sc_bus.use_polling)
   1870        1.63  augustss 		uhci_waitintr(sc, xfer);
   1871        1.26  augustss 
   1872         1.1  augustss 	return (USBD_IN_PROGRESS);
   1873         1.1  augustss }
   1874         1.1  augustss 
   1875         1.1  augustss /* Abort a device bulk request. */
   1876         1.1  augustss void
   1877       1.119  augustss uhci_device_bulk_abort(usbd_xfer_handle xfer)
   1878         1.1  augustss {
   1879        1.33  augustss 	DPRINTF(("uhci_device_bulk_abort:\n"));
   1880        1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   1881        1.33  augustss }
   1882        1.33  augustss 
   1883        1.92  augustss /*
   1884   1.133.2.6   nathanw  * Abort a device request.
   1885   1.133.2.6   nathanw  * If this routine is called at splusb() it guarantees that the request
   1886   1.133.2.6   nathanw  * will be removed from the hardware scheduling and that the callback
   1887   1.133.2.6   nathanw  * for it will be called with USBD_CANCELLED status.
   1888   1.133.2.6   nathanw  * It's impossible to guarantee that the requested transfer will not
   1889   1.133.2.6   nathanw  * have happened since the hardware runs concurrently.
   1890   1.133.2.6   nathanw  * If the transaction has already happened we rely on the ordinary
   1891   1.133.2.6   nathanw  * interrupt processing to process it.
   1892        1.92  augustss  */
   1893        1.33  augustss void
   1894       1.119  augustss uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
   1895        1.33  augustss {
   1896        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   1897   1.133.2.6   nathanw 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   1898   1.133.2.6   nathanw 	uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
   1899        1.33  augustss 	uhci_soft_td_t *std;
   1900        1.92  augustss 	int s;
   1901        1.65  augustss 
   1902       1.106  augustss 	DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status));
   1903        1.33  augustss 
   1904   1.133.2.6   nathanw 	if (sc->sc_dying) {
   1905   1.133.2.6   nathanw 		/* If we're dying, just do the software part. */
   1906   1.133.2.6   nathanw 		s = splusb();
   1907   1.133.2.6   nathanw 		xfer->status = status;	/* make software ignore it */
   1908   1.133.2.7   nathanw 		usb_uncallout(xfer->timeout_handle, uhci_timeout, xfer);
   1909   1.133.2.6   nathanw 		usb_transfer_complete(xfer);
   1910        1.92  augustss 		splx(s);
   1911        1.92  augustss 	}
   1912        1.92  augustss 
   1913  1.133.2.10   nathanw 	if (xfer->device->bus->intr_context || !curproc)
   1914   1.133.2.7   nathanw 		panic("uhci_abort_xfer: not in process context\n");
   1915        1.41  augustss 
   1916   1.133.2.6   nathanw 	/*
   1917   1.133.2.6   nathanw 	 * Step 1: Make interrupt routine and hardware ignore xfer.
   1918   1.133.2.6   nathanw 	 */
   1919   1.133.2.6   nathanw 	s = splusb();
   1920   1.133.2.6   nathanw 	xfer->status = status;	/* make software ignore it */
   1921       1.106  augustss 	usb_uncallout(xfer->timeout_handle, uhci_timeout, ii);
   1922   1.133.2.6   nathanw 	DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii));
   1923       1.106  augustss 	for (std = ii->stdstart; std != NULL; std = std->link.std)
   1924        1.92  augustss 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
   1925        1.92  augustss 	splx(s);
   1926        1.92  augustss 
   1927  1.133.2.11   nathanw 	/*
   1928   1.133.2.6   nathanw 	 * Step 2: Wait until we know hardware has finished any possible
   1929   1.133.2.6   nathanw 	 * use of the xfer.  Also make sure the soft interrupt routine
   1930   1.133.2.6   nathanw 	 * has run.
   1931   1.133.2.6   nathanw 	 */
   1932   1.133.2.6   nathanw 	usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */
   1933   1.133.2.6   nathanw 	s = splusb();
   1934   1.133.2.6   nathanw 	sc->sc_softwake = 1;
   1935   1.133.2.6   nathanw 	usb_schedsoftintr(&sc->sc_bus);
   1936   1.133.2.6   nathanw 	DPRINTFN(1,("uhci_abort_xfer: tsleep\n"));
   1937   1.133.2.6   nathanw 	tsleep(&sc->sc_softwake, PZERO, "uhciab", 0);
   1938   1.133.2.6   nathanw 	splx(s);
   1939  1.133.2.11   nathanw 
   1940   1.133.2.6   nathanw 	/*
   1941   1.133.2.6   nathanw 	 * Step 3: Execute callback.
   1942   1.133.2.6   nathanw 	 */
   1943   1.133.2.6   nathanw 	xfer->hcpriv = ii;
   1944        1.92  augustss 
   1945   1.133.2.6   nathanw 	DPRINTFN(1,("uhci_abort_xfer: callback\n"));
   1946        1.92  augustss 	s = splusb();
   1947       1.100  augustss #ifdef DIAGNOSTIC
   1948       1.106  augustss 	ii->isdone = 1;
   1949       1.100  augustss #endif
   1950       1.106  augustss 	usb_transfer_complete(xfer);
   1951        1.33  augustss 	splx(s);
   1952         1.1  augustss }
   1953         1.1  augustss 
   1954         1.1  augustss /* Close a device bulk pipe. */
   1955         1.1  augustss void
   1956       1.119  augustss uhci_device_bulk_close(usbd_pipe_handle pipe)
   1957         1.1  augustss {
   1958         1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   1959         1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   1960         1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   1961         1.1  augustss 
   1962         1.1  augustss 	uhci_free_sqh(sc, upipe->u.bulk.sqh);
   1963         1.1  augustss }
   1964         1.1  augustss 
   1965         1.1  augustss usbd_status
   1966       1.119  augustss uhci_device_ctrl_transfer(usbd_xfer_handle xfer)
   1967         1.1  augustss {
   1968        1.63  augustss 	usbd_status err;
   1969        1.16  augustss 
   1970        1.52  augustss 	/* Insert last in queue. */
   1971        1.63  augustss 	err = usb_insert_transfer(xfer);
   1972        1.63  augustss 	if (err)
   1973        1.63  augustss 		return (err);
   1974        1.52  augustss 
   1975   1.133.2.6   nathanw 	/*
   1976        1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   1977        1.92  augustss 	 * so start it first.
   1978        1.67  augustss 	 */
   1979        1.63  augustss 	return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   1980        1.16  augustss }
   1981        1.16  augustss 
   1982        1.16  augustss usbd_status
   1983       1.119  augustss uhci_device_ctrl_start(usbd_xfer_handle xfer)
   1984        1.16  augustss {
   1985        1.63  augustss 	uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
   1986        1.63  augustss 	usbd_status err;
   1987         1.1  augustss 
   1988        1.82  augustss 	if (sc->sc_dying)
   1989        1.82  augustss 		return (USBD_IOERROR);
   1990        1.82  augustss 
   1991        1.48  augustss #ifdef DIAGNOSTIC
   1992        1.63  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   1993         1.1  augustss 		panic("uhci_device_ctrl_transfer: not a request\n");
   1994        1.48  augustss #endif
   1995         1.1  augustss 
   1996        1.63  augustss 	err = uhci_device_request(xfer);
   1997        1.63  augustss 	if (err)
   1998        1.63  augustss 		return (err);
   1999         1.1  augustss 
   2000         1.9  augustss 	if (sc->sc_bus.use_polling)
   2001        1.63  augustss 		uhci_waitintr(sc, xfer);
   2002         1.1  augustss 	return (USBD_IN_PROGRESS);
   2003         1.1  augustss }
   2004         1.1  augustss 
   2005         1.1  augustss usbd_status
   2006       1.119  augustss uhci_device_intr_transfer(usbd_xfer_handle xfer)
   2007         1.1  augustss {
   2008        1.63  augustss 	usbd_status err;
   2009        1.16  augustss 
   2010        1.52  augustss 	/* Insert last in queue. */
   2011        1.63  augustss 	err = usb_insert_transfer(xfer);
   2012        1.63  augustss 	if (err)
   2013        1.63  augustss 		return (err);
   2014        1.52  augustss 
   2015   1.133.2.6   nathanw 	/*
   2016        1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2017        1.92  augustss 	 * so start it first.
   2018        1.67  augustss 	 */
   2019        1.63  augustss 	return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2020        1.16  augustss }
   2021        1.16  augustss 
   2022        1.16  augustss usbd_status
   2023       1.119  augustss uhci_device_intr_start(usbd_xfer_handle xfer)
   2024        1.16  augustss {
   2025        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2026         1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2027         1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   2028        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2029        1.55  augustss 	uhci_soft_td_t *data, *dataend;
   2030         1.1  augustss 	uhci_soft_qh_t *sqh;
   2031        1.63  augustss 	usbd_status err;
   2032        1.49  augustss 	int i, s;
   2033         1.1  augustss 
   2034        1.82  augustss 	if (sc->sc_dying)
   2035        1.82  augustss 		return (USBD_IOERROR);
   2036        1.82  augustss 
   2037        1.63  augustss 	DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n",
   2038        1.63  augustss 		    xfer, xfer->length, xfer->flags));
   2039         1.1  augustss 
   2040        1.48  augustss #ifdef DIAGNOSTIC
   2041        1.63  augustss 	if (xfer->rqflags & URQ_REQUEST)
   2042         1.1  augustss 		panic("uhci_device_intr_transfer: a request\n");
   2043        1.48  augustss #endif
   2044         1.1  augustss 
   2045        1.73  augustss 	err = uhci_alloc_std_chain(upipe, sc, xfer->length, 1, xfer->flags,
   2046        1.73  augustss 				   &xfer->dmabuf, &data, &dataend);
   2047        1.63  augustss 	if (err)
   2048        1.63  augustss 		return (err);
   2049        1.88   tsutsui 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2050         1.1  augustss 
   2051        1.59  augustss #ifdef UHCI_DEBUG
   2052         1.1  augustss 	if (uhcidebug > 10) {
   2053        1.55  augustss 		DPRINTF(("uhci_device_intr_transfer: data(1)\n"));
   2054        1.55  augustss 		uhci_dump_tds(data);
   2055         1.1  augustss 		uhci_dump_qh(upipe->u.intr.qhs[0]);
   2056         1.1  augustss 	}
   2057         1.1  augustss #endif
   2058         1.1  augustss 
   2059         1.1  augustss 	s = splusb();
   2060         1.1  augustss 	/* Set up interrupt info. */
   2061        1.63  augustss 	ii->xfer = xfer;
   2062        1.55  augustss 	ii->stdstart = data;
   2063        1.55  augustss 	ii->stdend = dataend;
   2064         1.7  augustss #ifdef DIAGNOSTIC
   2065        1.70  augustss 	if (!ii->isdone) {
   2066        1.70  augustss 		printf("uhci_device_intr_transfer: not done, ii=%p\n", ii);
   2067        1.70  augustss 	}
   2068         1.7  augustss 	ii->isdone = 0;
   2069         1.7  augustss #endif
   2070         1.1  augustss 
   2071   1.133.2.6   nathanw 	DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
   2072        1.12  augustss 		     upipe->u.intr.qhs[0]));
   2073         1.1  augustss 	for (i = 0; i < upipe->u.intr.npoll; i++) {
   2074         1.1  augustss 		sqh = upipe->u.intr.qhs[i];
   2075        1.55  augustss 		sqh->elink = data;
   2076       1.121  augustss 		sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2077         1.1  augustss 	}
   2078        1.92  augustss 	uhci_add_intr_info(sc, ii);
   2079        1.92  augustss 	xfer->status = USBD_IN_PROGRESS;
   2080         1.1  augustss 	splx(s);
   2081         1.1  augustss 
   2082        1.59  augustss #ifdef UHCI_DEBUG
   2083         1.1  augustss 	if (uhcidebug > 10) {
   2084        1.55  augustss 		DPRINTF(("uhci_device_intr_transfer: data(2)\n"));
   2085        1.55  augustss 		uhci_dump_tds(data);
   2086         1.1  augustss 		uhci_dump_qh(upipe->u.intr.qhs[0]);
   2087         1.1  augustss 	}
   2088         1.1  augustss #endif
   2089         1.1  augustss 
   2090         1.1  augustss 	return (USBD_IN_PROGRESS);
   2091         1.1  augustss }
   2092         1.1  augustss 
   2093         1.1  augustss /* Abort a device control request. */
   2094         1.1  augustss void
   2095       1.119  augustss uhci_device_ctrl_abort(usbd_xfer_handle xfer)
   2096         1.1  augustss {
   2097        1.33  augustss 	DPRINTF(("uhci_device_ctrl_abort:\n"));
   2098        1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2099         1.1  augustss }
   2100         1.1  augustss 
   2101         1.1  augustss /* Close a device control pipe. */
   2102         1.1  augustss void
   2103       1.119  augustss uhci_device_ctrl_close(usbd_pipe_handle pipe)
   2104         1.1  augustss {
   2105         1.1  augustss }
   2106         1.1  augustss 
   2107         1.1  augustss /* Abort a device interrupt request. */
   2108         1.1  augustss void
   2109       1.119  augustss uhci_device_intr_abort(usbd_xfer_handle xfer)
   2110         1.1  augustss {
   2111        1.63  augustss 	DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer));
   2112        1.63  augustss 	if (xfer->pipe->intrxfer == xfer) {
   2113        1.36  augustss 		DPRINTFN(1,("uhci_device_intr_abort: remove\n"));
   2114   1.133.2.6   nathanw 		xfer->pipe->intrxfer = NULL;
   2115         1.1  augustss 	}
   2116        1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2117         1.1  augustss }
   2118         1.1  augustss 
   2119         1.1  augustss /* Close a device interrupt pipe. */
   2120         1.1  augustss void
   2121       1.119  augustss uhci_device_intr_close(usbd_pipe_handle pipe)
   2122         1.1  augustss {
   2123         1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2124         1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
   2125        1.92  augustss 	int i, npoll;
   2126        1.92  augustss 	int s;
   2127         1.1  augustss 
   2128         1.1  augustss 	/* Unlink descriptors from controller data structures. */
   2129         1.1  augustss 	npoll = upipe->u.intr.npoll;
   2130        1.92  augustss 	s = splusb();
   2131         1.1  augustss 	for (i = 0; i < npoll; i++)
   2132        1.92  augustss 		uhci_remove_intr(sc, upipe->u.intr.qhs[i]);
   2133        1.92  augustss 	splx(s);
   2134         1.1  augustss 
   2135   1.133.2.6   nathanw 	/*
   2136         1.1  augustss 	 * We now have to wait for any activity on the physical
   2137         1.1  augustss 	 * descriptors to stop.
   2138         1.1  augustss 	 */
   2139        1.20  augustss 	usb_delay_ms(&sc->sc_bus, 2);
   2140         1.1  augustss 
   2141         1.1  augustss 	for(i = 0; i < npoll; i++)
   2142         1.1  augustss 		uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
   2143        1.31  augustss 	free(upipe->u.intr.qhs, M_USBHC);
   2144         1.1  augustss 
   2145         1.1  augustss 	/* XXX free other resources */
   2146         1.1  augustss }
   2147         1.1  augustss 
   2148         1.1  augustss usbd_status
   2149       1.119  augustss uhci_device_request(usbd_xfer_handle xfer)
   2150         1.1  augustss {
   2151        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2152        1.63  augustss 	usb_device_request_t *req = &xfer->request;
   2153         1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2154         1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   2155         1.1  augustss 	int addr = dev->address;
   2156         1.1  augustss 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2157        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2158        1.55  augustss 	uhci_soft_td_t *setup, *data, *stat, *next, *dataend;
   2159         1.1  augustss 	uhci_soft_qh_t *sqh;
   2160         1.1  augustss 	int len;
   2161         1.1  augustss 	u_int32_t ls;
   2162        1.63  augustss 	usbd_status err;
   2163         1.1  augustss 	int isread;
   2164         1.1  augustss 	int s;
   2165         1.1  augustss 
   2166        1.13  augustss 	DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
   2167        1.12  augustss 		    "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
   2168         1.1  augustss 		    req->bmRequestType, req->bRequest, UGETW(req->wValue),
   2169         1.1  augustss 		    UGETW(req->wIndex), UGETW(req->wLength),
   2170         1.1  augustss 		    addr, endpt));
   2171         1.1  augustss 
   2172   1.133.2.5   nathanw 	ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0;
   2173         1.1  augustss 	isread = req->bmRequestType & UT_READ;
   2174         1.1  augustss 	len = UGETW(req->wLength);
   2175         1.1  augustss 
   2176         1.1  augustss 	setup = upipe->u.ctl.setup;
   2177         1.1  augustss 	stat = upipe->u.ctl.stat;
   2178         1.1  augustss 	sqh = upipe->u.ctl.sqh;
   2179         1.1  augustss 
   2180         1.1  augustss 	/* Set up data transaction */
   2181         1.1  augustss 	if (len != 0) {
   2182        1.38  augustss 		upipe->nexttoggle = 1;
   2183        1.73  augustss 		err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
   2184        1.73  augustss 					   &xfer->dmabuf, &data, &dataend);
   2185        1.63  augustss 		if (err)
   2186        1.63  augustss 			return (err);
   2187        1.55  augustss 		next = data;
   2188        1.55  augustss 		dataend->link.std = stat;
   2189       1.121  augustss 		dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
   2190         1.1  augustss 	} else {
   2191         1.1  augustss 		next = stat;
   2192         1.1  augustss 	}
   2193         1.1  augustss 	upipe->u.ctl.length = len;
   2194         1.1  augustss 
   2195   1.133.2.8   nathanw 	memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req);
   2196         1.1  augustss 
   2197        1.42  augustss 	setup->link.std = next;
   2198       1.121  augustss 	setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
   2199        1.88   tsutsui 	setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
   2200        1.88   tsutsui 		UHCI_TD_ACTIVE);
   2201        1.88   tsutsui 	setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr));
   2202   1.133.2.8   nathanw 	setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0));
   2203        1.42  augustss 
   2204        1.92  augustss 	stat->link.std = NULL;
   2205        1.88   tsutsui 	stat->td.td_link = htole32(UHCI_PTR_T);
   2206   1.133.2.6   nathanw 	stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
   2207        1.39  augustss 		UHCI_TD_ACTIVE | UHCI_TD_IOC);
   2208   1.133.2.6   nathanw 	stat->td.td_token =
   2209        1.88   tsutsui 		htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
   2210        1.88   tsutsui 		                 UHCI_TD_IN (0, endpt, addr, 1));
   2211        1.88   tsutsui 	stat->td.td_buffer = htole32(0);
   2212         1.1  augustss 
   2213        1.59  augustss #ifdef UHCI_DEBUG
   2214        1.67  augustss 	if (uhcidebug > 10) {
   2215        1.47  augustss 		DPRINTF(("uhci_device_request: before transfer\n"));
   2216        1.41  augustss 		uhci_dump_tds(setup);
   2217         1.1  augustss 	}
   2218         1.1  augustss #endif
   2219         1.1  augustss 
   2220         1.1  augustss 	/* Set up interrupt info. */
   2221        1.63  augustss 	ii->xfer = xfer;
   2222         1.1  augustss 	ii->stdstart = setup;
   2223         1.1  augustss 	ii->stdend = stat;
   2224         1.7  augustss #ifdef DIAGNOSTIC
   2225        1.70  augustss 	if (!ii->isdone) {
   2226        1.70  augustss 		printf("uhci_device_request: not done, ii=%p\n", ii);
   2227        1.70  augustss 	}
   2228         1.7  augustss 	ii->isdone = 0;
   2229         1.7  augustss #endif
   2230         1.1  augustss 
   2231        1.42  augustss 	sqh->elink = setup;
   2232       1.121  augustss 	sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD);
   2233         1.1  augustss 
   2234         1.1  augustss 	s = splusb();
   2235   1.133.2.5   nathanw 	if (dev->speed == USB_SPEED_LOW)
   2236       1.123  augustss 		uhci_add_ls_ctrl(sc, sqh);
   2237       1.123  augustss 	else
   2238       1.123  augustss 		uhci_add_hs_ctrl(sc, sqh);
   2239        1.92  augustss 	uhci_add_intr_info(sc, ii);
   2240        1.59  augustss #ifdef UHCI_DEBUG
   2241         1.1  augustss 	if (uhcidebug > 12) {
   2242         1.1  augustss 		uhci_soft_td_t *std;
   2243         1.1  augustss 		uhci_soft_qh_t *xqh;
   2244        1.13  augustss 		uhci_soft_qh_t *sxqh;
   2245        1.13  augustss 		int maxqh = 0;
   2246         1.1  augustss 		uhci_physaddr_t link;
   2247        1.47  augustss 		DPRINTF(("uhci_enter_ctl_q: follow from [0]\n"));
   2248         1.1  augustss 		for (std = sc->sc_vframes[0].htd, link = 0;
   2249       1.121  augustss 		     (link & UHCI_PTR_QH) == 0;
   2250        1.42  augustss 		     std = std->link.std) {
   2251        1.88   tsutsui 			link = le32toh(std->td.td_link);
   2252         1.1  augustss 			uhci_dump_td(std);
   2253         1.1  augustss 		}
   2254        1.67  augustss 		sxqh = (uhci_soft_qh_t *)std;
   2255        1.67  augustss 		uhci_dump_qh(sxqh);
   2256        1.67  augustss 		for (xqh = sxqh;
   2257        1.63  augustss 		     xqh != NULL;
   2258   1.133.2.6   nathanw 		     xqh = (maxqh++ == 5 || xqh->hlink == sxqh ||
   2259       1.121  augustss                             xqh->hlink == xqh ? NULL : xqh->hlink)) {
   2260         1.1  augustss 			uhci_dump_qh(xqh);
   2261        1.13  augustss 		}
   2262        1.47  augustss 		DPRINTF(("Enqueued QH:\n"));
   2263         1.1  augustss 		uhci_dump_qh(sqh);
   2264        1.42  augustss 		uhci_dump_tds(sqh->elink);
   2265         1.1  augustss 	}
   2266         1.1  augustss #endif
   2267        1.63  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   2268        1.96  augustss 		usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
   2269        1.91  augustss 			    uhci_timeout, ii);
   2270        1.13  augustss 	}
   2271        1.92  augustss 	xfer->status = USBD_IN_PROGRESS;
   2272         1.1  augustss 	splx(s);
   2273         1.1  augustss 
   2274         1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   2275         1.1  augustss }
   2276         1.1  augustss 
   2277        1.16  augustss usbd_status
   2278       1.119  augustss uhci_device_isoc_transfer(usbd_xfer_handle xfer)
   2279        1.16  augustss {
   2280        1.63  augustss 	usbd_status err;
   2281        1.48  augustss 
   2282        1.63  augustss 	DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer));
   2283        1.48  augustss 
   2284        1.48  augustss 	/* Put it on our queue, */
   2285        1.63  augustss 	err = usb_insert_transfer(xfer);
   2286        1.48  augustss 
   2287        1.48  augustss 	/* bail out on error, */
   2288        1.63  augustss 	if (err && err != USBD_IN_PROGRESS)
   2289        1.63  augustss 		return (err);
   2290        1.48  augustss 
   2291        1.48  augustss 	/* XXX should check inuse here */
   2292        1.48  augustss 
   2293        1.48  augustss 	/* insert into schedule, */
   2294        1.63  augustss 	uhci_device_isoc_enter(xfer);
   2295        1.48  augustss 
   2296       1.102  augustss 	/* and start if the pipe wasn't running */
   2297        1.67  augustss 	if (!err)
   2298        1.63  augustss 		uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
   2299        1.48  augustss 
   2300        1.63  augustss 	return (err);
   2301        1.48  augustss }
   2302        1.48  augustss 
   2303        1.48  augustss void
   2304       1.119  augustss uhci_device_isoc_enter(usbd_xfer_handle xfer)
   2305        1.48  augustss {
   2306        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2307        1.16  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2308        1.16  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   2309        1.48  augustss 	struct iso *iso = &upipe->u.iso;
   2310   1.133.2.6   nathanw 	uhci_soft_td_t *std;
   2311        1.48  augustss 	u_int32_t buf, len, status;
   2312        1.48  augustss 	int s, i, next, nframes;
   2313        1.48  augustss 
   2314        1.63  augustss 	DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p "
   2315        1.48  augustss 		    "nframes=%d\n",
   2316        1.63  augustss 		    iso->inuse, iso->next, xfer, xfer->nframes));
   2317        1.48  augustss 
   2318        1.82  augustss 	if (sc->sc_dying)
   2319        1.82  augustss 		return;
   2320        1.82  augustss 
   2321        1.63  augustss 	if (xfer->status == USBD_IN_PROGRESS) {
   2322        1.48  augustss 		/* This request has already been entered into the frame list */
   2323        1.96  augustss 		printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer);
   2324        1.68  augustss 		/* XXX */
   2325        1.48  augustss 	}
   2326        1.48  augustss 
   2327        1.48  augustss #ifdef DIAGNOSTIC
   2328        1.48  augustss 	if (iso->inuse >= UHCI_VFRAMELIST_COUNT)
   2329        1.48  augustss 		printf("uhci_device_isoc_enter: overflow!\n");
   2330        1.19  augustss #endif
   2331        1.16  augustss 
   2332        1.48  augustss 	next = iso->next;
   2333        1.48  augustss 	if (next == -1) {
   2334        1.48  augustss 		/* Not in use yet, schedule it a few frames ahead. */
   2335        1.48  augustss 		next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
   2336        1.48  augustss 		DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next));
   2337        1.48  augustss 	}
   2338        1.48  augustss 
   2339        1.63  augustss 	xfer->status = USBD_IN_PROGRESS;
   2340        1.92  augustss 	UXFER(xfer)->curframe = next;
   2341        1.48  augustss 
   2342   1.133.2.8   nathanw 	buf = DMAADDR(&xfer->dmabuf, 0);
   2343        1.88   tsutsui 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |
   2344        1.88   tsutsui 				     UHCI_TD_ACTIVE |
   2345        1.88   tsutsui 				     UHCI_TD_IOS);
   2346        1.63  augustss 	nframes = xfer->nframes;
   2347        1.48  augustss 	s = splusb();
   2348        1.48  augustss 	for (i = 0; i < nframes; i++) {
   2349        1.48  augustss 		std = iso->stds[next];
   2350        1.48  augustss 		if (++next >= UHCI_VFRAMELIST_COUNT)
   2351        1.48  augustss 			next = 0;
   2352        1.63  augustss 		len = xfer->frlengths[i];
   2353        1.88   tsutsui 		std->td.td_buffer = htole32(buf);
   2354        1.48  augustss 		if (i == nframes - 1)
   2355        1.88   tsutsui 			status |= UHCI_TD_IOC;
   2356        1.88   tsutsui 		std->td.td_status = htole32(status);
   2357        1.88   tsutsui 		std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK);
   2358        1.88   tsutsui 		std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len));
   2359        1.59  augustss #ifdef UHCI_DEBUG
   2360        1.48  augustss 		if (uhcidebug > 5) {
   2361        1.48  augustss 			DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i));
   2362        1.48  augustss 			uhci_dump_td(std);
   2363        1.48  augustss 		}
   2364        1.48  augustss #endif
   2365        1.48  augustss 		buf += len;
   2366        1.48  augustss 	}
   2367        1.48  augustss 	iso->next = next;
   2368        1.63  augustss 	iso->inuse += xfer->nframes;
   2369        1.16  augustss 
   2370        1.48  augustss 	splx(s);
   2371        1.16  augustss }
   2372        1.16  augustss 
   2373        1.16  augustss usbd_status
   2374       1.119  augustss uhci_device_isoc_start(usbd_xfer_handle xfer)
   2375        1.16  augustss {
   2376        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2377        1.48  augustss 	uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
   2378        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2379        1.48  augustss 	uhci_soft_td_t *end;
   2380        1.48  augustss 	int s, i;
   2381        1.48  augustss 
   2382        1.96  augustss 	DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer));
   2383        1.96  augustss 
   2384        1.82  augustss 	if (sc->sc_dying)
   2385        1.82  augustss 		return (USBD_IOERROR);
   2386        1.82  augustss 
   2387        1.48  augustss #ifdef DIAGNOSTIC
   2388        1.63  augustss 	if (xfer->status != USBD_IN_PROGRESS)
   2389        1.63  augustss 		printf("uhci_device_isoc_start: not in progress %p\n", xfer);
   2390        1.48  augustss #endif
   2391        1.48  augustss 
   2392        1.48  augustss 	/* Find the last TD */
   2393        1.92  augustss 	i = UXFER(xfer)->curframe + xfer->nframes;
   2394        1.48  augustss 	if (i >= UHCI_VFRAMELIST_COUNT)
   2395        1.48  augustss 		i -= UHCI_VFRAMELIST_COUNT;
   2396        1.48  augustss 	end = upipe->u.iso.stds[i];
   2397        1.48  augustss 
   2398        1.96  augustss #ifdef DIAGNOSTIC
   2399        1.96  augustss 	if (end == NULL) {
   2400        1.96  augustss 		printf("uhci_device_isoc_start: end == NULL\n");
   2401        1.96  augustss 		return (USBD_INVAL);
   2402        1.96  augustss 	}
   2403        1.96  augustss #endif
   2404        1.96  augustss 
   2405        1.48  augustss 	s = splusb();
   2406   1.133.2.6   nathanw 
   2407        1.48  augustss 	/* Set up interrupt info. */
   2408        1.63  augustss 	ii->xfer = xfer;
   2409        1.48  augustss 	ii->stdstart = end;
   2410        1.48  augustss 	ii->stdend = end;
   2411        1.48  augustss #ifdef DIAGNOSTIC
   2412       1.102  augustss 	if (!ii->isdone)
   2413        1.70  augustss 		printf("uhci_device_isoc_start: not done, ii=%p\n", ii);
   2414        1.48  augustss 	ii->isdone = 0;
   2415        1.48  augustss #endif
   2416        1.92  augustss 	uhci_add_intr_info(sc, ii);
   2417   1.133.2.6   nathanw 
   2418        1.48  augustss 	splx(s);
   2419        1.48  augustss 
   2420        1.48  augustss 	return (USBD_IN_PROGRESS);
   2421        1.16  augustss }
   2422        1.16  augustss 
   2423        1.16  augustss void
   2424       1.119  augustss uhci_device_isoc_abort(usbd_xfer_handle xfer)
   2425        1.16  augustss {
   2426        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2427        1.48  augustss 	uhci_soft_td_t **stds = upipe->u.iso.stds;
   2428        1.48  augustss 	uhci_soft_td_t *std;
   2429        1.92  augustss 	int i, n, s, nframes, maxlen, len;
   2430        1.92  augustss 
   2431        1.92  augustss 	s = splusb();
   2432        1.92  augustss 
   2433        1.92  augustss 	/* Transfer is already done. */
   2434   1.133.2.6   nathanw 	if (xfer->status != USBD_NOT_STARTED &&
   2435        1.92  augustss 	    xfer->status != USBD_IN_PROGRESS) {
   2436        1.92  augustss 		splx(s);
   2437        1.92  augustss 		return;
   2438        1.92  augustss 	}
   2439        1.48  augustss 
   2440        1.92  augustss 	/* Give xfer the requested abort code. */
   2441        1.63  augustss 	xfer->status = USBD_CANCELLED;
   2442        1.48  augustss 
   2443        1.48  augustss 	/* make hardware ignore it, */
   2444        1.63  augustss 	nframes = xfer->nframes;
   2445        1.92  augustss 	n = UXFER(xfer)->curframe;
   2446        1.92  augustss 	maxlen = 0;
   2447        1.48  augustss 	for (i = 0; i < nframes; i++) {
   2448        1.48  augustss 		std = stds[n];
   2449        1.88   tsutsui 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
   2450       1.130   tsutsui 		len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token));
   2451        1.92  augustss 		if (len > maxlen)
   2452        1.92  augustss 			maxlen = len;
   2453        1.48  augustss 		if (++n >= UHCI_VFRAMELIST_COUNT)
   2454        1.48  augustss 			n = 0;
   2455        1.48  augustss 	}
   2456        1.48  augustss 
   2457        1.92  augustss 	/* and wait until we are sure the hardware has finished. */
   2458        1.92  augustss 	delay(maxlen);
   2459        1.92  augustss 
   2460        1.96  augustss #ifdef DIAGNOSTIC
   2461        1.96  augustss 	UXFER(xfer)->iinfo.isdone = 1;
   2462        1.96  augustss #endif
   2463        1.92  augustss 	/* Run callback and remove from interrupt list. */
   2464        1.92  augustss 	usb_transfer_complete(xfer);
   2465        1.48  augustss 
   2466        1.92  augustss 	splx(s);
   2467        1.16  augustss }
   2468        1.16  augustss 
   2469        1.16  augustss void
   2470       1.119  augustss uhci_device_isoc_close(usbd_pipe_handle pipe)
   2471        1.16  augustss {
   2472        1.16  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2473        1.16  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2474        1.16  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   2475        1.48  augustss 	uhci_soft_td_t *std, *vstd;
   2476        1.16  augustss 	struct iso *iso;
   2477        1.92  augustss 	int i, s;
   2478        1.16  augustss 
   2479        1.16  augustss 	/*
   2480        1.16  augustss 	 * Make sure all TDs are marked as inactive.
   2481        1.16  augustss 	 * Wait for completion.
   2482        1.16  augustss 	 * Unschedule.
   2483        1.16  augustss 	 * Deallocate.
   2484        1.16  augustss 	 */
   2485        1.16  augustss 	iso = &upipe->u.iso;
   2486        1.16  augustss 
   2487        1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++)
   2488        1.88   tsutsui 		iso->stds[i]->td.td_status &= htole32(~UHCI_TD_ACTIVE);
   2489        1.20  augustss 	usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */
   2490        1.16  augustss 
   2491        1.92  augustss 	s = splusb();
   2492        1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2493        1.16  augustss 		std = iso->stds[i];
   2494        1.48  augustss 		for (vstd = sc->sc_vframes[i].htd;
   2495        1.67  augustss 		     vstd != NULL && vstd->link.std != std;
   2496        1.42  augustss 		     vstd = vstd->link.std)
   2497        1.16  augustss 			;
   2498        1.67  augustss 		if (vstd == NULL) {
   2499        1.16  augustss 			/*panic*/
   2500        1.16  augustss 			printf("uhci_device_isoc_close: %p not found\n", std);
   2501        1.92  augustss 			splx(s);
   2502        1.16  augustss 			return;
   2503        1.16  augustss 		}
   2504        1.42  augustss 		vstd->link = std->link;
   2505        1.42  augustss 		vstd->td.td_link = std->td.td_link;
   2506        1.16  augustss 		uhci_free_std(sc, std);
   2507        1.16  augustss 	}
   2508        1.92  augustss 	splx(s);
   2509        1.16  augustss 
   2510        1.31  augustss 	free(iso->stds, M_USBHC);
   2511        1.16  augustss }
   2512        1.16  augustss 
   2513        1.16  augustss usbd_status
   2514       1.119  augustss uhci_setup_isoc(usbd_pipe_handle pipe)
   2515        1.16  augustss {
   2516        1.16  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2517        1.16  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2518        1.16  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   2519        1.16  augustss 	int addr = upipe->pipe.device->address;
   2520        1.16  augustss 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2521        1.45  augustss 	int rd = UE_GET_DIR(endpt) == UE_DIR_IN;
   2522        1.48  augustss 	uhci_soft_td_t *std, *vstd;
   2523        1.48  augustss 	u_int32_t token;
   2524        1.16  augustss 	struct iso *iso;
   2525        1.92  augustss 	int i, s;
   2526        1.16  augustss 
   2527        1.16  augustss 	iso = &upipe->u.iso;
   2528        1.16  augustss 	iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *),
   2529        1.31  augustss 			   M_USBHC, M_WAITOK);
   2530        1.16  augustss 
   2531        1.88   tsutsui 	token = rd ? UHCI_TD_IN (0, endpt, addr, 0) :
   2532        1.88   tsutsui 		     UHCI_TD_OUT(0, endpt, addr, 0);
   2533        1.16  augustss 
   2534        1.48  augustss 	/* Allocate the TDs and mark as inactive; */
   2535        1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2536        1.48  augustss 		std = uhci_alloc_std(sc);
   2537        1.48  augustss 		if (std == 0)
   2538        1.48  augustss 			goto bad;
   2539        1.88   tsutsui 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
   2540        1.88   tsutsui 		std->td.td_token = htole32(token);
   2541        1.48  augustss 		iso->stds[i] = std;
   2542        1.16  augustss 	}
   2543        1.16  augustss 
   2544        1.48  augustss 	/* Insert TDs into schedule. */
   2545        1.92  augustss 	s = splusb();
   2546        1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2547        1.16  augustss 		std = iso->stds[i];
   2548        1.48  augustss 		vstd = sc->sc_vframes[i].htd;
   2549        1.42  augustss 		std->link = vstd->link;
   2550        1.42  augustss 		std->td.td_link = vstd->td.td_link;
   2551        1.42  augustss 		vstd->link.std = std;
   2552       1.121  augustss 		vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD);
   2553        1.16  augustss 	}
   2554        1.92  augustss 	splx(s);
   2555        1.16  augustss 
   2556        1.48  augustss 	iso->next = -1;
   2557        1.48  augustss 	iso->inuse = 0;
   2558        1.48  augustss 
   2559        1.16  augustss 	return (USBD_NORMAL_COMPLETION);
   2560        1.16  augustss 
   2561        1.48  augustss  bad:
   2562        1.16  augustss 	while (--i >= 0)
   2563        1.16  augustss 		uhci_free_std(sc, iso->stds[i]);
   2564        1.31  augustss 	free(iso->stds, M_USBHC);
   2565        1.16  augustss 	return (USBD_NOMEM);
   2566        1.16  augustss }
   2567        1.16  augustss 
   2568        1.16  augustss void
   2569       1.119  augustss uhci_device_isoc_done(usbd_xfer_handle xfer)
   2570        1.16  augustss {
   2571        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2572        1.48  augustss 
   2573        1.63  augustss 	DPRINTFN(4, ("uhci_isoc_done: length=%d\n", xfer->actlen));
   2574        1.93  augustss 
   2575        1.96  augustss 	if (ii->xfer != xfer)
   2576        1.96  augustss 		/* Not on interrupt list, ignore it. */
   2577        1.96  augustss 		return;
   2578        1.96  augustss 
   2579        1.93  augustss #ifdef DIAGNOSTIC
   2580        1.94  augustss 	if (xfer->busy_free != XFER_BUSY) {
   2581        1.94  augustss 		printf("uhci_device_isoc_done: xfer=%p not busy 0x%08x\n",
   2582        1.94  augustss 		       xfer, xfer->busy_free);
   2583        1.93  augustss 		return;
   2584        1.93  augustss 	}
   2585        1.93  augustss 
   2586        1.93  augustss         if (ii->stdend == NULL) {
   2587        1.93  augustss                 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
   2588        1.93  augustss #ifdef UHCI_DEBUG
   2589        1.93  augustss 		uhci_dump_ii(ii);
   2590        1.93  augustss #endif
   2591        1.93  augustss 		return;
   2592        1.93  augustss 	}
   2593        1.93  augustss #endif
   2594        1.48  augustss 
   2595        1.48  augustss 	/* Turn off the interrupt since it is active even if the TD is not. */
   2596        1.88   tsutsui 	ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC);
   2597        1.48  augustss 
   2598        1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   2599        1.16  augustss }
   2600        1.16  augustss 
   2601         1.1  augustss void
   2602       1.119  augustss uhci_device_intr_done(usbd_xfer_handle xfer)
   2603         1.1  augustss {
   2604        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2605         1.1  augustss 	uhci_softc_t *sc = ii->sc;
   2606        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2607         1.1  augustss 	uhci_soft_qh_t *sqh;
   2608         1.1  augustss 	int i, npoll;
   2609         1.1  augustss 
   2610        1.63  augustss 	DPRINTFN(5, ("uhci_intr_done: length=%d\n", xfer->actlen));
   2611         1.1  augustss 
   2612         1.1  augustss 	npoll = upipe->u.intr.npoll;
   2613         1.1  augustss 	for(i = 0; i < npoll; i++) {
   2614         1.1  augustss 		sqh = upipe->u.intr.qhs[i];
   2615       1.121  augustss 		sqh->elink = NULL;
   2616        1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   2617         1.1  augustss 	}
   2618   1.133.2.5   nathanw 	uhci_free_std_chain(sc, ii->stdstart, NULL);
   2619         1.1  augustss 
   2620         1.1  augustss 	/* XXX Wasteful. */
   2621        1.63  augustss 	if (xfer->pipe->repeat) {
   2622        1.55  augustss 		uhci_soft_td_t *data, *dataend;
   2623         1.1  augustss 
   2624        1.92  augustss 		DPRINTFN(5,("uhci_device_intr_done: requeing\n"));
   2625        1.92  augustss 
   2626         1.1  augustss 		/* This alloc cannot fail since we freed the chain above. */
   2627        1.73  augustss 		uhci_alloc_std_chain(upipe, sc, xfer->length, 1, xfer->flags,
   2628        1.63  augustss 				     &xfer->dmabuf, &data, &dataend);
   2629        1.88   tsutsui 		dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2630         1.1  augustss 
   2631        1.59  augustss #ifdef UHCI_DEBUG
   2632         1.1  augustss 		if (uhcidebug > 10) {
   2633        1.55  augustss 			DPRINTF(("uhci_device_intr_done: data(1)\n"));
   2634        1.55  augustss 			uhci_dump_tds(data);
   2635         1.1  augustss 			uhci_dump_qh(upipe->u.intr.qhs[0]);
   2636         1.1  augustss 		}
   2637         1.1  augustss #endif
   2638         1.1  augustss 
   2639        1.55  augustss 		ii->stdstart = data;
   2640        1.55  augustss 		ii->stdend = dataend;
   2641         1.7  augustss #ifdef DIAGNOSTIC
   2642        1.70  augustss 		if (!ii->isdone) {
   2643        1.70  augustss 			printf("uhci_device_intr_done: not done, ii=%p\n", ii);
   2644        1.70  augustss 		}
   2645         1.7  augustss 		ii->isdone = 0;
   2646         1.7  augustss #endif
   2647         1.1  augustss 		for (i = 0; i < npoll; i++) {
   2648         1.1  augustss 			sqh = upipe->u.intr.qhs[i];
   2649        1.55  augustss 			sqh->elink = data;
   2650       1.121  augustss 			sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2651         1.1  augustss 		}
   2652        1.92  augustss 		xfer->status = USBD_IN_PROGRESS;
   2653        1.92  augustss 		/* The ii is already on the examined list, just leave it. */
   2654         1.1  augustss 	} else {
   2655        1.92  augustss 		DPRINTFN(5,("uhci_device_intr_done: removing\n"));
   2656        1.92  augustss 		uhci_del_intr_info(ii);
   2657         1.1  augustss 	}
   2658         1.1  augustss }
   2659         1.1  augustss 
   2660         1.1  augustss /* Deallocate request data structures */
   2661         1.1  augustss void
   2662       1.119  augustss uhci_device_ctrl_done(usbd_xfer_handle xfer)
   2663         1.1  augustss {
   2664        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2665         1.1  augustss 	uhci_softc_t *sc = ii->sc;
   2666        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2667         1.1  augustss 
   2668         1.7  augustss #ifdef DIAGNOSTIC
   2669        1.63  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   2670         1.1  augustss 		panic("uhci_ctrl_done: not a request\n");
   2671         1.7  augustss #endif
   2672         1.1  augustss 
   2673        1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   2674         1.1  augustss 
   2675   1.133.2.5   nathanw 	if (upipe->pipe.device->speed == USB_SPEED_LOW)
   2676       1.123  augustss 		uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh);
   2677       1.123  augustss 	else
   2678       1.123  augustss 		uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh);
   2679         1.1  augustss 
   2680        1.49  augustss 	if (upipe->u.ctl.length != 0)
   2681        1.42  augustss 		uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend);
   2682        1.49  augustss 
   2683        1.63  augustss 	DPRINTFN(5, ("uhci_ctrl_done: length=%d\n", xfer->actlen));
   2684         1.1  augustss }
   2685         1.1  augustss 
   2686         1.1  augustss /* Deallocate request data structures */
   2687         1.1  augustss void
   2688       1.119  augustss uhci_device_bulk_done(usbd_xfer_handle xfer)
   2689         1.1  augustss {
   2690        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2691         1.1  augustss 	uhci_softc_t *sc = ii->sc;
   2692        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2693         1.1  augustss 
   2694        1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   2695         1.1  augustss 
   2696         1.1  augustss 	uhci_remove_bulk(sc, upipe->u.bulk.sqh);
   2697        1.32  augustss 
   2698   1.133.2.5   nathanw 	uhci_free_std_chain(sc, ii->stdstart, NULL);
   2699        1.32  augustss 
   2700        1.63  augustss 	DPRINTFN(5, ("uhci_bulk_done: length=%d\n", xfer->actlen));
   2701         1.1  augustss }
   2702         1.1  augustss 
   2703         1.1  augustss /* Add interrupt QH, called with vflock. */
   2704         1.1  augustss void
   2705       1.119  augustss uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   2706         1.1  augustss {
   2707        1.92  augustss 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
   2708        1.42  augustss 	uhci_soft_qh_t *eqh;
   2709         1.1  augustss 
   2710        1.92  augustss 	DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh));
   2711        1.92  augustss 
   2712        1.42  augustss 	eqh = vf->eqh;
   2713        1.42  augustss 	sqh->hlink       = eqh->hlink;
   2714        1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   2715        1.42  augustss 	eqh->hlink       = sqh;
   2716       1.121  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   2717         1.1  augustss 	vf->eqh = sqh;
   2718         1.1  augustss 	vf->bandwidth++;
   2719         1.1  augustss }
   2720         1.1  augustss 
   2721       1.119  augustss /* Remove interrupt QH. */
   2722         1.1  augustss void
   2723       1.119  augustss uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   2724         1.1  augustss {
   2725        1.92  augustss 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
   2726         1.1  augustss 	uhci_soft_qh_t *pqh;
   2727         1.1  augustss 
   2728        1.92  augustss 	DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh));
   2729         1.1  augustss 
   2730       1.124  augustss 	/* See comment in uhci_remove_ctrl() */
   2731       1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   2732       1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   2733       1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   2734       1.124  augustss 	}
   2735       1.124  augustss 
   2736        1.92  augustss 	pqh = uhci_find_prev_qh(vf->hqh, sqh);
   2737        1.42  augustss 	pqh->hlink       = sqh->hlink;
   2738        1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   2739       1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   2740         1.1  augustss 	if (vf->eqh == sqh)
   2741         1.1  augustss 		vf->eqh = pqh;
   2742         1.1  augustss 	vf->bandwidth--;
   2743         1.1  augustss }
   2744         1.1  augustss 
   2745         1.1  augustss usbd_status
   2746       1.119  augustss uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival)
   2747         1.1  augustss {
   2748         1.1  augustss 	uhci_soft_qh_t *sqh;
   2749         1.1  augustss 	int i, npoll, s;
   2750         1.1  augustss 	u_int bestbw, bw, bestoffs, offs;
   2751         1.1  augustss 
   2752         1.1  augustss 	DPRINTFN(2, ("uhci_setintr: pipe=%p\n", upipe));
   2753         1.1  augustss 	if (ival == 0) {
   2754         1.1  augustss 		printf("uhci_setintr: 0 interval\n");
   2755         1.1  augustss 		return (USBD_INVAL);
   2756         1.1  augustss 	}
   2757         1.1  augustss 
   2758         1.1  augustss 	if (ival > UHCI_VFRAMELIST_COUNT)
   2759         1.1  augustss 		ival = UHCI_VFRAMELIST_COUNT;
   2760         1.1  augustss 	npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
   2761         1.1  augustss 	DPRINTFN(2, ("uhci_setintr: ival=%d npoll=%d\n", ival, npoll));
   2762         1.1  augustss 
   2763         1.1  augustss 	upipe->u.intr.npoll = npoll;
   2764   1.133.2.6   nathanw 	upipe->u.intr.qhs =
   2765        1.31  augustss 		malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK);
   2766         1.1  augustss 
   2767   1.133.2.6   nathanw 	/*
   2768         1.1  augustss 	 * Figure out which offset in the schedule that has most
   2769         1.1  augustss 	 * bandwidth left over.
   2770         1.1  augustss 	 */
   2771         1.1  augustss #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
   2772         1.1  augustss 	for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
   2773         1.1  augustss 		for (bw = i = 0; i < npoll; i++)
   2774         1.1  augustss 			bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
   2775         1.1  augustss 		if (bw < bestbw) {
   2776         1.1  augustss 			bestbw = bw;
   2777         1.1  augustss 			bestoffs = offs;
   2778         1.1  augustss 		}
   2779         1.1  augustss 	}
   2780         1.1  augustss 	DPRINTFN(1, ("uhci_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
   2781         1.1  augustss 
   2782         1.1  augustss 	for(i = 0; i < npoll; i++) {
   2783         1.1  augustss 		upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
   2784       1.121  augustss 		sqh->elink = NULL;
   2785        1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   2786         1.1  augustss 		sqh->pos = MOD(i * ival + bestoffs);
   2787         1.1  augustss 	}
   2788         1.1  augustss #undef MOD
   2789         1.1  augustss 
   2790         1.1  augustss 	s = splusb();
   2791         1.1  augustss 	/* Enter QHs into the controller data structures. */
   2792         1.1  augustss 	for(i = 0; i < npoll; i++)
   2793        1.92  augustss 		uhci_add_intr(sc, upipe->u.intr.qhs[i]);
   2794        1.92  augustss 	splx(s);
   2795         1.1  augustss 
   2796         1.1  augustss 	DPRINTFN(5, ("uhci_setintr: returns %p\n", upipe));
   2797         1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   2798         1.1  augustss }
   2799         1.1  augustss 
   2800         1.1  augustss /* Open a new pipe. */
   2801         1.1  augustss usbd_status
   2802       1.119  augustss uhci_open(usbd_pipe_handle pipe)
   2803         1.1  augustss {
   2804         1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
   2805         1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2806         1.1  augustss 	usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
   2807        1.63  augustss 	usbd_status err;
   2808        1.79  augustss 	int ival;
   2809         1.1  augustss 
   2810         1.1  augustss 	DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
   2811   1.133.2.6   nathanw 		     pipe, pipe->device->address,
   2812         1.1  augustss 		     ed->bEndpointAddress, sc->sc_addr));
   2813        1.92  augustss 
   2814        1.92  augustss 	upipe->aborting = 0;
   2815        1.92  augustss 	upipe->nexttoggle = 0;
   2816        1.92  augustss 
   2817         1.1  augustss 	if (pipe->device->address == sc->sc_addr) {
   2818         1.1  augustss 		switch (ed->bEndpointAddress) {
   2819         1.1  augustss 		case USB_CONTROL_ENDPOINT:
   2820         1.1  augustss 			pipe->methods = &uhci_root_ctrl_methods;
   2821         1.1  augustss 			break;
   2822        1.45  augustss 		case UE_DIR_IN | UHCI_INTR_ENDPT:
   2823         1.1  augustss 			pipe->methods = &uhci_root_intr_methods;
   2824         1.1  augustss 			break;
   2825         1.1  augustss 		default:
   2826         1.1  augustss 			return (USBD_INVAL);
   2827         1.1  augustss 		}
   2828         1.1  augustss 	} else {
   2829         1.1  augustss 		switch (ed->bmAttributes & UE_XFERTYPE) {
   2830         1.1  augustss 		case UE_CONTROL:
   2831         1.1  augustss 			pipe->methods = &uhci_device_ctrl_methods;
   2832         1.1  augustss 			upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
   2833        1.63  augustss 			if (upipe->u.ctl.sqh == NULL)
   2834         1.5  augustss 				goto bad;
   2835         1.1  augustss 			upipe->u.ctl.setup = uhci_alloc_std(sc);
   2836        1.63  augustss 			if (upipe->u.ctl.setup == NULL) {
   2837         1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   2838         1.5  augustss 				goto bad;
   2839         1.5  augustss 			}
   2840         1.1  augustss 			upipe->u.ctl.stat = uhci_alloc_std(sc);
   2841        1.63  augustss 			if (upipe->u.ctl.stat == NULL) {
   2842         1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   2843         1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.setup);
   2844         1.5  augustss 				goto bad;
   2845         1.5  augustss 			}
   2846   1.133.2.6   nathanw 			err = usb_allocmem(&sc->sc_bus,
   2847   1.133.2.6   nathanw 				  sizeof(usb_device_request_t),
   2848        1.63  augustss 				  0, &upipe->u.ctl.reqdma);
   2849        1.63  augustss 			if (err) {
   2850         1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   2851         1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.setup);
   2852         1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.stat);
   2853         1.5  augustss 				goto bad;
   2854         1.5  augustss 			}
   2855         1.1  augustss 			break;
   2856         1.1  augustss 		case UE_INTERRUPT:
   2857         1.1  augustss 			pipe->methods = &uhci_device_intr_methods;
   2858        1.79  augustss 			ival = pipe->interval;
   2859        1.79  augustss 			if (ival == USBD_DEFAULT_INTERVAL)
   2860        1.79  augustss 				ival = ed->bInterval;
   2861        1.80  augustss 			return (uhci_device_setintr(sc, upipe, ival));
   2862         1.1  augustss 		case UE_ISOCHRONOUS:
   2863        1.16  augustss 			pipe->methods = &uhci_device_isoc_methods;
   2864        1.48  augustss 			return (uhci_setup_isoc(pipe));
   2865         1.1  augustss 		case UE_BULK:
   2866         1.1  augustss 			pipe->methods = &uhci_device_bulk_methods;
   2867         1.1  augustss 			upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
   2868        1.63  augustss 			if (upipe->u.bulk.sqh == NULL)
   2869         1.5  augustss 				goto bad;
   2870         1.1  augustss 			break;
   2871         1.1  augustss 		}
   2872         1.1  augustss 	}
   2873         1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   2874         1.5  augustss 
   2875         1.5  augustss  bad:
   2876         1.5  augustss 	return (USBD_NOMEM);
   2877         1.1  augustss }
   2878         1.1  augustss 
   2879         1.1  augustss /*
   2880         1.1  augustss  * Data structures and routines to emulate the root hub.
   2881         1.1  augustss  */
   2882         1.1  augustss usb_device_descriptor_t uhci_devd = {
   2883         1.1  augustss 	USB_DEVICE_DESCRIPTOR_SIZE,
   2884         1.1  augustss 	UDESC_DEVICE,		/* type */
   2885         1.1  augustss 	{0x00, 0x01},		/* USB version */
   2886        1.87  augustss 	UDCLASS_HUB,		/* class */
   2887        1.87  augustss 	UDSUBCLASS_HUB,		/* subclass */
   2888   1.133.2.5   nathanw 	UDPROTO_FSHUB,		/* protocol */
   2889         1.1  augustss 	64,			/* max packet */
   2890         1.1  augustss 	{0},{0},{0x00,0x01},	/* device id */
   2891         1.1  augustss 	1,2,0,			/* string indicies */
   2892         1.1  augustss 	1			/* # of configurations */
   2893         1.1  augustss };
   2894         1.1  augustss 
   2895         1.1  augustss usb_config_descriptor_t uhci_confd = {
   2896         1.1  augustss 	USB_CONFIG_DESCRIPTOR_SIZE,
   2897         1.1  augustss 	UDESC_CONFIG,
   2898         1.1  augustss 	{USB_CONFIG_DESCRIPTOR_SIZE +
   2899         1.1  augustss 	 USB_INTERFACE_DESCRIPTOR_SIZE +
   2900         1.1  augustss 	 USB_ENDPOINT_DESCRIPTOR_SIZE},
   2901         1.1  augustss 	1,
   2902         1.1  augustss 	1,
   2903         1.1  augustss 	0,
   2904         1.1  augustss 	UC_SELF_POWERED,
   2905         1.1  augustss 	0			/* max power */
   2906         1.1  augustss };
   2907         1.1  augustss 
   2908         1.1  augustss usb_interface_descriptor_t uhci_ifcd = {
   2909         1.1  augustss 	USB_INTERFACE_DESCRIPTOR_SIZE,
   2910         1.1  augustss 	UDESC_INTERFACE,
   2911         1.1  augustss 	0,
   2912         1.1  augustss 	0,
   2913         1.1  augustss 	1,
   2914        1.87  augustss 	UICLASS_HUB,
   2915        1.87  augustss 	UISUBCLASS_HUB,
   2916   1.133.2.5   nathanw 	UIPROTO_FSHUB,
   2917         1.1  augustss 	0
   2918         1.1  augustss };
   2919         1.1  augustss 
   2920         1.1  augustss usb_endpoint_descriptor_t uhci_endpd = {
   2921         1.1  augustss 	USB_ENDPOINT_DESCRIPTOR_SIZE,
   2922         1.1  augustss 	UDESC_ENDPOINT,
   2923        1.45  augustss 	UE_DIR_IN | UHCI_INTR_ENDPT,
   2924         1.1  augustss 	UE_INTERRUPT,
   2925         1.1  augustss 	{8},
   2926         1.1  augustss 	255
   2927         1.1  augustss };
   2928         1.1  augustss 
   2929         1.1  augustss usb_hub_descriptor_t uhci_hubd_piix = {
   2930         1.1  augustss 	USB_HUB_DESCRIPTOR_SIZE,
   2931         1.1  augustss 	UDESC_HUB,
   2932         1.1  augustss 	2,
   2933         1.1  augustss 	{ UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
   2934         1.1  augustss 	50,			/* power on to power good */
   2935         1.1  augustss 	0,
   2936         1.1  augustss 	{ 0x00 },		/* both ports are removable */
   2937         1.1  augustss };
   2938         1.1  augustss 
   2939         1.1  augustss int
   2940       1.119  augustss uhci_str(usb_string_descriptor_t *p, int l, char *s)
   2941         1.1  augustss {
   2942         1.1  augustss 	int i;
   2943         1.1  augustss 
   2944         1.1  augustss 	if (l == 0)
   2945         1.1  augustss 		return (0);
   2946         1.1  augustss 	p->bLength = 2 * strlen(s) + 2;
   2947         1.1  augustss 	if (l == 1)
   2948         1.1  augustss 		return (1);
   2949         1.1  augustss 	p->bDescriptorType = UDESC_STRING;
   2950         1.1  augustss 	l -= 2;
   2951         1.1  augustss 	for (i = 0; s[i] && l > 1; i++, l -= 2)
   2952         1.1  augustss 		USETW2(p->bString[i], 0, s[i]);
   2953         1.1  augustss 	return (2*i+2);
   2954         1.1  augustss }
   2955         1.1  augustss 
   2956         1.1  augustss /*
   2957         1.1  augustss  * Simulate a hardware hub by handling all the necessary requests.
   2958         1.1  augustss  */
   2959         1.1  augustss usbd_status
   2960       1.119  augustss uhci_root_ctrl_transfer(usbd_xfer_handle xfer)
   2961         1.1  augustss {
   2962        1.63  augustss 	usbd_status err;
   2963        1.16  augustss 
   2964        1.52  augustss 	/* Insert last in queue. */
   2965        1.63  augustss 	err = usb_insert_transfer(xfer);
   2966        1.63  augustss 	if (err)
   2967        1.63  augustss 		return (err);
   2968        1.52  augustss 
   2969   1.133.2.6   nathanw 	/*
   2970        1.94  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2971        1.94  augustss 	 * so start it first.
   2972        1.67  augustss 	 */
   2973        1.63  augustss 	return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2974        1.16  augustss }
   2975        1.16  augustss 
   2976        1.16  augustss usbd_status
   2977       1.119  augustss uhci_root_ctrl_start(usbd_xfer_handle xfer)
   2978        1.16  augustss {
   2979        1.63  augustss 	uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
   2980         1.1  augustss 	usb_device_request_t *req;
   2981        1.59  augustss 	void *buf = NULL;
   2982         1.1  augustss 	int port, x;
   2983        1.52  augustss 	int s, len, value, index, status, change, l, totlen = 0;
   2984         1.1  augustss 	usb_port_status_t ps;
   2985        1.63  augustss 	usbd_status err;
   2986         1.1  augustss 
   2987        1.82  augustss 	if (sc->sc_dying)
   2988        1.82  augustss 		return (USBD_IOERROR);
   2989        1.82  augustss 
   2990        1.48  augustss #ifdef DIAGNOSTIC
   2991        1.63  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   2992         1.1  augustss 		panic("uhci_root_ctrl_transfer: not a request\n");
   2993        1.48  augustss #endif
   2994        1.63  augustss 	req = &xfer->request;
   2995         1.1  augustss 
   2996   1.133.2.6   nathanw 	DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
   2997         1.1  augustss 		    req->bmRequestType, req->bRequest));
   2998         1.1  augustss 
   2999         1.1  augustss 	len = UGETW(req->wLength);
   3000         1.1  augustss 	value = UGETW(req->wValue);
   3001         1.1  augustss 	index = UGETW(req->wIndex);
   3002        1.49  augustss 
   3003        1.49  augustss 	if (len != 0)
   3004   1.133.2.8   nathanw 		buf = KERNADDR(&xfer->dmabuf, 0);
   3005        1.49  augustss 
   3006         1.1  augustss #define C(x,y) ((x) | ((y) << 8))
   3007         1.1  augustss 	switch(C(req->bRequest, req->bmRequestType)) {
   3008         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
   3009         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
   3010         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
   3011   1.133.2.6   nathanw 		/*
   3012        1.13  augustss 		 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
   3013         1.1  augustss 		 * for the integrated root hub.
   3014         1.1  augustss 		 */
   3015         1.1  augustss 		break;
   3016         1.1  augustss 	case C(UR_GET_CONFIG, UT_READ_DEVICE):
   3017         1.1  augustss 		if (len > 0) {
   3018         1.1  augustss 			*(u_int8_t *)buf = sc->sc_conf;
   3019         1.1  augustss 			totlen = 1;
   3020         1.1  augustss 		}
   3021         1.1  augustss 		break;
   3022         1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   3023         1.1  augustss 		DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
   3024         1.1  augustss 		switch(value >> 8) {
   3025         1.1  augustss 		case UDESC_DEVICE:
   3026         1.1  augustss 			if ((value & 0xff) != 0) {
   3027        1.63  augustss 				err = USBD_IOERROR;
   3028         1.1  augustss 				goto ret;
   3029         1.1  augustss 			}
   3030         1.1  augustss 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
   3031        1.27  augustss 			USETW(uhci_devd.idVendor, sc->sc_id_vendor);
   3032         1.1  augustss 			memcpy(buf, &uhci_devd, l);
   3033         1.1  augustss 			break;
   3034         1.1  augustss 		case UDESC_CONFIG:
   3035         1.1  augustss 			if ((value & 0xff) != 0) {
   3036        1.63  augustss 				err = USBD_IOERROR;
   3037         1.1  augustss 				goto ret;
   3038         1.1  augustss 			}
   3039         1.1  augustss 			totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
   3040         1.1  augustss 			memcpy(buf, &uhci_confd, l);
   3041         1.1  augustss 			buf = (char *)buf + l;
   3042         1.1  augustss 			len -= l;
   3043         1.1  augustss 			l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
   3044         1.1  augustss 			totlen += l;
   3045         1.1  augustss 			memcpy(buf, &uhci_ifcd, l);
   3046         1.1  augustss 			buf = (char *)buf + l;
   3047         1.1  augustss 			len -= l;
   3048         1.1  augustss 			l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
   3049         1.1  augustss 			totlen += l;
   3050         1.1  augustss 			memcpy(buf, &uhci_endpd, l);
   3051         1.1  augustss 			break;
   3052         1.1  augustss 		case UDESC_STRING:
   3053         1.1  augustss 			if (len == 0)
   3054         1.1  augustss 				break;
   3055         1.1  augustss 			*(u_int8_t *)buf = 0;
   3056         1.1  augustss 			totlen = 1;
   3057         1.1  augustss 			switch (value & 0xff) {
   3058         1.1  augustss 			case 1: /* Vendor */
   3059         1.8  augustss 				totlen = uhci_str(buf, len, sc->sc_vendor);
   3060         1.1  augustss 				break;
   3061         1.1  augustss 			case 2: /* Product */
   3062         1.8  augustss 				totlen = uhci_str(buf, len, "UHCI root hub");
   3063         1.1  augustss 				break;
   3064         1.1  augustss 			}
   3065         1.1  augustss 			break;
   3066         1.1  augustss 		default:
   3067        1.63  augustss 			err = USBD_IOERROR;
   3068         1.1  augustss 			goto ret;
   3069         1.1  augustss 		}
   3070         1.1  augustss 		break;
   3071         1.1  augustss 	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
   3072         1.1  augustss 		if (len > 0) {
   3073         1.1  augustss 			*(u_int8_t *)buf = 0;
   3074         1.1  augustss 			totlen = 1;
   3075         1.1  augustss 		}
   3076         1.1  augustss 		break;
   3077         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_DEVICE):
   3078         1.1  augustss 		if (len > 1) {
   3079         1.1  augustss 			USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
   3080         1.1  augustss 			totlen = 2;
   3081         1.1  augustss 		}
   3082         1.1  augustss 		break;
   3083         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_INTERFACE):
   3084         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
   3085         1.1  augustss 		if (len > 1) {
   3086         1.1  augustss 			USETW(((usb_status_t *)buf)->wStatus, 0);
   3087         1.1  augustss 			totlen = 2;
   3088         1.1  augustss 		}
   3089         1.1  augustss 		break;
   3090         1.1  augustss 	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
   3091         1.1  augustss 		if (value >= USB_MAX_DEVICES) {
   3092        1.63  augustss 			err = USBD_IOERROR;
   3093         1.1  augustss 			goto ret;
   3094         1.1  augustss 		}
   3095         1.1  augustss 		sc->sc_addr = value;
   3096         1.1  augustss 		break;
   3097         1.1  augustss 	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
   3098         1.1  augustss 		if (value != 0 && value != 1) {
   3099        1.63  augustss 			err = USBD_IOERROR;
   3100         1.1  augustss 			goto ret;
   3101         1.1  augustss 		}
   3102         1.1  augustss 		sc->sc_conf = value;
   3103         1.1  augustss 		break;
   3104         1.1  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
   3105         1.1  augustss 		break;
   3106         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
   3107         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
   3108         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
   3109        1.63  augustss 		err = USBD_IOERROR;
   3110         1.1  augustss 		goto ret;
   3111         1.1  augustss 	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
   3112         1.1  augustss 		break;
   3113         1.1  augustss 	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
   3114         1.1  augustss 		break;
   3115         1.1  augustss 	/* Hub requests */
   3116         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   3117         1.1  augustss 		break;
   3118         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   3119        1.12  augustss 		DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
   3120        1.12  augustss 			     "port=%d feature=%d\n",
   3121         1.1  augustss 			     index, value));
   3122         1.1  augustss 		if (index == 1)
   3123         1.1  augustss 			port = UHCI_PORTSC1;
   3124         1.1  augustss 		else if (index == 2)
   3125         1.1  augustss 			port = UHCI_PORTSC2;
   3126         1.1  augustss 		else {
   3127        1.63  augustss 			err = USBD_IOERROR;
   3128         1.1  augustss 			goto ret;
   3129         1.1  augustss 		}
   3130         1.1  augustss 		switch(value) {
   3131         1.1  augustss 		case UHF_PORT_ENABLE:
   3132   1.133.2.2   nathanw 			x = URWMASK(UREAD2(sc, port));
   3133         1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
   3134         1.1  augustss 			break;
   3135         1.1  augustss 		case UHF_PORT_SUSPEND:
   3136   1.133.2.2   nathanw 			x = URWMASK(UREAD2(sc, port));
   3137         1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
   3138         1.1  augustss 			break;
   3139         1.1  augustss 		case UHF_PORT_RESET:
   3140   1.133.2.2   nathanw 			x = URWMASK(UREAD2(sc, port));
   3141         1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
   3142         1.1  augustss 			break;
   3143         1.1  augustss 		case UHF_C_PORT_CONNECTION:
   3144   1.133.2.2   nathanw 			x = URWMASK(UREAD2(sc, port));
   3145         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
   3146         1.1  augustss 			break;
   3147         1.1  augustss 		case UHF_C_PORT_ENABLE:
   3148   1.133.2.2   nathanw 			x = URWMASK(UREAD2(sc, port));
   3149         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
   3150         1.1  augustss 			break;
   3151         1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   3152   1.133.2.2   nathanw 			x = URWMASK(UREAD2(sc, port));
   3153         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
   3154         1.1  augustss 			break;
   3155         1.1  augustss 		case UHF_C_PORT_RESET:
   3156         1.1  augustss 			sc->sc_isreset = 0;
   3157        1.63  augustss 			err = USBD_NORMAL_COMPLETION;
   3158         1.1  augustss 			goto ret;
   3159         1.1  augustss 		case UHF_PORT_CONNECTION:
   3160         1.1  augustss 		case UHF_PORT_OVER_CURRENT:
   3161         1.1  augustss 		case UHF_PORT_POWER:
   3162         1.1  augustss 		case UHF_PORT_LOW_SPEED:
   3163         1.1  augustss 		case UHF_C_PORT_SUSPEND:
   3164         1.1  augustss 		default:
   3165        1.63  augustss 			err = USBD_IOERROR;
   3166         1.1  augustss 			goto ret;
   3167         1.1  augustss 		}
   3168         1.1  augustss 		break;
   3169         1.1  augustss 	case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
   3170         1.1  augustss 		if (index == 1)
   3171         1.1  augustss 			port = UHCI_PORTSC1;
   3172         1.1  augustss 		else if (index == 2)
   3173         1.1  augustss 			port = UHCI_PORTSC2;
   3174         1.1  augustss 		else {
   3175        1.63  augustss 			err = USBD_IOERROR;
   3176         1.1  augustss 			goto ret;
   3177         1.1  augustss 		}
   3178         1.1  augustss 		if (len > 0) {
   3179   1.133.2.6   nathanw 			*(u_int8_t *)buf =
   3180         1.1  augustss 				(UREAD2(sc, port) & UHCI_PORTSC_LS) >>
   3181         1.1  augustss 				UHCI_PORTSC_LS_SHIFT;
   3182         1.1  augustss 			totlen = 1;
   3183         1.1  augustss 		}
   3184         1.1  augustss 		break;
   3185         1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   3186         1.1  augustss 		if (value != 0) {
   3187        1.63  augustss 			err = USBD_IOERROR;
   3188         1.1  augustss 			goto ret;
   3189         1.1  augustss 		}
   3190         1.1  augustss 		l = min(len, USB_HUB_DESCRIPTOR_SIZE);
   3191         1.1  augustss 		totlen = l;
   3192         1.1  augustss 		memcpy(buf, &uhci_hubd_piix, l);
   3193         1.1  augustss 		break;
   3194         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   3195         1.1  augustss 		if (len != 4) {
   3196        1.63  augustss 			err = USBD_IOERROR;
   3197         1.1  augustss 			goto ret;
   3198         1.1  augustss 		}
   3199         1.1  augustss 		memset(buf, 0, len);
   3200         1.1  augustss 		totlen = len;
   3201         1.1  augustss 		break;
   3202         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   3203         1.1  augustss 		if (index == 1)
   3204         1.1  augustss 			port = UHCI_PORTSC1;
   3205         1.1  augustss 		else if (index == 2)
   3206         1.1  augustss 			port = UHCI_PORTSC2;
   3207         1.1  augustss 		else {
   3208        1.63  augustss 			err = USBD_IOERROR;
   3209         1.1  augustss 			goto ret;
   3210         1.1  augustss 		}
   3211         1.1  augustss 		if (len != 4) {
   3212        1.63  augustss 			err = USBD_IOERROR;
   3213         1.1  augustss 			goto ret;
   3214         1.1  augustss 		}
   3215         1.1  augustss 		x = UREAD2(sc, port);
   3216         1.1  augustss 		status = change = 0;
   3217   1.133.2.4   nathanw 		if (x & UHCI_PORTSC_CCS)
   3218         1.1  augustss 			status |= UPS_CURRENT_CONNECT_STATUS;
   3219   1.133.2.6   nathanw 		if (x & UHCI_PORTSC_CSC)
   3220         1.1  augustss 			change |= UPS_C_CONNECT_STATUS;
   3221   1.133.2.6   nathanw 		if (x & UHCI_PORTSC_PE)
   3222         1.1  augustss 			status |= UPS_PORT_ENABLED;
   3223   1.133.2.6   nathanw 		if (x & UHCI_PORTSC_POEDC)
   3224         1.1  augustss 			change |= UPS_C_PORT_ENABLED;
   3225   1.133.2.6   nathanw 		if (x & UHCI_PORTSC_OCI)
   3226         1.1  augustss 			status |= UPS_OVERCURRENT_INDICATOR;
   3227   1.133.2.6   nathanw 		if (x & UHCI_PORTSC_OCIC)
   3228         1.1  augustss 			change |= UPS_C_OVERCURRENT_INDICATOR;
   3229   1.133.2.6   nathanw 		if (x & UHCI_PORTSC_SUSP)
   3230         1.1  augustss 			status |= UPS_SUSPEND;
   3231   1.133.2.6   nathanw 		if (x & UHCI_PORTSC_LSDA)
   3232         1.1  augustss 			status |= UPS_LOW_SPEED;
   3233         1.1  augustss 		status |= UPS_PORT_POWER;
   3234         1.1  augustss 		if (sc->sc_isreset)
   3235         1.1  augustss 			change |= UPS_C_PORT_RESET;
   3236         1.1  augustss 		USETW(ps.wPortStatus, status);
   3237         1.1  augustss 		USETW(ps.wPortChange, change);
   3238         1.1  augustss 		l = min(len, sizeof ps);
   3239         1.1  augustss 		memcpy(buf, &ps, l);
   3240         1.1  augustss 		totlen = l;
   3241         1.1  augustss 		break;
   3242         1.1  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   3243        1.63  augustss 		err = USBD_IOERROR;
   3244         1.1  augustss 		goto ret;
   3245         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   3246         1.1  augustss 		break;
   3247         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   3248         1.1  augustss 		if (index == 1)
   3249         1.1  augustss 			port = UHCI_PORTSC1;
   3250         1.1  augustss 		else if (index == 2)
   3251         1.1  augustss 			port = UHCI_PORTSC2;
   3252         1.1  augustss 		else {
   3253        1.63  augustss 			err = USBD_IOERROR;
   3254         1.1  augustss 			goto ret;
   3255         1.1  augustss 		}
   3256         1.1  augustss 		switch(value) {
   3257         1.1  augustss 		case UHF_PORT_ENABLE:
   3258   1.133.2.2   nathanw 			x = URWMASK(UREAD2(sc, port));
   3259         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_PE);
   3260         1.1  augustss 			break;
   3261         1.1  augustss 		case UHF_PORT_SUSPEND:
   3262   1.133.2.2   nathanw 			x = URWMASK(UREAD2(sc, port));
   3263         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
   3264         1.1  augustss 			break;
   3265         1.1  augustss 		case UHF_PORT_RESET:
   3266   1.133.2.2   nathanw 			x = URWMASK(UREAD2(sc, port));
   3267         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_PR);
   3268   1.133.2.5   nathanw 			usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
   3269         1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
   3270         1.1  augustss 			delay(100);
   3271         1.1  augustss 			x = UREAD2(sc, port);
   3272         1.1  augustss 			UWRITE2(sc, port, x  | UHCI_PORTSC_PE);
   3273       1.124  augustss 			usb_delay_ms(&sc->sc_bus, 10); /* XXX */
   3274         1.1  augustss 			DPRINTFN(3,("uhci port %d reset, status = 0x%04x\n",
   3275         1.1  augustss 				    index, UREAD2(sc, port)));
   3276         1.1  augustss 			sc->sc_isreset = 1;
   3277         1.1  augustss 			break;
   3278       1.111  augustss 		case UHF_PORT_POWER:
   3279       1.111  augustss 			/* Pretend we turned on power */
   3280       1.115   mycroft 			err = USBD_NORMAL_COMPLETION;
   3281       1.111  augustss 			goto ret;
   3282         1.1  augustss 		case UHF_C_PORT_CONNECTION:
   3283         1.1  augustss 		case UHF_C_PORT_ENABLE:
   3284         1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   3285         1.1  augustss 		case UHF_PORT_CONNECTION:
   3286         1.1  augustss 		case UHF_PORT_OVER_CURRENT:
   3287         1.1  augustss 		case UHF_PORT_LOW_SPEED:
   3288         1.1  augustss 		case UHF_C_PORT_SUSPEND:
   3289         1.1  augustss 		case UHF_C_PORT_RESET:
   3290         1.1  augustss 		default:
   3291        1.63  augustss 			err = USBD_IOERROR;
   3292         1.1  augustss 			goto ret;
   3293         1.1  augustss 		}
   3294         1.1  augustss 		break;
   3295         1.1  augustss 	default:
   3296        1.63  augustss 		err = USBD_IOERROR;
   3297         1.1  augustss 		goto ret;
   3298         1.1  augustss 	}
   3299        1.63  augustss 	xfer->actlen = totlen;
   3300        1.63  augustss 	err = USBD_NORMAL_COMPLETION;
   3301         1.1  augustss  ret:
   3302        1.63  augustss 	xfer->status = err;
   3303        1.52  augustss 	s = splusb();
   3304        1.63  augustss 	usb_transfer_complete(xfer);
   3305        1.52  augustss 	splx(s);
   3306         1.1  augustss 	return (USBD_IN_PROGRESS);
   3307         1.1  augustss }
   3308         1.1  augustss 
   3309         1.1  augustss /* Abort a root control request. */
   3310         1.1  augustss void
   3311       1.119  augustss uhci_root_ctrl_abort(usbd_xfer_handle xfer)
   3312         1.1  augustss {
   3313        1.70  augustss 	/* Nothing to do, all transfers are synchronous. */
   3314         1.1  augustss }
   3315         1.1  augustss 
   3316         1.1  augustss /* Close the root pipe. */
   3317         1.1  augustss void
   3318       1.119  augustss uhci_root_ctrl_close(usbd_pipe_handle pipe)
   3319         1.1  augustss {
   3320         1.1  augustss 	DPRINTF(("uhci_root_ctrl_close\n"));
   3321         1.1  augustss }
   3322         1.1  augustss 
   3323         1.1  augustss /* Abort a root interrupt request. */
   3324         1.1  augustss void
   3325       1.119  augustss uhci_root_intr_abort(usbd_xfer_handle xfer)
   3326         1.1  augustss {
   3327        1.63  augustss 	uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
   3328        1.30  augustss 
   3329        1.96  augustss 	usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, xfer);
   3330        1.96  augustss 	sc->sc_intr_xfer = NULL;
   3331        1.58  augustss 
   3332        1.63  augustss 	if (xfer->pipe->intrxfer == xfer) {
   3333        1.58  augustss 		DPRINTF(("uhci_root_intr_abort: remove\n"));
   3334        1.63  augustss 		xfer->pipe->intrxfer = 0;
   3335        1.58  augustss 	}
   3336        1.63  augustss 	xfer->status = USBD_CANCELLED;
   3337        1.96  augustss #ifdef DIAGNOSTIC
   3338        1.96  augustss 	UXFER(xfer)->iinfo.isdone = 1;
   3339        1.96  augustss #endif
   3340        1.63  augustss 	usb_transfer_complete(xfer);
   3341         1.1  augustss }
   3342         1.1  augustss 
   3343        1.16  augustss usbd_status
   3344       1.119  augustss uhci_root_intr_transfer(usbd_xfer_handle xfer)
   3345        1.16  augustss {
   3346        1.63  augustss 	usbd_status err;
   3347        1.16  augustss 
   3348        1.52  augustss 	/* Insert last in queue. */
   3349        1.63  augustss 	err = usb_insert_transfer(xfer);
   3350        1.63  augustss 	if (err)
   3351        1.63  augustss 		return (err);
   3352        1.52  augustss 
   3353        1.67  augustss 	/* Pipe isn't running (otherwise err would be USBD_INPROG),
   3354        1.67  augustss 	 * start first
   3355        1.67  augustss 	 */
   3356        1.63  augustss 	return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   3357        1.16  augustss }
   3358        1.16  augustss 
   3359         1.1  augustss /* Start a transfer on the root interrupt pipe */
   3360         1.1  augustss usbd_status
   3361       1.119  augustss uhci_root_intr_start(usbd_xfer_handle xfer)
   3362         1.1  augustss {
   3363        1.63  augustss 	usbd_pipe_handle pipe = xfer->pipe;
   3364         1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
   3365         1.1  augustss 
   3366        1.63  augustss 	DPRINTFN(3, ("uhci_root_intr_transfer: xfer=%p len=%d flags=%d\n",
   3367        1.63  augustss 		     xfer, xfer->length, xfer->flags));
   3368        1.82  augustss 
   3369        1.82  augustss 	if (sc->sc_dying)
   3370        1.82  augustss 		return (USBD_IOERROR);
   3371         1.1  augustss 
   3372        1.63  augustss 	sc->sc_ival = MS_TO_TICKS(xfer->pipe->endpoint->edesc->bInterval);
   3373        1.96  augustss 	usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
   3374        1.96  augustss 	sc->sc_intr_xfer = xfer;
   3375         1.1  augustss 	return (USBD_IN_PROGRESS);
   3376         1.1  augustss }
   3377         1.1  augustss 
   3378         1.1  augustss /* Close the root interrupt pipe. */
   3379         1.1  augustss void
   3380       1.119  augustss uhci_root_intr_close(usbd_pipe_handle pipe)
   3381         1.1  augustss {
   3382        1.30  augustss 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
   3383        1.30  augustss 
   3384        1.96  augustss 	usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, sc->sc_intr_xfer);
   3385        1.96  augustss 	sc->sc_intr_xfer = NULL;
   3386         1.1  augustss 	DPRINTF(("uhci_root_intr_close\n"));
   3387         1.1  augustss }
   3388