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uhci.c revision 1.133.2.13
      1  1.133.2.13   thorpej /*	$NetBSD: uhci.c,v 1.133.2.13 2003/01/03 17:08:15 thorpej Exp $	*/
      2        1.67  augustss /*	$FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $	*/
      3         1.1  augustss 
      4         1.1  augustss /*
      5         1.1  augustss  * Copyright (c) 1998 The NetBSD Foundation, Inc.
      6         1.1  augustss  * All rights reserved.
      7         1.1  augustss  *
      8        1.11  augustss  * This code is derived from software contributed to The NetBSD Foundation
      9       1.113  augustss  * by Lennart Augustsson (lennart (at) augustsson.net) at
     10        1.11  augustss  * Carlstedt Research & Technology.
     11         1.1  augustss  *
     12         1.1  augustss  * Redistribution and use in source and binary forms, with or without
     13         1.1  augustss  * modification, are permitted provided that the following conditions
     14         1.1  augustss  * are met:
     15         1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     16         1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     17         1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     18         1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     19         1.1  augustss  *    documentation and/or other materials provided with the distribution.
     20         1.1  augustss  * 3. All advertising materials mentioning features or use of this software
     21         1.1  augustss  *    must display the following acknowledgement:
     22         1.1  augustss  *        This product includes software developed by the NetBSD
     23         1.1  augustss  *        Foundation, Inc. and its contributors.
     24         1.1  augustss  * 4. Neither the name of The NetBSD Foundation nor the names of its
     25         1.1  augustss  *    contributors may be used to endorse or promote products derived
     26         1.1  augustss  *    from this software without specific prior written permission.
     27         1.1  augustss  *
     28         1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     29         1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     30         1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     31         1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     32         1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     33         1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     34         1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     35         1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     36         1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     37         1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     38         1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     39         1.1  augustss  */
     40         1.1  augustss 
     41         1.1  augustss /*
     42         1.1  augustss  * USB Universal Host Controller driver.
     43        1.28  augustss  * Handles e.g. PIIX3 and PIIX4.
     44         1.1  augustss  *
     45       1.131  augustss  * UHCI spec: http://developer.intel.com/design/USB/UHCI11D.htm
     46       1.131  augustss  * USB spec: http://www.usb.org/developers/data/usbspec.zip
     47        1.71  augustss  * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
     48        1.71  augustss  *             ftp://download.intel.com/design/intarch/datashts/29056201.pdf
     49         1.1  augustss  */
     50         1.1  augustss 
     51   1.133.2.4   nathanw #include <sys/cdefs.h>
     52  1.133.2.13   thorpej __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.133.2.13 2003/01/03 17:08:15 thorpej Exp $");
     53   1.133.2.4   nathanw 
     54         1.1  augustss #include <sys/param.h>
     55         1.1  augustss #include <sys/systm.h>
     56         1.1  augustss #include <sys/kernel.h>
     57         1.1  augustss #include <sys/malloc.h>
     58        1.37  augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
     59         1.1  augustss #include <sys/device.h>
     60        1.67  augustss #include <sys/select.h>
     61        1.13  augustss #elif defined(__FreeBSD__)
     62        1.13  augustss #include <sys/module.h>
     63        1.13  augustss #include <sys/bus.h>
     64        1.67  augustss #include <machine/bus_pio.h>
     65        1.67  augustss #if defined(DIAGNOSTIC) && defined(__i386__)
     66        1.67  augustss #include <machine/cpu.h>
     67        1.67  augustss #endif
     68        1.13  augustss #endif
     69         1.1  augustss #include <sys/proc.h>
     70         1.1  augustss #include <sys/queue.h>
     71         1.1  augustss 
     72         1.7  augustss #include <machine/bus.h>
     73        1.39  augustss #include <machine/endian.h>
     74         1.7  augustss 
     75         1.1  augustss #include <dev/usb/usb.h>
     76         1.1  augustss #include <dev/usb/usbdi.h>
     77         1.1  augustss #include <dev/usb/usbdivar.h>
     78         1.7  augustss #include <dev/usb/usb_mem.h>
     79         1.1  augustss #include <dev/usb/usb_quirks.h>
     80         1.1  augustss 
     81         1.1  augustss #include <dev/usb/uhcireg.h>
     82         1.1  augustss #include <dev/usb/uhcivar.h>
     83         1.1  augustss 
     84       1.125  augustss /* Use bandwidth reclamation for control transfers. Some devices choke on it. */
     85       1.125  augustss /*#define UHCI_CTL_LOOP */
     86       1.125  augustss 
     87        1.13  augustss #if defined(__FreeBSD__)
     88        1.13  augustss #include <machine/clock.h>
     89        1.13  augustss 
     90        1.13  augustss #define delay(d)		DELAY(d)
     91        1.13  augustss #endif
     92        1.13  augustss 
     93         1.1  augustss #define MS_TO_TICKS(ms) ((ms) * hz / 1000)
     94         1.1  augustss 
     95        1.37  augustss #if defined(__OpenBSD__)
     96        1.37  augustss struct cfdriver uhci_cd = {
     97        1.37  augustss 	NULL, "uhci", DV_DULL
     98        1.37  augustss };
     99        1.37  augustss #endif
    100        1.37  augustss 
    101        1.67  augustss #ifdef UHCI_DEBUG
    102        1.92  augustss uhci_softc_t *thesc;
    103        1.59  augustss #define DPRINTF(x)	if (uhcidebug) printf x
    104        1.59  augustss #define DPRINTFN(n,x)	if (uhcidebug>(n)) printf x
    105        1.67  augustss int uhcidebug = 0;
    106       1.125  augustss int uhcinoloop = 0;
    107       1.122        tv #ifndef __NetBSD__
    108       1.122        tv #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
    109       1.122        tv #endif
    110        1.59  augustss #else
    111        1.59  augustss #define DPRINTF(x)
    112        1.59  augustss #define DPRINTFN(n,x)
    113        1.59  augustss #endif
    114        1.59  augustss 
    115        1.39  augustss /*
    116        1.39  augustss  * The UHCI controller is little endian, so on big endian machines
    117        1.39  augustss  * the data strored in memory needs to be swapped.
    118        1.39  augustss  */
    119       1.107  augustss #if defined(__FreeBSD__) || defined(__OpenBSD__)
    120        1.39  augustss #if BYTE_ORDER == BIG_ENDIAN
    121        1.88   tsutsui #define htole32(x) (bswap32(x))
    122        1.88   tsutsui #define le32toh(x) (bswap32(x))
    123        1.39  augustss #else
    124        1.88   tsutsui #define htole32(x) (x)
    125        1.88   tsutsui #define le32toh(x) (x)
    126        1.88   tsutsui #endif
    127        1.39  augustss #endif
    128        1.39  augustss 
    129         1.1  augustss struct uhci_pipe {
    130         1.1  augustss 	struct usbd_pipe pipe;
    131        1.32  augustss 	int nexttoggle;
    132        1.92  augustss 
    133        1.92  augustss 	u_char aborting;
    134        1.92  augustss 	usbd_xfer_handle abortstart, abortend;
    135        1.92  augustss 
    136         1.1  augustss 	/* Info needed for different pipe kinds. */
    137         1.1  augustss 	union {
    138         1.1  augustss 		/* Control pipe */
    139         1.1  augustss 		struct {
    140         1.1  augustss 			uhci_soft_qh_t *sqh;
    141         1.7  augustss 			usb_dma_t reqdma;
    142        1.16  augustss 			uhci_soft_td_t *setup, *stat;
    143         1.1  augustss 			u_int length;
    144         1.1  augustss 		} ctl;
    145         1.1  augustss 		/* Interrupt pipe */
    146         1.1  augustss 		struct {
    147         1.1  augustss 			int npoll;
    148         1.1  augustss 			uhci_soft_qh_t **qhs;
    149         1.1  augustss 		} intr;
    150         1.1  augustss 		/* Bulk pipe */
    151         1.1  augustss 		struct {
    152         1.1  augustss 			uhci_soft_qh_t *sqh;
    153         1.1  augustss 			u_int length;
    154         1.1  augustss 			int isread;
    155         1.1  augustss 		} bulk;
    156        1.16  augustss 		/* Iso pipe */
    157        1.16  augustss 		struct iso {
    158        1.16  augustss 			uhci_soft_td_t **stds;
    159        1.48  augustss 			int next, inuse;
    160        1.16  augustss 		} iso;
    161         1.1  augustss 	} u;
    162         1.1  augustss };
    163         1.1  augustss 
    164   1.133.2.4   nathanw Static void		uhci_globalreset(uhci_softc_t *);
    165  1.133.2.13   thorpej Static usbd_status	uhci_portreset(uhci_softc_t*, int);
    166   1.133.2.4   nathanw Static void		uhci_reset(uhci_softc_t *);
    167       1.119  augustss Static void		uhci_shutdown(void *v);
    168       1.119  augustss Static void		uhci_power(int, void *);
    169       1.119  augustss Static usbd_status	uhci_run(uhci_softc_t *, int run);
    170       1.123  augustss Static uhci_soft_td_t  *uhci_alloc_std(uhci_softc_t *);
    171       1.119  augustss Static void		uhci_free_std(uhci_softc_t *, uhci_soft_td_t *);
    172       1.123  augustss Static uhci_soft_qh_t  *uhci_alloc_sqh(uhci_softc_t *);
    173       1.119  augustss Static void		uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *);
    174        1.16  augustss #if 0
    175       1.119  augustss Static void		uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *,
    176       1.119  augustss 					 uhci_intr_info_t *);
    177       1.119  augustss Static void		uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *);
    178        1.16  augustss #endif
    179         1.1  augustss 
    180   1.133.2.6   nathanw Static void		uhci_free_std_chain(uhci_softc_t *,
    181       1.119  augustss 					    uhci_soft_td_t *, uhci_soft_td_t *);
    182       1.119  augustss Static usbd_status	uhci_alloc_std_chain(struct uhci_pipe *,
    183   1.133.2.6   nathanw 			    uhci_softc_t *, int, int, u_int16_t, usb_dma_t *,
    184       1.119  augustss 			    uhci_soft_td_t **, uhci_soft_td_t **);
    185       1.119  augustss Static void		uhci_poll_hub(void *);
    186       1.119  augustss Static void		uhci_waitintr(uhci_softc_t *, usbd_xfer_handle);
    187       1.119  augustss Static void		uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *);
    188       1.119  augustss Static void		uhci_idone(uhci_intr_info_t *);
    189       1.119  augustss 
    190       1.119  augustss Static void		uhci_abort_xfer(usbd_xfer_handle, usbd_status status);
    191       1.119  augustss 
    192       1.119  augustss Static void		uhci_timeout(void *);
    193   1.133.2.6   nathanw Static void		uhci_timeout_task(void *);
    194       1.123  augustss Static void		uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
    195       1.123  augustss Static void		uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
    196       1.119  augustss Static void		uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *);
    197       1.123  augustss Static void		uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
    198       1.123  augustss Static void		uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
    199       1.119  augustss Static void		uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *);
    200       1.119  augustss Static int		uhci_str(usb_string_descriptor_t *, int, char *);
    201       1.123  augustss Static void		uhci_add_loop(uhci_softc_t *sc);
    202       1.123  augustss Static void		uhci_rem_loop(uhci_softc_t *sc);
    203       1.119  augustss 
    204       1.119  augustss Static usbd_status	uhci_setup_isoc(usbd_pipe_handle pipe);
    205       1.119  augustss Static void		uhci_device_isoc_enter(usbd_xfer_handle);
    206       1.119  augustss 
    207       1.119  augustss Static usbd_status	uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
    208       1.119  augustss Static void		uhci_freem(struct usbd_bus *, usb_dma_t *);
    209       1.119  augustss 
    210       1.119  augustss Static usbd_xfer_handle	uhci_allocx(struct usbd_bus *);
    211       1.119  augustss Static void		uhci_freex(struct usbd_bus *, usbd_xfer_handle);
    212       1.119  augustss 
    213       1.119  augustss Static usbd_status	uhci_device_ctrl_transfer(usbd_xfer_handle);
    214       1.119  augustss Static usbd_status	uhci_device_ctrl_start(usbd_xfer_handle);
    215       1.119  augustss Static void		uhci_device_ctrl_abort(usbd_xfer_handle);
    216       1.119  augustss Static void		uhci_device_ctrl_close(usbd_pipe_handle);
    217       1.119  augustss Static void		uhci_device_ctrl_done(usbd_xfer_handle);
    218       1.119  augustss 
    219       1.119  augustss Static usbd_status	uhci_device_intr_transfer(usbd_xfer_handle);
    220       1.119  augustss Static usbd_status	uhci_device_intr_start(usbd_xfer_handle);
    221       1.119  augustss Static void		uhci_device_intr_abort(usbd_xfer_handle);
    222       1.119  augustss Static void		uhci_device_intr_close(usbd_pipe_handle);
    223       1.119  augustss Static void		uhci_device_intr_done(usbd_xfer_handle);
    224       1.119  augustss 
    225       1.119  augustss Static usbd_status	uhci_device_bulk_transfer(usbd_xfer_handle);
    226       1.119  augustss Static usbd_status	uhci_device_bulk_start(usbd_xfer_handle);
    227       1.119  augustss Static void		uhci_device_bulk_abort(usbd_xfer_handle);
    228       1.119  augustss Static void		uhci_device_bulk_close(usbd_pipe_handle);
    229       1.119  augustss Static void		uhci_device_bulk_done(usbd_xfer_handle);
    230       1.119  augustss 
    231       1.119  augustss Static usbd_status	uhci_device_isoc_transfer(usbd_xfer_handle);
    232       1.119  augustss Static usbd_status	uhci_device_isoc_start(usbd_xfer_handle);
    233       1.119  augustss Static void		uhci_device_isoc_abort(usbd_xfer_handle);
    234       1.119  augustss Static void		uhci_device_isoc_close(usbd_pipe_handle);
    235       1.119  augustss Static void		uhci_device_isoc_done(usbd_xfer_handle);
    236       1.119  augustss 
    237       1.119  augustss Static usbd_status	uhci_root_ctrl_transfer(usbd_xfer_handle);
    238       1.119  augustss Static usbd_status	uhci_root_ctrl_start(usbd_xfer_handle);
    239       1.119  augustss Static void		uhci_root_ctrl_abort(usbd_xfer_handle);
    240       1.119  augustss Static void		uhci_root_ctrl_close(usbd_pipe_handle);
    241       1.119  augustss Static void		uhci_root_ctrl_done(usbd_xfer_handle);
    242       1.119  augustss 
    243       1.119  augustss Static usbd_status	uhci_root_intr_transfer(usbd_xfer_handle);
    244       1.119  augustss Static usbd_status	uhci_root_intr_start(usbd_xfer_handle);
    245       1.119  augustss Static void		uhci_root_intr_abort(usbd_xfer_handle);
    246       1.119  augustss Static void		uhci_root_intr_close(usbd_pipe_handle);
    247       1.119  augustss Static void		uhci_root_intr_done(usbd_xfer_handle);
    248       1.119  augustss 
    249       1.119  augustss Static usbd_status	uhci_open(usbd_pipe_handle);
    250       1.119  augustss Static void		uhci_poll(struct usbd_bus *);
    251       1.133  augustss Static void		uhci_softintr(void *);
    252       1.119  augustss 
    253       1.119  augustss Static usbd_status	uhci_device_request(usbd_xfer_handle xfer);
    254       1.119  augustss 
    255       1.119  augustss Static void		uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *);
    256   1.133.2.7   nathanw Static void		uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *);
    257   1.133.2.6   nathanw Static usbd_status	uhci_device_setintr(uhci_softc_t *sc,
    258       1.119  augustss 			    struct uhci_pipe *pipe, int ival);
    259       1.119  augustss 
    260       1.119  augustss Static void		uhci_device_clear_toggle(usbd_pipe_handle pipe);
    261       1.119  augustss Static void		uhci_noop(usbd_pipe_handle pipe);
    262       1.119  augustss 
    263       1.119  augustss Static __inline__ uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *,
    264       1.119  augustss 						    uhci_soft_qh_t *);
    265       1.119  augustss 
    266       1.119  augustss #ifdef UHCI_DEBUG
    267       1.119  augustss Static void		uhci_dump_all(uhci_softc_t *);
    268       1.119  augustss Static void		uhci_dumpregs(uhci_softc_t *);
    269       1.119  augustss Static void		uhci_dump_qhs(uhci_soft_qh_t *);
    270       1.119  augustss Static void		uhci_dump_qh(uhci_soft_qh_t *);
    271       1.119  augustss Static void		uhci_dump_tds(uhci_soft_td_t *);
    272       1.119  augustss Static void		uhci_dump_td(uhci_soft_td_t *);
    273       1.119  augustss Static void		uhci_dump_ii(uhci_intr_info_t *ii);
    274       1.119  augustss void			uhci_dump(void);
    275         1.1  augustss #endif
    276         1.1  augustss 
    277       1.112  augustss #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
    278       1.112  augustss 			BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
    279       1.112  augustss #define UWRITE1(sc, r, x) \
    280  1.133.2.13   thorpej  do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \
    281  1.133.2.13   thorpej  } while (/*CONSTCOND*/0)
    282       1.112  augustss #define UWRITE2(sc, r, x) \
    283  1.133.2.13   thorpej  do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \
    284  1.133.2.13   thorpej  } while (/*CONSTCOND*/0)
    285       1.112  augustss #define UWRITE4(sc, r, x) \
    286  1.133.2.13   thorpej  do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \
    287  1.133.2.13   thorpej  } while (/*CONSTCOND*/0)
    288       1.112  augustss #define UREAD1(sc, r) (UBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r)))
    289       1.112  augustss #define UREAD2(sc, r) (UBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r)))
    290       1.112  augustss #define UREAD4(sc, r) (UBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r)))
    291         1.1  augustss 
    292         1.1  augustss #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
    293         1.1  augustss #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
    294         1.1  augustss 
    295   1.133.2.4   nathanw #define UHCI_RESET_TIMEOUT 100	/* ms, reset timeout */
    296         1.1  augustss 
    297         1.1  augustss #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
    298         1.1  augustss 
    299         1.1  augustss #define UHCI_INTR_ENDPT 1
    300         1.1  augustss 
    301        1.48  augustss struct usbd_bus_methods uhci_bus_methods = {
    302        1.48  augustss 	uhci_open,
    303        1.85  augustss 	uhci_softintr,
    304        1.48  augustss 	uhci_poll,
    305        1.48  augustss 	uhci_allocm,
    306        1.48  augustss 	uhci_freem,
    307        1.76  augustss 	uhci_allocx,
    308        1.76  augustss 	uhci_freex,
    309        1.48  augustss };
    310        1.48  augustss 
    311   1.133.2.6   nathanw struct usbd_pipe_methods uhci_root_ctrl_methods = {
    312         1.1  augustss 	uhci_root_ctrl_transfer,
    313        1.16  augustss 	uhci_root_ctrl_start,
    314         1.1  augustss 	uhci_root_ctrl_abort,
    315         1.1  augustss 	uhci_root_ctrl_close,
    316        1.38  augustss 	uhci_noop,
    317        1.84  augustss 	uhci_root_ctrl_done,
    318         1.1  augustss };
    319         1.1  augustss 
    320   1.133.2.6   nathanw struct usbd_pipe_methods uhci_root_intr_methods = {
    321         1.1  augustss 	uhci_root_intr_transfer,
    322        1.16  augustss 	uhci_root_intr_start,
    323         1.1  augustss 	uhci_root_intr_abort,
    324         1.1  augustss 	uhci_root_intr_close,
    325        1.38  augustss 	uhci_noop,
    326        1.41  augustss 	uhci_root_intr_done,
    327         1.1  augustss };
    328         1.1  augustss 
    329        1.48  augustss struct usbd_pipe_methods uhci_device_ctrl_methods = {
    330         1.1  augustss 	uhci_device_ctrl_transfer,
    331        1.16  augustss 	uhci_device_ctrl_start,
    332         1.1  augustss 	uhci_device_ctrl_abort,
    333         1.1  augustss 	uhci_device_ctrl_close,
    334        1.38  augustss 	uhci_noop,
    335        1.41  augustss 	uhci_device_ctrl_done,
    336         1.1  augustss };
    337         1.1  augustss 
    338        1.48  augustss struct usbd_pipe_methods uhci_device_intr_methods = {
    339         1.1  augustss 	uhci_device_intr_transfer,
    340        1.16  augustss 	uhci_device_intr_start,
    341         1.1  augustss 	uhci_device_intr_abort,
    342         1.1  augustss 	uhci_device_intr_close,
    343        1.38  augustss 	uhci_device_clear_toggle,
    344        1.41  augustss 	uhci_device_intr_done,
    345         1.1  augustss };
    346         1.1  augustss 
    347        1.48  augustss struct usbd_pipe_methods uhci_device_bulk_methods = {
    348         1.1  augustss 	uhci_device_bulk_transfer,
    349        1.16  augustss 	uhci_device_bulk_start,
    350         1.1  augustss 	uhci_device_bulk_abort,
    351         1.1  augustss 	uhci_device_bulk_close,
    352        1.38  augustss 	uhci_device_clear_toggle,
    353        1.41  augustss 	uhci_device_bulk_done,
    354         1.1  augustss };
    355         1.1  augustss 
    356        1.48  augustss struct usbd_pipe_methods uhci_device_isoc_methods = {
    357        1.16  augustss 	uhci_device_isoc_transfer,
    358        1.16  augustss 	uhci_device_isoc_start,
    359        1.16  augustss 	uhci_device_isoc_abort,
    360        1.16  augustss 	uhci_device_isoc_close,
    361        1.38  augustss 	uhci_noop,
    362        1.41  augustss 	uhci_device_isoc_done,
    363        1.16  augustss };
    364        1.16  augustss 
    365        1.92  augustss #define uhci_add_intr_info(sc, ii) \
    366        1.92  augustss 	LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list);
    367        1.92  augustss #define uhci_del_intr_info(ii) \
    368        1.92  augustss 	LIST_REMOVE((ii), list)
    369        1.92  augustss 
    370       1.101  augustss Static __inline__ uhci_soft_qh_t *
    371       1.119  augustss uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh)
    372        1.92  augustss {
    373        1.92  augustss 	DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh));
    374        1.92  augustss 
    375        1.92  augustss 	for (; pqh->hlink != sqh; pqh = pqh->hlink) {
    376   1.133.2.6   nathanw #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG)
    377        1.92  augustss 		if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) {
    378       1.102  augustss 			printf("uhci_find_prev_qh: QH not found\n");
    379        1.92  augustss 			return (NULL);
    380        1.92  augustss 		}
    381        1.92  augustss #endif
    382        1.92  augustss 	}
    383        1.92  augustss 	return (pqh);
    384        1.92  augustss }
    385        1.92  augustss 
    386         1.1  augustss void
    387   1.133.2.4   nathanw uhci_globalreset(uhci_softc_t *sc)
    388         1.1  augustss {
    389         1.1  augustss 	UHCICMD(sc, UHCI_CMD_GRESET);	/* global reset */
    390        1.20  augustss 	usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
    391         1.1  augustss 	UHCICMD(sc, 0);			/* do nothing */
    392         1.1  augustss }
    393         1.1  augustss 
    394         1.1  augustss usbd_status
    395       1.119  augustss uhci_init(uhci_softc_t *sc)
    396         1.1  augustss {
    397        1.63  augustss 	usbd_status err;
    398         1.1  augustss 	int i, j;
    399       1.123  augustss 	uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh;
    400         1.1  augustss 	uhci_soft_td_t *std;
    401         1.1  augustss 
    402         1.1  augustss 	DPRINTFN(1,("uhci_init: start\n"));
    403         1.1  augustss 
    404        1.67  augustss #ifdef UHCI_DEBUG
    405        1.92  augustss 	thesc = sc;
    406        1.92  augustss 
    407         1.1  augustss 	if (uhcidebug > 2)
    408         1.1  augustss 		uhci_dumpregs(sc);
    409         1.1  augustss #endif
    410         1.1  augustss 
    411         1.1  augustss 	UWRITE2(sc, UHCI_INTR, 0);		/* disable interrupts */
    412   1.133.2.4   nathanw 	uhci_globalreset(sc);			/* reset the controller */
    413   1.133.2.4   nathanw 	uhci_reset(sc);
    414        1.24  augustss 
    415         1.1  augustss 	/* Allocate and initialize real frame array. */
    416   1.133.2.6   nathanw 	err = usb_allocmem(&sc->sc_bus,
    417        1.63  augustss 		  UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
    418        1.63  augustss 		  UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
    419        1.63  augustss 	if (err)
    420        1.63  augustss 		return (err);
    421   1.133.2.8   nathanw 	sc->sc_pframes = KERNADDR(&sc->sc_dma, 0);
    422         1.1  augustss 	UWRITE2(sc, UHCI_FRNUM, 0);		/* set frame number to 0 */
    423   1.133.2.8   nathanw 	UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/
    424         1.1  augustss 
    425   1.133.2.6   nathanw 	/*
    426       1.123  augustss 	 * Allocate a TD, inactive, that hangs from the last QH.
    427       1.123  augustss 	 * This is to avoid a bug in the PIIX that makes it run berserk
    428       1.123  augustss 	 * otherwise.
    429       1.123  augustss 	 */
    430       1.123  augustss 	std = uhci_alloc_std(sc);
    431       1.123  augustss 	if (std == NULL)
    432       1.123  augustss 		return (USBD_NOMEM);
    433       1.123  augustss 	std->link.std = NULL;
    434       1.123  augustss 	std->td.td_link = htole32(UHCI_PTR_T);
    435       1.123  augustss 	std->td.td_status = htole32(0); /* inactive */
    436       1.123  augustss 	std->td.td_token = htole32(0);
    437       1.123  augustss 	std->td.td_buffer = htole32(0);
    438       1.123  augustss 
    439       1.123  augustss 	/* Allocate the dummy QH marking the end and used for looping the QHs.*/
    440       1.123  augustss 	lsqh = uhci_alloc_sqh(sc);
    441       1.123  augustss 	if (lsqh == NULL)
    442       1.123  augustss 		return (USBD_NOMEM);
    443       1.123  augustss 	lsqh->hlink = NULL;
    444       1.123  augustss 	lsqh->qh.qh_hlink = htole32(UHCI_PTR_T);	/* end of QH chain */
    445       1.123  augustss 	lsqh->elink = std;
    446       1.123  augustss 	lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD);
    447       1.123  augustss 	sc->sc_last_qh = lsqh;
    448       1.123  augustss 
    449         1.1  augustss 	/* Allocate the dummy QH where bulk traffic will be queued. */
    450         1.1  augustss 	bsqh = uhci_alloc_sqh(sc);
    451        1.63  augustss 	if (bsqh == NULL)
    452         1.1  augustss 		return (USBD_NOMEM);
    453       1.123  augustss 	bsqh->hlink = lsqh;
    454       1.123  augustss 	bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH);
    455       1.121  augustss 	bsqh->elink = NULL;
    456        1.88   tsutsui 	bsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    457         1.1  augustss 	sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
    458         1.1  augustss 
    459       1.123  augustss 	/* Allocate dummy QH where high speed control traffic will be queued. */
    460       1.123  augustss 	chsqh = uhci_alloc_sqh(sc);
    461       1.123  augustss 	if (chsqh == NULL)
    462       1.123  augustss 		return (USBD_NOMEM);
    463       1.123  augustss 	chsqh->hlink = bsqh;
    464       1.123  augustss 	chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH);
    465       1.123  augustss 	chsqh->elink = NULL;
    466       1.123  augustss 	chsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    467       1.123  augustss 	sc->sc_hctl_start = sc->sc_hctl_end = chsqh;
    468       1.123  augustss 
    469       1.123  augustss 	/* Allocate dummy QH where control traffic will be queued. */
    470       1.123  augustss 	clsqh = uhci_alloc_sqh(sc);
    471       1.123  augustss 	if (clsqh == NULL)
    472         1.1  augustss 		return (USBD_NOMEM);
    473       1.123  augustss 	clsqh->hlink = bsqh;
    474       1.123  augustss 	clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH);
    475       1.123  augustss 	clsqh->elink = NULL;
    476       1.123  augustss 	clsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    477       1.123  augustss 	sc->sc_lctl_start = sc->sc_lctl_end = clsqh;
    478         1.1  augustss 
    479   1.133.2.6   nathanw 	/*
    480         1.1  augustss 	 * Make all (virtual) frame list pointers point to the interrupt
    481         1.1  augustss 	 * queue heads and the interrupt queue heads at the control
    482         1.1  augustss 	 * queue head and point the physical frame list to the virtual.
    483         1.1  augustss 	 */
    484         1.1  augustss 	for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
    485         1.1  augustss 		std = uhci_alloc_std(sc);
    486         1.1  augustss 		sqh = uhci_alloc_sqh(sc);
    487        1.67  augustss 		if (std == NULL || sqh == NULL)
    488        1.13  augustss 			return (USBD_NOMEM);
    489        1.42  augustss 		std->link.sqh = sqh;
    490       1.121  augustss 		std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH);
    491        1.88   tsutsui 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
    492        1.88   tsutsui 		std->td.td_token = htole32(0);
    493        1.88   tsutsui 		std->td.td_buffer = htole32(0);
    494       1.123  augustss 		sqh->hlink = clsqh;
    495       1.123  augustss 		sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH);
    496       1.121  augustss 		sqh->elink = NULL;
    497        1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
    498         1.1  augustss 		sc->sc_vframes[i].htd = std;
    499         1.1  augustss 		sc->sc_vframes[i].etd = std;
    500         1.1  augustss 		sc->sc_vframes[i].hqh = sqh;
    501         1.1  augustss 		sc->sc_vframes[i].eqh = sqh;
    502   1.133.2.6   nathanw 		for (j = i;
    503   1.133.2.6   nathanw 		     j < UHCI_FRAMELIST_COUNT;
    504         1.1  augustss 		     j += UHCI_VFRAMELIST_COUNT)
    505        1.88   tsutsui 			sc->sc_pframes[j] = htole32(std->physaddr);
    506         1.1  augustss 	}
    507         1.1  augustss 
    508         1.1  augustss 	LIST_INIT(&sc->sc_intrhead);
    509         1.1  augustss 
    510        1.76  augustss 	SIMPLEQ_INIT(&sc->sc_free_xfers);
    511        1.76  augustss 
    512        1.96  augustss 	usb_callout_init(sc->sc_poll_handle);
    513        1.96  augustss 
    514         1.1  augustss 	/* Set up the bus struct. */
    515        1.48  augustss 	sc->sc_bus.methods = &uhci_bus_methods;
    516         1.1  augustss 	sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
    517         1.1  augustss 
    518        1.92  augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
    519        1.30  augustss 	sc->sc_suspend = PWR_RESUME;
    520        1.53  augustss 	sc->sc_powerhook = powerhook_establish(uhci_power, sc);
    521        1.72  augustss 	sc->sc_shutdownhook = shutdownhook_establish(uhci_shutdown, sc);
    522        1.92  augustss #endif
    523        1.72  augustss 
    524         1.1  augustss 	DPRINTFN(1,("uhci_init: enabling\n"));
    525   1.133.2.6   nathanw 	UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
    526         1.1  augustss 		UHCI_INTR_IOCE | UHCI_INTR_SPIE);	/* enable interrupts */
    527         1.1  augustss 
    528        1.71  augustss 	UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */
    529        1.71  augustss 
    530        1.16  augustss 	return (uhci_run(sc, 1));		/* and here we go... */
    531        1.53  augustss }
    532        1.53  augustss 
    533        1.67  augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
    534        1.53  augustss int
    535       1.119  augustss uhci_activate(device_ptr_t self, enum devact act)
    536        1.53  augustss {
    537        1.56  augustss 	struct uhci_softc *sc = (struct uhci_softc *)self;
    538        1.53  augustss 	int rv = 0;
    539        1.53  augustss 
    540        1.53  augustss 	switch (act) {
    541        1.53  augustss 	case DVACT_ACTIVATE:
    542        1.53  augustss 		return (EOPNOTSUPP);
    543        1.53  augustss 		break;
    544        1.53  augustss 
    545        1.53  augustss 	case DVACT_DEACTIVATE:
    546        1.56  augustss 		if (sc->sc_child != NULL)
    547        1.56  augustss 			rv = config_deactivate(sc->sc_child);
    548        1.53  augustss 		break;
    549        1.53  augustss 	}
    550        1.53  augustss 	return (rv);
    551        1.53  augustss }
    552        1.53  augustss 
    553        1.53  augustss int
    554       1.119  augustss uhci_detach(struct uhci_softc *sc, int flags)
    555        1.53  augustss {
    556        1.76  augustss 	usbd_xfer_handle xfer;
    557        1.53  augustss 	int rv = 0;
    558        1.53  augustss 
    559        1.53  augustss 	if (sc->sc_child != NULL)
    560        1.53  augustss 		rv = config_detach(sc->sc_child, flags);
    561   1.133.2.6   nathanw 
    562        1.53  augustss 	if (rv != 0)
    563        1.53  augustss 		return (rv);
    564        1.53  augustss 
    565        1.92  augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
    566        1.53  augustss 	powerhook_disestablish(sc->sc_powerhook);
    567        1.72  augustss 	shutdownhook_disestablish(sc->sc_shutdownhook);
    568        1.92  augustss #endif
    569        1.72  augustss 
    570        1.76  augustss 	/* Free all xfers associated with this HC. */
    571        1.76  augustss 	for (;;) {
    572        1.76  augustss 		xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
    573        1.76  augustss 		if (xfer == NULL)
    574        1.76  augustss 			break;
    575   1.133.2.8   nathanw 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
    576        1.76  augustss 		free(xfer, M_USB);
    577   1.133.2.6   nathanw 	}
    578        1.76  augustss 
    579        1.76  augustss 	/* XXX free other data structures XXX */
    580        1.53  augustss 
    581        1.53  augustss 	return (rv);
    582         1.1  augustss }
    583        1.67  augustss #endif
    584         1.1  augustss 
    585        1.48  augustss usbd_status
    586       1.119  augustss uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
    587        1.48  augustss {
    588       1.102  augustss 	struct uhci_softc *sc = (struct uhci_softc *)bus;
    589       1.102  augustss 	u_int32_t n;
    590       1.102  augustss 
    591   1.133.2.6   nathanw 	/*
    592       1.102  augustss 	 * XXX
    593       1.102  augustss 	 * Since we are allocating a buffer we can assume that we will
    594   1.133.2.5   nathanw 	 * need TDs for it.  Since we don't want to allocate those from
    595       1.102  augustss 	 * an interrupt context, we allocate them here and free them again.
    596       1.102  augustss 	 * This is no guarantee that we'll get the TDs next time...
    597       1.102  augustss 	 */
    598       1.102  augustss 	n = size / 8;
    599       1.102  augustss 	if (n > 16) {
    600       1.102  augustss 		u_int32_t i;
    601       1.102  augustss 		uhci_soft_td_t **stds;
    602       1.102  augustss 		DPRINTF(("uhci_allocm: get %d TDs\n", n));
    603   1.133.2.6   nathanw 		stds = malloc(sizeof(uhci_soft_td_t *) * n, M_TEMP,
    604   1.133.2.6   nathanw 		    M_WAITOK|M_ZERO);
    605       1.102  augustss 		for(i=0; i < n; i++)
    606       1.102  augustss 			stds[i] = uhci_alloc_std(sc);
    607       1.102  augustss 		for(i=0; i < n; i++)
    608       1.102  augustss 			if (stds[i] != NULL)
    609       1.102  augustss 				uhci_free_std(sc, stds[i]);
    610       1.102  augustss 		free(stds, M_TEMP);
    611       1.102  augustss 	}
    612       1.102  augustss 
    613       1.102  augustss 	return (usb_allocmem(&sc->sc_bus, size, 0, dma));
    614        1.48  augustss }
    615        1.48  augustss 
    616        1.48  augustss void
    617       1.119  augustss uhci_freem(struct usbd_bus *bus, usb_dma_t *dma)
    618        1.48  augustss {
    619        1.63  augustss 	usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma);
    620        1.76  augustss }
    621        1.76  augustss 
    622        1.76  augustss usbd_xfer_handle
    623       1.119  augustss uhci_allocx(struct usbd_bus *bus)
    624        1.76  augustss {
    625        1.76  augustss 	struct uhci_softc *sc = (struct uhci_softc *)bus;
    626        1.76  augustss 	usbd_xfer_handle xfer;
    627        1.76  augustss 
    628        1.76  augustss 	xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
    629        1.94  augustss 	if (xfer != NULL) {
    630   1.133.2.8   nathanw 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
    631        1.98  augustss #ifdef DIAGNOSTIC
    632        1.94  augustss 		if (xfer->busy_free != XFER_FREE) {
    633       1.105  augustss 			printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer,
    634        1.94  augustss 			       xfer->busy_free);
    635        1.94  augustss 		}
    636        1.98  augustss #endif
    637        1.94  augustss 	} else {
    638        1.92  augustss 		xfer = malloc(sizeof(struct uhci_xfer), M_USB, M_NOWAIT);
    639        1.94  augustss 	}
    640        1.92  augustss 	if (xfer != NULL) {
    641        1.92  augustss 		memset(xfer, 0, sizeof (struct uhci_xfer));
    642        1.92  augustss 		UXFER(xfer)->iinfo.sc = sc;
    643        1.92  augustss #ifdef DIAGNOSTIC
    644        1.92  augustss 		UXFER(xfer)->iinfo.isdone = 1;
    645   1.133.2.1   nathanw 		xfer->busy_free = XFER_BUSY;
    646        1.92  augustss #endif
    647        1.92  augustss 	}
    648        1.76  augustss 	return (xfer);
    649        1.76  augustss }
    650        1.76  augustss 
    651        1.76  augustss void
    652       1.119  augustss uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
    653        1.76  augustss {
    654        1.76  augustss 	struct uhci_softc *sc = (struct uhci_softc *)bus;
    655        1.76  augustss 
    656        1.93  augustss #ifdef DIAGNOSTIC
    657        1.94  augustss 	if (xfer->busy_free != XFER_BUSY) {
    658        1.94  augustss 		printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer,
    659        1.94  augustss 		       xfer->busy_free);
    660        1.93  augustss 		return;
    661        1.93  augustss 	}
    662        1.94  augustss 	xfer->busy_free = XFER_FREE;
    663       1.105  augustss 	if (!UXFER(xfer)->iinfo.isdone) {
    664        1.96  augustss 		printf("uhci_freex: !isdone\n");
    665       1.105  augustss 		return;
    666       1.105  augustss 	}
    667        1.93  augustss #endif
    668        1.76  augustss 	SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
    669        1.48  augustss }
    670        1.48  augustss 
    671        1.72  augustss /*
    672        1.72  augustss  * Shut down the controller when the system is going down.
    673        1.72  augustss  */
    674        1.72  augustss void
    675       1.119  augustss uhci_shutdown(void *v)
    676        1.72  augustss {
    677        1.72  augustss 	uhci_softc_t *sc = v;
    678        1.72  augustss 
    679        1.72  augustss 	DPRINTF(("uhci_shutdown: stopping the HC\n"));
    680        1.72  augustss 	uhci_run(sc, 0); /* stop the controller */
    681        1.72  augustss }
    682        1.72  augustss 
    683        1.30  augustss /*
    684        1.30  augustss  * Handle suspend/resume.
    685        1.30  augustss  *
    686        1.40  augustss  * We need to switch to polling mode here, because this routine is
    687       1.109  augustss  * called from an interrupt context.  This is all right since we
    688        1.40  augustss  * are almost suspended anyway.
    689        1.30  augustss  */
    690        1.30  augustss void
    691       1.119  augustss uhci_power(int why, void *v)
    692        1.30  augustss {
    693        1.30  augustss 	uhci_softc_t *sc = v;
    694        1.30  augustss 	int cmd;
    695        1.30  augustss 	int s;
    696        1.30  augustss 
    697       1.132  augustss 	s = splhardusb();
    698        1.30  augustss 	cmd = UREAD2(sc, UHCI_CMD);
    699        1.30  augustss 
    700   1.133.2.6   nathanw 	DPRINTF(("uhci_power: sc=%p, why=%d (was %d), cmd=0x%x\n",
    701        1.30  augustss 		 sc, why, sc->sc_suspend, cmd));
    702        1.30  augustss 
    703       1.128  takemura 	switch (why) {
    704       1.128  takemura 	case PWR_SUSPEND:
    705       1.128  takemura 	case PWR_STANDBY:
    706        1.67  augustss #ifdef UHCI_DEBUG
    707        1.30  augustss 		if (uhcidebug > 2)
    708        1.30  augustss 			uhci_dumpregs(sc);
    709        1.30  augustss #endif
    710        1.96  augustss 		if (sc->sc_intr_xfer != NULL)
    711        1.96  augustss 			usb_uncallout(sc->sc_poll_handle, uhci_poll_hub,
    712        1.96  augustss 			    sc->sc_intr_xfer);
    713        1.54  augustss 		sc->sc_bus.use_polling++;
    714        1.30  augustss 		uhci_run(sc, 0); /* stop the controller */
    715        1.86  augustss 
    716        1.86  augustss 		/* save some state if BIOS doesn't */
    717        1.86  augustss 		sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM);
    718        1.86  augustss 		sc->sc_saved_sof = UREAD1(sc, UHCI_SOF);
    719        1.88   tsutsui 
    720   1.133.2.1   nathanw 		UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */
    721   1.133.2.1   nathanw 
    722        1.30  augustss 		UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */
    723        1.40  augustss 		usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
    724        1.30  augustss 		sc->sc_suspend = why;
    725        1.61  augustss 		sc->sc_bus.use_polling--;
    726        1.30  augustss 		DPRINTF(("uhci_power: cmd=0x%x\n", UREAD2(sc, UHCI_CMD)));
    727       1.128  takemura 		break;
    728       1.128  takemura 	case PWR_RESUME:
    729        1.60  augustss #ifdef DIAGNOSTIC
    730        1.61  augustss 		if (sc->sc_suspend == PWR_RESUME)
    731        1.61  augustss 			printf("uhci_power: weird, resume without suspend.\n");
    732        1.60  augustss #endif
    733        1.61  augustss 		sc->sc_bus.use_polling++;
    734        1.30  augustss 		sc->sc_suspend = why;
    735        1.30  augustss 		if (cmd & UHCI_CMD_RS)
    736        1.30  augustss 			uhci_run(sc, 0); /* in case BIOS has started it */
    737        1.86  augustss 
    738        1.86  augustss 		/* restore saved state */
    739   1.133.2.8   nathanw 		UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0));
    740        1.86  augustss 		UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum);
    741        1.86  augustss 		UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof);
    742        1.86  augustss 
    743        1.30  augustss 		UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */
    744        1.40  augustss 		usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
    745        1.30  augustss 		UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
    746  1.133.2.13   thorpej 		UHCICMD(sc, UHCI_CMD_MAXP);
    747   1.133.2.6   nathanw 		UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
    748        1.30  augustss 			UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */
    749        1.30  augustss 		uhci_run(sc, 1); /* and start traffic again */
    750        1.40  augustss 		usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
    751        1.54  augustss 		sc->sc_bus.use_polling--;
    752        1.96  augustss 		if (sc->sc_intr_xfer != NULL)
    753        1.96  augustss 			usb_callout(sc->sc_poll_handle, sc->sc_ival,
    754        1.96  augustss 				    uhci_poll_hub, sc->sc_intr_xfer);
    755        1.67  augustss #ifdef UHCI_DEBUG
    756        1.30  augustss 		if (uhcidebug > 2)
    757        1.30  augustss 			uhci_dumpregs(sc);
    758        1.30  augustss #endif
    759       1.128  takemura 		break;
    760       1.128  takemura 	case PWR_SOFTSUSPEND:
    761       1.128  takemura 	case PWR_SOFTSTANDBY:
    762       1.128  takemura 	case PWR_SOFTRESUME:
    763       1.128  takemura 		break;
    764        1.30  augustss 	}
    765        1.30  augustss 	splx(s);
    766        1.30  augustss }
    767        1.30  augustss 
    768        1.59  augustss #ifdef UHCI_DEBUG
    769       1.101  augustss Static void
    770       1.119  augustss uhci_dumpregs(uhci_softc_t *sc)
    771         1.1  augustss {
    772        1.48  augustss 	DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
    773        1.48  augustss 		     "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
    774        1.48  augustss 		     USBDEVNAME(sc->sc_bus.bdev),
    775        1.48  augustss 		     UREAD2(sc, UHCI_CMD),
    776        1.48  augustss 		     UREAD2(sc, UHCI_STS),
    777        1.48  augustss 		     UREAD2(sc, UHCI_INTR),
    778        1.48  augustss 		     UREAD2(sc, UHCI_FRNUM),
    779        1.48  augustss 		     UREAD4(sc, UHCI_FLBASEADDR),
    780        1.48  augustss 		     UREAD1(sc, UHCI_SOF),
    781        1.48  augustss 		     UREAD2(sc, UHCI_PORTSC1),
    782        1.48  augustss 		     UREAD2(sc, UHCI_PORTSC2)));
    783         1.1  augustss }
    784         1.1  augustss 
    785         1.1  augustss void
    786       1.119  augustss uhci_dump_td(uhci_soft_td_t *p)
    787         1.1  augustss {
    788       1.122        tv 	char sbuf[128], sbuf2[128];
    789       1.122        tv 
    790        1.48  augustss 	DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
    791        1.48  augustss 		     "token=0x%08lx buffer=0x%08lx\n",
    792        1.48  augustss 		     p, (long)p->physaddr,
    793        1.88   tsutsui 		     (long)le32toh(p->td.td_link),
    794        1.88   tsutsui 		     (long)le32toh(p->td.td_status),
    795        1.88   tsutsui 		     (long)le32toh(p->td.td_token),
    796        1.88   tsutsui 		     (long)le32toh(p->td.td_buffer)));
    797       1.122        tv 
    798   1.133.2.5   nathanw 	bitmask_snprintf((u_int32_t)le32toh(p->td.td_link), "\20\1T\2Q\3VF",
    799       1.122        tv 			 sbuf, sizeof(sbuf));
    800   1.133.2.5   nathanw 	bitmask_snprintf((u_int32_t)le32toh(p->td.td_status),
    801       1.122        tv 			 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
    802       1.122        tv 			 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
    803       1.122        tv 			 sbuf2, sizeof(sbuf2));
    804       1.122        tv 
    805       1.122        tv 	DPRINTFN(-1,("  %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
    806       1.122        tv 		     "D=%d,maxlen=%d\n", sbuf, sbuf2,
    807        1.88   tsutsui 		     UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)),
    808        1.88   tsutsui 		     UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)),
    809        1.88   tsutsui 		     UHCI_TD_GET_PID(le32toh(p->td.td_token)),
    810        1.88   tsutsui 		     UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)),
    811        1.88   tsutsui 		     UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)),
    812        1.88   tsutsui 		     UHCI_TD_GET_DT(le32toh(p->td.td_token)),
    813        1.88   tsutsui 		     UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token))));
    814         1.1  augustss }
    815         1.1  augustss 
    816         1.1  augustss void
    817       1.119  augustss uhci_dump_qh(uhci_soft_qh_t *sqh)
    818         1.1  augustss {
    819        1.67  augustss 	DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh,
    820        1.88   tsutsui 	    (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink),
    821        1.88   tsutsui 	    le32toh(sqh->qh.qh_elink)));
    822         1.1  augustss }
    823         1.1  augustss 
    824        1.13  augustss 
    825       1.110  augustss #if 1
    826         1.1  augustss void
    827       1.119  augustss uhci_dump(void)
    828         1.1  augustss {
    829       1.110  augustss 	uhci_dump_all(thesc);
    830       1.110  augustss }
    831       1.110  augustss #endif
    832         1.1  augustss 
    833       1.110  augustss void
    834       1.119  augustss uhci_dump_all(uhci_softc_t *sc)
    835       1.110  augustss {
    836         1.1  augustss 	uhci_dumpregs(sc);
    837        1.50  augustss 	printf("intrs=%d\n", sc->sc_bus.no_intrs);
    838       1.110  augustss 	/*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/
    839       1.123  augustss 	uhci_dump_qh(sc->sc_lctl_start);
    840         1.1  augustss }
    841         1.1  augustss 
    842        1.67  augustss 
    843        1.67  augustss void
    844       1.119  augustss uhci_dump_qhs(uhci_soft_qh_t *sqh)
    845        1.67  augustss {
    846        1.67  augustss 	uhci_dump_qh(sqh);
    847        1.67  augustss 
    848        1.67  augustss 	/* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards
    849        1.67  augustss 	 * Traverses sideways first, then down.
    850        1.67  augustss 	 *
    851        1.67  augustss 	 * QH1
    852        1.67  augustss 	 * QH2
    853        1.67  augustss 	 * No QH
    854        1.67  augustss 	 * TD2.1
    855        1.67  augustss 	 * TD2.2
    856        1.67  augustss 	 * TD1.1
    857        1.67  augustss 	 * etc.
    858        1.67  augustss 	 *
    859        1.67  augustss 	 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
    860        1.67  augustss 	 */
    861        1.67  augustss 
    862        1.67  augustss 
    863        1.88   tsutsui 	if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T))
    864        1.67  augustss 		uhci_dump_qhs(sqh->hlink);
    865        1.67  augustss 	else
    866        1.67  augustss 		DPRINTF(("No QH\n"));
    867        1.67  augustss 
    868        1.88   tsutsui 	if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T))
    869        1.67  augustss 		uhci_dump_tds(sqh->elink);
    870        1.67  augustss 	else
    871        1.67  augustss 		DPRINTF(("No TD\n"));
    872        1.67  augustss }
    873        1.67  augustss 
    874         1.1  augustss void
    875       1.119  augustss uhci_dump_tds(uhci_soft_td_t *std)
    876         1.1  augustss {
    877        1.67  augustss 	uhci_soft_td_t *td;
    878        1.67  augustss 
    879        1.67  augustss 	for(td = std; td != NULL; td = td->link.std) {
    880        1.67  augustss 		uhci_dump_td(td);
    881         1.1  augustss 
    882        1.67  augustss 		/* Check whether the link pointer in this TD marks
    883        1.67  augustss 		 * the link pointer as end of queue. This avoids
    884        1.67  augustss 		 * printing the free list in case the queue/TD has
    885        1.67  augustss 		 * already been moved there (seatbelt).
    886        1.67  augustss 		 */
    887        1.88   tsutsui 		if (le32toh(td->td.td_link) & UHCI_PTR_T ||
    888        1.88   tsutsui 		    le32toh(td->td.td_link) == 0)
    889        1.67  augustss 			break;
    890        1.67  augustss 	}
    891         1.1  augustss }
    892        1.92  augustss 
    893       1.101  augustss Static void
    894       1.119  augustss uhci_dump_ii(uhci_intr_info_t *ii)
    895        1.92  augustss {
    896        1.95  augustss 	usbd_pipe_handle pipe;
    897        1.95  augustss 	usb_endpoint_descriptor_t *ed;
    898        1.95  augustss 	usbd_device_handle dev;
    899   1.133.2.6   nathanw 
    900        1.98  augustss #ifdef DIAGNOSTIC
    901        1.98  augustss #define DONE ii->isdone
    902        1.98  augustss #else
    903        1.98  augustss #define DONE 0
    904        1.98  augustss #endif
    905        1.95  augustss         if (ii == NULL) {
    906        1.95  augustss                 printf("ii NULL\n");
    907        1.95  augustss                 return;
    908        1.95  augustss         }
    909        1.95  augustss         if (ii->xfer == NULL) {
    910        1.95  augustss 		printf("ii %p: done=%d xfer=NULL\n",
    911        1.98  augustss 		       ii, DONE);
    912        1.95  augustss                 return;
    913        1.95  augustss         }
    914        1.95  augustss         pipe = ii->xfer->pipe;
    915        1.95  augustss         if (pipe == NULL) {
    916        1.95  augustss 		printf("ii %p: done=%d xfer=%p pipe=NULL\n",
    917        1.98  augustss 		       ii, DONE, ii->xfer);
    918        1.95  augustss                 return;
    919        1.95  augustss 	}
    920   1.133.2.4   nathanw         if (pipe->endpoint == NULL) {
    921   1.133.2.4   nathanw 		printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n",
    922   1.133.2.4   nathanw 		       ii, DONE, ii->xfer, pipe);
    923   1.133.2.4   nathanw                 return;
    924   1.133.2.4   nathanw 	}
    925   1.133.2.4   nathanw         if (pipe->device == NULL) {
    926   1.133.2.4   nathanw 		printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n",
    927   1.133.2.4   nathanw 		       ii, DONE, ii->xfer, pipe);
    928   1.133.2.4   nathanw                 return;
    929   1.133.2.4   nathanw 	}
    930        1.95  augustss         ed = pipe->endpoint->edesc;
    931        1.95  augustss         dev = pipe->device;
    932   1.133.2.6   nathanw 	printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n",
    933   1.133.2.6   nathanw 	       ii, DONE, ii->xfer, dev,
    934        1.95  augustss 	       UGETW(dev->ddesc.idVendor),
    935        1.92  augustss 	       UGETW(dev->ddesc.idProduct),
    936        1.92  augustss 	       dev->address, pipe,
    937        1.92  augustss 	       ed->bEndpointAddress, ed->bmAttributes);
    938        1.98  augustss #undef DONE
    939        1.92  augustss }
    940        1.92  augustss 
    941       1.120  augustss void uhci_dump_iis(struct uhci_softc *sc);
    942        1.92  augustss void
    943       1.119  augustss uhci_dump_iis(struct uhci_softc *sc)
    944        1.92  augustss {
    945        1.92  augustss 	uhci_intr_info_t *ii;
    946        1.92  augustss 
    947        1.92  augustss 	printf("intr_info list:\n");
    948        1.92  augustss 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
    949        1.92  augustss 		uhci_dump_ii(ii);
    950        1.92  augustss }
    951        1.92  augustss 
    952       1.120  augustss void iidump(void);
    953       1.119  augustss void iidump(void) { uhci_dump_iis(thesc); }
    954        1.92  augustss 
    955         1.1  augustss #endif
    956         1.1  augustss 
    957         1.1  augustss /*
    958         1.1  augustss  * This routine is executed periodically and simulates interrupts
    959         1.1  augustss  * from the root controller interrupt pipe for port status change.
    960         1.1  augustss  */
    961         1.1  augustss void
    962       1.119  augustss uhci_poll_hub(void *addr)
    963         1.1  augustss {
    964        1.63  augustss 	usbd_xfer_handle xfer = addr;
    965        1.63  augustss 	usbd_pipe_handle pipe = xfer->pipe;
    966         1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
    967         1.1  augustss 	int s;
    968         1.1  augustss 	u_char *p;
    969         1.1  augustss 
    970        1.96  augustss 	DPRINTFN(20, ("uhci_poll_hub\n"));
    971         1.1  augustss 
    972        1.96  augustss 	usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
    973        1.41  augustss 
    974   1.133.2.8   nathanw 	p = KERNADDR(&xfer->dmabuf, 0);
    975         1.1  augustss 	p[0] = 0;
    976         1.1  augustss 	if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
    977         1.1  augustss 		p[0] |= 1<<1;
    978         1.1  augustss 	if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
    979         1.1  augustss 		p[0] |= 1<<2;
    980        1.41  augustss 	if (p[0] == 0)
    981        1.41  augustss 		/* No change, try again in a while */
    982        1.41  augustss 		return;
    983        1.41  augustss 
    984        1.63  augustss 	xfer->actlen = 1;
    985        1.63  augustss 	xfer->status = USBD_NORMAL_COMPLETION;
    986        1.16  augustss 	s = splusb();
    987        1.63  augustss 	xfer->device->bus->intr_context++;
    988        1.63  augustss 	usb_transfer_complete(xfer);
    989        1.63  augustss 	xfer->device->bus->intr_context--;
    990        1.41  augustss 	splx(s);
    991        1.41  augustss }
    992        1.41  augustss 
    993        1.41  augustss void
    994       1.119  augustss uhci_root_intr_done(usbd_xfer_handle xfer)
    995        1.84  augustss {
    996        1.84  augustss }
    997        1.84  augustss 
    998        1.84  augustss void
    999       1.119  augustss uhci_root_ctrl_done(usbd_xfer_handle xfer)
   1000        1.41  augustss {
   1001         1.1  augustss }
   1002         1.1  augustss 
   1003       1.123  augustss /*
   1004       1.123  augustss  * Let the last QH loop back to the high speed control transfer QH.
   1005       1.123  augustss  * This is what intel calls "bandwidth reclamation" and improves
   1006       1.123  augustss  * USB performance a lot for some devices.
   1007       1.123  augustss  * If we are already looping, just count it.
   1008       1.123  augustss  */
   1009         1.1  augustss void
   1010       1.123  augustss uhci_add_loop(uhci_softc_t *sc) {
   1011       1.125  augustss #ifdef UHCI_DEBUG
   1012       1.125  augustss 	if (uhcinoloop)
   1013       1.125  augustss 		return;
   1014       1.125  augustss #endif
   1015       1.123  augustss 	if (++sc->sc_loops == 1) {
   1016       1.125  augustss 		DPRINTFN(5,("uhci_start_loop: add\n"));
   1017       1.123  augustss 		/* Note, we don't loop back the soft pointer. */
   1018   1.133.2.6   nathanw 		sc->sc_last_qh->qh.qh_hlink =
   1019       1.123  augustss 		    htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH);
   1020       1.123  augustss 	}
   1021       1.123  augustss }
   1022       1.123  augustss 
   1023       1.123  augustss void
   1024       1.123  augustss uhci_rem_loop(uhci_softc_t *sc) {
   1025       1.125  augustss #ifdef UHCI_DEBUG
   1026       1.125  augustss 	if (uhcinoloop)
   1027       1.125  augustss 		return;
   1028       1.125  augustss #endif
   1029       1.123  augustss 	if (--sc->sc_loops == 0) {
   1030       1.123  augustss 		DPRINTFN(5,("uhci_end_loop: remove\n"));
   1031       1.123  augustss 		sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T);
   1032       1.123  augustss 	}
   1033       1.123  augustss }
   1034       1.123  augustss 
   1035       1.123  augustss /* Add high speed control QH, called at splusb(). */
   1036       1.123  augustss void
   1037       1.123  augustss uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1038         1.1  augustss {
   1039        1.42  augustss 	uhci_soft_qh_t *eqh;
   1040         1.1  augustss 
   1041        1.52  augustss 	SPLUSBCHECK;
   1042        1.52  augustss 
   1043         1.1  augustss 	DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
   1044       1.123  augustss 	eqh = sc->sc_hctl_end;
   1045        1.42  augustss 	sqh->hlink       = eqh->hlink;
   1046        1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1047        1.42  augustss 	eqh->hlink       = sqh;
   1048       1.121  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1049       1.123  augustss 	sc->sc_hctl_end = sqh;
   1050       1.125  augustss #ifdef UHCI_CTL_LOOP
   1051       1.123  augustss 	uhci_add_loop(sc);
   1052       1.125  augustss #endif
   1053         1.1  augustss }
   1054         1.1  augustss 
   1055       1.123  augustss /* Remove high speed control QH, called at splusb(). */
   1056         1.1  augustss void
   1057       1.123  augustss uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1058         1.1  augustss {
   1059         1.1  augustss 	uhci_soft_qh_t *pqh;
   1060         1.1  augustss 
   1061        1.52  augustss 	SPLUSBCHECK;
   1062        1.52  augustss 
   1063       1.123  augustss 	DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh));
   1064       1.125  augustss #ifdef UHCI_CTL_LOOP
   1065       1.123  augustss 	uhci_rem_loop(sc);
   1066       1.125  augustss #endif
   1067       1.124  augustss 	/*
   1068       1.124  augustss 	 * The T bit should be set in the elink of the QH so that the HC
   1069       1.124  augustss 	 * doesn't follow the pointer.  This condition may fail if the
   1070       1.124  augustss 	 * the transferred packet was short so that the QH still points
   1071       1.124  augustss 	 * at the last used TD.
   1072       1.124  augustss 	 * In this case we set the T bit and wait a little for the HC
   1073       1.124  augustss 	 * to stop looking at the TD.
   1074       1.124  augustss 	 */
   1075       1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1076       1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1077       1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1078       1.124  augustss 	}
   1079       1.124  augustss 
   1080       1.123  augustss 	pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh);
   1081   1.133.2.6   nathanw 	pqh->hlink = sqh->hlink;
   1082        1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1083       1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1084       1.123  augustss 	if (sc->sc_hctl_end == sqh)
   1085       1.123  augustss 		sc->sc_hctl_end = pqh;
   1086       1.123  augustss }
   1087       1.123  augustss 
   1088       1.123  augustss /* Add low speed control QH, called at splusb(). */
   1089       1.123  augustss void
   1090       1.123  augustss uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1091       1.123  augustss {
   1092       1.123  augustss 	uhci_soft_qh_t *eqh;
   1093       1.123  augustss 
   1094       1.123  augustss 	SPLUSBCHECK;
   1095       1.123  augustss 
   1096       1.123  augustss 	DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh));
   1097       1.123  augustss 	eqh = sc->sc_lctl_end;
   1098   1.133.2.6   nathanw 	sqh->hlink = eqh->hlink;
   1099       1.123  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1100   1.133.2.6   nathanw 	eqh->hlink = sqh;
   1101       1.123  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1102       1.123  augustss 	sc->sc_lctl_end = sqh;
   1103       1.123  augustss }
   1104       1.123  augustss 
   1105       1.123  augustss /* Remove low speed control QH, called at splusb(). */
   1106       1.123  augustss void
   1107       1.123  augustss uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1108       1.123  augustss {
   1109       1.123  augustss 	uhci_soft_qh_t *pqh;
   1110       1.123  augustss 
   1111       1.123  augustss 	SPLUSBCHECK;
   1112       1.123  augustss 
   1113       1.123  augustss 	DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh));
   1114       1.124  augustss 	/* See comment in uhci_remove_hs_ctrl() */
   1115       1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1116       1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1117       1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1118       1.124  augustss 	}
   1119       1.123  augustss 	pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh);
   1120   1.133.2.6   nathanw 	pqh->hlink = sqh->hlink;
   1121       1.123  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1122       1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1123       1.123  augustss 	if (sc->sc_lctl_end == sqh)
   1124       1.123  augustss 		sc->sc_lctl_end = pqh;
   1125         1.1  augustss }
   1126         1.1  augustss 
   1127         1.1  augustss /* Add bulk QH, called at splusb(). */
   1128         1.1  augustss void
   1129       1.119  augustss uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1130         1.1  augustss {
   1131        1.42  augustss 	uhci_soft_qh_t *eqh;
   1132         1.1  augustss 
   1133        1.52  augustss 	SPLUSBCHECK;
   1134        1.52  augustss 
   1135         1.1  augustss 	DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
   1136        1.42  augustss 	eqh = sc->sc_bulk_end;
   1137   1.133.2.6   nathanw 	sqh->hlink = eqh->hlink;
   1138        1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1139   1.133.2.6   nathanw 	eqh->hlink = sqh;
   1140       1.121  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1141         1.1  augustss 	sc->sc_bulk_end = sqh;
   1142       1.123  augustss 	uhci_add_loop(sc);
   1143         1.1  augustss }
   1144         1.1  augustss 
   1145         1.1  augustss /* Remove bulk QH, called at splusb(). */
   1146         1.1  augustss void
   1147       1.119  augustss uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1148         1.1  augustss {
   1149         1.1  augustss 	uhci_soft_qh_t *pqh;
   1150         1.1  augustss 
   1151        1.52  augustss 	SPLUSBCHECK;
   1152        1.52  augustss 
   1153         1.1  augustss 	DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
   1154       1.123  augustss 	uhci_rem_loop(sc);
   1155       1.124  augustss 	/* See comment in uhci_remove_hs_ctrl() */
   1156       1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1157       1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1158       1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1159       1.124  augustss 	}
   1160        1.92  augustss 	pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh);
   1161        1.42  augustss 	pqh->hlink       = sqh->hlink;
   1162        1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1163       1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1164         1.1  augustss 	if (sc->sc_bulk_end == sqh)
   1165         1.1  augustss 		sc->sc_bulk_end = pqh;
   1166         1.1  augustss }
   1167         1.1  augustss 
   1168   1.133.2.4   nathanw Static int uhci_intr1(uhci_softc_t *);
   1169   1.133.2.4   nathanw 
   1170         1.1  augustss int
   1171       1.119  augustss uhci_intr(void *arg)
   1172         1.1  augustss {
   1173        1.44  augustss 	uhci_softc_t *sc = arg;
   1174   1.133.2.4   nathanw 
   1175   1.133.2.5   nathanw 	if (sc->sc_dying)
   1176   1.133.2.5   nathanw 		return (0);
   1177   1.133.2.5   nathanw 
   1178   1.133.2.4   nathanw 	DPRINTFN(15,("uhci_intr: real interrupt\n"));
   1179   1.133.2.4   nathanw 	if (sc->sc_bus.use_polling) {
   1180   1.133.2.4   nathanw #ifdef DIAGNOSTIC
   1181   1.133.2.4   nathanw 		printf("uhci_intr: ignored interrupt while polling\n");
   1182   1.133.2.4   nathanw #endif
   1183   1.133.2.4   nathanw 		return (0);
   1184   1.133.2.4   nathanw 	}
   1185   1.133.2.4   nathanw 	return (uhci_intr1(sc));
   1186   1.133.2.4   nathanw }
   1187   1.133.2.4   nathanw 
   1188   1.133.2.4   nathanw int
   1189   1.133.2.4   nathanw uhci_intr1(uhci_softc_t *sc)
   1190   1.133.2.4   nathanw {
   1191        1.44  augustss 	int status;
   1192        1.44  augustss 	int ack;
   1193         1.1  augustss 
   1194        1.67  augustss #ifdef UHCI_DEBUG
   1195        1.44  augustss 	if (uhcidebug > 15) {
   1196   1.133.2.4   nathanw 		DPRINTF(("%s: uhci_intr1\n", USBDEVNAME(sc->sc_bus.bdev)));
   1197         1.1  augustss 		uhci_dumpregs(sc);
   1198         1.1  augustss 	}
   1199         1.1  augustss #endif
   1200       1.117  augustss 
   1201   1.133.2.6   nathanw 	status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS;
   1202       1.127     soren 	if (status == 0)	/* The interrupt was not for us. */
   1203       1.127     soren 		return (0);
   1204       1.127     soren 
   1205       1.117  augustss 	if (sc->sc_suspend != PWR_RESUME) {
   1206       1.117  augustss 		printf("%s: interrupt while not operating ignored\n",
   1207       1.117  augustss 		       USBDEVNAME(sc->sc_bus.bdev));
   1208   1.133.2.1   nathanw 		UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */
   1209       1.117  augustss 		return (0);
   1210       1.117  augustss 	}
   1211        1.44  augustss 
   1212        1.44  augustss 	ack = 0;
   1213        1.44  augustss 	if (status & UHCI_STS_USBINT)
   1214        1.44  augustss 		ack |= UHCI_STS_USBINT;
   1215        1.44  augustss 	if (status & UHCI_STS_USBEI)
   1216        1.44  augustss 		ack |= UHCI_STS_USBEI;
   1217         1.1  augustss 	if (status & UHCI_STS_RD) {
   1218        1.44  augustss 		ack |= UHCI_STS_RD;
   1219       1.118  augustss #ifdef UHCI_DEBUG
   1220        1.46  augustss 		printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
   1221       1.118  augustss #endif
   1222         1.1  augustss 	}
   1223         1.1  augustss 	if (status & UHCI_STS_HSE) {
   1224        1.44  augustss 		ack |= UHCI_STS_HSE;
   1225        1.81  augustss 		printf("%s: host system error\n", USBDEVNAME(sc->sc_bus.bdev));
   1226         1.1  augustss 	}
   1227         1.1  augustss 	if (status & UHCI_STS_HCPE) {
   1228        1.44  augustss 		ack |= UHCI_STS_HCPE;
   1229   1.133.2.6   nathanw 		printf("%s: host controller process error\n",
   1230        1.81  augustss 		       USBDEVNAME(sc->sc_bus.bdev));
   1231        1.44  augustss 	}
   1232        1.44  augustss 	if (status & UHCI_STS_HCH) {
   1233        1.44  augustss 		/* no acknowledge needed */
   1234   1.133.2.2   nathanw 		if (!sc->sc_dying) {
   1235   1.133.2.6   nathanw 			printf("%s: host controller halted\n",
   1236       1.129  augustss 			    USBDEVNAME(sc->sc_bus.bdev));
   1237       1.110  augustss #ifdef UHCI_DEBUG
   1238   1.133.2.2   nathanw 			uhci_dump_all(sc);
   1239       1.110  augustss #endif
   1240   1.133.2.2   nathanw 		}
   1241   1.133.2.2   nathanw 		sc->sc_dying = 1;
   1242         1.1  augustss 	}
   1243        1.44  augustss 
   1244       1.132  augustss 	if (!ack)
   1245       1.132  augustss 		return (0);	/* nothing to acknowledge */
   1246       1.132  augustss 	UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */
   1247         1.1  augustss 
   1248        1.85  augustss 	sc->sc_bus.no_intrs++;
   1249        1.85  augustss 	usb_schedsoftintr(&sc->sc_bus);
   1250        1.85  augustss 
   1251        1.85  augustss 	DPRINTFN(10, ("%s: uhci_intr: exit\n", USBDEVNAME(sc->sc_bus.bdev)));
   1252        1.85  augustss 
   1253        1.85  augustss 	return (1);
   1254        1.85  augustss }
   1255        1.85  augustss 
   1256        1.85  augustss void
   1257       1.133  augustss uhci_softintr(void *v)
   1258        1.85  augustss {
   1259       1.133  augustss 	uhci_softc_t *sc = v;
   1260        1.85  augustss 	uhci_intr_info_t *ii;
   1261        1.85  augustss 
   1262   1.133.2.4   nathanw 	DPRINTFN(10,("%s: uhci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev),
   1263   1.133.2.4   nathanw 		     sc->sc_bus.intr_context));
   1264        1.85  augustss 
   1265        1.51  augustss 	sc->sc_bus.intr_context++;
   1266        1.50  augustss 
   1267         1.1  augustss 	/*
   1268         1.1  augustss 	 * Interrupts on UHCI really suck.  When the host controller
   1269         1.1  augustss 	 * interrupts because a transfer is completed there is no
   1270         1.1  augustss 	 * way of knowing which transfer it was.  You can scan down
   1271         1.1  augustss 	 * the TDs and QHs of the previous frame to limit the search,
   1272         1.1  augustss 	 * but that assumes that the interrupt was not delayed by more
   1273         1.1  augustss 	 * than 1 ms, which may not always be true (e.g. after debug
   1274         1.1  augustss 	 * output on a slow console).
   1275         1.1  augustss 	 * We scan all interrupt descriptors to see if any have
   1276         1.1  augustss 	 * completed.
   1277         1.1  augustss 	 */
   1278         1.1  augustss 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
   1279         1.1  augustss 		uhci_check_intr(sc, ii);
   1280         1.1  augustss 
   1281  1.133.2.12   nathanw #ifdef USB_USE_SOFTINTR
   1282   1.133.2.6   nathanw 	if (sc->sc_softwake) {
   1283   1.133.2.6   nathanw 		sc->sc_softwake = 0;
   1284   1.133.2.6   nathanw 		wakeup(&sc->sc_softwake);
   1285   1.133.2.6   nathanw 	}
   1286  1.133.2.12   nathanw #endif /* USB_USE_SOFTINTR */
   1287   1.133.2.6   nathanw 
   1288        1.51  augustss 	sc->sc_bus.intr_context--;
   1289         1.1  augustss }
   1290         1.1  augustss 
   1291         1.1  augustss /* Check for an interrupt. */
   1292         1.1  augustss void
   1293       1.119  augustss uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii)
   1294         1.1  augustss {
   1295         1.1  augustss 	uhci_soft_td_t *std, *lstd;
   1296        1.18  augustss 	u_int32_t status;
   1297         1.1  augustss 
   1298         1.1  augustss 	DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
   1299         1.1  augustss #ifdef DIAGNOSTIC
   1300        1.63  augustss 	if (ii == NULL) {
   1301         1.1  augustss 		printf("uhci_check_intr: no ii? %p\n", ii);
   1302         1.1  augustss 		return;
   1303         1.1  augustss 	}
   1304         1.1  augustss #endif
   1305   1.133.2.6   nathanw 	if (ii->xfer->status == USBD_CANCELLED ||
   1306   1.133.2.6   nathanw 	    ii->xfer->status == USBD_TIMEOUT) {
   1307   1.133.2.6   nathanw 		DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer));
   1308   1.133.2.6   nathanw 		return;
   1309   1.133.2.6   nathanw 	}
   1310   1.133.2.6   nathanw 
   1311        1.63  augustss 	if (ii->stdstart == NULL)
   1312         1.1  augustss 		return;
   1313         1.1  augustss 	lstd = ii->stdend;
   1314         1.1  augustss #ifdef DIAGNOSTIC
   1315        1.63  augustss 	if (lstd == NULL) {
   1316         1.1  augustss 		printf("uhci_check_intr: std==0\n");
   1317         1.1  augustss 		return;
   1318         1.1  augustss 	}
   1319         1.1  augustss #endif
   1320   1.133.2.6   nathanw 	/*
   1321        1.26  augustss 	 * If the last TD is still active we need to check whether there
   1322        1.26  augustss 	 * is a an error somewhere in the middle, or whether there was a
   1323        1.26  augustss 	 * short packet (SPD and not ACTIVE).
   1324        1.26  augustss 	 */
   1325        1.88   tsutsui 	if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) {
   1326        1.92  augustss 		DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii));
   1327        1.48  augustss 		for (std = ii->stdstart; std != lstd; std = std->link.std) {
   1328        1.88   tsutsui 			status = le32toh(std->td.td_status);
   1329        1.83  augustss 			/* If there's an active TD the xfer isn't done. */
   1330        1.83  augustss 			if (status & UHCI_TD_ACTIVE)
   1331        1.83  augustss 				break;
   1332        1.83  augustss 			/* Any kind of error makes the xfer done. */
   1333        1.83  augustss 			if (status & UHCI_TD_STALLED)
   1334        1.83  augustss 				goto done;
   1335        1.83  augustss 			/* We want short packets, and it is short: it's done */
   1336        1.83  augustss 			if ((status & UHCI_TD_SPD) &&
   1337   1.133.2.6   nathanw 			      UHCI_TD_GET_ACTLEN(status) <
   1338        1.88   tsutsui 			      UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)))
   1339         1.1  augustss 				goto done;
   1340        1.18  augustss 		}
   1341        1.92  augustss 		DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n",
   1342        1.18  augustss 			      ii, ii->stdstart));
   1343         1.1  augustss 		return;
   1344         1.1  augustss 	}
   1345         1.1  augustss  done:
   1346        1.92  augustss 	DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii));
   1347        1.96  augustss 	usb_uncallout(ii->xfer->timeout_handle, uhci_timeout, ii);
   1348        1.36  augustss 	uhci_idone(ii);
   1349         1.1  augustss }
   1350         1.1  augustss 
   1351        1.52  augustss /* Called at splusb() */
   1352         1.1  augustss void
   1353       1.119  augustss uhci_idone(uhci_intr_info_t *ii)
   1354         1.1  augustss {
   1355        1.63  augustss 	usbd_xfer_handle xfer = ii->xfer;
   1356        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   1357         1.1  augustss 	uhci_soft_td_t *std;
   1358        1.67  augustss 	u_int32_t status = 0, nstatus;
   1359        1.26  augustss 	int actlen;
   1360         1.1  augustss 
   1361   1.133.2.4   nathanw 	DPRINTFN(12, ("uhci_idone: ii=%p\n", ii));
   1362         1.7  augustss #ifdef DIAGNOSTIC
   1363         1.7  augustss 	{
   1364         1.7  augustss 		int s = splhigh();
   1365         1.7  augustss 		if (ii->isdone) {
   1366        1.26  augustss 			splx(s);
   1367        1.92  augustss #ifdef UHCI_DEBUG
   1368        1.92  augustss 			printf("uhci_idone: ii is done!\n   ");
   1369        1.92  augustss 			uhci_dump_ii(ii);
   1370        1.92  augustss #else
   1371        1.36  augustss 			printf("uhci_idone: ii=%p is done!\n", ii);
   1372        1.92  augustss #endif
   1373         1.7  augustss 			return;
   1374         1.7  augustss 		}
   1375         1.7  augustss 		ii->isdone = 1;
   1376         1.7  augustss 		splx(s);
   1377         1.7  augustss 	}
   1378         1.7  augustss #endif
   1379         1.1  augustss 
   1380        1.63  augustss 	if (xfer->nframes != 0) {
   1381        1.48  augustss 		/* Isoc transfer, do things differently. */
   1382        1.48  augustss 		uhci_soft_td_t **stds = upipe->u.iso.stds;
   1383       1.126  augustss 		int i, n, nframes, len;
   1384        1.48  augustss 
   1385        1.48  augustss 		DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii));
   1386        1.48  augustss 
   1387        1.63  augustss 		nframes = xfer->nframes;
   1388        1.48  augustss 		actlen = 0;
   1389        1.92  augustss 		n = UXFER(xfer)->curframe;
   1390        1.48  augustss 		for (i = 0; i < nframes; i++) {
   1391        1.48  augustss 			std = stds[n];
   1392        1.59  augustss #ifdef UHCI_DEBUG
   1393        1.48  augustss 			if (uhcidebug > 5) {
   1394        1.48  augustss 				DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i));
   1395        1.48  augustss 				uhci_dump_td(std);
   1396        1.48  augustss 			}
   1397        1.48  augustss #endif
   1398        1.48  augustss 			if (++n >= UHCI_VFRAMELIST_COUNT)
   1399        1.48  augustss 				n = 0;
   1400        1.88   tsutsui 			status = le32toh(std->td.td_status);
   1401       1.126  augustss 			len = UHCI_TD_GET_ACTLEN(status);
   1402       1.126  augustss 			xfer->frlengths[i] = len;
   1403       1.126  augustss 			actlen += len;
   1404        1.48  augustss 		}
   1405        1.48  augustss 		upipe->u.iso.inuse -= nframes;
   1406        1.63  augustss 		xfer->actlen = actlen;
   1407        1.63  augustss 		xfer->status = USBD_NORMAL_COMPLETION;
   1408   1.133.2.4   nathanw 		goto end;
   1409        1.48  augustss 	}
   1410        1.48  augustss 
   1411        1.59  augustss #ifdef UHCI_DEBUG
   1412        1.65  augustss 	DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n",
   1413        1.65  augustss 		      ii, xfer, upipe));
   1414        1.48  augustss 	if (uhcidebug > 10)
   1415        1.48  augustss 		uhci_dump_tds(ii->stdstart);
   1416        1.48  augustss #endif
   1417        1.48  augustss 
   1418        1.26  augustss 	/* The transfer is done, compute actual length and status. */
   1419        1.26  augustss 	actlen = 0;
   1420        1.63  augustss 	for (std = ii->stdstart; std != NULL; std = std->link.std) {
   1421        1.88   tsutsui 		nstatus = le32toh(std->td.td_status);
   1422        1.64  augustss 		if (nstatus & UHCI_TD_ACTIVE)
   1423        1.26  augustss 			break;
   1424        1.67  augustss 
   1425        1.64  augustss 		status = nstatus;
   1426        1.88   tsutsui 		if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) !=
   1427        1.88   tsutsui 			UHCI_TD_PID_SETUP)
   1428        1.26  augustss 			actlen += UHCI_TD_GET_ACTLEN(status);
   1429         1.1  augustss 	}
   1430        1.38  augustss 	/* If there are left over TDs we need to update the toggle. */
   1431        1.63  augustss 	if (std != NULL)
   1432        1.88   tsutsui 		upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token));
   1433        1.38  augustss 
   1434         1.1  augustss 	status &= UHCI_TD_ERROR;
   1435   1.133.2.6   nathanw 	DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n",
   1436        1.26  augustss 		      actlen, status));
   1437        1.63  augustss 	xfer->actlen = actlen;
   1438         1.1  augustss 	if (status != 0) {
   1439       1.122        tv #ifdef UHCI_DEBUG
   1440       1.122        tv 		char sbuf[128];
   1441       1.122        tv 
   1442   1.133.2.5   nathanw 		bitmask_snprintf((u_int32_t)status,
   1443   1.133.2.5   nathanw 				 "\20\22BITSTUFF\23CRCTO\24NAK\25"
   1444       1.122        tv 				 "BABBLE\26DBUFFER\27STALLED\30ACTIVE",
   1445       1.122        tv 				 sbuf, sizeof(sbuf));
   1446       1.122        tv 
   1447        1.75  augustss 		DPRINTFN((status == UHCI_TD_STALLED)*10,
   1448        1.36  augustss 			 ("uhci_idone: error, addr=%d, endpt=0x%02x, "
   1449       1.122        tv 			  "status 0x%s\n",
   1450        1.63  augustss 			  xfer->pipe->device->address,
   1451        1.63  augustss 			  xfer->pipe->endpoint->edesc->bEndpointAddress,
   1452       1.122        tv 			  sbuf));
   1453       1.122        tv #endif
   1454       1.122        tv 
   1455         1.1  augustss 		if (status == UHCI_TD_STALLED)
   1456        1.63  augustss 			xfer->status = USBD_STALLED;
   1457         1.1  augustss 		else
   1458        1.63  augustss 			xfer->status = USBD_IOERROR; /* more info XXX */
   1459         1.1  augustss 	} else {
   1460        1.63  augustss 		xfer->status = USBD_NORMAL_COMPLETION;
   1461         1.1  augustss 	}
   1462   1.133.2.4   nathanw 
   1463   1.133.2.4   nathanw  end:
   1464        1.63  augustss 	usb_transfer_complete(xfer);
   1465   1.133.2.4   nathanw 	DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii));
   1466         1.1  augustss }
   1467         1.1  augustss 
   1468        1.13  augustss /*
   1469        1.13  augustss  * Called when a request does not complete.
   1470        1.13  augustss  */
   1471         1.1  augustss void
   1472       1.119  augustss uhci_timeout(void *addr)
   1473         1.1  augustss {
   1474         1.1  augustss 	uhci_intr_info_t *ii = addr;
   1475   1.133.2.6   nathanw 	struct uhci_xfer *uxfer = UXFER(ii->xfer);
   1476   1.133.2.6   nathanw 	struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe;
   1477   1.133.2.6   nathanw 	uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
   1478         1.1  augustss 
   1479   1.133.2.6   nathanw 	DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer));
   1480        1.51  augustss 
   1481   1.133.2.6   nathanw 	if (sc->sc_dying) {
   1482   1.133.2.6   nathanw 		uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT);
   1483   1.133.2.6   nathanw 		return;
   1484   1.133.2.6   nathanw 	}
   1485   1.133.2.6   nathanw 
   1486   1.133.2.6   nathanw 	/* Execute the abort in a process context. */
   1487   1.133.2.7   nathanw 	usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer);
   1488   1.133.2.6   nathanw 	usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task);
   1489   1.133.2.6   nathanw }
   1490   1.133.2.6   nathanw 
   1491   1.133.2.6   nathanw void
   1492   1.133.2.6   nathanw uhci_timeout_task(void *addr)
   1493   1.133.2.6   nathanw {
   1494   1.133.2.6   nathanw 	usbd_xfer_handle xfer = addr;
   1495   1.133.2.6   nathanw 	int s;
   1496        1.67  augustss 
   1497   1.133.2.6   nathanw 	DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer));
   1498   1.133.2.6   nathanw 
   1499   1.133.2.6   nathanw 	s = splusb();
   1500   1.133.2.6   nathanw 	uhci_abort_xfer(xfer, USBD_TIMEOUT);
   1501   1.133.2.6   nathanw 	splx(s);
   1502         1.1  augustss }
   1503         1.1  augustss 
   1504         1.1  augustss /*
   1505         1.1  augustss  * Wait here until controller claims to have an interrupt.
   1506         1.1  augustss  * Then call uhci_intr and return.  Use timeout to avoid waiting
   1507         1.1  augustss  * too long.
   1508        1.13  augustss  * Only used during boot when interrupts are not enabled yet.
   1509         1.1  augustss  */
   1510         1.1  augustss void
   1511       1.119  augustss uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer)
   1512         1.1  augustss {
   1513        1.63  augustss 	int timo = xfer->timeout;
   1514        1.13  augustss 	uhci_intr_info_t *ii;
   1515        1.13  augustss 
   1516        1.26  augustss 	DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
   1517         1.1  augustss 
   1518        1.63  augustss 	xfer->status = USBD_IN_PROGRESS;
   1519        1.26  augustss 	for (; timo >= 0; timo--) {
   1520        1.20  augustss 		usb_delay_ms(&sc->sc_bus, 1);
   1521        1.26  augustss 		DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
   1522         1.1  augustss 		if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
   1523   1.133.2.4   nathanw 			uhci_intr1(sc);
   1524        1.63  augustss 			if (xfer->status != USBD_IN_PROGRESS)
   1525         1.1  augustss 				return;
   1526         1.1  augustss 		}
   1527         1.1  augustss 	}
   1528        1.13  augustss 
   1529        1.13  augustss 	/* Timeout */
   1530        1.13  augustss 	DPRINTF(("uhci_waitintr: timeout\n"));
   1531        1.13  augustss 	for (ii = LIST_FIRST(&sc->sc_intrhead);
   1532   1.133.2.6   nathanw 	     ii != NULL && ii->xfer != xfer;
   1533        1.13  augustss 	     ii = LIST_NEXT(ii, list))
   1534        1.13  augustss 		;
   1535        1.41  augustss #ifdef DIAGNOSTIC
   1536        1.63  augustss 	if (ii == NULL)
   1537  1.133.2.12   nathanw 		panic("uhci_waitintr: lost intr_info");
   1538        1.41  augustss #endif
   1539        1.41  augustss 	uhci_idone(ii);
   1540         1.1  augustss }
   1541         1.1  augustss 
   1542         1.8  augustss void
   1543       1.119  augustss uhci_poll(struct usbd_bus *bus)
   1544         1.8  augustss {
   1545         1.8  augustss 	uhci_softc_t *sc = (uhci_softc_t *)bus;
   1546         1.8  augustss 
   1547         1.8  augustss 	if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT)
   1548   1.133.2.4   nathanw 		uhci_intr1(sc);
   1549         1.8  augustss }
   1550         1.8  augustss 
   1551         1.1  augustss void
   1552       1.119  augustss uhci_reset(uhci_softc_t *sc)
   1553         1.1  augustss {
   1554         1.1  augustss 	int n;
   1555         1.1  augustss 
   1556         1.1  augustss 	UHCICMD(sc, UHCI_CMD_HCRESET);
   1557         1.1  augustss 	/* The reset bit goes low when the controller is done. */
   1558   1.133.2.6   nathanw 	for (n = 0; n < UHCI_RESET_TIMEOUT &&
   1559         1.1  augustss 		    (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
   1560        1.92  augustss 		usb_delay_ms(&sc->sc_bus, 1);
   1561         1.1  augustss 	if (n >= UHCI_RESET_TIMEOUT)
   1562   1.133.2.6   nathanw 		printf("%s: controller did not reset\n",
   1563        1.13  augustss 		       USBDEVNAME(sc->sc_bus.bdev));
   1564         1.1  augustss }
   1565         1.1  augustss 
   1566        1.16  augustss usbd_status
   1567       1.119  augustss uhci_run(uhci_softc_t *sc, int run)
   1568         1.1  augustss {
   1569         1.1  augustss 	int s, n, running;
   1570        1.71  augustss 	u_int16_t cmd;
   1571         1.1  augustss 
   1572         1.1  augustss 	run = run != 0;
   1573       1.132  augustss 	s = splhardusb();
   1574        1.30  augustss 	DPRINTF(("uhci_run: setting run=%d\n", run));
   1575        1.71  augustss 	cmd = UREAD2(sc, UHCI_CMD);
   1576        1.71  augustss 	if (run)
   1577        1.71  augustss 		cmd |= UHCI_CMD_RS;
   1578        1.71  augustss 	else
   1579        1.71  augustss 		cmd &= ~UHCI_CMD_RS;
   1580        1.71  augustss 	UHCICMD(sc, cmd);
   1581        1.13  augustss 	for(n = 0; n < 10; n++) {
   1582         1.1  augustss 		running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
   1583         1.1  augustss 		/* return when we've entered the state we want */
   1584         1.1  augustss 		if (run == running) {
   1585         1.1  augustss 			splx(s);
   1586        1.30  augustss 			DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
   1587        1.30  augustss 				 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
   1588        1.16  augustss 			return (USBD_NORMAL_COMPLETION);
   1589         1.1  augustss 		}
   1590        1.20  augustss 		usb_delay_ms(&sc->sc_bus, 1);
   1591         1.1  augustss 	}
   1592         1.1  augustss 	splx(s);
   1593        1.13  augustss 	printf("%s: cannot %s\n", USBDEVNAME(sc->sc_bus.bdev),
   1594        1.14  augustss 	       run ? "start" : "stop");
   1595        1.16  augustss 	return (USBD_IOERROR);
   1596         1.1  augustss }
   1597         1.1  augustss 
   1598         1.1  augustss /*
   1599         1.1  augustss  * Memory management routines.
   1600         1.1  augustss  *  uhci_alloc_std allocates TDs
   1601         1.1  augustss  *  uhci_alloc_sqh allocates QHs
   1602         1.7  augustss  * These two routines do their own free list management,
   1603         1.1  augustss  * partly for speed, partly because allocating DMAable memory
   1604         1.1  augustss  * has page size granularaity so much memory would be wasted if
   1605        1.16  augustss  * only one TD/QH (32 bytes) was placed in each allocated chunk.
   1606         1.1  augustss  */
   1607         1.1  augustss 
   1608         1.1  augustss uhci_soft_td_t *
   1609       1.119  augustss uhci_alloc_std(uhci_softc_t *sc)
   1610         1.1  augustss {
   1611         1.1  augustss 	uhci_soft_td_t *std;
   1612        1.63  augustss 	usbd_status err;
   1613        1.42  augustss 	int i, offs;
   1614         1.7  augustss 	usb_dma_t dma;
   1615         1.1  augustss 
   1616        1.63  augustss 	if (sc->sc_freetds == NULL) {
   1617         1.1  augustss 		DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
   1618        1.63  augustss 		err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK,
   1619        1.63  augustss 			  UHCI_TD_ALIGN, &dma);
   1620        1.63  augustss 		if (err)
   1621        1.16  augustss 			return (0);
   1622        1.43  augustss 		for(i = 0; i < UHCI_STD_CHUNK; i++) {
   1623        1.42  augustss 			offs = i * UHCI_STD_SIZE;
   1624   1.133.2.8   nathanw 			std = KERNADDR(&dma, offs);
   1625   1.133.2.8   nathanw 			std->physaddr = DMAADDR(&dma, offs);
   1626        1.42  augustss 			std->link.std = sc->sc_freetds;
   1627         1.1  augustss 			sc->sc_freetds = std;
   1628         1.1  augustss 		}
   1629         1.1  augustss 	}
   1630         1.1  augustss 	std = sc->sc_freetds;
   1631        1.42  augustss 	sc->sc_freetds = std->link.std;
   1632        1.42  augustss 	memset(&std->td, 0, sizeof(uhci_td_t));
   1633         1.1  augustss 	return std;
   1634         1.1  augustss }
   1635         1.1  augustss 
   1636         1.1  augustss void
   1637       1.119  augustss uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std)
   1638         1.1  augustss {
   1639         1.7  augustss #ifdef DIAGNOSTIC
   1640         1.7  augustss #define TD_IS_FREE 0x12345678
   1641        1.88   tsutsui 	if (le32toh(std->td.td_token) == TD_IS_FREE) {
   1642         1.7  augustss 		printf("uhci_free_std: freeing free TD %p\n", std);
   1643         1.7  augustss 		return;
   1644         1.7  augustss 	}
   1645        1.88   tsutsui 	std->td.td_token = htole32(TD_IS_FREE);
   1646         1.7  augustss #endif
   1647        1.42  augustss 	std->link.std = sc->sc_freetds;
   1648         1.1  augustss 	sc->sc_freetds = std;
   1649         1.1  augustss }
   1650         1.1  augustss 
   1651         1.1  augustss uhci_soft_qh_t *
   1652       1.119  augustss uhci_alloc_sqh(uhci_softc_t *sc)
   1653         1.1  augustss {
   1654         1.1  augustss 	uhci_soft_qh_t *sqh;
   1655        1.63  augustss 	usbd_status err;
   1656         1.1  augustss 	int i, offs;
   1657         1.7  augustss 	usb_dma_t dma;
   1658         1.1  augustss 
   1659        1.63  augustss 	if (sc->sc_freeqhs == NULL) {
   1660         1.1  augustss 		DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
   1661        1.63  augustss 		err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK,
   1662        1.63  augustss 			  UHCI_QH_ALIGN, &dma);
   1663        1.63  augustss 		if (err)
   1664        1.63  augustss 			return (0);
   1665        1.43  augustss 		for(i = 0; i < UHCI_SQH_CHUNK; i++) {
   1666        1.42  augustss 			offs = i * UHCI_SQH_SIZE;
   1667   1.133.2.8   nathanw 			sqh = KERNADDR(&dma, offs);
   1668   1.133.2.8   nathanw 			sqh->physaddr = DMAADDR(&dma, offs);
   1669        1.42  augustss 			sqh->hlink = sc->sc_freeqhs;
   1670         1.1  augustss 			sc->sc_freeqhs = sqh;
   1671         1.1  augustss 		}
   1672         1.1  augustss 	}
   1673         1.1  augustss 	sqh = sc->sc_freeqhs;
   1674        1.42  augustss 	sc->sc_freeqhs = sqh->hlink;
   1675        1.42  augustss 	memset(&sqh->qh, 0, sizeof(uhci_qh_t));
   1676        1.16  augustss 	return (sqh);
   1677         1.1  augustss }
   1678         1.1  augustss 
   1679         1.1  augustss void
   1680       1.119  augustss uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1681         1.1  augustss {
   1682        1.42  augustss 	sqh->hlink = sc->sc_freeqhs;
   1683         1.1  augustss 	sc->sc_freeqhs = sqh;
   1684         1.1  augustss }
   1685         1.1  augustss 
   1686         1.1  augustss void
   1687       1.119  augustss uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std,
   1688       1.119  augustss 		    uhci_soft_td_t *stdend)
   1689         1.1  augustss {
   1690         1.1  augustss 	uhci_soft_td_t *p;
   1691         1.1  augustss 
   1692         1.1  augustss 	for (; std != stdend; std = p) {
   1693        1.42  augustss 		p = std->link.std;
   1694         1.1  augustss 		uhci_free_std(sc, std);
   1695         1.1  augustss 	}
   1696         1.1  augustss }
   1697         1.1  augustss 
   1698         1.1  augustss usbd_status
   1699       1.119  augustss uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len,
   1700       1.119  augustss 		     int rd, u_int16_t flags, usb_dma_t *dma,
   1701       1.119  augustss 		     uhci_soft_td_t **sp, uhci_soft_td_t **ep)
   1702         1.1  augustss {
   1703         1.1  augustss 	uhci_soft_td_t *p, *lastp;
   1704         1.1  augustss 	uhci_physaddr_t lastlink;
   1705         1.1  augustss 	int i, ntd, l, tog, maxp;
   1706        1.18  augustss 	u_int32_t status;
   1707         1.1  augustss 	int addr = upipe->pipe.device->address;
   1708         1.1  augustss 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   1709         1.1  augustss 
   1710   1.133.2.5   nathanw 	DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d "
   1711   1.133.2.6   nathanw 		      "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len,
   1712   1.133.2.5   nathanw 		      upipe->pipe.device->speed, flags));
   1713         1.4  augustss 	maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
   1714         1.1  augustss 	if (maxp == 0) {
   1715         1.1  augustss 		printf("uhci_alloc_std_chain: maxp=0\n");
   1716         1.1  augustss 		return (USBD_INVAL);
   1717         1.1  augustss 	}
   1718         1.1  augustss 	ntd = (len + maxp - 1) / maxp;
   1719        1.73  augustss 	if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0)
   1720        1.73  augustss 		ntd++;
   1721        1.39  augustss 	DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd));
   1722        1.73  augustss 	if (ntd == 0) {
   1723        1.73  augustss 		*sp = *ep = 0;
   1724        1.73  augustss 		DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n"));
   1725        1.73  augustss 		return (USBD_NORMAL_COMPLETION);
   1726        1.73  augustss 	}
   1727        1.38  augustss 	tog = upipe->nexttoggle;
   1728         1.1  augustss 	if (ntd % 2 == 0)
   1729         1.1  augustss 		tog ^= 1;
   1730        1.32  augustss 	upipe->nexttoggle = tog ^ 1;
   1731       1.121  augustss 	lastp = NULL;
   1732         1.1  augustss 	lastlink = UHCI_PTR_T;
   1733         1.1  augustss 	ntd--;
   1734        1.33  augustss 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
   1735   1.133.2.5   nathanw 	if (upipe->pipe.device->speed == USB_SPEED_LOW)
   1736        1.18  augustss 		status |= UHCI_TD_LS;
   1737        1.73  augustss 	if (flags & USBD_SHORT_XFER_OK)
   1738        1.18  augustss 		status |= UHCI_TD_SPD;
   1739         1.1  augustss 	for (i = ntd; i >= 0; i--) {
   1740         1.1  augustss 		p = uhci_alloc_std(sc);
   1741        1.63  augustss 		if (p == NULL) {
   1742   1.133.2.5   nathanw 			uhci_free_std_chain(sc, lastp, NULL);
   1743         1.1  augustss 			return (USBD_NOMEM);
   1744         1.1  augustss 		}
   1745        1.42  augustss 		p->link.std = lastp;
   1746       1.121  augustss 		p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD);
   1747         1.1  augustss 		lastp = p;
   1748         1.1  augustss 		lastlink = p->physaddr;
   1749        1.88   tsutsui 		p->td.td_status = htole32(status);
   1750         1.1  augustss 		if (i == ntd) {
   1751         1.1  augustss 			/* last TD */
   1752         1.1  augustss 			l = len % maxp;
   1753        1.73  augustss 			if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER))
   1754        1.73  augustss 				l = maxp;
   1755         1.1  augustss 			*ep = p;
   1756         1.1  augustss 		} else
   1757         1.1  augustss 			l = maxp;
   1758   1.133.2.6   nathanw 		p->td.td_token =
   1759        1.88   tsutsui 		    htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) :
   1760        1.88   tsutsui 				 UHCI_TD_OUT(l, endpt, addr, tog));
   1761   1.133.2.8   nathanw 		p->td.td_buffer = htole32(DMAADDR(dma, i * maxp));
   1762         1.1  augustss 		tog ^= 1;
   1763         1.1  augustss 	}
   1764         1.1  augustss 	*sp = lastp;
   1765   1.133.2.6   nathanw 	DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n",
   1766        1.38  augustss 		      upipe->nexttoggle));
   1767         1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   1768         1.1  augustss }
   1769         1.1  augustss 
   1770        1.38  augustss void
   1771       1.119  augustss uhci_device_clear_toggle(usbd_pipe_handle pipe)
   1772        1.38  augustss {
   1773        1.38  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   1774        1.38  augustss 	upipe->nexttoggle = 0;
   1775        1.38  augustss }
   1776        1.38  augustss 
   1777        1.38  augustss void
   1778       1.119  augustss uhci_noop(usbd_pipe_handle pipe)
   1779        1.38  augustss {
   1780        1.38  augustss }
   1781        1.38  augustss 
   1782         1.1  augustss usbd_status
   1783       1.119  augustss uhci_device_bulk_transfer(usbd_xfer_handle xfer)
   1784         1.1  augustss {
   1785        1.63  augustss 	usbd_status err;
   1786        1.16  augustss 
   1787        1.52  augustss 	/* Insert last in queue. */
   1788        1.63  augustss 	err = usb_insert_transfer(xfer);
   1789        1.63  augustss 	if (err)
   1790        1.63  augustss 		return (err);
   1791        1.52  augustss 
   1792   1.133.2.6   nathanw 	/*
   1793        1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   1794        1.92  augustss 	 * so start it first.
   1795        1.67  augustss 	 */
   1796        1.63  augustss 	return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   1797        1.16  augustss }
   1798        1.16  augustss 
   1799        1.16  augustss usbd_status
   1800       1.119  augustss uhci_device_bulk_start(usbd_xfer_handle xfer)
   1801        1.16  augustss {
   1802        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   1803         1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   1804         1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   1805        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   1806        1.55  augustss 	uhci_soft_td_t *data, *dataend;
   1807         1.1  augustss 	uhci_soft_qh_t *sqh;
   1808        1.63  augustss 	usbd_status err;
   1809        1.45  augustss 	int len, isread, endpt;
   1810         1.1  augustss 	int s;
   1811         1.1  augustss 
   1812        1.63  augustss 	DPRINTFN(3, ("uhci_device_bulk_transfer: xfer=%p len=%d flags=%d\n",
   1813        1.63  augustss 		     xfer, xfer->length, xfer->flags));
   1814         1.1  augustss 
   1815        1.82  augustss 	if (sc->sc_dying)
   1816        1.82  augustss 		return (USBD_IOERROR);
   1817        1.82  augustss 
   1818        1.48  augustss #ifdef DIAGNOSTIC
   1819        1.63  augustss 	if (xfer->rqflags & URQ_REQUEST)
   1820  1.133.2.12   nathanw 		panic("uhci_device_bulk_transfer: a request");
   1821        1.48  augustss #endif
   1822         1.1  augustss 
   1823        1.63  augustss 	len = xfer->length;
   1824       1.102  augustss 	endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   1825        1.45  augustss 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   1826         1.1  augustss 	sqh = upipe->u.bulk.sqh;
   1827         1.1  augustss 
   1828         1.1  augustss 	upipe->u.bulk.isread = isread;
   1829         1.1  augustss 	upipe->u.bulk.length = len;
   1830         1.1  augustss 
   1831        1.73  augustss 	err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
   1832        1.73  augustss 				   &xfer->dmabuf, &data, &dataend);
   1833        1.63  augustss 	if (err)
   1834        1.63  augustss 		return (err);
   1835        1.88   tsutsui 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
   1836         1.1  augustss 
   1837        1.59  augustss #ifdef UHCI_DEBUG
   1838        1.33  augustss 	if (uhcidebug > 8) {
   1839        1.55  augustss 		DPRINTF(("uhci_device_bulk_transfer: data(1)\n"));
   1840        1.55  augustss 		uhci_dump_tds(data);
   1841         1.1  augustss 	}
   1842         1.1  augustss #endif
   1843         1.1  augustss 
   1844         1.1  augustss 	/* Set up interrupt info. */
   1845        1.63  augustss 	ii->xfer = xfer;
   1846        1.55  augustss 	ii->stdstart = data;
   1847        1.55  augustss 	ii->stdend = dataend;
   1848         1.7  augustss #ifdef DIAGNOSTIC
   1849        1.70  augustss 	if (!ii->isdone) {
   1850        1.70  augustss 		printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii);
   1851        1.70  augustss 	}
   1852         1.7  augustss 	ii->isdone = 0;
   1853         1.7  augustss #endif
   1854         1.1  augustss 
   1855        1.55  augustss 	sqh->elink = data;
   1856       1.121  augustss 	sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   1857         1.1  augustss 
   1858         1.1  augustss 	s = splusb();
   1859         1.1  augustss 	uhci_add_bulk(sc, sqh);
   1860        1.92  augustss 	uhci_add_intr_info(sc, ii);
   1861         1.1  augustss 
   1862        1.63  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   1863        1.96  augustss 		usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
   1864        1.91  augustss 			    uhci_timeout, ii);
   1865        1.13  augustss 	}
   1866        1.92  augustss 	xfer->status = USBD_IN_PROGRESS;
   1867         1.1  augustss 	splx(s);
   1868         1.1  augustss 
   1869        1.59  augustss #ifdef UHCI_DEBUG
   1870         1.1  augustss 	if (uhcidebug > 10) {
   1871        1.55  augustss 		DPRINTF(("uhci_device_bulk_transfer: data(2)\n"));
   1872        1.55  augustss 		uhci_dump_tds(data);
   1873         1.1  augustss 	}
   1874         1.1  augustss #endif
   1875         1.1  augustss 
   1876        1.26  augustss 	if (sc->sc_bus.use_polling)
   1877        1.63  augustss 		uhci_waitintr(sc, xfer);
   1878        1.26  augustss 
   1879         1.1  augustss 	return (USBD_IN_PROGRESS);
   1880         1.1  augustss }
   1881         1.1  augustss 
   1882         1.1  augustss /* Abort a device bulk request. */
   1883         1.1  augustss void
   1884       1.119  augustss uhci_device_bulk_abort(usbd_xfer_handle xfer)
   1885         1.1  augustss {
   1886        1.33  augustss 	DPRINTF(("uhci_device_bulk_abort:\n"));
   1887        1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   1888        1.33  augustss }
   1889        1.33  augustss 
   1890        1.92  augustss /*
   1891   1.133.2.6   nathanw  * Abort a device request.
   1892   1.133.2.6   nathanw  * If this routine is called at splusb() it guarantees that the request
   1893   1.133.2.6   nathanw  * will be removed from the hardware scheduling and that the callback
   1894   1.133.2.6   nathanw  * for it will be called with USBD_CANCELLED status.
   1895   1.133.2.6   nathanw  * It's impossible to guarantee that the requested transfer will not
   1896   1.133.2.6   nathanw  * have happened since the hardware runs concurrently.
   1897   1.133.2.6   nathanw  * If the transaction has already happened we rely on the ordinary
   1898   1.133.2.6   nathanw  * interrupt processing to process it.
   1899        1.92  augustss  */
   1900        1.33  augustss void
   1901       1.119  augustss uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
   1902        1.33  augustss {
   1903        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   1904   1.133.2.6   nathanw 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   1905   1.133.2.6   nathanw 	uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
   1906        1.33  augustss 	uhci_soft_td_t *std;
   1907        1.92  augustss 	int s;
   1908        1.65  augustss 
   1909       1.106  augustss 	DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status));
   1910        1.33  augustss 
   1911   1.133.2.6   nathanw 	if (sc->sc_dying) {
   1912   1.133.2.6   nathanw 		/* If we're dying, just do the software part. */
   1913   1.133.2.6   nathanw 		s = splusb();
   1914   1.133.2.6   nathanw 		xfer->status = status;	/* make software ignore it */
   1915   1.133.2.7   nathanw 		usb_uncallout(xfer->timeout_handle, uhci_timeout, xfer);
   1916   1.133.2.6   nathanw 		usb_transfer_complete(xfer);
   1917        1.92  augustss 		splx(s);
   1918        1.92  augustss 	}
   1919        1.92  augustss 
   1920  1.133.2.10   nathanw 	if (xfer->device->bus->intr_context || !curproc)
   1921  1.133.2.12   nathanw 		panic("uhci_abort_xfer: not in process context");
   1922        1.41  augustss 
   1923   1.133.2.6   nathanw 	/*
   1924   1.133.2.6   nathanw 	 * Step 1: Make interrupt routine and hardware ignore xfer.
   1925   1.133.2.6   nathanw 	 */
   1926   1.133.2.6   nathanw 	s = splusb();
   1927   1.133.2.6   nathanw 	xfer->status = status;	/* make software ignore it */
   1928       1.106  augustss 	usb_uncallout(xfer->timeout_handle, uhci_timeout, ii);
   1929   1.133.2.6   nathanw 	DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii));
   1930       1.106  augustss 	for (std = ii->stdstart; std != NULL; std = std->link.std)
   1931        1.92  augustss 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
   1932        1.92  augustss 	splx(s);
   1933        1.92  augustss 
   1934  1.133.2.11   nathanw 	/*
   1935   1.133.2.6   nathanw 	 * Step 2: Wait until we know hardware has finished any possible
   1936   1.133.2.6   nathanw 	 * use of the xfer.  Also make sure the soft interrupt routine
   1937   1.133.2.6   nathanw 	 * has run.
   1938   1.133.2.6   nathanw 	 */
   1939   1.133.2.6   nathanw 	usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */
   1940   1.133.2.6   nathanw 	s = splusb();
   1941  1.133.2.12   nathanw #ifdef USB_USE_SOFTINTR
   1942   1.133.2.6   nathanw 	sc->sc_softwake = 1;
   1943  1.133.2.12   nathanw #endif /* USB_USE_SOFTINTR */
   1944   1.133.2.6   nathanw 	usb_schedsoftintr(&sc->sc_bus);
   1945  1.133.2.12   nathanw #ifdef USB_USE_SOFTINTR
   1946   1.133.2.6   nathanw 	DPRINTFN(1,("uhci_abort_xfer: tsleep\n"));
   1947   1.133.2.6   nathanw 	tsleep(&sc->sc_softwake, PZERO, "uhciab", 0);
   1948  1.133.2.12   nathanw #endif /* USB_USE_SOFTINTR */
   1949   1.133.2.6   nathanw 	splx(s);
   1950  1.133.2.11   nathanw 
   1951   1.133.2.6   nathanw 	/*
   1952   1.133.2.6   nathanw 	 * Step 3: Execute callback.
   1953   1.133.2.6   nathanw 	 */
   1954   1.133.2.6   nathanw 	xfer->hcpriv = ii;
   1955        1.92  augustss 
   1956   1.133.2.6   nathanw 	DPRINTFN(1,("uhci_abort_xfer: callback\n"));
   1957        1.92  augustss 	s = splusb();
   1958       1.100  augustss #ifdef DIAGNOSTIC
   1959       1.106  augustss 	ii->isdone = 1;
   1960       1.100  augustss #endif
   1961       1.106  augustss 	usb_transfer_complete(xfer);
   1962        1.33  augustss 	splx(s);
   1963         1.1  augustss }
   1964         1.1  augustss 
   1965         1.1  augustss /* Close a device bulk pipe. */
   1966         1.1  augustss void
   1967       1.119  augustss uhci_device_bulk_close(usbd_pipe_handle pipe)
   1968         1.1  augustss {
   1969         1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   1970         1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   1971         1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   1972         1.1  augustss 
   1973         1.1  augustss 	uhci_free_sqh(sc, upipe->u.bulk.sqh);
   1974         1.1  augustss }
   1975         1.1  augustss 
   1976         1.1  augustss usbd_status
   1977       1.119  augustss uhci_device_ctrl_transfer(usbd_xfer_handle xfer)
   1978         1.1  augustss {
   1979        1.63  augustss 	usbd_status err;
   1980        1.16  augustss 
   1981        1.52  augustss 	/* Insert last in queue. */
   1982        1.63  augustss 	err = usb_insert_transfer(xfer);
   1983        1.63  augustss 	if (err)
   1984        1.63  augustss 		return (err);
   1985        1.52  augustss 
   1986   1.133.2.6   nathanw 	/*
   1987        1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   1988        1.92  augustss 	 * so start it first.
   1989        1.67  augustss 	 */
   1990        1.63  augustss 	return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   1991        1.16  augustss }
   1992        1.16  augustss 
   1993        1.16  augustss usbd_status
   1994       1.119  augustss uhci_device_ctrl_start(usbd_xfer_handle xfer)
   1995        1.16  augustss {
   1996        1.63  augustss 	uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
   1997        1.63  augustss 	usbd_status err;
   1998         1.1  augustss 
   1999        1.82  augustss 	if (sc->sc_dying)
   2000        1.82  augustss 		return (USBD_IOERROR);
   2001        1.82  augustss 
   2002        1.48  augustss #ifdef DIAGNOSTIC
   2003        1.63  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   2004  1.133.2.12   nathanw 		panic("uhci_device_ctrl_transfer: not a request");
   2005        1.48  augustss #endif
   2006         1.1  augustss 
   2007        1.63  augustss 	err = uhci_device_request(xfer);
   2008        1.63  augustss 	if (err)
   2009        1.63  augustss 		return (err);
   2010         1.1  augustss 
   2011         1.9  augustss 	if (sc->sc_bus.use_polling)
   2012        1.63  augustss 		uhci_waitintr(sc, xfer);
   2013         1.1  augustss 	return (USBD_IN_PROGRESS);
   2014         1.1  augustss }
   2015         1.1  augustss 
   2016         1.1  augustss usbd_status
   2017       1.119  augustss uhci_device_intr_transfer(usbd_xfer_handle xfer)
   2018         1.1  augustss {
   2019        1.63  augustss 	usbd_status err;
   2020        1.16  augustss 
   2021        1.52  augustss 	/* Insert last in queue. */
   2022        1.63  augustss 	err = usb_insert_transfer(xfer);
   2023        1.63  augustss 	if (err)
   2024        1.63  augustss 		return (err);
   2025        1.52  augustss 
   2026   1.133.2.6   nathanw 	/*
   2027        1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2028        1.92  augustss 	 * so start it first.
   2029        1.67  augustss 	 */
   2030        1.63  augustss 	return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2031        1.16  augustss }
   2032        1.16  augustss 
   2033        1.16  augustss usbd_status
   2034       1.119  augustss uhci_device_intr_start(usbd_xfer_handle xfer)
   2035        1.16  augustss {
   2036        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2037         1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2038         1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   2039        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2040        1.55  augustss 	uhci_soft_td_t *data, *dataend;
   2041         1.1  augustss 	uhci_soft_qh_t *sqh;
   2042        1.63  augustss 	usbd_status err;
   2043        1.49  augustss 	int i, s;
   2044         1.1  augustss 
   2045        1.82  augustss 	if (sc->sc_dying)
   2046        1.82  augustss 		return (USBD_IOERROR);
   2047        1.82  augustss 
   2048        1.63  augustss 	DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n",
   2049        1.63  augustss 		    xfer, xfer->length, xfer->flags));
   2050         1.1  augustss 
   2051        1.48  augustss #ifdef DIAGNOSTIC
   2052        1.63  augustss 	if (xfer->rqflags & URQ_REQUEST)
   2053  1.133.2.12   nathanw 		panic("uhci_device_intr_transfer: a request");
   2054        1.48  augustss #endif
   2055         1.1  augustss 
   2056        1.73  augustss 	err = uhci_alloc_std_chain(upipe, sc, xfer->length, 1, xfer->flags,
   2057        1.73  augustss 				   &xfer->dmabuf, &data, &dataend);
   2058        1.63  augustss 	if (err)
   2059        1.63  augustss 		return (err);
   2060        1.88   tsutsui 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2061         1.1  augustss 
   2062        1.59  augustss #ifdef UHCI_DEBUG
   2063         1.1  augustss 	if (uhcidebug > 10) {
   2064        1.55  augustss 		DPRINTF(("uhci_device_intr_transfer: data(1)\n"));
   2065        1.55  augustss 		uhci_dump_tds(data);
   2066         1.1  augustss 		uhci_dump_qh(upipe->u.intr.qhs[0]);
   2067         1.1  augustss 	}
   2068         1.1  augustss #endif
   2069         1.1  augustss 
   2070         1.1  augustss 	s = splusb();
   2071         1.1  augustss 	/* Set up interrupt info. */
   2072        1.63  augustss 	ii->xfer = xfer;
   2073        1.55  augustss 	ii->stdstart = data;
   2074        1.55  augustss 	ii->stdend = dataend;
   2075         1.7  augustss #ifdef DIAGNOSTIC
   2076        1.70  augustss 	if (!ii->isdone) {
   2077        1.70  augustss 		printf("uhci_device_intr_transfer: not done, ii=%p\n", ii);
   2078        1.70  augustss 	}
   2079         1.7  augustss 	ii->isdone = 0;
   2080         1.7  augustss #endif
   2081         1.1  augustss 
   2082   1.133.2.6   nathanw 	DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
   2083        1.12  augustss 		     upipe->u.intr.qhs[0]));
   2084         1.1  augustss 	for (i = 0; i < upipe->u.intr.npoll; i++) {
   2085         1.1  augustss 		sqh = upipe->u.intr.qhs[i];
   2086        1.55  augustss 		sqh->elink = data;
   2087       1.121  augustss 		sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2088         1.1  augustss 	}
   2089        1.92  augustss 	uhci_add_intr_info(sc, ii);
   2090        1.92  augustss 	xfer->status = USBD_IN_PROGRESS;
   2091         1.1  augustss 	splx(s);
   2092         1.1  augustss 
   2093        1.59  augustss #ifdef UHCI_DEBUG
   2094         1.1  augustss 	if (uhcidebug > 10) {
   2095        1.55  augustss 		DPRINTF(("uhci_device_intr_transfer: data(2)\n"));
   2096        1.55  augustss 		uhci_dump_tds(data);
   2097         1.1  augustss 		uhci_dump_qh(upipe->u.intr.qhs[0]);
   2098         1.1  augustss 	}
   2099         1.1  augustss #endif
   2100         1.1  augustss 
   2101         1.1  augustss 	return (USBD_IN_PROGRESS);
   2102         1.1  augustss }
   2103         1.1  augustss 
   2104         1.1  augustss /* Abort a device control request. */
   2105         1.1  augustss void
   2106       1.119  augustss uhci_device_ctrl_abort(usbd_xfer_handle xfer)
   2107         1.1  augustss {
   2108        1.33  augustss 	DPRINTF(("uhci_device_ctrl_abort:\n"));
   2109        1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2110         1.1  augustss }
   2111         1.1  augustss 
   2112         1.1  augustss /* Close a device control pipe. */
   2113         1.1  augustss void
   2114       1.119  augustss uhci_device_ctrl_close(usbd_pipe_handle pipe)
   2115         1.1  augustss {
   2116         1.1  augustss }
   2117         1.1  augustss 
   2118         1.1  augustss /* Abort a device interrupt request. */
   2119         1.1  augustss void
   2120       1.119  augustss uhci_device_intr_abort(usbd_xfer_handle xfer)
   2121         1.1  augustss {
   2122        1.63  augustss 	DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer));
   2123        1.63  augustss 	if (xfer->pipe->intrxfer == xfer) {
   2124        1.36  augustss 		DPRINTFN(1,("uhci_device_intr_abort: remove\n"));
   2125   1.133.2.6   nathanw 		xfer->pipe->intrxfer = NULL;
   2126         1.1  augustss 	}
   2127        1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2128         1.1  augustss }
   2129         1.1  augustss 
   2130         1.1  augustss /* Close a device interrupt pipe. */
   2131         1.1  augustss void
   2132       1.119  augustss uhci_device_intr_close(usbd_pipe_handle pipe)
   2133         1.1  augustss {
   2134         1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2135         1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
   2136        1.92  augustss 	int i, npoll;
   2137        1.92  augustss 	int s;
   2138         1.1  augustss 
   2139         1.1  augustss 	/* Unlink descriptors from controller data structures. */
   2140         1.1  augustss 	npoll = upipe->u.intr.npoll;
   2141        1.92  augustss 	s = splusb();
   2142         1.1  augustss 	for (i = 0; i < npoll; i++)
   2143        1.92  augustss 		uhci_remove_intr(sc, upipe->u.intr.qhs[i]);
   2144        1.92  augustss 	splx(s);
   2145         1.1  augustss 
   2146   1.133.2.6   nathanw 	/*
   2147         1.1  augustss 	 * We now have to wait for any activity on the physical
   2148         1.1  augustss 	 * descriptors to stop.
   2149         1.1  augustss 	 */
   2150        1.20  augustss 	usb_delay_ms(&sc->sc_bus, 2);
   2151         1.1  augustss 
   2152         1.1  augustss 	for(i = 0; i < npoll; i++)
   2153         1.1  augustss 		uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
   2154        1.31  augustss 	free(upipe->u.intr.qhs, M_USBHC);
   2155         1.1  augustss 
   2156         1.1  augustss 	/* XXX free other resources */
   2157         1.1  augustss }
   2158         1.1  augustss 
   2159         1.1  augustss usbd_status
   2160       1.119  augustss uhci_device_request(usbd_xfer_handle xfer)
   2161         1.1  augustss {
   2162        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2163        1.63  augustss 	usb_device_request_t *req = &xfer->request;
   2164         1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2165         1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   2166         1.1  augustss 	int addr = dev->address;
   2167         1.1  augustss 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2168        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2169        1.55  augustss 	uhci_soft_td_t *setup, *data, *stat, *next, *dataend;
   2170         1.1  augustss 	uhci_soft_qh_t *sqh;
   2171         1.1  augustss 	int len;
   2172         1.1  augustss 	u_int32_t ls;
   2173        1.63  augustss 	usbd_status err;
   2174         1.1  augustss 	int isread;
   2175         1.1  augustss 	int s;
   2176         1.1  augustss 
   2177        1.13  augustss 	DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
   2178        1.12  augustss 		    "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
   2179         1.1  augustss 		    req->bmRequestType, req->bRequest, UGETW(req->wValue),
   2180         1.1  augustss 		    UGETW(req->wIndex), UGETW(req->wLength),
   2181         1.1  augustss 		    addr, endpt));
   2182         1.1  augustss 
   2183   1.133.2.5   nathanw 	ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0;
   2184         1.1  augustss 	isread = req->bmRequestType & UT_READ;
   2185         1.1  augustss 	len = UGETW(req->wLength);
   2186         1.1  augustss 
   2187         1.1  augustss 	setup = upipe->u.ctl.setup;
   2188         1.1  augustss 	stat = upipe->u.ctl.stat;
   2189         1.1  augustss 	sqh = upipe->u.ctl.sqh;
   2190         1.1  augustss 
   2191         1.1  augustss 	/* Set up data transaction */
   2192         1.1  augustss 	if (len != 0) {
   2193        1.38  augustss 		upipe->nexttoggle = 1;
   2194        1.73  augustss 		err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
   2195        1.73  augustss 					   &xfer->dmabuf, &data, &dataend);
   2196        1.63  augustss 		if (err)
   2197        1.63  augustss 			return (err);
   2198        1.55  augustss 		next = data;
   2199        1.55  augustss 		dataend->link.std = stat;
   2200       1.121  augustss 		dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
   2201         1.1  augustss 	} else {
   2202         1.1  augustss 		next = stat;
   2203         1.1  augustss 	}
   2204         1.1  augustss 	upipe->u.ctl.length = len;
   2205         1.1  augustss 
   2206   1.133.2.8   nathanw 	memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req);
   2207         1.1  augustss 
   2208        1.42  augustss 	setup->link.std = next;
   2209       1.121  augustss 	setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
   2210        1.88   tsutsui 	setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
   2211        1.88   tsutsui 		UHCI_TD_ACTIVE);
   2212        1.88   tsutsui 	setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr));
   2213   1.133.2.8   nathanw 	setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0));
   2214        1.42  augustss 
   2215        1.92  augustss 	stat->link.std = NULL;
   2216        1.88   tsutsui 	stat->td.td_link = htole32(UHCI_PTR_T);
   2217   1.133.2.6   nathanw 	stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
   2218        1.39  augustss 		UHCI_TD_ACTIVE | UHCI_TD_IOC);
   2219   1.133.2.6   nathanw 	stat->td.td_token =
   2220        1.88   tsutsui 		htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
   2221        1.88   tsutsui 		                 UHCI_TD_IN (0, endpt, addr, 1));
   2222        1.88   tsutsui 	stat->td.td_buffer = htole32(0);
   2223         1.1  augustss 
   2224        1.59  augustss #ifdef UHCI_DEBUG
   2225        1.67  augustss 	if (uhcidebug > 10) {
   2226        1.47  augustss 		DPRINTF(("uhci_device_request: before transfer\n"));
   2227        1.41  augustss 		uhci_dump_tds(setup);
   2228         1.1  augustss 	}
   2229         1.1  augustss #endif
   2230         1.1  augustss 
   2231         1.1  augustss 	/* Set up interrupt info. */
   2232        1.63  augustss 	ii->xfer = xfer;
   2233         1.1  augustss 	ii->stdstart = setup;
   2234         1.1  augustss 	ii->stdend = stat;
   2235         1.7  augustss #ifdef DIAGNOSTIC
   2236        1.70  augustss 	if (!ii->isdone) {
   2237        1.70  augustss 		printf("uhci_device_request: not done, ii=%p\n", ii);
   2238        1.70  augustss 	}
   2239         1.7  augustss 	ii->isdone = 0;
   2240         1.7  augustss #endif
   2241         1.1  augustss 
   2242        1.42  augustss 	sqh->elink = setup;
   2243       1.121  augustss 	sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD);
   2244         1.1  augustss 
   2245         1.1  augustss 	s = splusb();
   2246   1.133.2.5   nathanw 	if (dev->speed == USB_SPEED_LOW)
   2247       1.123  augustss 		uhci_add_ls_ctrl(sc, sqh);
   2248       1.123  augustss 	else
   2249       1.123  augustss 		uhci_add_hs_ctrl(sc, sqh);
   2250        1.92  augustss 	uhci_add_intr_info(sc, ii);
   2251        1.59  augustss #ifdef UHCI_DEBUG
   2252         1.1  augustss 	if (uhcidebug > 12) {
   2253         1.1  augustss 		uhci_soft_td_t *std;
   2254         1.1  augustss 		uhci_soft_qh_t *xqh;
   2255        1.13  augustss 		uhci_soft_qh_t *sxqh;
   2256        1.13  augustss 		int maxqh = 0;
   2257         1.1  augustss 		uhci_physaddr_t link;
   2258        1.47  augustss 		DPRINTF(("uhci_enter_ctl_q: follow from [0]\n"));
   2259         1.1  augustss 		for (std = sc->sc_vframes[0].htd, link = 0;
   2260       1.121  augustss 		     (link & UHCI_PTR_QH) == 0;
   2261        1.42  augustss 		     std = std->link.std) {
   2262        1.88   tsutsui 			link = le32toh(std->td.td_link);
   2263         1.1  augustss 			uhci_dump_td(std);
   2264         1.1  augustss 		}
   2265        1.67  augustss 		sxqh = (uhci_soft_qh_t *)std;
   2266        1.67  augustss 		uhci_dump_qh(sxqh);
   2267        1.67  augustss 		for (xqh = sxqh;
   2268        1.63  augustss 		     xqh != NULL;
   2269   1.133.2.6   nathanw 		     xqh = (maxqh++ == 5 || xqh->hlink == sxqh ||
   2270       1.121  augustss                             xqh->hlink == xqh ? NULL : xqh->hlink)) {
   2271         1.1  augustss 			uhci_dump_qh(xqh);
   2272        1.13  augustss 		}
   2273        1.47  augustss 		DPRINTF(("Enqueued QH:\n"));
   2274         1.1  augustss 		uhci_dump_qh(sqh);
   2275        1.42  augustss 		uhci_dump_tds(sqh->elink);
   2276         1.1  augustss 	}
   2277         1.1  augustss #endif
   2278        1.63  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   2279        1.96  augustss 		usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
   2280        1.91  augustss 			    uhci_timeout, ii);
   2281        1.13  augustss 	}
   2282        1.92  augustss 	xfer->status = USBD_IN_PROGRESS;
   2283         1.1  augustss 	splx(s);
   2284         1.1  augustss 
   2285         1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   2286         1.1  augustss }
   2287         1.1  augustss 
   2288        1.16  augustss usbd_status
   2289       1.119  augustss uhci_device_isoc_transfer(usbd_xfer_handle xfer)
   2290        1.16  augustss {
   2291        1.63  augustss 	usbd_status err;
   2292        1.48  augustss 
   2293        1.63  augustss 	DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer));
   2294        1.48  augustss 
   2295        1.48  augustss 	/* Put it on our queue, */
   2296        1.63  augustss 	err = usb_insert_transfer(xfer);
   2297        1.48  augustss 
   2298        1.48  augustss 	/* bail out on error, */
   2299        1.63  augustss 	if (err && err != USBD_IN_PROGRESS)
   2300        1.63  augustss 		return (err);
   2301        1.48  augustss 
   2302        1.48  augustss 	/* XXX should check inuse here */
   2303        1.48  augustss 
   2304        1.48  augustss 	/* insert into schedule, */
   2305        1.63  augustss 	uhci_device_isoc_enter(xfer);
   2306        1.48  augustss 
   2307       1.102  augustss 	/* and start if the pipe wasn't running */
   2308        1.67  augustss 	if (!err)
   2309        1.63  augustss 		uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
   2310        1.48  augustss 
   2311        1.63  augustss 	return (err);
   2312        1.48  augustss }
   2313        1.48  augustss 
   2314        1.48  augustss void
   2315       1.119  augustss uhci_device_isoc_enter(usbd_xfer_handle xfer)
   2316        1.48  augustss {
   2317        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2318        1.16  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2319        1.16  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   2320        1.48  augustss 	struct iso *iso = &upipe->u.iso;
   2321   1.133.2.6   nathanw 	uhci_soft_td_t *std;
   2322        1.48  augustss 	u_int32_t buf, len, status;
   2323        1.48  augustss 	int s, i, next, nframes;
   2324        1.48  augustss 
   2325        1.63  augustss 	DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p "
   2326        1.48  augustss 		    "nframes=%d\n",
   2327        1.63  augustss 		    iso->inuse, iso->next, xfer, xfer->nframes));
   2328        1.48  augustss 
   2329        1.82  augustss 	if (sc->sc_dying)
   2330        1.82  augustss 		return;
   2331        1.82  augustss 
   2332        1.63  augustss 	if (xfer->status == USBD_IN_PROGRESS) {
   2333        1.48  augustss 		/* This request has already been entered into the frame list */
   2334        1.96  augustss 		printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer);
   2335        1.68  augustss 		/* XXX */
   2336        1.48  augustss 	}
   2337        1.48  augustss 
   2338        1.48  augustss #ifdef DIAGNOSTIC
   2339        1.48  augustss 	if (iso->inuse >= UHCI_VFRAMELIST_COUNT)
   2340        1.48  augustss 		printf("uhci_device_isoc_enter: overflow!\n");
   2341        1.19  augustss #endif
   2342        1.16  augustss 
   2343        1.48  augustss 	next = iso->next;
   2344        1.48  augustss 	if (next == -1) {
   2345        1.48  augustss 		/* Not in use yet, schedule it a few frames ahead. */
   2346        1.48  augustss 		next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
   2347        1.48  augustss 		DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next));
   2348        1.48  augustss 	}
   2349        1.48  augustss 
   2350        1.63  augustss 	xfer->status = USBD_IN_PROGRESS;
   2351        1.92  augustss 	UXFER(xfer)->curframe = next;
   2352        1.48  augustss 
   2353   1.133.2.8   nathanw 	buf = DMAADDR(&xfer->dmabuf, 0);
   2354        1.88   tsutsui 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |
   2355        1.88   tsutsui 				     UHCI_TD_ACTIVE |
   2356        1.88   tsutsui 				     UHCI_TD_IOS);
   2357        1.63  augustss 	nframes = xfer->nframes;
   2358        1.48  augustss 	s = splusb();
   2359        1.48  augustss 	for (i = 0; i < nframes; i++) {
   2360        1.48  augustss 		std = iso->stds[next];
   2361        1.48  augustss 		if (++next >= UHCI_VFRAMELIST_COUNT)
   2362        1.48  augustss 			next = 0;
   2363        1.63  augustss 		len = xfer->frlengths[i];
   2364        1.88   tsutsui 		std->td.td_buffer = htole32(buf);
   2365        1.48  augustss 		if (i == nframes - 1)
   2366        1.88   tsutsui 			status |= UHCI_TD_IOC;
   2367        1.88   tsutsui 		std->td.td_status = htole32(status);
   2368        1.88   tsutsui 		std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK);
   2369        1.88   tsutsui 		std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len));
   2370        1.59  augustss #ifdef UHCI_DEBUG
   2371        1.48  augustss 		if (uhcidebug > 5) {
   2372        1.48  augustss 			DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i));
   2373        1.48  augustss 			uhci_dump_td(std);
   2374        1.48  augustss 		}
   2375        1.48  augustss #endif
   2376        1.48  augustss 		buf += len;
   2377        1.48  augustss 	}
   2378        1.48  augustss 	iso->next = next;
   2379        1.63  augustss 	iso->inuse += xfer->nframes;
   2380        1.16  augustss 
   2381        1.48  augustss 	splx(s);
   2382        1.16  augustss }
   2383        1.16  augustss 
   2384        1.16  augustss usbd_status
   2385       1.119  augustss uhci_device_isoc_start(usbd_xfer_handle xfer)
   2386        1.16  augustss {
   2387        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2388        1.48  augustss 	uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
   2389        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2390        1.48  augustss 	uhci_soft_td_t *end;
   2391        1.48  augustss 	int s, i;
   2392        1.48  augustss 
   2393        1.96  augustss 	DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer));
   2394        1.96  augustss 
   2395        1.82  augustss 	if (sc->sc_dying)
   2396        1.82  augustss 		return (USBD_IOERROR);
   2397        1.82  augustss 
   2398        1.48  augustss #ifdef DIAGNOSTIC
   2399        1.63  augustss 	if (xfer->status != USBD_IN_PROGRESS)
   2400        1.63  augustss 		printf("uhci_device_isoc_start: not in progress %p\n", xfer);
   2401        1.48  augustss #endif
   2402        1.48  augustss 
   2403        1.48  augustss 	/* Find the last TD */
   2404        1.92  augustss 	i = UXFER(xfer)->curframe + xfer->nframes;
   2405        1.48  augustss 	if (i >= UHCI_VFRAMELIST_COUNT)
   2406        1.48  augustss 		i -= UHCI_VFRAMELIST_COUNT;
   2407        1.48  augustss 	end = upipe->u.iso.stds[i];
   2408        1.48  augustss 
   2409        1.96  augustss #ifdef DIAGNOSTIC
   2410        1.96  augustss 	if (end == NULL) {
   2411        1.96  augustss 		printf("uhci_device_isoc_start: end == NULL\n");
   2412        1.96  augustss 		return (USBD_INVAL);
   2413        1.96  augustss 	}
   2414        1.96  augustss #endif
   2415        1.96  augustss 
   2416        1.48  augustss 	s = splusb();
   2417   1.133.2.6   nathanw 
   2418        1.48  augustss 	/* Set up interrupt info. */
   2419        1.63  augustss 	ii->xfer = xfer;
   2420        1.48  augustss 	ii->stdstart = end;
   2421        1.48  augustss 	ii->stdend = end;
   2422        1.48  augustss #ifdef DIAGNOSTIC
   2423       1.102  augustss 	if (!ii->isdone)
   2424        1.70  augustss 		printf("uhci_device_isoc_start: not done, ii=%p\n", ii);
   2425        1.48  augustss 	ii->isdone = 0;
   2426        1.48  augustss #endif
   2427        1.92  augustss 	uhci_add_intr_info(sc, ii);
   2428   1.133.2.6   nathanw 
   2429        1.48  augustss 	splx(s);
   2430        1.48  augustss 
   2431        1.48  augustss 	return (USBD_IN_PROGRESS);
   2432        1.16  augustss }
   2433        1.16  augustss 
   2434        1.16  augustss void
   2435       1.119  augustss uhci_device_isoc_abort(usbd_xfer_handle xfer)
   2436        1.16  augustss {
   2437        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2438        1.48  augustss 	uhci_soft_td_t **stds = upipe->u.iso.stds;
   2439        1.48  augustss 	uhci_soft_td_t *std;
   2440        1.92  augustss 	int i, n, s, nframes, maxlen, len;
   2441        1.92  augustss 
   2442        1.92  augustss 	s = splusb();
   2443        1.92  augustss 
   2444        1.92  augustss 	/* Transfer is already done. */
   2445   1.133.2.6   nathanw 	if (xfer->status != USBD_NOT_STARTED &&
   2446        1.92  augustss 	    xfer->status != USBD_IN_PROGRESS) {
   2447        1.92  augustss 		splx(s);
   2448        1.92  augustss 		return;
   2449        1.92  augustss 	}
   2450        1.48  augustss 
   2451        1.92  augustss 	/* Give xfer the requested abort code. */
   2452        1.63  augustss 	xfer->status = USBD_CANCELLED;
   2453        1.48  augustss 
   2454        1.48  augustss 	/* make hardware ignore it, */
   2455        1.63  augustss 	nframes = xfer->nframes;
   2456        1.92  augustss 	n = UXFER(xfer)->curframe;
   2457        1.92  augustss 	maxlen = 0;
   2458        1.48  augustss 	for (i = 0; i < nframes; i++) {
   2459        1.48  augustss 		std = stds[n];
   2460        1.88   tsutsui 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
   2461       1.130   tsutsui 		len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token));
   2462        1.92  augustss 		if (len > maxlen)
   2463        1.92  augustss 			maxlen = len;
   2464        1.48  augustss 		if (++n >= UHCI_VFRAMELIST_COUNT)
   2465        1.48  augustss 			n = 0;
   2466        1.48  augustss 	}
   2467        1.48  augustss 
   2468        1.92  augustss 	/* and wait until we are sure the hardware has finished. */
   2469        1.92  augustss 	delay(maxlen);
   2470        1.92  augustss 
   2471        1.96  augustss #ifdef DIAGNOSTIC
   2472        1.96  augustss 	UXFER(xfer)->iinfo.isdone = 1;
   2473        1.96  augustss #endif
   2474        1.92  augustss 	/* Run callback and remove from interrupt list. */
   2475        1.92  augustss 	usb_transfer_complete(xfer);
   2476        1.48  augustss 
   2477        1.92  augustss 	splx(s);
   2478        1.16  augustss }
   2479        1.16  augustss 
   2480        1.16  augustss void
   2481       1.119  augustss uhci_device_isoc_close(usbd_pipe_handle pipe)
   2482        1.16  augustss {
   2483        1.16  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2484        1.16  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2485        1.16  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   2486        1.48  augustss 	uhci_soft_td_t *std, *vstd;
   2487        1.16  augustss 	struct iso *iso;
   2488        1.92  augustss 	int i, s;
   2489        1.16  augustss 
   2490        1.16  augustss 	/*
   2491        1.16  augustss 	 * Make sure all TDs are marked as inactive.
   2492        1.16  augustss 	 * Wait for completion.
   2493        1.16  augustss 	 * Unschedule.
   2494        1.16  augustss 	 * Deallocate.
   2495        1.16  augustss 	 */
   2496        1.16  augustss 	iso = &upipe->u.iso;
   2497        1.16  augustss 
   2498        1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++)
   2499        1.88   tsutsui 		iso->stds[i]->td.td_status &= htole32(~UHCI_TD_ACTIVE);
   2500        1.20  augustss 	usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */
   2501        1.16  augustss 
   2502        1.92  augustss 	s = splusb();
   2503        1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2504        1.16  augustss 		std = iso->stds[i];
   2505        1.48  augustss 		for (vstd = sc->sc_vframes[i].htd;
   2506        1.67  augustss 		     vstd != NULL && vstd->link.std != std;
   2507        1.42  augustss 		     vstd = vstd->link.std)
   2508        1.16  augustss 			;
   2509        1.67  augustss 		if (vstd == NULL) {
   2510        1.16  augustss 			/*panic*/
   2511        1.16  augustss 			printf("uhci_device_isoc_close: %p not found\n", std);
   2512        1.92  augustss 			splx(s);
   2513        1.16  augustss 			return;
   2514        1.16  augustss 		}
   2515        1.42  augustss 		vstd->link = std->link;
   2516        1.42  augustss 		vstd->td.td_link = std->td.td_link;
   2517        1.16  augustss 		uhci_free_std(sc, std);
   2518        1.16  augustss 	}
   2519        1.92  augustss 	splx(s);
   2520        1.16  augustss 
   2521        1.31  augustss 	free(iso->stds, M_USBHC);
   2522        1.16  augustss }
   2523        1.16  augustss 
   2524        1.16  augustss usbd_status
   2525       1.119  augustss uhci_setup_isoc(usbd_pipe_handle pipe)
   2526        1.16  augustss {
   2527        1.16  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2528        1.16  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2529        1.16  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   2530        1.16  augustss 	int addr = upipe->pipe.device->address;
   2531        1.16  augustss 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2532        1.45  augustss 	int rd = UE_GET_DIR(endpt) == UE_DIR_IN;
   2533        1.48  augustss 	uhci_soft_td_t *std, *vstd;
   2534        1.48  augustss 	u_int32_t token;
   2535        1.16  augustss 	struct iso *iso;
   2536        1.92  augustss 	int i, s;
   2537        1.16  augustss 
   2538        1.16  augustss 	iso = &upipe->u.iso;
   2539        1.16  augustss 	iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *),
   2540        1.31  augustss 			   M_USBHC, M_WAITOK);
   2541        1.16  augustss 
   2542        1.88   tsutsui 	token = rd ? UHCI_TD_IN (0, endpt, addr, 0) :
   2543        1.88   tsutsui 		     UHCI_TD_OUT(0, endpt, addr, 0);
   2544        1.16  augustss 
   2545        1.48  augustss 	/* Allocate the TDs and mark as inactive; */
   2546        1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2547        1.48  augustss 		std = uhci_alloc_std(sc);
   2548        1.48  augustss 		if (std == 0)
   2549        1.48  augustss 			goto bad;
   2550        1.88   tsutsui 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
   2551        1.88   tsutsui 		std->td.td_token = htole32(token);
   2552        1.48  augustss 		iso->stds[i] = std;
   2553        1.16  augustss 	}
   2554        1.16  augustss 
   2555        1.48  augustss 	/* Insert TDs into schedule. */
   2556        1.92  augustss 	s = splusb();
   2557        1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2558        1.16  augustss 		std = iso->stds[i];
   2559        1.48  augustss 		vstd = sc->sc_vframes[i].htd;
   2560        1.42  augustss 		std->link = vstd->link;
   2561        1.42  augustss 		std->td.td_link = vstd->td.td_link;
   2562        1.42  augustss 		vstd->link.std = std;
   2563       1.121  augustss 		vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD);
   2564        1.16  augustss 	}
   2565        1.92  augustss 	splx(s);
   2566        1.16  augustss 
   2567        1.48  augustss 	iso->next = -1;
   2568        1.48  augustss 	iso->inuse = 0;
   2569        1.48  augustss 
   2570        1.16  augustss 	return (USBD_NORMAL_COMPLETION);
   2571        1.16  augustss 
   2572        1.48  augustss  bad:
   2573        1.16  augustss 	while (--i >= 0)
   2574        1.16  augustss 		uhci_free_std(sc, iso->stds[i]);
   2575        1.31  augustss 	free(iso->stds, M_USBHC);
   2576        1.16  augustss 	return (USBD_NOMEM);
   2577        1.16  augustss }
   2578        1.16  augustss 
   2579        1.16  augustss void
   2580       1.119  augustss uhci_device_isoc_done(usbd_xfer_handle xfer)
   2581        1.16  augustss {
   2582        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2583        1.48  augustss 
   2584        1.63  augustss 	DPRINTFN(4, ("uhci_isoc_done: length=%d\n", xfer->actlen));
   2585        1.93  augustss 
   2586        1.96  augustss 	if (ii->xfer != xfer)
   2587        1.96  augustss 		/* Not on interrupt list, ignore it. */
   2588        1.96  augustss 		return;
   2589        1.96  augustss 
   2590        1.93  augustss #ifdef DIAGNOSTIC
   2591        1.94  augustss 	if (xfer->busy_free != XFER_BUSY) {
   2592        1.94  augustss 		printf("uhci_device_isoc_done: xfer=%p not busy 0x%08x\n",
   2593        1.94  augustss 		       xfer, xfer->busy_free);
   2594        1.93  augustss 		return;
   2595        1.93  augustss 	}
   2596        1.93  augustss 
   2597        1.93  augustss         if (ii->stdend == NULL) {
   2598        1.93  augustss                 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
   2599        1.93  augustss #ifdef UHCI_DEBUG
   2600        1.93  augustss 		uhci_dump_ii(ii);
   2601        1.93  augustss #endif
   2602        1.93  augustss 		return;
   2603        1.93  augustss 	}
   2604        1.93  augustss #endif
   2605        1.48  augustss 
   2606        1.48  augustss 	/* Turn off the interrupt since it is active even if the TD is not. */
   2607        1.88   tsutsui 	ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC);
   2608        1.48  augustss 
   2609        1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   2610        1.16  augustss }
   2611        1.16  augustss 
   2612         1.1  augustss void
   2613       1.119  augustss uhci_device_intr_done(usbd_xfer_handle xfer)
   2614         1.1  augustss {
   2615        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2616         1.1  augustss 	uhci_softc_t *sc = ii->sc;
   2617        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2618         1.1  augustss 	uhci_soft_qh_t *sqh;
   2619         1.1  augustss 	int i, npoll;
   2620         1.1  augustss 
   2621        1.63  augustss 	DPRINTFN(5, ("uhci_intr_done: length=%d\n", xfer->actlen));
   2622         1.1  augustss 
   2623         1.1  augustss 	npoll = upipe->u.intr.npoll;
   2624         1.1  augustss 	for(i = 0; i < npoll; i++) {
   2625         1.1  augustss 		sqh = upipe->u.intr.qhs[i];
   2626       1.121  augustss 		sqh->elink = NULL;
   2627        1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   2628         1.1  augustss 	}
   2629   1.133.2.5   nathanw 	uhci_free_std_chain(sc, ii->stdstart, NULL);
   2630         1.1  augustss 
   2631         1.1  augustss 	/* XXX Wasteful. */
   2632        1.63  augustss 	if (xfer->pipe->repeat) {
   2633        1.55  augustss 		uhci_soft_td_t *data, *dataend;
   2634         1.1  augustss 
   2635        1.92  augustss 		DPRINTFN(5,("uhci_device_intr_done: requeing\n"));
   2636        1.92  augustss 
   2637         1.1  augustss 		/* This alloc cannot fail since we freed the chain above. */
   2638        1.73  augustss 		uhci_alloc_std_chain(upipe, sc, xfer->length, 1, xfer->flags,
   2639        1.63  augustss 				     &xfer->dmabuf, &data, &dataend);
   2640        1.88   tsutsui 		dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2641         1.1  augustss 
   2642        1.59  augustss #ifdef UHCI_DEBUG
   2643         1.1  augustss 		if (uhcidebug > 10) {
   2644        1.55  augustss 			DPRINTF(("uhci_device_intr_done: data(1)\n"));
   2645        1.55  augustss 			uhci_dump_tds(data);
   2646         1.1  augustss 			uhci_dump_qh(upipe->u.intr.qhs[0]);
   2647         1.1  augustss 		}
   2648         1.1  augustss #endif
   2649         1.1  augustss 
   2650        1.55  augustss 		ii->stdstart = data;
   2651        1.55  augustss 		ii->stdend = dataend;
   2652         1.7  augustss #ifdef DIAGNOSTIC
   2653        1.70  augustss 		if (!ii->isdone) {
   2654        1.70  augustss 			printf("uhci_device_intr_done: not done, ii=%p\n", ii);
   2655        1.70  augustss 		}
   2656         1.7  augustss 		ii->isdone = 0;
   2657         1.7  augustss #endif
   2658         1.1  augustss 		for (i = 0; i < npoll; i++) {
   2659         1.1  augustss 			sqh = upipe->u.intr.qhs[i];
   2660        1.55  augustss 			sqh->elink = data;
   2661       1.121  augustss 			sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2662         1.1  augustss 		}
   2663        1.92  augustss 		xfer->status = USBD_IN_PROGRESS;
   2664        1.92  augustss 		/* The ii is already on the examined list, just leave it. */
   2665         1.1  augustss 	} else {
   2666        1.92  augustss 		DPRINTFN(5,("uhci_device_intr_done: removing\n"));
   2667        1.92  augustss 		uhci_del_intr_info(ii);
   2668         1.1  augustss 	}
   2669         1.1  augustss }
   2670         1.1  augustss 
   2671         1.1  augustss /* Deallocate request data structures */
   2672         1.1  augustss void
   2673       1.119  augustss uhci_device_ctrl_done(usbd_xfer_handle xfer)
   2674         1.1  augustss {
   2675        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2676         1.1  augustss 	uhci_softc_t *sc = ii->sc;
   2677        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2678         1.1  augustss 
   2679         1.7  augustss #ifdef DIAGNOSTIC
   2680        1.63  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   2681  1.133.2.12   nathanw 		panic("uhci_ctrl_done: not a request");
   2682         1.7  augustss #endif
   2683         1.1  augustss 
   2684        1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   2685         1.1  augustss 
   2686   1.133.2.5   nathanw 	if (upipe->pipe.device->speed == USB_SPEED_LOW)
   2687       1.123  augustss 		uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh);
   2688       1.123  augustss 	else
   2689       1.123  augustss 		uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh);
   2690         1.1  augustss 
   2691        1.49  augustss 	if (upipe->u.ctl.length != 0)
   2692        1.42  augustss 		uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend);
   2693        1.49  augustss 
   2694        1.63  augustss 	DPRINTFN(5, ("uhci_ctrl_done: length=%d\n", xfer->actlen));
   2695         1.1  augustss }
   2696         1.1  augustss 
   2697         1.1  augustss /* Deallocate request data structures */
   2698         1.1  augustss void
   2699       1.119  augustss uhci_device_bulk_done(usbd_xfer_handle xfer)
   2700         1.1  augustss {
   2701        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2702         1.1  augustss 	uhci_softc_t *sc = ii->sc;
   2703        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2704         1.1  augustss 
   2705        1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   2706         1.1  augustss 
   2707         1.1  augustss 	uhci_remove_bulk(sc, upipe->u.bulk.sqh);
   2708        1.32  augustss 
   2709   1.133.2.5   nathanw 	uhci_free_std_chain(sc, ii->stdstart, NULL);
   2710        1.32  augustss 
   2711        1.63  augustss 	DPRINTFN(5, ("uhci_bulk_done: length=%d\n", xfer->actlen));
   2712         1.1  augustss }
   2713         1.1  augustss 
   2714         1.1  augustss /* Add interrupt QH, called with vflock. */
   2715         1.1  augustss void
   2716       1.119  augustss uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   2717         1.1  augustss {
   2718        1.92  augustss 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
   2719        1.42  augustss 	uhci_soft_qh_t *eqh;
   2720         1.1  augustss 
   2721        1.92  augustss 	DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh));
   2722        1.92  augustss 
   2723        1.42  augustss 	eqh = vf->eqh;
   2724        1.42  augustss 	sqh->hlink       = eqh->hlink;
   2725        1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   2726        1.42  augustss 	eqh->hlink       = sqh;
   2727       1.121  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   2728         1.1  augustss 	vf->eqh = sqh;
   2729         1.1  augustss 	vf->bandwidth++;
   2730         1.1  augustss }
   2731         1.1  augustss 
   2732       1.119  augustss /* Remove interrupt QH. */
   2733         1.1  augustss void
   2734       1.119  augustss uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   2735         1.1  augustss {
   2736        1.92  augustss 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
   2737         1.1  augustss 	uhci_soft_qh_t *pqh;
   2738         1.1  augustss 
   2739        1.92  augustss 	DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh));
   2740         1.1  augustss 
   2741       1.124  augustss 	/* See comment in uhci_remove_ctrl() */
   2742       1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   2743       1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   2744       1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   2745       1.124  augustss 	}
   2746       1.124  augustss 
   2747        1.92  augustss 	pqh = uhci_find_prev_qh(vf->hqh, sqh);
   2748        1.42  augustss 	pqh->hlink       = sqh->hlink;
   2749        1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   2750       1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   2751         1.1  augustss 	if (vf->eqh == sqh)
   2752         1.1  augustss 		vf->eqh = pqh;
   2753         1.1  augustss 	vf->bandwidth--;
   2754         1.1  augustss }
   2755         1.1  augustss 
   2756         1.1  augustss usbd_status
   2757       1.119  augustss uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival)
   2758         1.1  augustss {
   2759         1.1  augustss 	uhci_soft_qh_t *sqh;
   2760         1.1  augustss 	int i, npoll, s;
   2761         1.1  augustss 	u_int bestbw, bw, bestoffs, offs;
   2762         1.1  augustss 
   2763         1.1  augustss 	DPRINTFN(2, ("uhci_setintr: pipe=%p\n", upipe));
   2764         1.1  augustss 	if (ival == 0) {
   2765         1.1  augustss 		printf("uhci_setintr: 0 interval\n");
   2766         1.1  augustss 		return (USBD_INVAL);
   2767         1.1  augustss 	}
   2768         1.1  augustss 
   2769         1.1  augustss 	if (ival > UHCI_VFRAMELIST_COUNT)
   2770         1.1  augustss 		ival = UHCI_VFRAMELIST_COUNT;
   2771         1.1  augustss 	npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
   2772         1.1  augustss 	DPRINTFN(2, ("uhci_setintr: ival=%d npoll=%d\n", ival, npoll));
   2773         1.1  augustss 
   2774         1.1  augustss 	upipe->u.intr.npoll = npoll;
   2775   1.133.2.6   nathanw 	upipe->u.intr.qhs =
   2776        1.31  augustss 		malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK);
   2777         1.1  augustss 
   2778   1.133.2.6   nathanw 	/*
   2779         1.1  augustss 	 * Figure out which offset in the schedule that has most
   2780         1.1  augustss 	 * bandwidth left over.
   2781         1.1  augustss 	 */
   2782         1.1  augustss #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
   2783         1.1  augustss 	for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
   2784         1.1  augustss 		for (bw = i = 0; i < npoll; i++)
   2785         1.1  augustss 			bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
   2786         1.1  augustss 		if (bw < bestbw) {
   2787         1.1  augustss 			bestbw = bw;
   2788         1.1  augustss 			bestoffs = offs;
   2789         1.1  augustss 		}
   2790         1.1  augustss 	}
   2791         1.1  augustss 	DPRINTFN(1, ("uhci_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
   2792         1.1  augustss 
   2793         1.1  augustss 	for(i = 0; i < npoll; i++) {
   2794         1.1  augustss 		upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
   2795       1.121  augustss 		sqh->elink = NULL;
   2796        1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   2797         1.1  augustss 		sqh->pos = MOD(i * ival + bestoffs);
   2798         1.1  augustss 	}
   2799         1.1  augustss #undef MOD
   2800         1.1  augustss 
   2801         1.1  augustss 	s = splusb();
   2802         1.1  augustss 	/* Enter QHs into the controller data structures. */
   2803         1.1  augustss 	for(i = 0; i < npoll; i++)
   2804        1.92  augustss 		uhci_add_intr(sc, upipe->u.intr.qhs[i]);
   2805        1.92  augustss 	splx(s);
   2806         1.1  augustss 
   2807         1.1  augustss 	DPRINTFN(5, ("uhci_setintr: returns %p\n", upipe));
   2808         1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   2809         1.1  augustss }
   2810         1.1  augustss 
   2811         1.1  augustss /* Open a new pipe. */
   2812         1.1  augustss usbd_status
   2813       1.119  augustss uhci_open(usbd_pipe_handle pipe)
   2814         1.1  augustss {
   2815         1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
   2816         1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2817         1.1  augustss 	usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
   2818        1.63  augustss 	usbd_status err;
   2819        1.79  augustss 	int ival;
   2820         1.1  augustss 
   2821         1.1  augustss 	DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
   2822   1.133.2.6   nathanw 		     pipe, pipe->device->address,
   2823         1.1  augustss 		     ed->bEndpointAddress, sc->sc_addr));
   2824        1.92  augustss 
   2825        1.92  augustss 	upipe->aborting = 0;
   2826        1.92  augustss 	upipe->nexttoggle = 0;
   2827        1.92  augustss 
   2828         1.1  augustss 	if (pipe->device->address == sc->sc_addr) {
   2829         1.1  augustss 		switch (ed->bEndpointAddress) {
   2830         1.1  augustss 		case USB_CONTROL_ENDPOINT:
   2831         1.1  augustss 			pipe->methods = &uhci_root_ctrl_methods;
   2832         1.1  augustss 			break;
   2833        1.45  augustss 		case UE_DIR_IN | UHCI_INTR_ENDPT:
   2834         1.1  augustss 			pipe->methods = &uhci_root_intr_methods;
   2835         1.1  augustss 			break;
   2836         1.1  augustss 		default:
   2837         1.1  augustss 			return (USBD_INVAL);
   2838         1.1  augustss 		}
   2839         1.1  augustss 	} else {
   2840         1.1  augustss 		switch (ed->bmAttributes & UE_XFERTYPE) {
   2841         1.1  augustss 		case UE_CONTROL:
   2842         1.1  augustss 			pipe->methods = &uhci_device_ctrl_methods;
   2843         1.1  augustss 			upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
   2844        1.63  augustss 			if (upipe->u.ctl.sqh == NULL)
   2845         1.5  augustss 				goto bad;
   2846         1.1  augustss 			upipe->u.ctl.setup = uhci_alloc_std(sc);
   2847        1.63  augustss 			if (upipe->u.ctl.setup == NULL) {
   2848         1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   2849         1.5  augustss 				goto bad;
   2850         1.5  augustss 			}
   2851         1.1  augustss 			upipe->u.ctl.stat = uhci_alloc_std(sc);
   2852        1.63  augustss 			if (upipe->u.ctl.stat == NULL) {
   2853         1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   2854         1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.setup);
   2855         1.5  augustss 				goto bad;
   2856         1.5  augustss 			}
   2857   1.133.2.6   nathanw 			err = usb_allocmem(&sc->sc_bus,
   2858   1.133.2.6   nathanw 				  sizeof(usb_device_request_t),
   2859        1.63  augustss 				  0, &upipe->u.ctl.reqdma);
   2860        1.63  augustss 			if (err) {
   2861         1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   2862         1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.setup);
   2863         1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.stat);
   2864         1.5  augustss 				goto bad;
   2865         1.5  augustss 			}
   2866         1.1  augustss 			break;
   2867         1.1  augustss 		case UE_INTERRUPT:
   2868         1.1  augustss 			pipe->methods = &uhci_device_intr_methods;
   2869        1.79  augustss 			ival = pipe->interval;
   2870        1.79  augustss 			if (ival == USBD_DEFAULT_INTERVAL)
   2871        1.79  augustss 				ival = ed->bInterval;
   2872        1.80  augustss 			return (uhci_device_setintr(sc, upipe, ival));
   2873         1.1  augustss 		case UE_ISOCHRONOUS:
   2874        1.16  augustss 			pipe->methods = &uhci_device_isoc_methods;
   2875        1.48  augustss 			return (uhci_setup_isoc(pipe));
   2876         1.1  augustss 		case UE_BULK:
   2877         1.1  augustss 			pipe->methods = &uhci_device_bulk_methods;
   2878         1.1  augustss 			upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
   2879        1.63  augustss 			if (upipe->u.bulk.sqh == NULL)
   2880         1.5  augustss 				goto bad;
   2881         1.1  augustss 			break;
   2882         1.1  augustss 		}
   2883         1.1  augustss 	}
   2884         1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   2885         1.5  augustss 
   2886         1.5  augustss  bad:
   2887         1.5  augustss 	return (USBD_NOMEM);
   2888         1.1  augustss }
   2889         1.1  augustss 
   2890         1.1  augustss /*
   2891         1.1  augustss  * Data structures and routines to emulate the root hub.
   2892         1.1  augustss  */
   2893         1.1  augustss usb_device_descriptor_t uhci_devd = {
   2894         1.1  augustss 	USB_DEVICE_DESCRIPTOR_SIZE,
   2895         1.1  augustss 	UDESC_DEVICE,		/* type */
   2896         1.1  augustss 	{0x00, 0x01},		/* USB version */
   2897        1.87  augustss 	UDCLASS_HUB,		/* class */
   2898        1.87  augustss 	UDSUBCLASS_HUB,		/* subclass */
   2899   1.133.2.5   nathanw 	UDPROTO_FSHUB,		/* protocol */
   2900         1.1  augustss 	64,			/* max packet */
   2901         1.1  augustss 	{0},{0},{0x00,0x01},	/* device id */
   2902         1.1  augustss 	1,2,0,			/* string indicies */
   2903         1.1  augustss 	1			/* # of configurations */
   2904         1.1  augustss };
   2905         1.1  augustss 
   2906         1.1  augustss usb_config_descriptor_t uhci_confd = {
   2907         1.1  augustss 	USB_CONFIG_DESCRIPTOR_SIZE,
   2908         1.1  augustss 	UDESC_CONFIG,
   2909         1.1  augustss 	{USB_CONFIG_DESCRIPTOR_SIZE +
   2910         1.1  augustss 	 USB_INTERFACE_DESCRIPTOR_SIZE +
   2911         1.1  augustss 	 USB_ENDPOINT_DESCRIPTOR_SIZE},
   2912         1.1  augustss 	1,
   2913         1.1  augustss 	1,
   2914         1.1  augustss 	0,
   2915         1.1  augustss 	UC_SELF_POWERED,
   2916         1.1  augustss 	0			/* max power */
   2917         1.1  augustss };
   2918         1.1  augustss 
   2919         1.1  augustss usb_interface_descriptor_t uhci_ifcd = {
   2920         1.1  augustss 	USB_INTERFACE_DESCRIPTOR_SIZE,
   2921         1.1  augustss 	UDESC_INTERFACE,
   2922         1.1  augustss 	0,
   2923         1.1  augustss 	0,
   2924         1.1  augustss 	1,
   2925        1.87  augustss 	UICLASS_HUB,
   2926        1.87  augustss 	UISUBCLASS_HUB,
   2927   1.133.2.5   nathanw 	UIPROTO_FSHUB,
   2928         1.1  augustss 	0
   2929         1.1  augustss };
   2930         1.1  augustss 
   2931         1.1  augustss usb_endpoint_descriptor_t uhci_endpd = {
   2932         1.1  augustss 	USB_ENDPOINT_DESCRIPTOR_SIZE,
   2933         1.1  augustss 	UDESC_ENDPOINT,
   2934        1.45  augustss 	UE_DIR_IN | UHCI_INTR_ENDPT,
   2935         1.1  augustss 	UE_INTERRUPT,
   2936         1.1  augustss 	{8},
   2937         1.1  augustss 	255
   2938         1.1  augustss };
   2939         1.1  augustss 
   2940         1.1  augustss usb_hub_descriptor_t uhci_hubd_piix = {
   2941         1.1  augustss 	USB_HUB_DESCRIPTOR_SIZE,
   2942         1.1  augustss 	UDESC_HUB,
   2943         1.1  augustss 	2,
   2944         1.1  augustss 	{ UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
   2945         1.1  augustss 	50,			/* power on to power good */
   2946         1.1  augustss 	0,
   2947         1.1  augustss 	{ 0x00 },		/* both ports are removable */
   2948         1.1  augustss };
   2949         1.1  augustss 
   2950         1.1  augustss int
   2951       1.119  augustss uhci_str(usb_string_descriptor_t *p, int l, char *s)
   2952         1.1  augustss {
   2953         1.1  augustss 	int i;
   2954         1.1  augustss 
   2955         1.1  augustss 	if (l == 0)
   2956         1.1  augustss 		return (0);
   2957         1.1  augustss 	p->bLength = 2 * strlen(s) + 2;
   2958         1.1  augustss 	if (l == 1)
   2959         1.1  augustss 		return (1);
   2960         1.1  augustss 	p->bDescriptorType = UDESC_STRING;
   2961         1.1  augustss 	l -= 2;
   2962         1.1  augustss 	for (i = 0; s[i] && l > 1; i++, l -= 2)
   2963         1.1  augustss 		USETW2(p->bString[i], 0, s[i]);
   2964         1.1  augustss 	return (2*i+2);
   2965         1.1  augustss }
   2966         1.1  augustss 
   2967         1.1  augustss /*
   2968  1.133.2.13   thorpej  * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also
   2969  1.133.2.13   thorpej  * enables the port, and also states that SET_FEATURE(PORT_ENABLE)
   2970  1.133.2.13   thorpej  * should not be used by the USB subsystem.  As we cannot issue a
   2971  1.133.2.13   thorpej  * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port
   2972  1.133.2.13   thorpej  * will be enabled as part of the reset.
   2973  1.133.2.13   thorpej  *
   2974  1.133.2.13   thorpej  * On the VT83C572, the port cannot be successfully enabled until the
   2975  1.133.2.13   thorpej  * outstanding "port enable change" and "connection status change"
   2976  1.133.2.13   thorpej  * events have been reset.
   2977  1.133.2.13   thorpej  */
   2978  1.133.2.13   thorpej Static usbd_status
   2979  1.133.2.13   thorpej uhci_portreset(uhci_softc_t *sc, int index)
   2980  1.133.2.13   thorpej {
   2981  1.133.2.13   thorpej 	int lim, port, x;
   2982  1.133.2.13   thorpej 
   2983  1.133.2.13   thorpej 	if (index == 1)
   2984  1.133.2.13   thorpej 		port = UHCI_PORTSC1;
   2985  1.133.2.13   thorpej 	else if (index == 2)
   2986  1.133.2.13   thorpej 		port = UHCI_PORTSC2;
   2987  1.133.2.13   thorpej 	else
   2988  1.133.2.13   thorpej 		return (USBD_IOERROR);
   2989  1.133.2.13   thorpej 
   2990  1.133.2.13   thorpej 	x = URWMASK(UREAD2(sc, port));
   2991  1.133.2.13   thorpej 	UWRITE2(sc, port, x | UHCI_PORTSC_PR);
   2992  1.133.2.13   thorpej 
   2993  1.133.2.13   thorpej 	usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
   2994  1.133.2.13   thorpej 
   2995  1.133.2.13   thorpej 	DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n",
   2996  1.133.2.13   thorpej 		    index, UREAD2(sc, port)));
   2997  1.133.2.13   thorpej 
   2998  1.133.2.13   thorpej 	x = URWMASK(UREAD2(sc, port));
   2999  1.133.2.13   thorpej 	UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
   3000  1.133.2.13   thorpej 
   3001  1.133.2.13   thorpej 	delay(100);
   3002  1.133.2.13   thorpej 
   3003  1.133.2.13   thorpej 	DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n",
   3004  1.133.2.13   thorpej 		    index, UREAD2(sc, port)));
   3005  1.133.2.13   thorpej 
   3006  1.133.2.13   thorpej 	x = URWMASK(UREAD2(sc, port));
   3007  1.133.2.13   thorpej 	UWRITE2(sc, port, x  | UHCI_PORTSC_PE);
   3008  1.133.2.13   thorpej 
   3009  1.133.2.13   thorpej 	for (lim = 10; --lim > 0;) {
   3010  1.133.2.13   thorpej 		usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY);
   3011  1.133.2.13   thorpej 
   3012  1.133.2.13   thorpej 		x = UREAD2(sc, port);
   3013  1.133.2.13   thorpej 
   3014  1.133.2.13   thorpej 		DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n",
   3015  1.133.2.13   thorpej 			    index, lim, x));
   3016  1.133.2.13   thorpej 
   3017  1.133.2.13   thorpej 		if (!(x & UHCI_PORTSC_CCS)) {
   3018  1.133.2.13   thorpej 			/*
   3019  1.133.2.13   thorpej 			 * No device is connected (or was disconnected
   3020  1.133.2.13   thorpej 			 * during reset).  Consider the port reset.
   3021  1.133.2.13   thorpej 			 * The delay must be long enough to ensure on
   3022  1.133.2.13   thorpej 			 * the initial iteration that the device
   3023  1.133.2.13   thorpej 			 * connection will have been registered.  50ms
   3024  1.133.2.13   thorpej 			 * appears to be sufficient, but 20ms is not.
   3025  1.133.2.13   thorpej 			 */
   3026  1.133.2.13   thorpej 			DPRINTFN(3,("uhci port %d loop %u, device detached\n",
   3027  1.133.2.13   thorpej 				    index, lim));
   3028  1.133.2.13   thorpej 			break;
   3029  1.133.2.13   thorpej 		}
   3030  1.133.2.13   thorpej 
   3031  1.133.2.13   thorpej 		if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) {
   3032  1.133.2.13   thorpej 			/*
   3033  1.133.2.13   thorpej 			 * Port enabled changed and/or connection
   3034  1.133.2.13   thorpej 			 * status changed were set.  Reset either or
   3035  1.133.2.13   thorpej 			 * both raised flags (by writing a 1 to that
   3036  1.133.2.13   thorpej 			 * bit), and wait again for state to settle.
   3037  1.133.2.13   thorpej 			 */
   3038  1.133.2.13   thorpej 			UWRITE2(sc, port, URWMASK(x) |
   3039  1.133.2.13   thorpej 				(x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)));
   3040  1.133.2.13   thorpej 			continue;
   3041  1.133.2.13   thorpej 		}
   3042  1.133.2.13   thorpej 
   3043  1.133.2.13   thorpej 		if (x & UHCI_PORTSC_PE)
   3044  1.133.2.13   thorpej 			/* Port is enabled */
   3045  1.133.2.13   thorpej 			break;
   3046  1.133.2.13   thorpej 
   3047  1.133.2.13   thorpej 		UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE);
   3048  1.133.2.13   thorpej 	}
   3049  1.133.2.13   thorpej 
   3050  1.133.2.13   thorpej 	DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n",
   3051  1.133.2.13   thorpej 		    index, UREAD2(sc, port)));
   3052  1.133.2.13   thorpej 
   3053  1.133.2.13   thorpej 	if (lim <= 0) {
   3054  1.133.2.13   thorpej 		DPRINTFN(1,("uhci port %d reset timed out\n", index));
   3055  1.133.2.13   thorpej 		return (USBD_TIMEOUT);
   3056  1.133.2.13   thorpej 	}
   3057  1.133.2.13   thorpej 
   3058  1.133.2.13   thorpej 	sc->sc_isreset = 1;
   3059  1.133.2.13   thorpej 	return (USBD_NORMAL_COMPLETION);
   3060  1.133.2.13   thorpej }
   3061  1.133.2.13   thorpej 
   3062  1.133.2.13   thorpej /*
   3063         1.1  augustss  * Simulate a hardware hub by handling all the necessary requests.
   3064         1.1  augustss  */
   3065         1.1  augustss usbd_status
   3066       1.119  augustss uhci_root_ctrl_transfer(usbd_xfer_handle xfer)
   3067         1.1  augustss {
   3068        1.63  augustss 	usbd_status err;
   3069        1.16  augustss 
   3070        1.52  augustss 	/* Insert last in queue. */
   3071        1.63  augustss 	err = usb_insert_transfer(xfer);
   3072        1.63  augustss 	if (err)
   3073        1.63  augustss 		return (err);
   3074        1.52  augustss 
   3075   1.133.2.6   nathanw 	/*
   3076        1.94  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   3077        1.94  augustss 	 * so start it first.
   3078        1.67  augustss 	 */
   3079        1.63  augustss 	return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   3080        1.16  augustss }
   3081        1.16  augustss 
   3082        1.16  augustss usbd_status
   3083       1.119  augustss uhci_root_ctrl_start(usbd_xfer_handle xfer)
   3084        1.16  augustss {
   3085        1.63  augustss 	uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
   3086         1.1  augustss 	usb_device_request_t *req;
   3087        1.59  augustss 	void *buf = NULL;
   3088         1.1  augustss 	int port, x;
   3089        1.52  augustss 	int s, len, value, index, status, change, l, totlen = 0;
   3090         1.1  augustss 	usb_port_status_t ps;
   3091        1.63  augustss 	usbd_status err;
   3092         1.1  augustss 
   3093        1.82  augustss 	if (sc->sc_dying)
   3094        1.82  augustss 		return (USBD_IOERROR);
   3095        1.82  augustss 
   3096        1.48  augustss #ifdef DIAGNOSTIC
   3097        1.63  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   3098  1.133.2.12   nathanw 		panic("uhci_root_ctrl_transfer: not a request");
   3099        1.48  augustss #endif
   3100        1.63  augustss 	req = &xfer->request;
   3101         1.1  augustss 
   3102   1.133.2.6   nathanw 	DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
   3103         1.1  augustss 		    req->bmRequestType, req->bRequest));
   3104         1.1  augustss 
   3105         1.1  augustss 	len = UGETW(req->wLength);
   3106         1.1  augustss 	value = UGETW(req->wValue);
   3107         1.1  augustss 	index = UGETW(req->wIndex);
   3108        1.49  augustss 
   3109        1.49  augustss 	if (len != 0)
   3110   1.133.2.8   nathanw 		buf = KERNADDR(&xfer->dmabuf, 0);
   3111        1.49  augustss 
   3112         1.1  augustss #define C(x,y) ((x) | ((y) << 8))
   3113         1.1  augustss 	switch(C(req->bRequest, req->bmRequestType)) {
   3114         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
   3115         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
   3116         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
   3117   1.133.2.6   nathanw 		/*
   3118        1.13  augustss 		 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
   3119         1.1  augustss 		 * for the integrated root hub.
   3120         1.1  augustss 		 */
   3121         1.1  augustss 		break;
   3122         1.1  augustss 	case C(UR_GET_CONFIG, UT_READ_DEVICE):
   3123         1.1  augustss 		if (len > 0) {
   3124         1.1  augustss 			*(u_int8_t *)buf = sc->sc_conf;
   3125         1.1  augustss 			totlen = 1;
   3126         1.1  augustss 		}
   3127         1.1  augustss 		break;
   3128         1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   3129         1.1  augustss 		DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
   3130         1.1  augustss 		switch(value >> 8) {
   3131         1.1  augustss 		case UDESC_DEVICE:
   3132         1.1  augustss 			if ((value & 0xff) != 0) {
   3133        1.63  augustss 				err = USBD_IOERROR;
   3134         1.1  augustss 				goto ret;
   3135         1.1  augustss 			}
   3136         1.1  augustss 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
   3137        1.27  augustss 			USETW(uhci_devd.idVendor, sc->sc_id_vendor);
   3138         1.1  augustss 			memcpy(buf, &uhci_devd, l);
   3139         1.1  augustss 			break;
   3140         1.1  augustss 		case UDESC_CONFIG:
   3141         1.1  augustss 			if ((value & 0xff) != 0) {
   3142        1.63  augustss 				err = USBD_IOERROR;
   3143         1.1  augustss 				goto ret;
   3144         1.1  augustss 			}
   3145         1.1  augustss 			totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
   3146         1.1  augustss 			memcpy(buf, &uhci_confd, l);
   3147         1.1  augustss 			buf = (char *)buf + l;
   3148         1.1  augustss 			len -= l;
   3149         1.1  augustss 			l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
   3150         1.1  augustss 			totlen += l;
   3151         1.1  augustss 			memcpy(buf, &uhci_ifcd, l);
   3152         1.1  augustss 			buf = (char *)buf + l;
   3153         1.1  augustss 			len -= l;
   3154         1.1  augustss 			l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
   3155         1.1  augustss 			totlen += l;
   3156         1.1  augustss 			memcpy(buf, &uhci_endpd, l);
   3157         1.1  augustss 			break;
   3158         1.1  augustss 		case UDESC_STRING:
   3159         1.1  augustss 			if (len == 0)
   3160         1.1  augustss 				break;
   3161         1.1  augustss 			*(u_int8_t *)buf = 0;
   3162         1.1  augustss 			totlen = 1;
   3163         1.1  augustss 			switch (value & 0xff) {
   3164         1.1  augustss 			case 1: /* Vendor */
   3165         1.8  augustss 				totlen = uhci_str(buf, len, sc->sc_vendor);
   3166         1.1  augustss 				break;
   3167         1.1  augustss 			case 2: /* Product */
   3168         1.8  augustss 				totlen = uhci_str(buf, len, "UHCI root hub");
   3169         1.1  augustss 				break;
   3170         1.1  augustss 			}
   3171         1.1  augustss 			break;
   3172         1.1  augustss 		default:
   3173        1.63  augustss 			err = USBD_IOERROR;
   3174         1.1  augustss 			goto ret;
   3175         1.1  augustss 		}
   3176         1.1  augustss 		break;
   3177         1.1  augustss 	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
   3178         1.1  augustss 		if (len > 0) {
   3179         1.1  augustss 			*(u_int8_t *)buf = 0;
   3180         1.1  augustss 			totlen = 1;
   3181         1.1  augustss 		}
   3182         1.1  augustss 		break;
   3183         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_DEVICE):
   3184         1.1  augustss 		if (len > 1) {
   3185         1.1  augustss 			USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
   3186         1.1  augustss 			totlen = 2;
   3187         1.1  augustss 		}
   3188         1.1  augustss 		break;
   3189         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_INTERFACE):
   3190         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
   3191         1.1  augustss 		if (len > 1) {
   3192         1.1  augustss 			USETW(((usb_status_t *)buf)->wStatus, 0);
   3193         1.1  augustss 			totlen = 2;
   3194         1.1  augustss 		}
   3195         1.1  augustss 		break;
   3196         1.1  augustss 	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
   3197         1.1  augustss 		if (value >= USB_MAX_DEVICES) {
   3198        1.63  augustss 			err = USBD_IOERROR;
   3199         1.1  augustss 			goto ret;
   3200         1.1  augustss 		}
   3201         1.1  augustss 		sc->sc_addr = value;
   3202         1.1  augustss 		break;
   3203         1.1  augustss 	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
   3204         1.1  augustss 		if (value != 0 && value != 1) {
   3205        1.63  augustss 			err = USBD_IOERROR;
   3206         1.1  augustss 			goto ret;
   3207         1.1  augustss 		}
   3208         1.1  augustss 		sc->sc_conf = value;
   3209         1.1  augustss 		break;
   3210         1.1  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
   3211         1.1  augustss 		break;
   3212         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
   3213         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
   3214         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
   3215        1.63  augustss 		err = USBD_IOERROR;
   3216         1.1  augustss 		goto ret;
   3217         1.1  augustss 	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
   3218         1.1  augustss 		break;
   3219         1.1  augustss 	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
   3220         1.1  augustss 		break;
   3221         1.1  augustss 	/* Hub requests */
   3222         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   3223         1.1  augustss 		break;
   3224         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   3225        1.12  augustss 		DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
   3226        1.12  augustss 			     "port=%d feature=%d\n",
   3227         1.1  augustss 			     index, value));
   3228         1.1  augustss 		if (index == 1)
   3229         1.1  augustss 			port = UHCI_PORTSC1;
   3230         1.1  augustss 		else if (index == 2)
   3231         1.1  augustss 			port = UHCI_PORTSC2;
   3232         1.1  augustss 		else {
   3233        1.63  augustss 			err = USBD_IOERROR;
   3234         1.1  augustss 			goto ret;
   3235         1.1  augustss 		}
   3236         1.1  augustss 		switch(value) {
   3237         1.1  augustss 		case UHF_PORT_ENABLE:
   3238   1.133.2.2   nathanw 			x = URWMASK(UREAD2(sc, port));
   3239         1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
   3240         1.1  augustss 			break;
   3241         1.1  augustss 		case UHF_PORT_SUSPEND:
   3242   1.133.2.2   nathanw 			x = URWMASK(UREAD2(sc, port));
   3243         1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
   3244         1.1  augustss 			break;
   3245         1.1  augustss 		case UHF_PORT_RESET:
   3246   1.133.2.2   nathanw 			x = URWMASK(UREAD2(sc, port));
   3247         1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
   3248         1.1  augustss 			break;
   3249         1.1  augustss 		case UHF_C_PORT_CONNECTION:
   3250   1.133.2.2   nathanw 			x = URWMASK(UREAD2(sc, port));
   3251         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
   3252         1.1  augustss 			break;
   3253         1.1  augustss 		case UHF_C_PORT_ENABLE:
   3254   1.133.2.2   nathanw 			x = URWMASK(UREAD2(sc, port));
   3255         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
   3256         1.1  augustss 			break;
   3257         1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   3258   1.133.2.2   nathanw 			x = URWMASK(UREAD2(sc, port));
   3259         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
   3260         1.1  augustss 			break;
   3261         1.1  augustss 		case UHF_C_PORT_RESET:
   3262         1.1  augustss 			sc->sc_isreset = 0;
   3263        1.63  augustss 			err = USBD_NORMAL_COMPLETION;
   3264         1.1  augustss 			goto ret;
   3265         1.1  augustss 		case UHF_PORT_CONNECTION:
   3266         1.1  augustss 		case UHF_PORT_OVER_CURRENT:
   3267         1.1  augustss 		case UHF_PORT_POWER:
   3268         1.1  augustss 		case UHF_PORT_LOW_SPEED:
   3269         1.1  augustss 		case UHF_C_PORT_SUSPEND:
   3270         1.1  augustss 		default:
   3271        1.63  augustss 			err = USBD_IOERROR;
   3272         1.1  augustss 			goto ret;
   3273         1.1  augustss 		}
   3274         1.1  augustss 		break;
   3275         1.1  augustss 	case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
   3276         1.1  augustss 		if (index == 1)
   3277         1.1  augustss 			port = UHCI_PORTSC1;
   3278         1.1  augustss 		else if (index == 2)
   3279         1.1  augustss 			port = UHCI_PORTSC2;
   3280         1.1  augustss 		else {
   3281        1.63  augustss 			err = USBD_IOERROR;
   3282         1.1  augustss 			goto ret;
   3283         1.1  augustss 		}
   3284         1.1  augustss 		if (len > 0) {
   3285   1.133.2.6   nathanw 			*(u_int8_t *)buf =
   3286         1.1  augustss 				(UREAD2(sc, port) & UHCI_PORTSC_LS) >>
   3287         1.1  augustss 				UHCI_PORTSC_LS_SHIFT;
   3288         1.1  augustss 			totlen = 1;
   3289         1.1  augustss 		}
   3290         1.1  augustss 		break;
   3291         1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   3292         1.1  augustss 		if (value != 0) {
   3293        1.63  augustss 			err = USBD_IOERROR;
   3294         1.1  augustss 			goto ret;
   3295         1.1  augustss 		}
   3296         1.1  augustss 		l = min(len, USB_HUB_DESCRIPTOR_SIZE);
   3297         1.1  augustss 		totlen = l;
   3298         1.1  augustss 		memcpy(buf, &uhci_hubd_piix, l);
   3299         1.1  augustss 		break;
   3300         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   3301         1.1  augustss 		if (len != 4) {
   3302        1.63  augustss 			err = USBD_IOERROR;
   3303         1.1  augustss 			goto ret;
   3304         1.1  augustss 		}
   3305         1.1  augustss 		memset(buf, 0, len);
   3306         1.1  augustss 		totlen = len;
   3307         1.1  augustss 		break;
   3308         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   3309         1.1  augustss 		if (index == 1)
   3310         1.1  augustss 			port = UHCI_PORTSC1;
   3311         1.1  augustss 		else if (index == 2)
   3312         1.1  augustss 			port = UHCI_PORTSC2;
   3313         1.1  augustss 		else {
   3314        1.63  augustss 			err = USBD_IOERROR;
   3315         1.1  augustss 			goto ret;
   3316         1.1  augustss 		}
   3317         1.1  augustss 		if (len != 4) {
   3318        1.63  augustss 			err = USBD_IOERROR;
   3319         1.1  augustss 			goto ret;
   3320         1.1  augustss 		}
   3321         1.1  augustss 		x = UREAD2(sc, port);
   3322         1.1  augustss 		status = change = 0;
   3323   1.133.2.4   nathanw 		if (x & UHCI_PORTSC_CCS)
   3324         1.1  augustss 			status |= UPS_CURRENT_CONNECT_STATUS;
   3325   1.133.2.6   nathanw 		if (x & UHCI_PORTSC_CSC)
   3326         1.1  augustss 			change |= UPS_C_CONNECT_STATUS;
   3327   1.133.2.6   nathanw 		if (x & UHCI_PORTSC_PE)
   3328         1.1  augustss 			status |= UPS_PORT_ENABLED;
   3329   1.133.2.6   nathanw 		if (x & UHCI_PORTSC_POEDC)
   3330         1.1  augustss 			change |= UPS_C_PORT_ENABLED;
   3331   1.133.2.6   nathanw 		if (x & UHCI_PORTSC_OCI)
   3332         1.1  augustss 			status |= UPS_OVERCURRENT_INDICATOR;
   3333   1.133.2.6   nathanw 		if (x & UHCI_PORTSC_OCIC)
   3334         1.1  augustss 			change |= UPS_C_OVERCURRENT_INDICATOR;
   3335   1.133.2.6   nathanw 		if (x & UHCI_PORTSC_SUSP)
   3336         1.1  augustss 			status |= UPS_SUSPEND;
   3337   1.133.2.6   nathanw 		if (x & UHCI_PORTSC_LSDA)
   3338         1.1  augustss 			status |= UPS_LOW_SPEED;
   3339         1.1  augustss 		status |= UPS_PORT_POWER;
   3340         1.1  augustss 		if (sc->sc_isreset)
   3341         1.1  augustss 			change |= UPS_C_PORT_RESET;
   3342         1.1  augustss 		USETW(ps.wPortStatus, status);
   3343         1.1  augustss 		USETW(ps.wPortChange, change);
   3344         1.1  augustss 		l = min(len, sizeof ps);
   3345         1.1  augustss 		memcpy(buf, &ps, l);
   3346         1.1  augustss 		totlen = l;
   3347         1.1  augustss 		break;
   3348         1.1  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   3349        1.63  augustss 		err = USBD_IOERROR;
   3350         1.1  augustss 		goto ret;
   3351         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   3352         1.1  augustss 		break;
   3353         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   3354         1.1  augustss 		if (index == 1)
   3355         1.1  augustss 			port = UHCI_PORTSC1;
   3356         1.1  augustss 		else if (index == 2)
   3357         1.1  augustss 			port = UHCI_PORTSC2;
   3358         1.1  augustss 		else {
   3359        1.63  augustss 			err = USBD_IOERROR;
   3360         1.1  augustss 			goto ret;
   3361         1.1  augustss 		}
   3362         1.1  augustss 		switch(value) {
   3363         1.1  augustss 		case UHF_PORT_ENABLE:
   3364   1.133.2.2   nathanw 			x = URWMASK(UREAD2(sc, port));
   3365         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_PE);
   3366         1.1  augustss 			break;
   3367         1.1  augustss 		case UHF_PORT_SUSPEND:
   3368   1.133.2.2   nathanw 			x = URWMASK(UREAD2(sc, port));
   3369         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
   3370         1.1  augustss 			break;
   3371         1.1  augustss 		case UHF_PORT_RESET:
   3372  1.133.2.13   thorpej 			err = uhci_portreset(sc, index);
   3373  1.133.2.13   thorpej 			goto ret;
   3374       1.111  augustss 		case UHF_PORT_POWER:
   3375       1.111  augustss 			/* Pretend we turned on power */
   3376       1.115   mycroft 			err = USBD_NORMAL_COMPLETION;
   3377       1.111  augustss 			goto ret;
   3378         1.1  augustss 		case UHF_C_PORT_CONNECTION:
   3379         1.1  augustss 		case UHF_C_PORT_ENABLE:
   3380         1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   3381         1.1  augustss 		case UHF_PORT_CONNECTION:
   3382         1.1  augustss 		case UHF_PORT_OVER_CURRENT:
   3383         1.1  augustss 		case UHF_PORT_LOW_SPEED:
   3384         1.1  augustss 		case UHF_C_PORT_SUSPEND:
   3385         1.1  augustss 		case UHF_C_PORT_RESET:
   3386         1.1  augustss 		default:
   3387        1.63  augustss 			err = USBD_IOERROR;
   3388         1.1  augustss 			goto ret;
   3389         1.1  augustss 		}
   3390         1.1  augustss 		break;
   3391         1.1  augustss 	default:
   3392        1.63  augustss 		err = USBD_IOERROR;
   3393         1.1  augustss 		goto ret;
   3394         1.1  augustss 	}
   3395        1.63  augustss 	xfer->actlen = totlen;
   3396        1.63  augustss 	err = USBD_NORMAL_COMPLETION;
   3397         1.1  augustss  ret:
   3398        1.63  augustss 	xfer->status = err;
   3399        1.52  augustss 	s = splusb();
   3400        1.63  augustss 	usb_transfer_complete(xfer);
   3401        1.52  augustss 	splx(s);
   3402         1.1  augustss 	return (USBD_IN_PROGRESS);
   3403         1.1  augustss }
   3404         1.1  augustss 
   3405         1.1  augustss /* Abort a root control request. */
   3406         1.1  augustss void
   3407       1.119  augustss uhci_root_ctrl_abort(usbd_xfer_handle xfer)
   3408         1.1  augustss {
   3409        1.70  augustss 	/* Nothing to do, all transfers are synchronous. */
   3410         1.1  augustss }
   3411         1.1  augustss 
   3412         1.1  augustss /* Close the root pipe. */
   3413         1.1  augustss void
   3414       1.119  augustss uhci_root_ctrl_close(usbd_pipe_handle pipe)
   3415         1.1  augustss {
   3416         1.1  augustss 	DPRINTF(("uhci_root_ctrl_close\n"));
   3417         1.1  augustss }
   3418         1.1  augustss 
   3419         1.1  augustss /* Abort a root interrupt request. */
   3420         1.1  augustss void
   3421       1.119  augustss uhci_root_intr_abort(usbd_xfer_handle xfer)
   3422         1.1  augustss {
   3423        1.63  augustss 	uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
   3424        1.30  augustss 
   3425        1.96  augustss 	usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, xfer);
   3426        1.96  augustss 	sc->sc_intr_xfer = NULL;
   3427        1.58  augustss 
   3428        1.63  augustss 	if (xfer->pipe->intrxfer == xfer) {
   3429        1.58  augustss 		DPRINTF(("uhci_root_intr_abort: remove\n"));
   3430        1.63  augustss 		xfer->pipe->intrxfer = 0;
   3431        1.58  augustss 	}
   3432        1.63  augustss 	xfer->status = USBD_CANCELLED;
   3433        1.96  augustss #ifdef DIAGNOSTIC
   3434        1.96  augustss 	UXFER(xfer)->iinfo.isdone = 1;
   3435        1.96  augustss #endif
   3436        1.63  augustss 	usb_transfer_complete(xfer);
   3437         1.1  augustss }
   3438         1.1  augustss 
   3439        1.16  augustss usbd_status
   3440       1.119  augustss uhci_root_intr_transfer(usbd_xfer_handle xfer)
   3441        1.16  augustss {
   3442        1.63  augustss 	usbd_status err;
   3443        1.16  augustss 
   3444        1.52  augustss 	/* Insert last in queue. */
   3445        1.63  augustss 	err = usb_insert_transfer(xfer);
   3446        1.63  augustss 	if (err)
   3447        1.63  augustss 		return (err);
   3448        1.52  augustss 
   3449        1.67  augustss 	/* Pipe isn't running (otherwise err would be USBD_INPROG),
   3450        1.67  augustss 	 * start first
   3451        1.67  augustss 	 */
   3452        1.63  augustss 	return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   3453        1.16  augustss }
   3454        1.16  augustss 
   3455         1.1  augustss /* Start a transfer on the root interrupt pipe */
   3456         1.1  augustss usbd_status
   3457       1.119  augustss uhci_root_intr_start(usbd_xfer_handle xfer)
   3458         1.1  augustss {
   3459        1.63  augustss 	usbd_pipe_handle pipe = xfer->pipe;
   3460         1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
   3461         1.1  augustss 
   3462        1.63  augustss 	DPRINTFN(3, ("uhci_root_intr_transfer: xfer=%p len=%d flags=%d\n",
   3463        1.63  augustss 		     xfer, xfer->length, xfer->flags));
   3464        1.82  augustss 
   3465        1.82  augustss 	if (sc->sc_dying)
   3466        1.82  augustss 		return (USBD_IOERROR);
   3467         1.1  augustss 
   3468        1.63  augustss 	sc->sc_ival = MS_TO_TICKS(xfer->pipe->endpoint->edesc->bInterval);
   3469        1.96  augustss 	usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
   3470        1.96  augustss 	sc->sc_intr_xfer = xfer;
   3471         1.1  augustss 	return (USBD_IN_PROGRESS);
   3472         1.1  augustss }
   3473         1.1  augustss 
   3474         1.1  augustss /* Close the root interrupt pipe. */
   3475         1.1  augustss void
   3476       1.119  augustss uhci_root_intr_close(usbd_pipe_handle pipe)
   3477         1.1  augustss {
   3478        1.30  augustss 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
   3479        1.30  augustss 
   3480        1.96  augustss 	usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, sc->sc_intr_xfer);
   3481        1.96  augustss 	sc->sc_intr_xfer = NULL;
   3482         1.1  augustss 	DPRINTF(("uhci_root_intr_close\n"));
   3483         1.1  augustss }
   3484