uhci.c revision 1.142 1 1.142 augustss /* $NetBSD: uhci.c,v 1.142 2001/10/25 02:08:13 augustss Exp $ */
2 1.67 augustss /* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $ */
3 1.1 augustss
4 1.1 augustss /*
5 1.1 augustss * Copyright (c) 1998 The NetBSD Foundation, Inc.
6 1.1 augustss * All rights reserved.
7 1.1 augustss *
8 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
9 1.113 augustss * by Lennart Augustsson (lennart (at) augustsson.net) at
10 1.11 augustss * Carlstedt Research & Technology.
11 1.1 augustss *
12 1.1 augustss * Redistribution and use in source and binary forms, with or without
13 1.1 augustss * modification, are permitted provided that the following conditions
14 1.1 augustss * are met:
15 1.1 augustss * 1. Redistributions of source code must retain the above copyright
16 1.1 augustss * notice, this list of conditions and the following disclaimer.
17 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
18 1.1 augustss * notice, this list of conditions and the following disclaimer in the
19 1.1 augustss * documentation and/or other materials provided with the distribution.
20 1.1 augustss * 3. All advertising materials mentioning features or use of this software
21 1.1 augustss * must display the following acknowledgement:
22 1.1 augustss * This product includes software developed by the NetBSD
23 1.1 augustss * Foundation, Inc. and its contributors.
24 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
25 1.1 augustss * contributors may be used to endorse or promote products derived
26 1.1 augustss * from this software without specific prior written permission.
27 1.1 augustss *
28 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
39 1.1 augustss */
40 1.1 augustss
41 1.1 augustss /*
42 1.1 augustss * USB Universal Host Controller driver.
43 1.28 augustss * Handles e.g. PIIX3 and PIIX4.
44 1.1 augustss *
45 1.131 augustss * UHCI spec: http://developer.intel.com/design/USB/UHCI11D.htm
46 1.131 augustss * USB spec: http://www.usb.org/developers/data/usbspec.zip
47 1.71 augustss * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
48 1.71 augustss * ftp://download.intel.com/design/intarch/datashts/29056201.pdf
49 1.1 augustss */
50 1.1 augustss
51 1.1 augustss #include <sys/param.h>
52 1.1 augustss #include <sys/systm.h>
53 1.1 augustss #include <sys/kernel.h>
54 1.1 augustss #include <sys/malloc.h>
55 1.37 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
56 1.1 augustss #include <sys/device.h>
57 1.67 augustss #include <sys/select.h>
58 1.13 augustss #elif defined(__FreeBSD__)
59 1.13 augustss #include <sys/module.h>
60 1.13 augustss #include <sys/bus.h>
61 1.67 augustss #include <machine/bus_pio.h>
62 1.67 augustss #if defined(DIAGNOSTIC) && defined(__i386__)
63 1.67 augustss #include <machine/cpu.h>
64 1.67 augustss #endif
65 1.13 augustss #endif
66 1.1 augustss #include <sys/proc.h>
67 1.1 augustss #include <sys/queue.h>
68 1.1 augustss
69 1.7 augustss #include <machine/bus.h>
70 1.39 augustss #include <machine/endian.h>
71 1.7 augustss
72 1.1 augustss #include <dev/usb/usb.h>
73 1.1 augustss #include <dev/usb/usbdi.h>
74 1.1 augustss #include <dev/usb/usbdivar.h>
75 1.7 augustss #include <dev/usb/usb_mem.h>
76 1.1 augustss #include <dev/usb/usb_quirks.h>
77 1.1 augustss
78 1.1 augustss #include <dev/usb/uhcireg.h>
79 1.1 augustss #include <dev/usb/uhcivar.h>
80 1.1 augustss
81 1.125 augustss /* Use bandwidth reclamation for control transfers. Some devices choke on it. */
82 1.125 augustss /*#define UHCI_CTL_LOOP */
83 1.125 augustss
84 1.13 augustss #if defined(__FreeBSD__)
85 1.13 augustss #include <machine/clock.h>
86 1.13 augustss
87 1.13 augustss #define delay(d) DELAY(d)
88 1.13 augustss #endif
89 1.13 augustss
90 1.1 augustss #define MS_TO_TICKS(ms) ((ms) * hz / 1000)
91 1.1 augustss
92 1.37 augustss #if defined(__OpenBSD__)
93 1.37 augustss struct cfdriver uhci_cd = {
94 1.37 augustss NULL, "uhci", DV_DULL
95 1.37 augustss };
96 1.37 augustss #endif
97 1.37 augustss
98 1.67 augustss #ifdef UHCI_DEBUG
99 1.92 augustss uhci_softc_t *thesc;
100 1.59 augustss #define DPRINTF(x) if (uhcidebug) printf x
101 1.59 augustss #define DPRINTFN(n,x) if (uhcidebug>(n)) printf x
102 1.67 augustss int uhcidebug = 0;
103 1.125 augustss int uhcinoloop = 0;
104 1.122 tv #ifndef __NetBSD__
105 1.122 tv #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
106 1.122 tv #endif
107 1.59 augustss #else
108 1.59 augustss #define DPRINTF(x)
109 1.59 augustss #define DPRINTFN(n,x)
110 1.59 augustss #endif
111 1.59 augustss
112 1.39 augustss /*
113 1.39 augustss * The UHCI controller is little endian, so on big endian machines
114 1.39 augustss * the data strored in memory needs to be swapped.
115 1.39 augustss */
116 1.107 augustss #if defined(__FreeBSD__) || defined(__OpenBSD__)
117 1.39 augustss #if BYTE_ORDER == BIG_ENDIAN
118 1.88 tsutsui #define htole32(x) (bswap32(x))
119 1.88 tsutsui #define le32toh(x) (bswap32(x))
120 1.39 augustss #else
121 1.88 tsutsui #define htole32(x) (x)
122 1.88 tsutsui #define le32toh(x) (x)
123 1.88 tsutsui #endif
124 1.39 augustss #endif
125 1.39 augustss
126 1.1 augustss struct uhci_pipe {
127 1.1 augustss struct usbd_pipe pipe;
128 1.32 augustss int nexttoggle;
129 1.92 augustss
130 1.92 augustss u_char aborting;
131 1.92 augustss usbd_xfer_handle abortstart, abortend;
132 1.92 augustss
133 1.1 augustss /* Info needed for different pipe kinds. */
134 1.1 augustss union {
135 1.1 augustss /* Control pipe */
136 1.1 augustss struct {
137 1.1 augustss uhci_soft_qh_t *sqh;
138 1.7 augustss usb_dma_t reqdma;
139 1.16 augustss uhci_soft_td_t *setup, *stat;
140 1.1 augustss u_int length;
141 1.1 augustss } ctl;
142 1.1 augustss /* Interrupt pipe */
143 1.1 augustss struct {
144 1.1 augustss int npoll;
145 1.1 augustss uhci_soft_qh_t **qhs;
146 1.1 augustss } intr;
147 1.1 augustss /* Bulk pipe */
148 1.1 augustss struct {
149 1.1 augustss uhci_soft_qh_t *sqh;
150 1.1 augustss u_int length;
151 1.1 augustss int isread;
152 1.1 augustss } bulk;
153 1.16 augustss /* Iso pipe */
154 1.16 augustss struct iso {
155 1.16 augustss uhci_soft_td_t **stds;
156 1.48 augustss int next, inuse;
157 1.16 augustss } iso;
158 1.1 augustss } u;
159 1.1 augustss };
160 1.1 augustss
161 1.142 augustss Static void uhci_globalreset(uhci_softc_t *);
162 1.142 augustss Static void uhci_reset(uhci_softc_t *);
163 1.119 augustss Static void uhci_shutdown(void *v);
164 1.119 augustss Static void uhci_power(int, void *);
165 1.119 augustss Static usbd_status uhci_run(uhci_softc_t *, int run);
166 1.123 augustss Static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *);
167 1.119 augustss Static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *);
168 1.123 augustss Static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *);
169 1.119 augustss Static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *);
170 1.16 augustss #if 0
171 1.119 augustss Static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *,
172 1.119 augustss uhci_intr_info_t *);
173 1.119 augustss Static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *);
174 1.16 augustss #endif
175 1.1 augustss
176 1.119 augustss Static void uhci_free_std_chain(uhci_softc_t *,
177 1.119 augustss uhci_soft_td_t *, uhci_soft_td_t *);
178 1.119 augustss Static usbd_status uhci_alloc_std_chain(struct uhci_pipe *,
179 1.73 augustss uhci_softc_t *, int, int, u_int16_t, usb_dma_t *,
180 1.119 augustss uhci_soft_td_t **, uhci_soft_td_t **);
181 1.119 augustss Static void uhci_poll_hub(void *);
182 1.119 augustss Static void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle);
183 1.119 augustss Static void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *);
184 1.119 augustss Static void uhci_idone(uhci_intr_info_t *);
185 1.119 augustss
186 1.119 augustss Static void uhci_abort_xfer(usbd_xfer_handle, usbd_status status);
187 1.119 augustss
188 1.119 augustss Static void uhci_timeout(void *);
189 1.123 augustss Static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
190 1.123 augustss Static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
191 1.119 augustss Static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *);
192 1.123 augustss Static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
193 1.123 augustss Static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
194 1.119 augustss Static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *);
195 1.119 augustss Static int uhci_str(usb_string_descriptor_t *, int, char *);
196 1.123 augustss Static void uhci_add_loop(uhci_softc_t *sc);
197 1.123 augustss Static void uhci_rem_loop(uhci_softc_t *sc);
198 1.119 augustss
199 1.119 augustss Static usbd_status uhci_setup_isoc(usbd_pipe_handle pipe);
200 1.119 augustss Static void uhci_device_isoc_enter(usbd_xfer_handle);
201 1.119 augustss
202 1.119 augustss Static usbd_status uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
203 1.119 augustss Static void uhci_freem(struct usbd_bus *, usb_dma_t *);
204 1.119 augustss
205 1.119 augustss Static usbd_xfer_handle uhci_allocx(struct usbd_bus *);
206 1.119 augustss Static void uhci_freex(struct usbd_bus *, usbd_xfer_handle);
207 1.119 augustss
208 1.119 augustss Static usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle);
209 1.119 augustss Static usbd_status uhci_device_ctrl_start(usbd_xfer_handle);
210 1.119 augustss Static void uhci_device_ctrl_abort(usbd_xfer_handle);
211 1.119 augustss Static void uhci_device_ctrl_close(usbd_pipe_handle);
212 1.119 augustss Static void uhci_device_ctrl_done(usbd_xfer_handle);
213 1.119 augustss
214 1.119 augustss Static usbd_status uhci_device_intr_transfer(usbd_xfer_handle);
215 1.119 augustss Static usbd_status uhci_device_intr_start(usbd_xfer_handle);
216 1.119 augustss Static void uhci_device_intr_abort(usbd_xfer_handle);
217 1.119 augustss Static void uhci_device_intr_close(usbd_pipe_handle);
218 1.119 augustss Static void uhci_device_intr_done(usbd_xfer_handle);
219 1.119 augustss
220 1.119 augustss Static usbd_status uhci_device_bulk_transfer(usbd_xfer_handle);
221 1.119 augustss Static usbd_status uhci_device_bulk_start(usbd_xfer_handle);
222 1.119 augustss Static void uhci_device_bulk_abort(usbd_xfer_handle);
223 1.119 augustss Static void uhci_device_bulk_close(usbd_pipe_handle);
224 1.119 augustss Static void uhci_device_bulk_done(usbd_xfer_handle);
225 1.119 augustss
226 1.119 augustss Static usbd_status uhci_device_isoc_transfer(usbd_xfer_handle);
227 1.119 augustss Static usbd_status uhci_device_isoc_start(usbd_xfer_handle);
228 1.119 augustss Static void uhci_device_isoc_abort(usbd_xfer_handle);
229 1.119 augustss Static void uhci_device_isoc_close(usbd_pipe_handle);
230 1.119 augustss Static void uhci_device_isoc_done(usbd_xfer_handle);
231 1.119 augustss
232 1.119 augustss Static usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle);
233 1.119 augustss Static usbd_status uhci_root_ctrl_start(usbd_xfer_handle);
234 1.119 augustss Static void uhci_root_ctrl_abort(usbd_xfer_handle);
235 1.119 augustss Static void uhci_root_ctrl_close(usbd_pipe_handle);
236 1.119 augustss Static void uhci_root_ctrl_done(usbd_xfer_handle);
237 1.119 augustss
238 1.119 augustss Static usbd_status uhci_root_intr_transfer(usbd_xfer_handle);
239 1.119 augustss Static usbd_status uhci_root_intr_start(usbd_xfer_handle);
240 1.119 augustss Static void uhci_root_intr_abort(usbd_xfer_handle);
241 1.119 augustss Static void uhci_root_intr_close(usbd_pipe_handle);
242 1.119 augustss Static void uhci_root_intr_done(usbd_xfer_handle);
243 1.119 augustss
244 1.119 augustss Static usbd_status uhci_open(usbd_pipe_handle);
245 1.119 augustss Static void uhci_poll(struct usbd_bus *);
246 1.133 augustss Static void uhci_softintr(void *);
247 1.119 augustss
248 1.119 augustss Static usbd_status uhci_device_request(usbd_xfer_handle xfer);
249 1.119 augustss
250 1.119 augustss Static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *);
251 1.119 augustss Static void uhci_remove_intr(uhci_softc_t*, uhci_soft_qh_t*);
252 1.119 augustss Static usbd_status uhci_device_setintr(uhci_softc_t *sc,
253 1.119 augustss struct uhci_pipe *pipe, int ival);
254 1.119 augustss
255 1.119 augustss Static void uhci_device_clear_toggle(usbd_pipe_handle pipe);
256 1.119 augustss Static void uhci_noop(usbd_pipe_handle pipe);
257 1.119 augustss
258 1.119 augustss Static __inline__ uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *,
259 1.119 augustss uhci_soft_qh_t *);
260 1.119 augustss
261 1.119 augustss #ifdef UHCI_DEBUG
262 1.119 augustss Static void uhci_dump_all(uhci_softc_t *);
263 1.119 augustss Static void uhci_dumpregs(uhci_softc_t *);
264 1.119 augustss Static void uhci_dump_qhs(uhci_soft_qh_t *);
265 1.119 augustss Static void uhci_dump_qh(uhci_soft_qh_t *);
266 1.119 augustss Static void uhci_dump_tds(uhci_soft_td_t *);
267 1.119 augustss Static void uhci_dump_td(uhci_soft_td_t *);
268 1.119 augustss Static void uhci_dump_ii(uhci_intr_info_t *ii);
269 1.119 augustss void uhci_dump(void);
270 1.1 augustss #endif
271 1.1 augustss
272 1.112 augustss #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
273 1.112 augustss BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
274 1.112 augustss #define UWRITE1(sc, r, x) \
275 1.112 augustss do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
276 1.112 augustss #define UWRITE2(sc, r, x) \
277 1.112 augustss do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
278 1.112 augustss #define UWRITE4(sc, r, x) \
279 1.112 augustss do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
280 1.112 augustss #define UREAD1(sc, r) (UBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r)))
281 1.112 augustss #define UREAD2(sc, r) (UBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r)))
282 1.112 augustss #define UREAD4(sc, r) (UBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r)))
283 1.1 augustss
284 1.1 augustss #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
285 1.1 augustss #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
286 1.1 augustss
287 1.142 augustss #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */
288 1.1 augustss
289 1.1 augustss #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
290 1.1 augustss
291 1.1 augustss #define UHCI_INTR_ENDPT 1
292 1.1 augustss
293 1.48 augustss struct usbd_bus_methods uhci_bus_methods = {
294 1.48 augustss uhci_open,
295 1.85 augustss uhci_softintr,
296 1.48 augustss uhci_poll,
297 1.48 augustss uhci_allocm,
298 1.48 augustss uhci_freem,
299 1.76 augustss uhci_allocx,
300 1.76 augustss uhci_freex,
301 1.48 augustss };
302 1.48 augustss
303 1.48 augustss struct usbd_pipe_methods uhci_root_ctrl_methods = {
304 1.1 augustss uhci_root_ctrl_transfer,
305 1.16 augustss uhci_root_ctrl_start,
306 1.1 augustss uhci_root_ctrl_abort,
307 1.1 augustss uhci_root_ctrl_close,
308 1.38 augustss uhci_noop,
309 1.84 augustss uhci_root_ctrl_done,
310 1.1 augustss };
311 1.1 augustss
312 1.48 augustss struct usbd_pipe_methods uhci_root_intr_methods = {
313 1.1 augustss uhci_root_intr_transfer,
314 1.16 augustss uhci_root_intr_start,
315 1.1 augustss uhci_root_intr_abort,
316 1.1 augustss uhci_root_intr_close,
317 1.38 augustss uhci_noop,
318 1.41 augustss uhci_root_intr_done,
319 1.1 augustss };
320 1.1 augustss
321 1.48 augustss struct usbd_pipe_methods uhci_device_ctrl_methods = {
322 1.1 augustss uhci_device_ctrl_transfer,
323 1.16 augustss uhci_device_ctrl_start,
324 1.1 augustss uhci_device_ctrl_abort,
325 1.1 augustss uhci_device_ctrl_close,
326 1.38 augustss uhci_noop,
327 1.41 augustss uhci_device_ctrl_done,
328 1.1 augustss };
329 1.1 augustss
330 1.48 augustss struct usbd_pipe_methods uhci_device_intr_methods = {
331 1.1 augustss uhci_device_intr_transfer,
332 1.16 augustss uhci_device_intr_start,
333 1.1 augustss uhci_device_intr_abort,
334 1.1 augustss uhci_device_intr_close,
335 1.38 augustss uhci_device_clear_toggle,
336 1.41 augustss uhci_device_intr_done,
337 1.1 augustss };
338 1.1 augustss
339 1.48 augustss struct usbd_pipe_methods uhci_device_bulk_methods = {
340 1.1 augustss uhci_device_bulk_transfer,
341 1.16 augustss uhci_device_bulk_start,
342 1.1 augustss uhci_device_bulk_abort,
343 1.1 augustss uhci_device_bulk_close,
344 1.38 augustss uhci_device_clear_toggle,
345 1.41 augustss uhci_device_bulk_done,
346 1.1 augustss };
347 1.1 augustss
348 1.48 augustss struct usbd_pipe_methods uhci_device_isoc_methods = {
349 1.16 augustss uhci_device_isoc_transfer,
350 1.16 augustss uhci_device_isoc_start,
351 1.16 augustss uhci_device_isoc_abort,
352 1.16 augustss uhci_device_isoc_close,
353 1.38 augustss uhci_noop,
354 1.41 augustss uhci_device_isoc_done,
355 1.16 augustss };
356 1.16 augustss
357 1.92 augustss #define uhci_add_intr_info(sc, ii) \
358 1.92 augustss LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list);
359 1.92 augustss #define uhci_del_intr_info(ii) \
360 1.92 augustss LIST_REMOVE((ii), list)
361 1.92 augustss
362 1.101 augustss Static __inline__ uhci_soft_qh_t *
363 1.119 augustss uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh)
364 1.92 augustss {
365 1.92 augustss DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh));
366 1.92 augustss
367 1.92 augustss for (; pqh->hlink != sqh; pqh = pqh->hlink) {
368 1.92 augustss #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG)
369 1.92 augustss if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) {
370 1.102 augustss printf("uhci_find_prev_qh: QH not found\n");
371 1.92 augustss return (NULL);
372 1.92 augustss }
373 1.92 augustss #endif
374 1.92 augustss }
375 1.92 augustss return (pqh);
376 1.92 augustss }
377 1.92 augustss
378 1.1 augustss void
379 1.142 augustss uhci_globalreset(uhci_softc_t *sc)
380 1.1 augustss {
381 1.1 augustss UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */
382 1.20 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
383 1.1 augustss UHCICMD(sc, 0); /* do nothing */
384 1.1 augustss }
385 1.1 augustss
386 1.1 augustss usbd_status
387 1.119 augustss uhci_init(uhci_softc_t *sc)
388 1.1 augustss {
389 1.63 augustss usbd_status err;
390 1.1 augustss int i, j;
391 1.123 augustss uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh;
392 1.1 augustss uhci_soft_td_t *std;
393 1.1 augustss
394 1.1 augustss DPRINTFN(1,("uhci_init: start\n"));
395 1.1 augustss
396 1.67 augustss #ifdef UHCI_DEBUG
397 1.92 augustss thesc = sc;
398 1.92 augustss
399 1.1 augustss if (uhcidebug > 2)
400 1.1 augustss uhci_dumpregs(sc);
401 1.1 augustss #endif
402 1.1 augustss
403 1.1 augustss UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
404 1.142 augustss uhci_globalreset(sc); /* reset the controller */
405 1.142 augustss uhci_reset(sc);
406 1.24 augustss
407 1.1 augustss /* Allocate and initialize real frame array. */
408 1.63 augustss err = usb_allocmem(&sc->sc_bus,
409 1.63 augustss UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
410 1.63 augustss UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
411 1.63 augustss if (err)
412 1.63 augustss return (err);
413 1.30 augustss sc->sc_pframes = KERNADDR(&sc->sc_dma);
414 1.1 augustss UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */
415 1.36 augustss UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma)); /* set frame list*/
416 1.1 augustss
417 1.123 augustss /*
418 1.123 augustss * Allocate a TD, inactive, that hangs from the last QH.
419 1.123 augustss * This is to avoid a bug in the PIIX that makes it run berserk
420 1.123 augustss * otherwise.
421 1.123 augustss */
422 1.123 augustss std = uhci_alloc_std(sc);
423 1.123 augustss if (std == NULL)
424 1.123 augustss return (USBD_NOMEM);
425 1.123 augustss std->link.std = NULL;
426 1.123 augustss std->td.td_link = htole32(UHCI_PTR_T);
427 1.123 augustss std->td.td_status = htole32(0); /* inactive */
428 1.123 augustss std->td.td_token = htole32(0);
429 1.123 augustss std->td.td_buffer = htole32(0);
430 1.123 augustss
431 1.123 augustss /* Allocate the dummy QH marking the end and used for looping the QHs.*/
432 1.123 augustss lsqh = uhci_alloc_sqh(sc);
433 1.123 augustss if (lsqh == NULL)
434 1.123 augustss return (USBD_NOMEM);
435 1.123 augustss lsqh->hlink = NULL;
436 1.123 augustss lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */
437 1.123 augustss lsqh->elink = std;
438 1.123 augustss lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD);
439 1.123 augustss sc->sc_last_qh = lsqh;
440 1.123 augustss
441 1.1 augustss /* Allocate the dummy QH where bulk traffic will be queued. */
442 1.1 augustss bsqh = uhci_alloc_sqh(sc);
443 1.63 augustss if (bsqh == NULL)
444 1.1 augustss return (USBD_NOMEM);
445 1.123 augustss bsqh->hlink = lsqh;
446 1.123 augustss bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH);
447 1.121 augustss bsqh->elink = NULL;
448 1.88 tsutsui bsqh->qh.qh_elink = htole32(UHCI_PTR_T);
449 1.1 augustss sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
450 1.1 augustss
451 1.123 augustss /* Allocate dummy QH where high speed control traffic will be queued. */
452 1.123 augustss chsqh = uhci_alloc_sqh(sc);
453 1.123 augustss if (chsqh == NULL)
454 1.123 augustss return (USBD_NOMEM);
455 1.123 augustss chsqh->hlink = bsqh;
456 1.123 augustss chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH);
457 1.123 augustss chsqh->elink = NULL;
458 1.123 augustss chsqh->qh.qh_elink = htole32(UHCI_PTR_T);
459 1.123 augustss sc->sc_hctl_start = sc->sc_hctl_end = chsqh;
460 1.123 augustss
461 1.123 augustss /* Allocate dummy QH where control traffic will be queued. */
462 1.123 augustss clsqh = uhci_alloc_sqh(sc);
463 1.123 augustss if (clsqh == NULL)
464 1.1 augustss return (USBD_NOMEM);
465 1.123 augustss clsqh->hlink = bsqh;
466 1.123 augustss clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH);
467 1.123 augustss clsqh->elink = NULL;
468 1.123 augustss clsqh->qh.qh_elink = htole32(UHCI_PTR_T);
469 1.123 augustss sc->sc_lctl_start = sc->sc_lctl_end = clsqh;
470 1.1 augustss
471 1.1 augustss /*
472 1.1 augustss * Make all (virtual) frame list pointers point to the interrupt
473 1.1 augustss * queue heads and the interrupt queue heads at the control
474 1.1 augustss * queue head and point the physical frame list to the virtual.
475 1.1 augustss */
476 1.1 augustss for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
477 1.1 augustss std = uhci_alloc_std(sc);
478 1.1 augustss sqh = uhci_alloc_sqh(sc);
479 1.67 augustss if (std == NULL || sqh == NULL)
480 1.13 augustss return (USBD_NOMEM);
481 1.42 augustss std->link.sqh = sqh;
482 1.121 augustss std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH);
483 1.88 tsutsui std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
484 1.88 tsutsui std->td.td_token = htole32(0);
485 1.88 tsutsui std->td.td_buffer = htole32(0);
486 1.123 augustss sqh->hlink = clsqh;
487 1.123 augustss sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH);
488 1.121 augustss sqh->elink = NULL;
489 1.88 tsutsui sqh->qh.qh_elink = htole32(UHCI_PTR_T);
490 1.1 augustss sc->sc_vframes[i].htd = std;
491 1.1 augustss sc->sc_vframes[i].etd = std;
492 1.1 augustss sc->sc_vframes[i].hqh = sqh;
493 1.1 augustss sc->sc_vframes[i].eqh = sqh;
494 1.1 augustss for (j = i;
495 1.1 augustss j < UHCI_FRAMELIST_COUNT;
496 1.1 augustss j += UHCI_VFRAMELIST_COUNT)
497 1.88 tsutsui sc->sc_pframes[j] = htole32(std->physaddr);
498 1.1 augustss }
499 1.1 augustss
500 1.1 augustss LIST_INIT(&sc->sc_intrhead);
501 1.1 augustss
502 1.76 augustss SIMPLEQ_INIT(&sc->sc_free_xfers);
503 1.76 augustss
504 1.96 augustss usb_callout_init(sc->sc_poll_handle);
505 1.96 augustss
506 1.1 augustss /* Set up the bus struct. */
507 1.48 augustss sc->sc_bus.methods = &uhci_bus_methods;
508 1.1 augustss sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
509 1.1 augustss
510 1.92 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
511 1.30 augustss sc->sc_suspend = PWR_RESUME;
512 1.53 augustss sc->sc_powerhook = powerhook_establish(uhci_power, sc);
513 1.72 augustss sc->sc_shutdownhook = shutdownhook_establish(uhci_shutdown, sc);
514 1.92 augustss #endif
515 1.72 augustss
516 1.1 augustss DPRINTFN(1,("uhci_init: enabling\n"));
517 1.1 augustss UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
518 1.1 augustss UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */
519 1.1 augustss
520 1.71 augustss UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */
521 1.71 augustss
522 1.16 augustss return (uhci_run(sc, 1)); /* and here we go... */
523 1.53 augustss }
524 1.53 augustss
525 1.67 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
526 1.53 augustss int
527 1.119 augustss uhci_activate(device_ptr_t self, enum devact act)
528 1.53 augustss {
529 1.56 augustss struct uhci_softc *sc = (struct uhci_softc *)self;
530 1.53 augustss int rv = 0;
531 1.53 augustss
532 1.53 augustss switch (act) {
533 1.53 augustss case DVACT_ACTIVATE:
534 1.53 augustss return (EOPNOTSUPP);
535 1.53 augustss break;
536 1.53 augustss
537 1.53 augustss case DVACT_DEACTIVATE:
538 1.56 augustss if (sc->sc_child != NULL)
539 1.56 augustss rv = config_deactivate(sc->sc_child);
540 1.53 augustss break;
541 1.53 augustss }
542 1.53 augustss return (rv);
543 1.53 augustss }
544 1.53 augustss
545 1.53 augustss int
546 1.119 augustss uhci_detach(struct uhci_softc *sc, int flags)
547 1.53 augustss {
548 1.76 augustss usbd_xfer_handle xfer;
549 1.53 augustss int rv = 0;
550 1.53 augustss
551 1.53 augustss if (sc->sc_child != NULL)
552 1.53 augustss rv = config_detach(sc->sc_child, flags);
553 1.53 augustss
554 1.53 augustss if (rv != 0)
555 1.53 augustss return (rv);
556 1.53 augustss
557 1.92 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
558 1.53 augustss powerhook_disestablish(sc->sc_powerhook);
559 1.72 augustss shutdownhook_disestablish(sc->sc_shutdownhook);
560 1.92 augustss #endif
561 1.72 augustss
562 1.76 augustss /* Free all xfers associated with this HC. */
563 1.76 augustss for (;;) {
564 1.76 augustss xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
565 1.76 augustss if (xfer == NULL)
566 1.76 augustss break;
567 1.76 augustss SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next);
568 1.76 augustss free(xfer, M_USB);
569 1.76 augustss }
570 1.76 augustss
571 1.76 augustss /* XXX free other data structures XXX */
572 1.53 augustss
573 1.53 augustss return (rv);
574 1.1 augustss }
575 1.67 augustss #endif
576 1.1 augustss
577 1.48 augustss usbd_status
578 1.119 augustss uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
579 1.48 augustss {
580 1.102 augustss struct uhci_softc *sc = (struct uhci_softc *)bus;
581 1.102 augustss u_int32_t n;
582 1.102 augustss
583 1.102 augustss /*
584 1.102 augustss * XXX
585 1.102 augustss * Since we are allocating a buffer we can assume that we will
586 1.102 augustss * need TDs for it. Since we don't want to alolocate those from
587 1.102 augustss * an interrupt context, we allocate them here and free them again.
588 1.102 augustss * This is no guarantee that we'll get the TDs next time...
589 1.102 augustss */
590 1.102 augustss n = size / 8;
591 1.102 augustss if (n > 16) {
592 1.102 augustss u_int32_t i;
593 1.102 augustss uhci_soft_td_t **stds;
594 1.102 augustss DPRINTF(("uhci_allocm: get %d TDs\n", n));
595 1.102 augustss stds = malloc(sizeof(uhci_soft_td_t *) * n, M_TEMP, M_NOWAIT);
596 1.102 augustss memset(stds, 0, sizeof(uhci_soft_td_t *) * n);
597 1.102 augustss for(i=0; i < n; i++)
598 1.102 augustss stds[i] = uhci_alloc_std(sc);
599 1.102 augustss for(i=0; i < n; i++)
600 1.102 augustss if (stds[i] != NULL)
601 1.102 augustss uhci_free_std(sc, stds[i]);
602 1.102 augustss free(stds, M_TEMP);
603 1.102 augustss }
604 1.102 augustss
605 1.102 augustss return (usb_allocmem(&sc->sc_bus, size, 0, dma));
606 1.48 augustss }
607 1.48 augustss
608 1.48 augustss void
609 1.119 augustss uhci_freem(struct usbd_bus *bus, usb_dma_t *dma)
610 1.48 augustss {
611 1.63 augustss usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma);
612 1.76 augustss }
613 1.76 augustss
614 1.76 augustss usbd_xfer_handle
615 1.119 augustss uhci_allocx(struct usbd_bus *bus)
616 1.76 augustss {
617 1.76 augustss struct uhci_softc *sc = (struct uhci_softc *)bus;
618 1.76 augustss usbd_xfer_handle xfer;
619 1.76 augustss
620 1.76 augustss xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
621 1.94 augustss if (xfer != NULL) {
622 1.76 augustss SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next);
623 1.98 augustss #ifdef DIAGNOSTIC
624 1.94 augustss if (xfer->busy_free != XFER_FREE) {
625 1.105 augustss printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer,
626 1.94 augustss xfer->busy_free);
627 1.94 augustss }
628 1.98 augustss #endif
629 1.94 augustss } else {
630 1.92 augustss xfer = malloc(sizeof(struct uhci_xfer), M_USB, M_NOWAIT);
631 1.94 augustss }
632 1.92 augustss if (xfer != NULL) {
633 1.92 augustss memset(xfer, 0, sizeof (struct uhci_xfer));
634 1.92 augustss UXFER(xfer)->iinfo.sc = sc;
635 1.92 augustss #ifdef DIAGNOSTIC
636 1.92 augustss UXFER(xfer)->iinfo.isdone = 1;
637 1.135 augustss xfer->busy_free = XFER_BUSY;
638 1.92 augustss #endif
639 1.92 augustss }
640 1.76 augustss return (xfer);
641 1.76 augustss }
642 1.76 augustss
643 1.76 augustss void
644 1.119 augustss uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
645 1.76 augustss {
646 1.76 augustss struct uhci_softc *sc = (struct uhci_softc *)bus;
647 1.76 augustss
648 1.93 augustss #ifdef DIAGNOSTIC
649 1.94 augustss if (xfer->busy_free != XFER_BUSY) {
650 1.94 augustss printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer,
651 1.94 augustss xfer->busy_free);
652 1.93 augustss return;
653 1.93 augustss }
654 1.94 augustss xfer->busy_free = XFER_FREE;
655 1.105 augustss if (!UXFER(xfer)->iinfo.isdone) {
656 1.96 augustss printf("uhci_freex: !isdone\n");
657 1.105 augustss return;
658 1.105 augustss }
659 1.93 augustss #endif
660 1.76 augustss SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
661 1.48 augustss }
662 1.48 augustss
663 1.72 augustss /*
664 1.72 augustss * Shut down the controller when the system is going down.
665 1.72 augustss */
666 1.72 augustss void
667 1.119 augustss uhci_shutdown(void *v)
668 1.72 augustss {
669 1.72 augustss uhci_softc_t *sc = v;
670 1.72 augustss
671 1.72 augustss DPRINTF(("uhci_shutdown: stopping the HC\n"));
672 1.72 augustss uhci_run(sc, 0); /* stop the controller */
673 1.72 augustss }
674 1.72 augustss
675 1.30 augustss /*
676 1.30 augustss * Handle suspend/resume.
677 1.30 augustss *
678 1.40 augustss * We need to switch to polling mode here, because this routine is
679 1.109 augustss * called from an interrupt context. This is all right since we
680 1.40 augustss * are almost suspended anyway.
681 1.30 augustss */
682 1.30 augustss void
683 1.119 augustss uhci_power(int why, void *v)
684 1.30 augustss {
685 1.30 augustss uhci_softc_t *sc = v;
686 1.30 augustss int cmd;
687 1.30 augustss int s;
688 1.30 augustss
689 1.132 augustss s = splhardusb();
690 1.30 augustss cmd = UREAD2(sc, UHCI_CMD);
691 1.30 augustss
692 1.30 augustss DPRINTF(("uhci_power: sc=%p, why=%d (was %d), cmd=0x%x\n",
693 1.30 augustss sc, why, sc->sc_suspend, cmd));
694 1.30 augustss
695 1.128 takemura switch (why) {
696 1.128 takemura case PWR_SUSPEND:
697 1.128 takemura case PWR_STANDBY:
698 1.67 augustss #ifdef UHCI_DEBUG
699 1.30 augustss if (uhcidebug > 2)
700 1.30 augustss uhci_dumpregs(sc);
701 1.30 augustss #endif
702 1.96 augustss if (sc->sc_intr_xfer != NULL)
703 1.96 augustss usb_uncallout(sc->sc_poll_handle, uhci_poll_hub,
704 1.96 augustss sc->sc_intr_xfer);
705 1.54 augustss sc->sc_bus.use_polling++;
706 1.30 augustss uhci_run(sc, 0); /* stop the controller */
707 1.86 augustss
708 1.86 augustss /* save some state if BIOS doesn't */
709 1.86 augustss sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM);
710 1.86 augustss sc->sc_saved_sof = UREAD1(sc, UHCI_SOF);
711 1.88 tsutsui
712 1.134 augustss UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */
713 1.134 augustss
714 1.30 augustss UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */
715 1.40 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
716 1.30 augustss sc->sc_suspend = why;
717 1.61 augustss sc->sc_bus.use_polling--;
718 1.30 augustss DPRINTF(("uhci_power: cmd=0x%x\n", UREAD2(sc, UHCI_CMD)));
719 1.128 takemura break;
720 1.128 takemura case PWR_RESUME:
721 1.60 augustss #ifdef DIAGNOSTIC
722 1.61 augustss if (sc->sc_suspend == PWR_RESUME)
723 1.61 augustss printf("uhci_power: weird, resume without suspend.\n");
724 1.60 augustss #endif
725 1.61 augustss sc->sc_bus.use_polling++;
726 1.30 augustss sc->sc_suspend = why;
727 1.30 augustss if (cmd & UHCI_CMD_RS)
728 1.30 augustss uhci_run(sc, 0); /* in case BIOS has started it */
729 1.86 augustss
730 1.86 augustss /* restore saved state */
731 1.86 augustss UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma));
732 1.86 augustss UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum);
733 1.86 augustss UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof);
734 1.86 augustss
735 1.30 augustss UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */
736 1.40 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
737 1.30 augustss UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
738 1.30 augustss UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
739 1.30 augustss UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */
740 1.30 augustss uhci_run(sc, 1); /* and start traffic again */
741 1.40 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
742 1.54 augustss sc->sc_bus.use_polling--;
743 1.96 augustss if (sc->sc_intr_xfer != NULL)
744 1.96 augustss usb_callout(sc->sc_poll_handle, sc->sc_ival,
745 1.96 augustss uhci_poll_hub, sc->sc_intr_xfer);
746 1.67 augustss #ifdef UHCI_DEBUG
747 1.30 augustss if (uhcidebug > 2)
748 1.30 augustss uhci_dumpregs(sc);
749 1.30 augustss #endif
750 1.128 takemura break;
751 1.128 takemura case PWR_SOFTSUSPEND:
752 1.128 takemura case PWR_SOFTSTANDBY:
753 1.128 takemura case PWR_SOFTRESUME:
754 1.128 takemura break;
755 1.30 augustss }
756 1.30 augustss splx(s);
757 1.30 augustss }
758 1.30 augustss
759 1.59 augustss #ifdef UHCI_DEBUG
760 1.101 augustss Static void
761 1.119 augustss uhci_dumpregs(uhci_softc_t *sc)
762 1.1 augustss {
763 1.48 augustss DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
764 1.48 augustss "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
765 1.48 augustss USBDEVNAME(sc->sc_bus.bdev),
766 1.48 augustss UREAD2(sc, UHCI_CMD),
767 1.48 augustss UREAD2(sc, UHCI_STS),
768 1.48 augustss UREAD2(sc, UHCI_INTR),
769 1.48 augustss UREAD2(sc, UHCI_FRNUM),
770 1.48 augustss UREAD4(sc, UHCI_FLBASEADDR),
771 1.48 augustss UREAD1(sc, UHCI_SOF),
772 1.48 augustss UREAD2(sc, UHCI_PORTSC1),
773 1.48 augustss UREAD2(sc, UHCI_PORTSC2)));
774 1.1 augustss }
775 1.1 augustss
776 1.1 augustss void
777 1.119 augustss uhci_dump_td(uhci_soft_td_t *p)
778 1.1 augustss {
779 1.122 tv char sbuf[128], sbuf2[128];
780 1.122 tv
781 1.48 augustss DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
782 1.48 augustss "token=0x%08lx buffer=0x%08lx\n",
783 1.48 augustss p, (long)p->physaddr,
784 1.88 tsutsui (long)le32toh(p->td.td_link),
785 1.88 tsutsui (long)le32toh(p->td.td_status),
786 1.88 tsutsui (long)le32toh(p->td.td_token),
787 1.88 tsutsui (long)le32toh(p->td.td_buffer)));
788 1.122 tv
789 1.122 tv bitmask_snprintf((int)le32toh(p->td.td_link), "\20\1T\2Q\3VF",
790 1.122 tv sbuf, sizeof(sbuf));
791 1.122 tv bitmask_snprintf((int)le32toh(p->td.td_status),
792 1.122 tv "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
793 1.122 tv "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
794 1.122 tv sbuf2, sizeof(sbuf2));
795 1.122 tv
796 1.122 tv DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
797 1.122 tv "D=%d,maxlen=%d\n", sbuf, sbuf2,
798 1.88 tsutsui UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)),
799 1.88 tsutsui UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)),
800 1.88 tsutsui UHCI_TD_GET_PID(le32toh(p->td.td_token)),
801 1.88 tsutsui UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)),
802 1.88 tsutsui UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)),
803 1.88 tsutsui UHCI_TD_GET_DT(le32toh(p->td.td_token)),
804 1.88 tsutsui UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token))));
805 1.1 augustss }
806 1.1 augustss
807 1.1 augustss void
808 1.119 augustss uhci_dump_qh(uhci_soft_qh_t *sqh)
809 1.1 augustss {
810 1.67 augustss DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh,
811 1.88 tsutsui (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink),
812 1.88 tsutsui le32toh(sqh->qh.qh_elink)));
813 1.1 augustss }
814 1.1 augustss
815 1.13 augustss
816 1.110 augustss #if 1
817 1.1 augustss void
818 1.119 augustss uhci_dump(void)
819 1.1 augustss {
820 1.110 augustss uhci_dump_all(thesc);
821 1.110 augustss }
822 1.110 augustss #endif
823 1.1 augustss
824 1.110 augustss void
825 1.119 augustss uhci_dump_all(uhci_softc_t *sc)
826 1.110 augustss {
827 1.1 augustss uhci_dumpregs(sc);
828 1.50 augustss printf("intrs=%d\n", sc->sc_bus.no_intrs);
829 1.110 augustss /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/
830 1.123 augustss uhci_dump_qh(sc->sc_lctl_start);
831 1.1 augustss }
832 1.1 augustss
833 1.67 augustss
834 1.67 augustss void
835 1.119 augustss uhci_dump_qhs(uhci_soft_qh_t *sqh)
836 1.67 augustss {
837 1.67 augustss uhci_dump_qh(sqh);
838 1.67 augustss
839 1.67 augustss /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards
840 1.67 augustss * Traverses sideways first, then down.
841 1.67 augustss *
842 1.67 augustss * QH1
843 1.67 augustss * QH2
844 1.67 augustss * No QH
845 1.67 augustss * TD2.1
846 1.67 augustss * TD2.2
847 1.67 augustss * TD1.1
848 1.67 augustss * etc.
849 1.67 augustss *
850 1.67 augustss * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
851 1.67 augustss */
852 1.67 augustss
853 1.67 augustss
854 1.88 tsutsui if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T))
855 1.67 augustss uhci_dump_qhs(sqh->hlink);
856 1.67 augustss else
857 1.67 augustss DPRINTF(("No QH\n"));
858 1.67 augustss
859 1.88 tsutsui if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T))
860 1.67 augustss uhci_dump_tds(sqh->elink);
861 1.67 augustss else
862 1.67 augustss DPRINTF(("No TD\n"));
863 1.67 augustss }
864 1.67 augustss
865 1.1 augustss void
866 1.119 augustss uhci_dump_tds(uhci_soft_td_t *std)
867 1.1 augustss {
868 1.67 augustss uhci_soft_td_t *td;
869 1.67 augustss
870 1.67 augustss for(td = std; td != NULL; td = td->link.std) {
871 1.67 augustss uhci_dump_td(td);
872 1.1 augustss
873 1.67 augustss /* Check whether the link pointer in this TD marks
874 1.67 augustss * the link pointer as end of queue. This avoids
875 1.67 augustss * printing the free list in case the queue/TD has
876 1.67 augustss * already been moved there (seatbelt).
877 1.67 augustss */
878 1.88 tsutsui if (le32toh(td->td.td_link) & UHCI_PTR_T ||
879 1.88 tsutsui le32toh(td->td.td_link) == 0)
880 1.67 augustss break;
881 1.67 augustss }
882 1.1 augustss }
883 1.92 augustss
884 1.101 augustss Static void
885 1.119 augustss uhci_dump_ii(uhci_intr_info_t *ii)
886 1.92 augustss {
887 1.95 augustss usbd_pipe_handle pipe;
888 1.95 augustss usb_endpoint_descriptor_t *ed;
889 1.95 augustss usbd_device_handle dev;
890 1.92 augustss
891 1.98 augustss #ifdef DIAGNOSTIC
892 1.98 augustss #define DONE ii->isdone
893 1.98 augustss #else
894 1.98 augustss #define DONE 0
895 1.98 augustss #endif
896 1.95 augustss if (ii == NULL) {
897 1.95 augustss printf("ii NULL\n");
898 1.95 augustss return;
899 1.95 augustss }
900 1.95 augustss if (ii->xfer == NULL) {
901 1.95 augustss printf("ii %p: done=%d xfer=NULL\n",
902 1.98 augustss ii, DONE);
903 1.95 augustss return;
904 1.95 augustss }
905 1.95 augustss pipe = ii->xfer->pipe;
906 1.95 augustss if (pipe == NULL) {
907 1.95 augustss printf("ii %p: done=%d xfer=%p pipe=NULL\n",
908 1.98 augustss ii, DONE, ii->xfer);
909 1.139 augustss return;
910 1.139 augustss }
911 1.139 augustss if (pipe->endpoint == NULL) {
912 1.139 augustss printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n",
913 1.139 augustss ii, DONE, ii->xfer, pipe);
914 1.139 augustss return;
915 1.139 augustss }
916 1.139 augustss if (pipe->device == NULL) {
917 1.139 augustss printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n",
918 1.139 augustss ii, DONE, ii->xfer, pipe);
919 1.95 augustss return;
920 1.95 augustss }
921 1.95 augustss ed = pipe->endpoint->edesc;
922 1.95 augustss dev = pipe->device;
923 1.92 augustss printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n",
924 1.98 augustss ii, DONE, ii->xfer, dev,
925 1.95 augustss UGETW(dev->ddesc.idVendor),
926 1.92 augustss UGETW(dev->ddesc.idProduct),
927 1.92 augustss dev->address, pipe,
928 1.92 augustss ed->bEndpointAddress, ed->bmAttributes);
929 1.98 augustss #undef DONE
930 1.92 augustss }
931 1.92 augustss
932 1.120 augustss void uhci_dump_iis(struct uhci_softc *sc);
933 1.92 augustss void
934 1.119 augustss uhci_dump_iis(struct uhci_softc *sc)
935 1.92 augustss {
936 1.92 augustss uhci_intr_info_t *ii;
937 1.92 augustss
938 1.92 augustss printf("intr_info list:\n");
939 1.92 augustss for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
940 1.92 augustss uhci_dump_ii(ii);
941 1.92 augustss }
942 1.92 augustss
943 1.120 augustss void iidump(void);
944 1.119 augustss void iidump(void) { uhci_dump_iis(thesc); }
945 1.92 augustss
946 1.1 augustss #endif
947 1.1 augustss
948 1.1 augustss /*
949 1.1 augustss * This routine is executed periodically and simulates interrupts
950 1.1 augustss * from the root controller interrupt pipe for port status change.
951 1.1 augustss */
952 1.1 augustss void
953 1.119 augustss uhci_poll_hub(void *addr)
954 1.1 augustss {
955 1.63 augustss usbd_xfer_handle xfer = addr;
956 1.63 augustss usbd_pipe_handle pipe = xfer->pipe;
957 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
958 1.1 augustss int s;
959 1.1 augustss u_char *p;
960 1.1 augustss
961 1.96 augustss DPRINTFN(20, ("uhci_poll_hub\n"));
962 1.1 augustss
963 1.96 augustss usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
964 1.41 augustss
965 1.63 augustss p = KERNADDR(&xfer->dmabuf);
966 1.1 augustss p[0] = 0;
967 1.1 augustss if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
968 1.1 augustss p[0] |= 1<<1;
969 1.1 augustss if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
970 1.1 augustss p[0] |= 1<<2;
971 1.41 augustss if (p[0] == 0)
972 1.41 augustss /* No change, try again in a while */
973 1.41 augustss return;
974 1.41 augustss
975 1.63 augustss xfer->actlen = 1;
976 1.63 augustss xfer->status = USBD_NORMAL_COMPLETION;
977 1.16 augustss s = splusb();
978 1.63 augustss xfer->device->bus->intr_context++;
979 1.63 augustss usb_transfer_complete(xfer);
980 1.63 augustss xfer->device->bus->intr_context--;
981 1.41 augustss splx(s);
982 1.41 augustss }
983 1.41 augustss
984 1.41 augustss void
985 1.119 augustss uhci_root_intr_done(usbd_xfer_handle xfer)
986 1.84 augustss {
987 1.84 augustss }
988 1.84 augustss
989 1.84 augustss void
990 1.119 augustss uhci_root_ctrl_done(usbd_xfer_handle xfer)
991 1.41 augustss {
992 1.1 augustss }
993 1.1 augustss
994 1.123 augustss /*
995 1.123 augustss * Let the last QH loop back to the high speed control transfer QH.
996 1.123 augustss * This is what intel calls "bandwidth reclamation" and improves
997 1.123 augustss * USB performance a lot for some devices.
998 1.123 augustss * If we are already looping, just count it.
999 1.123 augustss */
1000 1.1 augustss void
1001 1.123 augustss uhci_add_loop(uhci_softc_t *sc) {
1002 1.125 augustss #ifdef UHCI_DEBUG
1003 1.125 augustss if (uhcinoloop)
1004 1.125 augustss return;
1005 1.125 augustss #endif
1006 1.123 augustss if (++sc->sc_loops == 1) {
1007 1.125 augustss DPRINTFN(5,("uhci_start_loop: add\n"));
1008 1.123 augustss /* Note, we don't loop back the soft pointer. */
1009 1.123 augustss sc->sc_last_qh->qh.qh_hlink =
1010 1.123 augustss htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH);
1011 1.123 augustss }
1012 1.123 augustss }
1013 1.123 augustss
1014 1.123 augustss void
1015 1.123 augustss uhci_rem_loop(uhci_softc_t *sc) {
1016 1.125 augustss #ifdef UHCI_DEBUG
1017 1.125 augustss if (uhcinoloop)
1018 1.125 augustss return;
1019 1.125 augustss #endif
1020 1.123 augustss if (--sc->sc_loops == 0) {
1021 1.123 augustss DPRINTFN(5,("uhci_end_loop: remove\n"));
1022 1.123 augustss sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T);
1023 1.123 augustss }
1024 1.123 augustss }
1025 1.123 augustss
1026 1.123 augustss /* Add high speed control QH, called at splusb(). */
1027 1.123 augustss void
1028 1.123 augustss uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1029 1.1 augustss {
1030 1.42 augustss uhci_soft_qh_t *eqh;
1031 1.1 augustss
1032 1.52 augustss SPLUSBCHECK;
1033 1.52 augustss
1034 1.1 augustss DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
1035 1.123 augustss eqh = sc->sc_hctl_end;
1036 1.42 augustss sqh->hlink = eqh->hlink;
1037 1.42 augustss sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1038 1.42 augustss eqh->hlink = sqh;
1039 1.121 augustss eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
1040 1.123 augustss sc->sc_hctl_end = sqh;
1041 1.125 augustss #ifdef UHCI_CTL_LOOP
1042 1.123 augustss uhci_add_loop(sc);
1043 1.125 augustss #endif
1044 1.1 augustss }
1045 1.1 augustss
1046 1.123 augustss /* Remove high speed control QH, called at splusb(). */
1047 1.1 augustss void
1048 1.123 augustss uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1049 1.1 augustss {
1050 1.1 augustss uhci_soft_qh_t *pqh;
1051 1.1 augustss
1052 1.52 augustss SPLUSBCHECK;
1053 1.52 augustss
1054 1.123 augustss DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh));
1055 1.125 augustss #ifdef UHCI_CTL_LOOP
1056 1.123 augustss uhci_rem_loop(sc);
1057 1.125 augustss #endif
1058 1.124 augustss /*
1059 1.124 augustss * The T bit should be set in the elink of the QH so that the HC
1060 1.124 augustss * doesn't follow the pointer. This condition may fail if the
1061 1.124 augustss * the transferred packet was short so that the QH still points
1062 1.124 augustss * at the last used TD.
1063 1.124 augustss * In this case we set the T bit and wait a little for the HC
1064 1.124 augustss * to stop looking at the TD.
1065 1.124 augustss */
1066 1.124 augustss if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1067 1.124 augustss sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1068 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
1069 1.124 augustss }
1070 1.124 augustss
1071 1.123 augustss pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh);
1072 1.42 augustss pqh->hlink = sqh->hlink;
1073 1.42 augustss pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1074 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
1075 1.123 augustss if (sc->sc_hctl_end == sqh)
1076 1.123 augustss sc->sc_hctl_end = pqh;
1077 1.123 augustss }
1078 1.123 augustss
1079 1.123 augustss /* Add low speed control QH, called at splusb(). */
1080 1.123 augustss void
1081 1.123 augustss uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1082 1.123 augustss {
1083 1.123 augustss uhci_soft_qh_t *eqh;
1084 1.123 augustss
1085 1.123 augustss SPLUSBCHECK;
1086 1.123 augustss
1087 1.123 augustss DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh));
1088 1.123 augustss eqh = sc->sc_lctl_end;
1089 1.123 augustss sqh->hlink = eqh->hlink;
1090 1.123 augustss sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1091 1.123 augustss eqh->hlink = sqh;
1092 1.123 augustss eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
1093 1.123 augustss sc->sc_lctl_end = sqh;
1094 1.123 augustss }
1095 1.123 augustss
1096 1.123 augustss /* Remove low speed control QH, called at splusb(). */
1097 1.123 augustss void
1098 1.123 augustss uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1099 1.123 augustss {
1100 1.123 augustss uhci_soft_qh_t *pqh;
1101 1.123 augustss
1102 1.123 augustss SPLUSBCHECK;
1103 1.123 augustss
1104 1.123 augustss DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh));
1105 1.124 augustss /* See comment in uhci_remove_hs_ctrl() */
1106 1.124 augustss if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1107 1.124 augustss sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1108 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
1109 1.124 augustss }
1110 1.123 augustss pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh);
1111 1.123 augustss pqh->hlink = sqh->hlink;
1112 1.123 augustss pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1113 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
1114 1.123 augustss if (sc->sc_lctl_end == sqh)
1115 1.123 augustss sc->sc_lctl_end = pqh;
1116 1.1 augustss }
1117 1.1 augustss
1118 1.1 augustss /* Add bulk QH, called at splusb(). */
1119 1.1 augustss void
1120 1.119 augustss uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1121 1.1 augustss {
1122 1.42 augustss uhci_soft_qh_t *eqh;
1123 1.1 augustss
1124 1.52 augustss SPLUSBCHECK;
1125 1.52 augustss
1126 1.1 augustss DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
1127 1.42 augustss eqh = sc->sc_bulk_end;
1128 1.42 augustss sqh->hlink = eqh->hlink;
1129 1.42 augustss sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1130 1.42 augustss eqh->hlink = sqh;
1131 1.121 augustss eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
1132 1.1 augustss sc->sc_bulk_end = sqh;
1133 1.123 augustss uhci_add_loop(sc);
1134 1.1 augustss }
1135 1.1 augustss
1136 1.1 augustss /* Remove bulk QH, called at splusb(). */
1137 1.1 augustss void
1138 1.119 augustss uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1139 1.1 augustss {
1140 1.1 augustss uhci_soft_qh_t *pqh;
1141 1.1 augustss
1142 1.52 augustss SPLUSBCHECK;
1143 1.52 augustss
1144 1.1 augustss DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
1145 1.123 augustss uhci_rem_loop(sc);
1146 1.124 augustss /* See comment in uhci_remove_hs_ctrl() */
1147 1.124 augustss if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1148 1.124 augustss sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1149 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
1150 1.124 augustss }
1151 1.92 augustss pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh);
1152 1.42 augustss pqh->hlink = sqh->hlink;
1153 1.42 augustss pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1154 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
1155 1.1 augustss if (sc->sc_bulk_end == sqh)
1156 1.1 augustss sc->sc_bulk_end = pqh;
1157 1.1 augustss }
1158 1.1 augustss
1159 1.141 augustss Static int uhci_intr1(uhci_softc_t *);
1160 1.141 augustss
1161 1.1 augustss int
1162 1.119 augustss uhci_intr(void *arg)
1163 1.1 augustss {
1164 1.44 augustss uhci_softc_t *sc = arg;
1165 1.141 augustss
1166 1.141 augustss DPRINTFN(15,("uhci_intr: real interrupt\n"));
1167 1.141 augustss if (sc->sc_bus.use_polling) {
1168 1.141 augustss #ifdef DIAGNOSTIC
1169 1.141 augustss printf("uhci_intr: ignored interrupt while polling\n");
1170 1.141 augustss #endif
1171 1.141 augustss return (0);
1172 1.141 augustss }
1173 1.141 augustss return (uhci_intr1(sc));
1174 1.141 augustss }
1175 1.141 augustss
1176 1.141 augustss int
1177 1.141 augustss uhci_intr1(uhci_softc_t *sc)
1178 1.141 augustss {
1179 1.44 augustss int status;
1180 1.44 augustss int ack;
1181 1.1 augustss
1182 1.67 augustss #ifdef UHCI_DEBUG
1183 1.44 augustss if (uhcidebug > 15) {
1184 1.141 augustss DPRINTF(("%s: uhci_intr1\n", USBDEVNAME(sc->sc_bus.bdev)));
1185 1.1 augustss uhci_dumpregs(sc);
1186 1.1 augustss }
1187 1.1 augustss #endif
1188 1.117 augustss
1189 1.127 soren status = UREAD2(sc, UHCI_STS);
1190 1.127 soren if (status == 0) /* The interrupt was not for us. */
1191 1.127 soren return (0);
1192 1.127 soren
1193 1.138 pooka #if defined(DIAGNOSTIC) && defined(__NetBSD__)
1194 1.138 pooka if (sc->sc_suspend != PWR_RESUME)
1195 1.138 pooka printf("uhci_intr: suspended sts=0x%x\n", status);
1196 1.138 pooka #endif
1197 1.138 pooka
1198 1.117 augustss if (sc->sc_suspend != PWR_RESUME) {
1199 1.117 augustss printf("%s: interrupt while not operating ignored\n",
1200 1.117 augustss USBDEVNAME(sc->sc_bus.bdev));
1201 1.134 augustss UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */
1202 1.117 augustss return (0);
1203 1.117 augustss }
1204 1.44 augustss
1205 1.44 augustss ack = 0;
1206 1.44 augustss if (status & UHCI_STS_USBINT)
1207 1.44 augustss ack |= UHCI_STS_USBINT;
1208 1.44 augustss if (status & UHCI_STS_USBEI)
1209 1.44 augustss ack |= UHCI_STS_USBEI;
1210 1.1 augustss if (status & UHCI_STS_RD) {
1211 1.44 augustss ack |= UHCI_STS_RD;
1212 1.118 augustss #ifdef UHCI_DEBUG
1213 1.46 augustss printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
1214 1.118 augustss #endif
1215 1.1 augustss }
1216 1.1 augustss if (status & UHCI_STS_HSE) {
1217 1.44 augustss ack |= UHCI_STS_HSE;
1218 1.81 augustss printf("%s: host system error\n", USBDEVNAME(sc->sc_bus.bdev));
1219 1.1 augustss }
1220 1.1 augustss if (status & UHCI_STS_HCPE) {
1221 1.44 augustss ack |= UHCI_STS_HCPE;
1222 1.81 augustss printf("%s: host controller process error\n",
1223 1.81 augustss USBDEVNAME(sc->sc_bus.bdev));
1224 1.44 augustss }
1225 1.44 augustss if (status & UHCI_STS_HCH) {
1226 1.44 augustss /* no acknowledge needed */
1227 1.136 augustss if (!sc->sc_dying) {
1228 1.129 augustss printf("%s: host controller halted\n",
1229 1.129 augustss USBDEVNAME(sc->sc_bus.bdev));
1230 1.110 augustss #ifdef UHCI_DEBUG
1231 1.136 augustss uhci_dump_all(sc);
1232 1.110 augustss #endif
1233 1.136 augustss }
1234 1.136 augustss sc->sc_dying = 1;
1235 1.1 augustss }
1236 1.44 augustss
1237 1.132 augustss if (!ack)
1238 1.132 augustss return (0); /* nothing to acknowledge */
1239 1.132 augustss UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */
1240 1.1 augustss
1241 1.85 augustss sc->sc_bus.no_intrs++;
1242 1.85 augustss usb_schedsoftintr(&sc->sc_bus);
1243 1.85 augustss
1244 1.85 augustss DPRINTFN(10, ("%s: uhci_intr: exit\n", USBDEVNAME(sc->sc_bus.bdev)));
1245 1.85 augustss
1246 1.85 augustss return (1);
1247 1.85 augustss }
1248 1.85 augustss
1249 1.85 augustss void
1250 1.133 augustss uhci_softintr(void *v)
1251 1.85 augustss {
1252 1.133 augustss uhci_softc_t *sc = v;
1253 1.85 augustss uhci_intr_info_t *ii;
1254 1.85 augustss
1255 1.140 augustss DPRINTFN(10,("%s: uhci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev),
1256 1.140 augustss sc->sc_bus.intr_context));
1257 1.85 augustss
1258 1.51 augustss sc->sc_bus.intr_context++;
1259 1.50 augustss
1260 1.1 augustss /*
1261 1.1 augustss * Interrupts on UHCI really suck. When the host controller
1262 1.1 augustss * interrupts because a transfer is completed there is no
1263 1.1 augustss * way of knowing which transfer it was. You can scan down
1264 1.1 augustss * the TDs and QHs of the previous frame to limit the search,
1265 1.1 augustss * but that assumes that the interrupt was not delayed by more
1266 1.1 augustss * than 1 ms, which may not always be true (e.g. after debug
1267 1.1 augustss * output on a slow console).
1268 1.1 augustss * We scan all interrupt descriptors to see if any have
1269 1.1 augustss * completed.
1270 1.1 augustss */
1271 1.1 augustss for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
1272 1.1 augustss uhci_check_intr(sc, ii);
1273 1.1 augustss
1274 1.51 augustss sc->sc_bus.intr_context--;
1275 1.1 augustss }
1276 1.1 augustss
1277 1.1 augustss /* Check for an interrupt. */
1278 1.1 augustss void
1279 1.119 augustss uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii)
1280 1.1 augustss {
1281 1.1 augustss uhci_soft_td_t *std, *lstd;
1282 1.18 augustss u_int32_t status;
1283 1.1 augustss
1284 1.1 augustss DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
1285 1.1 augustss #ifdef DIAGNOSTIC
1286 1.63 augustss if (ii == NULL) {
1287 1.1 augustss printf("uhci_check_intr: no ii? %p\n", ii);
1288 1.1 augustss return;
1289 1.1 augustss }
1290 1.1 augustss #endif
1291 1.63 augustss if (ii->stdstart == NULL)
1292 1.1 augustss return;
1293 1.1 augustss lstd = ii->stdend;
1294 1.1 augustss #ifdef DIAGNOSTIC
1295 1.63 augustss if (lstd == NULL) {
1296 1.1 augustss printf("uhci_check_intr: std==0\n");
1297 1.1 augustss return;
1298 1.1 augustss }
1299 1.1 augustss #endif
1300 1.26 augustss /*
1301 1.26 augustss * If the last TD is still active we need to check whether there
1302 1.26 augustss * is a an error somewhere in the middle, or whether there was a
1303 1.26 augustss * short packet (SPD and not ACTIVE).
1304 1.26 augustss */
1305 1.88 tsutsui if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) {
1306 1.92 augustss DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii));
1307 1.48 augustss for (std = ii->stdstart; std != lstd; std = std->link.std) {
1308 1.88 tsutsui status = le32toh(std->td.td_status);
1309 1.83 augustss /* If there's an active TD the xfer isn't done. */
1310 1.83 augustss if (status & UHCI_TD_ACTIVE)
1311 1.83 augustss break;
1312 1.83 augustss /* Any kind of error makes the xfer done. */
1313 1.83 augustss if (status & UHCI_TD_STALLED)
1314 1.83 augustss goto done;
1315 1.83 augustss /* We want short packets, and it is short: it's done */
1316 1.83 augustss if ((status & UHCI_TD_SPD) &&
1317 1.83 augustss UHCI_TD_GET_ACTLEN(status) <
1318 1.88 tsutsui UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)))
1319 1.1 augustss goto done;
1320 1.18 augustss }
1321 1.92 augustss DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n",
1322 1.18 augustss ii, ii->stdstart));
1323 1.1 augustss return;
1324 1.1 augustss }
1325 1.1 augustss done:
1326 1.92 augustss DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii));
1327 1.96 augustss usb_uncallout(ii->xfer->timeout_handle, uhci_timeout, ii);
1328 1.36 augustss uhci_idone(ii);
1329 1.1 augustss }
1330 1.1 augustss
1331 1.52 augustss /* Called at splusb() */
1332 1.1 augustss void
1333 1.119 augustss uhci_idone(uhci_intr_info_t *ii)
1334 1.1 augustss {
1335 1.63 augustss usbd_xfer_handle xfer = ii->xfer;
1336 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1337 1.1 augustss uhci_soft_td_t *std;
1338 1.67 augustss u_int32_t status = 0, nstatus;
1339 1.26 augustss int actlen;
1340 1.1 augustss
1341 1.140 augustss DPRINTFN(12, ("uhci_idone: ii=%p\n", ii));
1342 1.7 augustss #ifdef DIAGNOSTIC
1343 1.7 augustss {
1344 1.7 augustss int s = splhigh();
1345 1.7 augustss if (ii->isdone) {
1346 1.26 augustss splx(s);
1347 1.92 augustss #ifdef UHCI_DEBUG
1348 1.92 augustss printf("uhci_idone: ii is done!\n ");
1349 1.92 augustss uhci_dump_ii(ii);
1350 1.92 augustss #else
1351 1.36 augustss printf("uhci_idone: ii=%p is done!\n", ii);
1352 1.92 augustss #endif
1353 1.7 augustss return;
1354 1.7 augustss }
1355 1.7 augustss ii->isdone = 1;
1356 1.7 augustss splx(s);
1357 1.7 augustss }
1358 1.7 augustss #endif
1359 1.1 augustss
1360 1.63 augustss if (xfer->status == USBD_CANCELLED ||
1361 1.63 augustss xfer->status == USBD_TIMEOUT) {
1362 1.63 augustss DPRINTF(("uhci_idone: aborted xfer=%p\n", xfer));
1363 1.48 augustss return;
1364 1.48 augustss }
1365 1.48 augustss
1366 1.63 augustss if (xfer->nframes != 0) {
1367 1.48 augustss /* Isoc transfer, do things differently. */
1368 1.48 augustss uhci_soft_td_t **stds = upipe->u.iso.stds;
1369 1.126 augustss int i, n, nframes, len;
1370 1.48 augustss
1371 1.48 augustss DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii));
1372 1.48 augustss
1373 1.63 augustss nframes = xfer->nframes;
1374 1.48 augustss actlen = 0;
1375 1.92 augustss n = UXFER(xfer)->curframe;
1376 1.48 augustss for (i = 0; i < nframes; i++) {
1377 1.48 augustss std = stds[n];
1378 1.59 augustss #ifdef UHCI_DEBUG
1379 1.48 augustss if (uhcidebug > 5) {
1380 1.48 augustss DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i));
1381 1.48 augustss uhci_dump_td(std);
1382 1.48 augustss }
1383 1.48 augustss #endif
1384 1.48 augustss if (++n >= UHCI_VFRAMELIST_COUNT)
1385 1.48 augustss n = 0;
1386 1.88 tsutsui status = le32toh(std->td.td_status);
1387 1.126 augustss len = UHCI_TD_GET_ACTLEN(status);
1388 1.126 augustss xfer->frlengths[i] = len;
1389 1.126 augustss actlen += len;
1390 1.48 augustss }
1391 1.48 augustss upipe->u.iso.inuse -= nframes;
1392 1.63 augustss xfer->actlen = actlen;
1393 1.63 augustss xfer->status = USBD_NORMAL_COMPLETION;
1394 1.140 augustss goto end;
1395 1.48 augustss }
1396 1.48 augustss
1397 1.59 augustss #ifdef UHCI_DEBUG
1398 1.65 augustss DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n",
1399 1.65 augustss ii, xfer, upipe));
1400 1.48 augustss if (uhcidebug > 10)
1401 1.48 augustss uhci_dump_tds(ii->stdstart);
1402 1.48 augustss #endif
1403 1.48 augustss
1404 1.26 augustss /* The transfer is done, compute actual length and status. */
1405 1.26 augustss actlen = 0;
1406 1.63 augustss for (std = ii->stdstart; std != NULL; std = std->link.std) {
1407 1.88 tsutsui nstatus = le32toh(std->td.td_status);
1408 1.64 augustss if (nstatus & UHCI_TD_ACTIVE)
1409 1.26 augustss break;
1410 1.67 augustss
1411 1.64 augustss status = nstatus;
1412 1.88 tsutsui if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) !=
1413 1.88 tsutsui UHCI_TD_PID_SETUP)
1414 1.26 augustss actlen += UHCI_TD_GET_ACTLEN(status);
1415 1.1 augustss }
1416 1.38 augustss /* If there are left over TDs we need to update the toggle. */
1417 1.63 augustss if (std != NULL)
1418 1.88 tsutsui upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token));
1419 1.38 augustss
1420 1.1 augustss status &= UHCI_TD_ERROR;
1421 1.140 augustss DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n",
1422 1.26 augustss actlen, status));
1423 1.63 augustss xfer->actlen = actlen;
1424 1.1 augustss if (status != 0) {
1425 1.122 tv #ifdef UHCI_DEBUG
1426 1.122 tv char sbuf[128];
1427 1.122 tv
1428 1.122 tv bitmask_snprintf((int)status, "\20\22BITSTUFF\23CRCTO\24NAK\25"
1429 1.122 tv "BABBLE\26DBUFFER\27STALLED\30ACTIVE",
1430 1.122 tv sbuf, sizeof(sbuf));
1431 1.122 tv
1432 1.75 augustss DPRINTFN((status == UHCI_TD_STALLED)*10,
1433 1.36 augustss ("uhci_idone: error, addr=%d, endpt=0x%02x, "
1434 1.122 tv "status 0x%s\n",
1435 1.63 augustss xfer->pipe->device->address,
1436 1.63 augustss xfer->pipe->endpoint->edesc->bEndpointAddress,
1437 1.122 tv sbuf));
1438 1.122 tv #endif
1439 1.122 tv
1440 1.1 augustss if (status == UHCI_TD_STALLED)
1441 1.63 augustss xfer->status = USBD_STALLED;
1442 1.1 augustss else
1443 1.63 augustss xfer->status = USBD_IOERROR; /* more info XXX */
1444 1.1 augustss } else {
1445 1.63 augustss xfer->status = USBD_NORMAL_COMPLETION;
1446 1.1 augustss }
1447 1.140 augustss
1448 1.140 augustss end:
1449 1.63 augustss usb_transfer_complete(xfer);
1450 1.140 augustss DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii));
1451 1.1 augustss }
1452 1.1 augustss
1453 1.13 augustss /*
1454 1.13 augustss * Called when a request does not complete.
1455 1.13 augustss */
1456 1.1 augustss void
1457 1.119 augustss uhci_timeout(void *addr)
1458 1.1 augustss {
1459 1.1 augustss uhci_intr_info_t *ii = addr;
1460 1.1 augustss
1461 1.1 augustss DPRINTF(("uhci_timeout: ii=%p\n", ii));
1462 1.51 augustss
1463 1.67 augustss #ifdef UHCI_DEBUG
1464 1.67 augustss if (uhcidebug > 10)
1465 1.67 augustss uhci_dump_tds(ii->stdstart);
1466 1.67 augustss #endif
1467 1.67 augustss
1468 1.63 augustss ii->xfer->device->bus->intr_context++;
1469 1.66 augustss uhci_abort_xfer(ii->xfer, USBD_TIMEOUT);
1470 1.63 augustss ii->xfer->device->bus->intr_context--;
1471 1.1 augustss }
1472 1.1 augustss
1473 1.1 augustss /*
1474 1.1 augustss * Wait here until controller claims to have an interrupt.
1475 1.1 augustss * Then call uhci_intr and return. Use timeout to avoid waiting
1476 1.1 augustss * too long.
1477 1.13 augustss * Only used during boot when interrupts are not enabled yet.
1478 1.1 augustss */
1479 1.1 augustss void
1480 1.119 augustss uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer)
1481 1.1 augustss {
1482 1.63 augustss int timo = xfer->timeout;
1483 1.13 augustss uhci_intr_info_t *ii;
1484 1.13 augustss
1485 1.26 augustss DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
1486 1.1 augustss
1487 1.63 augustss xfer->status = USBD_IN_PROGRESS;
1488 1.26 augustss for (; timo >= 0; timo--) {
1489 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1490 1.26 augustss DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
1491 1.1 augustss if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
1492 1.141 augustss uhci_intr1(sc);
1493 1.63 augustss if (xfer->status != USBD_IN_PROGRESS)
1494 1.1 augustss return;
1495 1.1 augustss }
1496 1.1 augustss }
1497 1.13 augustss
1498 1.13 augustss /* Timeout */
1499 1.13 augustss DPRINTF(("uhci_waitintr: timeout\n"));
1500 1.13 augustss for (ii = LIST_FIRST(&sc->sc_intrhead);
1501 1.63 augustss ii != NULL && ii->xfer != xfer;
1502 1.13 augustss ii = LIST_NEXT(ii, list))
1503 1.13 augustss ;
1504 1.41 augustss #ifdef DIAGNOSTIC
1505 1.63 augustss if (ii == NULL)
1506 1.13 augustss panic("uhci_waitintr: lost intr_info\n");
1507 1.41 augustss #endif
1508 1.41 augustss uhci_idone(ii);
1509 1.1 augustss }
1510 1.1 augustss
1511 1.8 augustss void
1512 1.119 augustss uhci_poll(struct usbd_bus *bus)
1513 1.8 augustss {
1514 1.8 augustss uhci_softc_t *sc = (uhci_softc_t *)bus;
1515 1.8 augustss
1516 1.8 augustss if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT)
1517 1.141 augustss uhci_intr1(sc);
1518 1.8 augustss }
1519 1.8 augustss
1520 1.1 augustss void
1521 1.119 augustss uhci_reset(uhci_softc_t *sc)
1522 1.1 augustss {
1523 1.1 augustss int n;
1524 1.1 augustss
1525 1.1 augustss UHCICMD(sc, UHCI_CMD_HCRESET);
1526 1.1 augustss /* The reset bit goes low when the controller is done. */
1527 1.1 augustss for (n = 0; n < UHCI_RESET_TIMEOUT &&
1528 1.1 augustss (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
1529 1.92 augustss usb_delay_ms(&sc->sc_bus, 1);
1530 1.1 augustss if (n >= UHCI_RESET_TIMEOUT)
1531 1.13 augustss printf("%s: controller did not reset\n",
1532 1.13 augustss USBDEVNAME(sc->sc_bus.bdev));
1533 1.1 augustss }
1534 1.1 augustss
1535 1.16 augustss usbd_status
1536 1.119 augustss uhci_run(uhci_softc_t *sc, int run)
1537 1.1 augustss {
1538 1.1 augustss int s, n, running;
1539 1.71 augustss u_int16_t cmd;
1540 1.1 augustss
1541 1.1 augustss run = run != 0;
1542 1.132 augustss s = splhardusb();
1543 1.30 augustss DPRINTF(("uhci_run: setting run=%d\n", run));
1544 1.71 augustss cmd = UREAD2(sc, UHCI_CMD);
1545 1.71 augustss if (run)
1546 1.71 augustss cmd |= UHCI_CMD_RS;
1547 1.71 augustss else
1548 1.71 augustss cmd &= ~UHCI_CMD_RS;
1549 1.71 augustss UHCICMD(sc, cmd);
1550 1.13 augustss for(n = 0; n < 10; n++) {
1551 1.1 augustss running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
1552 1.1 augustss /* return when we've entered the state we want */
1553 1.1 augustss if (run == running) {
1554 1.1 augustss splx(s);
1555 1.30 augustss DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
1556 1.30 augustss UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
1557 1.16 augustss return (USBD_NORMAL_COMPLETION);
1558 1.1 augustss }
1559 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1560 1.1 augustss }
1561 1.1 augustss splx(s);
1562 1.13 augustss printf("%s: cannot %s\n", USBDEVNAME(sc->sc_bus.bdev),
1563 1.14 augustss run ? "start" : "stop");
1564 1.16 augustss return (USBD_IOERROR);
1565 1.1 augustss }
1566 1.1 augustss
1567 1.1 augustss /*
1568 1.1 augustss * Memory management routines.
1569 1.1 augustss * uhci_alloc_std allocates TDs
1570 1.1 augustss * uhci_alloc_sqh allocates QHs
1571 1.7 augustss * These two routines do their own free list management,
1572 1.1 augustss * partly for speed, partly because allocating DMAable memory
1573 1.1 augustss * has page size granularaity so much memory would be wasted if
1574 1.16 augustss * only one TD/QH (32 bytes) was placed in each allocated chunk.
1575 1.1 augustss */
1576 1.1 augustss
1577 1.1 augustss uhci_soft_td_t *
1578 1.119 augustss uhci_alloc_std(uhci_softc_t *sc)
1579 1.1 augustss {
1580 1.1 augustss uhci_soft_td_t *std;
1581 1.63 augustss usbd_status err;
1582 1.42 augustss int i, offs;
1583 1.7 augustss usb_dma_t dma;
1584 1.1 augustss
1585 1.63 augustss if (sc->sc_freetds == NULL) {
1586 1.1 augustss DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
1587 1.63 augustss err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK,
1588 1.63 augustss UHCI_TD_ALIGN, &dma);
1589 1.63 augustss if (err)
1590 1.16 augustss return (0);
1591 1.43 augustss for(i = 0; i < UHCI_STD_CHUNK; i++) {
1592 1.42 augustss offs = i * UHCI_STD_SIZE;
1593 1.42 augustss std = (uhci_soft_td_t *)((char *)KERNADDR(&dma) +offs);
1594 1.42 augustss std->physaddr = DMAADDR(&dma) + offs;
1595 1.42 augustss std->link.std = sc->sc_freetds;
1596 1.1 augustss sc->sc_freetds = std;
1597 1.1 augustss }
1598 1.1 augustss }
1599 1.1 augustss std = sc->sc_freetds;
1600 1.42 augustss sc->sc_freetds = std->link.std;
1601 1.42 augustss memset(&std->td, 0, sizeof(uhci_td_t));
1602 1.1 augustss return std;
1603 1.1 augustss }
1604 1.1 augustss
1605 1.1 augustss void
1606 1.119 augustss uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std)
1607 1.1 augustss {
1608 1.7 augustss #ifdef DIAGNOSTIC
1609 1.7 augustss #define TD_IS_FREE 0x12345678
1610 1.88 tsutsui if (le32toh(std->td.td_token) == TD_IS_FREE) {
1611 1.7 augustss printf("uhci_free_std: freeing free TD %p\n", std);
1612 1.7 augustss return;
1613 1.7 augustss }
1614 1.88 tsutsui std->td.td_token = htole32(TD_IS_FREE);
1615 1.7 augustss #endif
1616 1.42 augustss std->link.std = sc->sc_freetds;
1617 1.1 augustss sc->sc_freetds = std;
1618 1.1 augustss }
1619 1.1 augustss
1620 1.1 augustss uhci_soft_qh_t *
1621 1.119 augustss uhci_alloc_sqh(uhci_softc_t *sc)
1622 1.1 augustss {
1623 1.1 augustss uhci_soft_qh_t *sqh;
1624 1.63 augustss usbd_status err;
1625 1.1 augustss int i, offs;
1626 1.7 augustss usb_dma_t dma;
1627 1.1 augustss
1628 1.63 augustss if (sc->sc_freeqhs == NULL) {
1629 1.1 augustss DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
1630 1.63 augustss err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK,
1631 1.63 augustss UHCI_QH_ALIGN, &dma);
1632 1.63 augustss if (err)
1633 1.63 augustss return (0);
1634 1.43 augustss for(i = 0; i < UHCI_SQH_CHUNK; i++) {
1635 1.42 augustss offs = i * UHCI_SQH_SIZE;
1636 1.42 augustss sqh = (uhci_soft_qh_t *)((char *)KERNADDR(&dma) +offs);
1637 1.1 augustss sqh->physaddr = DMAADDR(&dma) + offs;
1638 1.42 augustss sqh->hlink = sc->sc_freeqhs;
1639 1.1 augustss sc->sc_freeqhs = sqh;
1640 1.1 augustss }
1641 1.1 augustss }
1642 1.1 augustss sqh = sc->sc_freeqhs;
1643 1.42 augustss sc->sc_freeqhs = sqh->hlink;
1644 1.42 augustss memset(&sqh->qh, 0, sizeof(uhci_qh_t));
1645 1.16 augustss return (sqh);
1646 1.1 augustss }
1647 1.1 augustss
1648 1.1 augustss void
1649 1.119 augustss uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1650 1.1 augustss {
1651 1.42 augustss sqh->hlink = sc->sc_freeqhs;
1652 1.1 augustss sc->sc_freeqhs = sqh;
1653 1.1 augustss }
1654 1.1 augustss
1655 1.1 augustss void
1656 1.119 augustss uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std,
1657 1.119 augustss uhci_soft_td_t *stdend)
1658 1.1 augustss {
1659 1.1 augustss uhci_soft_td_t *p;
1660 1.1 augustss
1661 1.1 augustss for (; std != stdend; std = p) {
1662 1.42 augustss p = std->link.std;
1663 1.1 augustss uhci_free_std(sc, std);
1664 1.1 augustss }
1665 1.1 augustss }
1666 1.1 augustss
1667 1.1 augustss usbd_status
1668 1.119 augustss uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len,
1669 1.119 augustss int rd, u_int16_t flags, usb_dma_t *dma,
1670 1.119 augustss uhci_soft_td_t **sp, uhci_soft_td_t **ep)
1671 1.1 augustss {
1672 1.1 augustss uhci_soft_td_t *p, *lastp;
1673 1.1 augustss uhci_physaddr_t lastlink;
1674 1.1 augustss int i, ntd, l, tog, maxp;
1675 1.18 augustss u_int32_t status;
1676 1.1 augustss int addr = upipe->pipe.device->address;
1677 1.1 augustss int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1678 1.1 augustss
1679 1.33 augustss DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d ls=%d "
1680 1.73 augustss "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len,
1681 1.73 augustss upipe->pipe.device->lowspeed, flags));
1682 1.4 augustss maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
1683 1.1 augustss if (maxp == 0) {
1684 1.1 augustss printf("uhci_alloc_std_chain: maxp=0\n");
1685 1.1 augustss return (USBD_INVAL);
1686 1.1 augustss }
1687 1.1 augustss ntd = (len + maxp - 1) / maxp;
1688 1.73 augustss if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0)
1689 1.73 augustss ntd++;
1690 1.39 augustss DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd));
1691 1.73 augustss if (ntd == 0) {
1692 1.73 augustss *sp = *ep = 0;
1693 1.73 augustss DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n"));
1694 1.73 augustss return (USBD_NORMAL_COMPLETION);
1695 1.73 augustss }
1696 1.38 augustss tog = upipe->nexttoggle;
1697 1.1 augustss if (ntd % 2 == 0)
1698 1.1 augustss tog ^= 1;
1699 1.32 augustss upipe->nexttoggle = tog ^ 1;
1700 1.121 augustss lastp = NULL;
1701 1.1 augustss lastlink = UHCI_PTR_T;
1702 1.1 augustss ntd--;
1703 1.33 augustss status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
1704 1.18 augustss if (upipe->pipe.device->lowspeed)
1705 1.18 augustss status |= UHCI_TD_LS;
1706 1.73 augustss if (flags & USBD_SHORT_XFER_OK)
1707 1.18 augustss status |= UHCI_TD_SPD;
1708 1.1 augustss for (i = ntd; i >= 0; i--) {
1709 1.1 augustss p = uhci_alloc_std(sc);
1710 1.63 augustss if (p == NULL) {
1711 1.1 augustss uhci_free_std_chain(sc, lastp, 0);
1712 1.1 augustss return (USBD_NOMEM);
1713 1.1 augustss }
1714 1.42 augustss p->link.std = lastp;
1715 1.121 augustss p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD);
1716 1.1 augustss lastp = p;
1717 1.1 augustss lastlink = p->physaddr;
1718 1.88 tsutsui p->td.td_status = htole32(status);
1719 1.1 augustss if (i == ntd) {
1720 1.1 augustss /* last TD */
1721 1.1 augustss l = len % maxp;
1722 1.73 augustss if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER))
1723 1.73 augustss l = maxp;
1724 1.1 augustss *ep = p;
1725 1.1 augustss } else
1726 1.1 augustss l = maxp;
1727 1.42 augustss p->td.td_token =
1728 1.88 tsutsui htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) :
1729 1.88 tsutsui UHCI_TD_OUT(l, endpt, addr, tog));
1730 1.88 tsutsui p->td.td_buffer = htole32(DMAADDR(dma) + i * maxp);
1731 1.1 augustss tog ^= 1;
1732 1.1 augustss }
1733 1.1 augustss *sp = lastp;
1734 1.38 augustss DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n",
1735 1.38 augustss upipe->nexttoggle));
1736 1.1 augustss return (USBD_NORMAL_COMPLETION);
1737 1.1 augustss }
1738 1.1 augustss
1739 1.38 augustss void
1740 1.119 augustss uhci_device_clear_toggle(usbd_pipe_handle pipe)
1741 1.38 augustss {
1742 1.38 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1743 1.38 augustss upipe->nexttoggle = 0;
1744 1.38 augustss }
1745 1.38 augustss
1746 1.38 augustss void
1747 1.119 augustss uhci_noop(usbd_pipe_handle pipe)
1748 1.38 augustss {
1749 1.38 augustss }
1750 1.38 augustss
1751 1.1 augustss usbd_status
1752 1.119 augustss uhci_device_bulk_transfer(usbd_xfer_handle xfer)
1753 1.1 augustss {
1754 1.63 augustss usbd_status err;
1755 1.16 augustss
1756 1.52 augustss /* Insert last in queue. */
1757 1.63 augustss err = usb_insert_transfer(xfer);
1758 1.63 augustss if (err)
1759 1.63 augustss return (err);
1760 1.52 augustss
1761 1.92 augustss /*
1762 1.92 augustss * Pipe isn't running (otherwise err would be USBD_INPROG),
1763 1.92 augustss * so start it first.
1764 1.67 augustss */
1765 1.63 augustss return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1766 1.16 augustss }
1767 1.16 augustss
1768 1.16 augustss usbd_status
1769 1.119 augustss uhci_device_bulk_start(usbd_xfer_handle xfer)
1770 1.16 augustss {
1771 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1772 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
1773 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1774 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
1775 1.55 augustss uhci_soft_td_t *data, *dataend;
1776 1.1 augustss uhci_soft_qh_t *sqh;
1777 1.63 augustss usbd_status err;
1778 1.45 augustss int len, isread, endpt;
1779 1.1 augustss int s;
1780 1.1 augustss
1781 1.63 augustss DPRINTFN(3, ("uhci_device_bulk_transfer: xfer=%p len=%d flags=%d\n",
1782 1.63 augustss xfer, xfer->length, xfer->flags));
1783 1.1 augustss
1784 1.82 augustss if (sc->sc_dying)
1785 1.82 augustss return (USBD_IOERROR);
1786 1.82 augustss
1787 1.48 augustss #ifdef DIAGNOSTIC
1788 1.63 augustss if (xfer->rqflags & URQ_REQUEST)
1789 1.1 augustss panic("uhci_device_bulk_transfer: a request\n");
1790 1.48 augustss #endif
1791 1.1 augustss
1792 1.63 augustss len = xfer->length;
1793 1.102 augustss endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1794 1.45 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
1795 1.1 augustss sqh = upipe->u.bulk.sqh;
1796 1.1 augustss
1797 1.1 augustss upipe->u.bulk.isread = isread;
1798 1.1 augustss upipe->u.bulk.length = len;
1799 1.1 augustss
1800 1.73 augustss err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
1801 1.73 augustss &xfer->dmabuf, &data, &dataend);
1802 1.63 augustss if (err)
1803 1.63 augustss return (err);
1804 1.88 tsutsui dataend->td.td_status |= htole32(UHCI_TD_IOC);
1805 1.1 augustss
1806 1.59 augustss #ifdef UHCI_DEBUG
1807 1.33 augustss if (uhcidebug > 8) {
1808 1.55 augustss DPRINTF(("uhci_device_bulk_transfer: data(1)\n"));
1809 1.55 augustss uhci_dump_tds(data);
1810 1.1 augustss }
1811 1.1 augustss #endif
1812 1.1 augustss
1813 1.1 augustss /* Set up interrupt info. */
1814 1.63 augustss ii->xfer = xfer;
1815 1.55 augustss ii->stdstart = data;
1816 1.55 augustss ii->stdend = dataend;
1817 1.7 augustss #ifdef DIAGNOSTIC
1818 1.70 augustss if (!ii->isdone) {
1819 1.70 augustss printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii);
1820 1.70 augustss }
1821 1.7 augustss ii->isdone = 0;
1822 1.7 augustss #endif
1823 1.1 augustss
1824 1.55 augustss sqh->elink = data;
1825 1.121 augustss sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
1826 1.1 augustss
1827 1.1 augustss s = splusb();
1828 1.1 augustss uhci_add_bulk(sc, sqh);
1829 1.92 augustss uhci_add_intr_info(sc, ii);
1830 1.1 augustss
1831 1.63 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
1832 1.96 augustss usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
1833 1.91 augustss uhci_timeout, ii);
1834 1.13 augustss }
1835 1.92 augustss xfer->status = USBD_IN_PROGRESS;
1836 1.1 augustss splx(s);
1837 1.1 augustss
1838 1.59 augustss #ifdef UHCI_DEBUG
1839 1.1 augustss if (uhcidebug > 10) {
1840 1.55 augustss DPRINTF(("uhci_device_bulk_transfer: data(2)\n"));
1841 1.55 augustss uhci_dump_tds(data);
1842 1.1 augustss }
1843 1.1 augustss #endif
1844 1.1 augustss
1845 1.26 augustss if (sc->sc_bus.use_polling)
1846 1.63 augustss uhci_waitintr(sc, xfer);
1847 1.26 augustss
1848 1.1 augustss return (USBD_IN_PROGRESS);
1849 1.1 augustss }
1850 1.1 augustss
1851 1.1 augustss /* Abort a device bulk request. */
1852 1.1 augustss void
1853 1.119 augustss uhci_device_bulk_abort(usbd_xfer_handle xfer)
1854 1.1 augustss {
1855 1.33 augustss DPRINTF(("uhci_device_bulk_abort:\n"));
1856 1.66 augustss uhci_abort_xfer(xfer, USBD_CANCELLED);
1857 1.33 augustss }
1858 1.33 augustss
1859 1.92 augustss /*
1860 1.106 augustss * XXX This way of aborting is neither safe, nor good.
1861 1.106 augustss * But it will have to do until I figure out what to do.
1862 1.106 augustss * I apologize for the delay().
1863 1.92 augustss */
1864 1.33 augustss void
1865 1.119 augustss uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
1866 1.33 augustss {
1867 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
1868 1.33 augustss uhci_soft_td_t *std;
1869 1.92 augustss int s;
1870 1.65 augustss
1871 1.106 augustss DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status));
1872 1.33 augustss
1873 1.92 augustss s = splusb();
1874 1.92 augustss
1875 1.92 augustss /* Transfer is already done. */
1876 1.92 augustss if (xfer->status != USBD_NOT_STARTED &&
1877 1.92 augustss xfer->status != USBD_IN_PROGRESS) {
1878 1.92 augustss splx(s);
1879 1.92 augustss return;
1880 1.92 augustss }
1881 1.92 augustss
1882 1.106 augustss /* Make interrupt routine ignore it, */
1883 1.63 augustss xfer->status = status;
1884 1.41 augustss
1885 1.106 augustss /* don't timeout, */
1886 1.106 augustss usb_uncallout(xfer->timeout_handle, uhci_timeout, ii);
1887 1.92 augustss
1888 1.106 augustss /* make hardware ignore it, */
1889 1.106 augustss for (std = ii->stdstart; std != NULL; std = std->link.std)
1890 1.92 augustss std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
1891 1.92 augustss
1892 1.106 augustss xfer->hcpriv = ii;
1893 1.96 augustss
1894 1.92 augustss splx(s);
1895 1.92 augustss
1896 1.106 augustss delay(1000);
1897 1.92 augustss
1898 1.92 augustss s = splusb();
1899 1.100 augustss #ifdef DIAGNOSTIC
1900 1.106 augustss ii->isdone = 1;
1901 1.100 augustss #endif
1902 1.106 augustss usb_transfer_complete(xfer);
1903 1.33 augustss splx(s);
1904 1.1 augustss }
1905 1.1 augustss
1906 1.1 augustss /* Close a device bulk pipe. */
1907 1.1 augustss void
1908 1.119 augustss uhci_device_bulk_close(usbd_pipe_handle pipe)
1909 1.1 augustss {
1910 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1911 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
1912 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1913 1.1 augustss
1914 1.1 augustss uhci_free_sqh(sc, upipe->u.bulk.sqh);
1915 1.1 augustss }
1916 1.1 augustss
1917 1.1 augustss usbd_status
1918 1.119 augustss uhci_device_ctrl_transfer(usbd_xfer_handle xfer)
1919 1.1 augustss {
1920 1.63 augustss usbd_status err;
1921 1.16 augustss
1922 1.52 augustss /* Insert last in queue. */
1923 1.63 augustss err = usb_insert_transfer(xfer);
1924 1.63 augustss if (err)
1925 1.63 augustss return (err);
1926 1.52 augustss
1927 1.92 augustss /*
1928 1.92 augustss * Pipe isn't running (otherwise err would be USBD_INPROG),
1929 1.92 augustss * so start it first.
1930 1.67 augustss */
1931 1.63 augustss return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1932 1.16 augustss }
1933 1.16 augustss
1934 1.16 augustss usbd_status
1935 1.119 augustss uhci_device_ctrl_start(usbd_xfer_handle xfer)
1936 1.16 augustss {
1937 1.63 augustss uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
1938 1.63 augustss usbd_status err;
1939 1.1 augustss
1940 1.82 augustss if (sc->sc_dying)
1941 1.82 augustss return (USBD_IOERROR);
1942 1.82 augustss
1943 1.48 augustss #ifdef DIAGNOSTIC
1944 1.63 augustss if (!(xfer->rqflags & URQ_REQUEST))
1945 1.1 augustss panic("uhci_device_ctrl_transfer: not a request\n");
1946 1.48 augustss #endif
1947 1.1 augustss
1948 1.63 augustss err = uhci_device_request(xfer);
1949 1.63 augustss if (err)
1950 1.63 augustss return (err);
1951 1.1 augustss
1952 1.9 augustss if (sc->sc_bus.use_polling)
1953 1.63 augustss uhci_waitintr(sc, xfer);
1954 1.1 augustss return (USBD_IN_PROGRESS);
1955 1.1 augustss }
1956 1.1 augustss
1957 1.1 augustss usbd_status
1958 1.119 augustss uhci_device_intr_transfer(usbd_xfer_handle xfer)
1959 1.1 augustss {
1960 1.63 augustss usbd_status err;
1961 1.16 augustss
1962 1.52 augustss /* Insert last in queue. */
1963 1.63 augustss err = usb_insert_transfer(xfer);
1964 1.63 augustss if (err)
1965 1.63 augustss return (err);
1966 1.52 augustss
1967 1.92 augustss /*
1968 1.92 augustss * Pipe isn't running (otherwise err would be USBD_INPROG),
1969 1.92 augustss * so start it first.
1970 1.67 augustss */
1971 1.63 augustss return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1972 1.16 augustss }
1973 1.16 augustss
1974 1.16 augustss usbd_status
1975 1.119 augustss uhci_device_intr_start(usbd_xfer_handle xfer)
1976 1.16 augustss {
1977 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1978 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
1979 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1980 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
1981 1.55 augustss uhci_soft_td_t *data, *dataend;
1982 1.1 augustss uhci_soft_qh_t *sqh;
1983 1.63 augustss usbd_status err;
1984 1.49 augustss int i, s;
1985 1.1 augustss
1986 1.82 augustss if (sc->sc_dying)
1987 1.82 augustss return (USBD_IOERROR);
1988 1.82 augustss
1989 1.63 augustss DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n",
1990 1.63 augustss xfer, xfer->length, xfer->flags));
1991 1.1 augustss
1992 1.48 augustss #ifdef DIAGNOSTIC
1993 1.63 augustss if (xfer->rqflags & URQ_REQUEST)
1994 1.1 augustss panic("uhci_device_intr_transfer: a request\n");
1995 1.48 augustss #endif
1996 1.1 augustss
1997 1.73 augustss err = uhci_alloc_std_chain(upipe, sc, xfer->length, 1, xfer->flags,
1998 1.73 augustss &xfer->dmabuf, &data, &dataend);
1999 1.63 augustss if (err)
2000 1.63 augustss return (err);
2001 1.88 tsutsui dataend->td.td_status |= htole32(UHCI_TD_IOC);
2002 1.1 augustss
2003 1.59 augustss #ifdef UHCI_DEBUG
2004 1.1 augustss if (uhcidebug > 10) {
2005 1.55 augustss DPRINTF(("uhci_device_intr_transfer: data(1)\n"));
2006 1.55 augustss uhci_dump_tds(data);
2007 1.1 augustss uhci_dump_qh(upipe->u.intr.qhs[0]);
2008 1.1 augustss }
2009 1.1 augustss #endif
2010 1.1 augustss
2011 1.1 augustss s = splusb();
2012 1.1 augustss /* Set up interrupt info. */
2013 1.63 augustss ii->xfer = xfer;
2014 1.55 augustss ii->stdstart = data;
2015 1.55 augustss ii->stdend = dataend;
2016 1.7 augustss #ifdef DIAGNOSTIC
2017 1.70 augustss if (!ii->isdone) {
2018 1.70 augustss printf("uhci_device_intr_transfer: not done, ii=%p\n", ii);
2019 1.70 augustss }
2020 1.7 augustss ii->isdone = 0;
2021 1.7 augustss #endif
2022 1.1 augustss
2023 1.12 augustss DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
2024 1.12 augustss upipe->u.intr.qhs[0]));
2025 1.1 augustss for (i = 0; i < upipe->u.intr.npoll; i++) {
2026 1.1 augustss sqh = upipe->u.intr.qhs[i];
2027 1.55 augustss sqh->elink = data;
2028 1.121 augustss sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
2029 1.1 augustss }
2030 1.92 augustss uhci_add_intr_info(sc, ii);
2031 1.92 augustss xfer->status = USBD_IN_PROGRESS;
2032 1.1 augustss splx(s);
2033 1.1 augustss
2034 1.59 augustss #ifdef UHCI_DEBUG
2035 1.1 augustss if (uhcidebug > 10) {
2036 1.55 augustss DPRINTF(("uhci_device_intr_transfer: data(2)\n"));
2037 1.55 augustss uhci_dump_tds(data);
2038 1.1 augustss uhci_dump_qh(upipe->u.intr.qhs[0]);
2039 1.1 augustss }
2040 1.1 augustss #endif
2041 1.1 augustss
2042 1.1 augustss return (USBD_IN_PROGRESS);
2043 1.1 augustss }
2044 1.1 augustss
2045 1.1 augustss /* Abort a device control request. */
2046 1.1 augustss void
2047 1.119 augustss uhci_device_ctrl_abort(usbd_xfer_handle xfer)
2048 1.1 augustss {
2049 1.33 augustss DPRINTF(("uhci_device_ctrl_abort:\n"));
2050 1.66 augustss uhci_abort_xfer(xfer, USBD_CANCELLED);
2051 1.1 augustss }
2052 1.1 augustss
2053 1.1 augustss /* Close a device control pipe. */
2054 1.1 augustss void
2055 1.119 augustss uhci_device_ctrl_close(usbd_pipe_handle pipe)
2056 1.1 augustss {
2057 1.1 augustss }
2058 1.1 augustss
2059 1.1 augustss /* Abort a device interrupt request. */
2060 1.1 augustss void
2061 1.119 augustss uhci_device_intr_abort(usbd_xfer_handle xfer)
2062 1.1 augustss {
2063 1.63 augustss DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer));
2064 1.63 augustss if (xfer->pipe->intrxfer == xfer) {
2065 1.36 augustss DPRINTFN(1,("uhci_device_intr_abort: remove\n"));
2066 1.63 augustss xfer->pipe->intrxfer = 0;
2067 1.1 augustss }
2068 1.66 augustss uhci_abort_xfer(xfer, USBD_CANCELLED);
2069 1.1 augustss }
2070 1.1 augustss
2071 1.1 augustss /* Close a device interrupt pipe. */
2072 1.1 augustss void
2073 1.119 augustss uhci_device_intr_close(usbd_pipe_handle pipe)
2074 1.1 augustss {
2075 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2076 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2077 1.92 augustss int i, npoll;
2078 1.92 augustss int s;
2079 1.1 augustss
2080 1.1 augustss /* Unlink descriptors from controller data structures. */
2081 1.1 augustss npoll = upipe->u.intr.npoll;
2082 1.92 augustss s = splusb();
2083 1.1 augustss for (i = 0; i < npoll; i++)
2084 1.92 augustss uhci_remove_intr(sc, upipe->u.intr.qhs[i]);
2085 1.92 augustss splx(s);
2086 1.1 augustss
2087 1.1 augustss /*
2088 1.1 augustss * We now have to wait for any activity on the physical
2089 1.1 augustss * descriptors to stop.
2090 1.1 augustss */
2091 1.20 augustss usb_delay_ms(&sc->sc_bus, 2);
2092 1.1 augustss
2093 1.1 augustss for(i = 0; i < npoll; i++)
2094 1.1 augustss uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
2095 1.31 augustss free(upipe->u.intr.qhs, M_USBHC);
2096 1.1 augustss
2097 1.1 augustss /* XXX free other resources */
2098 1.1 augustss }
2099 1.1 augustss
2100 1.1 augustss usbd_status
2101 1.119 augustss uhci_device_request(usbd_xfer_handle xfer)
2102 1.1 augustss {
2103 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2104 1.63 augustss usb_device_request_t *req = &xfer->request;
2105 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
2106 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2107 1.1 augustss int addr = dev->address;
2108 1.1 augustss int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2109 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2110 1.55 augustss uhci_soft_td_t *setup, *data, *stat, *next, *dataend;
2111 1.1 augustss uhci_soft_qh_t *sqh;
2112 1.1 augustss int len;
2113 1.1 augustss u_int32_t ls;
2114 1.63 augustss usbd_status err;
2115 1.1 augustss int isread;
2116 1.1 augustss int s;
2117 1.1 augustss
2118 1.13 augustss DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
2119 1.12 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
2120 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
2121 1.1 augustss UGETW(req->wIndex), UGETW(req->wLength),
2122 1.1 augustss addr, endpt));
2123 1.1 augustss
2124 1.1 augustss ls = dev->lowspeed ? UHCI_TD_LS : 0;
2125 1.1 augustss isread = req->bmRequestType & UT_READ;
2126 1.1 augustss len = UGETW(req->wLength);
2127 1.1 augustss
2128 1.1 augustss setup = upipe->u.ctl.setup;
2129 1.1 augustss stat = upipe->u.ctl.stat;
2130 1.1 augustss sqh = upipe->u.ctl.sqh;
2131 1.1 augustss
2132 1.1 augustss /* Set up data transaction */
2133 1.1 augustss if (len != 0) {
2134 1.38 augustss upipe->nexttoggle = 1;
2135 1.73 augustss err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
2136 1.73 augustss &xfer->dmabuf, &data, &dataend);
2137 1.63 augustss if (err)
2138 1.63 augustss return (err);
2139 1.55 augustss next = data;
2140 1.55 augustss dataend->link.std = stat;
2141 1.121 augustss dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
2142 1.1 augustss } else {
2143 1.1 augustss next = stat;
2144 1.1 augustss }
2145 1.1 augustss upipe->u.ctl.length = len;
2146 1.1 augustss
2147 1.1 augustss memcpy(KERNADDR(&upipe->u.ctl.reqdma), req, sizeof *req);
2148 1.1 augustss
2149 1.42 augustss setup->link.std = next;
2150 1.121 augustss setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
2151 1.88 tsutsui setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
2152 1.88 tsutsui UHCI_TD_ACTIVE);
2153 1.88 tsutsui setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr));
2154 1.88 tsutsui setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma));
2155 1.42 augustss
2156 1.92 augustss stat->link.std = NULL;
2157 1.88 tsutsui stat->td.td_link = htole32(UHCI_PTR_T);
2158 1.88 tsutsui stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
2159 1.39 augustss UHCI_TD_ACTIVE | UHCI_TD_IOC);
2160 1.42 augustss stat->td.td_token =
2161 1.88 tsutsui htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
2162 1.88 tsutsui UHCI_TD_IN (0, endpt, addr, 1));
2163 1.88 tsutsui stat->td.td_buffer = htole32(0);
2164 1.1 augustss
2165 1.59 augustss #ifdef UHCI_DEBUG
2166 1.67 augustss if (uhcidebug > 10) {
2167 1.47 augustss DPRINTF(("uhci_device_request: before transfer\n"));
2168 1.41 augustss uhci_dump_tds(setup);
2169 1.1 augustss }
2170 1.1 augustss #endif
2171 1.1 augustss
2172 1.1 augustss /* Set up interrupt info. */
2173 1.63 augustss ii->xfer = xfer;
2174 1.1 augustss ii->stdstart = setup;
2175 1.1 augustss ii->stdend = stat;
2176 1.7 augustss #ifdef DIAGNOSTIC
2177 1.70 augustss if (!ii->isdone) {
2178 1.70 augustss printf("uhci_device_request: not done, ii=%p\n", ii);
2179 1.70 augustss }
2180 1.7 augustss ii->isdone = 0;
2181 1.7 augustss #endif
2182 1.1 augustss
2183 1.42 augustss sqh->elink = setup;
2184 1.121 augustss sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD);
2185 1.1 augustss
2186 1.1 augustss s = splusb();
2187 1.123 augustss if (dev->lowspeed)
2188 1.123 augustss uhci_add_ls_ctrl(sc, sqh);
2189 1.123 augustss else
2190 1.123 augustss uhci_add_hs_ctrl(sc, sqh);
2191 1.92 augustss uhci_add_intr_info(sc, ii);
2192 1.59 augustss #ifdef UHCI_DEBUG
2193 1.1 augustss if (uhcidebug > 12) {
2194 1.1 augustss uhci_soft_td_t *std;
2195 1.1 augustss uhci_soft_qh_t *xqh;
2196 1.13 augustss uhci_soft_qh_t *sxqh;
2197 1.13 augustss int maxqh = 0;
2198 1.1 augustss uhci_physaddr_t link;
2199 1.47 augustss DPRINTF(("uhci_enter_ctl_q: follow from [0]\n"));
2200 1.1 augustss for (std = sc->sc_vframes[0].htd, link = 0;
2201 1.121 augustss (link & UHCI_PTR_QH) == 0;
2202 1.42 augustss std = std->link.std) {
2203 1.88 tsutsui link = le32toh(std->td.td_link);
2204 1.1 augustss uhci_dump_td(std);
2205 1.1 augustss }
2206 1.67 augustss sxqh = (uhci_soft_qh_t *)std;
2207 1.67 augustss uhci_dump_qh(sxqh);
2208 1.67 augustss for (xqh = sxqh;
2209 1.63 augustss xqh != NULL;
2210 1.121 augustss xqh = (maxqh++ == 5 || xqh->hlink == sxqh ||
2211 1.121 augustss xqh->hlink == xqh ? NULL : xqh->hlink)) {
2212 1.1 augustss uhci_dump_qh(xqh);
2213 1.13 augustss }
2214 1.47 augustss DPRINTF(("Enqueued QH:\n"));
2215 1.1 augustss uhci_dump_qh(sqh);
2216 1.42 augustss uhci_dump_tds(sqh->elink);
2217 1.1 augustss }
2218 1.1 augustss #endif
2219 1.63 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
2220 1.96 augustss usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2221 1.91 augustss uhci_timeout, ii);
2222 1.13 augustss }
2223 1.92 augustss xfer->status = USBD_IN_PROGRESS;
2224 1.1 augustss splx(s);
2225 1.1 augustss
2226 1.1 augustss return (USBD_NORMAL_COMPLETION);
2227 1.1 augustss }
2228 1.1 augustss
2229 1.16 augustss usbd_status
2230 1.119 augustss uhci_device_isoc_transfer(usbd_xfer_handle xfer)
2231 1.16 augustss {
2232 1.63 augustss usbd_status err;
2233 1.48 augustss
2234 1.63 augustss DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer));
2235 1.48 augustss
2236 1.48 augustss /* Put it on our queue, */
2237 1.63 augustss err = usb_insert_transfer(xfer);
2238 1.48 augustss
2239 1.48 augustss /* bail out on error, */
2240 1.63 augustss if (err && err != USBD_IN_PROGRESS)
2241 1.63 augustss return (err);
2242 1.48 augustss
2243 1.48 augustss /* XXX should check inuse here */
2244 1.48 augustss
2245 1.48 augustss /* insert into schedule, */
2246 1.63 augustss uhci_device_isoc_enter(xfer);
2247 1.48 augustss
2248 1.102 augustss /* and start if the pipe wasn't running */
2249 1.67 augustss if (!err)
2250 1.63 augustss uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
2251 1.48 augustss
2252 1.63 augustss return (err);
2253 1.48 augustss }
2254 1.48 augustss
2255 1.48 augustss void
2256 1.119 augustss uhci_device_isoc_enter(usbd_xfer_handle xfer)
2257 1.48 augustss {
2258 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2259 1.16 augustss usbd_device_handle dev = upipe->pipe.device;
2260 1.16 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2261 1.48 augustss struct iso *iso = &upipe->u.iso;
2262 1.48 augustss uhci_soft_td_t *std;
2263 1.48 augustss u_int32_t buf, len, status;
2264 1.48 augustss int s, i, next, nframes;
2265 1.48 augustss
2266 1.63 augustss DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p "
2267 1.48 augustss "nframes=%d\n",
2268 1.63 augustss iso->inuse, iso->next, xfer, xfer->nframes));
2269 1.48 augustss
2270 1.82 augustss if (sc->sc_dying)
2271 1.82 augustss return;
2272 1.82 augustss
2273 1.63 augustss if (xfer->status == USBD_IN_PROGRESS) {
2274 1.48 augustss /* This request has already been entered into the frame list */
2275 1.96 augustss printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer);
2276 1.68 augustss /* XXX */
2277 1.48 augustss }
2278 1.48 augustss
2279 1.48 augustss #ifdef DIAGNOSTIC
2280 1.48 augustss if (iso->inuse >= UHCI_VFRAMELIST_COUNT)
2281 1.48 augustss printf("uhci_device_isoc_enter: overflow!\n");
2282 1.19 augustss #endif
2283 1.16 augustss
2284 1.48 augustss next = iso->next;
2285 1.48 augustss if (next == -1) {
2286 1.48 augustss /* Not in use yet, schedule it a few frames ahead. */
2287 1.48 augustss next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
2288 1.48 augustss DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next));
2289 1.48 augustss }
2290 1.48 augustss
2291 1.63 augustss xfer->status = USBD_IN_PROGRESS;
2292 1.92 augustss UXFER(xfer)->curframe = next;
2293 1.48 augustss
2294 1.63 augustss buf = DMAADDR(&xfer->dmabuf);
2295 1.88 tsutsui status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |
2296 1.88 tsutsui UHCI_TD_ACTIVE |
2297 1.88 tsutsui UHCI_TD_IOS);
2298 1.63 augustss nframes = xfer->nframes;
2299 1.48 augustss s = splusb();
2300 1.48 augustss for (i = 0; i < nframes; i++) {
2301 1.48 augustss std = iso->stds[next];
2302 1.48 augustss if (++next >= UHCI_VFRAMELIST_COUNT)
2303 1.48 augustss next = 0;
2304 1.63 augustss len = xfer->frlengths[i];
2305 1.88 tsutsui std->td.td_buffer = htole32(buf);
2306 1.48 augustss if (i == nframes - 1)
2307 1.88 tsutsui status |= UHCI_TD_IOC;
2308 1.88 tsutsui std->td.td_status = htole32(status);
2309 1.88 tsutsui std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK);
2310 1.88 tsutsui std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len));
2311 1.59 augustss #ifdef UHCI_DEBUG
2312 1.48 augustss if (uhcidebug > 5) {
2313 1.48 augustss DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i));
2314 1.48 augustss uhci_dump_td(std);
2315 1.48 augustss }
2316 1.48 augustss #endif
2317 1.48 augustss buf += len;
2318 1.48 augustss }
2319 1.48 augustss iso->next = next;
2320 1.63 augustss iso->inuse += xfer->nframes;
2321 1.16 augustss
2322 1.48 augustss splx(s);
2323 1.16 augustss }
2324 1.16 augustss
2325 1.16 augustss usbd_status
2326 1.119 augustss uhci_device_isoc_start(usbd_xfer_handle xfer)
2327 1.16 augustss {
2328 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2329 1.48 augustss uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
2330 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2331 1.48 augustss uhci_soft_td_t *end;
2332 1.48 augustss int s, i;
2333 1.48 augustss
2334 1.96 augustss DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer));
2335 1.96 augustss
2336 1.82 augustss if (sc->sc_dying)
2337 1.82 augustss return (USBD_IOERROR);
2338 1.82 augustss
2339 1.48 augustss #ifdef DIAGNOSTIC
2340 1.63 augustss if (xfer->status != USBD_IN_PROGRESS)
2341 1.63 augustss printf("uhci_device_isoc_start: not in progress %p\n", xfer);
2342 1.48 augustss #endif
2343 1.48 augustss
2344 1.48 augustss /* Find the last TD */
2345 1.92 augustss i = UXFER(xfer)->curframe + xfer->nframes;
2346 1.48 augustss if (i >= UHCI_VFRAMELIST_COUNT)
2347 1.48 augustss i -= UHCI_VFRAMELIST_COUNT;
2348 1.48 augustss end = upipe->u.iso.stds[i];
2349 1.48 augustss
2350 1.96 augustss #ifdef DIAGNOSTIC
2351 1.96 augustss if (end == NULL) {
2352 1.96 augustss printf("uhci_device_isoc_start: end == NULL\n");
2353 1.96 augustss return (USBD_INVAL);
2354 1.96 augustss }
2355 1.96 augustss #endif
2356 1.96 augustss
2357 1.48 augustss s = splusb();
2358 1.48 augustss
2359 1.48 augustss /* Set up interrupt info. */
2360 1.63 augustss ii->xfer = xfer;
2361 1.48 augustss ii->stdstart = end;
2362 1.48 augustss ii->stdend = end;
2363 1.48 augustss #ifdef DIAGNOSTIC
2364 1.102 augustss if (!ii->isdone)
2365 1.70 augustss printf("uhci_device_isoc_start: not done, ii=%p\n", ii);
2366 1.48 augustss ii->isdone = 0;
2367 1.48 augustss #endif
2368 1.92 augustss uhci_add_intr_info(sc, ii);
2369 1.48 augustss
2370 1.48 augustss splx(s);
2371 1.48 augustss
2372 1.48 augustss return (USBD_IN_PROGRESS);
2373 1.16 augustss }
2374 1.16 augustss
2375 1.16 augustss void
2376 1.119 augustss uhci_device_isoc_abort(usbd_xfer_handle xfer)
2377 1.16 augustss {
2378 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2379 1.48 augustss uhci_soft_td_t **stds = upipe->u.iso.stds;
2380 1.48 augustss uhci_soft_td_t *std;
2381 1.92 augustss int i, n, s, nframes, maxlen, len;
2382 1.92 augustss
2383 1.92 augustss s = splusb();
2384 1.92 augustss
2385 1.92 augustss /* Transfer is already done. */
2386 1.92 augustss if (xfer->status != USBD_NOT_STARTED &&
2387 1.92 augustss xfer->status != USBD_IN_PROGRESS) {
2388 1.92 augustss splx(s);
2389 1.92 augustss return;
2390 1.92 augustss }
2391 1.48 augustss
2392 1.92 augustss /* Give xfer the requested abort code. */
2393 1.63 augustss xfer->status = USBD_CANCELLED;
2394 1.48 augustss
2395 1.48 augustss /* make hardware ignore it, */
2396 1.63 augustss nframes = xfer->nframes;
2397 1.92 augustss n = UXFER(xfer)->curframe;
2398 1.92 augustss maxlen = 0;
2399 1.48 augustss for (i = 0; i < nframes; i++) {
2400 1.48 augustss std = stds[n];
2401 1.88 tsutsui std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
2402 1.130 tsutsui len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token));
2403 1.92 augustss if (len > maxlen)
2404 1.92 augustss maxlen = len;
2405 1.48 augustss if (++n >= UHCI_VFRAMELIST_COUNT)
2406 1.48 augustss n = 0;
2407 1.48 augustss }
2408 1.48 augustss
2409 1.92 augustss /* and wait until we are sure the hardware has finished. */
2410 1.92 augustss delay(maxlen);
2411 1.92 augustss
2412 1.96 augustss #ifdef DIAGNOSTIC
2413 1.96 augustss UXFER(xfer)->iinfo.isdone = 1;
2414 1.96 augustss #endif
2415 1.92 augustss /* Run callback and remove from interrupt list. */
2416 1.92 augustss usb_transfer_complete(xfer);
2417 1.48 augustss
2418 1.92 augustss splx(s);
2419 1.16 augustss }
2420 1.16 augustss
2421 1.16 augustss void
2422 1.119 augustss uhci_device_isoc_close(usbd_pipe_handle pipe)
2423 1.16 augustss {
2424 1.16 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2425 1.16 augustss usbd_device_handle dev = upipe->pipe.device;
2426 1.16 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2427 1.48 augustss uhci_soft_td_t *std, *vstd;
2428 1.16 augustss struct iso *iso;
2429 1.92 augustss int i, s;
2430 1.16 augustss
2431 1.16 augustss /*
2432 1.16 augustss * Make sure all TDs are marked as inactive.
2433 1.16 augustss * Wait for completion.
2434 1.16 augustss * Unschedule.
2435 1.16 augustss * Deallocate.
2436 1.16 augustss */
2437 1.16 augustss iso = &upipe->u.iso;
2438 1.16 augustss
2439 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++)
2440 1.88 tsutsui iso->stds[i]->td.td_status &= htole32(~UHCI_TD_ACTIVE);
2441 1.20 augustss usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */
2442 1.16 augustss
2443 1.92 augustss s = splusb();
2444 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2445 1.16 augustss std = iso->stds[i];
2446 1.48 augustss for (vstd = sc->sc_vframes[i].htd;
2447 1.67 augustss vstd != NULL && vstd->link.std != std;
2448 1.42 augustss vstd = vstd->link.std)
2449 1.16 augustss ;
2450 1.67 augustss if (vstd == NULL) {
2451 1.16 augustss /*panic*/
2452 1.16 augustss printf("uhci_device_isoc_close: %p not found\n", std);
2453 1.92 augustss splx(s);
2454 1.16 augustss return;
2455 1.16 augustss }
2456 1.42 augustss vstd->link = std->link;
2457 1.42 augustss vstd->td.td_link = std->td.td_link;
2458 1.16 augustss uhci_free_std(sc, std);
2459 1.16 augustss }
2460 1.92 augustss splx(s);
2461 1.16 augustss
2462 1.31 augustss free(iso->stds, M_USBHC);
2463 1.16 augustss }
2464 1.16 augustss
2465 1.16 augustss usbd_status
2466 1.119 augustss uhci_setup_isoc(usbd_pipe_handle pipe)
2467 1.16 augustss {
2468 1.16 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2469 1.16 augustss usbd_device_handle dev = upipe->pipe.device;
2470 1.16 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2471 1.16 augustss int addr = upipe->pipe.device->address;
2472 1.16 augustss int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2473 1.45 augustss int rd = UE_GET_DIR(endpt) == UE_DIR_IN;
2474 1.48 augustss uhci_soft_td_t *std, *vstd;
2475 1.48 augustss u_int32_t token;
2476 1.16 augustss struct iso *iso;
2477 1.92 augustss int i, s;
2478 1.16 augustss
2479 1.16 augustss iso = &upipe->u.iso;
2480 1.16 augustss iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *),
2481 1.31 augustss M_USBHC, M_WAITOK);
2482 1.16 augustss
2483 1.88 tsutsui token = rd ? UHCI_TD_IN (0, endpt, addr, 0) :
2484 1.88 tsutsui UHCI_TD_OUT(0, endpt, addr, 0);
2485 1.16 augustss
2486 1.48 augustss /* Allocate the TDs and mark as inactive; */
2487 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2488 1.48 augustss std = uhci_alloc_std(sc);
2489 1.48 augustss if (std == 0)
2490 1.48 augustss goto bad;
2491 1.88 tsutsui std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
2492 1.88 tsutsui std->td.td_token = htole32(token);
2493 1.48 augustss iso->stds[i] = std;
2494 1.16 augustss }
2495 1.16 augustss
2496 1.48 augustss /* Insert TDs into schedule. */
2497 1.92 augustss s = splusb();
2498 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2499 1.16 augustss std = iso->stds[i];
2500 1.48 augustss vstd = sc->sc_vframes[i].htd;
2501 1.42 augustss std->link = vstd->link;
2502 1.42 augustss std->td.td_link = vstd->td.td_link;
2503 1.42 augustss vstd->link.std = std;
2504 1.121 augustss vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD);
2505 1.16 augustss }
2506 1.92 augustss splx(s);
2507 1.16 augustss
2508 1.48 augustss iso->next = -1;
2509 1.48 augustss iso->inuse = 0;
2510 1.48 augustss
2511 1.16 augustss return (USBD_NORMAL_COMPLETION);
2512 1.16 augustss
2513 1.48 augustss bad:
2514 1.16 augustss while (--i >= 0)
2515 1.16 augustss uhci_free_std(sc, iso->stds[i]);
2516 1.31 augustss free(iso->stds, M_USBHC);
2517 1.16 augustss return (USBD_NOMEM);
2518 1.16 augustss }
2519 1.16 augustss
2520 1.16 augustss void
2521 1.119 augustss uhci_device_isoc_done(usbd_xfer_handle xfer)
2522 1.16 augustss {
2523 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2524 1.48 augustss
2525 1.63 augustss DPRINTFN(4, ("uhci_isoc_done: length=%d\n", xfer->actlen));
2526 1.93 augustss
2527 1.96 augustss if (ii->xfer != xfer)
2528 1.96 augustss /* Not on interrupt list, ignore it. */
2529 1.96 augustss return;
2530 1.96 augustss
2531 1.93 augustss #ifdef DIAGNOSTIC
2532 1.94 augustss if (xfer->busy_free != XFER_BUSY) {
2533 1.94 augustss printf("uhci_device_isoc_done: xfer=%p not busy 0x%08x\n",
2534 1.94 augustss xfer, xfer->busy_free);
2535 1.93 augustss return;
2536 1.93 augustss }
2537 1.93 augustss
2538 1.93 augustss if (ii->stdend == NULL) {
2539 1.93 augustss printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
2540 1.93 augustss #ifdef UHCI_DEBUG
2541 1.93 augustss uhci_dump_ii(ii);
2542 1.93 augustss #endif
2543 1.93 augustss return;
2544 1.93 augustss }
2545 1.93 augustss #endif
2546 1.48 augustss
2547 1.48 augustss /* Turn off the interrupt since it is active even if the TD is not. */
2548 1.88 tsutsui ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC);
2549 1.48 augustss
2550 1.92 augustss uhci_del_intr_info(ii); /* remove from active list */
2551 1.16 augustss }
2552 1.16 augustss
2553 1.1 augustss void
2554 1.119 augustss uhci_device_intr_done(usbd_xfer_handle xfer)
2555 1.1 augustss {
2556 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2557 1.1 augustss uhci_softc_t *sc = ii->sc;
2558 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2559 1.1 augustss uhci_soft_qh_t *sqh;
2560 1.1 augustss int i, npoll;
2561 1.1 augustss
2562 1.63 augustss DPRINTFN(5, ("uhci_intr_done: length=%d\n", xfer->actlen));
2563 1.1 augustss
2564 1.1 augustss npoll = upipe->u.intr.npoll;
2565 1.1 augustss for(i = 0; i < npoll; i++) {
2566 1.1 augustss sqh = upipe->u.intr.qhs[i];
2567 1.121 augustss sqh->elink = NULL;
2568 1.88 tsutsui sqh->qh.qh_elink = htole32(UHCI_PTR_T);
2569 1.1 augustss }
2570 1.1 augustss uhci_free_std_chain(sc, ii->stdstart, 0);
2571 1.1 augustss
2572 1.1 augustss /* XXX Wasteful. */
2573 1.63 augustss if (xfer->pipe->repeat) {
2574 1.55 augustss uhci_soft_td_t *data, *dataend;
2575 1.1 augustss
2576 1.92 augustss DPRINTFN(5,("uhci_device_intr_done: requeing\n"));
2577 1.92 augustss
2578 1.1 augustss /* This alloc cannot fail since we freed the chain above. */
2579 1.73 augustss uhci_alloc_std_chain(upipe, sc, xfer->length, 1, xfer->flags,
2580 1.63 augustss &xfer->dmabuf, &data, &dataend);
2581 1.88 tsutsui dataend->td.td_status |= htole32(UHCI_TD_IOC);
2582 1.1 augustss
2583 1.59 augustss #ifdef UHCI_DEBUG
2584 1.1 augustss if (uhcidebug > 10) {
2585 1.55 augustss DPRINTF(("uhci_device_intr_done: data(1)\n"));
2586 1.55 augustss uhci_dump_tds(data);
2587 1.1 augustss uhci_dump_qh(upipe->u.intr.qhs[0]);
2588 1.1 augustss }
2589 1.1 augustss #endif
2590 1.1 augustss
2591 1.55 augustss ii->stdstart = data;
2592 1.55 augustss ii->stdend = dataend;
2593 1.7 augustss #ifdef DIAGNOSTIC
2594 1.70 augustss if (!ii->isdone) {
2595 1.70 augustss printf("uhci_device_intr_done: not done, ii=%p\n", ii);
2596 1.70 augustss }
2597 1.7 augustss ii->isdone = 0;
2598 1.7 augustss #endif
2599 1.1 augustss for (i = 0; i < npoll; i++) {
2600 1.1 augustss sqh = upipe->u.intr.qhs[i];
2601 1.55 augustss sqh->elink = data;
2602 1.121 augustss sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
2603 1.1 augustss }
2604 1.92 augustss xfer->status = USBD_IN_PROGRESS;
2605 1.92 augustss /* The ii is already on the examined list, just leave it. */
2606 1.1 augustss } else {
2607 1.92 augustss DPRINTFN(5,("uhci_device_intr_done: removing\n"));
2608 1.92 augustss uhci_del_intr_info(ii);
2609 1.1 augustss }
2610 1.1 augustss }
2611 1.1 augustss
2612 1.1 augustss /* Deallocate request data structures */
2613 1.1 augustss void
2614 1.119 augustss uhci_device_ctrl_done(usbd_xfer_handle xfer)
2615 1.1 augustss {
2616 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2617 1.1 augustss uhci_softc_t *sc = ii->sc;
2618 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2619 1.1 augustss
2620 1.7 augustss #ifdef DIAGNOSTIC
2621 1.63 augustss if (!(xfer->rqflags & URQ_REQUEST))
2622 1.1 augustss panic("uhci_ctrl_done: not a request\n");
2623 1.7 augustss #endif
2624 1.1 augustss
2625 1.92 augustss uhci_del_intr_info(ii); /* remove from active list */
2626 1.1 augustss
2627 1.123 augustss if (upipe->pipe.device->lowspeed)
2628 1.123 augustss uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh);
2629 1.123 augustss else
2630 1.123 augustss uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh);
2631 1.1 augustss
2632 1.49 augustss if (upipe->u.ctl.length != 0)
2633 1.42 augustss uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend);
2634 1.49 augustss
2635 1.63 augustss DPRINTFN(5, ("uhci_ctrl_done: length=%d\n", xfer->actlen));
2636 1.1 augustss }
2637 1.1 augustss
2638 1.1 augustss /* Deallocate request data structures */
2639 1.1 augustss void
2640 1.119 augustss uhci_device_bulk_done(usbd_xfer_handle xfer)
2641 1.1 augustss {
2642 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2643 1.1 augustss uhci_softc_t *sc = ii->sc;
2644 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2645 1.1 augustss
2646 1.92 augustss uhci_del_intr_info(ii); /* remove from active list */
2647 1.1 augustss
2648 1.1 augustss uhci_remove_bulk(sc, upipe->u.bulk.sqh);
2649 1.32 augustss
2650 1.32 augustss uhci_free_std_chain(sc, ii->stdstart, 0);
2651 1.32 augustss
2652 1.63 augustss DPRINTFN(5, ("uhci_bulk_done: length=%d\n", xfer->actlen));
2653 1.1 augustss }
2654 1.1 augustss
2655 1.1 augustss /* Add interrupt QH, called with vflock. */
2656 1.1 augustss void
2657 1.119 augustss uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
2658 1.1 augustss {
2659 1.92 augustss struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
2660 1.42 augustss uhci_soft_qh_t *eqh;
2661 1.1 augustss
2662 1.92 augustss DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh));
2663 1.92 augustss
2664 1.42 augustss eqh = vf->eqh;
2665 1.42 augustss sqh->hlink = eqh->hlink;
2666 1.42 augustss sqh->qh.qh_hlink = eqh->qh.qh_hlink;
2667 1.42 augustss eqh->hlink = sqh;
2668 1.121 augustss eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
2669 1.1 augustss vf->eqh = sqh;
2670 1.1 augustss vf->bandwidth++;
2671 1.1 augustss }
2672 1.1 augustss
2673 1.119 augustss /* Remove interrupt QH. */
2674 1.1 augustss void
2675 1.119 augustss uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
2676 1.1 augustss {
2677 1.92 augustss struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
2678 1.1 augustss uhci_soft_qh_t *pqh;
2679 1.1 augustss
2680 1.92 augustss DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh));
2681 1.1 augustss
2682 1.124 augustss /* See comment in uhci_remove_ctrl() */
2683 1.124 augustss if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
2684 1.124 augustss sqh->qh.qh_elink = htole32(UHCI_PTR_T);
2685 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
2686 1.124 augustss }
2687 1.124 augustss
2688 1.92 augustss pqh = uhci_find_prev_qh(vf->hqh, sqh);
2689 1.42 augustss pqh->hlink = sqh->hlink;
2690 1.42 augustss pqh->qh.qh_hlink = sqh->qh.qh_hlink;
2691 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
2692 1.1 augustss if (vf->eqh == sqh)
2693 1.1 augustss vf->eqh = pqh;
2694 1.1 augustss vf->bandwidth--;
2695 1.1 augustss }
2696 1.1 augustss
2697 1.1 augustss usbd_status
2698 1.119 augustss uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival)
2699 1.1 augustss {
2700 1.1 augustss uhci_soft_qh_t *sqh;
2701 1.1 augustss int i, npoll, s;
2702 1.1 augustss u_int bestbw, bw, bestoffs, offs;
2703 1.1 augustss
2704 1.1 augustss DPRINTFN(2, ("uhci_setintr: pipe=%p\n", upipe));
2705 1.1 augustss if (ival == 0) {
2706 1.1 augustss printf("uhci_setintr: 0 interval\n");
2707 1.1 augustss return (USBD_INVAL);
2708 1.1 augustss }
2709 1.1 augustss
2710 1.1 augustss if (ival > UHCI_VFRAMELIST_COUNT)
2711 1.1 augustss ival = UHCI_VFRAMELIST_COUNT;
2712 1.1 augustss npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
2713 1.1 augustss DPRINTFN(2, ("uhci_setintr: ival=%d npoll=%d\n", ival, npoll));
2714 1.1 augustss
2715 1.1 augustss upipe->u.intr.npoll = npoll;
2716 1.1 augustss upipe->u.intr.qhs =
2717 1.31 augustss malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK);
2718 1.1 augustss
2719 1.1 augustss /*
2720 1.1 augustss * Figure out which offset in the schedule that has most
2721 1.1 augustss * bandwidth left over.
2722 1.1 augustss */
2723 1.1 augustss #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
2724 1.1 augustss for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
2725 1.1 augustss for (bw = i = 0; i < npoll; i++)
2726 1.1 augustss bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
2727 1.1 augustss if (bw < bestbw) {
2728 1.1 augustss bestbw = bw;
2729 1.1 augustss bestoffs = offs;
2730 1.1 augustss }
2731 1.1 augustss }
2732 1.1 augustss DPRINTFN(1, ("uhci_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
2733 1.1 augustss
2734 1.1 augustss for(i = 0; i < npoll; i++) {
2735 1.1 augustss upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
2736 1.121 augustss sqh->elink = NULL;
2737 1.88 tsutsui sqh->qh.qh_elink = htole32(UHCI_PTR_T);
2738 1.1 augustss sqh->pos = MOD(i * ival + bestoffs);
2739 1.1 augustss }
2740 1.1 augustss #undef MOD
2741 1.1 augustss
2742 1.1 augustss s = splusb();
2743 1.1 augustss /* Enter QHs into the controller data structures. */
2744 1.1 augustss for(i = 0; i < npoll; i++)
2745 1.92 augustss uhci_add_intr(sc, upipe->u.intr.qhs[i]);
2746 1.92 augustss splx(s);
2747 1.1 augustss
2748 1.1 augustss DPRINTFN(5, ("uhci_setintr: returns %p\n", upipe));
2749 1.1 augustss return (USBD_NORMAL_COMPLETION);
2750 1.1 augustss }
2751 1.1 augustss
2752 1.1 augustss /* Open a new pipe. */
2753 1.1 augustss usbd_status
2754 1.119 augustss uhci_open(usbd_pipe_handle pipe)
2755 1.1 augustss {
2756 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2757 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2758 1.1 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2759 1.63 augustss usbd_status err;
2760 1.79 augustss int ival;
2761 1.1 augustss
2762 1.1 augustss DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2763 1.1 augustss pipe, pipe->device->address,
2764 1.1 augustss ed->bEndpointAddress, sc->sc_addr));
2765 1.92 augustss
2766 1.92 augustss upipe->aborting = 0;
2767 1.92 augustss upipe->nexttoggle = 0;
2768 1.92 augustss
2769 1.1 augustss if (pipe->device->address == sc->sc_addr) {
2770 1.1 augustss switch (ed->bEndpointAddress) {
2771 1.1 augustss case USB_CONTROL_ENDPOINT:
2772 1.1 augustss pipe->methods = &uhci_root_ctrl_methods;
2773 1.1 augustss break;
2774 1.45 augustss case UE_DIR_IN | UHCI_INTR_ENDPT:
2775 1.1 augustss pipe->methods = &uhci_root_intr_methods;
2776 1.1 augustss break;
2777 1.1 augustss default:
2778 1.1 augustss return (USBD_INVAL);
2779 1.1 augustss }
2780 1.1 augustss } else {
2781 1.1 augustss switch (ed->bmAttributes & UE_XFERTYPE) {
2782 1.1 augustss case UE_CONTROL:
2783 1.1 augustss pipe->methods = &uhci_device_ctrl_methods;
2784 1.1 augustss upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
2785 1.63 augustss if (upipe->u.ctl.sqh == NULL)
2786 1.5 augustss goto bad;
2787 1.1 augustss upipe->u.ctl.setup = uhci_alloc_std(sc);
2788 1.63 augustss if (upipe->u.ctl.setup == NULL) {
2789 1.5 augustss uhci_free_sqh(sc, upipe->u.ctl.sqh);
2790 1.5 augustss goto bad;
2791 1.5 augustss }
2792 1.1 augustss upipe->u.ctl.stat = uhci_alloc_std(sc);
2793 1.63 augustss if (upipe->u.ctl.stat == NULL) {
2794 1.5 augustss uhci_free_sqh(sc, upipe->u.ctl.sqh);
2795 1.5 augustss uhci_free_std(sc, upipe->u.ctl.setup);
2796 1.5 augustss goto bad;
2797 1.5 augustss }
2798 1.63 augustss err = usb_allocmem(&sc->sc_bus,
2799 1.63 augustss sizeof(usb_device_request_t),
2800 1.63 augustss 0, &upipe->u.ctl.reqdma);
2801 1.63 augustss if (err) {
2802 1.5 augustss uhci_free_sqh(sc, upipe->u.ctl.sqh);
2803 1.5 augustss uhci_free_std(sc, upipe->u.ctl.setup);
2804 1.5 augustss uhci_free_std(sc, upipe->u.ctl.stat);
2805 1.5 augustss goto bad;
2806 1.5 augustss }
2807 1.1 augustss break;
2808 1.1 augustss case UE_INTERRUPT:
2809 1.1 augustss pipe->methods = &uhci_device_intr_methods;
2810 1.79 augustss ival = pipe->interval;
2811 1.79 augustss if (ival == USBD_DEFAULT_INTERVAL)
2812 1.79 augustss ival = ed->bInterval;
2813 1.80 augustss return (uhci_device_setintr(sc, upipe, ival));
2814 1.1 augustss case UE_ISOCHRONOUS:
2815 1.16 augustss pipe->methods = &uhci_device_isoc_methods;
2816 1.48 augustss return (uhci_setup_isoc(pipe));
2817 1.1 augustss case UE_BULK:
2818 1.1 augustss pipe->methods = &uhci_device_bulk_methods;
2819 1.1 augustss upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
2820 1.63 augustss if (upipe->u.bulk.sqh == NULL)
2821 1.5 augustss goto bad;
2822 1.1 augustss break;
2823 1.1 augustss }
2824 1.1 augustss }
2825 1.1 augustss return (USBD_NORMAL_COMPLETION);
2826 1.5 augustss
2827 1.5 augustss bad:
2828 1.5 augustss return (USBD_NOMEM);
2829 1.1 augustss }
2830 1.1 augustss
2831 1.1 augustss /*
2832 1.1 augustss * Data structures and routines to emulate the root hub.
2833 1.1 augustss */
2834 1.1 augustss usb_device_descriptor_t uhci_devd = {
2835 1.1 augustss USB_DEVICE_DESCRIPTOR_SIZE,
2836 1.1 augustss UDESC_DEVICE, /* type */
2837 1.1 augustss {0x00, 0x01}, /* USB version */
2838 1.87 augustss UDCLASS_HUB, /* class */
2839 1.87 augustss UDSUBCLASS_HUB, /* subclass */
2840 1.1 augustss 0, /* protocol */
2841 1.1 augustss 64, /* max packet */
2842 1.1 augustss {0},{0},{0x00,0x01}, /* device id */
2843 1.1 augustss 1,2,0, /* string indicies */
2844 1.1 augustss 1 /* # of configurations */
2845 1.1 augustss };
2846 1.1 augustss
2847 1.1 augustss usb_config_descriptor_t uhci_confd = {
2848 1.1 augustss USB_CONFIG_DESCRIPTOR_SIZE,
2849 1.1 augustss UDESC_CONFIG,
2850 1.1 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
2851 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
2852 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
2853 1.1 augustss 1,
2854 1.1 augustss 1,
2855 1.1 augustss 0,
2856 1.1 augustss UC_SELF_POWERED,
2857 1.1 augustss 0 /* max power */
2858 1.1 augustss };
2859 1.1 augustss
2860 1.1 augustss usb_interface_descriptor_t uhci_ifcd = {
2861 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
2862 1.1 augustss UDESC_INTERFACE,
2863 1.1 augustss 0,
2864 1.1 augustss 0,
2865 1.1 augustss 1,
2866 1.87 augustss UICLASS_HUB,
2867 1.87 augustss UISUBCLASS_HUB,
2868 1.1 augustss 0,
2869 1.1 augustss 0
2870 1.1 augustss };
2871 1.1 augustss
2872 1.1 augustss usb_endpoint_descriptor_t uhci_endpd = {
2873 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
2874 1.1 augustss UDESC_ENDPOINT,
2875 1.45 augustss UE_DIR_IN | UHCI_INTR_ENDPT,
2876 1.1 augustss UE_INTERRUPT,
2877 1.1 augustss {8},
2878 1.1 augustss 255
2879 1.1 augustss };
2880 1.1 augustss
2881 1.1 augustss usb_hub_descriptor_t uhci_hubd_piix = {
2882 1.1 augustss USB_HUB_DESCRIPTOR_SIZE,
2883 1.1 augustss UDESC_HUB,
2884 1.1 augustss 2,
2885 1.1 augustss { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
2886 1.1 augustss 50, /* power on to power good */
2887 1.1 augustss 0,
2888 1.1 augustss { 0x00 }, /* both ports are removable */
2889 1.1 augustss };
2890 1.1 augustss
2891 1.1 augustss int
2892 1.119 augustss uhci_str(usb_string_descriptor_t *p, int l, char *s)
2893 1.1 augustss {
2894 1.1 augustss int i;
2895 1.1 augustss
2896 1.1 augustss if (l == 0)
2897 1.1 augustss return (0);
2898 1.1 augustss p->bLength = 2 * strlen(s) + 2;
2899 1.1 augustss if (l == 1)
2900 1.1 augustss return (1);
2901 1.1 augustss p->bDescriptorType = UDESC_STRING;
2902 1.1 augustss l -= 2;
2903 1.1 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
2904 1.1 augustss USETW2(p->bString[i], 0, s[i]);
2905 1.1 augustss return (2*i+2);
2906 1.1 augustss }
2907 1.1 augustss
2908 1.1 augustss /*
2909 1.1 augustss * Simulate a hardware hub by handling all the necessary requests.
2910 1.1 augustss */
2911 1.1 augustss usbd_status
2912 1.119 augustss uhci_root_ctrl_transfer(usbd_xfer_handle xfer)
2913 1.1 augustss {
2914 1.63 augustss usbd_status err;
2915 1.16 augustss
2916 1.52 augustss /* Insert last in queue. */
2917 1.63 augustss err = usb_insert_transfer(xfer);
2918 1.63 augustss if (err)
2919 1.63 augustss return (err);
2920 1.52 augustss
2921 1.94 augustss /*
2922 1.94 augustss * Pipe isn't running (otherwise err would be USBD_INPROG),
2923 1.94 augustss * so start it first.
2924 1.67 augustss */
2925 1.63 augustss return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2926 1.16 augustss }
2927 1.16 augustss
2928 1.16 augustss usbd_status
2929 1.119 augustss uhci_root_ctrl_start(usbd_xfer_handle xfer)
2930 1.16 augustss {
2931 1.63 augustss uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
2932 1.1 augustss usb_device_request_t *req;
2933 1.59 augustss void *buf = NULL;
2934 1.1 augustss int port, x;
2935 1.52 augustss int s, len, value, index, status, change, l, totlen = 0;
2936 1.1 augustss usb_port_status_t ps;
2937 1.63 augustss usbd_status err;
2938 1.1 augustss
2939 1.82 augustss if (sc->sc_dying)
2940 1.82 augustss return (USBD_IOERROR);
2941 1.82 augustss
2942 1.48 augustss #ifdef DIAGNOSTIC
2943 1.63 augustss if (!(xfer->rqflags & URQ_REQUEST))
2944 1.1 augustss panic("uhci_root_ctrl_transfer: not a request\n");
2945 1.48 augustss #endif
2946 1.63 augustss req = &xfer->request;
2947 1.1 augustss
2948 1.1 augustss DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
2949 1.1 augustss req->bmRequestType, req->bRequest));
2950 1.1 augustss
2951 1.1 augustss len = UGETW(req->wLength);
2952 1.1 augustss value = UGETW(req->wValue);
2953 1.1 augustss index = UGETW(req->wIndex);
2954 1.49 augustss
2955 1.49 augustss if (len != 0)
2956 1.63 augustss buf = KERNADDR(&xfer->dmabuf);
2957 1.49 augustss
2958 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
2959 1.1 augustss switch(C(req->bRequest, req->bmRequestType)) {
2960 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2961 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2962 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2963 1.1 augustss /*
2964 1.13 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2965 1.1 augustss * for the integrated root hub.
2966 1.1 augustss */
2967 1.1 augustss break;
2968 1.1 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
2969 1.1 augustss if (len > 0) {
2970 1.1 augustss *(u_int8_t *)buf = sc->sc_conf;
2971 1.1 augustss totlen = 1;
2972 1.1 augustss }
2973 1.1 augustss break;
2974 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2975 1.1 augustss DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
2976 1.1 augustss switch(value >> 8) {
2977 1.1 augustss case UDESC_DEVICE:
2978 1.1 augustss if ((value & 0xff) != 0) {
2979 1.63 augustss err = USBD_IOERROR;
2980 1.1 augustss goto ret;
2981 1.1 augustss }
2982 1.1 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2983 1.27 augustss USETW(uhci_devd.idVendor, sc->sc_id_vendor);
2984 1.1 augustss memcpy(buf, &uhci_devd, l);
2985 1.1 augustss break;
2986 1.1 augustss case UDESC_CONFIG:
2987 1.1 augustss if ((value & 0xff) != 0) {
2988 1.63 augustss err = USBD_IOERROR;
2989 1.1 augustss goto ret;
2990 1.1 augustss }
2991 1.1 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2992 1.1 augustss memcpy(buf, &uhci_confd, l);
2993 1.1 augustss buf = (char *)buf + l;
2994 1.1 augustss len -= l;
2995 1.1 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2996 1.1 augustss totlen += l;
2997 1.1 augustss memcpy(buf, &uhci_ifcd, l);
2998 1.1 augustss buf = (char *)buf + l;
2999 1.1 augustss len -= l;
3000 1.1 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
3001 1.1 augustss totlen += l;
3002 1.1 augustss memcpy(buf, &uhci_endpd, l);
3003 1.1 augustss break;
3004 1.1 augustss case UDESC_STRING:
3005 1.1 augustss if (len == 0)
3006 1.1 augustss break;
3007 1.1 augustss *(u_int8_t *)buf = 0;
3008 1.1 augustss totlen = 1;
3009 1.1 augustss switch (value & 0xff) {
3010 1.1 augustss case 1: /* Vendor */
3011 1.8 augustss totlen = uhci_str(buf, len, sc->sc_vendor);
3012 1.1 augustss break;
3013 1.1 augustss case 2: /* Product */
3014 1.8 augustss totlen = uhci_str(buf, len, "UHCI root hub");
3015 1.1 augustss break;
3016 1.1 augustss }
3017 1.1 augustss break;
3018 1.1 augustss default:
3019 1.63 augustss err = USBD_IOERROR;
3020 1.1 augustss goto ret;
3021 1.1 augustss }
3022 1.1 augustss break;
3023 1.1 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
3024 1.1 augustss if (len > 0) {
3025 1.1 augustss *(u_int8_t *)buf = 0;
3026 1.1 augustss totlen = 1;
3027 1.1 augustss }
3028 1.1 augustss break;
3029 1.1 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
3030 1.1 augustss if (len > 1) {
3031 1.1 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
3032 1.1 augustss totlen = 2;
3033 1.1 augustss }
3034 1.1 augustss break;
3035 1.1 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
3036 1.1 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
3037 1.1 augustss if (len > 1) {
3038 1.1 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
3039 1.1 augustss totlen = 2;
3040 1.1 augustss }
3041 1.1 augustss break;
3042 1.1 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
3043 1.1 augustss if (value >= USB_MAX_DEVICES) {
3044 1.63 augustss err = USBD_IOERROR;
3045 1.1 augustss goto ret;
3046 1.1 augustss }
3047 1.1 augustss sc->sc_addr = value;
3048 1.1 augustss break;
3049 1.1 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
3050 1.1 augustss if (value != 0 && value != 1) {
3051 1.63 augustss err = USBD_IOERROR;
3052 1.1 augustss goto ret;
3053 1.1 augustss }
3054 1.1 augustss sc->sc_conf = value;
3055 1.1 augustss break;
3056 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
3057 1.1 augustss break;
3058 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
3059 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
3060 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
3061 1.63 augustss err = USBD_IOERROR;
3062 1.1 augustss goto ret;
3063 1.1 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
3064 1.1 augustss break;
3065 1.1 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
3066 1.1 augustss break;
3067 1.1 augustss /* Hub requests */
3068 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
3069 1.1 augustss break;
3070 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
3071 1.12 augustss DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
3072 1.12 augustss "port=%d feature=%d\n",
3073 1.1 augustss index, value));
3074 1.1 augustss if (index == 1)
3075 1.1 augustss port = UHCI_PORTSC1;
3076 1.1 augustss else if (index == 2)
3077 1.1 augustss port = UHCI_PORTSC2;
3078 1.1 augustss else {
3079 1.63 augustss err = USBD_IOERROR;
3080 1.1 augustss goto ret;
3081 1.1 augustss }
3082 1.1 augustss switch(value) {
3083 1.1 augustss case UHF_PORT_ENABLE:
3084 1.137 augustss x = URWMASK(UREAD2(sc, port));
3085 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
3086 1.1 augustss break;
3087 1.1 augustss case UHF_PORT_SUSPEND:
3088 1.137 augustss x = URWMASK(UREAD2(sc, port));
3089 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
3090 1.1 augustss break;
3091 1.1 augustss case UHF_PORT_RESET:
3092 1.137 augustss x = URWMASK(UREAD2(sc, port));
3093 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
3094 1.1 augustss break;
3095 1.1 augustss case UHF_C_PORT_CONNECTION:
3096 1.137 augustss x = URWMASK(UREAD2(sc, port));
3097 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
3098 1.1 augustss break;
3099 1.1 augustss case UHF_C_PORT_ENABLE:
3100 1.137 augustss x = URWMASK(UREAD2(sc, port));
3101 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
3102 1.1 augustss break;
3103 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
3104 1.137 augustss x = URWMASK(UREAD2(sc, port));
3105 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
3106 1.1 augustss break;
3107 1.1 augustss case UHF_C_PORT_RESET:
3108 1.1 augustss sc->sc_isreset = 0;
3109 1.63 augustss err = USBD_NORMAL_COMPLETION;
3110 1.1 augustss goto ret;
3111 1.1 augustss case UHF_PORT_CONNECTION:
3112 1.1 augustss case UHF_PORT_OVER_CURRENT:
3113 1.1 augustss case UHF_PORT_POWER:
3114 1.1 augustss case UHF_PORT_LOW_SPEED:
3115 1.1 augustss case UHF_C_PORT_SUSPEND:
3116 1.1 augustss default:
3117 1.63 augustss err = USBD_IOERROR;
3118 1.1 augustss goto ret;
3119 1.1 augustss }
3120 1.1 augustss break;
3121 1.1 augustss case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
3122 1.1 augustss if (index == 1)
3123 1.1 augustss port = UHCI_PORTSC1;
3124 1.1 augustss else if (index == 2)
3125 1.1 augustss port = UHCI_PORTSC2;
3126 1.1 augustss else {
3127 1.63 augustss err = USBD_IOERROR;
3128 1.1 augustss goto ret;
3129 1.1 augustss }
3130 1.1 augustss if (len > 0) {
3131 1.1 augustss *(u_int8_t *)buf =
3132 1.1 augustss (UREAD2(sc, port) & UHCI_PORTSC_LS) >>
3133 1.1 augustss UHCI_PORTSC_LS_SHIFT;
3134 1.1 augustss totlen = 1;
3135 1.1 augustss }
3136 1.1 augustss break;
3137 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
3138 1.1 augustss if (value != 0) {
3139 1.63 augustss err = USBD_IOERROR;
3140 1.1 augustss goto ret;
3141 1.1 augustss }
3142 1.1 augustss l = min(len, USB_HUB_DESCRIPTOR_SIZE);
3143 1.1 augustss totlen = l;
3144 1.1 augustss memcpy(buf, &uhci_hubd_piix, l);
3145 1.1 augustss break;
3146 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
3147 1.1 augustss if (len != 4) {
3148 1.63 augustss err = USBD_IOERROR;
3149 1.1 augustss goto ret;
3150 1.1 augustss }
3151 1.1 augustss memset(buf, 0, len);
3152 1.1 augustss totlen = len;
3153 1.1 augustss break;
3154 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
3155 1.1 augustss if (index == 1)
3156 1.1 augustss port = UHCI_PORTSC1;
3157 1.1 augustss else if (index == 2)
3158 1.1 augustss port = UHCI_PORTSC2;
3159 1.1 augustss else {
3160 1.63 augustss err = USBD_IOERROR;
3161 1.1 augustss goto ret;
3162 1.1 augustss }
3163 1.1 augustss if (len != 4) {
3164 1.63 augustss err = USBD_IOERROR;
3165 1.1 augustss goto ret;
3166 1.1 augustss }
3167 1.1 augustss x = UREAD2(sc, port);
3168 1.1 augustss status = change = 0;
3169 1.142 augustss if (x & UHCI_PORTSC_CCS)
3170 1.1 augustss status |= UPS_CURRENT_CONNECT_STATUS;
3171 1.142 augustss if (x & UHCI_PORTSC_CSC)
3172 1.1 augustss change |= UPS_C_CONNECT_STATUS;
3173 1.142 augustss if (x & UHCI_PORTSC_PE)
3174 1.1 augustss status |= UPS_PORT_ENABLED;
3175 1.1 augustss if (x & UHCI_PORTSC_POEDC)
3176 1.1 augustss change |= UPS_C_PORT_ENABLED;
3177 1.142 augustss if (x & UHCI_PORTSC_OCI)
3178 1.1 augustss status |= UPS_OVERCURRENT_INDICATOR;
3179 1.142 augustss if (x & UHCI_PORTSC_OCIC)
3180 1.1 augustss change |= UPS_C_OVERCURRENT_INDICATOR;
3181 1.142 augustss if (x & UHCI_PORTSC_SUSP)
3182 1.1 augustss status |= UPS_SUSPEND;
3183 1.142 augustss if (x & UHCI_PORTSC_LSDA)
3184 1.1 augustss status |= UPS_LOW_SPEED;
3185 1.1 augustss status |= UPS_PORT_POWER;
3186 1.1 augustss if (sc->sc_isreset)
3187 1.1 augustss change |= UPS_C_PORT_RESET;
3188 1.1 augustss USETW(ps.wPortStatus, status);
3189 1.1 augustss USETW(ps.wPortChange, change);
3190 1.1 augustss l = min(len, sizeof ps);
3191 1.1 augustss memcpy(buf, &ps, l);
3192 1.1 augustss totlen = l;
3193 1.1 augustss break;
3194 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
3195 1.63 augustss err = USBD_IOERROR;
3196 1.1 augustss goto ret;
3197 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
3198 1.1 augustss break;
3199 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
3200 1.1 augustss if (index == 1)
3201 1.1 augustss port = UHCI_PORTSC1;
3202 1.1 augustss else if (index == 2)
3203 1.1 augustss port = UHCI_PORTSC2;
3204 1.1 augustss else {
3205 1.63 augustss err = USBD_IOERROR;
3206 1.1 augustss goto ret;
3207 1.1 augustss }
3208 1.1 augustss switch(value) {
3209 1.1 augustss case UHF_PORT_ENABLE:
3210 1.137 augustss x = URWMASK(UREAD2(sc, port));
3211 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_PE);
3212 1.1 augustss break;
3213 1.1 augustss case UHF_PORT_SUSPEND:
3214 1.137 augustss x = URWMASK(UREAD2(sc, port));
3215 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
3216 1.1 augustss break;
3217 1.1 augustss case UHF_PORT_RESET:
3218 1.137 augustss x = URWMASK(UREAD2(sc, port));
3219 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_PR);
3220 1.125 augustss usb_delay_ms(&sc->sc_bus, 50); /*XXX USB v1.1 7.1.7.3 */
3221 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
3222 1.1 augustss delay(100);
3223 1.1 augustss x = UREAD2(sc, port);
3224 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_PE);
3225 1.124 augustss usb_delay_ms(&sc->sc_bus, 10); /* XXX */
3226 1.1 augustss DPRINTFN(3,("uhci port %d reset, status = 0x%04x\n",
3227 1.1 augustss index, UREAD2(sc, port)));
3228 1.1 augustss sc->sc_isreset = 1;
3229 1.1 augustss break;
3230 1.111 augustss case UHF_PORT_POWER:
3231 1.111 augustss /* Pretend we turned on power */
3232 1.115 mycroft err = USBD_NORMAL_COMPLETION;
3233 1.111 augustss goto ret;
3234 1.1 augustss case UHF_C_PORT_CONNECTION:
3235 1.1 augustss case UHF_C_PORT_ENABLE:
3236 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
3237 1.1 augustss case UHF_PORT_CONNECTION:
3238 1.1 augustss case UHF_PORT_OVER_CURRENT:
3239 1.1 augustss case UHF_PORT_LOW_SPEED:
3240 1.1 augustss case UHF_C_PORT_SUSPEND:
3241 1.1 augustss case UHF_C_PORT_RESET:
3242 1.1 augustss default:
3243 1.63 augustss err = USBD_IOERROR;
3244 1.1 augustss goto ret;
3245 1.1 augustss }
3246 1.1 augustss break;
3247 1.1 augustss default:
3248 1.63 augustss err = USBD_IOERROR;
3249 1.1 augustss goto ret;
3250 1.1 augustss }
3251 1.63 augustss xfer->actlen = totlen;
3252 1.63 augustss err = USBD_NORMAL_COMPLETION;
3253 1.1 augustss ret:
3254 1.63 augustss xfer->status = err;
3255 1.52 augustss s = splusb();
3256 1.63 augustss usb_transfer_complete(xfer);
3257 1.52 augustss splx(s);
3258 1.1 augustss return (USBD_IN_PROGRESS);
3259 1.1 augustss }
3260 1.1 augustss
3261 1.1 augustss /* Abort a root control request. */
3262 1.1 augustss void
3263 1.119 augustss uhci_root_ctrl_abort(usbd_xfer_handle xfer)
3264 1.1 augustss {
3265 1.70 augustss /* Nothing to do, all transfers are synchronous. */
3266 1.1 augustss }
3267 1.1 augustss
3268 1.1 augustss /* Close the root pipe. */
3269 1.1 augustss void
3270 1.119 augustss uhci_root_ctrl_close(usbd_pipe_handle pipe)
3271 1.1 augustss {
3272 1.1 augustss DPRINTF(("uhci_root_ctrl_close\n"));
3273 1.1 augustss }
3274 1.1 augustss
3275 1.1 augustss /* Abort a root interrupt request. */
3276 1.1 augustss void
3277 1.119 augustss uhci_root_intr_abort(usbd_xfer_handle xfer)
3278 1.1 augustss {
3279 1.63 augustss uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
3280 1.30 augustss
3281 1.96 augustss usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, xfer);
3282 1.96 augustss sc->sc_intr_xfer = NULL;
3283 1.58 augustss
3284 1.63 augustss if (xfer->pipe->intrxfer == xfer) {
3285 1.58 augustss DPRINTF(("uhci_root_intr_abort: remove\n"));
3286 1.63 augustss xfer->pipe->intrxfer = 0;
3287 1.58 augustss }
3288 1.63 augustss xfer->status = USBD_CANCELLED;
3289 1.96 augustss #ifdef DIAGNOSTIC
3290 1.96 augustss UXFER(xfer)->iinfo.isdone = 1;
3291 1.96 augustss #endif
3292 1.63 augustss usb_transfer_complete(xfer);
3293 1.1 augustss }
3294 1.1 augustss
3295 1.16 augustss usbd_status
3296 1.119 augustss uhci_root_intr_transfer(usbd_xfer_handle xfer)
3297 1.16 augustss {
3298 1.63 augustss usbd_status err;
3299 1.16 augustss
3300 1.52 augustss /* Insert last in queue. */
3301 1.63 augustss err = usb_insert_transfer(xfer);
3302 1.63 augustss if (err)
3303 1.63 augustss return (err);
3304 1.52 augustss
3305 1.67 augustss /* Pipe isn't running (otherwise err would be USBD_INPROG),
3306 1.67 augustss * start first
3307 1.67 augustss */
3308 1.63 augustss return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3309 1.16 augustss }
3310 1.16 augustss
3311 1.1 augustss /* Start a transfer on the root interrupt pipe */
3312 1.1 augustss usbd_status
3313 1.119 augustss uhci_root_intr_start(usbd_xfer_handle xfer)
3314 1.1 augustss {
3315 1.63 augustss usbd_pipe_handle pipe = xfer->pipe;
3316 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
3317 1.1 augustss
3318 1.63 augustss DPRINTFN(3, ("uhci_root_intr_transfer: xfer=%p len=%d flags=%d\n",
3319 1.63 augustss xfer, xfer->length, xfer->flags));
3320 1.82 augustss
3321 1.82 augustss if (sc->sc_dying)
3322 1.82 augustss return (USBD_IOERROR);
3323 1.1 augustss
3324 1.63 augustss sc->sc_ival = MS_TO_TICKS(xfer->pipe->endpoint->edesc->bInterval);
3325 1.96 augustss usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
3326 1.96 augustss sc->sc_intr_xfer = xfer;
3327 1.1 augustss return (USBD_IN_PROGRESS);
3328 1.1 augustss }
3329 1.1 augustss
3330 1.1 augustss /* Close the root interrupt pipe. */
3331 1.1 augustss void
3332 1.119 augustss uhci_root_intr_close(usbd_pipe_handle pipe)
3333 1.1 augustss {
3334 1.30 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
3335 1.30 augustss
3336 1.96 augustss usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, sc->sc_intr_xfer);
3337 1.96 augustss sc->sc_intr_xfer = NULL;
3338 1.1 augustss DPRINTF(("uhci_root_intr_close\n"));
3339 1.1 augustss }
3340