uhci.c revision 1.176 1 1.176 mycroft /* $NetBSD: uhci.c,v 1.176 2003/11/04 19:11:21 mycroft Exp $ */
2 1.67 augustss /* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $ */
3 1.1 augustss
4 1.1 augustss /*
5 1.1 augustss * Copyright (c) 1998 The NetBSD Foundation, Inc.
6 1.1 augustss * All rights reserved.
7 1.1 augustss *
8 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
9 1.113 augustss * by Lennart Augustsson (lennart (at) augustsson.net) at
10 1.11 augustss * Carlstedt Research & Technology.
11 1.1 augustss *
12 1.1 augustss * Redistribution and use in source and binary forms, with or without
13 1.1 augustss * modification, are permitted provided that the following conditions
14 1.1 augustss * are met:
15 1.1 augustss * 1. Redistributions of source code must retain the above copyright
16 1.1 augustss * notice, this list of conditions and the following disclaimer.
17 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
18 1.1 augustss * notice, this list of conditions and the following disclaimer in the
19 1.1 augustss * documentation and/or other materials provided with the distribution.
20 1.1 augustss * 3. All advertising materials mentioning features or use of this software
21 1.1 augustss * must display the following acknowledgement:
22 1.1 augustss * This product includes software developed by the NetBSD
23 1.1 augustss * Foundation, Inc. and its contributors.
24 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
25 1.1 augustss * contributors may be used to endorse or promote products derived
26 1.1 augustss * from this software without specific prior written permission.
27 1.1 augustss *
28 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
39 1.1 augustss */
40 1.1 augustss
41 1.1 augustss /*
42 1.1 augustss * USB Universal Host Controller driver.
43 1.28 augustss * Handles e.g. PIIX3 and PIIX4.
44 1.1 augustss *
45 1.131 augustss * UHCI spec: http://developer.intel.com/design/USB/UHCI11D.htm
46 1.168 ichiro * USB spec: http://www.usb.org/developers/docs/usbspec.zip
47 1.71 augustss * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
48 1.71 augustss * ftp://download.intel.com/design/intarch/datashts/29056201.pdf
49 1.1 augustss */
50 1.143 lukem
51 1.143 lukem #include <sys/cdefs.h>
52 1.176 mycroft __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.176 2003/11/04 19:11:21 mycroft Exp $");
53 1.1 augustss
54 1.1 augustss #include <sys/param.h>
55 1.1 augustss #include <sys/systm.h>
56 1.1 augustss #include <sys/kernel.h>
57 1.1 augustss #include <sys/malloc.h>
58 1.37 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
59 1.1 augustss #include <sys/device.h>
60 1.67 augustss #include <sys/select.h>
61 1.13 augustss #elif defined(__FreeBSD__)
62 1.13 augustss #include <sys/module.h>
63 1.13 augustss #include <sys/bus.h>
64 1.67 augustss #include <machine/bus_pio.h>
65 1.67 augustss #if defined(DIAGNOSTIC) && defined(__i386__)
66 1.67 augustss #include <machine/cpu.h>
67 1.67 augustss #endif
68 1.13 augustss #endif
69 1.1 augustss #include <sys/proc.h>
70 1.1 augustss #include <sys/queue.h>
71 1.1 augustss
72 1.7 augustss #include <machine/bus.h>
73 1.39 augustss #include <machine/endian.h>
74 1.7 augustss
75 1.1 augustss #include <dev/usb/usb.h>
76 1.1 augustss #include <dev/usb/usbdi.h>
77 1.1 augustss #include <dev/usb/usbdivar.h>
78 1.7 augustss #include <dev/usb/usb_mem.h>
79 1.1 augustss #include <dev/usb/usb_quirks.h>
80 1.1 augustss
81 1.1 augustss #include <dev/usb/uhcireg.h>
82 1.1 augustss #include <dev/usb/uhcivar.h>
83 1.1 augustss
84 1.125 augustss /* Use bandwidth reclamation for control transfers. Some devices choke on it. */
85 1.125 augustss /*#define UHCI_CTL_LOOP */
86 1.125 augustss
87 1.13 augustss #if defined(__FreeBSD__)
88 1.13 augustss #include <machine/clock.h>
89 1.13 augustss
90 1.13 augustss #define delay(d) DELAY(d)
91 1.13 augustss #endif
92 1.13 augustss
93 1.37 augustss #if defined(__OpenBSD__)
94 1.37 augustss struct cfdriver uhci_cd = {
95 1.37 augustss NULL, "uhci", DV_DULL
96 1.37 augustss };
97 1.37 augustss #endif
98 1.37 augustss
99 1.67 augustss #ifdef UHCI_DEBUG
100 1.92 augustss uhci_softc_t *thesc;
101 1.59 augustss #define DPRINTF(x) if (uhcidebug) printf x
102 1.59 augustss #define DPRINTFN(n,x) if (uhcidebug>(n)) printf x
103 1.67 augustss int uhcidebug = 0;
104 1.125 augustss int uhcinoloop = 0;
105 1.122 tv #ifndef __NetBSD__
106 1.122 tv #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
107 1.122 tv #endif
108 1.59 augustss #else
109 1.59 augustss #define DPRINTF(x)
110 1.59 augustss #define DPRINTFN(n,x)
111 1.59 augustss #endif
112 1.59 augustss
113 1.39 augustss /*
114 1.39 augustss * The UHCI controller is little endian, so on big endian machines
115 1.39 augustss * the data strored in memory needs to be swapped.
116 1.39 augustss */
117 1.107 augustss #if defined(__FreeBSD__) || defined(__OpenBSD__)
118 1.39 augustss #if BYTE_ORDER == BIG_ENDIAN
119 1.88 tsutsui #define htole32(x) (bswap32(x))
120 1.88 tsutsui #define le32toh(x) (bswap32(x))
121 1.39 augustss #else
122 1.88 tsutsui #define htole32(x) (x)
123 1.88 tsutsui #define le32toh(x) (x)
124 1.88 tsutsui #endif
125 1.39 augustss #endif
126 1.39 augustss
127 1.1 augustss struct uhci_pipe {
128 1.1 augustss struct usbd_pipe pipe;
129 1.32 augustss int nexttoggle;
130 1.92 augustss
131 1.92 augustss u_char aborting;
132 1.92 augustss usbd_xfer_handle abortstart, abortend;
133 1.92 augustss
134 1.1 augustss /* Info needed for different pipe kinds. */
135 1.1 augustss union {
136 1.1 augustss /* Control pipe */
137 1.1 augustss struct {
138 1.1 augustss uhci_soft_qh_t *sqh;
139 1.7 augustss usb_dma_t reqdma;
140 1.16 augustss uhci_soft_td_t *setup, *stat;
141 1.1 augustss u_int length;
142 1.1 augustss } ctl;
143 1.1 augustss /* Interrupt pipe */
144 1.1 augustss struct {
145 1.1 augustss int npoll;
146 1.1 augustss uhci_soft_qh_t **qhs;
147 1.1 augustss } intr;
148 1.1 augustss /* Bulk pipe */
149 1.1 augustss struct {
150 1.1 augustss uhci_soft_qh_t *sqh;
151 1.1 augustss u_int length;
152 1.1 augustss int isread;
153 1.1 augustss } bulk;
154 1.16 augustss /* Iso pipe */
155 1.16 augustss struct iso {
156 1.16 augustss uhci_soft_td_t **stds;
157 1.48 augustss int next, inuse;
158 1.16 augustss } iso;
159 1.1 augustss } u;
160 1.1 augustss };
161 1.1 augustss
162 1.142 augustss Static void uhci_globalreset(uhci_softc_t *);
163 1.166 dsainty Static usbd_status uhci_portreset(uhci_softc_t*, int);
164 1.142 augustss Static void uhci_reset(uhci_softc_t *);
165 1.119 augustss Static void uhci_shutdown(void *v);
166 1.119 augustss Static void uhci_power(int, void *);
167 1.119 augustss Static usbd_status uhci_run(uhci_softc_t *, int run);
168 1.123 augustss Static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *);
169 1.119 augustss Static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *);
170 1.123 augustss Static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *);
171 1.119 augustss Static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *);
172 1.16 augustss #if 0
173 1.119 augustss Static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *,
174 1.119 augustss uhci_intr_info_t *);
175 1.119 augustss Static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *);
176 1.16 augustss #endif
177 1.1 augustss
178 1.152 augustss Static void uhci_free_std_chain(uhci_softc_t *,
179 1.119 augustss uhci_soft_td_t *, uhci_soft_td_t *);
180 1.119 augustss Static usbd_status uhci_alloc_std_chain(struct uhci_pipe *,
181 1.152 augustss uhci_softc_t *, int, int, u_int16_t, usb_dma_t *,
182 1.119 augustss uhci_soft_td_t **, uhci_soft_td_t **);
183 1.119 augustss Static void uhci_poll_hub(void *);
184 1.119 augustss Static void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle);
185 1.119 augustss Static void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *);
186 1.119 augustss Static void uhci_idone(uhci_intr_info_t *);
187 1.119 augustss
188 1.119 augustss Static void uhci_abort_xfer(usbd_xfer_handle, usbd_status status);
189 1.119 augustss
190 1.119 augustss Static void uhci_timeout(void *);
191 1.153 augustss Static void uhci_timeout_task(void *);
192 1.123 augustss Static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
193 1.123 augustss Static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
194 1.119 augustss Static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *);
195 1.123 augustss Static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
196 1.123 augustss Static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
197 1.119 augustss Static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *);
198 1.119 augustss Static int uhci_str(usb_string_descriptor_t *, int, char *);
199 1.123 augustss Static void uhci_add_loop(uhci_softc_t *sc);
200 1.123 augustss Static void uhci_rem_loop(uhci_softc_t *sc);
201 1.119 augustss
202 1.119 augustss Static usbd_status uhci_setup_isoc(usbd_pipe_handle pipe);
203 1.119 augustss Static void uhci_device_isoc_enter(usbd_xfer_handle);
204 1.119 augustss
205 1.119 augustss Static usbd_status uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
206 1.119 augustss Static void uhci_freem(struct usbd_bus *, usb_dma_t *);
207 1.119 augustss
208 1.119 augustss Static usbd_xfer_handle uhci_allocx(struct usbd_bus *);
209 1.119 augustss Static void uhci_freex(struct usbd_bus *, usbd_xfer_handle);
210 1.119 augustss
211 1.119 augustss Static usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle);
212 1.119 augustss Static usbd_status uhci_device_ctrl_start(usbd_xfer_handle);
213 1.119 augustss Static void uhci_device_ctrl_abort(usbd_xfer_handle);
214 1.119 augustss Static void uhci_device_ctrl_close(usbd_pipe_handle);
215 1.119 augustss Static void uhci_device_ctrl_done(usbd_xfer_handle);
216 1.119 augustss
217 1.119 augustss Static usbd_status uhci_device_intr_transfer(usbd_xfer_handle);
218 1.119 augustss Static usbd_status uhci_device_intr_start(usbd_xfer_handle);
219 1.119 augustss Static void uhci_device_intr_abort(usbd_xfer_handle);
220 1.119 augustss Static void uhci_device_intr_close(usbd_pipe_handle);
221 1.119 augustss Static void uhci_device_intr_done(usbd_xfer_handle);
222 1.119 augustss
223 1.119 augustss Static usbd_status uhci_device_bulk_transfer(usbd_xfer_handle);
224 1.119 augustss Static usbd_status uhci_device_bulk_start(usbd_xfer_handle);
225 1.119 augustss Static void uhci_device_bulk_abort(usbd_xfer_handle);
226 1.119 augustss Static void uhci_device_bulk_close(usbd_pipe_handle);
227 1.119 augustss Static void uhci_device_bulk_done(usbd_xfer_handle);
228 1.119 augustss
229 1.119 augustss Static usbd_status uhci_device_isoc_transfer(usbd_xfer_handle);
230 1.119 augustss Static usbd_status uhci_device_isoc_start(usbd_xfer_handle);
231 1.119 augustss Static void uhci_device_isoc_abort(usbd_xfer_handle);
232 1.119 augustss Static void uhci_device_isoc_close(usbd_pipe_handle);
233 1.119 augustss Static void uhci_device_isoc_done(usbd_xfer_handle);
234 1.119 augustss
235 1.119 augustss Static usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle);
236 1.119 augustss Static usbd_status uhci_root_ctrl_start(usbd_xfer_handle);
237 1.119 augustss Static void uhci_root_ctrl_abort(usbd_xfer_handle);
238 1.119 augustss Static void uhci_root_ctrl_close(usbd_pipe_handle);
239 1.119 augustss Static void uhci_root_ctrl_done(usbd_xfer_handle);
240 1.119 augustss
241 1.119 augustss Static usbd_status uhci_root_intr_transfer(usbd_xfer_handle);
242 1.119 augustss Static usbd_status uhci_root_intr_start(usbd_xfer_handle);
243 1.119 augustss Static void uhci_root_intr_abort(usbd_xfer_handle);
244 1.119 augustss Static void uhci_root_intr_close(usbd_pipe_handle);
245 1.119 augustss Static void uhci_root_intr_done(usbd_xfer_handle);
246 1.119 augustss
247 1.119 augustss Static usbd_status uhci_open(usbd_pipe_handle);
248 1.119 augustss Static void uhci_poll(struct usbd_bus *);
249 1.133 augustss Static void uhci_softintr(void *);
250 1.119 augustss
251 1.119 augustss Static usbd_status uhci_device_request(usbd_xfer_handle xfer);
252 1.119 augustss
253 1.119 augustss Static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *);
254 1.158 augustss Static void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *);
255 1.152 augustss Static usbd_status uhci_device_setintr(uhci_softc_t *sc,
256 1.119 augustss struct uhci_pipe *pipe, int ival);
257 1.119 augustss
258 1.119 augustss Static void uhci_device_clear_toggle(usbd_pipe_handle pipe);
259 1.119 augustss Static void uhci_noop(usbd_pipe_handle pipe);
260 1.119 augustss
261 1.119 augustss Static __inline__ uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *,
262 1.119 augustss uhci_soft_qh_t *);
263 1.119 augustss
264 1.119 augustss #ifdef UHCI_DEBUG
265 1.119 augustss Static void uhci_dump_all(uhci_softc_t *);
266 1.119 augustss Static void uhci_dumpregs(uhci_softc_t *);
267 1.119 augustss Static void uhci_dump_qhs(uhci_soft_qh_t *);
268 1.119 augustss Static void uhci_dump_qh(uhci_soft_qh_t *);
269 1.119 augustss Static void uhci_dump_tds(uhci_soft_td_t *);
270 1.119 augustss Static void uhci_dump_td(uhci_soft_td_t *);
271 1.119 augustss Static void uhci_dump_ii(uhci_intr_info_t *ii);
272 1.119 augustss void uhci_dump(void);
273 1.1 augustss #endif
274 1.1 augustss
275 1.112 augustss #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
276 1.112 augustss BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
277 1.112 augustss #define UWRITE1(sc, r, x) \
278 1.165 dsainty do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \
279 1.165 dsainty } while (/*CONSTCOND*/0)
280 1.112 augustss #define UWRITE2(sc, r, x) \
281 1.165 dsainty do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \
282 1.165 dsainty } while (/*CONSTCOND*/0)
283 1.112 augustss #define UWRITE4(sc, r, x) \
284 1.165 dsainty do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \
285 1.165 dsainty } while (/*CONSTCOND*/0)
286 1.112 augustss #define UREAD1(sc, r) (UBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r)))
287 1.112 augustss #define UREAD2(sc, r) (UBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r)))
288 1.112 augustss #define UREAD4(sc, r) (UBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r)))
289 1.1 augustss
290 1.1 augustss #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
291 1.1 augustss #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
292 1.1 augustss
293 1.142 augustss #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */
294 1.1 augustss
295 1.1 augustss #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
296 1.1 augustss
297 1.1 augustss #define UHCI_INTR_ENDPT 1
298 1.1 augustss
299 1.48 augustss struct usbd_bus_methods uhci_bus_methods = {
300 1.48 augustss uhci_open,
301 1.85 augustss uhci_softintr,
302 1.48 augustss uhci_poll,
303 1.48 augustss uhci_allocm,
304 1.48 augustss uhci_freem,
305 1.76 augustss uhci_allocx,
306 1.76 augustss uhci_freex,
307 1.48 augustss };
308 1.48 augustss
309 1.152 augustss struct usbd_pipe_methods uhci_root_ctrl_methods = {
310 1.1 augustss uhci_root_ctrl_transfer,
311 1.16 augustss uhci_root_ctrl_start,
312 1.1 augustss uhci_root_ctrl_abort,
313 1.1 augustss uhci_root_ctrl_close,
314 1.38 augustss uhci_noop,
315 1.84 augustss uhci_root_ctrl_done,
316 1.1 augustss };
317 1.1 augustss
318 1.152 augustss struct usbd_pipe_methods uhci_root_intr_methods = {
319 1.1 augustss uhci_root_intr_transfer,
320 1.16 augustss uhci_root_intr_start,
321 1.1 augustss uhci_root_intr_abort,
322 1.1 augustss uhci_root_intr_close,
323 1.38 augustss uhci_noop,
324 1.41 augustss uhci_root_intr_done,
325 1.1 augustss };
326 1.1 augustss
327 1.48 augustss struct usbd_pipe_methods uhci_device_ctrl_methods = {
328 1.1 augustss uhci_device_ctrl_transfer,
329 1.16 augustss uhci_device_ctrl_start,
330 1.1 augustss uhci_device_ctrl_abort,
331 1.1 augustss uhci_device_ctrl_close,
332 1.38 augustss uhci_noop,
333 1.41 augustss uhci_device_ctrl_done,
334 1.1 augustss };
335 1.1 augustss
336 1.48 augustss struct usbd_pipe_methods uhci_device_intr_methods = {
337 1.1 augustss uhci_device_intr_transfer,
338 1.16 augustss uhci_device_intr_start,
339 1.1 augustss uhci_device_intr_abort,
340 1.1 augustss uhci_device_intr_close,
341 1.38 augustss uhci_device_clear_toggle,
342 1.41 augustss uhci_device_intr_done,
343 1.1 augustss };
344 1.1 augustss
345 1.48 augustss struct usbd_pipe_methods uhci_device_bulk_methods = {
346 1.1 augustss uhci_device_bulk_transfer,
347 1.16 augustss uhci_device_bulk_start,
348 1.1 augustss uhci_device_bulk_abort,
349 1.1 augustss uhci_device_bulk_close,
350 1.38 augustss uhci_device_clear_toggle,
351 1.41 augustss uhci_device_bulk_done,
352 1.1 augustss };
353 1.1 augustss
354 1.48 augustss struct usbd_pipe_methods uhci_device_isoc_methods = {
355 1.16 augustss uhci_device_isoc_transfer,
356 1.16 augustss uhci_device_isoc_start,
357 1.16 augustss uhci_device_isoc_abort,
358 1.16 augustss uhci_device_isoc_close,
359 1.38 augustss uhci_noop,
360 1.41 augustss uhci_device_isoc_done,
361 1.16 augustss };
362 1.16 augustss
363 1.92 augustss #define uhci_add_intr_info(sc, ii) \
364 1.169 augustss LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list)
365 1.92 augustss #define uhci_del_intr_info(ii) \
366 1.169 augustss do { \
367 1.169 augustss LIST_REMOVE((ii), list); \
368 1.169 augustss (ii)->list.le_prev = NULL; \
369 1.169 augustss } while (0)
370 1.169 augustss #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL)
371 1.92 augustss
372 1.101 augustss Static __inline__ uhci_soft_qh_t *
373 1.119 augustss uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh)
374 1.92 augustss {
375 1.92 augustss DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh));
376 1.92 augustss
377 1.92 augustss for (; pqh->hlink != sqh; pqh = pqh->hlink) {
378 1.152 augustss #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG)
379 1.92 augustss if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) {
380 1.102 augustss printf("uhci_find_prev_qh: QH not found\n");
381 1.92 augustss return (NULL);
382 1.92 augustss }
383 1.92 augustss #endif
384 1.92 augustss }
385 1.92 augustss return (pqh);
386 1.92 augustss }
387 1.92 augustss
388 1.1 augustss void
389 1.142 augustss uhci_globalreset(uhci_softc_t *sc)
390 1.1 augustss {
391 1.1 augustss UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */
392 1.20 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
393 1.1 augustss UHCICMD(sc, 0); /* do nothing */
394 1.1 augustss }
395 1.1 augustss
396 1.1 augustss usbd_status
397 1.119 augustss uhci_init(uhci_softc_t *sc)
398 1.1 augustss {
399 1.63 augustss usbd_status err;
400 1.1 augustss int i, j;
401 1.123 augustss uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh;
402 1.1 augustss uhci_soft_td_t *std;
403 1.1 augustss
404 1.1 augustss DPRINTFN(1,("uhci_init: start\n"));
405 1.1 augustss
406 1.67 augustss #ifdef UHCI_DEBUG
407 1.92 augustss thesc = sc;
408 1.92 augustss
409 1.1 augustss if (uhcidebug > 2)
410 1.1 augustss uhci_dumpregs(sc);
411 1.1 augustss #endif
412 1.1 augustss
413 1.1 augustss UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
414 1.142 augustss uhci_globalreset(sc); /* reset the controller */
415 1.142 augustss uhci_reset(sc);
416 1.24 augustss
417 1.1 augustss /* Allocate and initialize real frame array. */
418 1.152 augustss err = usb_allocmem(&sc->sc_bus,
419 1.63 augustss UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
420 1.63 augustss UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
421 1.63 augustss if (err)
422 1.63 augustss return (err);
423 1.159 augustss sc->sc_pframes = KERNADDR(&sc->sc_dma, 0);
424 1.1 augustss UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */
425 1.160 augustss UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/
426 1.1 augustss
427 1.152 augustss /*
428 1.123 augustss * Allocate a TD, inactive, that hangs from the last QH.
429 1.123 augustss * This is to avoid a bug in the PIIX that makes it run berserk
430 1.123 augustss * otherwise.
431 1.123 augustss */
432 1.123 augustss std = uhci_alloc_std(sc);
433 1.123 augustss if (std == NULL)
434 1.123 augustss return (USBD_NOMEM);
435 1.123 augustss std->link.std = NULL;
436 1.123 augustss std->td.td_link = htole32(UHCI_PTR_T);
437 1.123 augustss std->td.td_status = htole32(0); /* inactive */
438 1.123 augustss std->td.td_token = htole32(0);
439 1.123 augustss std->td.td_buffer = htole32(0);
440 1.123 augustss
441 1.123 augustss /* Allocate the dummy QH marking the end and used for looping the QHs.*/
442 1.123 augustss lsqh = uhci_alloc_sqh(sc);
443 1.123 augustss if (lsqh == NULL)
444 1.123 augustss return (USBD_NOMEM);
445 1.123 augustss lsqh->hlink = NULL;
446 1.123 augustss lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */
447 1.123 augustss lsqh->elink = std;
448 1.123 augustss lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD);
449 1.123 augustss sc->sc_last_qh = lsqh;
450 1.123 augustss
451 1.1 augustss /* Allocate the dummy QH where bulk traffic will be queued. */
452 1.1 augustss bsqh = uhci_alloc_sqh(sc);
453 1.63 augustss if (bsqh == NULL)
454 1.1 augustss return (USBD_NOMEM);
455 1.123 augustss bsqh->hlink = lsqh;
456 1.123 augustss bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH);
457 1.121 augustss bsqh->elink = NULL;
458 1.88 tsutsui bsqh->qh.qh_elink = htole32(UHCI_PTR_T);
459 1.1 augustss sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
460 1.1 augustss
461 1.123 augustss /* Allocate dummy QH where high speed control traffic will be queued. */
462 1.123 augustss chsqh = uhci_alloc_sqh(sc);
463 1.123 augustss if (chsqh == NULL)
464 1.123 augustss return (USBD_NOMEM);
465 1.123 augustss chsqh->hlink = bsqh;
466 1.123 augustss chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH);
467 1.123 augustss chsqh->elink = NULL;
468 1.123 augustss chsqh->qh.qh_elink = htole32(UHCI_PTR_T);
469 1.123 augustss sc->sc_hctl_start = sc->sc_hctl_end = chsqh;
470 1.123 augustss
471 1.123 augustss /* Allocate dummy QH where control traffic will be queued. */
472 1.123 augustss clsqh = uhci_alloc_sqh(sc);
473 1.123 augustss if (clsqh == NULL)
474 1.1 augustss return (USBD_NOMEM);
475 1.123 augustss clsqh->hlink = bsqh;
476 1.123 augustss clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH);
477 1.123 augustss clsqh->elink = NULL;
478 1.123 augustss clsqh->qh.qh_elink = htole32(UHCI_PTR_T);
479 1.123 augustss sc->sc_lctl_start = sc->sc_lctl_end = clsqh;
480 1.1 augustss
481 1.152 augustss /*
482 1.1 augustss * Make all (virtual) frame list pointers point to the interrupt
483 1.1 augustss * queue heads and the interrupt queue heads at the control
484 1.1 augustss * queue head and point the physical frame list to the virtual.
485 1.1 augustss */
486 1.1 augustss for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
487 1.1 augustss std = uhci_alloc_std(sc);
488 1.1 augustss sqh = uhci_alloc_sqh(sc);
489 1.67 augustss if (std == NULL || sqh == NULL)
490 1.13 augustss return (USBD_NOMEM);
491 1.42 augustss std->link.sqh = sqh;
492 1.121 augustss std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH);
493 1.88 tsutsui std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
494 1.88 tsutsui std->td.td_token = htole32(0);
495 1.88 tsutsui std->td.td_buffer = htole32(0);
496 1.123 augustss sqh->hlink = clsqh;
497 1.123 augustss sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH);
498 1.121 augustss sqh->elink = NULL;
499 1.88 tsutsui sqh->qh.qh_elink = htole32(UHCI_PTR_T);
500 1.1 augustss sc->sc_vframes[i].htd = std;
501 1.1 augustss sc->sc_vframes[i].etd = std;
502 1.1 augustss sc->sc_vframes[i].hqh = sqh;
503 1.1 augustss sc->sc_vframes[i].eqh = sqh;
504 1.152 augustss for (j = i;
505 1.152 augustss j < UHCI_FRAMELIST_COUNT;
506 1.1 augustss j += UHCI_VFRAMELIST_COUNT)
507 1.88 tsutsui sc->sc_pframes[j] = htole32(std->physaddr);
508 1.1 augustss }
509 1.1 augustss
510 1.1 augustss LIST_INIT(&sc->sc_intrhead);
511 1.1 augustss
512 1.76 augustss SIMPLEQ_INIT(&sc->sc_free_xfers);
513 1.76 augustss
514 1.96 augustss usb_callout_init(sc->sc_poll_handle);
515 1.96 augustss
516 1.1 augustss /* Set up the bus struct. */
517 1.48 augustss sc->sc_bus.methods = &uhci_bus_methods;
518 1.1 augustss sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
519 1.1 augustss
520 1.92 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
521 1.30 augustss sc->sc_suspend = PWR_RESUME;
522 1.53 augustss sc->sc_powerhook = powerhook_establish(uhci_power, sc);
523 1.72 augustss sc->sc_shutdownhook = shutdownhook_establish(uhci_shutdown, sc);
524 1.92 augustss #endif
525 1.72 augustss
526 1.1 augustss DPRINTFN(1,("uhci_init: enabling\n"));
527 1.152 augustss UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
528 1.1 augustss UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */
529 1.1 augustss
530 1.71 augustss UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */
531 1.71 augustss
532 1.16 augustss return (uhci_run(sc, 1)); /* and here we go... */
533 1.53 augustss }
534 1.53 augustss
535 1.67 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
536 1.53 augustss int
537 1.119 augustss uhci_activate(device_ptr_t self, enum devact act)
538 1.53 augustss {
539 1.56 augustss struct uhci_softc *sc = (struct uhci_softc *)self;
540 1.53 augustss int rv = 0;
541 1.53 augustss
542 1.53 augustss switch (act) {
543 1.53 augustss case DVACT_ACTIVATE:
544 1.53 augustss return (EOPNOTSUPP);
545 1.53 augustss
546 1.53 augustss case DVACT_DEACTIVATE:
547 1.56 augustss if (sc->sc_child != NULL)
548 1.56 augustss rv = config_deactivate(sc->sc_child);
549 1.53 augustss break;
550 1.53 augustss }
551 1.53 augustss return (rv);
552 1.53 augustss }
553 1.53 augustss
554 1.53 augustss int
555 1.119 augustss uhci_detach(struct uhci_softc *sc, int flags)
556 1.53 augustss {
557 1.76 augustss usbd_xfer_handle xfer;
558 1.53 augustss int rv = 0;
559 1.53 augustss
560 1.53 augustss if (sc->sc_child != NULL)
561 1.53 augustss rv = config_detach(sc->sc_child, flags);
562 1.152 augustss
563 1.53 augustss if (rv != 0)
564 1.53 augustss return (rv);
565 1.53 augustss
566 1.92 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
567 1.53 augustss powerhook_disestablish(sc->sc_powerhook);
568 1.72 augustss shutdownhook_disestablish(sc->sc_shutdownhook);
569 1.92 augustss #endif
570 1.72 augustss
571 1.76 augustss /* Free all xfers associated with this HC. */
572 1.76 augustss for (;;) {
573 1.76 augustss xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
574 1.76 augustss if (xfer == NULL)
575 1.76 augustss break;
576 1.161 lukem SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
577 1.76 augustss free(xfer, M_USB);
578 1.152 augustss }
579 1.76 augustss
580 1.76 augustss /* XXX free other data structures XXX */
581 1.53 augustss
582 1.53 augustss return (rv);
583 1.1 augustss }
584 1.67 augustss #endif
585 1.1 augustss
586 1.48 augustss usbd_status
587 1.119 augustss uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
588 1.48 augustss {
589 1.102 augustss struct uhci_softc *sc = (struct uhci_softc *)bus;
590 1.102 augustss u_int32_t n;
591 1.102 augustss
592 1.152 augustss /*
593 1.102 augustss * XXX
594 1.102 augustss * Since we are allocating a buffer we can assume that we will
595 1.148 augustss * need TDs for it. Since we don't want to allocate those from
596 1.102 augustss * an interrupt context, we allocate them here and free them again.
597 1.102 augustss * This is no guarantee that we'll get the TDs next time...
598 1.102 augustss */
599 1.102 augustss n = size / 8;
600 1.102 augustss if (n > 16) {
601 1.102 augustss u_int32_t i;
602 1.102 augustss uhci_soft_td_t **stds;
603 1.102 augustss DPRINTF(("uhci_allocm: get %d TDs\n", n));
604 1.150 tsutsui stds = malloc(sizeof(uhci_soft_td_t *) * n, M_TEMP,
605 1.151 augustss M_WAITOK|M_ZERO);
606 1.102 augustss for(i=0; i < n; i++)
607 1.102 augustss stds[i] = uhci_alloc_std(sc);
608 1.102 augustss for(i=0; i < n; i++)
609 1.102 augustss if (stds[i] != NULL)
610 1.102 augustss uhci_free_std(sc, stds[i]);
611 1.102 augustss free(stds, M_TEMP);
612 1.102 augustss }
613 1.102 augustss
614 1.102 augustss return (usb_allocmem(&sc->sc_bus, size, 0, dma));
615 1.48 augustss }
616 1.48 augustss
617 1.48 augustss void
618 1.119 augustss uhci_freem(struct usbd_bus *bus, usb_dma_t *dma)
619 1.48 augustss {
620 1.63 augustss usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma);
621 1.76 augustss }
622 1.76 augustss
623 1.76 augustss usbd_xfer_handle
624 1.119 augustss uhci_allocx(struct usbd_bus *bus)
625 1.76 augustss {
626 1.76 augustss struct uhci_softc *sc = (struct uhci_softc *)bus;
627 1.76 augustss usbd_xfer_handle xfer;
628 1.76 augustss
629 1.76 augustss xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
630 1.94 augustss if (xfer != NULL) {
631 1.161 lukem SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
632 1.98 augustss #ifdef DIAGNOSTIC
633 1.94 augustss if (xfer->busy_free != XFER_FREE) {
634 1.105 augustss printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer,
635 1.94 augustss xfer->busy_free);
636 1.94 augustss }
637 1.98 augustss #endif
638 1.94 augustss } else {
639 1.92 augustss xfer = malloc(sizeof(struct uhci_xfer), M_USB, M_NOWAIT);
640 1.94 augustss }
641 1.92 augustss if (xfer != NULL) {
642 1.92 augustss memset(xfer, 0, sizeof (struct uhci_xfer));
643 1.92 augustss UXFER(xfer)->iinfo.sc = sc;
644 1.92 augustss #ifdef DIAGNOSTIC
645 1.92 augustss UXFER(xfer)->iinfo.isdone = 1;
646 1.135 augustss xfer->busy_free = XFER_BUSY;
647 1.92 augustss #endif
648 1.92 augustss }
649 1.76 augustss return (xfer);
650 1.76 augustss }
651 1.76 augustss
652 1.76 augustss void
653 1.119 augustss uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
654 1.76 augustss {
655 1.76 augustss struct uhci_softc *sc = (struct uhci_softc *)bus;
656 1.76 augustss
657 1.93 augustss #ifdef DIAGNOSTIC
658 1.94 augustss if (xfer->busy_free != XFER_BUSY) {
659 1.94 augustss printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer,
660 1.94 augustss xfer->busy_free);
661 1.93 augustss return;
662 1.93 augustss }
663 1.94 augustss xfer->busy_free = XFER_FREE;
664 1.105 augustss if (!UXFER(xfer)->iinfo.isdone) {
665 1.96 augustss printf("uhci_freex: !isdone\n");
666 1.105 augustss return;
667 1.105 augustss }
668 1.93 augustss #endif
669 1.76 augustss SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
670 1.48 augustss }
671 1.48 augustss
672 1.72 augustss /*
673 1.72 augustss * Shut down the controller when the system is going down.
674 1.72 augustss */
675 1.72 augustss void
676 1.119 augustss uhci_shutdown(void *v)
677 1.72 augustss {
678 1.72 augustss uhci_softc_t *sc = v;
679 1.72 augustss
680 1.72 augustss DPRINTF(("uhci_shutdown: stopping the HC\n"));
681 1.72 augustss uhci_run(sc, 0); /* stop the controller */
682 1.72 augustss }
683 1.72 augustss
684 1.30 augustss /*
685 1.30 augustss * Handle suspend/resume.
686 1.30 augustss *
687 1.40 augustss * We need to switch to polling mode here, because this routine is
688 1.109 augustss * called from an interrupt context. This is all right since we
689 1.40 augustss * are almost suspended anyway.
690 1.30 augustss */
691 1.30 augustss void
692 1.119 augustss uhci_power(int why, void *v)
693 1.30 augustss {
694 1.30 augustss uhci_softc_t *sc = v;
695 1.30 augustss int cmd;
696 1.30 augustss int s;
697 1.30 augustss
698 1.132 augustss s = splhardusb();
699 1.30 augustss cmd = UREAD2(sc, UHCI_CMD);
700 1.30 augustss
701 1.152 augustss DPRINTF(("uhci_power: sc=%p, why=%d (was %d), cmd=0x%x\n",
702 1.30 augustss sc, why, sc->sc_suspend, cmd));
703 1.30 augustss
704 1.128 takemura switch (why) {
705 1.128 takemura case PWR_SUSPEND:
706 1.128 takemura case PWR_STANDBY:
707 1.67 augustss #ifdef UHCI_DEBUG
708 1.30 augustss if (uhcidebug > 2)
709 1.30 augustss uhci_dumpregs(sc);
710 1.30 augustss #endif
711 1.96 augustss if (sc->sc_intr_xfer != NULL)
712 1.96 augustss usb_uncallout(sc->sc_poll_handle, uhci_poll_hub,
713 1.96 augustss sc->sc_intr_xfer);
714 1.54 augustss sc->sc_bus.use_polling++;
715 1.30 augustss uhci_run(sc, 0); /* stop the controller */
716 1.86 augustss
717 1.86 augustss /* save some state if BIOS doesn't */
718 1.86 augustss sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM);
719 1.86 augustss sc->sc_saved_sof = UREAD1(sc, UHCI_SOF);
720 1.88 tsutsui
721 1.134 augustss UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */
722 1.134 augustss
723 1.30 augustss UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */
724 1.40 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
725 1.30 augustss sc->sc_suspend = why;
726 1.61 augustss sc->sc_bus.use_polling--;
727 1.30 augustss DPRINTF(("uhci_power: cmd=0x%x\n", UREAD2(sc, UHCI_CMD)));
728 1.128 takemura break;
729 1.128 takemura case PWR_RESUME:
730 1.60 augustss #ifdef DIAGNOSTIC
731 1.61 augustss if (sc->sc_suspend == PWR_RESUME)
732 1.61 augustss printf("uhci_power: weird, resume without suspend.\n");
733 1.60 augustss #endif
734 1.61 augustss sc->sc_bus.use_polling++;
735 1.30 augustss sc->sc_suspend = why;
736 1.30 augustss if (cmd & UHCI_CMD_RS)
737 1.30 augustss uhci_run(sc, 0); /* in case BIOS has started it */
738 1.86 augustss
739 1.86 augustss /* restore saved state */
740 1.160 augustss UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0));
741 1.86 augustss UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum);
742 1.86 augustss UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof);
743 1.86 augustss
744 1.30 augustss UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */
745 1.40 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
746 1.30 augustss UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
747 1.167 augustss UHCICMD(sc, UHCI_CMD_MAXP);
748 1.152 augustss UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
749 1.30 augustss UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */
750 1.30 augustss uhci_run(sc, 1); /* and start traffic again */
751 1.40 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
752 1.54 augustss sc->sc_bus.use_polling--;
753 1.96 augustss if (sc->sc_intr_xfer != NULL)
754 1.96 augustss usb_callout(sc->sc_poll_handle, sc->sc_ival,
755 1.96 augustss uhci_poll_hub, sc->sc_intr_xfer);
756 1.67 augustss #ifdef UHCI_DEBUG
757 1.30 augustss if (uhcidebug > 2)
758 1.30 augustss uhci_dumpregs(sc);
759 1.30 augustss #endif
760 1.128 takemura break;
761 1.128 takemura case PWR_SOFTSUSPEND:
762 1.128 takemura case PWR_SOFTSTANDBY:
763 1.128 takemura case PWR_SOFTRESUME:
764 1.128 takemura break;
765 1.30 augustss }
766 1.30 augustss splx(s);
767 1.30 augustss }
768 1.30 augustss
769 1.59 augustss #ifdef UHCI_DEBUG
770 1.101 augustss Static void
771 1.119 augustss uhci_dumpregs(uhci_softc_t *sc)
772 1.1 augustss {
773 1.48 augustss DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
774 1.48 augustss "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
775 1.48 augustss USBDEVNAME(sc->sc_bus.bdev),
776 1.48 augustss UREAD2(sc, UHCI_CMD),
777 1.48 augustss UREAD2(sc, UHCI_STS),
778 1.48 augustss UREAD2(sc, UHCI_INTR),
779 1.48 augustss UREAD2(sc, UHCI_FRNUM),
780 1.48 augustss UREAD4(sc, UHCI_FLBASEADDR),
781 1.48 augustss UREAD1(sc, UHCI_SOF),
782 1.48 augustss UREAD2(sc, UHCI_PORTSC1),
783 1.48 augustss UREAD2(sc, UHCI_PORTSC2)));
784 1.1 augustss }
785 1.1 augustss
786 1.1 augustss void
787 1.119 augustss uhci_dump_td(uhci_soft_td_t *p)
788 1.1 augustss {
789 1.122 tv char sbuf[128], sbuf2[128];
790 1.122 tv
791 1.48 augustss DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
792 1.48 augustss "token=0x%08lx buffer=0x%08lx\n",
793 1.48 augustss p, (long)p->physaddr,
794 1.88 tsutsui (long)le32toh(p->td.td_link),
795 1.88 tsutsui (long)le32toh(p->td.td_status),
796 1.88 tsutsui (long)le32toh(p->td.td_token),
797 1.88 tsutsui (long)le32toh(p->td.td_buffer)));
798 1.122 tv
799 1.147 augustss bitmask_snprintf((u_int32_t)le32toh(p->td.td_link), "\20\1T\2Q\3VF",
800 1.122 tv sbuf, sizeof(sbuf));
801 1.147 augustss bitmask_snprintf((u_int32_t)le32toh(p->td.td_status),
802 1.122 tv "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
803 1.122 tv "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
804 1.122 tv sbuf2, sizeof(sbuf2));
805 1.122 tv
806 1.122 tv DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
807 1.122 tv "D=%d,maxlen=%d\n", sbuf, sbuf2,
808 1.88 tsutsui UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)),
809 1.88 tsutsui UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)),
810 1.88 tsutsui UHCI_TD_GET_PID(le32toh(p->td.td_token)),
811 1.88 tsutsui UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)),
812 1.88 tsutsui UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)),
813 1.88 tsutsui UHCI_TD_GET_DT(le32toh(p->td.td_token)),
814 1.88 tsutsui UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token))));
815 1.1 augustss }
816 1.1 augustss
817 1.1 augustss void
818 1.119 augustss uhci_dump_qh(uhci_soft_qh_t *sqh)
819 1.1 augustss {
820 1.67 augustss DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh,
821 1.88 tsutsui (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink),
822 1.88 tsutsui le32toh(sqh->qh.qh_elink)));
823 1.1 augustss }
824 1.1 augustss
825 1.13 augustss
826 1.110 augustss #if 1
827 1.1 augustss void
828 1.119 augustss uhci_dump(void)
829 1.1 augustss {
830 1.110 augustss uhci_dump_all(thesc);
831 1.110 augustss }
832 1.110 augustss #endif
833 1.1 augustss
834 1.110 augustss void
835 1.119 augustss uhci_dump_all(uhci_softc_t *sc)
836 1.110 augustss {
837 1.1 augustss uhci_dumpregs(sc);
838 1.50 augustss printf("intrs=%d\n", sc->sc_bus.no_intrs);
839 1.110 augustss /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/
840 1.123 augustss uhci_dump_qh(sc->sc_lctl_start);
841 1.1 augustss }
842 1.1 augustss
843 1.67 augustss
844 1.67 augustss void
845 1.119 augustss uhci_dump_qhs(uhci_soft_qh_t *sqh)
846 1.67 augustss {
847 1.67 augustss uhci_dump_qh(sqh);
848 1.67 augustss
849 1.67 augustss /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards
850 1.67 augustss * Traverses sideways first, then down.
851 1.67 augustss *
852 1.67 augustss * QH1
853 1.67 augustss * QH2
854 1.67 augustss * No QH
855 1.67 augustss * TD2.1
856 1.67 augustss * TD2.2
857 1.67 augustss * TD1.1
858 1.67 augustss * etc.
859 1.67 augustss *
860 1.67 augustss * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
861 1.67 augustss */
862 1.67 augustss
863 1.67 augustss
864 1.88 tsutsui if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T))
865 1.67 augustss uhci_dump_qhs(sqh->hlink);
866 1.67 augustss else
867 1.67 augustss DPRINTF(("No QH\n"));
868 1.67 augustss
869 1.88 tsutsui if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T))
870 1.67 augustss uhci_dump_tds(sqh->elink);
871 1.67 augustss else
872 1.67 augustss DPRINTF(("No TD\n"));
873 1.67 augustss }
874 1.67 augustss
875 1.1 augustss void
876 1.119 augustss uhci_dump_tds(uhci_soft_td_t *std)
877 1.1 augustss {
878 1.67 augustss uhci_soft_td_t *td;
879 1.67 augustss
880 1.67 augustss for(td = std; td != NULL; td = td->link.std) {
881 1.67 augustss uhci_dump_td(td);
882 1.1 augustss
883 1.67 augustss /* Check whether the link pointer in this TD marks
884 1.67 augustss * the link pointer as end of queue. This avoids
885 1.67 augustss * printing the free list in case the queue/TD has
886 1.67 augustss * already been moved there (seatbelt).
887 1.67 augustss */
888 1.88 tsutsui if (le32toh(td->td.td_link) & UHCI_PTR_T ||
889 1.88 tsutsui le32toh(td->td.td_link) == 0)
890 1.67 augustss break;
891 1.67 augustss }
892 1.1 augustss }
893 1.92 augustss
894 1.101 augustss Static void
895 1.119 augustss uhci_dump_ii(uhci_intr_info_t *ii)
896 1.92 augustss {
897 1.95 augustss usbd_pipe_handle pipe;
898 1.95 augustss usb_endpoint_descriptor_t *ed;
899 1.95 augustss usbd_device_handle dev;
900 1.152 augustss
901 1.98 augustss #ifdef DIAGNOSTIC
902 1.98 augustss #define DONE ii->isdone
903 1.98 augustss #else
904 1.98 augustss #define DONE 0
905 1.98 augustss #endif
906 1.95 augustss if (ii == NULL) {
907 1.95 augustss printf("ii NULL\n");
908 1.95 augustss return;
909 1.95 augustss }
910 1.95 augustss if (ii->xfer == NULL) {
911 1.95 augustss printf("ii %p: done=%d xfer=NULL\n",
912 1.98 augustss ii, DONE);
913 1.95 augustss return;
914 1.95 augustss }
915 1.95 augustss pipe = ii->xfer->pipe;
916 1.95 augustss if (pipe == NULL) {
917 1.95 augustss printf("ii %p: done=%d xfer=%p pipe=NULL\n",
918 1.98 augustss ii, DONE, ii->xfer);
919 1.139 augustss return;
920 1.139 augustss }
921 1.139 augustss if (pipe->endpoint == NULL) {
922 1.139 augustss printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n",
923 1.139 augustss ii, DONE, ii->xfer, pipe);
924 1.139 augustss return;
925 1.139 augustss }
926 1.139 augustss if (pipe->device == NULL) {
927 1.139 augustss printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n",
928 1.139 augustss ii, DONE, ii->xfer, pipe);
929 1.95 augustss return;
930 1.95 augustss }
931 1.95 augustss ed = pipe->endpoint->edesc;
932 1.95 augustss dev = pipe->device;
933 1.152 augustss printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n",
934 1.152 augustss ii, DONE, ii->xfer, dev,
935 1.95 augustss UGETW(dev->ddesc.idVendor),
936 1.92 augustss UGETW(dev->ddesc.idProduct),
937 1.92 augustss dev->address, pipe,
938 1.92 augustss ed->bEndpointAddress, ed->bmAttributes);
939 1.98 augustss #undef DONE
940 1.92 augustss }
941 1.92 augustss
942 1.120 augustss void uhci_dump_iis(struct uhci_softc *sc);
943 1.92 augustss void
944 1.119 augustss uhci_dump_iis(struct uhci_softc *sc)
945 1.92 augustss {
946 1.92 augustss uhci_intr_info_t *ii;
947 1.92 augustss
948 1.92 augustss printf("intr_info list:\n");
949 1.92 augustss for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
950 1.92 augustss uhci_dump_ii(ii);
951 1.92 augustss }
952 1.92 augustss
953 1.120 augustss void iidump(void);
954 1.119 augustss void iidump(void) { uhci_dump_iis(thesc); }
955 1.92 augustss
956 1.1 augustss #endif
957 1.1 augustss
958 1.1 augustss /*
959 1.1 augustss * This routine is executed periodically and simulates interrupts
960 1.1 augustss * from the root controller interrupt pipe for port status change.
961 1.1 augustss */
962 1.1 augustss void
963 1.119 augustss uhci_poll_hub(void *addr)
964 1.1 augustss {
965 1.63 augustss usbd_xfer_handle xfer = addr;
966 1.63 augustss usbd_pipe_handle pipe = xfer->pipe;
967 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
968 1.1 augustss int s;
969 1.1 augustss u_char *p;
970 1.1 augustss
971 1.96 augustss DPRINTFN(20, ("uhci_poll_hub\n"));
972 1.1 augustss
973 1.96 augustss usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
974 1.41 augustss
975 1.159 augustss p = KERNADDR(&xfer->dmabuf, 0);
976 1.1 augustss p[0] = 0;
977 1.1 augustss if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
978 1.1 augustss p[0] |= 1<<1;
979 1.1 augustss if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
980 1.1 augustss p[0] |= 1<<2;
981 1.41 augustss if (p[0] == 0)
982 1.41 augustss /* No change, try again in a while */
983 1.41 augustss return;
984 1.41 augustss
985 1.63 augustss xfer->actlen = 1;
986 1.63 augustss xfer->status = USBD_NORMAL_COMPLETION;
987 1.16 augustss s = splusb();
988 1.63 augustss xfer->device->bus->intr_context++;
989 1.63 augustss usb_transfer_complete(xfer);
990 1.63 augustss xfer->device->bus->intr_context--;
991 1.41 augustss splx(s);
992 1.41 augustss }
993 1.41 augustss
994 1.41 augustss void
995 1.119 augustss uhci_root_intr_done(usbd_xfer_handle xfer)
996 1.84 augustss {
997 1.84 augustss }
998 1.84 augustss
999 1.84 augustss void
1000 1.119 augustss uhci_root_ctrl_done(usbd_xfer_handle xfer)
1001 1.41 augustss {
1002 1.1 augustss }
1003 1.1 augustss
1004 1.123 augustss /*
1005 1.123 augustss * Let the last QH loop back to the high speed control transfer QH.
1006 1.123 augustss * This is what intel calls "bandwidth reclamation" and improves
1007 1.123 augustss * USB performance a lot for some devices.
1008 1.123 augustss * If we are already looping, just count it.
1009 1.123 augustss */
1010 1.1 augustss void
1011 1.123 augustss uhci_add_loop(uhci_softc_t *sc) {
1012 1.125 augustss #ifdef UHCI_DEBUG
1013 1.125 augustss if (uhcinoloop)
1014 1.125 augustss return;
1015 1.125 augustss #endif
1016 1.123 augustss if (++sc->sc_loops == 1) {
1017 1.125 augustss DPRINTFN(5,("uhci_start_loop: add\n"));
1018 1.123 augustss /* Note, we don't loop back the soft pointer. */
1019 1.152 augustss sc->sc_last_qh->qh.qh_hlink =
1020 1.123 augustss htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH);
1021 1.123 augustss }
1022 1.123 augustss }
1023 1.123 augustss
1024 1.123 augustss void
1025 1.123 augustss uhci_rem_loop(uhci_softc_t *sc) {
1026 1.125 augustss #ifdef UHCI_DEBUG
1027 1.125 augustss if (uhcinoloop)
1028 1.125 augustss return;
1029 1.125 augustss #endif
1030 1.123 augustss if (--sc->sc_loops == 0) {
1031 1.123 augustss DPRINTFN(5,("uhci_end_loop: remove\n"));
1032 1.123 augustss sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T);
1033 1.123 augustss }
1034 1.123 augustss }
1035 1.123 augustss
1036 1.123 augustss /* Add high speed control QH, called at splusb(). */
1037 1.123 augustss void
1038 1.123 augustss uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1039 1.1 augustss {
1040 1.42 augustss uhci_soft_qh_t *eqh;
1041 1.1 augustss
1042 1.52 augustss SPLUSBCHECK;
1043 1.52 augustss
1044 1.1 augustss DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
1045 1.123 augustss eqh = sc->sc_hctl_end;
1046 1.42 augustss sqh->hlink = eqh->hlink;
1047 1.42 augustss sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1048 1.42 augustss eqh->hlink = sqh;
1049 1.121 augustss eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
1050 1.123 augustss sc->sc_hctl_end = sqh;
1051 1.125 augustss #ifdef UHCI_CTL_LOOP
1052 1.123 augustss uhci_add_loop(sc);
1053 1.125 augustss #endif
1054 1.1 augustss }
1055 1.1 augustss
1056 1.123 augustss /* Remove high speed control QH, called at splusb(). */
1057 1.1 augustss void
1058 1.123 augustss uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1059 1.1 augustss {
1060 1.1 augustss uhci_soft_qh_t *pqh;
1061 1.1 augustss
1062 1.52 augustss SPLUSBCHECK;
1063 1.52 augustss
1064 1.123 augustss DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh));
1065 1.125 augustss #ifdef UHCI_CTL_LOOP
1066 1.123 augustss uhci_rem_loop(sc);
1067 1.125 augustss #endif
1068 1.124 augustss /*
1069 1.124 augustss * The T bit should be set in the elink of the QH so that the HC
1070 1.124 augustss * doesn't follow the pointer. This condition may fail if the
1071 1.124 augustss * the transferred packet was short so that the QH still points
1072 1.124 augustss * at the last used TD.
1073 1.124 augustss * In this case we set the T bit and wait a little for the HC
1074 1.124 augustss * to stop looking at the TD.
1075 1.124 augustss */
1076 1.124 augustss if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1077 1.124 augustss sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1078 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
1079 1.124 augustss }
1080 1.124 augustss
1081 1.123 augustss pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh);
1082 1.152 augustss pqh->hlink = sqh->hlink;
1083 1.42 augustss pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1084 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
1085 1.123 augustss if (sc->sc_hctl_end == sqh)
1086 1.123 augustss sc->sc_hctl_end = pqh;
1087 1.123 augustss }
1088 1.123 augustss
1089 1.123 augustss /* Add low speed control QH, called at splusb(). */
1090 1.123 augustss void
1091 1.123 augustss uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1092 1.123 augustss {
1093 1.123 augustss uhci_soft_qh_t *eqh;
1094 1.123 augustss
1095 1.123 augustss SPLUSBCHECK;
1096 1.123 augustss
1097 1.123 augustss DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh));
1098 1.123 augustss eqh = sc->sc_lctl_end;
1099 1.152 augustss sqh->hlink = eqh->hlink;
1100 1.123 augustss sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1101 1.152 augustss eqh->hlink = sqh;
1102 1.123 augustss eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
1103 1.123 augustss sc->sc_lctl_end = sqh;
1104 1.123 augustss }
1105 1.123 augustss
1106 1.123 augustss /* Remove low speed control QH, called at splusb(). */
1107 1.123 augustss void
1108 1.123 augustss uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1109 1.123 augustss {
1110 1.123 augustss uhci_soft_qh_t *pqh;
1111 1.123 augustss
1112 1.123 augustss SPLUSBCHECK;
1113 1.123 augustss
1114 1.123 augustss DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh));
1115 1.124 augustss /* See comment in uhci_remove_hs_ctrl() */
1116 1.124 augustss if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1117 1.124 augustss sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1118 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
1119 1.124 augustss }
1120 1.123 augustss pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh);
1121 1.152 augustss pqh->hlink = sqh->hlink;
1122 1.123 augustss pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1123 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
1124 1.123 augustss if (sc->sc_lctl_end == sqh)
1125 1.123 augustss sc->sc_lctl_end = pqh;
1126 1.1 augustss }
1127 1.1 augustss
1128 1.1 augustss /* Add bulk QH, called at splusb(). */
1129 1.1 augustss void
1130 1.119 augustss uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1131 1.1 augustss {
1132 1.42 augustss uhci_soft_qh_t *eqh;
1133 1.1 augustss
1134 1.52 augustss SPLUSBCHECK;
1135 1.52 augustss
1136 1.1 augustss DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
1137 1.42 augustss eqh = sc->sc_bulk_end;
1138 1.152 augustss sqh->hlink = eqh->hlink;
1139 1.42 augustss sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1140 1.152 augustss eqh->hlink = sqh;
1141 1.121 augustss eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
1142 1.1 augustss sc->sc_bulk_end = sqh;
1143 1.123 augustss uhci_add_loop(sc);
1144 1.1 augustss }
1145 1.1 augustss
1146 1.1 augustss /* Remove bulk QH, called at splusb(). */
1147 1.1 augustss void
1148 1.119 augustss uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1149 1.1 augustss {
1150 1.1 augustss uhci_soft_qh_t *pqh;
1151 1.1 augustss
1152 1.52 augustss SPLUSBCHECK;
1153 1.52 augustss
1154 1.1 augustss DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
1155 1.123 augustss uhci_rem_loop(sc);
1156 1.124 augustss /* See comment in uhci_remove_hs_ctrl() */
1157 1.124 augustss if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1158 1.124 augustss sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1159 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
1160 1.124 augustss }
1161 1.92 augustss pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh);
1162 1.42 augustss pqh->hlink = sqh->hlink;
1163 1.42 augustss pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1164 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
1165 1.1 augustss if (sc->sc_bulk_end == sqh)
1166 1.1 augustss sc->sc_bulk_end = pqh;
1167 1.1 augustss }
1168 1.1 augustss
1169 1.141 augustss Static int uhci_intr1(uhci_softc_t *);
1170 1.141 augustss
1171 1.1 augustss int
1172 1.119 augustss uhci_intr(void *arg)
1173 1.1 augustss {
1174 1.44 augustss uhci_softc_t *sc = arg;
1175 1.146 augustss
1176 1.146 augustss if (sc->sc_dying)
1177 1.146 augustss return (0);
1178 1.141 augustss
1179 1.141 augustss DPRINTFN(15,("uhci_intr: real interrupt\n"));
1180 1.141 augustss if (sc->sc_bus.use_polling) {
1181 1.141 augustss #ifdef DIAGNOSTIC
1182 1.141 augustss printf("uhci_intr: ignored interrupt while polling\n");
1183 1.141 augustss #endif
1184 1.141 augustss return (0);
1185 1.141 augustss }
1186 1.141 augustss return (uhci_intr1(sc));
1187 1.141 augustss }
1188 1.141 augustss
1189 1.141 augustss int
1190 1.141 augustss uhci_intr1(uhci_softc_t *sc)
1191 1.141 augustss {
1192 1.44 augustss int status;
1193 1.44 augustss int ack;
1194 1.1 augustss
1195 1.67 augustss #ifdef UHCI_DEBUG
1196 1.44 augustss if (uhcidebug > 15) {
1197 1.141 augustss DPRINTF(("%s: uhci_intr1\n", USBDEVNAME(sc->sc_bus.bdev)));
1198 1.1 augustss uhci_dumpregs(sc);
1199 1.1 augustss }
1200 1.1 augustss #endif
1201 1.117 augustss
1202 1.153 augustss status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS;
1203 1.127 soren if (status == 0) /* The interrupt was not for us. */
1204 1.127 soren return (0);
1205 1.127 soren
1206 1.117 augustss if (sc->sc_suspend != PWR_RESUME) {
1207 1.117 augustss printf("%s: interrupt while not operating ignored\n",
1208 1.117 augustss USBDEVNAME(sc->sc_bus.bdev));
1209 1.134 augustss UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */
1210 1.117 augustss return (0);
1211 1.117 augustss }
1212 1.44 augustss
1213 1.44 augustss ack = 0;
1214 1.44 augustss if (status & UHCI_STS_USBINT)
1215 1.44 augustss ack |= UHCI_STS_USBINT;
1216 1.44 augustss if (status & UHCI_STS_USBEI)
1217 1.44 augustss ack |= UHCI_STS_USBEI;
1218 1.1 augustss if (status & UHCI_STS_RD) {
1219 1.44 augustss ack |= UHCI_STS_RD;
1220 1.118 augustss #ifdef UHCI_DEBUG
1221 1.46 augustss printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
1222 1.118 augustss #endif
1223 1.1 augustss }
1224 1.1 augustss if (status & UHCI_STS_HSE) {
1225 1.44 augustss ack |= UHCI_STS_HSE;
1226 1.81 augustss printf("%s: host system error\n", USBDEVNAME(sc->sc_bus.bdev));
1227 1.1 augustss }
1228 1.1 augustss if (status & UHCI_STS_HCPE) {
1229 1.44 augustss ack |= UHCI_STS_HCPE;
1230 1.152 augustss printf("%s: host controller process error\n",
1231 1.81 augustss USBDEVNAME(sc->sc_bus.bdev));
1232 1.44 augustss }
1233 1.44 augustss if (status & UHCI_STS_HCH) {
1234 1.44 augustss /* no acknowledge needed */
1235 1.136 augustss if (!sc->sc_dying) {
1236 1.152 augustss printf("%s: host controller halted\n",
1237 1.129 augustss USBDEVNAME(sc->sc_bus.bdev));
1238 1.110 augustss #ifdef UHCI_DEBUG
1239 1.136 augustss uhci_dump_all(sc);
1240 1.110 augustss #endif
1241 1.136 augustss }
1242 1.136 augustss sc->sc_dying = 1;
1243 1.1 augustss }
1244 1.44 augustss
1245 1.132 augustss if (!ack)
1246 1.132 augustss return (0); /* nothing to acknowledge */
1247 1.132 augustss UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */
1248 1.1 augustss
1249 1.85 augustss sc->sc_bus.no_intrs++;
1250 1.85 augustss usb_schedsoftintr(&sc->sc_bus);
1251 1.85 augustss
1252 1.175 mycroft DPRINTFN(15, ("%s: uhci_intr: exit\n", USBDEVNAME(sc->sc_bus.bdev)));
1253 1.85 augustss
1254 1.85 augustss return (1);
1255 1.85 augustss }
1256 1.85 augustss
1257 1.85 augustss void
1258 1.133 augustss uhci_softintr(void *v)
1259 1.85 augustss {
1260 1.133 augustss uhci_softc_t *sc = v;
1261 1.85 augustss uhci_intr_info_t *ii;
1262 1.85 augustss
1263 1.140 augustss DPRINTFN(10,("%s: uhci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev),
1264 1.140 augustss sc->sc_bus.intr_context));
1265 1.85 augustss
1266 1.51 augustss sc->sc_bus.intr_context++;
1267 1.50 augustss
1268 1.1 augustss /*
1269 1.1 augustss * Interrupts on UHCI really suck. When the host controller
1270 1.1 augustss * interrupts because a transfer is completed there is no
1271 1.1 augustss * way of knowing which transfer it was. You can scan down
1272 1.1 augustss * the TDs and QHs of the previous frame to limit the search,
1273 1.1 augustss * but that assumes that the interrupt was not delayed by more
1274 1.1 augustss * than 1 ms, which may not always be true (e.g. after debug
1275 1.1 augustss * output on a slow console).
1276 1.1 augustss * We scan all interrupt descriptors to see if any have
1277 1.1 augustss * completed.
1278 1.1 augustss */
1279 1.1 augustss for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
1280 1.1 augustss uhci_check_intr(sc, ii);
1281 1.1 augustss
1282 1.164 augustss #ifdef USB_USE_SOFTINTR
1283 1.153 augustss if (sc->sc_softwake) {
1284 1.153 augustss sc->sc_softwake = 0;
1285 1.153 augustss wakeup(&sc->sc_softwake);
1286 1.153 augustss }
1287 1.164 augustss #endif /* USB_USE_SOFTINTR */
1288 1.153 augustss
1289 1.51 augustss sc->sc_bus.intr_context--;
1290 1.1 augustss }
1291 1.1 augustss
1292 1.1 augustss /* Check for an interrupt. */
1293 1.1 augustss void
1294 1.119 augustss uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii)
1295 1.1 augustss {
1296 1.1 augustss uhci_soft_td_t *std, *lstd;
1297 1.18 augustss u_int32_t status;
1298 1.1 augustss
1299 1.1 augustss DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
1300 1.1 augustss #ifdef DIAGNOSTIC
1301 1.63 augustss if (ii == NULL) {
1302 1.1 augustss printf("uhci_check_intr: no ii? %p\n", ii);
1303 1.1 augustss return;
1304 1.1 augustss }
1305 1.1 augustss #endif
1306 1.155 augustss if (ii->xfer->status == USBD_CANCELLED ||
1307 1.155 augustss ii->xfer->status == USBD_TIMEOUT) {
1308 1.155 augustss DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer));
1309 1.155 augustss return;
1310 1.155 augustss }
1311 1.155 augustss
1312 1.63 augustss if (ii->stdstart == NULL)
1313 1.1 augustss return;
1314 1.1 augustss lstd = ii->stdend;
1315 1.1 augustss #ifdef DIAGNOSTIC
1316 1.63 augustss if (lstd == NULL) {
1317 1.1 augustss printf("uhci_check_intr: std==0\n");
1318 1.1 augustss return;
1319 1.1 augustss }
1320 1.1 augustss #endif
1321 1.152 augustss /*
1322 1.26 augustss * If the last TD is still active we need to check whether there
1323 1.26 augustss * is a an error somewhere in the middle, or whether there was a
1324 1.26 augustss * short packet (SPD and not ACTIVE).
1325 1.26 augustss */
1326 1.88 tsutsui if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) {
1327 1.92 augustss DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii));
1328 1.48 augustss for (std = ii->stdstart; std != lstd; std = std->link.std) {
1329 1.88 tsutsui status = le32toh(std->td.td_status);
1330 1.83 augustss /* If there's an active TD the xfer isn't done. */
1331 1.83 augustss if (status & UHCI_TD_ACTIVE)
1332 1.83 augustss break;
1333 1.83 augustss /* Any kind of error makes the xfer done. */
1334 1.83 augustss if (status & UHCI_TD_STALLED)
1335 1.83 augustss goto done;
1336 1.83 augustss /* We want short packets, and it is short: it's done */
1337 1.83 augustss if ((status & UHCI_TD_SPD) &&
1338 1.152 augustss UHCI_TD_GET_ACTLEN(status) <
1339 1.88 tsutsui UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)))
1340 1.1 augustss goto done;
1341 1.18 augustss }
1342 1.92 augustss DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n",
1343 1.18 augustss ii, ii->stdstart));
1344 1.1 augustss return;
1345 1.1 augustss }
1346 1.1 augustss done:
1347 1.92 augustss DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii));
1348 1.96 augustss usb_uncallout(ii->xfer->timeout_handle, uhci_timeout, ii);
1349 1.36 augustss uhci_idone(ii);
1350 1.1 augustss }
1351 1.1 augustss
1352 1.52 augustss /* Called at splusb() */
1353 1.1 augustss void
1354 1.119 augustss uhci_idone(uhci_intr_info_t *ii)
1355 1.1 augustss {
1356 1.63 augustss usbd_xfer_handle xfer = ii->xfer;
1357 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1358 1.1 augustss uhci_soft_td_t *std;
1359 1.67 augustss u_int32_t status = 0, nstatus;
1360 1.26 augustss int actlen;
1361 1.1 augustss
1362 1.140 augustss DPRINTFN(12, ("uhci_idone: ii=%p\n", ii));
1363 1.7 augustss #ifdef DIAGNOSTIC
1364 1.7 augustss {
1365 1.7 augustss int s = splhigh();
1366 1.7 augustss if (ii->isdone) {
1367 1.26 augustss splx(s);
1368 1.92 augustss #ifdef UHCI_DEBUG
1369 1.92 augustss printf("uhci_idone: ii is done!\n ");
1370 1.92 augustss uhci_dump_ii(ii);
1371 1.92 augustss #else
1372 1.36 augustss printf("uhci_idone: ii=%p is done!\n", ii);
1373 1.92 augustss #endif
1374 1.7 augustss return;
1375 1.7 augustss }
1376 1.7 augustss ii->isdone = 1;
1377 1.7 augustss splx(s);
1378 1.7 augustss }
1379 1.7 augustss #endif
1380 1.48 augustss
1381 1.63 augustss if (xfer->nframes != 0) {
1382 1.48 augustss /* Isoc transfer, do things differently. */
1383 1.48 augustss uhci_soft_td_t **stds = upipe->u.iso.stds;
1384 1.126 augustss int i, n, nframes, len;
1385 1.48 augustss
1386 1.48 augustss DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii));
1387 1.48 augustss
1388 1.63 augustss nframes = xfer->nframes;
1389 1.48 augustss actlen = 0;
1390 1.92 augustss n = UXFER(xfer)->curframe;
1391 1.48 augustss for (i = 0; i < nframes; i++) {
1392 1.48 augustss std = stds[n];
1393 1.59 augustss #ifdef UHCI_DEBUG
1394 1.48 augustss if (uhcidebug > 5) {
1395 1.48 augustss DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i));
1396 1.48 augustss uhci_dump_td(std);
1397 1.48 augustss }
1398 1.48 augustss #endif
1399 1.48 augustss if (++n >= UHCI_VFRAMELIST_COUNT)
1400 1.48 augustss n = 0;
1401 1.88 tsutsui status = le32toh(std->td.td_status);
1402 1.126 augustss len = UHCI_TD_GET_ACTLEN(status);
1403 1.126 augustss xfer->frlengths[i] = len;
1404 1.126 augustss actlen += len;
1405 1.48 augustss }
1406 1.48 augustss upipe->u.iso.inuse -= nframes;
1407 1.63 augustss xfer->actlen = actlen;
1408 1.63 augustss xfer->status = USBD_NORMAL_COMPLETION;
1409 1.140 augustss goto end;
1410 1.48 augustss }
1411 1.48 augustss
1412 1.59 augustss #ifdef UHCI_DEBUG
1413 1.65 augustss DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n",
1414 1.65 augustss ii, xfer, upipe));
1415 1.48 augustss if (uhcidebug > 10)
1416 1.48 augustss uhci_dump_tds(ii->stdstart);
1417 1.48 augustss #endif
1418 1.48 augustss
1419 1.26 augustss /* The transfer is done, compute actual length and status. */
1420 1.26 augustss actlen = 0;
1421 1.63 augustss for (std = ii->stdstart; std != NULL; std = std->link.std) {
1422 1.88 tsutsui nstatus = le32toh(std->td.td_status);
1423 1.64 augustss if (nstatus & UHCI_TD_ACTIVE)
1424 1.26 augustss break;
1425 1.67 augustss
1426 1.64 augustss status = nstatus;
1427 1.88 tsutsui if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) !=
1428 1.88 tsutsui UHCI_TD_PID_SETUP)
1429 1.26 augustss actlen += UHCI_TD_GET_ACTLEN(status);
1430 1.176 mycroft else {
1431 1.176 mycroft /*
1432 1.176 mycroft * UHCI will report CRCTO in addition to a STALL or NAK
1433 1.176 mycroft * for a SETUP transaction. See section 3.2.2, "TD
1434 1.176 mycroft * CONTROL AND STATUS".
1435 1.176 mycroft */
1436 1.176 mycroft if (status & (UHCI_TD_STALLED | UHCI_TD_NAK))
1437 1.176 mycroft status &= ~UHCI_TD_CRCTO;
1438 1.176 mycroft }
1439 1.1 augustss }
1440 1.38 augustss /* If there are left over TDs we need to update the toggle. */
1441 1.63 augustss if (std != NULL)
1442 1.88 tsutsui upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token));
1443 1.38 augustss
1444 1.1 augustss status &= UHCI_TD_ERROR;
1445 1.152 augustss DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n",
1446 1.26 augustss actlen, status));
1447 1.63 augustss xfer->actlen = actlen;
1448 1.1 augustss if (status != 0) {
1449 1.122 tv #ifdef UHCI_DEBUG
1450 1.122 tv char sbuf[128];
1451 1.122 tv
1452 1.147 augustss bitmask_snprintf((u_int32_t)status,
1453 1.147 augustss "\20\22BITSTUFF\23CRCTO\24NAK\25"
1454 1.122 tv "BABBLE\26DBUFFER\27STALLED\30ACTIVE",
1455 1.122 tv sbuf, sizeof(sbuf));
1456 1.122 tv
1457 1.75 augustss DPRINTFN((status == UHCI_TD_STALLED)*10,
1458 1.36 augustss ("uhci_idone: error, addr=%d, endpt=0x%02x, "
1459 1.122 tv "status 0x%s\n",
1460 1.63 augustss xfer->pipe->device->address,
1461 1.63 augustss xfer->pipe->endpoint->edesc->bEndpointAddress,
1462 1.122 tv sbuf));
1463 1.122 tv #endif
1464 1.122 tv
1465 1.1 augustss if (status == UHCI_TD_STALLED)
1466 1.63 augustss xfer->status = USBD_STALLED;
1467 1.1 augustss else
1468 1.63 augustss xfer->status = USBD_IOERROR; /* more info XXX */
1469 1.1 augustss } else {
1470 1.63 augustss xfer->status = USBD_NORMAL_COMPLETION;
1471 1.1 augustss }
1472 1.140 augustss
1473 1.140 augustss end:
1474 1.63 augustss usb_transfer_complete(xfer);
1475 1.140 augustss DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii));
1476 1.1 augustss }
1477 1.1 augustss
1478 1.13 augustss /*
1479 1.13 augustss * Called when a request does not complete.
1480 1.13 augustss */
1481 1.1 augustss void
1482 1.119 augustss uhci_timeout(void *addr)
1483 1.1 augustss {
1484 1.1 augustss uhci_intr_info_t *ii = addr;
1485 1.153 augustss struct uhci_xfer *uxfer = UXFER(ii->xfer);
1486 1.153 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe;
1487 1.153 augustss uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
1488 1.153 augustss
1489 1.153 augustss DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer));
1490 1.153 augustss
1491 1.153 augustss if (sc->sc_dying) {
1492 1.153 augustss uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT);
1493 1.153 augustss return;
1494 1.153 augustss }
1495 1.1 augustss
1496 1.153 augustss /* Execute the abort in a process context. */
1497 1.156 augustss usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer);
1498 1.153 augustss usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task);
1499 1.153 augustss }
1500 1.51 augustss
1501 1.153 augustss void
1502 1.153 augustss uhci_timeout_task(void *addr)
1503 1.153 augustss {
1504 1.153 augustss usbd_xfer_handle xfer = addr;
1505 1.153 augustss int s;
1506 1.153 augustss
1507 1.153 augustss DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer));
1508 1.67 augustss
1509 1.153 augustss s = splusb();
1510 1.153 augustss uhci_abort_xfer(xfer, USBD_TIMEOUT);
1511 1.153 augustss splx(s);
1512 1.1 augustss }
1513 1.1 augustss
1514 1.1 augustss /*
1515 1.1 augustss * Wait here until controller claims to have an interrupt.
1516 1.1 augustss * Then call uhci_intr and return. Use timeout to avoid waiting
1517 1.1 augustss * too long.
1518 1.13 augustss * Only used during boot when interrupts are not enabled yet.
1519 1.1 augustss */
1520 1.1 augustss void
1521 1.119 augustss uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer)
1522 1.1 augustss {
1523 1.63 augustss int timo = xfer->timeout;
1524 1.13 augustss uhci_intr_info_t *ii;
1525 1.13 augustss
1526 1.26 augustss DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
1527 1.1 augustss
1528 1.63 augustss xfer->status = USBD_IN_PROGRESS;
1529 1.26 augustss for (; timo >= 0; timo--) {
1530 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1531 1.26 augustss DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
1532 1.1 augustss if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
1533 1.141 augustss uhci_intr1(sc);
1534 1.63 augustss if (xfer->status != USBD_IN_PROGRESS)
1535 1.1 augustss return;
1536 1.1 augustss }
1537 1.1 augustss }
1538 1.13 augustss
1539 1.13 augustss /* Timeout */
1540 1.13 augustss DPRINTF(("uhci_waitintr: timeout\n"));
1541 1.13 augustss for (ii = LIST_FIRST(&sc->sc_intrhead);
1542 1.152 augustss ii != NULL && ii->xfer != xfer;
1543 1.13 augustss ii = LIST_NEXT(ii, list))
1544 1.13 augustss ;
1545 1.41 augustss #ifdef DIAGNOSTIC
1546 1.63 augustss if (ii == NULL)
1547 1.163 provos panic("uhci_waitintr: lost intr_info");
1548 1.41 augustss #endif
1549 1.41 augustss uhci_idone(ii);
1550 1.1 augustss }
1551 1.1 augustss
1552 1.8 augustss void
1553 1.119 augustss uhci_poll(struct usbd_bus *bus)
1554 1.8 augustss {
1555 1.8 augustss uhci_softc_t *sc = (uhci_softc_t *)bus;
1556 1.8 augustss
1557 1.8 augustss if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT)
1558 1.141 augustss uhci_intr1(sc);
1559 1.8 augustss }
1560 1.8 augustss
1561 1.1 augustss void
1562 1.119 augustss uhci_reset(uhci_softc_t *sc)
1563 1.1 augustss {
1564 1.1 augustss int n;
1565 1.1 augustss
1566 1.1 augustss UHCICMD(sc, UHCI_CMD_HCRESET);
1567 1.1 augustss /* The reset bit goes low when the controller is done. */
1568 1.152 augustss for (n = 0; n < UHCI_RESET_TIMEOUT &&
1569 1.1 augustss (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
1570 1.92 augustss usb_delay_ms(&sc->sc_bus, 1);
1571 1.1 augustss if (n >= UHCI_RESET_TIMEOUT)
1572 1.152 augustss printf("%s: controller did not reset\n",
1573 1.13 augustss USBDEVNAME(sc->sc_bus.bdev));
1574 1.1 augustss }
1575 1.1 augustss
1576 1.16 augustss usbd_status
1577 1.119 augustss uhci_run(uhci_softc_t *sc, int run)
1578 1.1 augustss {
1579 1.1 augustss int s, n, running;
1580 1.71 augustss u_int16_t cmd;
1581 1.1 augustss
1582 1.1 augustss run = run != 0;
1583 1.132 augustss s = splhardusb();
1584 1.30 augustss DPRINTF(("uhci_run: setting run=%d\n", run));
1585 1.71 augustss cmd = UREAD2(sc, UHCI_CMD);
1586 1.71 augustss if (run)
1587 1.71 augustss cmd |= UHCI_CMD_RS;
1588 1.71 augustss else
1589 1.71 augustss cmd &= ~UHCI_CMD_RS;
1590 1.71 augustss UHCICMD(sc, cmd);
1591 1.13 augustss for(n = 0; n < 10; n++) {
1592 1.1 augustss running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
1593 1.1 augustss /* return when we've entered the state we want */
1594 1.1 augustss if (run == running) {
1595 1.1 augustss splx(s);
1596 1.30 augustss DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
1597 1.30 augustss UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
1598 1.16 augustss return (USBD_NORMAL_COMPLETION);
1599 1.1 augustss }
1600 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1601 1.1 augustss }
1602 1.1 augustss splx(s);
1603 1.13 augustss printf("%s: cannot %s\n", USBDEVNAME(sc->sc_bus.bdev),
1604 1.14 augustss run ? "start" : "stop");
1605 1.16 augustss return (USBD_IOERROR);
1606 1.1 augustss }
1607 1.1 augustss
1608 1.1 augustss /*
1609 1.1 augustss * Memory management routines.
1610 1.1 augustss * uhci_alloc_std allocates TDs
1611 1.1 augustss * uhci_alloc_sqh allocates QHs
1612 1.7 augustss * These two routines do their own free list management,
1613 1.1 augustss * partly for speed, partly because allocating DMAable memory
1614 1.1 augustss * has page size granularaity so much memory would be wasted if
1615 1.16 augustss * only one TD/QH (32 bytes) was placed in each allocated chunk.
1616 1.1 augustss */
1617 1.1 augustss
1618 1.1 augustss uhci_soft_td_t *
1619 1.119 augustss uhci_alloc_std(uhci_softc_t *sc)
1620 1.1 augustss {
1621 1.1 augustss uhci_soft_td_t *std;
1622 1.63 augustss usbd_status err;
1623 1.42 augustss int i, offs;
1624 1.7 augustss usb_dma_t dma;
1625 1.1 augustss
1626 1.63 augustss if (sc->sc_freetds == NULL) {
1627 1.1 augustss DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
1628 1.63 augustss err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK,
1629 1.63 augustss UHCI_TD_ALIGN, &dma);
1630 1.63 augustss if (err)
1631 1.16 augustss return (0);
1632 1.43 augustss for(i = 0; i < UHCI_STD_CHUNK; i++) {
1633 1.42 augustss offs = i * UHCI_STD_SIZE;
1634 1.159 augustss std = KERNADDR(&dma, offs);
1635 1.160 augustss std->physaddr = DMAADDR(&dma, offs);
1636 1.42 augustss std->link.std = sc->sc_freetds;
1637 1.1 augustss sc->sc_freetds = std;
1638 1.1 augustss }
1639 1.1 augustss }
1640 1.1 augustss std = sc->sc_freetds;
1641 1.42 augustss sc->sc_freetds = std->link.std;
1642 1.42 augustss memset(&std->td, 0, sizeof(uhci_td_t));
1643 1.1 augustss return std;
1644 1.1 augustss }
1645 1.1 augustss
1646 1.1 augustss void
1647 1.119 augustss uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std)
1648 1.1 augustss {
1649 1.7 augustss #ifdef DIAGNOSTIC
1650 1.7 augustss #define TD_IS_FREE 0x12345678
1651 1.88 tsutsui if (le32toh(std->td.td_token) == TD_IS_FREE) {
1652 1.7 augustss printf("uhci_free_std: freeing free TD %p\n", std);
1653 1.7 augustss return;
1654 1.7 augustss }
1655 1.88 tsutsui std->td.td_token = htole32(TD_IS_FREE);
1656 1.7 augustss #endif
1657 1.42 augustss std->link.std = sc->sc_freetds;
1658 1.1 augustss sc->sc_freetds = std;
1659 1.1 augustss }
1660 1.1 augustss
1661 1.1 augustss uhci_soft_qh_t *
1662 1.119 augustss uhci_alloc_sqh(uhci_softc_t *sc)
1663 1.1 augustss {
1664 1.1 augustss uhci_soft_qh_t *sqh;
1665 1.63 augustss usbd_status err;
1666 1.1 augustss int i, offs;
1667 1.7 augustss usb_dma_t dma;
1668 1.1 augustss
1669 1.63 augustss if (sc->sc_freeqhs == NULL) {
1670 1.1 augustss DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
1671 1.63 augustss err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK,
1672 1.63 augustss UHCI_QH_ALIGN, &dma);
1673 1.63 augustss if (err)
1674 1.63 augustss return (0);
1675 1.43 augustss for(i = 0; i < UHCI_SQH_CHUNK; i++) {
1676 1.42 augustss offs = i * UHCI_SQH_SIZE;
1677 1.159 augustss sqh = KERNADDR(&dma, offs);
1678 1.160 augustss sqh->physaddr = DMAADDR(&dma, offs);
1679 1.42 augustss sqh->hlink = sc->sc_freeqhs;
1680 1.1 augustss sc->sc_freeqhs = sqh;
1681 1.1 augustss }
1682 1.1 augustss }
1683 1.1 augustss sqh = sc->sc_freeqhs;
1684 1.42 augustss sc->sc_freeqhs = sqh->hlink;
1685 1.42 augustss memset(&sqh->qh, 0, sizeof(uhci_qh_t));
1686 1.16 augustss return (sqh);
1687 1.1 augustss }
1688 1.1 augustss
1689 1.1 augustss void
1690 1.119 augustss uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1691 1.1 augustss {
1692 1.42 augustss sqh->hlink = sc->sc_freeqhs;
1693 1.1 augustss sc->sc_freeqhs = sqh;
1694 1.1 augustss }
1695 1.1 augustss
1696 1.1 augustss void
1697 1.119 augustss uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std,
1698 1.119 augustss uhci_soft_td_t *stdend)
1699 1.1 augustss {
1700 1.1 augustss uhci_soft_td_t *p;
1701 1.1 augustss
1702 1.1 augustss for (; std != stdend; std = p) {
1703 1.42 augustss p = std->link.std;
1704 1.1 augustss uhci_free_std(sc, std);
1705 1.1 augustss }
1706 1.1 augustss }
1707 1.1 augustss
1708 1.1 augustss usbd_status
1709 1.119 augustss uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len,
1710 1.119 augustss int rd, u_int16_t flags, usb_dma_t *dma,
1711 1.119 augustss uhci_soft_td_t **sp, uhci_soft_td_t **ep)
1712 1.1 augustss {
1713 1.1 augustss uhci_soft_td_t *p, *lastp;
1714 1.1 augustss uhci_physaddr_t lastlink;
1715 1.1 augustss int i, ntd, l, tog, maxp;
1716 1.18 augustss u_int32_t status;
1717 1.1 augustss int addr = upipe->pipe.device->address;
1718 1.1 augustss int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1719 1.1 augustss
1720 1.144 augustss DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d "
1721 1.152 augustss "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len,
1722 1.144 augustss upipe->pipe.device->speed, flags));
1723 1.4 augustss maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
1724 1.1 augustss if (maxp == 0) {
1725 1.1 augustss printf("uhci_alloc_std_chain: maxp=0\n");
1726 1.1 augustss return (USBD_INVAL);
1727 1.1 augustss }
1728 1.1 augustss ntd = (len + maxp - 1) / maxp;
1729 1.73 augustss if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0)
1730 1.73 augustss ntd++;
1731 1.39 augustss DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd));
1732 1.73 augustss if (ntd == 0) {
1733 1.73 augustss *sp = *ep = 0;
1734 1.73 augustss DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n"));
1735 1.73 augustss return (USBD_NORMAL_COMPLETION);
1736 1.73 augustss }
1737 1.38 augustss tog = upipe->nexttoggle;
1738 1.1 augustss if (ntd % 2 == 0)
1739 1.1 augustss tog ^= 1;
1740 1.32 augustss upipe->nexttoggle = tog ^ 1;
1741 1.121 augustss lastp = NULL;
1742 1.1 augustss lastlink = UHCI_PTR_T;
1743 1.1 augustss ntd--;
1744 1.33 augustss status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
1745 1.144 augustss if (upipe->pipe.device->speed == USB_SPEED_LOW)
1746 1.18 augustss status |= UHCI_TD_LS;
1747 1.73 augustss if (flags & USBD_SHORT_XFER_OK)
1748 1.18 augustss status |= UHCI_TD_SPD;
1749 1.1 augustss for (i = ntd; i >= 0; i--) {
1750 1.1 augustss p = uhci_alloc_std(sc);
1751 1.63 augustss if (p == NULL) {
1752 1.149 augustss uhci_free_std_chain(sc, lastp, NULL);
1753 1.1 augustss return (USBD_NOMEM);
1754 1.1 augustss }
1755 1.42 augustss p->link.std = lastp;
1756 1.121 augustss p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD);
1757 1.1 augustss lastp = p;
1758 1.1 augustss lastlink = p->physaddr;
1759 1.88 tsutsui p->td.td_status = htole32(status);
1760 1.1 augustss if (i == ntd) {
1761 1.1 augustss /* last TD */
1762 1.1 augustss l = len % maxp;
1763 1.73 augustss if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER))
1764 1.73 augustss l = maxp;
1765 1.1 augustss *ep = p;
1766 1.1 augustss } else
1767 1.1 augustss l = maxp;
1768 1.152 augustss p->td.td_token =
1769 1.88 tsutsui htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) :
1770 1.88 tsutsui UHCI_TD_OUT(l, endpt, addr, tog));
1771 1.160 augustss p->td.td_buffer = htole32(DMAADDR(dma, i * maxp));
1772 1.1 augustss tog ^= 1;
1773 1.1 augustss }
1774 1.1 augustss *sp = lastp;
1775 1.152 augustss DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n",
1776 1.38 augustss upipe->nexttoggle));
1777 1.1 augustss return (USBD_NORMAL_COMPLETION);
1778 1.1 augustss }
1779 1.1 augustss
1780 1.38 augustss void
1781 1.119 augustss uhci_device_clear_toggle(usbd_pipe_handle pipe)
1782 1.38 augustss {
1783 1.38 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1784 1.38 augustss upipe->nexttoggle = 0;
1785 1.38 augustss }
1786 1.38 augustss
1787 1.38 augustss void
1788 1.119 augustss uhci_noop(usbd_pipe_handle pipe)
1789 1.38 augustss {
1790 1.38 augustss }
1791 1.38 augustss
1792 1.1 augustss usbd_status
1793 1.119 augustss uhci_device_bulk_transfer(usbd_xfer_handle xfer)
1794 1.1 augustss {
1795 1.63 augustss usbd_status err;
1796 1.16 augustss
1797 1.52 augustss /* Insert last in queue. */
1798 1.63 augustss err = usb_insert_transfer(xfer);
1799 1.63 augustss if (err)
1800 1.63 augustss return (err);
1801 1.52 augustss
1802 1.152 augustss /*
1803 1.92 augustss * Pipe isn't running (otherwise err would be USBD_INPROG),
1804 1.92 augustss * so start it first.
1805 1.67 augustss */
1806 1.63 augustss return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1807 1.16 augustss }
1808 1.16 augustss
1809 1.16 augustss usbd_status
1810 1.119 augustss uhci_device_bulk_start(usbd_xfer_handle xfer)
1811 1.16 augustss {
1812 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1813 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
1814 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1815 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
1816 1.55 augustss uhci_soft_td_t *data, *dataend;
1817 1.1 augustss uhci_soft_qh_t *sqh;
1818 1.63 augustss usbd_status err;
1819 1.45 augustss int len, isread, endpt;
1820 1.1 augustss int s;
1821 1.1 augustss
1822 1.169 augustss DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n",
1823 1.169 augustss xfer, xfer->length, xfer->flags, ii));
1824 1.1 augustss
1825 1.82 augustss if (sc->sc_dying)
1826 1.82 augustss return (USBD_IOERROR);
1827 1.82 augustss
1828 1.48 augustss #ifdef DIAGNOSTIC
1829 1.63 augustss if (xfer->rqflags & URQ_REQUEST)
1830 1.163 provos panic("uhci_device_bulk_transfer: a request");
1831 1.48 augustss #endif
1832 1.1 augustss
1833 1.63 augustss len = xfer->length;
1834 1.102 augustss endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1835 1.45 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
1836 1.1 augustss sqh = upipe->u.bulk.sqh;
1837 1.1 augustss
1838 1.1 augustss upipe->u.bulk.isread = isread;
1839 1.1 augustss upipe->u.bulk.length = len;
1840 1.1 augustss
1841 1.73 augustss err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
1842 1.73 augustss &xfer->dmabuf, &data, &dataend);
1843 1.63 augustss if (err)
1844 1.63 augustss return (err);
1845 1.88 tsutsui dataend->td.td_status |= htole32(UHCI_TD_IOC);
1846 1.1 augustss
1847 1.59 augustss #ifdef UHCI_DEBUG
1848 1.33 augustss if (uhcidebug > 8) {
1849 1.55 augustss DPRINTF(("uhci_device_bulk_transfer: data(1)\n"));
1850 1.55 augustss uhci_dump_tds(data);
1851 1.1 augustss }
1852 1.1 augustss #endif
1853 1.1 augustss
1854 1.1 augustss /* Set up interrupt info. */
1855 1.63 augustss ii->xfer = xfer;
1856 1.55 augustss ii->stdstart = data;
1857 1.55 augustss ii->stdend = dataend;
1858 1.7 augustss #ifdef DIAGNOSTIC
1859 1.70 augustss if (!ii->isdone) {
1860 1.70 augustss printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii);
1861 1.70 augustss }
1862 1.7 augustss ii->isdone = 0;
1863 1.7 augustss #endif
1864 1.1 augustss
1865 1.55 augustss sqh->elink = data;
1866 1.121 augustss sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
1867 1.1 augustss
1868 1.1 augustss s = splusb();
1869 1.1 augustss uhci_add_bulk(sc, sqh);
1870 1.92 augustss uhci_add_intr_info(sc, ii);
1871 1.1 augustss
1872 1.63 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
1873 1.171 tsutsui usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
1874 1.91 augustss uhci_timeout, ii);
1875 1.13 augustss }
1876 1.92 augustss xfer->status = USBD_IN_PROGRESS;
1877 1.1 augustss splx(s);
1878 1.1 augustss
1879 1.59 augustss #ifdef UHCI_DEBUG
1880 1.1 augustss if (uhcidebug > 10) {
1881 1.55 augustss DPRINTF(("uhci_device_bulk_transfer: data(2)\n"));
1882 1.55 augustss uhci_dump_tds(data);
1883 1.1 augustss }
1884 1.1 augustss #endif
1885 1.1 augustss
1886 1.26 augustss if (sc->sc_bus.use_polling)
1887 1.63 augustss uhci_waitintr(sc, xfer);
1888 1.26 augustss
1889 1.1 augustss return (USBD_IN_PROGRESS);
1890 1.1 augustss }
1891 1.1 augustss
1892 1.1 augustss /* Abort a device bulk request. */
1893 1.1 augustss void
1894 1.119 augustss uhci_device_bulk_abort(usbd_xfer_handle xfer)
1895 1.1 augustss {
1896 1.33 augustss DPRINTF(("uhci_device_bulk_abort:\n"));
1897 1.66 augustss uhci_abort_xfer(xfer, USBD_CANCELLED);
1898 1.33 augustss }
1899 1.33 augustss
1900 1.92 augustss /*
1901 1.154 augustss * Abort a device request.
1902 1.154 augustss * If this routine is called at splusb() it guarantees that the request
1903 1.154 augustss * will be removed from the hardware scheduling and that the callback
1904 1.154 augustss * for it will be called with USBD_CANCELLED status.
1905 1.154 augustss * It's impossible to guarantee that the requested transfer will not
1906 1.154 augustss * have happened since the hardware runs concurrently.
1907 1.154 augustss * If the transaction has already happened we rely on the ordinary
1908 1.154 augustss * interrupt processing to process it.
1909 1.92 augustss */
1910 1.33 augustss void
1911 1.119 augustss uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
1912 1.33 augustss {
1913 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
1914 1.153 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1915 1.153 augustss uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
1916 1.33 augustss uhci_soft_td_t *std;
1917 1.92 augustss int s;
1918 1.65 augustss
1919 1.106 augustss DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status));
1920 1.33 augustss
1921 1.153 augustss if (sc->sc_dying) {
1922 1.153 augustss /* If we're dying, just do the software part. */
1923 1.153 augustss s = splusb();
1924 1.153 augustss xfer->status = status; /* make software ignore it */
1925 1.157 tsutsui usb_uncallout(xfer->timeout_handle, uhci_timeout, xfer);
1926 1.153 augustss usb_transfer_complete(xfer);
1927 1.92 augustss splx(s);
1928 1.92 augustss }
1929 1.92 augustss
1930 1.153 augustss if (xfer->device->bus->intr_context || !curproc)
1931 1.163 provos panic("uhci_abort_xfer: not in process context");
1932 1.153 augustss
1933 1.153 augustss /*
1934 1.153 augustss * Step 1: Make interrupt routine and hardware ignore xfer.
1935 1.153 augustss */
1936 1.153 augustss s = splusb();
1937 1.153 augustss xfer->status = status; /* make software ignore it */
1938 1.106 augustss usb_uncallout(xfer->timeout_handle, uhci_timeout, ii);
1939 1.153 augustss DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii));
1940 1.106 augustss for (std = ii->stdstart; std != NULL; std = std->link.std)
1941 1.92 augustss std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
1942 1.153 augustss splx(s);
1943 1.92 augustss
1944 1.162 augustss /*
1945 1.153 augustss * Step 2: Wait until we know hardware has finished any possible
1946 1.153 augustss * use of the xfer. Also make sure the soft interrupt routine
1947 1.153 augustss * has run.
1948 1.153 augustss */
1949 1.154 augustss usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */
1950 1.153 augustss s = splusb();
1951 1.164 augustss #ifdef USB_USE_SOFTINTR
1952 1.153 augustss sc->sc_softwake = 1;
1953 1.164 augustss #endif /* USB_USE_SOFTINTR */
1954 1.153 augustss usb_schedsoftintr(&sc->sc_bus);
1955 1.164 augustss #ifdef USB_USE_SOFTINTR
1956 1.154 augustss DPRINTFN(1,("uhci_abort_xfer: tsleep\n"));
1957 1.153 augustss tsleep(&sc->sc_softwake, PZERO, "uhciab", 0);
1958 1.164 augustss #endif /* USB_USE_SOFTINTR */
1959 1.153 augustss splx(s);
1960 1.162 augustss
1961 1.153 augustss /*
1962 1.153 augustss * Step 3: Execute callback.
1963 1.153 augustss */
1964 1.106 augustss xfer->hcpriv = ii;
1965 1.92 augustss
1966 1.154 augustss DPRINTFN(1,("uhci_abort_xfer: callback\n"));
1967 1.92 augustss s = splusb();
1968 1.100 augustss #ifdef DIAGNOSTIC
1969 1.106 augustss ii->isdone = 1;
1970 1.100 augustss #endif
1971 1.106 augustss usb_transfer_complete(xfer);
1972 1.33 augustss splx(s);
1973 1.1 augustss }
1974 1.1 augustss
1975 1.1 augustss /* Close a device bulk pipe. */
1976 1.1 augustss void
1977 1.119 augustss uhci_device_bulk_close(usbd_pipe_handle pipe)
1978 1.1 augustss {
1979 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1980 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
1981 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1982 1.1 augustss
1983 1.1 augustss uhci_free_sqh(sc, upipe->u.bulk.sqh);
1984 1.1 augustss }
1985 1.1 augustss
1986 1.1 augustss usbd_status
1987 1.119 augustss uhci_device_ctrl_transfer(usbd_xfer_handle xfer)
1988 1.1 augustss {
1989 1.63 augustss usbd_status err;
1990 1.16 augustss
1991 1.52 augustss /* Insert last in queue. */
1992 1.63 augustss err = usb_insert_transfer(xfer);
1993 1.63 augustss if (err)
1994 1.63 augustss return (err);
1995 1.52 augustss
1996 1.152 augustss /*
1997 1.92 augustss * Pipe isn't running (otherwise err would be USBD_INPROG),
1998 1.92 augustss * so start it first.
1999 1.67 augustss */
2000 1.63 augustss return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2001 1.16 augustss }
2002 1.16 augustss
2003 1.16 augustss usbd_status
2004 1.119 augustss uhci_device_ctrl_start(usbd_xfer_handle xfer)
2005 1.16 augustss {
2006 1.63 augustss uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
2007 1.63 augustss usbd_status err;
2008 1.1 augustss
2009 1.82 augustss if (sc->sc_dying)
2010 1.82 augustss return (USBD_IOERROR);
2011 1.82 augustss
2012 1.48 augustss #ifdef DIAGNOSTIC
2013 1.63 augustss if (!(xfer->rqflags & URQ_REQUEST))
2014 1.163 provos panic("uhci_device_ctrl_transfer: not a request");
2015 1.48 augustss #endif
2016 1.1 augustss
2017 1.63 augustss err = uhci_device_request(xfer);
2018 1.63 augustss if (err)
2019 1.63 augustss return (err);
2020 1.1 augustss
2021 1.9 augustss if (sc->sc_bus.use_polling)
2022 1.63 augustss uhci_waitintr(sc, xfer);
2023 1.1 augustss return (USBD_IN_PROGRESS);
2024 1.1 augustss }
2025 1.1 augustss
2026 1.1 augustss usbd_status
2027 1.119 augustss uhci_device_intr_transfer(usbd_xfer_handle xfer)
2028 1.1 augustss {
2029 1.63 augustss usbd_status err;
2030 1.16 augustss
2031 1.52 augustss /* Insert last in queue. */
2032 1.63 augustss err = usb_insert_transfer(xfer);
2033 1.63 augustss if (err)
2034 1.63 augustss return (err);
2035 1.52 augustss
2036 1.152 augustss /*
2037 1.92 augustss * Pipe isn't running (otherwise err would be USBD_INPROG),
2038 1.92 augustss * so start it first.
2039 1.67 augustss */
2040 1.63 augustss return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2041 1.16 augustss }
2042 1.16 augustss
2043 1.16 augustss usbd_status
2044 1.119 augustss uhci_device_intr_start(usbd_xfer_handle xfer)
2045 1.16 augustss {
2046 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2047 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
2048 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2049 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2050 1.55 augustss uhci_soft_td_t *data, *dataend;
2051 1.1 augustss uhci_soft_qh_t *sqh;
2052 1.63 augustss usbd_status err;
2053 1.49 augustss int i, s;
2054 1.1 augustss
2055 1.82 augustss if (sc->sc_dying)
2056 1.82 augustss return (USBD_IOERROR);
2057 1.82 augustss
2058 1.63 augustss DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n",
2059 1.63 augustss xfer, xfer->length, xfer->flags));
2060 1.1 augustss
2061 1.48 augustss #ifdef DIAGNOSTIC
2062 1.63 augustss if (xfer->rqflags & URQ_REQUEST)
2063 1.163 provos panic("uhci_device_intr_transfer: a request");
2064 1.48 augustss #endif
2065 1.1 augustss
2066 1.73 augustss err = uhci_alloc_std_chain(upipe, sc, xfer->length, 1, xfer->flags,
2067 1.73 augustss &xfer->dmabuf, &data, &dataend);
2068 1.63 augustss if (err)
2069 1.63 augustss return (err);
2070 1.88 tsutsui dataend->td.td_status |= htole32(UHCI_TD_IOC);
2071 1.1 augustss
2072 1.59 augustss #ifdef UHCI_DEBUG
2073 1.1 augustss if (uhcidebug > 10) {
2074 1.55 augustss DPRINTF(("uhci_device_intr_transfer: data(1)\n"));
2075 1.55 augustss uhci_dump_tds(data);
2076 1.1 augustss uhci_dump_qh(upipe->u.intr.qhs[0]);
2077 1.1 augustss }
2078 1.1 augustss #endif
2079 1.1 augustss
2080 1.1 augustss s = splusb();
2081 1.1 augustss /* Set up interrupt info. */
2082 1.63 augustss ii->xfer = xfer;
2083 1.55 augustss ii->stdstart = data;
2084 1.55 augustss ii->stdend = dataend;
2085 1.7 augustss #ifdef DIAGNOSTIC
2086 1.70 augustss if (!ii->isdone) {
2087 1.70 augustss printf("uhci_device_intr_transfer: not done, ii=%p\n", ii);
2088 1.70 augustss }
2089 1.7 augustss ii->isdone = 0;
2090 1.7 augustss #endif
2091 1.1 augustss
2092 1.152 augustss DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
2093 1.12 augustss upipe->u.intr.qhs[0]));
2094 1.1 augustss for (i = 0; i < upipe->u.intr.npoll; i++) {
2095 1.1 augustss sqh = upipe->u.intr.qhs[i];
2096 1.55 augustss sqh->elink = data;
2097 1.121 augustss sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
2098 1.1 augustss }
2099 1.92 augustss uhci_add_intr_info(sc, ii);
2100 1.92 augustss xfer->status = USBD_IN_PROGRESS;
2101 1.1 augustss splx(s);
2102 1.1 augustss
2103 1.59 augustss #ifdef UHCI_DEBUG
2104 1.1 augustss if (uhcidebug > 10) {
2105 1.55 augustss DPRINTF(("uhci_device_intr_transfer: data(2)\n"));
2106 1.55 augustss uhci_dump_tds(data);
2107 1.1 augustss uhci_dump_qh(upipe->u.intr.qhs[0]);
2108 1.1 augustss }
2109 1.1 augustss #endif
2110 1.1 augustss
2111 1.1 augustss return (USBD_IN_PROGRESS);
2112 1.1 augustss }
2113 1.1 augustss
2114 1.1 augustss /* Abort a device control request. */
2115 1.1 augustss void
2116 1.119 augustss uhci_device_ctrl_abort(usbd_xfer_handle xfer)
2117 1.1 augustss {
2118 1.33 augustss DPRINTF(("uhci_device_ctrl_abort:\n"));
2119 1.66 augustss uhci_abort_xfer(xfer, USBD_CANCELLED);
2120 1.1 augustss }
2121 1.1 augustss
2122 1.1 augustss /* Close a device control pipe. */
2123 1.1 augustss void
2124 1.119 augustss uhci_device_ctrl_close(usbd_pipe_handle pipe)
2125 1.1 augustss {
2126 1.1 augustss }
2127 1.1 augustss
2128 1.1 augustss /* Abort a device interrupt request. */
2129 1.1 augustss void
2130 1.119 augustss uhci_device_intr_abort(usbd_xfer_handle xfer)
2131 1.1 augustss {
2132 1.63 augustss DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer));
2133 1.63 augustss if (xfer->pipe->intrxfer == xfer) {
2134 1.36 augustss DPRINTFN(1,("uhci_device_intr_abort: remove\n"));
2135 1.154 augustss xfer->pipe->intrxfer = NULL;
2136 1.1 augustss }
2137 1.66 augustss uhci_abort_xfer(xfer, USBD_CANCELLED);
2138 1.1 augustss }
2139 1.1 augustss
2140 1.1 augustss /* Close a device interrupt pipe. */
2141 1.1 augustss void
2142 1.119 augustss uhci_device_intr_close(usbd_pipe_handle pipe)
2143 1.1 augustss {
2144 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2145 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2146 1.92 augustss int i, npoll;
2147 1.92 augustss int s;
2148 1.1 augustss
2149 1.1 augustss /* Unlink descriptors from controller data structures. */
2150 1.1 augustss npoll = upipe->u.intr.npoll;
2151 1.92 augustss s = splusb();
2152 1.1 augustss for (i = 0; i < npoll; i++)
2153 1.92 augustss uhci_remove_intr(sc, upipe->u.intr.qhs[i]);
2154 1.92 augustss splx(s);
2155 1.1 augustss
2156 1.152 augustss /*
2157 1.1 augustss * We now have to wait for any activity on the physical
2158 1.1 augustss * descriptors to stop.
2159 1.1 augustss */
2160 1.20 augustss usb_delay_ms(&sc->sc_bus, 2);
2161 1.1 augustss
2162 1.1 augustss for(i = 0; i < npoll; i++)
2163 1.1 augustss uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
2164 1.31 augustss free(upipe->u.intr.qhs, M_USBHC);
2165 1.1 augustss
2166 1.1 augustss /* XXX free other resources */
2167 1.1 augustss }
2168 1.1 augustss
2169 1.1 augustss usbd_status
2170 1.119 augustss uhci_device_request(usbd_xfer_handle xfer)
2171 1.1 augustss {
2172 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2173 1.63 augustss usb_device_request_t *req = &xfer->request;
2174 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
2175 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2176 1.1 augustss int addr = dev->address;
2177 1.1 augustss int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2178 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2179 1.55 augustss uhci_soft_td_t *setup, *data, *stat, *next, *dataend;
2180 1.1 augustss uhci_soft_qh_t *sqh;
2181 1.1 augustss int len;
2182 1.1 augustss u_int32_t ls;
2183 1.63 augustss usbd_status err;
2184 1.1 augustss int isread;
2185 1.1 augustss int s;
2186 1.1 augustss
2187 1.13 augustss DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
2188 1.12 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
2189 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
2190 1.1 augustss UGETW(req->wIndex), UGETW(req->wLength),
2191 1.1 augustss addr, endpt));
2192 1.1 augustss
2193 1.144 augustss ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0;
2194 1.1 augustss isread = req->bmRequestType & UT_READ;
2195 1.1 augustss len = UGETW(req->wLength);
2196 1.1 augustss
2197 1.1 augustss setup = upipe->u.ctl.setup;
2198 1.1 augustss stat = upipe->u.ctl.stat;
2199 1.1 augustss sqh = upipe->u.ctl.sqh;
2200 1.1 augustss
2201 1.1 augustss /* Set up data transaction */
2202 1.1 augustss if (len != 0) {
2203 1.38 augustss upipe->nexttoggle = 1;
2204 1.73 augustss err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
2205 1.73 augustss &xfer->dmabuf, &data, &dataend);
2206 1.63 augustss if (err)
2207 1.63 augustss return (err);
2208 1.55 augustss next = data;
2209 1.55 augustss dataend->link.std = stat;
2210 1.121 augustss dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
2211 1.1 augustss } else {
2212 1.1 augustss next = stat;
2213 1.1 augustss }
2214 1.1 augustss upipe->u.ctl.length = len;
2215 1.1 augustss
2216 1.159 augustss memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req);
2217 1.1 augustss
2218 1.42 augustss setup->link.std = next;
2219 1.121 augustss setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
2220 1.88 tsutsui setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
2221 1.88 tsutsui UHCI_TD_ACTIVE);
2222 1.88 tsutsui setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr));
2223 1.160 augustss setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0));
2224 1.42 augustss
2225 1.92 augustss stat->link.std = NULL;
2226 1.88 tsutsui stat->td.td_link = htole32(UHCI_PTR_T);
2227 1.152 augustss stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
2228 1.39 augustss UHCI_TD_ACTIVE | UHCI_TD_IOC);
2229 1.152 augustss stat->td.td_token =
2230 1.88 tsutsui htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
2231 1.88 tsutsui UHCI_TD_IN (0, endpt, addr, 1));
2232 1.88 tsutsui stat->td.td_buffer = htole32(0);
2233 1.1 augustss
2234 1.59 augustss #ifdef UHCI_DEBUG
2235 1.67 augustss if (uhcidebug > 10) {
2236 1.47 augustss DPRINTF(("uhci_device_request: before transfer\n"));
2237 1.41 augustss uhci_dump_tds(setup);
2238 1.1 augustss }
2239 1.1 augustss #endif
2240 1.1 augustss
2241 1.1 augustss /* Set up interrupt info. */
2242 1.63 augustss ii->xfer = xfer;
2243 1.1 augustss ii->stdstart = setup;
2244 1.1 augustss ii->stdend = stat;
2245 1.7 augustss #ifdef DIAGNOSTIC
2246 1.70 augustss if (!ii->isdone) {
2247 1.70 augustss printf("uhci_device_request: not done, ii=%p\n", ii);
2248 1.70 augustss }
2249 1.7 augustss ii->isdone = 0;
2250 1.7 augustss #endif
2251 1.1 augustss
2252 1.42 augustss sqh->elink = setup;
2253 1.121 augustss sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD);
2254 1.1 augustss
2255 1.1 augustss s = splusb();
2256 1.144 augustss if (dev->speed == USB_SPEED_LOW)
2257 1.123 augustss uhci_add_ls_ctrl(sc, sqh);
2258 1.123 augustss else
2259 1.123 augustss uhci_add_hs_ctrl(sc, sqh);
2260 1.92 augustss uhci_add_intr_info(sc, ii);
2261 1.59 augustss #ifdef UHCI_DEBUG
2262 1.1 augustss if (uhcidebug > 12) {
2263 1.1 augustss uhci_soft_td_t *std;
2264 1.1 augustss uhci_soft_qh_t *xqh;
2265 1.13 augustss uhci_soft_qh_t *sxqh;
2266 1.13 augustss int maxqh = 0;
2267 1.1 augustss uhci_physaddr_t link;
2268 1.47 augustss DPRINTF(("uhci_enter_ctl_q: follow from [0]\n"));
2269 1.1 augustss for (std = sc->sc_vframes[0].htd, link = 0;
2270 1.121 augustss (link & UHCI_PTR_QH) == 0;
2271 1.42 augustss std = std->link.std) {
2272 1.88 tsutsui link = le32toh(std->td.td_link);
2273 1.1 augustss uhci_dump_td(std);
2274 1.1 augustss }
2275 1.67 augustss sxqh = (uhci_soft_qh_t *)std;
2276 1.67 augustss uhci_dump_qh(sxqh);
2277 1.67 augustss for (xqh = sxqh;
2278 1.63 augustss xqh != NULL;
2279 1.152 augustss xqh = (maxqh++ == 5 || xqh->hlink == sxqh ||
2280 1.121 augustss xqh->hlink == xqh ? NULL : xqh->hlink)) {
2281 1.1 augustss uhci_dump_qh(xqh);
2282 1.13 augustss }
2283 1.47 augustss DPRINTF(("Enqueued QH:\n"));
2284 1.1 augustss uhci_dump_qh(sqh);
2285 1.42 augustss uhci_dump_tds(sqh->elink);
2286 1.1 augustss }
2287 1.1 augustss #endif
2288 1.63 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
2289 1.171 tsutsui usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
2290 1.91 augustss uhci_timeout, ii);
2291 1.13 augustss }
2292 1.92 augustss xfer->status = USBD_IN_PROGRESS;
2293 1.1 augustss splx(s);
2294 1.1 augustss
2295 1.1 augustss return (USBD_NORMAL_COMPLETION);
2296 1.1 augustss }
2297 1.1 augustss
2298 1.16 augustss usbd_status
2299 1.119 augustss uhci_device_isoc_transfer(usbd_xfer_handle xfer)
2300 1.16 augustss {
2301 1.63 augustss usbd_status err;
2302 1.48 augustss
2303 1.63 augustss DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer));
2304 1.48 augustss
2305 1.48 augustss /* Put it on our queue, */
2306 1.63 augustss err = usb_insert_transfer(xfer);
2307 1.48 augustss
2308 1.48 augustss /* bail out on error, */
2309 1.63 augustss if (err && err != USBD_IN_PROGRESS)
2310 1.63 augustss return (err);
2311 1.48 augustss
2312 1.48 augustss /* XXX should check inuse here */
2313 1.48 augustss
2314 1.48 augustss /* insert into schedule, */
2315 1.63 augustss uhci_device_isoc_enter(xfer);
2316 1.48 augustss
2317 1.102 augustss /* and start if the pipe wasn't running */
2318 1.67 augustss if (!err)
2319 1.63 augustss uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
2320 1.48 augustss
2321 1.63 augustss return (err);
2322 1.48 augustss }
2323 1.48 augustss
2324 1.48 augustss void
2325 1.119 augustss uhci_device_isoc_enter(usbd_xfer_handle xfer)
2326 1.48 augustss {
2327 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2328 1.16 augustss usbd_device_handle dev = upipe->pipe.device;
2329 1.16 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2330 1.48 augustss struct iso *iso = &upipe->u.iso;
2331 1.152 augustss uhci_soft_td_t *std;
2332 1.48 augustss u_int32_t buf, len, status;
2333 1.48 augustss int s, i, next, nframes;
2334 1.48 augustss
2335 1.63 augustss DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p "
2336 1.48 augustss "nframes=%d\n",
2337 1.63 augustss iso->inuse, iso->next, xfer, xfer->nframes));
2338 1.48 augustss
2339 1.82 augustss if (sc->sc_dying)
2340 1.82 augustss return;
2341 1.82 augustss
2342 1.63 augustss if (xfer->status == USBD_IN_PROGRESS) {
2343 1.48 augustss /* This request has already been entered into the frame list */
2344 1.96 augustss printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer);
2345 1.68 augustss /* XXX */
2346 1.48 augustss }
2347 1.48 augustss
2348 1.48 augustss #ifdef DIAGNOSTIC
2349 1.48 augustss if (iso->inuse >= UHCI_VFRAMELIST_COUNT)
2350 1.48 augustss printf("uhci_device_isoc_enter: overflow!\n");
2351 1.19 augustss #endif
2352 1.16 augustss
2353 1.48 augustss next = iso->next;
2354 1.48 augustss if (next == -1) {
2355 1.48 augustss /* Not in use yet, schedule it a few frames ahead. */
2356 1.48 augustss next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
2357 1.48 augustss DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next));
2358 1.48 augustss }
2359 1.48 augustss
2360 1.63 augustss xfer->status = USBD_IN_PROGRESS;
2361 1.92 augustss UXFER(xfer)->curframe = next;
2362 1.48 augustss
2363 1.160 augustss buf = DMAADDR(&xfer->dmabuf, 0);
2364 1.88 tsutsui status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |
2365 1.88 tsutsui UHCI_TD_ACTIVE |
2366 1.88 tsutsui UHCI_TD_IOS);
2367 1.63 augustss nframes = xfer->nframes;
2368 1.48 augustss s = splusb();
2369 1.48 augustss for (i = 0; i < nframes; i++) {
2370 1.48 augustss std = iso->stds[next];
2371 1.48 augustss if (++next >= UHCI_VFRAMELIST_COUNT)
2372 1.48 augustss next = 0;
2373 1.63 augustss len = xfer->frlengths[i];
2374 1.88 tsutsui std->td.td_buffer = htole32(buf);
2375 1.48 augustss if (i == nframes - 1)
2376 1.88 tsutsui status |= UHCI_TD_IOC;
2377 1.88 tsutsui std->td.td_status = htole32(status);
2378 1.88 tsutsui std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK);
2379 1.88 tsutsui std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len));
2380 1.59 augustss #ifdef UHCI_DEBUG
2381 1.48 augustss if (uhcidebug > 5) {
2382 1.48 augustss DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i));
2383 1.48 augustss uhci_dump_td(std);
2384 1.48 augustss }
2385 1.48 augustss #endif
2386 1.48 augustss buf += len;
2387 1.48 augustss }
2388 1.48 augustss iso->next = next;
2389 1.63 augustss iso->inuse += xfer->nframes;
2390 1.16 augustss
2391 1.48 augustss splx(s);
2392 1.16 augustss }
2393 1.16 augustss
2394 1.16 augustss usbd_status
2395 1.119 augustss uhci_device_isoc_start(usbd_xfer_handle xfer)
2396 1.16 augustss {
2397 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2398 1.48 augustss uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
2399 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2400 1.48 augustss uhci_soft_td_t *end;
2401 1.48 augustss int s, i;
2402 1.48 augustss
2403 1.96 augustss DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer));
2404 1.96 augustss
2405 1.82 augustss if (sc->sc_dying)
2406 1.82 augustss return (USBD_IOERROR);
2407 1.82 augustss
2408 1.48 augustss #ifdef DIAGNOSTIC
2409 1.63 augustss if (xfer->status != USBD_IN_PROGRESS)
2410 1.63 augustss printf("uhci_device_isoc_start: not in progress %p\n", xfer);
2411 1.48 augustss #endif
2412 1.48 augustss
2413 1.48 augustss /* Find the last TD */
2414 1.92 augustss i = UXFER(xfer)->curframe + xfer->nframes;
2415 1.48 augustss if (i >= UHCI_VFRAMELIST_COUNT)
2416 1.48 augustss i -= UHCI_VFRAMELIST_COUNT;
2417 1.48 augustss end = upipe->u.iso.stds[i];
2418 1.48 augustss
2419 1.96 augustss #ifdef DIAGNOSTIC
2420 1.96 augustss if (end == NULL) {
2421 1.96 augustss printf("uhci_device_isoc_start: end == NULL\n");
2422 1.96 augustss return (USBD_INVAL);
2423 1.96 augustss }
2424 1.96 augustss #endif
2425 1.96 augustss
2426 1.48 augustss s = splusb();
2427 1.152 augustss
2428 1.48 augustss /* Set up interrupt info. */
2429 1.63 augustss ii->xfer = xfer;
2430 1.48 augustss ii->stdstart = end;
2431 1.48 augustss ii->stdend = end;
2432 1.48 augustss #ifdef DIAGNOSTIC
2433 1.102 augustss if (!ii->isdone)
2434 1.70 augustss printf("uhci_device_isoc_start: not done, ii=%p\n", ii);
2435 1.48 augustss ii->isdone = 0;
2436 1.48 augustss #endif
2437 1.92 augustss uhci_add_intr_info(sc, ii);
2438 1.152 augustss
2439 1.48 augustss splx(s);
2440 1.48 augustss
2441 1.48 augustss return (USBD_IN_PROGRESS);
2442 1.16 augustss }
2443 1.16 augustss
2444 1.16 augustss void
2445 1.119 augustss uhci_device_isoc_abort(usbd_xfer_handle xfer)
2446 1.16 augustss {
2447 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2448 1.48 augustss uhci_soft_td_t **stds = upipe->u.iso.stds;
2449 1.48 augustss uhci_soft_td_t *std;
2450 1.92 augustss int i, n, s, nframes, maxlen, len;
2451 1.92 augustss
2452 1.92 augustss s = splusb();
2453 1.92 augustss
2454 1.92 augustss /* Transfer is already done. */
2455 1.152 augustss if (xfer->status != USBD_NOT_STARTED &&
2456 1.92 augustss xfer->status != USBD_IN_PROGRESS) {
2457 1.92 augustss splx(s);
2458 1.92 augustss return;
2459 1.92 augustss }
2460 1.48 augustss
2461 1.92 augustss /* Give xfer the requested abort code. */
2462 1.63 augustss xfer->status = USBD_CANCELLED;
2463 1.48 augustss
2464 1.48 augustss /* make hardware ignore it, */
2465 1.63 augustss nframes = xfer->nframes;
2466 1.92 augustss n = UXFER(xfer)->curframe;
2467 1.92 augustss maxlen = 0;
2468 1.48 augustss for (i = 0; i < nframes; i++) {
2469 1.48 augustss std = stds[n];
2470 1.88 tsutsui std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
2471 1.130 tsutsui len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token));
2472 1.92 augustss if (len > maxlen)
2473 1.92 augustss maxlen = len;
2474 1.48 augustss if (++n >= UHCI_VFRAMELIST_COUNT)
2475 1.48 augustss n = 0;
2476 1.48 augustss }
2477 1.48 augustss
2478 1.92 augustss /* and wait until we are sure the hardware has finished. */
2479 1.92 augustss delay(maxlen);
2480 1.92 augustss
2481 1.96 augustss #ifdef DIAGNOSTIC
2482 1.96 augustss UXFER(xfer)->iinfo.isdone = 1;
2483 1.96 augustss #endif
2484 1.92 augustss /* Run callback and remove from interrupt list. */
2485 1.92 augustss usb_transfer_complete(xfer);
2486 1.48 augustss
2487 1.92 augustss splx(s);
2488 1.16 augustss }
2489 1.16 augustss
2490 1.16 augustss void
2491 1.119 augustss uhci_device_isoc_close(usbd_pipe_handle pipe)
2492 1.16 augustss {
2493 1.16 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2494 1.16 augustss usbd_device_handle dev = upipe->pipe.device;
2495 1.16 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2496 1.48 augustss uhci_soft_td_t *std, *vstd;
2497 1.16 augustss struct iso *iso;
2498 1.92 augustss int i, s;
2499 1.16 augustss
2500 1.16 augustss /*
2501 1.16 augustss * Make sure all TDs are marked as inactive.
2502 1.16 augustss * Wait for completion.
2503 1.16 augustss * Unschedule.
2504 1.16 augustss * Deallocate.
2505 1.16 augustss */
2506 1.16 augustss iso = &upipe->u.iso;
2507 1.16 augustss
2508 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++)
2509 1.88 tsutsui iso->stds[i]->td.td_status &= htole32(~UHCI_TD_ACTIVE);
2510 1.20 augustss usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */
2511 1.16 augustss
2512 1.92 augustss s = splusb();
2513 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2514 1.16 augustss std = iso->stds[i];
2515 1.48 augustss for (vstd = sc->sc_vframes[i].htd;
2516 1.67 augustss vstd != NULL && vstd->link.std != std;
2517 1.42 augustss vstd = vstd->link.std)
2518 1.16 augustss ;
2519 1.67 augustss if (vstd == NULL) {
2520 1.16 augustss /*panic*/
2521 1.16 augustss printf("uhci_device_isoc_close: %p not found\n", std);
2522 1.92 augustss splx(s);
2523 1.16 augustss return;
2524 1.16 augustss }
2525 1.42 augustss vstd->link = std->link;
2526 1.42 augustss vstd->td.td_link = std->td.td_link;
2527 1.16 augustss uhci_free_std(sc, std);
2528 1.16 augustss }
2529 1.92 augustss splx(s);
2530 1.16 augustss
2531 1.31 augustss free(iso->stds, M_USBHC);
2532 1.16 augustss }
2533 1.16 augustss
2534 1.16 augustss usbd_status
2535 1.119 augustss uhci_setup_isoc(usbd_pipe_handle pipe)
2536 1.16 augustss {
2537 1.16 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2538 1.16 augustss usbd_device_handle dev = upipe->pipe.device;
2539 1.16 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2540 1.16 augustss int addr = upipe->pipe.device->address;
2541 1.16 augustss int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2542 1.45 augustss int rd = UE_GET_DIR(endpt) == UE_DIR_IN;
2543 1.48 augustss uhci_soft_td_t *std, *vstd;
2544 1.48 augustss u_int32_t token;
2545 1.16 augustss struct iso *iso;
2546 1.92 augustss int i, s;
2547 1.16 augustss
2548 1.16 augustss iso = &upipe->u.iso;
2549 1.16 augustss iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *),
2550 1.31 augustss M_USBHC, M_WAITOK);
2551 1.16 augustss
2552 1.88 tsutsui token = rd ? UHCI_TD_IN (0, endpt, addr, 0) :
2553 1.88 tsutsui UHCI_TD_OUT(0, endpt, addr, 0);
2554 1.16 augustss
2555 1.48 augustss /* Allocate the TDs and mark as inactive; */
2556 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2557 1.48 augustss std = uhci_alloc_std(sc);
2558 1.48 augustss if (std == 0)
2559 1.48 augustss goto bad;
2560 1.88 tsutsui std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
2561 1.88 tsutsui std->td.td_token = htole32(token);
2562 1.48 augustss iso->stds[i] = std;
2563 1.16 augustss }
2564 1.16 augustss
2565 1.48 augustss /* Insert TDs into schedule. */
2566 1.92 augustss s = splusb();
2567 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2568 1.16 augustss std = iso->stds[i];
2569 1.48 augustss vstd = sc->sc_vframes[i].htd;
2570 1.42 augustss std->link = vstd->link;
2571 1.42 augustss std->td.td_link = vstd->td.td_link;
2572 1.42 augustss vstd->link.std = std;
2573 1.121 augustss vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD);
2574 1.16 augustss }
2575 1.92 augustss splx(s);
2576 1.16 augustss
2577 1.48 augustss iso->next = -1;
2578 1.48 augustss iso->inuse = 0;
2579 1.48 augustss
2580 1.16 augustss return (USBD_NORMAL_COMPLETION);
2581 1.16 augustss
2582 1.48 augustss bad:
2583 1.16 augustss while (--i >= 0)
2584 1.16 augustss uhci_free_std(sc, iso->stds[i]);
2585 1.31 augustss free(iso->stds, M_USBHC);
2586 1.16 augustss return (USBD_NOMEM);
2587 1.16 augustss }
2588 1.16 augustss
2589 1.16 augustss void
2590 1.119 augustss uhci_device_isoc_done(usbd_xfer_handle xfer)
2591 1.16 augustss {
2592 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2593 1.48 augustss
2594 1.63 augustss DPRINTFN(4, ("uhci_isoc_done: length=%d\n", xfer->actlen));
2595 1.93 augustss
2596 1.96 augustss if (ii->xfer != xfer)
2597 1.96 augustss /* Not on interrupt list, ignore it. */
2598 1.170 augustss return;
2599 1.170 augustss
2600 1.170 augustss if (!uhci_active_intr_info(ii))
2601 1.96 augustss return;
2602 1.96 augustss
2603 1.93 augustss #ifdef DIAGNOSTIC
2604 1.94 augustss if (xfer->busy_free != XFER_BUSY) {
2605 1.94 augustss printf("uhci_device_isoc_done: xfer=%p not busy 0x%08x\n",
2606 1.94 augustss xfer, xfer->busy_free);
2607 1.93 augustss return;
2608 1.93 augustss }
2609 1.93 augustss
2610 1.93 augustss if (ii->stdend == NULL) {
2611 1.93 augustss printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
2612 1.93 augustss #ifdef UHCI_DEBUG
2613 1.93 augustss uhci_dump_ii(ii);
2614 1.93 augustss #endif
2615 1.93 augustss return;
2616 1.93 augustss }
2617 1.93 augustss #endif
2618 1.48 augustss
2619 1.48 augustss /* Turn off the interrupt since it is active even if the TD is not. */
2620 1.88 tsutsui ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC);
2621 1.48 augustss
2622 1.92 augustss uhci_del_intr_info(ii); /* remove from active list */
2623 1.16 augustss }
2624 1.16 augustss
2625 1.1 augustss void
2626 1.119 augustss uhci_device_intr_done(usbd_xfer_handle xfer)
2627 1.1 augustss {
2628 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2629 1.1 augustss uhci_softc_t *sc = ii->sc;
2630 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2631 1.1 augustss uhci_soft_qh_t *sqh;
2632 1.1 augustss int i, npoll;
2633 1.1 augustss
2634 1.173 gson DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen));
2635 1.1 augustss
2636 1.1 augustss npoll = upipe->u.intr.npoll;
2637 1.1 augustss for(i = 0; i < npoll; i++) {
2638 1.1 augustss sqh = upipe->u.intr.qhs[i];
2639 1.121 augustss sqh->elink = NULL;
2640 1.88 tsutsui sqh->qh.qh_elink = htole32(UHCI_PTR_T);
2641 1.1 augustss }
2642 1.149 augustss uhci_free_std_chain(sc, ii->stdstart, NULL);
2643 1.1 augustss
2644 1.1 augustss /* XXX Wasteful. */
2645 1.63 augustss if (xfer->pipe->repeat) {
2646 1.55 augustss uhci_soft_td_t *data, *dataend;
2647 1.1 augustss
2648 1.92 augustss DPRINTFN(5,("uhci_device_intr_done: requeing\n"));
2649 1.92 augustss
2650 1.1 augustss /* This alloc cannot fail since we freed the chain above. */
2651 1.73 augustss uhci_alloc_std_chain(upipe, sc, xfer->length, 1, xfer->flags,
2652 1.63 augustss &xfer->dmabuf, &data, &dataend);
2653 1.88 tsutsui dataend->td.td_status |= htole32(UHCI_TD_IOC);
2654 1.1 augustss
2655 1.59 augustss #ifdef UHCI_DEBUG
2656 1.1 augustss if (uhcidebug > 10) {
2657 1.55 augustss DPRINTF(("uhci_device_intr_done: data(1)\n"));
2658 1.55 augustss uhci_dump_tds(data);
2659 1.1 augustss uhci_dump_qh(upipe->u.intr.qhs[0]);
2660 1.1 augustss }
2661 1.1 augustss #endif
2662 1.1 augustss
2663 1.55 augustss ii->stdstart = data;
2664 1.55 augustss ii->stdend = dataend;
2665 1.7 augustss #ifdef DIAGNOSTIC
2666 1.70 augustss if (!ii->isdone) {
2667 1.70 augustss printf("uhci_device_intr_done: not done, ii=%p\n", ii);
2668 1.70 augustss }
2669 1.7 augustss ii->isdone = 0;
2670 1.7 augustss #endif
2671 1.1 augustss for (i = 0; i < npoll; i++) {
2672 1.1 augustss sqh = upipe->u.intr.qhs[i];
2673 1.55 augustss sqh->elink = data;
2674 1.121 augustss sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
2675 1.1 augustss }
2676 1.92 augustss xfer->status = USBD_IN_PROGRESS;
2677 1.92 augustss /* The ii is already on the examined list, just leave it. */
2678 1.1 augustss } else {
2679 1.92 augustss DPRINTFN(5,("uhci_device_intr_done: removing\n"));
2680 1.169 augustss if (uhci_active_intr_info(ii))
2681 1.169 augustss uhci_del_intr_info(ii);
2682 1.1 augustss }
2683 1.1 augustss }
2684 1.1 augustss
2685 1.1 augustss /* Deallocate request data structures */
2686 1.1 augustss void
2687 1.119 augustss uhci_device_ctrl_done(usbd_xfer_handle xfer)
2688 1.1 augustss {
2689 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2690 1.1 augustss uhci_softc_t *sc = ii->sc;
2691 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2692 1.1 augustss
2693 1.7 augustss #ifdef DIAGNOSTIC
2694 1.63 augustss if (!(xfer->rqflags & URQ_REQUEST))
2695 1.173 gson panic("uhci_device_ctrl_done: not a request");
2696 1.7 augustss #endif
2697 1.1 augustss
2698 1.169 augustss if (!uhci_active_intr_info(ii))
2699 1.169 augustss return;
2700 1.169 augustss
2701 1.92 augustss uhci_del_intr_info(ii); /* remove from active list */
2702 1.1 augustss
2703 1.144 augustss if (upipe->pipe.device->speed == USB_SPEED_LOW)
2704 1.123 augustss uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh);
2705 1.123 augustss else
2706 1.123 augustss uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh);
2707 1.1 augustss
2708 1.49 augustss if (upipe->u.ctl.length != 0)
2709 1.42 augustss uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend);
2710 1.49 augustss
2711 1.173 gson DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen));
2712 1.1 augustss }
2713 1.1 augustss
2714 1.1 augustss /* Deallocate request data structures */
2715 1.1 augustss void
2716 1.119 augustss uhci_device_bulk_done(usbd_xfer_handle xfer)
2717 1.1 augustss {
2718 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2719 1.1 augustss uhci_softc_t *sc = ii->sc;
2720 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2721 1.169 augustss
2722 1.173 gson DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n",
2723 1.169 augustss xfer, ii, sc, upipe));
2724 1.169 augustss
2725 1.169 augustss if (!uhci_active_intr_info(ii))
2726 1.169 augustss return;
2727 1.1 augustss
2728 1.92 augustss uhci_del_intr_info(ii); /* remove from active list */
2729 1.1 augustss
2730 1.1 augustss uhci_remove_bulk(sc, upipe->u.bulk.sqh);
2731 1.32 augustss
2732 1.149 augustss uhci_free_std_chain(sc, ii->stdstart, NULL);
2733 1.32 augustss
2734 1.173 gson DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen));
2735 1.1 augustss }
2736 1.1 augustss
2737 1.1 augustss /* Add interrupt QH, called with vflock. */
2738 1.1 augustss void
2739 1.119 augustss uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
2740 1.1 augustss {
2741 1.92 augustss struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
2742 1.42 augustss uhci_soft_qh_t *eqh;
2743 1.1 augustss
2744 1.92 augustss DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh));
2745 1.92 augustss
2746 1.42 augustss eqh = vf->eqh;
2747 1.42 augustss sqh->hlink = eqh->hlink;
2748 1.42 augustss sqh->qh.qh_hlink = eqh->qh.qh_hlink;
2749 1.42 augustss eqh->hlink = sqh;
2750 1.121 augustss eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
2751 1.1 augustss vf->eqh = sqh;
2752 1.1 augustss vf->bandwidth++;
2753 1.1 augustss }
2754 1.1 augustss
2755 1.119 augustss /* Remove interrupt QH. */
2756 1.1 augustss void
2757 1.119 augustss uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
2758 1.1 augustss {
2759 1.92 augustss struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
2760 1.1 augustss uhci_soft_qh_t *pqh;
2761 1.1 augustss
2762 1.92 augustss DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh));
2763 1.1 augustss
2764 1.124 augustss /* See comment in uhci_remove_ctrl() */
2765 1.124 augustss if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
2766 1.124 augustss sqh->qh.qh_elink = htole32(UHCI_PTR_T);
2767 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
2768 1.124 augustss }
2769 1.124 augustss
2770 1.92 augustss pqh = uhci_find_prev_qh(vf->hqh, sqh);
2771 1.42 augustss pqh->hlink = sqh->hlink;
2772 1.42 augustss pqh->qh.qh_hlink = sqh->qh.qh_hlink;
2773 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
2774 1.1 augustss if (vf->eqh == sqh)
2775 1.1 augustss vf->eqh = pqh;
2776 1.1 augustss vf->bandwidth--;
2777 1.1 augustss }
2778 1.1 augustss
2779 1.1 augustss usbd_status
2780 1.119 augustss uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival)
2781 1.1 augustss {
2782 1.1 augustss uhci_soft_qh_t *sqh;
2783 1.1 augustss int i, npoll, s;
2784 1.1 augustss u_int bestbw, bw, bestoffs, offs;
2785 1.1 augustss
2786 1.173 gson DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe));
2787 1.1 augustss if (ival == 0) {
2788 1.173 gson printf("uhci_device_setintr: 0 interval\n");
2789 1.1 augustss return (USBD_INVAL);
2790 1.1 augustss }
2791 1.1 augustss
2792 1.1 augustss if (ival > UHCI_VFRAMELIST_COUNT)
2793 1.1 augustss ival = UHCI_VFRAMELIST_COUNT;
2794 1.1 augustss npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
2795 1.173 gson DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll));
2796 1.1 augustss
2797 1.1 augustss upipe->u.intr.npoll = npoll;
2798 1.152 augustss upipe->u.intr.qhs =
2799 1.31 augustss malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK);
2800 1.1 augustss
2801 1.152 augustss /*
2802 1.1 augustss * Figure out which offset in the schedule that has most
2803 1.1 augustss * bandwidth left over.
2804 1.1 augustss */
2805 1.1 augustss #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
2806 1.1 augustss for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
2807 1.1 augustss for (bw = i = 0; i < npoll; i++)
2808 1.1 augustss bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
2809 1.1 augustss if (bw < bestbw) {
2810 1.1 augustss bestbw = bw;
2811 1.1 augustss bestoffs = offs;
2812 1.1 augustss }
2813 1.1 augustss }
2814 1.173 gson DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
2815 1.1 augustss
2816 1.1 augustss for(i = 0; i < npoll; i++) {
2817 1.1 augustss upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
2818 1.121 augustss sqh->elink = NULL;
2819 1.88 tsutsui sqh->qh.qh_elink = htole32(UHCI_PTR_T);
2820 1.1 augustss sqh->pos = MOD(i * ival + bestoffs);
2821 1.1 augustss }
2822 1.1 augustss #undef MOD
2823 1.1 augustss
2824 1.1 augustss s = splusb();
2825 1.1 augustss /* Enter QHs into the controller data structures. */
2826 1.1 augustss for(i = 0; i < npoll; i++)
2827 1.92 augustss uhci_add_intr(sc, upipe->u.intr.qhs[i]);
2828 1.92 augustss splx(s);
2829 1.1 augustss
2830 1.173 gson DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe));
2831 1.1 augustss return (USBD_NORMAL_COMPLETION);
2832 1.1 augustss }
2833 1.1 augustss
2834 1.1 augustss /* Open a new pipe. */
2835 1.1 augustss usbd_status
2836 1.119 augustss uhci_open(usbd_pipe_handle pipe)
2837 1.1 augustss {
2838 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2839 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2840 1.1 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2841 1.63 augustss usbd_status err;
2842 1.79 augustss int ival;
2843 1.1 augustss
2844 1.1 augustss DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2845 1.152 augustss pipe, pipe->device->address,
2846 1.1 augustss ed->bEndpointAddress, sc->sc_addr));
2847 1.92 augustss
2848 1.92 augustss upipe->aborting = 0;
2849 1.92 augustss upipe->nexttoggle = 0;
2850 1.92 augustss
2851 1.1 augustss if (pipe->device->address == sc->sc_addr) {
2852 1.1 augustss switch (ed->bEndpointAddress) {
2853 1.1 augustss case USB_CONTROL_ENDPOINT:
2854 1.1 augustss pipe->methods = &uhci_root_ctrl_methods;
2855 1.1 augustss break;
2856 1.45 augustss case UE_DIR_IN | UHCI_INTR_ENDPT:
2857 1.1 augustss pipe->methods = &uhci_root_intr_methods;
2858 1.1 augustss break;
2859 1.1 augustss default:
2860 1.1 augustss return (USBD_INVAL);
2861 1.1 augustss }
2862 1.1 augustss } else {
2863 1.1 augustss switch (ed->bmAttributes & UE_XFERTYPE) {
2864 1.1 augustss case UE_CONTROL:
2865 1.1 augustss pipe->methods = &uhci_device_ctrl_methods;
2866 1.1 augustss upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
2867 1.63 augustss if (upipe->u.ctl.sqh == NULL)
2868 1.5 augustss goto bad;
2869 1.1 augustss upipe->u.ctl.setup = uhci_alloc_std(sc);
2870 1.63 augustss if (upipe->u.ctl.setup == NULL) {
2871 1.5 augustss uhci_free_sqh(sc, upipe->u.ctl.sqh);
2872 1.5 augustss goto bad;
2873 1.5 augustss }
2874 1.1 augustss upipe->u.ctl.stat = uhci_alloc_std(sc);
2875 1.63 augustss if (upipe->u.ctl.stat == NULL) {
2876 1.5 augustss uhci_free_sqh(sc, upipe->u.ctl.sqh);
2877 1.5 augustss uhci_free_std(sc, upipe->u.ctl.setup);
2878 1.5 augustss goto bad;
2879 1.5 augustss }
2880 1.152 augustss err = usb_allocmem(&sc->sc_bus,
2881 1.152 augustss sizeof(usb_device_request_t),
2882 1.63 augustss 0, &upipe->u.ctl.reqdma);
2883 1.63 augustss if (err) {
2884 1.5 augustss uhci_free_sqh(sc, upipe->u.ctl.sqh);
2885 1.5 augustss uhci_free_std(sc, upipe->u.ctl.setup);
2886 1.5 augustss uhci_free_std(sc, upipe->u.ctl.stat);
2887 1.5 augustss goto bad;
2888 1.5 augustss }
2889 1.1 augustss break;
2890 1.1 augustss case UE_INTERRUPT:
2891 1.1 augustss pipe->methods = &uhci_device_intr_methods;
2892 1.79 augustss ival = pipe->interval;
2893 1.79 augustss if (ival == USBD_DEFAULT_INTERVAL)
2894 1.79 augustss ival = ed->bInterval;
2895 1.80 augustss return (uhci_device_setintr(sc, upipe, ival));
2896 1.1 augustss case UE_ISOCHRONOUS:
2897 1.16 augustss pipe->methods = &uhci_device_isoc_methods;
2898 1.48 augustss return (uhci_setup_isoc(pipe));
2899 1.1 augustss case UE_BULK:
2900 1.1 augustss pipe->methods = &uhci_device_bulk_methods;
2901 1.1 augustss upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
2902 1.63 augustss if (upipe->u.bulk.sqh == NULL)
2903 1.5 augustss goto bad;
2904 1.1 augustss break;
2905 1.1 augustss }
2906 1.1 augustss }
2907 1.1 augustss return (USBD_NORMAL_COMPLETION);
2908 1.5 augustss
2909 1.5 augustss bad:
2910 1.5 augustss return (USBD_NOMEM);
2911 1.1 augustss }
2912 1.1 augustss
2913 1.1 augustss /*
2914 1.1 augustss * Data structures and routines to emulate the root hub.
2915 1.1 augustss */
2916 1.1 augustss usb_device_descriptor_t uhci_devd = {
2917 1.1 augustss USB_DEVICE_DESCRIPTOR_SIZE,
2918 1.1 augustss UDESC_DEVICE, /* type */
2919 1.1 augustss {0x00, 0x01}, /* USB version */
2920 1.87 augustss UDCLASS_HUB, /* class */
2921 1.87 augustss UDSUBCLASS_HUB, /* subclass */
2922 1.144 augustss UDPROTO_FSHUB, /* protocol */
2923 1.1 augustss 64, /* max packet */
2924 1.1 augustss {0},{0},{0x00,0x01}, /* device id */
2925 1.1 augustss 1,2,0, /* string indicies */
2926 1.1 augustss 1 /* # of configurations */
2927 1.1 augustss };
2928 1.1 augustss
2929 1.1 augustss usb_config_descriptor_t uhci_confd = {
2930 1.1 augustss USB_CONFIG_DESCRIPTOR_SIZE,
2931 1.1 augustss UDESC_CONFIG,
2932 1.1 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
2933 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
2934 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
2935 1.1 augustss 1,
2936 1.1 augustss 1,
2937 1.1 augustss 0,
2938 1.1 augustss UC_SELF_POWERED,
2939 1.1 augustss 0 /* max power */
2940 1.1 augustss };
2941 1.1 augustss
2942 1.1 augustss usb_interface_descriptor_t uhci_ifcd = {
2943 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
2944 1.1 augustss UDESC_INTERFACE,
2945 1.1 augustss 0,
2946 1.1 augustss 0,
2947 1.1 augustss 1,
2948 1.87 augustss UICLASS_HUB,
2949 1.87 augustss UISUBCLASS_HUB,
2950 1.144 augustss UIPROTO_FSHUB,
2951 1.1 augustss 0
2952 1.1 augustss };
2953 1.1 augustss
2954 1.1 augustss usb_endpoint_descriptor_t uhci_endpd = {
2955 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
2956 1.1 augustss UDESC_ENDPOINT,
2957 1.45 augustss UE_DIR_IN | UHCI_INTR_ENDPT,
2958 1.1 augustss UE_INTERRUPT,
2959 1.1 augustss {8},
2960 1.1 augustss 255
2961 1.1 augustss };
2962 1.1 augustss
2963 1.1 augustss usb_hub_descriptor_t uhci_hubd_piix = {
2964 1.1 augustss USB_HUB_DESCRIPTOR_SIZE,
2965 1.1 augustss UDESC_HUB,
2966 1.1 augustss 2,
2967 1.1 augustss { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
2968 1.1 augustss 50, /* power on to power good */
2969 1.1 augustss 0,
2970 1.1 augustss { 0x00 }, /* both ports are removable */
2971 1.1 augustss };
2972 1.1 augustss
2973 1.1 augustss int
2974 1.119 augustss uhci_str(usb_string_descriptor_t *p, int l, char *s)
2975 1.1 augustss {
2976 1.1 augustss int i;
2977 1.1 augustss
2978 1.1 augustss if (l == 0)
2979 1.1 augustss return (0);
2980 1.1 augustss p->bLength = 2 * strlen(s) + 2;
2981 1.1 augustss if (l == 1)
2982 1.1 augustss return (1);
2983 1.1 augustss p->bDescriptorType = UDESC_STRING;
2984 1.1 augustss l -= 2;
2985 1.1 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
2986 1.1 augustss USETW2(p->bString[i], 0, s[i]);
2987 1.1 augustss return (2*i+2);
2988 1.1 augustss }
2989 1.1 augustss
2990 1.1 augustss /*
2991 1.166 dsainty * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also
2992 1.166 dsainty * enables the port, and also states that SET_FEATURE(PORT_ENABLE)
2993 1.166 dsainty * should not be used by the USB subsystem. As we cannot issue a
2994 1.166 dsainty * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port
2995 1.166 dsainty * will be enabled as part of the reset.
2996 1.166 dsainty *
2997 1.166 dsainty * On the VT83C572, the port cannot be successfully enabled until the
2998 1.166 dsainty * outstanding "port enable change" and "connection status change"
2999 1.166 dsainty * events have been reset.
3000 1.166 dsainty */
3001 1.166 dsainty Static usbd_status
3002 1.166 dsainty uhci_portreset(uhci_softc_t *sc, int index)
3003 1.166 dsainty {
3004 1.166 dsainty int lim, port, x;
3005 1.166 dsainty
3006 1.166 dsainty if (index == 1)
3007 1.166 dsainty port = UHCI_PORTSC1;
3008 1.166 dsainty else if (index == 2)
3009 1.166 dsainty port = UHCI_PORTSC2;
3010 1.166 dsainty else
3011 1.166 dsainty return (USBD_IOERROR);
3012 1.166 dsainty
3013 1.166 dsainty x = URWMASK(UREAD2(sc, port));
3014 1.166 dsainty UWRITE2(sc, port, x | UHCI_PORTSC_PR);
3015 1.166 dsainty
3016 1.166 dsainty usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
3017 1.166 dsainty
3018 1.166 dsainty DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n",
3019 1.166 dsainty index, UREAD2(sc, port)));
3020 1.166 dsainty
3021 1.166 dsainty x = URWMASK(UREAD2(sc, port));
3022 1.166 dsainty UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
3023 1.166 dsainty
3024 1.166 dsainty delay(100);
3025 1.166 dsainty
3026 1.166 dsainty DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n",
3027 1.166 dsainty index, UREAD2(sc, port)));
3028 1.166 dsainty
3029 1.166 dsainty x = URWMASK(UREAD2(sc, port));
3030 1.166 dsainty UWRITE2(sc, port, x | UHCI_PORTSC_PE);
3031 1.166 dsainty
3032 1.166 dsainty for (lim = 10; --lim > 0;) {
3033 1.166 dsainty usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY);
3034 1.166 dsainty
3035 1.166 dsainty x = UREAD2(sc, port);
3036 1.166 dsainty
3037 1.166 dsainty DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n",
3038 1.166 dsainty index, lim, x));
3039 1.166 dsainty
3040 1.166 dsainty if (!(x & UHCI_PORTSC_CCS)) {
3041 1.166 dsainty /*
3042 1.166 dsainty * No device is connected (or was disconnected
3043 1.166 dsainty * during reset). Consider the port reset.
3044 1.166 dsainty * The delay must be long enough to ensure on
3045 1.166 dsainty * the initial iteration that the device
3046 1.166 dsainty * connection will have been registered. 50ms
3047 1.166 dsainty * appears to be sufficient, but 20ms is not.
3048 1.166 dsainty */
3049 1.166 dsainty DPRINTFN(3,("uhci port %d loop %u, device detached\n",
3050 1.166 dsainty index, lim));
3051 1.166 dsainty break;
3052 1.166 dsainty }
3053 1.166 dsainty
3054 1.166 dsainty if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) {
3055 1.166 dsainty /*
3056 1.166 dsainty * Port enabled changed and/or connection
3057 1.166 dsainty * status changed were set. Reset either or
3058 1.166 dsainty * both raised flags (by writing a 1 to that
3059 1.166 dsainty * bit), and wait again for state to settle.
3060 1.166 dsainty */
3061 1.166 dsainty UWRITE2(sc, port, URWMASK(x) |
3062 1.166 dsainty (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)));
3063 1.166 dsainty continue;
3064 1.166 dsainty }
3065 1.166 dsainty
3066 1.166 dsainty if (x & UHCI_PORTSC_PE)
3067 1.166 dsainty /* Port is enabled */
3068 1.166 dsainty break;
3069 1.166 dsainty
3070 1.166 dsainty UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE);
3071 1.166 dsainty }
3072 1.166 dsainty
3073 1.166 dsainty DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n",
3074 1.166 dsainty index, UREAD2(sc, port)));
3075 1.166 dsainty
3076 1.166 dsainty if (lim <= 0) {
3077 1.166 dsainty DPRINTFN(1,("uhci port %d reset timed out\n", index));
3078 1.166 dsainty return (USBD_TIMEOUT);
3079 1.166 dsainty }
3080 1.166 dsainty
3081 1.166 dsainty sc->sc_isreset = 1;
3082 1.166 dsainty return (USBD_NORMAL_COMPLETION);
3083 1.166 dsainty }
3084 1.166 dsainty
3085 1.166 dsainty /*
3086 1.1 augustss * Simulate a hardware hub by handling all the necessary requests.
3087 1.1 augustss */
3088 1.1 augustss usbd_status
3089 1.119 augustss uhci_root_ctrl_transfer(usbd_xfer_handle xfer)
3090 1.1 augustss {
3091 1.63 augustss usbd_status err;
3092 1.16 augustss
3093 1.52 augustss /* Insert last in queue. */
3094 1.63 augustss err = usb_insert_transfer(xfer);
3095 1.63 augustss if (err)
3096 1.63 augustss return (err);
3097 1.52 augustss
3098 1.152 augustss /*
3099 1.94 augustss * Pipe isn't running (otherwise err would be USBD_INPROG),
3100 1.94 augustss * so start it first.
3101 1.67 augustss */
3102 1.63 augustss return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3103 1.16 augustss }
3104 1.16 augustss
3105 1.16 augustss usbd_status
3106 1.119 augustss uhci_root_ctrl_start(usbd_xfer_handle xfer)
3107 1.16 augustss {
3108 1.63 augustss uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
3109 1.1 augustss usb_device_request_t *req;
3110 1.59 augustss void *buf = NULL;
3111 1.1 augustss int port, x;
3112 1.52 augustss int s, len, value, index, status, change, l, totlen = 0;
3113 1.1 augustss usb_port_status_t ps;
3114 1.63 augustss usbd_status err;
3115 1.1 augustss
3116 1.82 augustss if (sc->sc_dying)
3117 1.82 augustss return (USBD_IOERROR);
3118 1.82 augustss
3119 1.48 augustss #ifdef DIAGNOSTIC
3120 1.63 augustss if (!(xfer->rqflags & URQ_REQUEST))
3121 1.163 provos panic("uhci_root_ctrl_transfer: not a request");
3122 1.48 augustss #endif
3123 1.63 augustss req = &xfer->request;
3124 1.1 augustss
3125 1.152 augustss DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
3126 1.1 augustss req->bmRequestType, req->bRequest));
3127 1.1 augustss
3128 1.1 augustss len = UGETW(req->wLength);
3129 1.1 augustss value = UGETW(req->wValue);
3130 1.1 augustss index = UGETW(req->wIndex);
3131 1.49 augustss
3132 1.49 augustss if (len != 0)
3133 1.159 augustss buf = KERNADDR(&xfer->dmabuf, 0);
3134 1.49 augustss
3135 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
3136 1.1 augustss switch(C(req->bRequest, req->bmRequestType)) {
3137 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
3138 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
3139 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
3140 1.152 augustss /*
3141 1.13 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
3142 1.1 augustss * for the integrated root hub.
3143 1.1 augustss */
3144 1.1 augustss break;
3145 1.1 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
3146 1.1 augustss if (len > 0) {
3147 1.1 augustss *(u_int8_t *)buf = sc->sc_conf;
3148 1.1 augustss totlen = 1;
3149 1.1 augustss }
3150 1.1 augustss break;
3151 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
3152 1.1 augustss DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
3153 1.1 augustss switch(value >> 8) {
3154 1.1 augustss case UDESC_DEVICE:
3155 1.1 augustss if ((value & 0xff) != 0) {
3156 1.63 augustss err = USBD_IOERROR;
3157 1.1 augustss goto ret;
3158 1.1 augustss }
3159 1.1 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
3160 1.27 augustss USETW(uhci_devd.idVendor, sc->sc_id_vendor);
3161 1.1 augustss memcpy(buf, &uhci_devd, l);
3162 1.1 augustss break;
3163 1.1 augustss case UDESC_CONFIG:
3164 1.1 augustss if ((value & 0xff) != 0) {
3165 1.63 augustss err = USBD_IOERROR;
3166 1.1 augustss goto ret;
3167 1.1 augustss }
3168 1.1 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
3169 1.1 augustss memcpy(buf, &uhci_confd, l);
3170 1.1 augustss buf = (char *)buf + l;
3171 1.1 augustss len -= l;
3172 1.1 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
3173 1.1 augustss totlen += l;
3174 1.1 augustss memcpy(buf, &uhci_ifcd, l);
3175 1.1 augustss buf = (char *)buf + l;
3176 1.1 augustss len -= l;
3177 1.1 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
3178 1.1 augustss totlen += l;
3179 1.1 augustss memcpy(buf, &uhci_endpd, l);
3180 1.1 augustss break;
3181 1.1 augustss case UDESC_STRING:
3182 1.1 augustss if (len == 0)
3183 1.1 augustss break;
3184 1.1 augustss *(u_int8_t *)buf = 0;
3185 1.1 augustss totlen = 1;
3186 1.1 augustss switch (value & 0xff) {
3187 1.1 augustss case 1: /* Vendor */
3188 1.8 augustss totlen = uhci_str(buf, len, sc->sc_vendor);
3189 1.1 augustss break;
3190 1.1 augustss case 2: /* Product */
3191 1.8 augustss totlen = uhci_str(buf, len, "UHCI root hub");
3192 1.1 augustss break;
3193 1.1 augustss }
3194 1.1 augustss break;
3195 1.1 augustss default:
3196 1.63 augustss err = USBD_IOERROR;
3197 1.1 augustss goto ret;
3198 1.1 augustss }
3199 1.1 augustss break;
3200 1.1 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
3201 1.1 augustss if (len > 0) {
3202 1.1 augustss *(u_int8_t *)buf = 0;
3203 1.1 augustss totlen = 1;
3204 1.1 augustss }
3205 1.1 augustss break;
3206 1.1 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
3207 1.1 augustss if (len > 1) {
3208 1.1 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
3209 1.1 augustss totlen = 2;
3210 1.1 augustss }
3211 1.1 augustss break;
3212 1.1 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
3213 1.1 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
3214 1.1 augustss if (len > 1) {
3215 1.1 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
3216 1.1 augustss totlen = 2;
3217 1.1 augustss }
3218 1.1 augustss break;
3219 1.1 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
3220 1.1 augustss if (value >= USB_MAX_DEVICES) {
3221 1.63 augustss err = USBD_IOERROR;
3222 1.1 augustss goto ret;
3223 1.1 augustss }
3224 1.1 augustss sc->sc_addr = value;
3225 1.1 augustss break;
3226 1.1 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
3227 1.1 augustss if (value != 0 && value != 1) {
3228 1.63 augustss err = USBD_IOERROR;
3229 1.1 augustss goto ret;
3230 1.1 augustss }
3231 1.1 augustss sc->sc_conf = value;
3232 1.1 augustss break;
3233 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
3234 1.1 augustss break;
3235 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
3236 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
3237 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
3238 1.63 augustss err = USBD_IOERROR;
3239 1.1 augustss goto ret;
3240 1.1 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
3241 1.1 augustss break;
3242 1.1 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
3243 1.1 augustss break;
3244 1.1 augustss /* Hub requests */
3245 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
3246 1.1 augustss break;
3247 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
3248 1.12 augustss DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
3249 1.12 augustss "port=%d feature=%d\n",
3250 1.1 augustss index, value));
3251 1.1 augustss if (index == 1)
3252 1.1 augustss port = UHCI_PORTSC1;
3253 1.1 augustss else if (index == 2)
3254 1.1 augustss port = UHCI_PORTSC2;
3255 1.1 augustss else {
3256 1.63 augustss err = USBD_IOERROR;
3257 1.1 augustss goto ret;
3258 1.1 augustss }
3259 1.1 augustss switch(value) {
3260 1.1 augustss case UHF_PORT_ENABLE:
3261 1.137 augustss x = URWMASK(UREAD2(sc, port));
3262 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
3263 1.1 augustss break;
3264 1.1 augustss case UHF_PORT_SUSPEND:
3265 1.137 augustss x = URWMASK(UREAD2(sc, port));
3266 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
3267 1.1 augustss break;
3268 1.1 augustss case UHF_PORT_RESET:
3269 1.137 augustss x = URWMASK(UREAD2(sc, port));
3270 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
3271 1.1 augustss break;
3272 1.1 augustss case UHF_C_PORT_CONNECTION:
3273 1.137 augustss x = URWMASK(UREAD2(sc, port));
3274 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
3275 1.1 augustss break;
3276 1.1 augustss case UHF_C_PORT_ENABLE:
3277 1.137 augustss x = URWMASK(UREAD2(sc, port));
3278 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
3279 1.1 augustss break;
3280 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
3281 1.137 augustss x = URWMASK(UREAD2(sc, port));
3282 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
3283 1.1 augustss break;
3284 1.1 augustss case UHF_C_PORT_RESET:
3285 1.1 augustss sc->sc_isreset = 0;
3286 1.63 augustss err = USBD_NORMAL_COMPLETION;
3287 1.1 augustss goto ret;
3288 1.1 augustss case UHF_PORT_CONNECTION:
3289 1.1 augustss case UHF_PORT_OVER_CURRENT:
3290 1.1 augustss case UHF_PORT_POWER:
3291 1.1 augustss case UHF_PORT_LOW_SPEED:
3292 1.1 augustss case UHF_C_PORT_SUSPEND:
3293 1.1 augustss default:
3294 1.63 augustss err = USBD_IOERROR;
3295 1.1 augustss goto ret;
3296 1.1 augustss }
3297 1.1 augustss break;
3298 1.1 augustss case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
3299 1.1 augustss if (index == 1)
3300 1.1 augustss port = UHCI_PORTSC1;
3301 1.1 augustss else if (index == 2)
3302 1.1 augustss port = UHCI_PORTSC2;
3303 1.1 augustss else {
3304 1.63 augustss err = USBD_IOERROR;
3305 1.1 augustss goto ret;
3306 1.1 augustss }
3307 1.1 augustss if (len > 0) {
3308 1.152 augustss *(u_int8_t *)buf =
3309 1.1 augustss (UREAD2(sc, port) & UHCI_PORTSC_LS) >>
3310 1.1 augustss UHCI_PORTSC_LS_SHIFT;
3311 1.1 augustss totlen = 1;
3312 1.1 augustss }
3313 1.1 augustss break;
3314 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
3315 1.1 augustss if (value != 0) {
3316 1.63 augustss err = USBD_IOERROR;
3317 1.1 augustss goto ret;
3318 1.1 augustss }
3319 1.1 augustss l = min(len, USB_HUB_DESCRIPTOR_SIZE);
3320 1.1 augustss totlen = l;
3321 1.1 augustss memcpy(buf, &uhci_hubd_piix, l);
3322 1.1 augustss break;
3323 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
3324 1.1 augustss if (len != 4) {
3325 1.63 augustss err = USBD_IOERROR;
3326 1.1 augustss goto ret;
3327 1.1 augustss }
3328 1.1 augustss memset(buf, 0, len);
3329 1.1 augustss totlen = len;
3330 1.1 augustss break;
3331 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
3332 1.1 augustss if (index == 1)
3333 1.1 augustss port = UHCI_PORTSC1;
3334 1.1 augustss else if (index == 2)
3335 1.1 augustss port = UHCI_PORTSC2;
3336 1.1 augustss else {
3337 1.63 augustss err = USBD_IOERROR;
3338 1.1 augustss goto ret;
3339 1.1 augustss }
3340 1.1 augustss if (len != 4) {
3341 1.63 augustss err = USBD_IOERROR;
3342 1.1 augustss goto ret;
3343 1.1 augustss }
3344 1.1 augustss x = UREAD2(sc, port);
3345 1.1 augustss status = change = 0;
3346 1.142 augustss if (x & UHCI_PORTSC_CCS)
3347 1.1 augustss status |= UPS_CURRENT_CONNECT_STATUS;
3348 1.152 augustss if (x & UHCI_PORTSC_CSC)
3349 1.1 augustss change |= UPS_C_CONNECT_STATUS;
3350 1.152 augustss if (x & UHCI_PORTSC_PE)
3351 1.1 augustss status |= UPS_PORT_ENABLED;
3352 1.152 augustss if (x & UHCI_PORTSC_POEDC)
3353 1.1 augustss change |= UPS_C_PORT_ENABLED;
3354 1.152 augustss if (x & UHCI_PORTSC_OCI)
3355 1.1 augustss status |= UPS_OVERCURRENT_INDICATOR;
3356 1.152 augustss if (x & UHCI_PORTSC_OCIC)
3357 1.1 augustss change |= UPS_C_OVERCURRENT_INDICATOR;
3358 1.152 augustss if (x & UHCI_PORTSC_SUSP)
3359 1.1 augustss status |= UPS_SUSPEND;
3360 1.152 augustss if (x & UHCI_PORTSC_LSDA)
3361 1.1 augustss status |= UPS_LOW_SPEED;
3362 1.1 augustss status |= UPS_PORT_POWER;
3363 1.1 augustss if (sc->sc_isreset)
3364 1.1 augustss change |= UPS_C_PORT_RESET;
3365 1.1 augustss USETW(ps.wPortStatus, status);
3366 1.1 augustss USETW(ps.wPortChange, change);
3367 1.1 augustss l = min(len, sizeof ps);
3368 1.1 augustss memcpy(buf, &ps, l);
3369 1.1 augustss totlen = l;
3370 1.1 augustss break;
3371 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
3372 1.63 augustss err = USBD_IOERROR;
3373 1.1 augustss goto ret;
3374 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
3375 1.1 augustss break;
3376 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
3377 1.1 augustss if (index == 1)
3378 1.1 augustss port = UHCI_PORTSC1;
3379 1.1 augustss else if (index == 2)
3380 1.1 augustss port = UHCI_PORTSC2;
3381 1.1 augustss else {
3382 1.63 augustss err = USBD_IOERROR;
3383 1.1 augustss goto ret;
3384 1.1 augustss }
3385 1.1 augustss switch(value) {
3386 1.1 augustss case UHF_PORT_ENABLE:
3387 1.137 augustss x = URWMASK(UREAD2(sc, port));
3388 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_PE);
3389 1.1 augustss break;
3390 1.1 augustss case UHF_PORT_SUSPEND:
3391 1.137 augustss x = URWMASK(UREAD2(sc, port));
3392 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
3393 1.1 augustss break;
3394 1.1 augustss case UHF_PORT_RESET:
3395 1.166 dsainty err = uhci_portreset(sc, index);
3396 1.166 dsainty goto ret;
3397 1.111 augustss case UHF_PORT_POWER:
3398 1.111 augustss /* Pretend we turned on power */
3399 1.115 mycroft err = USBD_NORMAL_COMPLETION;
3400 1.111 augustss goto ret;
3401 1.1 augustss case UHF_C_PORT_CONNECTION:
3402 1.1 augustss case UHF_C_PORT_ENABLE:
3403 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
3404 1.1 augustss case UHF_PORT_CONNECTION:
3405 1.1 augustss case UHF_PORT_OVER_CURRENT:
3406 1.1 augustss case UHF_PORT_LOW_SPEED:
3407 1.1 augustss case UHF_C_PORT_SUSPEND:
3408 1.1 augustss case UHF_C_PORT_RESET:
3409 1.1 augustss default:
3410 1.63 augustss err = USBD_IOERROR;
3411 1.1 augustss goto ret;
3412 1.1 augustss }
3413 1.1 augustss break;
3414 1.1 augustss default:
3415 1.63 augustss err = USBD_IOERROR;
3416 1.1 augustss goto ret;
3417 1.1 augustss }
3418 1.63 augustss xfer->actlen = totlen;
3419 1.63 augustss err = USBD_NORMAL_COMPLETION;
3420 1.1 augustss ret:
3421 1.63 augustss xfer->status = err;
3422 1.52 augustss s = splusb();
3423 1.63 augustss usb_transfer_complete(xfer);
3424 1.52 augustss splx(s);
3425 1.1 augustss return (USBD_IN_PROGRESS);
3426 1.1 augustss }
3427 1.1 augustss
3428 1.1 augustss /* Abort a root control request. */
3429 1.1 augustss void
3430 1.119 augustss uhci_root_ctrl_abort(usbd_xfer_handle xfer)
3431 1.1 augustss {
3432 1.70 augustss /* Nothing to do, all transfers are synchronous. */
3433 1.1 augustss }
3434 1.1 augustss
3435 1.1 augustss /* Close the root pipe. */
3436 1.1 augustss void
3437 1.119 augustss uhci_root_ctrl_close(usbd_pipe_handle pipe)
3438 1.1 augustss {
3439 1.1 augustss DPRINTF(("uhci_root_ctrl_close\n"));
3440 1.1 augustss }
3441 1.1 augustss
3442 1.1 augustss /* Abort a root interrupt request. */
3443 1.1 augustss void
3444 1.119 augustss uhci_root_intr_abort(usbd_xfer_handle xfer)
3445 1.1 augustss {
3446 1.63 augustss uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
3447 1.30 augustss
3448 1.96 augustss usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, xfer);
3449 1.96 augustss sc->sc_intr_xfer = NULL;
3450 1.58 augustss
3451 1.63 augustss if (xfer->pipe->intrxfer == xfer) {
3452 1.58 augustss DPRINTF(("uhci_root_intr_abort: remove\n"));
3453 1.63 augustss xfer->pipe->intrxfer = 0;
3454 1.58 augustss }
3455 1.63 augustss xfer->status = USBD_CANCELLED;
3456 1.96 augustss #ifdef DIAGNOSTIC
3457 1.96 augustss UXFER(xfer)->iinfo.isdone = 1;
3458 1.96 augustss #endif
3459 1.63 augustss usb_transfer_complete(xfer);
3460 1.1 augustss }
3461 1.1 augustss
3462 1.16 augustss usbd_status
3463 1.119 augustss uhci_root_intr_transfer(usbd_xfer_handle xfer)
3464 1.16 augustss {
3465 1.63 augustss usbd_status err;
3466 1.16 augustss
3467 1.52 augustss /* Insert last in queue. */
3468 1.63 augustss err = usb_insert_transfer(xfer);
3469 1.63 augustss if (err)
3470 1.63 augustss return (err);
3471 1.52 augustss
3472 1.67 augustss /* Pipe isn't running (otherwise err would be USBD_INPROG),
3473 1.67 augustss * start first
3474 1.67 augustss */
3475 1.63 augustss return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3476 1.16 augustss }
3477 1.16 augustss
3478 1.1 augustss /* Start a transfer on the root interrupt pipe */
3479 1.1 augustss usbd_status
3480 1.119 augustss uhci_root_intr_start(usbd_xfer_handle xfer)
3481 1.1 augustss {
3482 1.63 augustss usbd_pipe_handle pipe = xfer->pipe;
3483 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
3484 1.174 drochner unsigned int ival;
3485 1.1 augustss
3486 1.173 gson DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n",
3487 1.63 augustss xfer, xfer->length, xfer->flags));
3488 1.82 augustss
3489 1.82 augustss if (sc->sc_dying)
3490 1.82 augustss return (USBD_IOERROR);
3491 1.1 augustss
3492 1.174 drochner /* XXX temporary variable needed to avoid gcc3 warning */
3493 1.174 drochner ival = xfer->pipe->endpoint->edesc->bInterval;
3494 1.174 drochner sc->sc_ival = mstohz(ival);
3495 1.96 augustss usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
3496 1.96 augustss sc->sc_intr_xfer = xfer;
3497 1.1 augustss return (USBD_IN_PROGRESS);
3498 1.1 augustss }
3499 1.1 augustss
3500 1.1 augustss /* Close the root interrupt pipe. */
3501 1.1 augustss void
3502 1.119 augustss uhci_root_intr_close(usbd_pipe_handle pipe)
3503 1.1 augustss {
3504 1.30 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
3505 1.30 augustss
3506 1.96 augustss usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, sc->sc_intr_xfer);
3507 1.96 augustss sc->sc_intr_xfer = NULL;
3508 1.1 augustss DPRINTF(("uhci_root_intr_close\n"));
3509 1.1 augustss }
3510