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uhci.c revision 1.205.2.1.2.1
      1  1.205.2.1.2.1     skrll /*	$NetBSD: uhci.c,v 1.205.2.1.2.1 2008/09/04 08:46:45 skrll Exp $	*/
      2           1.67  augustss /*	$FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $	*/
      3            1.1  augustss 
      4            1.1  augustss /*
      5          1.185   mycroft  * Copyright (c) 1998, 2004 The NetBSD Foundation, Inc.
      6            1.1  augustss  * All rights reserved.
      7            1.1  augustss  *
      8           1.11  augustss  * This code is derived from software contributed to The NetBSD Foundation
      9          1.113  augustss  * by Lennart Augustsson (lennart (at) augustsson.net) at
     10           1.11  augustss  * Carlstedt Research & Technology.
     11            1.1  augustss  *
     12            1.1  augustss  * Redistribution and use in source and binary forms, with or without
     13            1.1  augustss  * modification, are permitted provided that the following conditions
     14            1.1  augustss  * are met:
     15            1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     16            1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     17            1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     18            1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     19            1.1  augustss  *    documentation and/or other materials provided with the distribution.
     20            1.1  augustss  * 3. All advertising materials mentioning features or use of this software
     21            1.1  augustss  *    must display the following acknowledgement:
     22            1.1  augustss  *        This product includes software developed by the NetBSD
     23            1.1  augustss  *        Foundation, Inc. and its contributors.
     24            1.1  augustss  * 4. Neither the name of The NetBSD Foundation nor the names of its
     25            1.1  augustss  *    contributors may be used to endorse or promote products derived
     26            1.1  augustss  *    from this software without specific prior written permission.
     27            1.1  augustss  *
     28            1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     29            1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     30            1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     31            1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     32            1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     33            1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     34            1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     35            1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     36            1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     37            1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     38            1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     39            1.1  augustss  */
     40            1.1  augustss 
     41            1.1  augustss /*
     42            1.1  augustss  * USB Universal Host Controller driver.
     43           1.28  augustss  * Handles e.g. PIIX3 and PIIX4.
     44            1.1  augustss  *
     45          1.131  augustss  * UHCI spec: http://developer.intel.com/design/USB/UHCI11D.htm
     46          1.168    ichiro  * USB spec: http://www.usb.org/developers/docs/usbspec.zip
     47           1.71  augustss  * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
     48           1.71  augustss  *             ftp://download.intel.com/design/intarch/datashts/29056201.pdf
     49            1.1  augustss  */
     50          1.143     lukem 
     51          1.143     lukem #include <sys/cdefs.h>
     52  1.205.2.1.2.1     skrll __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.205.2.1.2.1 2008/09/04 08:46:45 skrll Exp $");
     53            1.1  augustss 
     54            1.1  augustss #include <sys/param.h>
     55            1.1  augustss #include <sys/systm.h>
     56            1.1  augustss #include <sys/kernel.h>
     57            1.1  augustss #include <sys/malloc.h>
     58           1.37  augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
     59            1.1  augustss #include <sys/device.h>
     60           1.67  augustss #include <sys/select.h>
     61          1.183      fvdl #include <sys/extent.h>
     62          1.183      fvdl #include <uvm/uvm_extern.h>
     63           1.13  augustss #elif defined(__FreeBSD__)
     64           1.13  augustss #include <sys/module.h>
     65           1.13  augustss #include <sys/bus.h>
     66           1.67  augustss #include <machine/bus_pio.h>
     67           1.67  augustss #if defined(DIAGNOSTIC) && defined(__i386__)
     68           1.67  augustss #include <machine/cpu.h>
     69           1.67  augustss #endif
     70           1.13  augustss #endif
     71            1.1  augustss #include <sys/proc.h>
     72            1.1  augustss #include <sys/queue.h>
     73            1.1  augustss 
     74            1.7  augustss #include <machine/bus.h>
     75           1.39  augustss #include <machine/endian.h>
     76            1.7  augustss 
     77            1.1  augustss #include <dev/usb/usb.h>
     78            1.1  augustss #include <dev/usb/usbdi.h>
     79            1.1  augustss #include <dev/usb/usbdivar.h>
     80            1.7  augustss #include <dev/usb/usb_mem.h>
     81            1.1  augustss #include <dev/usb/usb_quirks.h>
     82            1.1  augustss 
     83            1.1  augustss #include <dev/usb/uhcireg.h>
     84            1.1  augustss #include <dev/usb/uhcivar.h>
     85            1.1  augustss 
     86          1.125  augustss /* Use bandwidth reclamation for control transfers. Some devices choke on it. */
     87          1.125  augustss /*#define UHCI_CTL_LOOP */
     88          1.125  augustss 
     89           1.13  augustss #if defined(__FreeBSD__)
     90           1.13  augustss #include <machine/clock.h>
     91           1.13  augustss 
     92           1.13  augustss #define delay(d)		DELAY(d)
     93           1.13  augustss #endif
     94           1.13  augustss 
     95           1.37  augustss #if defined(__OpenBSD__)
     96           1.37  augustss struct cfdriver uhci_cd = {
     97           1.37  augustss 	NULL, "uhci", DV_DULL
     98           1.37  augustss };
     99           1.37  augustss #endif
    100           1.37  augustss 
    101           1.67  augustss #ifdef UHCI_DEBUG
    102           1.92  augustss uhci_softc_t *thesc;
    103           1.59  augustss #define DPRINTF(x)	if (uhcidebug) printf x
    104           1.59  augustss #define DPRINTFN(n,x)	if (uhcidebug>(n)) printf x
    105           1.67  augustss int uhcidebug = 0;
    106          1.125  augustss int uhcinoloop = 0;
    107          1.122        tv #ifndef __NetBSD__
    108          1.122        tv #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
    109          1.122        tv #endif
    110           1.59  augustss #else
    111           1.59  augustss #define DPRINTF(x)
    112           1.59  augustss #define DPRINTFN(n,x)
    113           1.59  augustss #endif
    114           1.59  augustss 
    115           1.39  augustss /*
    116           1.39  augustss  * The UHCI controller is little endian, so on big endian machines
    117          1.181  drochner  * the data stored in memory needs to be swapped.
    118           1.39  augustss  */
    119          1.107  augustss #if defined(__FreeBSD__) || defined(__OpenBSD__)
    120           1.39  augustss #if BYTE_ORDER == BIG_ENDIAN
    121           1.88   tsutsui #define htole32(x) (bswap32(x))
    122           1.88   tsutsui #define le32toh(x) (bswap32(x))
    123           1.39  augustss #else
    124           1.88   tsutsui #define htole32(x) (x)
    125           1.88   tsutsui #define le32toh(x) (x)
    126           1.88   tsutsui #endif
    127           1.39  augustss #endif
    128           1.39  augustss 
    129            1.1  augustss struct uhci_pipe {
    130            1.1  augustss 	struct usbd_pipe pipe;
    131           1.32  augustss 	int nexttoggle;
    132           1.92  augustss 
    133           1.92  augustss 	u_char aborting;
    134           1.92  augustss 	usbd_xfer_handle abortstart, abortend;
    135           1.92  augustss 
    136            1.1  augustss 	/* Info needed for different pipe kinds. */
    137            1.1  augustss 	union {
    138            1.1  augustss 		/* Control pipe */
    139            1.1  augustss 		struct {
    140            1.1  augustss 			uhci_soft_qh_t *sqh;
    141            1.7  augustss 			usb_dma_t reqdma;
    142           1.16  augustss 			uhci_soft_td_t *setup, *stat;
    143            1.1  augustss 			u_int length;
    144            1.1  augustss 		} ctl;
    145            1.1  augustss 		/* Interrupt pipe */
    146            1.1  augustss 		struct {
    147            1.1  augustss 			int npoll;
    148          1.187     skrll 			int isread;
    149            1.1  augustss 			uhci_soft_qh_t **qhs;
    150            1.1  augustss 		} intr;
    151            1.1  augustss 		/* Bulk pipe */
    152            1.1  augustss 		struct {
    153            1.1  augustss 			uhci_soft_qh_t *sqh;
    154            1.1  augustss 			u_int length;
    155            1.1  augustss 			int isread;
    156            1.1  augustss 		} bulk;
    157           1.16  augustss 		/* Iso pipe */
    158           1.16  augustss 		struct iso {
    159           1.16  augustss 			uhci_soft_td_t **stds;
    160           1.48  augustss 			int next, inuse;
    161           1.16  augustss 		} iso;
    162            1.1  augustss 	} u;
    163            1.1  augustss };
    164            1.1  augustss 
    165          1.142  augustss Static void		uhci_globalreset(uhci_softc_t *);
    166          1.166   dsainty Static usbd_status	uhci_portreset(uhci_softc_t*, int);
    167          1.142  augustss Static void		uhci_reset(uhci_softc_t *);
    168          1.119  augustss Static void		uhci_shutdown(void *v);
    169          1.119  augustss Static void		uhci_power(int, void *);
    170          1.119  augustss Static usbd_status	uhci_run(uhci_softc_t *, int run);
    171          1.123  augustss Static uhci_soft_td_t  *uhci_alloc_std(uhci_softc_t *);
    172          1.119  augustss Static void		uhci_free_std(uhci_softc_t *, uhci_soft_td_t *);
    173          1.123  augustss Static uhci_soft_qh_t  *uhci_alloc_sqh(uhci_softc_t *);
    174          1.119  augustss Static void		uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *);
    175           1.16  augustss #if 0
    176          1.119  augustss Static void		uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *,
    177          1.119  augustss 					 uhci_intr_info_t *);
    178          1.119  augustss Static void		uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *);
    179           1.16  augustss #endif
    180            1.1  augustss 
    181          1.152  augustss Static void		uhci_free_std_chain(uhci_softc_t *,
    182          1.119  augustss 					    uhci_soft_td_t *, uhci_soft_td_t *);
    183          1.119  augustss Static usbd_status	uhci_alloc_std_chain(struct uhci_pipe *,
    184          1.152  augustss 			    uhci_softc_t *, int, int, u_int16_t, usb_dma_t *,
    185          1.119  augustss 			    uhci_soft_td_t **, uhci_soft_td_t **);
    186          1.119  augustss Static void		uhci_poll_hub(void *);
    187          1.119  augustss Static void		uhci_waitintr(uhci_softc_t *, usbd_xfer_handle);
    188          1.119  augustss Static void		uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *);
    189          1.119  augustss Static void		uhci_idone(uhci_intr_info_t *);
    190          1.119  augustss 
    191          1.119  augustss Static void		uhci_abort_xfer(usbd_xfer_handle, usbd_status status);
    192          1.119  augustss 
    193          1.119  augustss Static void		uhci_timeout(void *);
    194          1.153  augustss Static void		uhci_timeout_task(void *);
    195          1.123  augustss Static void		uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
    196          1.123  augustss Static void		uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
    197          1.119  augustss Static void		uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *);
    198          1.123  augustss Static void		uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
    199          1.123  augustss Static void		uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
    200          1.119  augustss Static void		uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *);
    201          1.189  christos Static int		uhci_str(usb_string_descriptor_t *, int, const char *);
    202          1.123  augustss Static void		uhci_add_loop(uhci_softc_t *sc);
    203          1.123  augustss Static void		uhci_rem_loop(uhci_softc_t *sc);
    204          1.119  augustss 
    205          1.119  augustss Static usbd_status	uhci_setup_isoc(usbd_pipe_handle pipe);
    206          1.119  augustss Static void		uhci_device_isoc_enter(usbd_xfer_handle);
    207          1.119  augustss 
    208          1.119  augustss Static usbd_status	uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
    209          1.119  augustss Static void		uhci_freem(struct usbd_bus *, usb_dma_t *);
    210          1.119  augustss 
    211          1.119  augustss Static usbd_xfer_handle	uhci_allocx(struct usbd_bus *);
    212          1.119  augustss Static void		uhci_freex(struct usbd_bus *, usbd_xfer_handle);
    213          1.119  augustss 
    214          1.119  augustss Static usbd_status	uhci_device_ctrl_transfer(usbd_xfer_handle);
    215          1.119  augustss Static usbd_status	uhci_device_ctrl_start(usbd_xfer_handle);
    216          1.119  augustss Static void		uhci_device_ctrl_abort(usbd_xfer_handle);
    217          1.119  augustss Static void		uhci_device_ctrl_close(usbd_pipe_handle);
    218          1.119  augustss Static void		uhci_device_ctrl_done(usbd_xfer_handle);
    219          1.119  augustss 
    220          1.119  augustss Static usbd_status	uhci_device_intr_transfer(usbd_xfer_handle);
    221          1.119  augustss Static usbd_status	uhci_device_intr_start(usbd_xfer_handle);
    222          1.119  augustss Static void		uhci_device_intr_abort(usbd_xfer_handle);
    223          1.119  augustss Static void		uhci_device_intr_close(usbd_pipe_handle);
    224          1.119  augustss Static void		uhci_device_intr_done(usbd_xfer_handle);
    225          1.119  augustss 
    226          1.119  augustss Static usbd_status	uhci_device_bulk_transfer(usbd_xfer_handle);
    227          1.119  augustss Static usbd_status	uhci_device_bulk_start(usbd_xfer_handle);
    228          1.119  augustss Static void		uhci_device_bulk_abort(usbd_xfer_handle);
    229          1.119  augustss Static void		uhci_device_bulk_close(usbd_pipe_handle);
    230          1.119  augustss Static void		uhci_device_bulk_done(usbd_xfer_handle);
    231          1.119  augustss 
    232          1.119  augustss Static usbd_status	uhci_device_isoc_transfer(usbd_xfer_handle);
    233          1.119  augustss Static usbd_status	uhci_device_isoc_start(usbd_xfer_handle);
    234          1.119  augustss Static void		uhci_device_isoc_abort(usbd_xfer_handle);
    235          1.119  augustss Static void		uhci_device_isoc_close(usbd_pipe_handle);
    236          1.119  augustss Static void		uhci_device_isoc_done(usbd_xfer_handle);
    237          1.119  augustss 
    238          1.119  augustss Static usbd_status	uhci_root_ctrl_transfer(usbd_xfer_handle);
    239          1.119  augustss Static usbd_status	uhci_root_ctrl_start(usbd_xfer_handle);
    240          1.119  augustss Static void		uhci_root_ctrl_abort(usbd_xfer_handle);
    241          1.119  augustss Static void		uhci_root_ctrl_close(usbd_pipe_handle);
    242          1.119  augustss Static void		uhci_root_ctrl_done(usbd_xfer_handle);
    243          1.119  augustss 
    244          1.119  augustss Static usbd_status	uhci_root_intr_transfer(usbd_xfer_handle);
    245          1.119  augustss Static usbd_status	uhci_root_intr_start(usbd_xfer_handle);
    246          1.119  augustss Static void		uhci_root_intr_abort(usbd_xfer_handle);
    247          1.119  augustss Static void		uhci_root_intr_close(usbd_pipe_handle);
    248          1.119  augustss Static void		uhci_root_intr_done(usbd_xfer_handle);
    249          1.119  augustss 
    250          1.119  augustss Static usbd_status	uhci_open(usbd_pipe_handle);
    251          1.119  augustss Static void		uhci_poll(struct usbd_bus *);
    252          1.133  augustss Static void		uhci_softintr(void *);
    253          1.119  augustss 
    254          1.119  augustss Static usbd_status	uhci_device_request(usbd_xfer_handle xfer);
    255          1.119  augustss 
    256          1.119  augustss Static void		uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *);
    257          1.158  augustss Static void		uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *);
    258          1.152  augustss Static usbd_status	uhci_device_setintr(uhci_softc_t *sc,
    259          1.119  augustss 			    struct uhci_pipe *pipe, int ival);
    260          1.119  augustss 
    261          1.119  augustss Static void		uhci_device_clear_toggle(usbd_pipe_handle pipe);
    262          1.119  augustss Static void		uhci_noop(usbd_pipe_handle pipe);
    263          1.119  augustss 
    264          1.192     perry Static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *,
    265          1.119  augustss 						    uhci_soft_qh_t *);
    266          1.119  augustss 
    267          1.119  augustss #ifdef UHCI_DEBUG
    268          1.119  augustss Static void		uhci_dump_all(uhci_softc_t *);
    269          1.119  augustss Static void		uhci_dumpregs(uhci_softc_t *);
    270          1.119  augustss Static void		uhci_dump_qhs(uhci_soft_qh_t *);
    271          1.119  augustss Static void		uhci_dump_qh(uhci_soft_qh_t *);
    272          1.119  augustss Static void		uhci_dump_tds(uhci_soft_td_t *);
    273          1.119  augustss Static void		uhci_dump_td(uhci_soft_td_t *);
    274          1.119  augustss Static void		uhci_dump_ii(uhci_intr_info_t *ii);
    275          1.119  augustss void			uhci_dump(void);
    276            1.1  augustss #endif
    277            1.1  augustss 
    278          1.112  augustss #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
    279          1.112  augustss 			BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
    280          1.112  augustss #define UWRITE1(sc, r, x) \
    281          1.165   dsainty  do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \
    282          1.165   dsainty  } while (/*CONSTCOND*/0)
    283          1.112  augustss #define UWRITE2(sc, r, x) \
    284          1.165   dsainty  do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \
    285          1.165   dsainty  } while (/*CONSTCOND*/0)
    286          1.112  augustss #define UWRITE4(sc, r, x) \
    287          1.165   dsainty  do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \
    288          1.165   dsainty  } while (/*CONSTCOND*/0)
    289          1.196       mrg static __inline uint8_t
    290          1.196       mrg UREAD1(uhci_softc_t *sc, bus_size_t r)
    291          1.196       mrg {
    292          1.196       mrg 
    293          1.196       mrg 	UBARR(sc);
    294          1.196       mrg 	return bus_space_read_1(sc->iot, sc->ioh, r);
    295          1.196       mrg }
    296          1.196       mrg 
    297          1.196       mrg static __inline uint16_t
    298          1.196       mrg UREAD2(uhci_softc_t *sc, bus_size_t r)
    299          1.196       mrg {
    300          1.196       mrg 
    301          1.196       mrg 	UBARR(sc);
    302          1.196       mrg 	return bus_space_read_2(sc->iot, sc->ioh, r);
    303          1.196       mrg }
    304          1.196       mrg 
    305          1.196       mrg static __inline uint32_t
    306          1.196       mrg UREAD4(uhci_softc_t *sc, bus_size_t r)
    307          1.196       mrg {
    308          1.196       mrg 
    309          1.196       mrg 	UBARR(sc);
    310          1.196       mrg 	return bus_space_read_4(sc->iot, sc->ioh, r);
    311          1.196       mrg }
    312            1.1  augustss 
    313            1.1  augustss #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
    314            1.1  augustss #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
    315            1.1  augustss 
    316          1.142  augustss #define UHCI_RESET_TIMEOUT 100	/* ms, reset timeout */
    317            1.1  augustss 
    318            1.1  augustss #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
    319            1.1  augustss 
    320            1.1  augustss #define UHCI_INTR_ENDPT 1
    321            1.1  augustss 
    322           1.48  augustss struct usbd_bus_methods uhci_bus_methods = {
    323           1.48  augustss 	uhci_open,
    324           1.85  augustss 	uhci_softintr,
    325           1.48  augustss 	uhci_poll,
    326           1.48  augustss 	uhci_allocm,
    327           1.48  augustss 	uhci_freem,
    328           1.76  augustss 	uhci_allocx,
    329           1.76  augustss 	uhci_freex,
    330           1.48  augustss };
    331           1.48  augustss 
    332          1.152  augustss struct usbd_pipe_methods uhci_root_ctrl_methods = {
    333            1.1  augustss 	uhci_root_ctrl_transfer,
    334           1.16  augustss 	uhci_root_ctrl_start,
    335            1.1  augustss 	uhci_root_ctrl_abort,
    336            1.1  augustss 	uhci_root_ctrl_close,
    337           1.38  augustss 	uhci_noop,
    338           1.84  augustss 	uhci_root_ctrl_done,
    339            1.1  augustss };
    340            1.1  augustss 
    341          1.152  augustss struct usbd_pipe_methods uhci_root_intr_methods = {
    342            1.1  augustss 	uhci_root_intr_transfer,
    343           1.16  augustss 	uhci_root_intr_start,
    344            1.1  augustss 	uhci_root_intr_abort,
    345            1.1  augustss 	uhci_root_intr_close,
    346           1.38  augustss 	uhci_noop,
    347           1.41  augustss 	uhci_root_intr_done,
    348            1.1  augustss };
    349            1.1  augustss 
    350           1.48  augustss struct usbd_pipe_methods uhci_device_ctrl_methods = {
    351            1.1  augustss 	uhci_device_ctrl_transfer,
    352           1.16  augustss 	uhci_device_ctrl_start,
    353            1.1  augustss 	uhci_device_ctrl_abort,
    354            1.1  augustss 	uhci_device_ctrl_close,
    355           1.38  augustss 	uhci_noop,
    356           1.41  augustss 	uhci_device_ctrl_done,
    357            1.1  augustss };
    358            1.1  augustss 
    359           1.48  augustss struct usbd_pipe_methods uhci_device_intr_methods = {
    360            1.1  augustss 	uhci_device_intr_transfer,
    361           1.16  augustss 	uhci_device_intr_start,
    362            1.1  augustss 	uhci_device_intr_abort,
    363            1.1  augustss 	uhci_device_intr_close,
    364           1.38  augustss 	uhci_device_clear_toggle,
    365           1.41  augustss 	uhci_device_intr_done,
    366            1.1  augustss };
    367            1.1  augustss 
    368           1.48  augustss struct usbd_pipe_methods uhci_device_bulk_methods = {
    369            1.1  augustss 	uhci_device_bulk_transfer,
    370           1.16  augustss 	uhci_device_bulk_start,
    371            1.1  augustss 	uhci_device_bulk_abort,
    372            1.1  augustss 	uhci_device_bulk_close,
    373           1.38  augustss 	uhci_device_clear_toggle,
    374           1.41  augustss 	uhci_device_bulk_done,
    375            1.1  augustss };
    376            1.1  augustss 
    377           1.48  augustss struct usbd_pipe_methods uhci_device_isoc_methods = {
    378           1.16  augustss 	uhci_device_isoc_transfer,
    379           1.16  augustss 	uhci_device_isoc_start,
    380           1.16  augustss 	uhci_device_isoc_abort,
    381           1.16  augustss 	uhci_device_isoc_close,
    382           1.38  augustss 	uhci_noop,
    383           1.41  augustss 	uhci_device_isoc_done,
    384           1.16  augustss };
    385           1.16  augustss 
    386           1.92  augustss #define uhci_add_intr_info(sc, ii) \
    387          1.169  augustss 	LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list)
    388           1.92  augustss #define uhci_del_intr_info(ii) \
    389          1.169  augustss 	do { \
    390          1.169  augustss 		LIST_REMOVE((ii), list); \
    391          1.169  augustss 		(ii)->list.le_prev = NULL; \
    392          1.169  augustss 	} while (0)
    393          1.169  augustss #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL)
    394           1.92  augustss 
    395          1.192     perry Static inline uhci_soft_qh_t *
    396          1.119  augustss uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh)
    397           1.92  augustss {
    398           1.92  augustss 	DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh));
    399           1.92  augustss 
    400           1.92  augustss 	for (; pqh->hlink != sqh; pqh = pqh->hlink) {
    401          1.152  augustss #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG)
    402  1.205.2.1.2.1     skrll 		usb_syncmem(&pqh->dma,
    403  1.205.2.1.2.1     skrll 		    pqh->offs + offsetof(uhci_qh_t, qh_hlink),
    404  1.205.2.1.2.1     skrll 		    sizeof(pqh->qh.qh_hlink),
    405  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_POSTWRITE);
    406           1.92  augustss 		if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) {
    407          1.102  augustss 			printf("uhci_find_prev_qh: QH not found\n");
    408           1.92  augustss 			return (NULL);
    409           1.92  augustss 		}
    410           1.92  augustss #endif
    411           1.92  augustss 	}
    412           1.92  augustss 	return (pqh);
    413           1.92  augustss }
    414           1.92  augustss 
    415            1.1  augustss void
    416          1.142  augustss uhci_globalreset(uhci_softc_t *sc)
    417            1.1  augustss {
    418            1.1  augustss 	UHCICMD(sc, UHCI_CMD_GRESET);	/* global reset */
    419           1.20  augustss 	usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
    420            1.1  augustss 	UHCICMD(sc, 0);			/* do nothing */
    421            1.1  augustss }
    422            1.1  augustss 
    423            1.1  augustss usbd_status
    424          1.119  augustss uhci_init(uhci_softc_t *sc)
    425            1.1  augustss {
    426           1.63  augustss 	usbd_status err;
    427            1.1  augustss 	int i, j;
    428          1.123  augustss 	uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh;
    429            1.1  augustss 	uhci_soft_td_t *std;
    430            1.1  augustss 
    431            1.1  augustss 	DPRINTFN(1,("uhci_init: start\n"));
    432            1.1  augustss 
    433           1.67  augustss #ifdef UHCI_DEBUG
    434           1.92  augustss 	thesc = sc;
    435           1.92  augustss 
    436            1.1  augustss 	if (uhcidebug > 2)
    437            1.1  augustss 		uhci_dumpregs(sc);
    438            1.1  augustss #endif
    439            1.1  augustss 
    440            1.1  augustss 	UWRITE2(sc, UHCI_INTR, 0);		/* disable interrupts */
    441          1.142  augustss 	uhci_globalreset(sc);			/* reset the controller */
    442          1.142  augustss 	uhci_reset(sc);
    443           1.24  augustss 
    444          1.183      fvdl #ifdef __NetBSD__
    445          1.183      fvdl 	usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
    446          1.183      fvdl 	    USB_MEM_RESERVE);
    447          1.183      fvdl #endif
    448          1.183      fvdl 
    449            1.1  augustss 	/* Allocate and initialize real frame array. */
    450          1.152  augustss 	err = usb_allocmem(&sc->sc_bus,
    451           1.63  augustss 		  UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
    452           1.63  augustss 		  UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
    453           1.63  augustss 	if (err)
    454           1.63  augustss 		return (err);
    455          1.159  augustss 	sc->sc_pframes = KERNADDR(&sc->sc_dma, 0);
    456            1.1  augustss 	UWRITE2(sc, UHCI_FRNUM, 0);		/* set frame number to 0 */
    457          1.160  augustss 	UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/
    458            1.1  augustss 
    459          1.152  augustss 	/*
    460          1.123  augustss 	 * Allocate a TD, inactive, that hangs from the last QH.
    461          1.123  augustss 	 * This is to avoid a bug in the PIIX that makes it run berserk
    462          1.123  augustss 	 * otherwise.
    463          1.123  augustss 	 */
    464          1.123  augustss 	std = uhci_alloc_std(sc);
    465          1.123  augustss 	if (std == NULL)
    466          1.123  augustss 		return (USBD_NOMEM);
    467          1.123  augustss 	std->link.std = NULL;
    468          1.123  augustss 	std->td.td_link = htole32(UHCI_PTR_T);
    469          1.123  augustss 	std->td.td_status = htole32(0); /* inactive */
    470          1.123  augustss 	std->td.td_token = htole32(0);
    471          1.123  augustss 	std->td.td_buffer = htole32(0);
    472  1.205.2.1.2.1     skrll 	usb_syncmem(&std->dma, std->offs, sizeof(std->td),
    473  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    474          1.123  augustss 
    475          1.123  augustss 	/* Allocate the dummy QH marking the end and used for looping the QHs.*/
    476          1.123  augustss 	lsqh = uhci_alloc_sqh(sc);
    477          1.123  augustss 	if (lsqh == NULL)
    478          1.123  augustss 		return (USBD_NOMEM);
    479          1.123  augustss 	lsqh->hlink = NULL;
    480          1.123  augustss 	lsqh->qh.qh_hlink = htole32(UHCI_PTR_T);	/* end of QH chain */
    481          1.123  augustss 	lsqh->elink = std;
    482          1.123  augustss 	lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD);
    483          1.123  augustss 	sc->sc_last_qh = lsqh;
    484  1.205.2.1.2.1     skrll 	usb_syncmem(&lsqh->dma, lsqh->offs, sizeof(lsqh->qh),
    485  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    486          1.123  augustss 
    487            1.1  augustss 	/* Allocate the dummy QH where bulk traffic will be queued. */
    488            1.1  augustss 	bsqh = uhci_alloc_sqh(sc);
    489           1.63  augustss 	if (bsqh == NULL)
    490            1.1  augustss 		return (USBD_NOMEM);
    491          1.123  augustss 	bsqh->hlink = lsqh;
    492          1.123  augustss 	bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH);
    493          1.121  augustss 	bsqh->elink = NULL;
    494           1.88   tsutsui 	bsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    495            1.1  augustss 	sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
    496  1.205.2.1.2.1     skrll 	usb_syncmem(&bsqh->dma, bsqh->offs, sizeof(bsqh->qh),
    497  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    498            1.1  augustss 
    499          1.123  augustss 	/* Allocate dummy QH where high speed control traffic will be queued. */
    500          1.123  augustss 	chsqh = uhci_alloc_sqh(sc);
    501          1.123  augustss 	if (chsqh == NULL)
    502          1.123  augustss 		return (USBD_NOMEM);
    503          1.123  augustss 	chsqh->hlink = bsqh;
    504          1.123  augustss 	chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH);
    505          1.123  augustss 	chsqh->elink = NULL;
    506          1.123  augustss 	chsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    507          1.123  augustss 	sc->sc_hctl_start = sc->sc_hctl_end = chsqh;
    508  1.205.2.1.2.1     skrll 	usb_syncmem(&chsqh->dma, chsqh->offs, sizeof(chsqh->qh),
    509  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    510          1.123  augustss 
    511          1.123  augustss 	/* Allocate dummy QH where control traffic will be queued. */
    512          1.123  augustss 	clsqh = uhci_alloc_sqh(sc);
    513          1.123  augustss 	if (clsqh == NULL)
    514            1.1  augustss 		return (USBD_NOMEM);
    515          1.123  augustss 	clsqh->hlink = bsqh;
    516          1.123  augustss 	clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH);
    517          1.123  augustss 	clsqh->elink = NULL;
    518          1.123  augustss 	clsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    519          1.123  augustss 	sc->sc_lctl_start = sc->sc_lctl_end = clsqh;
    520  1.205.2.1.2.1     skrll 	usb_syncmem(&clsqh->dma, clsqh->offs, sizeof(clsqh->qh),
    521  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    522            1.1  augustss 
    523          1.152  augustss 	/*
    524            1.1  augustss 	 * Make all (virtual) frame list pointers point to the interrupt
    525            1.1  augustss 	 * queue heads and the interrupt queue heads at the control
    526            1.1  augustss 	 * queue head and point the physical frame list to the virtual.
    527            1.1  augustss 	 */
    528            1.1  augustss 	for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
    529            1.1  augustss 		std = uhci_alloc_std(sc);
    530            1.1  augustss 		sqh = uhci_alloc_sqh(sc);
    531           1.67  augustss 		if (std == NULL || sqh == NULL)
    532           1.13  augustss 			return (USBD_NOMEM);
    533           1.42  augustss 		std->link.sqh = sqh;
    534          1.121  augustss 		std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH);
    535           1.88   tsutsui 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
    536           1.88   tsutsui 		std->td.td_token = htole32(0);
    537           1.88   tsutsui 		std->td.td_buffer = htole32(0);
    538  1.205.2.1.2.1     skrll 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
    539  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    540          1.123  augustss 		sqh->hlink = clsqh;
    541          1.123  augustss 		sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH);
    542          1.121  augustss 		sqh->elink = NULL;
    543           1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
    544  1.205.2.1.2.1     skrll 		usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    545  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    546            1.1  augustss 		sc->sc_vframes[i].htd = std;
    547            1.1  augustss 		sc->sc_vframes[i].etd = std;
    548            1.1  augustss 		sc->sc_vframes[i].hqh = sqh;
    549            1.1  augustss 		sc->sc_vframes[i].eqh = sqh;
    550          1.152  augustss 		for (j = i;
    551          1.152  augustss 		     j < UHCI_FRAMELIST_COUNT;
    552            1.1  augustss 		     j += UHCI_VFRAMELIST_COUNT)
    553           1.88   tsutsui 			sc->sc_pframes[j] = htole32(std->physaddr);
    554            1.1  augustss 	}
    555  1.205.2.1.2.1     skrll 	usb_syncmem(&sc->sc_dma, 0,
    556  1.205.2.1.2.1     skrll 	    UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
    557  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_PREWRITE);
    558  1.205.2.1.2.1     skrll 
    559            1.1  augustss 
    560            1.1  augustss 	LIST_INIT(&sc->sc_intrhead);
    561            1.1  augustss 
    562           1.76  augustss 	SIMPLEQ_INIT(&sc->sc_free_xfers);
    563           1.76  augustss 
    564           1.96  augustss 	usb_callout_init(sc->sc_poll_handle);
    565           1.96  augustss 
    566            1.1  augustss 	/* Set up the bus struct. */
    567           1.48  augustss 	sc->sc_bus.methods = &uhci_bus_methods;
    568            1.1  augustss 	sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
    569            1.1  augustss 
    570           1.92  augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
    571           1.30  augustss 	sc->sc_suspend = PWR_RESUME;
    572          1.200  jmcneill 	sc->sc_powerhook = powerhook_establish(USBDEVNAME(sc->sc_bus.bdev),
    573          1.200  jmcneill 	    uhci_power, sc);
    574           1.72  augustss 	sc->sc_shutdownhook = shutdownhook_establish(uhci_shutdown, sc);
    575           1.92  augustss #endif
    576           1.72  augustss 
    577          1.190  augustss 	UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */
    578          1.190  augustss 
    579            1.1  augustss 	DPRINTFN(1,("uhci_init: enabling\n"));
    580          1.152  augustss 	UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
    581            1.1  augustss 		UHCI_INTR_IOCE | UHCI_INTR_SPIE);	/* enable interrupts */
    582            1.1  augustss 
    583           1.16  augustss 	return (uhci_run(sc, 1));		/* and here we go... */
    584           1.53  augustss }
    585           1.53  augustss 
    586           1.67  augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
    587           1.53  augustss int
    588          1.119  augustss uhci_activate(device_ptr_t self, enum devact act)
    589           1.53  augustss {
    590           1.56  augustss 	struct uhci_softc *sc = (struct uhci_softc *)self;
    591           1.53  augustss 	int rv = 0;
    592           1.53  augustss 
    593           1.53  augustss 	switch (act) {
    594           1.53  augustss 	case DVACT_ACTIVATE:
    595           1.53  augustss 		return (EOPNOTSUPP);
    596           1.53  augustss 
    597           1.53  augustss 	case DVACT_DEACTIVATE:
    598           1.56  augustss 		if (sc->sc_child != NULL)
    599           1.56  augustss 			rv = config_deactivate(sc->sc_child);
    600           1.53  augustss 		break;
    601           1.53  augustss 	}
    602           1.53  augustss 	return (rv);
    603           1.53  augustss }
    604           1.53  augustss 
    605           1.53  augustss int
    606          1.119  augustss uhci_detach(struct uhci_softc *sc, int flags)
    607           1.53  augustss {
    608           1.76  augustss 	usbd_xfer_handle xfer;
    609           1.53  augustss 	int rv = 0;
    610           1.53  augustss 
    611           1.53  augustss 	if (sc->sc_child != NULL)
    612           1.53  augustss 		rv = config_detach(sc->sc_child, flags);
    613          1.152  augustss 
    614           1.53  augustss 	if (rv != 0)
    615           1.53  augustss 		return (rv);
    616           1.53  augustss 
    617           1.92  augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
    618           1.53  augustss 	powerhook_disestablish(sc->sc_powerhook);
    619           1.72  augustss 	shutdownhook_disestablish(sc->sc_shutdownhook);
    620           1.92  augustss #endif
    621           1.72  augustss 
    622           1.76  augustss 	/* Free all xfers associated with this HC. */
    623           1.76  augustss 	for (;;) {
    624           1.76  augustss 		xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
    625           1.76  augustss 		if (xfer == NULL)
    626           1.76  augustss 			break;
    627          1.161     lukem 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
    628           1.76  augustss 		free(xfer, M_USB);
    629          1.152  augustss 	}
    630           1.76  augustss 
    631           1.76  augustss 	/* XXX free other data structures XXX */
    632           1.53  augustss 
    633           1.53  augustss 	return (rv);
    634            1.1  augustss }
    635           1.67  augustss #endif
    636            1.1  augustss 
    637           1.48  augustss usbd_status
    638          1.119  augustss uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
    639           1.48  augustss {
    640          1.102  augustss 	struct uhci_softc *sc = (struct uhci_softc *)bus;
    641          1.183      fvdl 	usbd_status status;
    642          1.102  augustss 	u_int32_t n;
    643          1.102  augustss 
    644          1.152  augustss 	/*
    645          1.102  augustss 	 * XXX
    646          1.102  augustss 	 * Since we are allocating a buffer we can assume that we will
    647          1.148  augustss 	 * need TDs for it.  Since we don't want to allocate those from
    648          1.102  augustss 	 * an interrupt context, we allocate them here and free them again.
    649          1.102  augustss 	 * This is no guarantee that we'll get the TDs next time...
    650          1.102  augustss 	 */
    651          1.102  augustss 	n = size / 8;
    652          1.102  augustss 	if (n > 16) {
    653          1.102  augustss 		u_int32_t i;
    654          1.102  augustss 		uhci_soft_td_t **stds;
    655          1.102  augustss 		DPRINTF(("uhci_allocm: get %d TDs\n", n));
    656          1.150   tsutsui 		stds = malloc(sizeof(uhci_soft_td_t *) * n, M_TEMP,
    657          1.151  augustss 		    M_WAITOK|M_ZERO);
    658          1.102  augustss 		for(i=0; i < n; i++)
    659          1.102  augustss 			stds[i] = uhci_alloc_std(sc);
    660          1.102  augustss 		for(i=0; i < n; i++)
    661          1.102  augustss 			if (stds[i] != NULL)
    662          1.102  augustss 				uhci_free_std(sc, stds[i]);
    663          1.102  augustss 		free(stds, M_TEMP);
    664          1.102  augustss 	}
    665          1.102  augustss 
    666          1.183      fvdl 
    667          1.183      fvdl 	status = usb_allocmem(&sc->sc_bus, size, 0, dma);
    668          1.183      fvdl #ifdef __NetBSD__
    669          1.183      fvdl 	if (status == USBD_NOMEM)
    670          1.183      fvdl 		status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
    671          1.183      fvdl #endif
    672          1.183      fvdl 	return status;
    673           1.48  augustss }
    674           1.48  augustss 
    675           1.48  augustss void
    676          1.119  augustss uhci_freem(struct usbd_bus *bus, usb_dma_t *dma)
    677           1.48  augustss {
    678          1.183      fvdl #ifdef __NetBSD__
    679          1.183      fvdl 	if (dma->block->flags & USB_DMA_RESERVE) {
    680          1.183      fvdl 		usb_reserve_freem(&((struct uhci_softc *)bus)->sc_dma_reserve,
    681          1.183      fvdl 		    dma);
    682          1.183      fvdl 		return;
    683          1.183      fvdl 	}
    684          1.183      fvdl #endif
    685           1.63  augustss 	usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma);
    686           1.76  augustss }
    687           1.76  augustss 
    688           1.76  augustss usbd_xfer_handle
    689          1.119  augustss uhci_allocx(struct usbd_bus *bus)
    690           1.76  augustss {
    691           1.76  augustss 	struct uhci_softc *sc = (struct uhci_softc *)bus;
    692           1.76  augustss 	usbd_xfer_handle xfer;
    693           1.76  augustss 
    694           1.76  augustss 	xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
    695           1.94  augustss 	if (xfer != NULL) {
    696          1.161     lukem 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
    697           1.98  augustss #ifdef DIAGNOSTIC
    698           1.94  augustss 		if (xfer->busy_free != XFER_FREE) {
    699          1.105  augustss 			printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer,
    700           1.94  augustss 			       xfer->busy_free);
    701           1.94  augustss 		}
    702           1.98  augustss #endif
    703           1.94  augustss 	} else {
    704           1.92  augustss 		xfer = malloc(sizeof(struct uhci_xfer), M_USB, M_NOWAIT);
    705           1.94  augustss 	}
    706           1.92  augustss 	if (xfer != NULL) {
    707           1.92  augustss 		memset(xfer, 0, sizeof (struct uhci_xfer));
    708           1.92  augustss 		UXFER(xfer)->iinfo.sc = sc;
    709           1.92  augustss #ifdef DIAGNOSTIC
    710           1.92  augustss 		UXFER(xfer)->iinfo.isdone = 1;
    711          1.135  augustss 		xfer->busy_free = XFER_BUSY;
    712           1.92  augustss #endif
    713           1.92  augustss 	}
    714           1.76  augustss 	return (xfer);
    715           1.76  augustss }
    716           1.76  augustss 
    717           1.76  augustss void
    718          1.119  augustss uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
    719           1.76  augustss {
    720           1.76  augustss 	struct uhci_softc *sc = (struct uhci_softc *)bus;
    721           1.76  augustss 
    722           1.93  augustss #ifdef DIAGNOSTIC
    723           1.94  augustss 	if (xfer->busy_free != XFER_BUSY) {
    724           1.94  augustss 		printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer,
    725           1.94  augustss 		       xfer->busy_free);
    726           1.93  augustss 	}
    727           1.94  augustss 	xfer->busy_free = XFER_FREE;
    728          1.105  augustss 	if (!UXFER(xfer)->iinfo.isdone) {
    729           1.96  augustss 		printf("uhci_freex: !isdone\n");
    730          1.105  augustss 	}
    731           1.93  augustss #endif
    732           1.76  augustss 	SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
    733           1.48  augustss }
    734           1.48  augustss 
    735           1.72  augustss /*
    736           1.72  augustss  * Shut down the controller when the system is going down.
    737           1.72  augustss  */
    738           1.72  augustss void
    739          1.119  augustss uhci_shutdown(void *v)
    740           1.72  augustss {
    741           1.72  augustss 	uhci_softc_t *sc = v;
    742          1.193  augustss 	int s;
    743           1.72  augustss 
    744           1.72  augustss 	DPRINTF(("uhci_shutdown: stopping the HC\n"));
    745          1.193  augustss 
    746          1.193  augustss 	/*
    747          1.193  augustss 	 * Use polling mode to prevent the interrupts shutting
    748          1.193  augustss 	 * us down before we shut them down.
    749          1.193  augustss 	 */
    750          1.193  augustss 	s = splhardusb();
    751          1.193  augustss 	sc->sc_bus.use_polling++;
    752           1.72  augustss 	uhci_run(sc, 0); /* stop the controller */
    753          1.193  augustss 	sc->sc_bus.use_polling--;
    754          1.193  augustss 	splx(s);
    755           1.72  augustss }
    756           1.72  augustss 
    757           1.30  augustss /*
    758           1.30  augustss  * Handle suspend/resume.
    759           1.30  augustss  *
    760           1.40  augustss  * We need to switch to polling mode here, because this routine is
    761          1.109  augustss  * called from an interrupt context.  This is all right since we
    762           1.40  augustss  * are almost suspended anyway.
    763           1.30  augustss  */
    764           1.30  augustss void
    765          1.119  augustss uhci_power(int why, void *v)
    766           1.30  augustss {
    767           1.30  augustss 	uhci_softc_t *sc = v;
    768           1.30  augustss 	int cmd;
    769           1.30  augustss 	int s;
    770           1.30  augustss 
    771          1.132  augustss 	s = splhardusb();
    772           1.30  augustss 	cmd = UREAD2(sc, UHCI_CMD);
    773           1.30  augustss 
    774          1.152  augustss 	DPRINTF(("uhci_power: sc=%p, why=%d (was %d), cmd=0x%x\n",
    775           1.30  augustss 		 sc, why, sc->sc_suspend, cmd));
    776           1.30  augustss 
    777          1.128  takemura 	switch (why) {
    778          1.128  takemura 	case PWR_SUSPEND:
    779          1.128  takemura 	case PWR_STANDBY:
    780           1.67  augustss #ifdef UHCI_DEBUG
    781           1.30  augustss 		if (uhcidebug > 2)
    782           1.30  augustss 			uhci_dumpregs(sc);
    783           1.30  augustss #endif
    784           1.96  augustss 		if (sc->sc_intr_xfer != NULL)
    785           1.96  augustss 			usb_uncallout(sc->sc_poll_handle, uhci_poll_hub,
    786           1.96  augustss 			    sc->sc_intr_xfer);
    787           1.54  augustss 		sc->sc_bus.use_polling++;
    788           1.30  augustss 		uhci_run(sc, 0); /* stop the controller */
    789           1.86  augustss 
    790           1.86  augustss 		/* save some state if BIOS doesn't */
    791           1.86  augustss 		sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM);
    792           1.86  augustss 		sc->sc_saved_sof = UREAD1(sc, UHCI_SOF);
    793           1.88   tsutsui 
    794          1.134  augustss 		UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */
    795          1.134  augustss 
    796           1.30  augustss 		UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */
    797           1.40  augustss 		usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
    798           1.30  augustss 		sc->sc_suspend = why;
    799           1.61  augustss 		sc->sc_bus.use_polling--;
    800           1.30  augustss 		DPRINTF(("uhci_power: cmd=0x%x\n", UREAD2(sc, UHCI_CMD)));
    801          1.128  takemura 		break;
    802          1.128  takemura 	case PWR_RESUME:
    803           1.60  augustss #ifdef DIAGNOSTIC
    804           1.61  augustss 		if (sc->sc_suspend == PWR_RESUME)
    805           1.61  augustss 			printf("uhci_power: weird, resume without suspend.\n");
    806           1.60  augustss #endif
    807           1.61  augustss 		sc->sc_bus.use_polling++;
    808           1.30  augustss 		sc->sc_suspend = why;
    809           1.30  augustss 		if (cmd & UHCI_CMD_RS)
    810           1.30  augustss 			uhci_run(sc, 0); /* in case BIOS has started it */
    811           1.86  augustss 
    812           1.86  augustss 		/* restore saved state */
    813          1.160  augustss 		UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0));
    814           1.86  augustss 		UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum);
    815           1.86  augustss 		UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof);
    816           1.86  augustss 
    817           1.30  augustss 		UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */
    818           1.40  augustss 		usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
    819           1.30  augustss 		UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
    820          1.167  augustss 		UHCICMD(sc, UHCI_CMD_MAXP);
    821          1.152  augustss 		UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
    822           1.30  augustss 			UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */
    823           1.30  augustss 		uhci_run(sc, 1); /* and start traffic again */
    824           1.40  augustss 		usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
    825           1.54  augustss 		sc->sc_bus.use_polling--;
    826           1.96  augustss 		if (sc->sc_intr_xfer != NULL)
    827           1.96  augustss 			usb_callout(sc->sc_poll_handle, sc->sc_ival,
    828           1.96  augustss 				    uhci_poll_hub, sc->sc_intr_xfer);
    829           1.67  augustss #ifdef UHCI_DEBUG
    830           1.30  augustss 		if (uhcidebug > 2)
    831           1.30  augustss 			uhci_dumpregs(sc);
    832           1.30  augustss #endif
    833          1.128  takemura 		break;
    834          1.128  takemura 	case PWR_SOFTSUSPEND:
    835          1.128  takemura 	case PWR_SOFTSTANDBY:
    836          1.128  takemura 	case PWR_SOFTRESUME:
    837          1.128  takemura 		break;
    838           1.30  augustss 	}
    839           1.30  augustss 	splx(s);
    840           1.30  augustss }
    841           1.30  augustss 
    842           1.59  augustss #ifdef UHCI_DEBUG
    843          1.101  augustss Static void
    844          1.119  augustss uhci_dumpregs(uhci_softc_t *sc)
    845            1.1  augustss {
    846           1.48  augustss 	DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
    847           1.48  augustss 		     "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
    848           1.48  augustss 		     USBDEVNAME(sc->sc_bus.bdev),
    849           1.48  augustss 		     UREAD2(sc, UHCI_CMD),
    850           1.48  augustss 		     UREAD2(sc, UHCI_STS),
    851           1.48  augustss 		     UREAD2(sc, UHCI_INTR),
    852           1.48  augustss 		     UREAD2(sc, UHCI_FRNUM),
    853           1.48  augustss 		     UREAD4(sc, UHCI_FLBASEADDR),
    854           1.48  augustss 		     UREAD1(sc, UHCI_SOF),
    855           1.48  augustss 		     UREAD2(sc, UHCI_PORTSC1),
    856           1.48  augustss 		     UREAD2(sc, UHCI_PORTSC2)));
    857            1.1  augustss }
    858            1.1  augustss 
    859            1.1  augustss void
    860          1.119  augustss uhci_dump_td(uhci_soft_td_t *p)
    861            1.1  augustss {
    862          1.122        tv 	char sbuf[128], sbuf2[128];
    863          1.122        tv 
    864  1.205.2.1.2.1     skrll 
    865  1.205.2.1.2.1     skrll 	usb_syncmem(&p->dma, p->offs, sizeof(p->td),
    866  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    867           1.48  augustss 	DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
    868           1.48  augustss 		     "token=0x%08lx buffer=0x%08lx\n",
    869           1.48  augustss 		     p, (long)p->physaddr,
    870           1.88   tsutsui 		     (long)le32toh(p->td.td_link),
    871           1.88   tsutsui 		     (long)le32toh(p->td.td_status),
    872           1.88   tsutsui 		     (long)le32toh(p->td.td_token),
    873           1.88   tsutsui 		     (long)le32toh(p->td.td_buffer)));
    874          1.122        tv 
    875          1.147  augustss 	bitmask_snprintf((u_int32_t)le32toh(p->td.td_link), "\20\1T\2Q\3VF",
    876          1.122        tv 			 sbuf, sizeof(sbuf));
    877          1.147  augustss 	bitmask_snprintf((u_int32_t)le32toh(p->td.td_status),
    878          1.122        tv 			 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
    879          1.122        tv 			 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
    880          1.122        tv 			 sbuf2, sizeof(sbuf2));
    881          1.122        tv 
    882          1.122        tv 	DPRINTFN(-1,("  %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
    883          1.122        tv 		     "D=%d,maxlen=%d\n", sbuf, sbuf2,
    884           1.88   tsutsui 		     UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)),
    885           1.88   tsutsui 		     UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)),
    886           1.88   tsutsui 		     UHCI_TD_GET_PID(le32toh(p->td.td_token)),
    887           1.88   tsutsui 		     UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)),
    888           1.88   tsutsui 		     UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)),
    889           1.88   tsutsui 		     UHCI_TD_GET_DT(le32toh(p->td.td_token)),
    890           1.88   tsutsui 		     UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token))));
    891  1.205.2.1.2.1     skrll 	usb_syncmem(&p->dma, p->offs, sizeof(p->td),
    892  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_PREREAD);
    893            1.1  augustss }
    894            1.1  augustss 
    895            1.1  augustss void
    896          1.119  augustss uhci_dump_qh(uhci_soft_qh_t *sqh)
    897            1.1  augustss {
    898  1.205.2.1.2.1     skrll 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    899  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    900           1.67  augustss 	DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh,
    901           1.88   tsutsui 	    (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink),
    902           1.88   tsutsui 	    le32toh(sqh->qh.qh_elink)));
    903  1.205.2.1.2.1     skrll 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD);
    904            1.1  augustss }
    905            1.1  augustss 
    906           1.13  augustss 
    907          1.110  augustss #if 1
    908            1.1  augustss void
    909          1.119  augustss uhci_dump(void)
    910            1.1  augustss {
    911          1.110  augustss 	uhci_dump_all(thesc);
    912          1.110  augustss }
    913          1.110  augustss #endif
    914            1.1  augustss 
    915          1.110  augustss void
    916          1.119  augustss uhci_dump_all(uhci_softc_t *sc)
    917          1.110  augustss {
    918            1.1  augustss 	uhci_dumpregs(sc);
    919           1.50  augustss 	printf("intrs=%d\n", sc->sc_bus.no_intrs);
    920          1.110  augustss 	/*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/
    921          1.123  augustss 	uhci_dump_qh(sc->sc_lctl_start);
    922            1.1  augustss }
    923            1.1  augustss 
    924           1.67  augustss 
    925           1.67  augustss void
    926          1.119  augustss uhci_dump_qhs(uhci_soft_qh_t *sqh)
    927           1.67  augustss {
    928           1.67  augustss 	uhci_dump_qh(sqh);
    929           1.67  augustss 
    930           1.67  augustss 	/* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards
    931           1.67  augustss 	 * Traverses sideways first, then down.
    932           1.67  augustss 	 *
    933           1.67  augustss 	 * QH1
    934           1.67  augustss 	 * QH2
    935           1.67  augustss 	 * No QH
    936           1.67  augustss 	 * TD2.1
    937           1.67  augustss 	 * TD2.2
    938           1.67  augustss 	 * TD1.1
    939           1.67  augustss 	 * etc.
    940           1.67  augustss 	 *
    941           1.67  augustss 	 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
    942           1.67  augustss 	 */
    943           1.67  augustss 
    944           1.67  augustss 
    945  1.205.2.1.2.1     skrll 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    946  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    947           1.88   tsutsui 	if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T))
    948           1.67  augustss 		uhci_dump_qhs(sqh->hlink);
    949           1.67  augustss 	else
    950           1.67  augustss 		DPRINTF(("No QH\n"));
    951  1.205.2.1.2.1     skrll 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD);
    952           1.67  augustss 
    953           1.88   tsutsui 	if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T))
    954           1.67  augustss 		uhci_dump_tds(sqh->elink);
    955           1.67  augustss 	else
    956           1.67  augustss 		DPRINTF(("No TD\n"));
    957           1.67  augustss }
    958           1.67  augustss 
    959            1.1  augustss void
    960          1.119  augustss uhci_dump_tds(uhci_soft_td_t *std)
    961            1.1  augustss {
    962           1.67  augustss 	uhci_soft_td_t *td;
    963  1.205.2.1.2.1     skrll 	int stop;
    964           1.67  augustss 
    965           1.67  augustss 	for(td = std; td != NULL; td = td->link.std) {
    966           1.67  augustss 		uhci_dump_td(td);
    967            1.1  augustss 
    968           1.67  augustss 		/* Check whether the link pointer in this TD marks
    969           1.67  augustss 		 * the link pointer as end of queue. This avoids
    970           1.67  augustss 		 * printing the free list in case the queue/TD has
    971           1.67  augustss 		 * already been moved there (seatbelt).
    972           1.67  augustss 		 */
    973  1.205.2.1.2.1     skrll 		usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link),
    974  1.205.2.1.2.1     skrll 		    sizeof(td->td.td_link),
    975  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    976  1.205.2.1.2.1     skrll 		stop = (le32toh(td->td.td_link) & UHCI_PTR_T ||
    977  1.205.2.1.2.1     skrll 			le32toh(td->td.td_link) == 0);
    978  1.205.2.1.2.1     skrll 		usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link),
    979  1.205.2.1.2.1     skrll 		    sizeof(td->td.td_link), BUS_DMASYNC_PREREAD);
    980  1.205.2.1.2.1     skrll 		if (stop)
    981           1.67  augustss 			break;
    982           1.67  augustss 	}
    983            1.1  augustss }
    984           1.92  augustss 
    985          1.101  augustss Static void
    986          1.119  augustss uhci_dump_ii(uhci_intr_info_t *ii)
    987           1.92  augustss {
    988           1.95  augustss 	usbd_pipe_handle pipe;
    989           1.95  augustss 	usb_endpoint_descriptor_t *ed;
    990           1.95  augustss 	usbd_device_handle dev;
    991          1.152  augustss 
    992           1.98  augustss #ifdef DIAGNOSTIC
    993           1.98  augustss #define DONE ii->isdone
    994           1.98  augustss #else
    995           1.98  augustss #define DONE 0
    996           1.98  augustss #endif
    997           1.95  augustss         if (ii == NULL) {
    998           1.95  augustss                 printf("ii NULL\n");
    999           1.95  augustss                 return;
   1000           1.95  augustss         }
   1001           1.95  augustss         if (ii->xfer == NULL) {
   1002           1.95  augustss 		printf("ii %p: done=%d xfer=NULL\n",
   1003           1.98  augustss 		       ii, DONE);
   1004           1.95  augustss                 return;
   1005           1.95  augustss         }
   1006           1.95  augustss         pipe = ii->xfer->pipe;
   1007           1.95  augustss         if (pipe == NULL) {
   1008           1.95  augustss 		printf("ii %p: done=%d xfer=%p pipe=NULL\n",
   1009           1.98  augustss 		       ii, DONE, ii->xfer);
   1010          1.139  augustss                 return;
   1011          1.139  augustss 	}
   1012          1.139  augustss         if (pipe->endpoint == NULL) {
   1013          1.139  augustss 		printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n",
   1014          1.139  augustss 		       ii, DONE, ii->xfer, pipe);
   1015          1.139  augustss                 return;
   1016          1.139  augustss 	}
   1017          1.139  augustss         if (pipe->device == NULL) {
   1018          1.139  augustss 		printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n",
   1019          1.139  augustss 		       ii, DONE, ii->xfer, pipe);
   1020           1.95  augustss                 return;
   1021           1.95  augustss 	}
   1022           1.95  augustss         ed = pipe->endpoint->edesc;
   1023           1.95  augustss         dev = pipe->device;
   1024          1.152  augustss 	printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n",
   1025          1.152  augustss 	       ii, DONE, ii->xfer, dev,
   1026           1.95  augustss 	       UGETW(dev->ddesc.idVendor),
   1027           1.92  augustss 	       UGETW(dev->ddesc.idProduct),
   1028           1.92  augustss 	       dev->address, pipe,
   1029           1.92  augustss 	       ed->bEndpointAddress, ed->bmAttributes);
   1030           1.98  augustss #undef DONE
   1031           1.92  augustss }
   1032           1.92  augustss 
   1033          1.120  augustss void uhci_dump_iis(struct uhci_softc *sc);
   1034           1.92  augustss void
   1035          1.119  augustss uhci_dump_iis(struct uhci_softc *sc)
   1036           1.92  augustss {
   1037           1.92  augustss 	uhci_intr_info_t *ii;
   1038           1.92  augustss 
   1039           1.92  augustss 	printf("intr_info list:\n");
   1040           1.92  augustss 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
   1041           1.92  augustss 		uhci_dump_ii(ii);
   1042           1.92  augustss }
   1043           1.92  augustss 
   1044          1.120  augustss void iidump(void);
   1045          1.119  augustss void iidump(void) { uhci_dump_iis(thesc); }
   1046           1.92  augustss 
   1047            1.1  augustss #endif
   1048            1.1  augustss 
   1049            1.1  augustss /*
   1050            1.1  augustss  * This routine is executed periodically and simulates interrupts
   1051            1.1  augustss  * from the root controller interrupt pipe for port status change.
   1052            1.1  augustss  */
   1053            1.1  augustss void
   1054          1.119  augustss uhci_poll_hub(void *addr)
   1055            1.1  augustss {
   1056           1.63  augustss 	usbd_xfer_handle xfer = addr;
   1057           1.63  augustss 	usbd_pipe_handle pipe = xfer->pipe;
   1058            1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
   1059            1.1  augustss 	int s;
   1060            1.1  augustss 	u_char *p;
   1061            1.1  augustss 
   1062           1.96  augustss 	DPRINTFN(20, ("uhci_poll_hub\n"));
   1063            1.1  augustss 
   1064           1.96  augustss 	usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
   1065           1.41  augustss 
   1066          1.159  augustss 	p = KERNADDR(&xfer->dmabuf, 0);
   1067            1.1  augustss 	p[0] = 0;
   1068            1.1  augustss 	if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
   1069            1.1  augustss 		p[0] |= 1<<1;
   1070            1.1  augustss 	if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
   1071            1.1  augustss 		p[0] |= 1<<2;
   1072           1.41  augustss 	if (p[0] == 0)
   1073           1.41  augustss 		/* No change, try again in a while */
   1074           1.41  augustss 		return;
   1075           1.41  augustss 
   1076           1.63  augustss 	xfer->actlen = 1;
   1077           1.63  augustss 	xfer->status = USBD_NORMAL_COMPLETION;
   1078           1.16  augustss 	s = splusb();
   1079           1.63  augustss 	xfer->device->bus->intr_context++;
   1080           1.63  augustss 	usb_transfer_complete(xfer);
   1081           1.63  augustss 	xfer->device->bus->intr_context--;
   1082           1.41  augustss 	splx(s);
   1083           1.41  augustss }
   1084           1.41  augustss 
   1085           1.41  augustss void
   1086          1.205  christos uhci_root_intr_done(usbd_xfer_handle xfer)
   1087           1.84  augustss {
   1088           1.84  augustss }
   1089           1.84  augustss 
   1090           1.84  augustss void
   1091          1.205  christos uhci_root_ctrl_done(usbd_xfer_handle xfer)
   1092           1.41  augustss {
   1093            1.1  augustss }
   1094            1.1  augustss 
   1095          1.123  augustss /*
   1096          1.123  augustss  * Let the last QH loop back to the high speed control transfer QH.
   1097          1.123  augustss  * This is what intel calls "bandwidth reclamation" and improves
   1098          1.123  augustss  * USB performance a lot for some devices.
   1099          1.123  augustss  * If we are already looping, just count it.
   1100          1.123  augustss  */
   1101            1.1  augustss void
   1102          1.123  augustss uhci_add_loop(uhci_softc_t *sc) {
   1103          1.125  augustss #ifdef UHCI_DEBUG
   1104          1.125  augustss 	if (uhcinoloop)
   1105          1.125  augustss 		return;
   1106          1.125  augustss #endif
   1107          1.123  augustss 	if (++sc->sc_loops == 1) {
   1108          1.125  augustss 		DPRINTFN(5,("uhci_start_loop: add\n"));
   1109          1.123  augustss 		/* Note, we don't loop back the soft pointer. */
   1110          1.152  augustss 		sc->sc_last_qh->qh.qh_hlink =
   1111          1.123  augustss 		    htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH);
   1112  1.205.2.1.2.1     skrll 		usb_syncmem(&sc->sc_last_qh->dma,
   1113  1.205.2.1.2.1     skrll 		    sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink),
   1114  1.205.2.1.2.1     skrll 		    sizeof(sc->sc_last_qh->qh.qh_hlink),
   1115  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_PREWRITE);
   1116          1.123  augustss 	}
   1117          1.123  augustss }
   1118          1.123  augustss 
   1119          1.123  augustss void
   1120          1.123  augustss uhci_rem_loop(uhci_softc_t *sc) {
   1121          1.125  augustss #ifdef UHCI_DEBUG
   1122          1.125  augustss 	if (uhcinoloop)
   1123          1.125  augustss 		return;
   1124          1.125  augustss #endif
   1125          1.123  augustss 	if (--sc->sc_loops == 0) {
   1126          1.123  augustss 		DPRINTFN(5,("uhci_end_loop: remove\n"));
   1127          1.123  augustss 		sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T);
   1128  1.205.2.1.2.1     skrll 		usb_syncmem(&sc->sc_last_qh->dma,
   1129  1.205.2.1.2.1     skrll 		    sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink),
   1130  1.205.2.1.2.1     skrll 		    sizeof(sc->sc_last_qh->qh.qh_hlink),
   1131  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_PREWRITE);
   1132          1.123  augustss 	}
   1133          1.123  augustss }
   1134          1.123  augustss 
   1135          1.123  augustss /* Add high speed control QH, called at splusb(). */
   1136          1.123  augustss void
   1137          1.123  augustss uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1138            1.1  augustss {
   1139           1.42  augustss 	uhci_soft_qh_t *eqh;
   1140            1.1  augustss 
   1141           1.52  augustss 	SPLUSBCHECK;
   1142           1.52  augustss 
   1143            1.1  augustss 	DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
   1144          1.123  augustss 	eqh = sc->sc_hctl_end;
   1145  1.205.2.1.2.1     skrll 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1146  1.205.2.1.2.1     skrll 	    sizeof(eqh->qh.qh_hlink),
   1147  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_POSTWRITE);
   1148           1.42  augustss 	sqh->hlink       = eqh->hlink;
   1149           1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1150  1.205.2.1.2.1     skrll 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1151  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_PREWRITE);
   1152           1.42  augustss 	eqh->hlink       = sqh;
   1153          1.121  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1154          1.123  augustss 	sc->sc_hctl_end = sqh;
   1155  1.205.2.1.2.1     skrll 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1156  1.205.2.1.2.1     skrll 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1157          1.125  augustss #ifdef UHCI_CTL_LOOP
   1158          1.123  augustss 	uhci_add_loop(sc);
   1159          1.125  augustss #endif
   1160            1.1  augustss }
   1161            1.1  augustss 
   1162          1.123  augustss /* Remove high speed control QH, called at splusb(). */
   1163            1.1  augustss void
   1164          1.123  augustss uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1165            1.1  augustss {
   1166            1.1  augustss 	uhci_soft_qh_t *pqh;
   1167            1.1  augustss 
   1168           1.52  augustss 	SPLUSBCHECK;
   1169           1.52  augustss 
   1170          1.123  augustss 	DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh));
   1171          1.125  augustss #ifdef UHCI_CTL_LOOP
   1172          1.123  augustss 	uhci_rem_loop(sc);
   1173          1.125  augustss #endif
   1174          1.124  augustss 	/*
   1175          1.124  augustss 	 * The T bit should be set in the elink of the QH so that the HC
   1176          1.124  augustss 	 * doesn't follow the pointer.  This condition may fail if the
   1177          1.124  augustss 	 * the transferred packet was short so that the QH still points
   1178          1.124  augustss 	 * at the last used TD.
   1179          1.124  augustss 	 * In this case we set the T bit and wait a little for the HC
   1180          1.124  augustss 	 * to stop looking at the TD.
   1181  1.205.2.1.2.1     skrll 	 * Note that if the TD chain is large enough, the controller
   1182  1.205.2.1.2.1     skrll 	 * may still be looking at the chain at the end of this function.
   1183  1.205.2.1.2.1     skrll 	 * uhci_free_std_chain() will make sure the controller stops
   1184  1.205.2.1.2.1     skrll 	 * looking at it quickly, but until then we should not change
   1185  1.205.2.1.2.1     skrll 	 * sqh->hlink.
   1186          1.124  augustss 	 */
   1187  1.205.2.1.2.1     skrll 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1188  1.205.2.1.2.1     skrll 	    sizeof(sqh->qh.qh_elink),
   1189  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1190          1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1191          1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1192  1.205.2.1.2.1     skrll 		usb_syncmem(&sqh->dma,
   1193  1.205.2.1.2.1     skrll 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1194  1.205.2.1.2.1     skrll 		    sizeof(sqh->qh.qh_elink),
   1195  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1196          1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1197          1.124  augustss 	}
   1198          1.124  augustss 
   1199          1.123  augustss 	pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh);
   1200  1.205.2.1.2.1     skrll 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1201  1.205.2.1.2.1     skrll 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1202          1.152  augustss 	pqh->hlink = sqh->hlink;
   1203           1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1204  1.205.2.1.2.1     skrll 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1205  1.205.2.1.2.1     skrll 	    sizeof(pqh->qh.qh_hlink),
   1206  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_PREWRITE);
   1207          1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1208          1.123  augustss 	if (sc->sc_hctl_end == sqh)
   1209          1.123  augustss 		sc->sc_hctl_end = pqh;
   1210          1.123  augustss }
   1211          1.123  augustss 
   1212          1.123  augustss /* Add low speed control QH, called at splusb(). */
   1213          1.123  augustss void
   1214          1.123  augustss uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1215          1.123  augustss {
   1216          1.123  augustss 	uhci_soft_qh_t *eqh;
   1217          1.123  augustss 
   1218          1.123  augustss 	SPLUSBCHECK;
   1219          1.123  augustss 
   1220          1.123  augustss 	DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh));
   1221          1.123  augustss 	eqh = sc->sc_lctl_end;
   1222  1.205.2.1.2.1     skrll 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1223  1.205.2.1.2.1     skrll 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1224          1.152  augustss 	sqh->hlink = eqh->hlink;
   1225          1.123  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1226  1.205.2.1.2.1     skrll 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1227  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_PREWRITE);
   1228          1.152  augustss 	eqh->hlink = sqh;
   1229          1.123  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1230  1.205.2.1.2.1     skrll 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1231  1.205.2.1.2.1     skrll 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1232          1.123  augustss 	sc->sc_lctl_end = sqh;
   1233          1.123  augustss }
   1234          1.123  augustss 
   1235          1.123  augustss /* Remove low speed control QH, called at splusb(). */
   1236          1.123  augustss void
   1237          1.123  augustss uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1238          1.123  augustss {
   1239          1.123  augustss 	uhci_soft_qh_t *pqh;
   1240          1.123  augustss 
   1241          1.123  augustss 	SPLUSBCHECK;
   1242          1.123  augustss 
   1243          1.123  augustss 	DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh));
   1244          1.124  augustss 	/* See comment in uhci_remove_hs_ctrl() */
   1245  1.205.2.1.2.1     skrll 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1246  1.205.2.1.2.1     skrll 	    sizeof(sqh->qh.qh_elink),
   1247  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1248          1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1249          1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1250  1.205.2.1.2.1     skrll 		usb_syncmem(&sqh->dma,
   1251  1.205.2.1.2.1     skrll 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1252  1.205.2.1.2.1     skrll 		    sizeof(sqh->qh.qh_elink),
   1253  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1254          1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1255          1.124  augustss 	}
   1256          1.123  augustss 	pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh);
   1257  1.205.2.1.2.1     skrll 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1258  1.205.2.1.2.1     skrll 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1259          1.152  augustss 	pqh->hlink = sqh->hlink;
   1260          1.123  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1261  1.205.2.1.2.1     skrll 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1262  1.205.2.1.2.1     skrll 	    sizeof(pqh->qh.qh_hlink),
   1263  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_PREWRITE);
   1264          1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1265          1.123  augustss 	if (sc->sc_lctl_end == sqh)
   1266          1.123  augustss 		sc->sc_lctl_end = pqh;
   1267            1.1  augustss }
   1268            1.1  augustss 
   1269            1.1  augustss /* Add bulk QH, called at splusb(). */
   1270            1.1  augustss void
   1271          1.119  augustss uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1272            1.1  augustss {
   1273           1.42  augustss 	uhci_soft_qh_t *eqh;
   1274            1.1  augustss 
   1275           1.52  augustss 	SPLUSBCHECK;
   1276           1.52  augustss 
   1277            1.1  augustss 	DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
   1278           1.42  augustss 	eqh = sc->sc_bulk_end;
   1279  1.205.2.1.2.1     skrll 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1280  1.205.2.1.2.1     skrll 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1281          1.152  augustss 	sqh->hlink = eqh->hlink;
   1282           1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1283  1.205.2.1.2.1     skrll 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1284  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_PREWRITE);
   1285          1.152  augustss 	eqh->hlink = sqh;
   1286          1.121  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1287  1.205.2.1.2.1     skrll 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1288  1.205.2.1.2.1     skrll 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1289            1.1  augustss 	sc->sc_bulk_end = sqh;
   1290          1.123  augustss 	uhci_add_loop(sc);
   1291            1.1  augustss }
   1292            1.1  augustss 
   1293            1.1  augustss /* Remove bulk QH, called at splusb(). */
   1294            1.1  augustss void
   1295          1.119  augustss uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1296            1.1  augustss {
   1297            1.1  augustss 	uhci_soft_qh_t *pqh;
   1298            1.1  augustss 
   1299           1.52  augustss 	SPLUSBCHECK;
   1300           1.52  augustss 
   1301            1.1  augustss 	DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
   1302          1.123  augustss 	uhci_rem_loop(sc);
   1303          1.124  augustss 	/* See comment in uhci_remove_hs_ctrl() */
   1304  1.205.2.1.2.1     skrll 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1305  1.205.2.1.2.1     skrll 	    sizeof(sqh->qh.qh_elink),
   1306  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1307          1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1308          1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1309  1.205.2.1.2.1     skrll 		usb_syncmem(&sqh->dma,
   1310  1.205.2.1.2.1     skrll 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1311  1.205.2.1.2.1     skrll 		    sizeof(sqh->qh.qh_elink),
   1312  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1313          1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1314          1.124  augustss 	}
   1315           1.92  augustss 	pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh);
   1316  1.205.2.1.2.1     skrll 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1317  1.205.2.1.2.1     skrll 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1318           1.42  augustss 	pqh->hlink       = sqh->hlink;
   1319           1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1320  1.205.2.1.2.1     skrll 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1321  1.205.2.1.2.1     skrll 	    sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1322          1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1323            1.1  augustss 	if (sc->sc_bulk_end == sqh)
   1324            1.1  augustss 		sc->sc_bulk_end = pqh;
   1325            1.1  augustss }
   1326            1.1  augustss 
   1327          1.141  augustss Static int uhci_intr1(uhci_softc_t *);
   1328          1.141  augustss 
   1329            1.1  augustss int
   1330          1.119  augustss uhci_intr(void *arg)
   1331            1.1  augustss {
   1332           1.44  augustss 	uhci_softc_t *sc = arg;
   1333          1.146  augustss 
   1334          1.146  augustss 	if (sc->sc_dying)
   1335          1.146  augustss 		return (0);
   1336          1.141  augustss 
   1337          1.141  augustss 	if (sc->sc_bus.use_polling) {
   1338          1.141  augustss #ifdef DIAGNOSTIC
   1339          1.179   mycroft 		DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n"));
   1340          1.141  augustss #endif
   1341          1.141  augustss 		return (0);
   1342          1.141  augustss 	}
   1343          1.179   mycroft 
   1344          1.141  augustss 	return (uhci_intr1(sc));
   1345          1.141  augustss }
   1346          1.141  augustss 
   1347          1.141  augustss int
   1348          1.141  augustss uhci_intr1(uhci_softc_t *sc)
   1349          1.141  augustss {
   1350           1.44  augustss 	int status;
   1351           1.44  augustss 	int ack;
   1352            1.1  augustss 
   1353           1.67  augustss #ifdef UHCI_DEBUG
   1354           1.44  augustss 	if (uhcidebug > 15) {
   1355          1.141  augustss 		DPRINTF(("%s: uhci_intr1\n", USBDEVNAME(sc->sc_bus.bdev)));
   1356            1.1  augustss 		uhci_dumpregs(sc);
   1357            1.1  augustss 	}
   1358            1.1  augustss #endif
   1359          1.117  augustss 
   1360          1.153  augustss 	status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS;
   1361          1.127     soren 	if (status == 0)	/* The interrupt was not for us. */
   1362          1.127     soren 		return (0);
   1363          1.127     soren 
   1364          1.117  augustss 	if (sc->sc_suspend != PWR_RESUME) {
   1365          1.201  jmcneill #ifdef DIAGNOSTIC
   1366          1.117  augustss 		printf("%s: interrupt while not operating ignored\n",
   1367          1.117  augustss 		       USBDEVNAME(sc->sc_bus.bdev));
   1368          1.201  jmcneill #endif
   1369          1.134  augustss 		UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */
   1370          1.117  augustss 		return (0);
   1371          1.117  augustss 	}
   1372           1.44  augustss 
   1373           1.44  augustss 	ack = 0;
   1374           1.44  augustss 	if (status & UHCI_STS_USBINT)
   1375           1.44  augustss 		ack |= UHCI_STS_USBINT;
   1376           1.44  augustss 	if (status & UHCI_STS_USBEI)
   1377           1.44  augustss 		ack |= UHCI_STS_USBEI;
   1378            1.1  augustss 	if (status & UHCI_STS_RD) {
   1379           1.44  augustss 		ack |= UHCI_STS_RD;
   1380          1.118  augustss #ifdef UHCI_DEBUG
   1381           1.46  augustss 		printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
   1382          1.118  augustss #endif
   1383            1.1  augustss 	}
   1384            1.1  augustss 	if (status & UHCI_STS_HSE) {
   1385           1.44  augustss 		ack |= UHCI_STS_HSE;
   1386           1.81  augustss 		printf("%s: host system error\n", USBDEVNAME(sc->sc_bus.bdev));
   1387            1.1  augustss 	}
   1388            1.1  augustss 	if (status & UHCI_STS_HCPE) {
   1389           1.44  augustss 		ack |= UHCI_STS_HCPE;
   1390          1.152  augustss 		printf("%s: host controller process error\n",
   1391           1.81  augustss 		       USBDEVNAME(sc->sc_bus.bdev));
   1392           1.44  augustss 	}
   1393           1.44  augustss 	if (status & UHCI_STS_HCH) {
   1394           1.44  augustss 		/* no acknowledge needed */
   1395          1.136  augustss 		if (!sc->sc_dying) {
   1396          1.152  augustss 			printf("%s: host controller halted\n",
   1397          1.129  augustss 			    USBDEVNAME(sc->sc_bus.bdev));
   1398          1.110  augustss #ifdef UHCI_DEBUG
   1399          1.136  augustss 			uhci_dump_all(sc);
   1400          1.110  augustss #endif
   1401          1.136  augustss 		}
   1402          1.136  augustss 		sc->sc_dying = 1;
   1403            1.1  augustss 	}
   1404           1.44  augustss 
   1405          1.132  augustss 	if (!ack)
   1406          1.132  augustss 		return (0);	/* nothing to acknowledge */
   1407          1.132  augustss 	UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */
   1408            1.1  augustss 
   1409           1.85  augustss 	sc->sc_bus.no_intrs++;
   1410           1.85  augustss 	usb_schedsoftintr(&sc->sc_bus);
   1411           1.85  augustss 
   1412          1.175   mycroft 	DPRINTFN(15, ("%s: uhci_intr: exit\n", USBDEVNAME(sc->sc_bus.bdev)));
   1413           1.85  augustss 
   1414           1.85  augustss 	return (1);
   1415           1.85  augustss }
   1416           1.85  augustss 
   1417           1.85  augustss void
   1418          1.133  augustss uhci_softintr(void *v)
   1419           1.85  augustss {
   1420          1.133  augustss 	uhci_softc_t *sc = v;
   1421          1.178    martin 	uhci_intr_info_t *ii, *nextii;
   1422           1.85  augustss 
   1423          1.140  augustss 	DPRINTFN(10,("%s: uhci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev),
   1424          1.140  augustss 		     sc->sc_bus.intr_context));
   1425           1.85  augustss 
   1426           1.51  augustss 	sc->sc_bus.intr_context++;
   1427           1.50  augustss 
   1428            1.1  augustss 	/*
   1429            1.1  augustss 	 * Interrupts on UHCI really suck.  When the host controller
   1430            1.1  augustss 	 * interrupts because a transfer is completed there is no
   1431            1.1  augustss 	 * way of knowing which transfer it was.  You can scan down
   1432            1.1  augustss 	 * the TDs and QHs of the previous frame to limit the search,
   1433            1.1  augustss 	 * but that assumes that the interrupt was not delayed by more
   1434            1.1  augustss 	 * than 1 ms, which may not always be true (e.g. after debug
   1435            1.1  augustss 	 * output on a slow console).
   1436            1.1  augustss 	 * We scan all interrupt descriptors to see if any have
   1437            1.1  augustss 	 * completed.
   1438            1.1  augustss 	 */
   1439          1.178    martin 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) {
   1440          1.178    martin 		nextii = LIST_NEXT(ii, list);
   1441            1.1  augustss 		uhci_check_intr(sc, ii);
   1442          1.178    martin 	}
   1443            1.1  augustss 
   1444          1.164  augustss #ifdef USB_USE_SOFTINTR
   1445          1.153  augustss 	if (sc->sc_softwake) {
   1446          1.153  augustss 		sc->sc_softwake = 0;
   1447          1.153  augustss 		wakeup(&sc->sc_softwake);
   1448          1.153  augustss 	}
   1449          1.164  augustss #endif /* USB_USE_SOFTINTR */
   1450          1.153  augustss 
   1451           1.51  augustss 	sc->sc_bus.intr_context--;
   1452            1.1  augustss }
   1453            1.1  augustss 
   1454            1.1  augustss /* Check for an interrupt. */
   1455            1.1  augustss void
   1456          1.205  christos uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii)
   1457            1.1  augustss {
   1458            1.1  augustss 	uhci_soft_td_t *std, *lstd;
   1459           1.18  augustss 	u_int32_t status;
   1460            1.1  augustss 
   1461            1.1  augustss 	DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
   1462            1.1  augustss #ifdef DIAGNOSTIC
   1463           1.63  augustss 	if (ii == NULL) {
   1464            1.1  augustss 		printf("uhci_check_intr: no ii? %p\n", ii);
   1465            1.1  augustss 		return;
   1466            1.1  augustss 	}
   1467            1.1  augustss #endif
   1468          1.155  augustss 	if (ii->xfer->status == USBD_CANCELLED ||
   1469          1.155  augustss 	    ii->xfer->status == USBD_TIMEOUT) {
   1470          1.155  augustss 		DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer));
   1471          1.155  augustss 		return;
   1472          1.155  augustss 	}
   1473          1.155  augustss 
   1474           1.63  augustss 	if (ii->stdstart == NULL)
   1475            1.1  augustss 		return;
   1476            1.1  augustss 	lstd = ii->stdend;
   1477            1.1  augustss #ifdef DIAGNOSTIC
   1478           1.63  augustss 	if (lstd == NULL) {
   1479            1.1  augustss 		printf("uhci_check_intr: std==0\n");
   1480            1.1  augustss 		return;
   1481            1.1  augustss 	}
   1482            1.1  augustss #endif
   1483          1.152  augustss 	/*
   1484           1.26  augustss 	 * If the last TD is still active we need to check whether there
   1485          1.186     skrll 	 * is an error somewhere in the middle, or whether there was a
   1486           1.26  augustss 	 * short packet (SPD and not ACTIVE).
   1487           1.26  augustss 	 */
   1488  1.205.2.1.2.1     skrll 	usb_syncmem(&lstd->dma,
   1489  1.205.2.1.2.1     skrll 	    lstd->offs + offsetof(uhci_td_t, td_status),
   1490  1.205.2.1.2.1     skrll 	    sizeof(lstd->td.td_status),
   1491  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1492           1.88   tsutsui 	if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) {
   1493           1.92  augustss 		DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii));
   1494           1.48  augustss 		for (std = ii->stdstart; std != lstd; std = std->link.std) {
   1495  1.205.2.1.2.1     skrll 			usb_syncmem(&std->dma,
   1496  1.205.2.1.2.1     skrll 			    std->offs + offsetof(uhci_td_t, td_status),
   1497  1.205.2.1.2.1     skrll 			    sizeof(std->td.td_status),
   1498  1.205.2.1.2.1     skrll 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1499           1.88   tsutsui 			status = le32toh(std->td.td_status);
   1500  1.205.2.1.2.1     skrll 			usb_syncmem(&std->dma,
   1501  1.205.2.1.2.1     skrll 			    std->offs + offsetof(uhci_td_t, td_status),
   1502  1.205.2.1.2.1     skrll 			    sizeof(std->td.td_status), BUS_DMASYNC_PREREAD);
   1503           1.83  augustss 			/* If there's an active TD the xfer isn't done. */
   1504           1.83  augustss 			if (status & UHCI_TD_ACTIVE)
   1505           1.83  augustss 				break;
   1506           1.83  augustss 			/* Any kind of error makes the xfer done. */
   1507           1.83  augustss 			if (status & UHCI_TD_STALLED)
   1508           1.83  augustss 				goto done;
   1509           1.83  augustss 			/* We want short packets, and it is short: it's done */
   1510  1.205.2.1.2.1     skrll 			usb_syncmem(&std->dma,
   1511  1.205.2.1.2.1     skrll 			    std->offs + offsetof(uhci_td_t, td_token),
   1512  1.205.2.1.2.1     skrll 			    sizeof(std->td.td_token),
   1513  1.205.2.1.2.1     skrll 			    BUS_DMASYNC_POSTWRITE);
   1514           1.83  augustss 			if ((status & UHCI_TD_SPD) &&
   1515          1.152  augustss 			      UHCI_TD_GET_ACTLEN(status) <
   1516           1.88   tsutsui 			      UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)))
   1517            1.1  augustss 				goto done;
   1518           1.18  augustss 		}
   1519           1.92  augustss 		DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n",
   1520           1.18  augustss 			      ii, ii->stdstart));
   1521  1.205.2.1.2.1     skrll 		usb_syncmem(&lstd->dma,
   1522  1.205.2.1.2.1     skrll 		    lstd->offs + offsetof(uhci_td_t, td_status),
   1523  1.205.2.1.2.1     skrll 		    sizeof(lstd->td.td_status),
   1524  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_PREREAD);
   1525            1.1  augustss 		return;
   1526            1.1  augustss 	}
   1527            1.1  augustss  done:
   1528           1.92  augustss 	DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii));
   1529           1.96  augustss 	usb_uncallout(ii->xfer->timeout_handle, uhci_timeout, ii);
   1530           1.36  augustss 	uhci_idone(ii);
   1531            1.1  augustss }
   1532            1.1  augustss 
   1533           1.52  augustss /* Called at splusb() */
   1534            1.1  augustss void
   1535          1.119  augustss uhci_idone(uhci_intr_info_t *ii)
   1536            1.1  augustss {
   1537           1.63  augustss 	usbd_xfer_handle xfer = ii->xfer;
   1538           1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   1539            1.1  augustss 	uhci_soft_td_t *std;
   1540           1.67  augustss 	u_int32_t status = 0, nstatus;
   1541           1.26  augustss 	int actlen;
   1542            1.1  augustss 
   1543          1.140  augustss 	DPRINTFN(12, ("uhci_idone: ii=%p\n", ii));
   1544            1.7  augustss #ifdef DIAGNOSTIC
   1545            1.7  augustss 	{
   1546            1.7  augustss 		int s = splhigh();
   1547            1.7  augustss 		if (ii->isdone) {
   1548           1.26  augustss 			splx(s);
   1549           1.92  augustss #ifdef UHCI_DEBUG
   1550           1.92  augustss 			printf("uhci_idone: ii is done!\n   ");
   1551           1.92  augustss 			uhci_dump_ii(ii);
   1552           1.92  augustss #else
   1553           1.36  augustss 			printf("uhci_idone: ii=%p is done!\n", ii);
   1554           1.92  augustss #endif
   1555            1.7  augustss 			return;
   1556            1.7  augustss 		}
   1557            1.7  augustss 		ii->isdone = 1;
   1558            1.7  augustss 		splx(s);
   1559            1.7  augustss 	}
   1560            1.7  augustss #endif
   1561           1.48  augustss 
   1562           1.63  augustss 	if (xfer->nframes != 0) {
   1563           1.48  augustss 		/* Isoc transfer, do things differently. */
   1564           1.48  augustss 		uhci_soft_td_t **stds = upipe->u.iso.stds;
   1565          1.126  augustss 		int i, n, nframes, len;
   1566           1.48  augustss 
   1567           1.48  augustss 		DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii));
   1568           1.48  augustss 
   1569           1.63  augustss 		nframes = xfer->nframes;
   1570           1.48  augustss 		actlen = 0;
   1571           1.92  augustss 		n = UXFER(xfer)->curframe;
   1572           1.48  augustss 		for (i = 0; i < nframes; i++) {
   1573           1.48  augustss 			std = stds[n];
   1574           1.59  augustss #ifdef UHCI_DEBUG
   1575           1.48  augustss 			if (uhcidebug > 5) {
   1576           1.48  augustss 				DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i));
   1577           1.48  augustss 				uhci_dump_td(std);
   1578           1.48  augustss 			}
   1579           1.48  augustss #endif
   1580           1.48  augustss 			if (++n >= UHCI_VFRAMELIST_COUNT)
   1581           1.48  augustss 				n = 0;
   1582  1.205.2.1.2.1     skrll 			usb_syncmem(&std->dma,
   1583  1.205.2.1.2.1     skrll 			    std->offs + offsetof(uhci_td_t, td_status),
   1584  1.205.2.1.2.1     skrll 			    sizeof(std->td.td_status),
   1585  1.205.2.1.2.1     skrll 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1586           1.88   tsutsui 			status = le32toh(std->td.td_status);
   1587          1.126  augustss 			len = UHCI_TD_GET_ACTLEN(status);
   1588          1.126  augustss 			xfer->frlengths[i] = len;
   1589          1.126  augustss 			actlen += len;
   1590           1.48  augustss 		}
   1591           1.48  augustss 		upipe->u.iso.inuse -= nframes;
   1592           1.63  augustss 		xfer->actlen = actlen;
   1593           1.63  augustss 		xfer->status = USBD_NORMAL_COMPLETION;
   1594          1.140  augustss 		goto end;
   1595           1.48  augustss 	}
   1596           1.48  augustss 
   1597           1.59  augustss #ifdef UHCI_DEBUG
   1598           1.65  augustss 	DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n",
   1599           1.65  augustss 		      ii, xfer, upipe));
   1600           1.48  augustss 	if (uhcidebug > 10)
   1601           1.48  augustss 		uhci_dump_tds(ii->stdstart);
   1602           1.48  augustss #endif
   1603           1.48  augustss 
   1604           1.26  augustss 	/* The transfer is done, compute actual length and status. */
   1605           1.26  augustss 	actlen = 0;
   1606           1.63  augustss 	for (std = ii->stdstart; std != NULL; std = std->link.std) {
   1607  1.205.2.1.2.1     skrll 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   1608  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1609           1.88   tsutsui 		nstatus = le32toh(std->td.td_status);
   1610           1.64  augustss 		if (nstatus & UHCI_TD_ACTIVE)
   1611           1.26  augustss 			break;
   1612           1.67  augustss 
   1613           1.64  augustss 		status = nstatus;
   1614           1.88   tsutsui 		if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) !=
   1615           1.88   tsutsui 			UHCI_TD_PID_SETUP)
   1616           1.26  augustss 			actlen += UHCI_TD_GET_ACTLEN(status);
   1617          1.176   mycroft 		else {
   1618          1.176   mycroft 			/*
   1619          1.176   mycroft 			 * UHCI will report CRCTO in addition to a STALL or NAK
   1620          1.176   mycroft 			 * for a SETUP transaction.  See section 3.2.2, "TD
   1621          1.176   mycroft 			 * CONTROL AND STATUS".
   1622          1.176   mycroft 			 */
   1623          1.176   mycroft 			if (status & (UHCI_TD_STALLED | UHCI_TD_NAK))
   1624          1.176   mycroft 				status &= ~UHCI_TD_CRCTO;
   1625          1.176   mycroft 		}
   1626            1.1  augustss 	}
   1627           1.38  augustss 	/* If there are left over TDs we need to update the toggle. */
   1628           1.63  augustss 	if (std != NULL)
   1629           1.88   tsutsui 		upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token));
   1630           1.38  augustss 
   1631            1.1  augustss 	status &= UHCI_TD_ERROR;
   1632          1.152  augustss 	DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n",
   1633           1.26  augustss 		      actlen, status));
   1634           1.63  augustss 	xfer->actlen = actlen;
   1635            1.1  augustss 	if (status != 0) {
   1636          1.122        tv #ifdef UHCI_DEBUG
   1637          1.122        tv 		char sbuf[128];
   1638          1.122        tv 
   1639          1.147  augustss 		bitmask_snprintf((u_int32_t)status,
   1640          1.147  augustss 				 "\20\22BITSTUFF\23CRCTO\24NAK\25"
   1641          1.122        tv 				 "BABBLE\26DBUFFER\27STALLED\30ACTIVE",
   1642          1.122        tv 				 sbuf, sizeof(sbuf));
   1643          1.122        tv 
   1644           1.75  augustss 		DPRINTFN((status == UHCI_TD_STALLED)*10,
   1645           1.36  augustss 			 ("uhci_idone: error, addr=%d, endpt=0x%02x, "
   1646          1.122        tv 			  "status 0x%s\n",
   1647           1.63  augustss 			  xfer->pipe->device->address,
   1648           1.63  augustss 			  xfer->pipe->endpoint->edesc->bEndpointAddress,
   1649          1.122        tv 			  sbuf));
   1650          1.122        tv #endif
   1651          1.122        tv 
   1652            1.1  augustss 		if (status == UHCI_TD_STALLED)
   1653           1.63  augustss 			xfer->status = USBD_STALLED;
   1654            1.1  augustss 		else
   1655           1.63  augustss 			xfer->status = USBD_IOERROR; /* more info XXX */
   1656            1.1  augustss 	} else {
   1657           1.63  augustss 		xfer->status = USBD_NORMAL_COMPLETION;
   1658            1.1  augustss 	}
   1659          1.140  augustss 
   1660          1.140  augustss  end:
   1661           1.63  augustss 	usb_transfer_complete(xfer);
   1662          1.140  augustss 	DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii));
   1663            1.1  augustss }
   1664            1.1  augustss 
   1665           1.13  augustss /*
   1666           1.13  augustss  * Called when a request does not complete.
   1667           1.13  augustss  */
   1668            1.1  augustss void
   1669          1.119  augustss uhci_timeout(void *addr)
   1670            1.1  augustss {
   1671            1.1  augustss 	uhci_intr_info_t *ii = addr;
   1672          1.153  augustss 	struct uhci_xfer *uxfer = UXFER(ii->xfer);
   1673          1.153  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe;
   1674          1.153  augustss 	uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
   1675          1.153  augustss 
   1676          1.153  augustss 	DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer));
   1677          1.153  augustss 
   1678          1.153  augustss 	if (sc->sc_dying) {
   1679          1.153  augustss 		uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT);
   1680          1.153  augustss 		return;
   1681          1.153  augustss 	}
   1682            1.1  augustss 
   1683          1.153  augustss 	/* Execute the abort in a process context. */
   1684          1.156  augustss 	usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer);
   1685          1.204     joerg 	usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task,
   1686          1.204     joerg 	    USB_TASKQ_HC);
   1687          1.153  augustss }
   1688           1.51  augustss 
   1689          1.153  augustss void
   1690          1.153  augustss uhci_timeout_task(void *addr)
   1691          1.153  augustss {
   1692          1.153  augustss 	usbd_xfer_handle xfer = addr;
   1693          1.153  augustss 	int s;
   1694          1.153  augustss 
   1695          1.153  augustss 	DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer));
   1696           1.67  augustss 
   1697          1.153  augustss 	s = splusb();
   1698          1.153  augustss 	uhci_abort_xfer(xfer, USBD_TIMEOUT);
   1699          1.153  augustss 	splx(s);
   1700            1.1  augustss }
   1701            1.1  augustss 
   1702            1.1  augustss /*
   1703            1.1  augustss  * Wait here until controller claims to have an interrupt.
   1704            1.1  augustss  * Then call uhci_intr and return.  Use timeout to avoid waiting
   1705            1.1  augustss  * too long.
   1706           1.13  augustss  * Only used during boot when interrupts are not enabled yet.
   1707            1.1  augustss  */
   1708            1.1  augustss void
   1709          1.119  augustss uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer)
   1710            1.1  augustss {
   1711           1.63  augustss 	int timo = xfer->timeout;
   1712           1.13  augustss 	uhci_intr_info_t *ii;
   1713           1.13  augustss 
   1714           1.26  augustss 	DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
   1715            1.1  augustss 
   1716           1.63  augustss 	xfer->status = USBD_IN_PROGRESS;
   1717           1.26  augustss 	for (; timo >= 0; timo--) {
   1718           1.20  augustss 		usb_delay_ms(&sc->sc_bus, 1);
   1719           1.26  augustss 		DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
   1720            1.1  augustss 		if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
   1721          1.141  augustss 			uhci_intr1(sc);
   1722           1.63  augustss 			if (xfer->status != USBD_IN_PROGRESS)
   1723            1.1  augustss 				return;
   1724            1.1  augustss 		}
   1725            1.1  augustss 	}
   1726           1.13  augustss 
   1727           1.13  augustss 	/* Timeout */
   1728           1.13  augustss 	DPRINTF(("uhci_waitintr: timeout\n"));
   1729           1.13  augustss 	for (ii = LIST_FIRST(&sc->sc_intrhead);
   1730          1.152  augustss 	     ii != NULL && ii->xfer != xfer;
   1731           1.13  augustss 	     ii = LIST_NEXT(ii, list))
   1732           1.13  augustss 		;
   1733           1.41  augustss #ifdef DIAGNOSTIC
   1734           1.63  augustss 	if (ii == NULL)
   1735          1.163    provos 		panic("uhci_waitintr: lost intr_info");
   1736           1.41  augustss #endif
   1737           1.41  augustss 	uhci_idone(ii);
   1738            1.1  augustss }
   1739            1.1  augustss 
   1740            1.8  augustss void
   1741          1.119  augustss uhci_poll(struct usbd_bus *bus)
   1742            1.8  augustss {
   1743            1.8  augustss 	uhci_softc_t *sc = (uhci_softc_t *)bus;
   1744            1.8  augustss 
   1745            1.8  augustss 	if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT)
   1746          1.141  augustss 		uhci_intr1(sc);
   1747            1.8  augustss }
   1748            1.8  augustss 
   1749            1.1  augustss void
   1750          1.119  augustss uhci_reset(uhci_softc_t *sc)
   1751            1.1  augustss {
   1752            1.1  augustss 	int n;
   1753            1.1  augustss 
   1754            1.1  augustss 	UHCICMD(sc, UHCI_CMD_HCRESET);
   1755            1.1  augustss 	/* The reset bit goes low when the controller is done. */
   1756          1.152  augustss 	for (n = 0; n < UHCI_RESET_TIMEOUT &&
   1757            1.1  augustss 		    (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
   1758           1.92  augustss 		usb_delay_ms(&sc->sc_bus, 1);
   1759            1.1  augustss 	if (n >= UHCI_RESET_TIMEOUT)
   1760          1.152  augustss 		printf("%s: controller did not reset\n",
   1761           1.13  augustss 		       USBDEVNAME(sc->sc_bus.bdev));
   1762            1.1  augustss }
   1763            1.1  augustss 
   1764           1.16  augustss usbd_status
   1765          1.119  augustss uhci_run(uhci_softc_t *sc, int run)
   1766            1.1  augustss {
   1767            1.1  augustss 	int s, n, running;
   1768           1.71  augustss 	u_int16_t cmd;
   1769            1.1  augustss 
   1770            1.1  augustss 	run = run != 0;
   1771          1.132  augustss 	s = splhardusb();
   1772           1.30  augustss 	DPRINTF(("uhci_run: setting run=%d\n", run));
   1773           1.71  augustss 	cmd = UREAD2(sc, UHCI_CMD);
   1774           1.71  augustss 	if (run)
   1775           1.71  augustss 		cmd |= UHCI_CMD_RS;
   1776           1.71  augustss 	else
   1777           1.71  augustss 		cmd &= ~UHCI_CMD_RS;
   1778           1.71  augustss 	UHCICMD(sc, cmd);
   1779           1.13  augustss 	for(n = 0; n < 10; n++) {
   1780            1.1  augustss 		running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
   1781            1.1  augustss 		/* return when we've entered the state we want */
   1782            1.1  augustss 		if (run == running) {
   1783            1.1  augustss 			splx(s);
   1784           1.30  augustss 			DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
   1785           1.30  augustss 				 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
   1786           1.16  augustss 			return (USBD_NORMAL_COMPLETION);
   1787            1.1  augustss 		}
   1788           1.20  augustss 		usb_delay_ms(&sc->sc_bus, 1);
   1789            1.1  augustss 	}
   1790            1.1  augustss 	splx(s);
   1791           1.13  augustss 	printf("%s: cannot %s\n", USBDEVNAME(sc->sc_bus.bdev),
   1792           1.14  augustss 	       run ? "start" : "stop");
   1793           1.16  augustss 	return (USBD_IOERROR);
   1794            1.1  augustss }
   1795            1.1  augustss 
   1796            1.1  augustss /*
   1797            1.1  augustss  * Memory management routines.
   1798            1.1  augustss  *  uhci_alloc_std allocates TDs
   1799            1.1  augustss  *  uhci_alloc_sqh allocates QHs
   1800            1.7  augustss  * These two routines do their own free list management,
   1801            1.1  augustss  * partly for speed, partly because allocating DMAable memory
   1802            1.1  augustss  * has page size granularaity so much memory would be wasted if
   1803           1.16  augustss  * only one TD/QH (32 bytes) was placed in each allocated chunk.
   1804            1.1  augustss  */
   1805            1.1  augustss 
   1806            1.1  augustss uhci_soft_td_t *
   1807          1.119  augustss uhci_alloc_std(uhci_softc_t *sc)
   1808            1.1  augustss {
   1809            1.1  augustss 	uhci_soft_td_t *std;
   1810           1.63  augustss 	usbd_status err;
   1811           1.42  augustss 	int i, offs;
   1812            1.7  augustss 	usb_dma_t dma;
   1813            1.1  augustss 
   1814           1.63  augustss 	if (sc->sc_freetds == NULL) {
   1815            1.1  augustss 		DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
   1816           1.63  augustss 		err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK,
   1817           1.63  augustss 			  UHCI_TD_ALIGN, &dma);
   1818           1.63  augustss 		if (err)
   1819           1.16  augustss 			return (0);
   1820           1.43  augustss 		for(i = 0; i < UHCI_STD_CHUNK; i++) {
   1821           1.42  augustss 			offs = i * UHCI_STD_SIZE;
   1822          1.159  augustss 			std = KERNADDR(&dma, offs);
   1823          1.160  augustss 			std->physaddr = DMAADDR(&dma, offs);
   1824  1.205.2.1.2.1     skrll 			std->dma = dma;
   1825  1.205.2.1.2.1     skrll 			std->offs = offs;
   1826           1.42  augustss 			std->link.std = sc->sc_freetds;
   1827            1.1  augustss 			sc->sc_freetds = std;
   1828            1.1  augustss 		}
   1829            1.1  augustss 	}
   1830            1.1  augustss 	std = sc->sc_freetds;
   1831           1.42  augustss 	sc->sc_freetds = std->link.std;
   1832           1.42  augustss 	memset(&std->td, 0, sizeof(uhci_td_t));
   1833            1.1  augustss 	return std;
   1834            1.1  augustss }
   1835            1.1  augustss 
   1836            1.1  augustss void
   1837          1.119  augustss uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std)
   1838            1.1  augustss {
   1839            1.7  augustss #ifdef DIAGNOSTIC
   1840            1.7  augustss #define TD_IS_FREE 0x12345678
   1841           1.88   tsutsui 	if (le32toh(std->td.td_token) == TD_IS_FREE) {
   1842            1.7  augustss 		printf("uhci_free_std: freeing free TD %p\n", std);
   1843            1.7  augustss 		return;
   1844            1.7  augustss 	}
   1845           1.88   tsutsui 	std->td.td_token = htole32(TD_IS_FREE);
   1846            1.7  augustss #endif
   1847           1.42  augustss 	std->link.std = sc->sc_freetds;
   1848            1.1  augustss 	sc->sc_freetds = std;
   1849            1.1  augustss }
   1850            1.1  augustss 
   1851            1.1  augustss uhci_soft_qh_t *
   1852          1.119  augustss uhci_alloc_sqh(uhci_softc_t *sc)
   1853            1.1  augustss {
   1854            1.1  augustss 	uhci_soft_qh_t *sqh;
   1855           1.63  augustss 	usbd_status err;
   1856            1.1  augustss 	int i, offs;
   1857            1.7  augustss 	usb_dma_t dma;
   1858            1.1  augustss 
   1859           1.63  augustss 	if (sc->sc_freeqhs == NULL) {
   1860            1.1  augustss 		DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
   1861           1.63  augustss 		err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK,
   1862           1.63  augustss 			  UHCI_QH_ALIGN, &dma);
   1863           1.63  augustss 		if (err)
   1864           1.63  augustss 			return (0);
   1865           1.43  augustss 		for(i = 0; i < UHCI_SQH_CHUNK; i++) {
   1866           1.42  augustss 			offs = i * UHCI_SQH_SIZE;
   1867          1.159  augustss 			sqh = KERNADDR(&dma, offs);
   1868          1.160  augustss 			sqh->physaddr = DMAADDR(&dma, offs);
   1869  1.205.2.1.2.1     skrll 			sqh->dma = dma;
   1870  1.205.2.1.2.1     skrll 			sqh->offs = offs;
   1871           1.42  augustss 			sqh->hlink = sc->sc_freeqhs;
   1872            1.1  augustss 			sc->sc_freeqhs = sqh;
   1873            1.1  augustss 		}
   1874            1.1  augustss 	}
   1875            1.1  augustss 	sqh = sc->sc_freeqhs;
   1876           1.42  augustss 	sc->sc_freeqhs = sqh->hlink;
   1877           1.42  augustss 	memset(&sqh->qh, 0, sizeof(uhci_qh_t));
   1878           1.16  augustss 	return (sqh);
   1879            1.1  augustss }
   1880            1.1  augustss 
   1881            1.1  augustss void
   1882          1.119  augustss uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1883            1.1  augustss {
   1884           1.42  augustss 	sqh->hlink = sc->sc_freeqhs;
   1885            1.1  augustss 	sc->sc_freeqhs = sqh;
   1886            1.1  augustss }
   1887            1.1  augustss 
   1888            1.1  augustss void
   1889          1.119  augustss uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std,
   1890          1.119  augustss 		    uhci_soft_td_t *stdend)
   1891            1.1  augustss {
   1892            1.1  augustss 	uhci_soft_td_t *p;
   1893            1.1  augustss 
   1894  1.205.2.1.2.1     skrll 	/*
   1895  1.205.2.1.2.1     skrll 	 * to avoid race condition with the controller which may be looking
   1896  1.205.2.1.2.1     skrll 	 * at this chain, we need to first invalidate all links, and
   1897  1.205.2.1.2.1     skrll 	 * then wait for the controller to move to another queue
   1898  1.205.2.1.2.1     skrll 	 */
   1899  1.205.2.1.2.1     skrll 	for (p = std; p != stdend; p = p->link.std) {
   1900  1.205.2.1.2.1     skrll 		usb_syncmem(&p->dma,
   1901  1.205.2.1.2.1     skrll 		    p->offs + offsetof(uhci_td_t, td_link),
   1902  1.205.2.1.2.1     skrll 		    sizeof(p->td.td_link),
   1903  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1904  1.205.2.1.2.1     skrll 		if ((p->td.td_link & UHCI_PTR_T) == 0) {
   1905  1.205.2.1.2.1     skrll 			p->td.td_link = UHCI_PTR_T;
   1906  1.205.2.1.2.1     skrll 			usb_syncmem(&p->dma,
   1907  1.205.2.1.2.1     skrll 			    p->offs + offsetof(uhci_td_t, td_link),
   1908  1.205.2.1.2.1     skrll 			    sizeof(p->td.td_link),
   1909  1.205.2.1.2.1     skrll 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1910  1.205.2.1.2.1     skrll 		}
   1911  1.205.2.1.2.1     skrll 	}
   1912  1.205.2.1.2.1     skrll 	delay(UHCI_QH_REMOVE_DELAY);
   1913  1.205.2.1.2.1     skrll 
   1914            1.1  augustss 	for (; std != stdend; std = p) {
   1915           1.42  augustss 		p = std->link.std;
   1916            1.1  augustss 		uhci_free_std(sc, std);
   1917            1.1  augustss 	}
   1918            1.1  augustss }
   1919            1.1  augustss 
   1920            1.1  augustss usbd_status
   1921          1.119  augustss uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len,
   1922          1.119  augustss 		     int rd, u_int16_t flags, usb_dma_t *dma,
   1923          1.119  augustss 		     uhci_soft_td_t **sp, uhci_soft_td_t **ep)
   1924            1.1  augustss {
   1925            1.1  augustss 	uhci_soft_td_t *p, *lastp;
   1926            1.1  augustss 	uhci_physaddr_t lastlink;
   1927            1.1  augustss 	int i, ntd, l, tog, maxp;
   1928           1.18  augustss 	u_int32_t status;
   1929            1.1  augustss 	int addr = upipe->pipe.device->address;
   1930            1.1  augustss 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   1931            1.1  augustss 
   1932          1.144  augustss 	DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d "
   1933          1.152  augustss 		      "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len,
   1934          1.144  augustss 		      upipe->pipe.device->speed, flags));
   1935            1.4  augustss 	maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
   1936            1.1  augustss 	if (maxp == 0) {
   1937            1.1  augustss 		printf("uhci_alloc_std_chain: maxp=0\n");
   1938            1.1  augustss 		return (USBD_INVAL);
   1939            1.1  augustss 	}
   1940            1.1  augustss 	ntd = (len + maxp - 1) / maxp;
   1941           1.73  augustss 	if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0)
   1942           1.73  augustss 		ntd++;
   1943           1.39  augustss 	DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd));
   1944           1.73  augustss 	if (ntd == 0) {
   1945           1.73  augustss 		*sp = *ep = 0;
   1946           1.73  augustss 		DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n"));
   1947           1.73  augustss 		return (USBD_NORMAL_COMPLETION);
   1948           1.73  augustss 	}
   1949           1.38  augustss 	tog = upipe->nexttoggle;
   1950            1.1  augustss 	if (ntd % 2 == 0)
   1951            1.1  augustss 		tog ^= 1;
   1952           1.32  augustss 	upipe->nexttoggle = tog ^ 1;
   1953          1.121  augustss 	lastp = NULL;
   1954            1.1  augustss 	lastlink = UHCI_PTR_T;
   1955            1.1  augustss 	ntd--;
   1956           1.33  augustss 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
   1957          1.144  augustss 	if (upipe->pipe.device->speed == USB_SPEED_LOW)
   1958           1.18  augustss 		status |= UHCI_TD_LS;
   1959           1.73  augustss 	if (flags & USBD_SHORT_XFER_OK)
   1960           1.18  augustss 		status |= UHCI_TD_SPD;
   1961  1.205.2.1.2.1     skrll 	usb_syncmem(dma, 0, len,
   1962  1.205.2.1.2.1     skrll 	    rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   1963            1.1  augustss 	for (i = ntd; i >= 0; i--) {
   1964            1.1  augustss 		p = uhci_alloc_std(sc);
   1965           1.63  augustss 		if (p == NULL) {
   1966          1.202  christos 			KASSERT(lastp != NULL);
   1967          1.149  augustss 			uhci_free_std_chain(sc, lastp, NULL);
   1968            1.1  augustss 			return (USBD_NOMEM);
   1969            1.1  augustss 		}
   1970           1.42  augustss 		p->link.std = lastp;
   1971          1.121  augustss 		p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD);
   1972            1.1  augustss 		lastp = p;
   1973            1.1  augustss 		lastlink = p->physaddr;
   1974           1.88   tsutsui 		p->td.td_status = htole32(status);
   1975            1.1  augustss 		if (i == ntd) {
   1976            1.1  augustss 			/* last TD */
   1977            1.1  augustss 			l = len % maxp;
   1978           1.73  augustss 			if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER))
   1979           1.73  augustss 				l = maxp;
   1980            1.1  augustss 			*ep = p;
   1981            1.1  augustss 		} else
   1982            1.1  augustss 			l = maxp;
   1983          1.152  augustss 		p->td.td_token =
   1984           1.88   tsutsui 		    htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) :
   1985           1.88   tsutsui 				 UHCI_TD_OUT(l, endpt, addr, tog));
   1986          1.160  augustss 		p->td.td_buffer = htole32(DMAADDR(dma, i * maxp));
   1987  1.205.2.1.2.1     skrll 		usb_syncmem(&p->dma, p->offs, sizeof(p->td),
   1988  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1989            1.1  augustss 		tog ^= 1;
   1990            1.1  augustss 	}
   1991            1.1  augustss 	*sp = lastp;
   1992          1.152  augustss 	DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n",
   1993           1.38  augustss 		      upipe->nexttoggle));
   1994            1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   1995            1.1  augustss }
   1996            1.1  augustss 
   1997           1.38  augustss void
   1998          1.119  augustss uhci_device_clear_toggle(usbd_pipe_handle pipe)
   1999           1.38  augustss {
   2000           1.38  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2001           1.38  augustss 	upipe->nexttoggle = 0;
   2002           1.38  augustss }
   2003           1.38  augustss 
   2004           1.38  augustss void
   2005          1.205  christos uhci_noop(usbd_pipe_handle pipe)
   2006           1.38  augustss {
   2007           1.38  augustss }
   2008           1.38  augustss 
   2009            1.1  augustss usbd_status
   2010          1.119  augustss uhci_device_bulk_transfer(usbd_xfer_handle xfer)
   2011            1.1  augustss {
   2012           1.63  augustss 	usbd_status err;
   2013           1.16  augustss 
   2014           1.52  augustss 	/* Insert last in queue. */
   2015           1.63  augustss 	err = usb_insert_transfer(xfer);
   2016           1.63  augustss 	if (err)
   2017           1.63  augustss 		return (err);
   2018           1.52  augustss 
   2019          1.152  augustss 	/*
   2020           1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2021           1.92  augustss 	 * so start it first.
   2022           1.67  augustss 	 */
   2023           1.63  augustss 	return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2024           1.16  augustss }
   2025           1.16  augustss 
   2026           1.16  augustss usbd_status
   2027          1.119  augustss uhci_device_bulk_start(usbd_xfer_handle xfer)
   2028           1.16  augustss {
   2029           1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2030            1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2031            1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   2032           1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2033           1.55  augustss 	uhci_soft_td_t *data, *dataend;
   2034            1.1  augustss 	uhci_soft_qh_t *sqh;
   2035           1.63  augustss 	usbd_status err;
   2036           1.45  augustss 	int len, isread, endpt;
   2037            1.1  augustss 	int s;
   2038            1.1  augustss 
   2039          1.169  augustss 	DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n",
   2040          1.169  augustss 		     xfer, xfer->length, xfer->flags, ii));
   2041            1.1  augustss 
   2042           1.82  augustss 	if (sc->sc_dying)
   2043           1.82  augustss 		return (USBD_IOERROR);
   2044           1.82  augustss 
   2045           1.48  augustss #ifdef DIAGNOSTIC
   2046           1.63  augustss 	if (xfer->rqflags & URQ_REQUEST)
   2047          1.163    provos 		panic("uhci_device_bulk_transfer: a request");
   2048           1.48  augustss #endif
   2049            1.1  augustss 
   2050           1.63  augustss 	len = xfer->length;
   2051          1.102  augustss 	endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2052           1.45  augustss 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2053            1.1  augustss 	sqh = upipe->u.bulk.sqh;
   2054            1.1  augustss 
   2055            1.1  augustss 	upipe->u.bulk.isread = isread;
   2056            1.1  augustss 	upipe->u.bulk.length = len;
   2057            1.1  augustss 
   2058           1.73  augustss 	err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
   2059           1.73  augustss 				   &xfer->dmabuf, &data, &dataend);
   2060           1.63  augustss 	if (err)
   2061           1.63  augustss 		return (err);
   2062           1.88   tsutsui 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2063  1.205.2.1.2.1     skrll 	usb_syncmem(&dataend->dma,
   2064  1.205.2.1.2.1     skrll 	    dataend->offs + offsetof(uhci_td_t, td_status),
   2065  1.205.2.1.2.1     skrll 	    sizeof(dataend->td.td_status),
   2066  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2067  1.205.2.1.2.1     skrll 
   2068            1.1  augustss 
   2069           1.59  augustss #ifdef UHCI_DEBUG
   2070           1.33  augustss 	if (uhcidebug > 8) {
   2071           1.55  augustss 		DPRINTF(("uhci_device_bulk_transfer: data(1)\n"));
   2072           1.55  augustss 		uhci_dump_tds(data);
   2073            1.1  augustss 	}
   2074            1.1  augustss #endif
   2075            1.1  augustss 
   2076            1.1  augustss 	/* Set up interrupt info. */
   2077           1.63  augustss 	ii->xfer = xfer;
   2078           1.55  augustss 	ii->stdstart = data;
   2079           1.55  augustss 	ii->stdend = dataend;
   2080            1.7  augustss #ifdef DIAGNOSTIC
   2081           1.70  augustss 	if (!ii->isdone) {
   2082           1.70  augustss 		printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii);
   2083           1.70  augustss 	}
   2084            1.7  augustss 	ii->isdone = 0;
   2085            1.7  augustss #endif
   2086            1.1  augustss 
   2087           1.55  augustss 	sqh->elink = data;
   2088          1.121  augustss 	sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2089  1.205.2.1.2.1     skrll 	/* uhci_add_bulk() will do usb_syncmem(sqh) */
   2090            1.1  augustss 
   2091            1.1  augustss 	s = splusb();
   2092            1.1  augustss 	uhci_add_bulk(sc, sqh);
   2093           1.92  augustss 	uhci_add_intr_info(sc, ii);
   2094            1.1  augustss 
   2095           1.63  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   2096          1.171   tsutsui 		usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
   2097           1.91  augustss 			    uhci_timeout, ii);
   2098           1.13  augustss 	}
   2099           1.92  augustss 	xfer->status = USBD_IN_PROGRESS;
   2100            1.1  augustss 	splx(s);
   2101            1.1  augustss 
   2102           1.59  augustss #ifdef UHCI_DEBUG
   2103            1.1  augustss 	if (uhcidebug > 10) {
   2104           1.55  augustss 		DPRINTF(("uhci_device_bulk_transfer: data(2)\n"));
   2105           1.55  augustss 		uhci_dump_tds(data);
   2106            1.1  augustss 	}
   2107            1.1  augustss #endif
   2108            1.1  augustss 
   2109           1.26  augustss 	if (sc->sc_bus.use_polling)
   2110           1.63  augustss 		uhci_waitintr(sc, xfer);
   2111           1.26  augustss 
   2112            1.1  augustss 	return (USBD_IN_PROGRESS);
   2113            1.1  augustss }
   2114            1.1  augustss 
   2115            1.1  augustss /* Abort a device bulk request. */
   2116            1.1  augustss void
   2117          1.119  augustss uhci_device_bulk_abort(usbd_xfer_handle xfer)
   2118            1.1  augustss {
   2119           1.33  augustss 	DPRINTF(("uhci_device_bulk_abort:\n"));
   2120           1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2121           1.33  augustss }
   2122           1.33  augustss 
   2123           1.92  augustss /*
   2124          1.154  augustss  * Abort a device request.
   2125          1.154  augustss  * If this routine is called at splusb() it guarantees that the request
   2126          1.154  augustss  * will be removed from the hardware scheduling and that the callback
   2127          1.154  augustss  * for it will be called with USBD_CANCELLED status.
   2128          1.154  augustss  * It's impossible to guarantee that the requested transfer will not
   2129          1.154  augustss  * have happened since the hardware runs concurrently.
   2130          1.154  augustss  * If the transaction has already happened we rely on the ordinary
   2131          1.154  augustss  * interrupt processing to process it.
   2132           1.92  augustss  */
   2133           1.33  augustss void
   2134          1.119  augustss uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
   2135           1.33  augustss {
   2136           1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2137          1.153  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2138          1.153  augustss 	uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
   2139           1.33  augustss 	uhci_soft_td_t *std;
   2140           1.92  augustss 	int s;
   2141          1.188  augustss 	int wake;
   2142           1.65  augustss 
   2143          1.106  augustss 	DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status));
   2144           1.33  augustss 
   2145          1.153  augustss 	if (sc->sc_dying) {
   2146          1.153  augustss 		/* If we're dying, just do the software part. */
   2147          1.153  augustss 		s = splusb();
   2148          1.153  augustss 		xfer->status = status;	/* make software ignore it */
   2149          1.157   tsutsui 		usb_uncallout(xfer->timeout_handle, uhci_timeout, xfer);
   2150          1.153  augustss 		usb_transfer_complete(xfer);
   2151           1.92  augustss 		splx(s);
   2152          1.194  christos 		return;
   2153           1.92  augustss 	}
   2154           1.92  augustss 
   2155          1.153  augustss 	if (xfer->device->bus->intr_context || !curproc)
   2156          1.163    provos 		panic("uhci_abort_xfer: not in process context");
   2157          1.153  augustss 
   2158          1.153  augustss 	/*
   2159          1.188  augustss 	 * If an abort is already in progress then just wait for it to
   2160          1.188  augustss 	 * complete and return.
   2161          1.188  augustss 	 */
   2162          1.188  augustss 	if (xfer->hcflags & UXFER_ABORTING) {
   2163          1.188  augustss 		DPRINTFN(2, ("uhci_abort_xfer: already aborting\n"));
   2164          1.188  augustss #ifdef DIAGNOSTIC
   2165          1.188  augustss 		if (status == USBD_TIMEOUT)
   2166          1.188  augustss 			printf("uhci_abort_xfer: TIMEOUT while aborting\n");
   2167          1.188  augustss #endif
   2168          1.188  augustss 		/* Override the status which might be USBD_TIMEOUT. */
   2169          1.188  augustss 		xfer->status = status;
   2170          1.188  augustss 		DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n"));
   2171          1.188  augustss 		xfer->hcflags |= UXFER_ABORTWAIT;
   2172          1.188  augustss 		while (xfer->hcflags & UXFER_ABORTING)
   2173          1.188  augustss 			tsleep(&xfer->hcflags, PZERO, "uhciaw", 0);
   2174          1.188  augustss 		return;
   2175          1.188  augustss 	}
   2176          1.188  augustss 	xfer->hcflags |= UXFER_ABORTING;
   2177          1.188  augustss 
   2178          1.188  augustss 	/*
   2179          1.153  augustss 	 * Step 1: Make interrupt routine and hardware ignore xfer.
   2180          1.153  augustss 	 */
   2181          1.153  augustss 	s = splusb();
   2182          1.153  augustss 	xfer->status = status;	/* make software ignore it */
   2183          1.106  augustss 	usb_uncallout(xfer->timeout_handle, uhci_timeout, ii);
   2184          1.153  augustss 	DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii));
   2185  1.205.2.1.2.1     skrll 	for (std = ii->stdstart; std != NULL; std = std->link.std) {
   2186  1.205.2.1.2.1     skrll 		usb_syncmem(&std->dma,
   2187  1.205.2.1.2.1     skrll 		    std->offs + offsetof(uhci_td_t, td_status),
   2188  1.205.2.1.2.1     skrll 		    sizeof(std->td.td_status),
   2189  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2190           1.92  augustss 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
   2191  1.205.2.1.2.1     skrll 		usb_syncmem(&std->dma,
   2192  1.205.2.1.2.1     skrll 		    std->offs + offsetof(uhci_td_t, td_status),
   2193  1.205.2.1.2.1     skrll 		    sizeof(std->td.td_status),
   2194  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2195  1.205.2.1.2.1     skrll 	}
   2196          1.153  augustss 	splx(s);
   2197           1.92  augustss 
   2198          1.162  augustss 	/*
   2199          1.153  augustss 	 * Step 2: Wait until we know hardware has finished any possible
   2200          1.153  augustss 	 * use of the xfer.  Also make sure the soft interrupt routine
   2201          1.153  augustss 	 * has run.
   2202          1.153  augustss 	 */
   2203          1.154  augustss 	usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */
   2204          1.153  augustss 	s = splusb();
   2205          1.164  augustss #ifdef USB_USE_SOFTINTR
   2206          1.153  augustss 	sc->sc_softwake = 1;
   2207          1.164  augustss #endif /* USB_USE_SOFTINTR */
   2208          1.153  augustss 	usb_schedsoftintr(&sc->sc_bus);
   2209          1.164  augustss #ifdef USB_USE_SOFTINTR
   2210          1.154  augustss 	DPRINTFN(1,("uhci_abort_xfer: tsleep\n"));
   2211          1.153  augustss 	tsleep(&sc->sc_softwake, PZERO, "uhciab", 0);
   2212          1.164  augustss #endif /* USB_USE_SOFTINTR */
   2213          1.153  augustss 	splx(s);
   2214          1.162  augustss 
   2215          1.153  augustss 	/*
   2216          1.153  augustss 	 * Step 3: Execute callback.
   2217          1.153  augustss 	 */
   2218          1.154  augustss 	DPRINTFN(1,("uhci_abort_xfer: callback\n"));
   2219           1.92  augustss 	s = splusb();
   2220          1.100  augustss #ifdef DIAGNOSTIC
   2221          1.106  augustss 	ii->isdone = 1;
   2222          1.100  augustss #endif
   2223          1.188  augustss 	wake = xfer->hcflags & UXFER_ABORTWAIT;
   2224          1.188  augustss 	xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
   2225          1.106  augustss 	usb_transfer_complete(xfer);
   2226          1.188  augustss 	if (wake)
   2227          1.188  augustss 		wakeup(&xfer->hcflags);
   2228           1.33  augustss 	splx(s);
   2229            1.1  augustss }
   2230            1.1  augustss 
   2231            1.1  augustss /* Close a device bulk pipe. */
   2232            1.1  augustss void
   2233          1.119  augustss uhci_device_bulk_close(usbd_pipe_handle pipe)
   2234            1.1  augustss {
   2235            1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2236            1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2237            1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   2238            1.1  augustss 
   2239            1.1  augustss 	uhci_free_sqh(sc, upipe->u.bulk.sqh);
   2240            1.1  augustss }
   2241            1.1  augustss 
   2242            1.1  augustss usbd_status
   2243          1.119  augustss uhci_device_ctrl_transfer(usbd_xfer_handle xfer)
   2244            1.1  augustss {
   2245           1.63  augustss 	usbd_status err;
   2246           1.16  augustss 
   2247           1.52  augustss 	/* Insert last in queue. */
   2248           1.63  augustss 	err = usb_insert_transfer(xfer);
   2249           1.63  augustss 	if (err)
   2250           1.63  augustss 		return (err);
   2251           1.52  augustss 
   2252          1.152  augustss 	/*
   2253           1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2254           1.92  augustss 	 * so start it first.
   2255           1.67  augustss 	 */
   2256           1.63  augustss 	return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2257           1.16  augustss }
   2258           1.16  augustss 
   2259           1.16  augustss usbd_status
   2260          1.119  augustss uhci_device_ctrl_start(usbd_xfer_handle xfer)
   2261           1.16  augustss {
   2262           1.63  augustss 	uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
   2263           1.63  augustss 	usbd_status err;
   2264            1.1  augustss 
   2265           1.82  augustss 	if (sc->sc_dying)
   2266           1.82  augustss 		return (USBD_IOERROR);
   2267           1.82  augustss 
   2268           1.48  augustss #ifdef DIAGNOSTIC
   2269           1.63  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   2270          1.163    provos 		panic("uhci_device_ctrl_transfer: not a request");
   2271           1.48  augustss #endif
   2272            1.1  augustss 
   2273           1.63  augustss 	err = uhci_device_request(xfer);
   2274           1.63  augustss 	if (err)
   2275           1.63  augustss 		return (err);
   2276            1.1  augustss 
   2277            1.9  augustss 	if (sc->sc_bus.use_polling)
   2278           1.63  augustss 		uhci_waitintr(sc, xfer);
   2279            1.1  augustss 	return (USBD_IN_PROGRESS);
   2280            1.1  augustss }
   2281            1.1  augustss 
   2282            1.1  augustss usbd_status
   2283          1.119  augustss uhci_device_intr_transfer(usbd_xfer_handle xfer)
   2284            1.1  augustss {
   2285           1.63  augustss 	usbd_status err;
   2286           1.16  augustss 
   2287           1.52  augustss 	/* Insert last in queue. */
   2288           1.63  augustss 	err = usb_insert_transfer(xfer);
   2289           1.63  augustss 	if (err)
   2290           1.63  augustss 		return (err);
   2291           1.52  augustss 
   2292          1.152  augustss 	/*
   2293           1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2294           1.92  augustss 	 * so start it first.
   2295           1.67  augustss 	 */
   2296           1.63  augustss 	return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2297           1.16  augustss }
   2298           1.16  augustss 
   2299           1.16  augustss usbd_status
   2300          1.119  augustss uhci_device_intr_start(usbd_xfer_handle xfer)
   2301           1.16  augustss {
   2302           1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2303            1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2304            1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   2305           1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2306           1.55  augustss 	uhci_soft_td_t *data, *dataend;
   2307            1.1  augustss 	uhci_soft_qh_t *sqh;
   2308           1.63  augustss 	usbd_status err;
   2309          1.187     skrll 	int isread, endpt;
   2310           1.49  augustss 	int i, s;
   2311            1.1  augustss 
   2312           1.82  augustss 	if (sc->sc_dying)
   2313           1.82  augustss 		return (USBD_IOERROR);
   2314           1.82  augustss 
   2315           1.63  augustss 	DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n",
   2316           1.63  augustss 		    xfer, xfer->length, xfer->flags));
   2317            1.1  augustss 
   2318           1.48  augustss #ifdef DIAGNOSTIC
   2319           1.63  augustss 	if (xfer->rqflags & URQ_REQUEST)
   2320          1.163    provos 		panic("uhci_device_intr_transfer: a request");
   2321           1.48  augustss #endif
   2322            1.1  augustss 
   2323          1.187     skrll 	endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2324          1.187     skrll 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2325          1.187     skrll 
   2326          1.187     skrll 	upipe->u.intr.isread = isread;
   2327          1.187     skrll 
   2328          1.187     skrll 	err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread,
   2329          1.187     skrll 				   xfer->flags, &xfer->dmabuf, &data,
   2330          1.187     skrll 				   &dataend);
   2331           1.63  augustss 	if (err)
   2332           1.63  augustss 		return (err);
   2333           1.88   tsutsui 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2334  1.205.2.1.2.1     skrll 	usb_syncmem(&dataend->dma,
   2335  1.205.2.1.2.1     skrll 	    dataend->offs + offsetof(uhci_td_t, td_status),
   2336  1.205.2.1.2.1     skrll 	    sizeof(dataend->td.td_status),
   2337  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2338            1.1  augustss 
   2339           1.59  augustss #ifdef UHCI_DEBUG
   2340            1.1  augustss 	if (uhcidebug > 10) {
   2341           1.55  augustss 		DPRINTF(("uhci_device_intr_transfer: data(1)\n"));
   2342           1.55  augustss 		uhci_dump_tds(data);
   2343            1.1  augustss 		uhci_dump_qh(upipe->u.intr.qhs[0]);
   2344            1.1  augustss 	}
   2345            1.1  augustss #endif
   2346            1.1  augustss 
   2347            1.1  augustss 	s = splusb();
   2348            1.1  augustss 	/* Set up interrupt info. */
   2349           1.63  augustss 	ii->xfer = xfer;
   2350           1.55  augustss 	ii->stdstart = data;
   2351           1.55  augustss 	ii->stdend = dataend;
   2352            1.7  augustss #ifdef DIAGNOSTIC
   2353           1.70  augustss 	if (!ii->isdone) {
   2354           1.70  augustss 		printf("uhci_device_intr_transfer: not done, ii=%p\n", ii);
   2355           1.70  augustss 	}
   2356            1.7  augustss 	ii->isdone = 0;
   2357            1.7  augustss #endif
   2358            1.1  augustss 
   2359          1.152  augustss 	DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
   2360           1.12  augustss 		     upipe->u.intr.qhs[0]));
   2361            1.1  augustss 	for (i = 0; i < upipe->u.intr.npoll; i++) {
   2362            1.1  augustss 		sqh = upipe->u.intr.qhs[i];
   2363           1.55  augustss 		sqh->elink = data;
   2364          1.121  augustss 		sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2365  1.205.2.1.2.1     skrll 		usb_syncmem(&sqh->dma,
   2366  1.205.2.1.2.1     skrll 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   2367  1.205.2.1.2.1     skrll 		    sizeof(sqh->qh.qh_elink),
   2368  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2369            1.1  augustss 	}
   2370           1.92  augustss 	uhci_add_intr_info(sc, ii);
   2371           1.92  augustss 	xfer->status = USBD_IN_PROGRESS;
   2372            1.1  augustss 	splx(s);
   2373            1.1  augustss 
   2374           1.59  augustss #ifdef UHCI_DEBUG
   2375            1.1  augustss 	if (uhcidebug > 10) {
   2376           1.55  augustss 		DPRINTF(("uhci_device_intr_transfer: data(2)\n"));
   2377           1.55  augustss 		uhci_dump_tds(data);
   2378            1.1  augustss 		uhci_dump_qh(upipe->u.intr.qhs[0]);
   2379            1.1  augustss 	}
   2380            1.1  augustss #endif
   2381            1.1  augustss 
   2382            1.1  augustss 	return (USBD_IN_PROGRESS);
   2383            1.1  augustss }
   2384            1.1  augustss 
   2385            1.1  augustss /* Abort a device control request. */
   2386            1.1  augustss void
   2387          1.119  augustss uhci_device_ctrl_abort(usbd_xfer_handle xfer)
   2388            1.1  augustss {
   2389           1.33  augustss 	DPRINTF(("uhci_device_ctrl_abort:\n"));
   2390           1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2391            1.1  augustss }
   2392            1.1  augustss 
   2393            1.1  augustss /* Close a device control pipe. */
   2394            1.1  augustss void
   2395          1.205  christos uhci_device_ctrl_close(usbd_pipe_handle pipe)
   2396            1.1  augustss {
   2397            1.1  augustss }
   2398            1.1  augustss 
   2399            1.1  augustss /* Abort a device interrupt request. */
   2400            1.1  augustss void
   2401          1.119  augustss uhci_device_intr_abort(usbd_xfer_handle xfer)
   2402            1.1  augustss {
   2403           1.63  augustss 	DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer));
   2404           1.63  augustss 	if (xfer->pipe->intrxfer == xfer) {
   2405           1.36  augustss 		DPRINTFN(1,("uhci_device_intr_abort: remove\n"));
   2406          1.154  augustss 		xfer->pipe->intrxfer = NULL;
   2407            1.1  augustss 	}
   2408           1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2409            1.1  augustss }
   2410            1.1  augustss 
   2411            1.1  augustss /* Close a device interrupt pipe. */
   2412            1.1  augustss void
   2413          1.119  augustss uhci_device_intr_close(usbd_pipe_handle pipe)
   2414            1.1  augustss {
   2415            1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2416            1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
   2417           1.92  augustss 	int i, npoll;
   2418           1.92  augustss 	int s;
   2419            1.1  augustss 
   2420            1.1  augustss 	/* Unlink descriptors from controller data structures. */
   2421            1.1  augustss 	npoll = upipe->u.intr.npoll;
   2422           1.92  augustss 	s = splusb();
   2423            1.1  augustss 	for (i = 0; i < npoll; i++)
   2424           1.92  augustss 		uhci_remove_intr(sc, upipe->u.intr.qhs[i]);
   2425           1.92  augustss 	splx(s);
   2426            1.1  augustss 
   2427          1.152  augustss 	/*
   2428            1.1  augustss 	 * We now have to wait for any activity on the physical
   2429            1.1  augustss 	 * descriptors to stop.
   2430            1.1  augustss 	 */
   2431           1.20  augustss 	usb_delay_ms(&sc->sc_bus, 2);
   2432            1.1  augustss 
   2433            1.1  augustss 	for(i = 0; i < npoll; i++)
   2434            1.1  augustss 		uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
   2435           1.31  augustss 	free(upipe->u.intr.qhs, M_USBHC);
   2436            1.1  augustss 
   2437            1.1  augustss 	/* XXX free other resources */
   2438            1.1  augustss }
   2439            1.1  augustss 
   2440            1.1  augustss usbd_status
   2441          1.119  augustss uhci_device_request(usbd_xfer_handle xfer)
   2442            1.1  augustss {
   2443           1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2444           1.63  augustss 	usb_device_request_t *req = &xfer->request;
   2445            1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2446            1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   2447            1.1  augustss 	int addr = dev->address;
   2448            1.1  augustss 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2449           1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2450           1.55  augustss 	uhci_soft_td_t *setup, *data, *stat, *next, *dataend;
   2451            1.1  augustss 	uhci_soft_qh_t *sqh;
   2452            1.1  augustss 	int len;
   2453            1.1  augustss 	u_int32_t ls;
   2454           1.63  augustss 	usbd_status err;
   2455            1.1  augustss 	int isread;
   2456            1.1  augustss 	int s;
   2457            1.1  augustss 
   2458           1.13  augustss 	DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
   2459           1.12  augustss 		    "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
   2460            1.1  augustss 		    req->bmRequestType, req->bRequest, UGETW(req->wValue),
   2461            1.1  augustss 		    UGETW(req->wIndex), UGETW(req->wLength),
   2462            1.1  augustss 		    addr, endpt));
   2463            1.1  augustss 
   2464          1.144  augustss 	ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0;
   2465            1.1  augustss 	isread = req->bmRequestType & UT_READ;
   2466            1.1  augustss 	len = UGETW(req->wLength);
   2467            1.1  augustss 
   2468            1.1  augustss 	setup = upipe->u.ctl.setup;
   2469            1.1  augustss 	stat = upipe->u.ctl.stat;
   2470            1.1  augustss 	sqh = upipe->u.ctl.sqh;
   2471            1.1  augustss 
   2472            1.1  augustss 	/* Set up data transaction */
   2473            1.1  augustss 	if (len != 0) {
   2474           1.38  augustss 		upipe->nexttoggle = 1;
   2475           1.73  augustss 		err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
   2476           1.73  augustss 					   &xfer->dmabuf, &data, &dataend);
   2477           1.63  augustss 		if (err)
   2478           1.63  augustss 			return (err);
   2479           1.55  augustss 		next = data;
   2480           1.55  augustss 		dataend->link.std = stat;
   2481          1.121  augustss 		dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
   2482  1.205.2.1.2.1     skrll 		usb_syncmem(&dataend->dma,
   2483  1.205.2.1.2.1     skrll 		    dataend->offs + offsetof(uhci_td_t, td_link),
   2484  1.205.2.1.2.1     skrll 		    sizeof(dataend->td.td_link),
   2485  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2486            1.1  augustss 	} else {
   2487            1.1  augustss 		next = stat;
   2488            1.1  augustss 	}
   2489            1.1  augustss 	upipe->u.ctl.length = len;
   2490            1.1  augustss 
   2491          1.159  augustss 	memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req);
   2492  1.205.2.1.2.1     skrll 	usb_syncmem(&upipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE);
   2493            1.1  augustss 
   2494           1.42  augustss 	setup->link.std = next;
   2495          1.121  augustss 	setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
   2496           1.88   tsutsui 	setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
   2497           1.88   tsutsui 		UHCI_TD_ACTIVE);
   2498           1.88   tsutsui 	setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr));
   2499          1.160  augustss 	setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0));
   2500  1.205.2.1.2.1     skrll 	usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td),
   2501  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2502           1.42  augustss 
   2503           1.92  augustss 	stat->link.std = NULL;
   2504           1.88   tsutsui 	stat->td.td_link = htole32(UHCI_PTR_T);
   2505          1.152  augustss 	stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
   2506           1.39  augustss 		UHCI_TD_ACTIVE | UHCI_TD_IOC);
   2507          1.152  augustss 	stat->td.td_token =
   2508           1.88   tsutsui 		htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
   2509           1.88   tsutsui 		                 UHCI_TD_IN (0, endpt, addr, 1));
   2510           1.88   tsutsui 	stat->td.td_buffer = htole32(0);
   2511  1.205.2.1.2.1     skrll 	usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td),
   2512  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2513            1.1  augustss 
   2514           1.59  augustss #ifdef UHCI_DEBUG
   2515           1.67  augustss 	if (uhcidebug > 10) {
   2516           1.47  augustss 		DPRINTF(("uhci_device_request: before transfer\n"));
   2517           1.41  augustss 		uhci_dump_tds(setup);
   2518            1.1  augustss 	}
   2519            1.1  augustss #endif
   2520            1.1  augustss 
   2521            1.1  augustss 	/* Set up interrupt info. */
   2522           1.63  augustss 	ii->xfer = xfer;
   2523            1.1  augustss 	ii->stdstart = setup;
   2524            1.1  augustss 	ii->stdend = stat;
   2525            1.7  augustss #ifdef DIAGNOSTIC
   2526           1.70  augustss 	if (!ii->isdone) {
   2527           1.70  augustss 		printf("uhci_device_request: not done, ii=%p\n", ii);
   2528           1.70  augustss 	}
   2529            1.7  augustss 	ii->isdone = 0;
   2530            1.7  augustss #endif
   2531            1.1  augustss 
   2532           1.42  augustss 	sqh->elink = setup;
   2533          1.121  augustss 	sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD);
   2534  1.205.2.1.2.1     skrll 	/* uhci_add_?s_ctrl() will do usb_syncmem(sqh) */
   2535            1.1  augustss 
   2536            1.1  augustss 	s = splusb();
   2537          1.144  augustss 	if (dev->speed == USB_SPEED_LOW)
   2538          1.123  augustss 		uhci_add_ls_ctrl(sc, sqh);
   2539          1.123  augustss 	else
   2540          1.123  augustss 		uhci_add_hs_ctrl(sc, sqh);
   2541           1.92  augustss 	uhci_add_intr_info(sc, ii);
   2542           1.59  augustss #ifdef UHCI_DEBUG
   2543            1.1  augustss 	if (uhcidebug > 12) {
   2544            1.1  augustss 		uhci_soft_td_t *std;
   2545            1.1  augustss 		uhci_soft_qh_t *xqh;
   2546           1.13  augustss 		uhci_soft_qh_t *sxqh;
   2547           1.13  augustss 		int maxqh = 0;
   2548            1.1  augustss 		uhci_physaddr_t link;
   2549           1.47  augustss 		DPRINTF(("uhci_enter_ctl_q: follow from [0]\n"));
   2550            1.1  augustss 		for (std = sc->sc_vframes[0].htd, link = 0;
   2551          1.121  augustss 		     (link & UHCI_PTR_QH) == 0;
   2552           1.42  augustss 		     std = std->link.std) {
   2553           1.88   tsutsui 			link = le32toh(std->td.td_link);
   2554            1.1  augustss 			uhci_dump_td(std);
   2555            1.1  augustss 		}
   2556           1.67  augustss 		sxqh = (uhci_soft_qh_t *)std;
   2557           1.67  augustss 		uhci_dump_qh(sxqh);
   2558           1.67  augustss 		for (xqh = sxqh;
   2559           1.63  augustss 		     xqh != NULL;
   2560          1.152  augustss 		     xqh = (maxqh++ == 5 || xqh->hlink == sxqh ||
   2561          1.121  augustss                             xqh->hlink == xqh ? NULL : xqh->hlink)) {
   2562            1.1  augustss 			uhci_dump_qh(xqh);
   2563           1.13  augustss 		}
   2564           1.47  augustss 		DPRINTF(("Enqueued QH:\n"));
   2565            1.1  augustss 		uhci_dump_qh(sqh);
   2566           1.42  augustss 		uhci_dump_tds(sqh->elink);
   2567            1.1  augustss 	}
   2568            1.1  augustss #endif
   2569           1.63  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   2570          1.171   tsutsui 		usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
   2571           1.91  augustss 			    uhci_timeout, ii);
   2572           1.13  augustss 	}
   2573           1.92  augustss 	xfer->status = USBD_IN_PROGRESS;
   2574            1.1  augustss 	splx(s);
   2575            1.1  augustss 
   2576            1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   2577            1.1  augustss }
   2578            1.1  augustss 
   2579           1.16  augustss usbd_status
   2580          1.119  augustss uhci_device_isoc_transfer(usbd_xfer_handle xfer)
   2581           1.16  augustss {
   2582           1.63  augustss 	usbd_status err;
   2583           1.48  augustss 
   2584           1.63  augustss 	DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer));
   2585           1.48  augustss 
   2586           1.48  augustss 	/* Put it on our queue, */
   2587           1.63  augustss 	err = usb_insert_transfer(xfer);
   2588           1.48  augustss 
   2589           1.48  augustss 	/* bail out on error, */
   2590           1.63  augustss 	if (err && err != USBD_IN_PROGRESS)
   2591           1.63  augustss 		return (err);
   2592           1.48  augustss 
   2593           1.48  augustss 	/* XXX should check inuse here */
   2594           1.48  augustss 
   2595           1.48  augustss 	/* insert into schedule, */
   2596           1.63  augustss 	uhci_device_isoc_enter(xfer);
   2597           1.48  augustss 
   2598          1.102  augustss 	/* and start if the pipe wasn't running */
   2599           1.67  augustss 	if (!err)
   2600           1.63  augustss 		uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
   2601           1.48  augustss 
   2602           1.63  augustss 	return (err);
   2603           1.48  augustss }
   2604           1.48  augustss 
   2605           1.48  augustss void
   2606          1.119  augustss uhci_device_isoc_enter(usbd_xfer_handle xfer)
   2607           1.48  augustss {
   2608           1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2609           1.16  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2610           1.16  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   2611           1.48  augustss 	struct iso *iso = &upipe->u.iso;
   2612          1.152  augustss 	uhci_soft_td_t *std;
   2613  1.205.2.1.2.1     skrll 	u_int32_t buf, len, status, offs;
   2614           1.48  augustss 	int s, i, next, nframes;
   2615  1.205.2.1.2.1     skrll 	int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN;
   2616           1.48  augustss 
   2617           1.63  augustss 	DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p "
   2618           1.48  augustss 		    "nframes=%d\n",
   2619           1.63  augustss 		    iso->inuse, iso->next, xfer, xfer->nframes));
   2620           1.48  augustss 
   2621           1.82  augustss 	if (sc->sc_dying)
   2622           1.82  augustss 		return;
   2623           1.82  augustss 
   2624           1.63  augustss 	if (xfer->status == USBD_IN_PROGRESS) {
   2625           1.48  augustss 		/* This request has already been entered into the frame list */
   2626           1.96  augustss 		printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer);
   2627           1.68  augustss 		/* XXX */
   2628           1.48  augustss 	}
   2629           1.48  augustss 
   2630           1.48  augustss #ifdef DIAGNOSTIC
   2631           1.48  augustss 	if (iso->inuse >= UHCI_VFRAMELIST_COUNT)
   2632           1.48  augustss 		printf("uhci_device_isoc_enter: overflow!\n");
   2633           1.19  augustss #endif
   2634           1.16  augustss 
   2635           1.48  augustss 	next = iso->next;
   2636           1.48  augustss 	if (next == -1) {
   2637           1.48  augustss 		/* Not in use yet, schedule it a few frames ahead. */
   2638           1.48  augustss 		next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
   2639           1.48  augustss 		DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next));
   2640           1.48  augustss 	}
   2641           1.48  augustss 
   2642           1.63  augustss 	xfer->status = USBD_IN_PROGRESS;
   2643           1.92  augustss 	UXFER(xfer)->curframe = next;
   2644           1.48  augustss 
   2645          1.160  augustss 	buf = DMAADDR(&xfer->dmabuf, 0);
   2646  1.205.2.1.2.1     skrll 	offs = 0;
   2647           1.88   tsutsui 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |
   2648           1.88   tsutsui 				     UHCI_TD_ACTIVE |
   2649           1.88   tsutsui 				     UHCI_TD_IOS);
   2650           1.63  augustss 	nframes = xfer->nframes;
   2651           1.48  augustss 	s = splusb();
   2652           1.48  augustss 	for (i = 0; i < nframes; i++) {
   2653           1.48  augustss 		std = iso->stds[next];
   2654           1.48  augustss 		if (++next >= UHCI_VFRAMELIST_COUNT)
   2655           1.48  augustss 			next = 0;
   2656           1.63  augustss 		len = xfer->frlengths[i];
   2657           1.88   tsutsui 		std->td.td_buffer = htole32(buf);
   2658  1.205.2.1.2.1     skrll 		usb_syncmem(&xfer->dmabuf, offs, len,
   2659  1.205.2.1.2.1     skrll 		    rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   2660           1.48  augustss 		if (i == nframes - 1)
   2661           1.88   tsutsui 			status |= UHCI_TD_IOC;
   2662           1.88   tsutsui 		std->td.td_status = htole32(status);
   2663           1.88   tsutsui 		std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK);
   2664           1.88   tsutsui 		std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len));
   2665  1.205.2.1.2.1     skrll 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   2666  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2667           1.59  augustss #ifdef UHCI_DEBUG
   2668           1.48  augustss 		if (uhcidebug > 5) {
   2669           1.48  augustss 			DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i));
   2670           1.48  augustss 			uhci_dump_td(std);
   2671           1.48  augustss 		}
   2672           1.48  augustss #endif
   2673           1.48  augustss 		buf += len;
   2674  1.205.2.1.2.1     skrll 		offs += len;
   2675           1.48  augustss 	}
   2676           1.48  augustss 	iso->next = next;
   2677           1.63  augustss 	iso->inuse += xfer->nframes;
   2678           1.16  augustss 
   2679           1.48  augustss 	splx(s);
   2680           1.16  augustss }
   2681           1.16  augustss 
   2682           1.16  augustss usbd_status
   2683          1.119  augustss uhci_device_isoc_start(usbd_xfer_handle xfer)
   2684           1.16  augustss {
   2685           1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2686           1.48  augustss 	uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
   2687           1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2688           1.48  augustss 	uhci_soft_td_t *end;
   2689           1.48  augustss 	int s, i;
   2690           1.48  augustss 
   2691           1.96  augustss 	DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer));
   2692           1.96  augustss 
   2693           1.82  augustss 	if (sc->sc_dying)
   2694           1.82  augustss 		return (USBD_IOERROR);
   2695           1.82  augustss 
   2696           1.48  augustss #ifdef DIAGNOSTIC
   2697           1.63  augustss 	if (xfer->status != USBD_IN_PROGRESS)
   2698           1.63  augustss 		printf("uhci_device_isoc_start: not in progress %p\n", xfer);
   2699           1.48  augustss #endif
   2700           1.48  augustss 
   2701           1.48  augustss 	/* Find the last TD */
   2702           1.92  augustss 	i = UXFER(xfer)->curframe + xfer->nframes;
   2703           1.48  augustss 	if (i >= UHCI_VFRAMELIST_COUNT)
   2704           1.48  augustss 		i -= UHCI_VFRAMELIST_COUNT;
   2705           1.48  augustss 	end = upipe->u.iso.stds[i];
   2706           1.48  augustss 
   2707           1.96  augustss #ifdef DIAGNOSTIC
   2708           1.96  augustss 	if (end == NULL) {
   2709           1.96  augustss 		printf("uhci_device_isoc_start: end == NULL\n");
   2710           1.96  augustss 		return (USBD_INVAL);
   2711           1.96  augustss 	}
   2712           1.96  augustss #endif
   2713           1.96  augustss 
   2714           1.48  augustss 	s = splusb();
   2715          1.152  augustss 
   2716           1.48  augustss 	/* Set up interrupt info. */
   2717           1.63  augustss 	ii->xfer = xfer;
   2718           1.48  augustss 	ii->stdstart = end;
   2719           1.48  augustss 	ii->stdend = end;
   2720           1.48  augustss #ifdef DIAGNOSTIC
   2721          1.102  augustss 	if (!ii->isdone)
   2722           1.70  augustss 		printf("uhci_device_isoc_start: not done, ii=%p\n", ii);
   2723           1.48  augustss 	ii->isdone = 0;
   2724           1.48  augustss #endif
   2725           1.92  augustss 	uhci_add_intr_info(sc, ii);
   2726          1.152  augustss 
   2727           1.48  augustss 	splx(s);
   2728           1.48  augustss 
   2729           1.48  augustss 	return (USBD_IN_PROGRESS);
   2730           1.16  augustss }
   2731           1.16  augustss 
   2732           1.16  augustss void
   2733          1.119  augustss uhci_device_isoc_abort(usbd_xfer_handle xfer)
   2734           1.16  augustss {
   2735           1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2736           1.48  augustss 	uhci_soft_td_t **stds = upipe->u.iso.stds;
   2737           1.48  augustss 	uhci_soft_td_t *std;
   2738           1.92  augustss 	int i, n, s, nframes, maxlen, len;
   2739           1.92  augustss 
   2740           1.92  augustss 	s = splusb();
   2741           1.92  augustss 
   2742           1.92  augustss 	/* Transfer is already done. */
   2743          1.152  augustss 	if (xfer->status != USBD_NOT_STARTED &&
   2744           1.92  augustss 	    xfer->status != USBD_IN_PROGRESS) {
   2745           1.92  augustss 		splx(s);
   2746           1.92  augustss 		return;
   2747           1.92  augustss 	}
   2748           1.48  augustss 
   2749           1.92  augustss 	/* Give xfer the requested abort code. */
   2750           1.63  augustss 	xfer->status = USBD_CANCELLED;
   2751           1.48  augustss 
   2752           1.48  augustss 	/* make hardware ignore it, */
   2753           1.63  augustss 	nframes = xfer->nframes;
   2754           1.92  augustss 	n = UXFER(xfer)->curframe;
   2755           1.92  augustss 	maxlen = 0;
   2756           1.48  augustss 	for (i = 0; i < nframes; i++) {
   2757           1.48  augustss 		std = stds[n];
   2758  1.205.2.1.2.1     skrll 		usb_syncmem(&std->dma,
   2759  1.205.2.1.2.1     skrll 		    std->offs + offsetof(uhci_td_t, td_status),
   2760  1.205.2.1.2.1     skrll 		    sizeof(std->td.td_status),
   2761  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2762           1.88   tsutsui 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
   2763  1.205.2.1.2.1     skrll 		usb_syncmem(&std->dma,
   2764  1.205.2.1.2.1     skrll 		    std->offs + offsetof(uhci_td_t, td_status),
   2765  1.205.2.1.2.1     skrll 		    sizeof(std->td.td_status),
   2766  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2767  1.205.2.1.2.1     skrll 		usb_syncmem(&std->dma,
   2768  1.205.2.1.2.1     skrll 		    std->offs + offsetof(uhci_td_t, td_token),
   2769  1.205.2.1.2.1     skrll 		    sizeof(std->td.td_token),
   2770  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_POSTWRITE);
   2771          1.130   tsutsui 		len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token));
   2772           1.92  augustss 		if (len > maxlen)
   2773           1.92  augustss 			maxlen = len;
   2774           1.48  augustss 		if (++n >= UHCI_VFRAMELIST_COUNT)
   2775           1.48  augustss 			n = 0;
   2776           1.48  augustss 	}
   2777           1.48  augustss 
   2778           1.92  augustss 	/* and wait until we are sure the hardware has finished. */
   2779           1.92  augustss 	delay(maxlen);
   2780           1.92  augustss 
   2781           1.96  augustss #ifdef DIAGNOSTIC
   2782           1.96  augustss 	UXFER(xfer)->iinfo.isdone = 1;
   2783           1.96  augustss #endif
   2784           1.92  augustss 	/* Run callback and remove from interrupt list. */
   2785           1.92  augustss 	usb_transfer_complete(xfer);
   2786           1.48  augustss 
   2787           1.92  augustss 	splx(s);
   2788           1.16  augustss }
   2789           1.16  augustss 
   2790           1.16  augustss void
   2791          1.119  augustss uhci_device_isoc_close(usbd_pipe_handle pipe)
   2792           1.16  augustss {
   2793           1.16  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2794           1.16  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2795           1.16  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   2796           1.48  augustss 	uhci_soft_td_t *std, *vstd;
   2797           1.16  augustss 	struct iso *iso;
   2798           1.92  augustss 	int i, s;
   2799           1.16  augustss 
   2800           1.16  augustss 	/*
   2801           1.16  augustss 	 * Make sure all TDs are marked as inactive.
   2802           1.16  augustss 	 * Wait for completion.
   2803           1.16  augustss 	 * Unschedule.
   2804           1.16  augustss 	 * Deallocate.
   2805           1.16  augustss 	 */
   2806           1.16  augustss 	iso = &upipe->u.iso;
   2807           1.16  augustss 
   2808  1.205.2.1.2.1     skrll 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2809  1.205.2.1.2.1     skrll 		std = iso->stds[i];
   2810  1.205.2.1.2.1     skrll 		usb_syncmem(&std->dma,
   2811  1.205.2.1.2.1     skrll 		    std->offs + offsetof(uhci_td_t, td_status),
   2812  1.205.2.1.2.1     skrll 		    sizeof(std->td.td_status),
   2813  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2814  1.205.2.1.2.1     skrll 		std->td.td_status &= htole32(~UHCI_TD_ACTIVE);
   2815  1.205.2.1.2.1     skrll 		usb_syncmem(&std->dma,
   2816  1.205.2.1.2.1     skrll 		    std->offs + offsetof(uhci_td_t, td_status),
   2817  1.205.2.1.2.1     skrll 		    sizeof(std->td.td_status),
   2818  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2819  1.205.2.1.2.1     skrll 	}
   2820           1.20  augustss 	usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */
   2821           1.16  augustss 
   2822           1.92  augustss 	s = splusb();
   2823           1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2824           1.16  augustss 		std = iso->stds[i];
   2825           1.48  augustss 		for (vstd = sc->sc_vframes[i].htd;
   2826           1.67  augustss 		     vstd != NULL && vstd->link.std != std;
   2827           1.42  augustss 		     vstd = vstd->link.std)
   2828           1.16  augustss 			;
   2829           1.67  augustss 		if (vstd == NULL) {
   2830           1.16  augustss 			/*panic*/
   2831           1.16  augustss 			printf("uhci_device_isoc_close: %p not found\n", std);
   2832           1.92  augustss 			splx(s);
   2833           1.16  augustss 			return;
   2834           1.16  augustss 		}
   2835           1.42  augustss 		vstd->link = std->link;
   2836  1.205.2.1.2.1     skrll 		usb_syncmem(&std->dma,
   2837  1.205.2.1.2.1     skrll 		    std->offs + offsetof(uhci_td_t, td_link),
   2838  1.205.2.1.2.1     skrll 		    sizeof(std->td.td_link),
   2839  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_POSTWRITE);
   2840           1.42  augustss 		vstd->td.td_link = std->td.td_link;
   2841  1.205.2.1.2.1     skrll 		usb_syncmem(&vstd->dma,
   2842  1.205.2.1.2.1     skrll 		    vstd->offs + offsetof(uhci_td_t, td_link),
   2843  1.205.2.1.2.1     skrll 		    sizeof(vstd->td.td_link),
   2844  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_PREWRITE);
   2845           1.16  augustss 		uhci_free_std(sc, std);
   2846           1.16  augustss 	}
   2847           1.92  augustss 	splx(s);
   2848           1.16  augustss 
   2849           1.31  augustss 	free(iso->stds, M_USBHC);
   2850           1.16  augustss }
   2851           1.16  augustss 
   2852           1.16  augustss usbd_status
   2853          1.119  augustss uhci_setup_isoc(usbd_pipe_handle pipe)
   2854           1.16  augustss {
   2855           1.16  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2856           1.16  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2857           1.16  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   2858           1.16  augustss 	int addr = upipe->pipe.device->address;
   2859           1.16  augustss 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2860           1.45  augustss 	int rd = UE_GET_DIR(endpt) == UE_DIR_IN;
   2861           1.48  augustss 	uhci_soft_td_t *std, *vstd;
   2862           1.48  augustss 	u_int32_t token;
   2863           1.16  augustss 	struct iso *iso;
   2864           1.92  augustss 	int i, s;
   2865           1.16  augustss 
   2866           1.16  augustss 	iso = &upipe->u.iso;
   2867           1.16  augustss 	iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *),
   2868           1.31  augustss 			   M_USBHC, M_WAITOK);
   2869           1.16  augustss 
   2870           1.88   tsutsui 	token = rd ? UHCI_TD_IN (0, endpt, addr, 0) :
   2871           1.88   tsutsui 		     UHCI_TD_OUT(0, endpt, addr, 0);
   2872           1.16  augustss 
   2873           1.48  augustss 	/* Allocate the TDs and mark as inactive; */
   2874           1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2875           1.48  augustss 		std = uhci_alloc_std(sc);
   2876           1.48  augustss 		if (std == 0)
   2877           1.48  augustss 			goto bad;
   2878           1.88   tsutsui 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
   2879           1.88   tsutsui 		std->td.td_token = htole32(token);
   2880  1.205.2.1.2.1     skrll 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   2881  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2882           1.48  augustss 		iso->stds[i] = std;
   2883           1.16  augustss 	}
   2884           1.16  augustss 
   2885           1.48  augustss 	/* Insert TDs into schedule. */
   2886           1.92  augustss 	s = splusb();
   2887           1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2888           1.16  augustss 		std = iso->stds[i];
   2889           1.48  augustss 		vstd = sc->sc_vframes[i].htd;
   2890  1.205.2.1.2.1     skrll 		usb_syncmem(&vstd->dma,
   2891  1.205.2.1.2.1     skrll 		    vstd->offs + offsetof(uhci_td_t, td_link),
   2892  1.205.2.1.2.1     skrll 		    sizeof(vstd->td.td_link),
   2893  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_POSTWRITE);
   2894           1.42  augustss 		std->link = vstd->link;
   2895           1.42  augustss 		std->td.td_link = vstd->td.td_link;
   2896  1.205.2.1.2.1     skrll 		usb_syncmem(&std->dma,
   2897  1.205.2.1.2.1     skrll 		    std->offs + offsetof(uhci_td_t, td_link),
   2898  1.205.2.1.2.1     skrll 		    sizeof(std->td.td_link),
   2899  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_PREWRITE);
   2900           1.42  augustss 		vstd->link.std = std;
   2901          1.121  augustss 		vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD);
   2902  1.205.2.1.2.1     skrll 		usb_syncmem(&vstd->dma,
   2903  1.205.2.1.2.1     skrll 		    vstd->offs + offsetof(uhci_td_t, td_link),
   2904  1.205.2.1.2.1     skrll 		    sizeof(vstd->td.td_link),
   2905  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_PREWRITE);
   2906           1.16  augustss 	}
   2907           1.92  augustss 	splx(s);
   2908           1.16  augustss 
   2909           1.48  augustss 	iso->next = -1;
   2910           1.48  augustss 	iso->inuse = 0;
   2911           1.48  augustss 
   2912           1.16  augustss 	return (USBD_NORMAL_COMPLETION);
   2913           1.16  augustss 
   2914           1.48  augustss  bad:
   2915           1.16  augustss 	while (--i >= 0)
   2916           1.16  augustss 		uhci_free_std(sc, iso->stds[i]);
   2917           1.31  augustss 	free(iso->stds, M_USBHC);
   2918           1.16  augustss 	return (USBD_NOMEM);
   2919           1.16  augustss }
   2920           1.16  augustss 
   2921           1.16  augustss void
   2922          1.119  augustss uhci_device_isoc_done(usbd_xfer_handle xfer)
   2923           1.16  augustss {
   2924           1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2925  1.205.2.1.2.1     skrll 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2926  1.205.2.1.2.1     skrll 	int i, offs;
   2927  1.205.2.1.2.1     skrll 	int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN;
   2928  1.205.2.1.2.1     skrll 
   2929           1.48  augustss 
   2930          1.197   gdamore 	DPRINTFN(4, ("uhci_isoc_done: length=%d, busy_free=0x%08x\n",
   2931          1.197   gdamore 			xfer->actlen, xfer->busy_free));
   2932           1.93  augustss 
   2933           1.96  augustss 	if (ii->xfer != xfer)
   2934           1.96  augustss 		/* Not on interrupt list, ignore it. */
   2935          1.170  augustss 		return;
   2936          1.170  augustss 
   2937          1.170  augustss 	if (!uhci_active_intr_info(ii))
   2938           1.96  augustss 		return;
   2939           1.96  augustss 
   2940           1.93  augustss #ifdef DIAGNOSTIC
   2941           1.93  augustss         if (ii->stdend == NULL) {
   2942           1.93  augustss                 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
   2943           1.93  augustss #ifdef UHCI_DEBUG
   2944           1.93  augustss 		uhci_dump_ii(ii);
   2945           1.93  augustss #endif
   2946           1.93  augustss 		return;
   2947           1.93  augustss 	}
   2948           1.93  augustss #endif
   2949           1.48  augustss 
   2950           1.48  augustss 	/* Turn off the interrupt since it is active even if the TD is not. */
   2951  1.205.2.1.2.1     skrll 	usb_syncmem(&ii->stdend->dma,
   2952  1.205.2.1.2.1     skrll 	    ii->stdend->offs + offsetof(uhci_td_t, td_status),
   2953  1.205.2.1.2.1     skrll 	    sizeof(ii->stdend->td.td_status),
   2954  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2955           1.88   tsutsui 	ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC);
   2956  1.205.2.1.2.1     skrll 	usb_syncmem(&ii->stdend->dma,
   2957  1.205.2.1.2.1     skrll 	    ii->stdend->offs + offsetof(uhci_td_t, td_status),
   2958  1.205.2.1.2.1     skrll 	    sizeof(ii->stdend->td.td_status),
   2959  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2960           1.48  augustss 
   2961           1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   2962  1.205.2.1.2.1     skrll 
   2963  1.205.2.1.2.1     skrll 	offs = 0;
   2964  1.205.2.1.2.1     skrll 	for (i = 0; i < xfer->nframes; i++) {
   2965  1.205.2.1.2.1     skrll 		usb_syncmem(&xfer->dmabuf, offs, xfer->frlengths[i],
   2966  1.205.2.1.2.1     skrll 		    rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   2967  1.205.2.1.2.1     skrll 		offs += xfer->frlengths[i];
   2968  1.205.2.1.2.1     skrll 	}
   2969           1.16  augustss }
   2970           1.16  augustss 
   2971            1.1  augustss void
   2972          1.119  augustss uhci_device_intr_done(usbd_xfer_handle xfer)
   2973            1.1  augustss {
   2974           1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2975            1.1  augustss 	uhci_softc_t *sc = ii->sc;
   2976           1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2977            1.1  augustss 	uhci_soft_qh_t *sqh;
   2978  1.205.2.1.2.1     skrll 	int i, npoll, isread;
   2979            1.1  augustss 
   2980          1.173      gson 	DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen));
   2981            1.1  augustss 
   2982            1.1  augustss 	npoll = upipe->u.intr.npoll;
   2983            1.1  augustss 	for(i = 0; i < npoll; i++) {
   2984            1.1  augustss 		sqh = upipe->u.intr.qhs[i];
   2985          1.121  augustss 		sqh->elink = NULL;
   2986           1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   2987  1.205.2.1.2.1     skrll 		usb_syncmem(&sqh->dma,
   2988  1.205.2.1.2.1     skrll 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   2989  1.205.2.1.2.1     skrll 		    sizeof(sqh->qh.qh_elink),
   2990  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2991            1.1  augustss 	}
   2992          1.149  augustss 	uhci_free_std_chain(sc, ii->stdstart, NULL);
   2993            1.1  augustss 
   2994  1.205.2.1.2.1     skrll 	isread = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN;
   2995  1.205.2.1.2.1     skrll 	usb_syncmem(&xfer->dmabuf, 0, xfer->length,
   2996  1.205.2.1.2.1     skrll 	    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   2997  1.205.2.1.2.1     skrll 
   2998            1.1  augustss 	/* XXX Wasteful. */
   2999           1.63  augustss 	if (xfer->pipe->repeat) {
   3000           1.55  augustss 		uhci_soft_td_t *data, *dataend;
   3001            1.1  augustss 
   3002           1.92  augustss 		DPRINTFN(5,("uhci_device_intr_done: requeing\n"));
   3003           1.92  augustss 
   3004            1.1  augustss 		/* This alloc cannot fail since we freed the chain above. */
   3005           1.73  augustss 		uhci_alloc_std_chain(upipe, sc, xfer->length, 1, xfer->flags,
   3006           1.63  augustss 				     &xfer->dmabuf, &data, &dataend);
   3007           1.88   tsutsui 		dataend->td.td_status |= htole32(UHCI_TD_IOC);
   3008  1.205.2.1.2.1     skrll 		usb_syncmem(&dataend->dma,
   3009  1.205.2.1.2.1     skrll 		    dataend->offs + offsetof(uhci_td_t, td_status),
   3010  1.205.2.1.2.1     skrll 		    sizeof(dataend->td.td_status),
   3011  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3012            1.1  augustss 
   3013           1.59  augustss #ifdef UHCI_DEBUG
   3014            1.1  augustss 		if (uhcidebug > 10) {
   3015           1.55  augustss 			DPRINTF(("uhci_device_intr_done: data(1)\n"));
   3016           1.55  augustss 			uhci_dump_tds(data);
   3017            1.1  augustss 			uhci_dump_qh(upipe->u.intr.qhs[0]);
   3018            1.1  augustss 		}
   3019            1.1  augustss #endif
   3020            1.1  augustss 
   3021           1.55  augustss 		ii->stdstart = data;
   3022           1.55  augustss 		ii->stdend = dataend;
   3023            1.7  augustss #ifdef DIAGNOSTIC
   3024           1.70  augustss 		if (!ii->isdone) {
   3025           1.70  augustss 			printf("uhci_device_intr_done: not done, ii=%p\n", ii);
   3026           1.70  augustss 		}
   3027            1.7  augustss 		ii->isdone = 0;
   3028            1.7  augustss #endif
   3029            1.1  augustss 		for (i = 0; i < npoll; i++) {
   3030            1.1  augustss 			sqh = upipe->u.intr.qhs[i];
   3031           1.55  augustss 			sqh->elink = data;
   3032          1.121  augustss 			sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   3033  1.205.2.1.2.1     skrll 			usb_syncmem(&sqh->dma,
   3034  1.205.2.1.2.1     skrll 			    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3035  1.205.2.1.2.1     skrll 			    sizeof(sqh->qh.qh_elink),
   3036  1.205.2.1.2.1     skrll 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3037            1.1  augustss 		}
   3038           1.92  augustss 		xfer->status = USBD_IN_PROGRESS;
   3039           1.92  augustss 		/* The ii is already on the examined list, just leave it. */
   3040            1.1  augustss 	} else {
   3041           1.92  augustss 		DPRINTFN(5,("uhci_device_intr_done: removing\n"));
   3042          1.169  augustss 		if (uhci_active_intr_info(ii))
   3043          1.169  augustss 			uhci_del_intr_info(ii);
   3044            1.1  augustss 	}
   3045            1.1  augustss }
   3046            1.1  augustss 
   3047            1.1  augustss /* Deallocate request data structures */
   3048            1.1  augustss void
   3049          1.119  augustss uhci_device_ctrl_done(usbd_xfer_handle xfer)
   3050            1.1  augustss {
   3051           1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   3052            1.1  augustss 	uhci_softc_t *sc = ii->sc;
   3053           1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   3054  1.205.2.1.2.1     skrll 	int len = UGETW(xfer->request.wLength);
   3055  1.205.2.1.2.1     skrll 	int isread = (xfer->request.bmRequestType & UT_READ);
   3056            1.1  augustss 
   3057            1.7  augustss #ifdef DIAGNOSTIC
   3058           1.63  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   3059          1.173      gson 		panic("uhci_device_ctrl_done: not a request");
   3060            1.7  augustss #endif
   3061            1.1  augustss 
   3062          1.169  augustss 	if (!uhci_active_intr_info(ii))
   3063          1.169  augustss 		return;
   3064          1.169  augustss 
   3065           1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   3066            1.1  augustss 
   3067          1.144  augustss 	if (upipe->pipe.device->speed == USB_SPEED_LOW)
   3068          1.123  augustss 		uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh);
   3069          1.123  augustss 	else
   3070          1.123  augustss 		uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh);
   3071            1.1  augustss 
   3072           1.49  augustss 	if (upipe->u.ctl.length != 0)
   3073           1.42  augustss 		uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend);
   3074           1.49  augustss 
   3075  1.205.2.1.2.1     skrll 	if (len) {
   3076  1.205.2.1.2.1     skrll 		usb_syncmem(&xfer->dmabuf, 0, len,
   3077  1.205.2.1.2.1     skrll 		    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   3078  1.205.2.1.2.1     skrll 	}
   3079  1.205.2.1.2.1     skrll 	usb_syncmem(&upipe->u.ctl.reqdma, 0,
   3080  1.205.2.1.2.1     skrll 	    sizeof(usb_device_request_t),  BUS_DMASYNC_POSTWRITE);
   3081  1.205.2.1.2.1     skrll 
   3082          1.173      gson 	DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen));
   3083            1.1  augustss }
   3084            1.1  augustss 
   3085            1.1  augustss /* Deallocate request data structures */
   3086            1.1  augustss void
   3087          1.119  augustss uhci_device_bulk_done(usbd_xfer_handle xfer)
   3088            1.1  augustss {
   3089           1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   3090            1.1  augustss 	uhci_softc_t *sc = ii->sc;
   3091           1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   3092          1.169  augustss 
   3093          1.173      gson 	DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n",
   3094          1.169  augustss 		    xfer, ii, sc, upipe));
   3095          1.169  augustss 
   3096          1.169  augustss 	if (!uhci_active_intr_info(ii))
   3097          1.169  augustss 		return;
   3098            1.1  augustss 
   3099           1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   3100            1.1  augustss 
   3101            1.1  augustss 	uhci_remove_bulk(sc, upipe->u.bulk.sqh);
   3102           1.32  augustss 
   3103          1.149  augustss 	uhci_free_std_chain(sc, ii->stdstart, NULL);
   3104           1.32  augustss 
   3105          1.173      gson 	DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen));
   3106            1.1  augustss }
   3107            1.1  augustss 
   3108            1.1  augustss /* Add interrupt QH, called with vflock. */
   3109            1.1  augustss void
   3110          1.119  augustss uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   3111            1.1  augustss {
   3112           1.92  augustss 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
   3113           1.42  augustss 	uhci_soft_qh_t *eqh;
   3114            1.1  augustss 
   3115           1.92  augustss 	DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh));
   3116           1.92  augustss 
   3117           1.42  augustss 	eqh = vf->eqh;
   3118  1.205.2.1.2.1     skrll 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3119  1.205.2.1.2.1     skrll 	    sizeof(eqh->qh.qh_hlink),
   3120  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_POSTWRITE);
   3121           1.42  augustss 	sqh->hlink       = eqh->hlink;
   3122           1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   3123  1.205.2.1.2.1     skrll 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3124  1.205.2.1.2.1     skrll 	    sizeof(sqh->qh.qh_hlink),
   3125  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_PREWRITE);
   3126           1.42  augustss 	eqh->hlink       = sqh;
   3127          1.121  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   3128  1.205.2.1.2.1     skrll 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3129  1.205.2.1.2.1     skrll 	    sizeof(eqh->qh.qh_hlink),
   3130  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_PREWRITE);
   3131            1.1  augustss 	vf->eqh = sqh;
   3132            1.1  augustss 	vf->bandwidth++;
   3133            1.1  augustss }
   3134            1.1  augustss 
   3135          1.119  augustss /* Remove interrupt QH. */
   3136            1.1  augustss void
   3137          1.119  augustss uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   3138            1.1  augustss {
   3139           1.92  augustss 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
   3140            1.1  augustss 	uhci_soft_qh_t *pqh;
   3141            1.1  augustss 
   3142           1.92  augustss 	DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh));
   3143            1.1  augustss 
   3144          1.124  augustss 	/* See comment in uhci_remove_ctrl() */
   3145  1.205.2.1.2.1     skrll 
   3146  1.205.2.1.2.1     skrll 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3147  1.205.2.1.2.1     skrll 	    sizeof(sqh->qh.qh_elink),
   3148  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3149          1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   3150          1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   3151  1.205.2.1.2.1     skrll 		usb_syncmem(&sqh->dma,
   3152  1.205.2.1.2.1     skrll 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3153  1.205.2.1.2.1     skrll 		    sizeof(sqh->qh.qh_elink),
   3154  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3155          1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   3156          1.124  augustss 	}
   3157          1.124  augustss 
   3158           1.92  augustss 	pqh = uhci_find_prev_qh(vf->hqh, sqh);
   3159  1.205.2.1.2.1     skrll 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3160  1.205.2.1.2.1     skrll 	    sizeof(sqh->qh.qh_hlink),
   3161  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3162           1.42  augustss 	pqh->hlink       = sqh->hlink;
   3163           1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   3164  1.205.2.1.2.1     skrll 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3165  1.205.2.1.2.1     skrll 	    sizeof(pqh->qh.qh_hlink),
   3166  1.205.2.1.2.1     skrll 	    BUS_DMASYNC_PREWRITE);
   3167          1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   3168            1.1  augustss 	if (vf->eqh == sqh)
   3169            1.1  augustss 		vf->eqh = pqh;
   3170            1.1  augustss 	vf->bandwidth--;
   3171            1.1  augustss }
   3172            1.1  augustss 
   3173            1.1  augustss usbd_status
   3174          1.119  augustss uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival)
   3175            1.1  augustss {
   3176            1.1  augustss 	uhci_soft_qh_t *sqh;
   3177            1.1  augustss 	int i, npoll, s;
   3178            1.1  augustss 	u_int bestbw, bw, bestoffs, offs;
   3179            1.1  augustss 
   3180          1.173      gson 	DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe));
   3181            1.1  augustss 	if (ival == 0) {
   3182          1.173      gson 		printf("uhci_device_setintr: 0 interval\n");
   3183            1.1  augustss 		return (USBD_INVAL);
   3184            1.1  augustss 	}
   3185            1.1  augustss 
   3186            1.1  augustss 	if (ival > UHCI_VFRAMELIST_COUNT)
   3187            1.1  augustss 		ival = UHCI_VFRAMELIST_COUNT;
   3188            1.1  augustss 	npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
   3189          1.173      gson 	DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll));
   3190            1.1  augustss 
   3191            1.1  augustss 	upipe->u.intr.npoll = npoll;
   3192          1.152  augustss 	upipe->u.intr.qhs =
   3193           1.31  augustss 		malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK);
   3194            1.1  augustss 
   3195          1.152  augustss 	/*
   3196            1.1  augustss 	 * Figure out which offset in the schedule that has most
   3197            1.1  augustss 	 * bandwidth left over.
   3198            1.1  augustss 	 */
   3199            1.1  augustss #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
   3200            1.1  augustss 	for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
   3201            1.1  augustss 		for (bw = i = 0; i < npoll; i++)
   3202            1.1  augustss 			bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
   3203            1.1  augustss 		if (bw < bestbw) {
   3204            1.1  augustss 			bestbw = bw;
   3205            1.1  augustss 			bestoffs = offs;
   3206            1.1  augustss 		}
   3207            1.1  augustss 	}
   3208          1.173      gson 	DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
   3209            1.1  augustss 
   3210            1.1  augustss 	for(i = 0; i < npoll; i++) {
   3211            1.1  augustss 		upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
   3212          1.121  augustss 		sqh->elink = NULL;
   3213           1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   3214  1.205.2.1.2.1     skrll 		usb_syncmem(&sqh->dma,
   3215  1.205.2.1.2.1     skrll 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3216  1.205.2.1.2.1     skrll 		    sizeof(sqh->qh.qh_elink),
   3217  1.205.2.1.2.1     skrll 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3218            1.1  augustss 		sqh->pos = MOD(i * ival + bestoffs);
   3219            1.1  augustss 	}
   3220            1.1  augustss #undef MOD
   3221            1.1  augustss 
   3222            1.1  augustss 	s = splusb();
   3223            1.1  augustss 	/* Enter QHs into the controller data structures. */
   3224            1.1  augustss 	for(i = 0; i < npoll; i++)
   3225           1.92  augustss 		uhci_add_intr(sc, upipe->u.intr.qhs[i]);
   3226           1.92  augustss 	splx(s);
   3227            1.1  augustss 
   3228          1.173      gson 	DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe));
   3229            1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   3230            1.1  augustss }
   3231            1.1  augustss 
   3232            1.1  augustss /* Open a new pipe. */
   3233            1.1  augustss usbd_status
   3234          1.119  augustss uhci_open(usbd_pipe_handle pipe)
   3235            1.1  augustss {
   3236            1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
   3237            1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   3238            1.1  augustss 	usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
   3239           1.63  augustss 	usbd_status err;
   3240           1.79  augustss 	int ival;
   3241            1.1  augustss 
   3242            1.1  augustss 	DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
   3243          1.152  augustss 		     pipe, pipe->device->address,
   3244            1.1  augustss 		     ed->bEndpointAddress, sc->sc_addr));
   3245           1.92  augustss 
   3246           1.92  augustss 	upipe->aborting = 0;
   3247           1.92  augustss 	upipe->nexttoggle = 0;
   3248           1.92  augustss 
   3249            1.1  augustss 	if (pipe->device->address == sc->sc_addr) {
   3250            1.1  augustss 		switch (ed->bEndpointAddress) {
   3251            1.1  augustss 		case USB_CONTROL_ENDPOINT:
   3252            1.1  augustss 			pipe->methods = &uhci_root_ctrl_methods;
   3253            1.1  augustss 			break;
   3254           1.45  augustss 		case UE_DIR_IN | UHCI_INTR_ENDPT:
   3255            1.1  augustss 			pipe->methods = &uhci_root_intr_methods;
   3256            1.1  augustss 			break;
   3257            1.1  augustss 		default:
   3258            1.1  augustss 			return (USBD_INVAL);
   3259            1.1  augustss 		}
   3260            1.1  augustss 	} else {
   3261            1.1  augustss 		switch (ed->bmAttributes & UE_XFERTYPE) {
   3262            1.1  augustss 		case UE_CONTROL:
   3263            1.1  augustss 			pipe->methods = &uhci_device_ctrl_methods;
   3264            1.1  augustss 			upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
   3265           1.63  augustss 			if (upipe->u.ctl.sqh == NULL)
   3266            1.5  augustss 				goto bad;
   3267            1.1  augustss 			upipe->u.ctl.setup = uhci_alloc_std(sc);
   3268           1.63  augustss 			if (upipe->u.ctl.setup == NULL) {
   3269            1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   3270            1.5  augustss 				goto bad;
   3271            1.5  augustss 			}
   3272            1.1  augustss 			upipe->u.ctl.stat = uhci_alloc_std(sc);
   3273           1.63  augustss 			if (upipe->u.ctl.stat == NULL) {
   3274            1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   3275            1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.setup);
   3276            1.5  augustss 				goto bad;
   3277            1.5  augustss 			}
   3278          1.152  augustss 			err = usb_allocmem(&sc->sc_bus,
   3279          1.152  augustss 				  sizeof(usb_device_request_t),
   3280           1.63  augustss 				  0, &upipe->u.ctl.reqdma);
   3281           1.63  augustss 			if (err) {
   3282            1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   3283            1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.setup);
   3284            1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.stat);
   3285            1.5  augustss 				goto bad;
   3286            1.5  augustss 			}
   3287            1.1  augustss 			break;
   3288            1.1  augustss 		case UE_INTERRUPT:
   3289            1.1  augustss 			pipe->methods = &uhci_device_intr_methods;
   3290           1.79  augustss 			ival = pipe->interval;
   3291           1.79  augustss 			if (ival == USBD_DEFAULT_INTERVAL)
   3292           1.79  augustss 				ival = ed->bInterval;
   3293           1.80  augustss 			return (uhci_device_setintr(sc, upipe, ival));
   3294            1.1  augustss 		case UE_ISOCHRONOUS:
   3295           1.16  augustss 			pipe->methods = &uhci_device_isoc_methods;
   3296           1.48  augustss 			return (uhci_setup_isoc(pipe));
   3297            1.1  augustss 		case UE_BULK:
   3298            1.1  augustss 			pipe->methods = &uhci_device_bulk_methods;
   3299            1.1  augustss 			upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
   3300           1.63  augustss 			if (upipe->u.bulk.sqh == NULL)
   3301            1.5  augustss 				goto bad;
   3302            1.1  augustss 			break;
   3303            1.1  augustss 		}
   3304            1.1  augustss 	}
   3305            1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   3306            1.5  augustss 
   3307            1.5  augustss  bad:
   3308            1.5  augustss 	return (USBD_NOMEM);
   3309            1.1  augustss }
   3310            1.1  augustss 
   3311            1.1  augustss /*
   3312            1.1  augustss  * Data structures and routines to emulate the root hub.
   3313            1.1  augustss  */
   3314            1.1  augustss usb_device_descriptor_t uhci_devd = {
   3315            1.1  augustss 	USB_DEVICE_DESCRIPTOR_SIZE,
   3316            1.1  augustss 	UDESC_DEVICE,		/* type */
   3317            1.1  augustss 	{0x00, 0x01},		/* USB version */
   3318           1.87  augustss 	UDCLASS_HUB,		/* class */
   3319           1.87  augustss 	UDSUBCLASS_HUB,		/* subclass */
   3320          1.144  augustss 	UDPROTO_FSHUB,		/* protocol */
   3321            1.1  augustss 	64,			/* max packet */
   3322            1.1  augustss 	{0},{0},{0x00,0x01},	/* device id */
   3323            1.1  augustss 	1,2,0,			/* string indicies */
   3324            1.1  augustss 	1			/* # of configurations */
   3325            1.1  augustss };
   3326            1.1  augustss 
   3327            1.1  augustss usb_config_descriptor_t uhci_confd = {
   3328            1.1  augustss 	USB_CONFIG_DESCRIPTOR_SIZE,
   3329            1.1  augustss 	UDESC_CONFIG,
   3330            1.1  augustss 	{USB_CONFIG_DESCRIPTOR_SIZE +
   3331            1.1  augustss 	 USB_INTERFACE_DESCRIPTOR_SIZE +
   3332            1.1  augustss 	 USB_ENDPOINT_DESCRIPTOR_SIZE},
   3333            1.1  augustss 	1,
   3334            1.1  augustss 	1,
   3335            1.1  augustss 	0,
   3336            1.1  augustss 	UC_SELF_POWERED,
   3337            1.1  augustss 	0			/* max power */
   3338            1.1  augustss };
   3339            1.1  augustss 
   3340            1.1  augustss usb_interface_descriptor_t uhci_ifcd = {
   3341            1.1  augustss 	USB_INTERFACE_DESCRIPTOR_SIZE,
   3342            1.1  augustss 	UDESC_INTERFACE,
   3343            1.1  augustss 	0,
   3344            1.1  augustss 	0,
   3345            1.1  augustss 	1,
   3346           1.87  augustss 	UICLASS_HUB,
   3347           1.87  augustss 	UISUBCLASS_HUB,
   3348          1.144  augustss 	UIPROTO_FSHUB,
   3349            1.1  augustss 	0
   3350            1.1  augustss };
   3351            1.1  augustss 
   3352            1.1  augustss usb_endpoint_descriptor_t uhci_endpd = {
   3353            1.1  augustss 	USB_ENDPOINT_DESCRIPTOR_SIZE,
   3354            1.1  augustss 	UDESC_ENDPOINT,
   3355           1.45  augustss 	UE_DIR_IN | UHCI_INTR_ENDPT,
   3356            1.1  augustss 	UE_INTERRUPT,
   3357            1.1  augustss 	{8},
   3358            1.1  augustss 	255
   3359            1.1  augustss };
   3360            1.1  augustss 
   3361            1.1  augustss usb_hub_descriptor_t uhci_hubd_piix = {
   3362            1.1  augustss 	USB_HUB_DESCRIPTOR_SIZE,
   3363            1.1  augustss 	UDESC_HUB,
   3364            1.1  augustss 	2,
   3365            1.1  augustss 	{ UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
   3366            1.1  augustss 	50,			/* power on to power good */
   3367            1.1  augustss 	0,
   3368            1.1  augustss 	{ 0x00 },		/* both ports are removable */
   3369          1.199  christos 	{ 0 },
   3370            1.1  augustss };
   3371            1.1  augustss 
   3372            1.1  augustss int
   3373          1.189  christos uhci_str(usb_string_descriptor_t *p, int l, const char *s)
   3374            1.1  augustss {
   3375            1.1  augustss 	int i;
   3376            1.1  augustss 
   3377            1.1  augustss 	if (l == 0)
   3378            1.1  augustss 		return (0);
   3379            1.1  augustss 	p->bLength = 2 * strlen(s) + 2;
   3380            1.1  augustss 	if (l == 1)
   3381            1.1  augustss 		return (1);
   3382            1.1  augustss 	p->bDescriptorType = UDESC_STRING;
   3383            1.1  augustss 	l -= 2;
   3384            1.1  augustss 	for (i = 0; s[i] && l > 1; i++, l -= 2)
   3385            1.1  augustss 		USETW2(p->bString[i], 0, s[i]);
   3386            1.1  augustss 	return (2*i+2);
   3387            1.1  augustss }
   3388            1.1  augustss 
   3389            1.1  augustss /*
   3390          1.166   dsainty  * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also
   3391          1.166   dsainty  * enables the port, and also states that SET_FEATURE(PORT_ENABLE)
   3392          1.166   dsainty  * should not be used by the USB subsystem.  As we cannot issue a
   3393          1.166   dsainty  * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port
   3394          1.166   dsainty  * will be enabled as part of the reset.
   3395          1.166   dsainty  *
   3396          1.166   dsainty  * On the VT83C572, the port cannot be successfully enabled until the
   3397          1.166   dsainty  * outstanding "port enable change" and "connection status change"
   3398          1.166   dsainty  * events have been reset.
   3399          1.166   dsainty  */
   3400          1.166   dsainty Static usbd_status
   3401          1.166   dsainty uhci_portreset(uhci_softc_t *sc, int index)
   3402          1.166   dsainty {
   3403          1.166   dsainty 	int lim, port, x;
   3404          1.166   dsainty 
   3405          1.166   dsainty 	if (index == 1)
   3406          1.166   dsainty 		port = UHCI_PORTSC1;
   3407          1.166   dsainty 	else if (index == 2)
   3408          1.166   dsainty 		port = UHCI_PORTSC2;
   3409          1.166   dsainty 	else
   3410          1.166   dsainty 		return (USBD_IOERROR);
   3411          1.166   dsainty 
   3412          1.166   dsainty 	x = URWMASK(UREAD2(sc, port));
   3413          1.166   dsainty 	UWRITE2(sc, port, x | UHCI_PORTSC_PR);
   3414          1.166   dsainty 
   3415          1.166   dsainty 	usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
   3416          1.166   dsainty 
   3417          1.166   dsainty 	DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n",
   3418          1.166   dsainty 		    index, UREAD2(sc, port)));
   3419          1.166   dsainty 
   3420          1.166   dsainty 	x = URWMASK(UREAD2(sc, port));
   3421          1.166   dsainty 	UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
   3422          1.166   dsainty 
   3423          1.166   dsainty 	delay(100);
   3424          1.166   dsainty 
   3425          1.166   dsainty 	DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n",
   3426          1.166   dsainty 		    index, UREAD2(sc, port)));
   3427          1.166   dsainty 
   3428          1.166   dsainty 	x = URWMASK(UREAD2(sc, port));
   3429          1.166   dsainty 	UWRITE2(sc, port, x  | UHCI_PORTSC_PE);
   3430          1.166   dsainty 
   3431          1.166   dsainty 	for (lim = 10; --lim > 0;) {
   3432          1.166   dsainty 		usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY);
   3433          1.166   dsainty 
   3434          1.166   dsainty 		x = UREAD2(sc, port);
   3435          1.166   dsainty 
   3436          1.166   dsainty 		DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n",
   3437          1.166   dsainty 			    index, lim, x));
   3438          1.166   dsainty 
   3439          1.166   dsainty 		if (!(x & UHCI_PORTSC_CCS)) {
   3440          1.166   dsainty 			/*
   3441          1.166   dsainty 			 * No device is connected (or was disconnected
   3442          1.166   dsainty 			 * during reset).  Consider the port reset.
   3443          1.166   dsainty 			 * The delay must be long enough to ensure on
   3444          1.166   dsainty 			 * the initial iteration that the device
   3445          1.166   dsainty 			 * connection will have been registered.  50ms
   3446          1.166   dsainty 			 * appears to be sufficient, but 20ms is not.
   3447          1.166   dsainty 			 */
   3448          1.166   dsainty 			DPRINTFN(3,("uhci port %d loop %u, device detached\n",
   3449          1.166   dsainty 				    index, lim));
   3450          1.166   dsainty 			break;
   3451          1.166   dsainty 		}
   3452          1.166   dsainty 
   3453          1.166   dsainty 		if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) {
   3454          1.166   dsainty 			/*
   3455          1.166   dsainty 			 * Port enabled changed and/or connection
   3456          1.166   dsainty 			 * status changed were set.  Reset either or
   3457          1.166   dsainty 			 * both raised flags (by writing a 1 to that
   3458          1.166   dsainty 			 * bit), and wait again for state to settle.
   3459          1.166   dsainty 			 */
   3460          1.166   dsainty 			UWRITE2(sc, port, URWMASK(x) |
   3461          1.166   dsainty 				(x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)));
   3462          1.166   dsainty 			continue;
   3463          1.166   dsainty 		}
   3464          1.166   dsainty 
   3465          1.166   dsainty 		if (x & UHCI_PORTSC_PE)
   3466          1.166   dsainty 			/* Port is enabled */
   3467          1.166   dsainty 			break;
   3468          1.166   dsainty 
   3469          1.166   dsainty 		UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE);
   3470          1.166   dsainty 	}
   3471          1.166   dsainty 
   3472          1.166   dsainty 	DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n",
   3473          1.166   dsainty 		    index, UREAD2(sc, port)));
   3474          1.166   dsainty 
   3475          1.166   dsainty 	if (lim <= 0) {
   3476          1.166   dsainty 		DPRINTFN(1,("uhci port %d reset timed out\n", index));
   3477          1.166   dsainty 		return (USBD_TIMEOUT);
   3478          1.166   dsainty 	}
   3479          1.184     perry 
   3480          1.166   dsainty 	sc->sc_isreset = 1;
   3481          1.166   dsainty 	return (USBD_NORMAL_COMPLETION);
   3482          1.166   dsainty }
   3483          1.166   dsainty 
   3484          1.166   dsainty /*
   3485            1.1  augustss  * Simulate a hardware hub by handling all the necessary requests.
   3486            1.1  augustss  */
   3487            1.1  augustss usbd_status
   3488          1.119  augustss uhci_root_ctrl_transfer(usbd_xfer_handle xfer)
   3489            1.1  augustss {
   3490           1.63  augustss 	usbd_status err;
   3491           1.16  augustss 
   3492           1.52  augustss 	/* Insert last in queue. */
   3493           1.63  augustss 	err = usb_insert_transfer(xfer);
   3494           1.63  augustss 	if (err)
   3495           1.63  augustss 		return (err);
   3496           1.52  augustss 
   3497          1.152  augustss 	/*
   3498           1.94  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   3499           1.94  augustss 	 * so start it first.
   3500           1.67  augustss 	 */
   3501           1.63  augustss 	return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   3502           1.16  augustss }
   3503           1.16  augustss 
   3504           1.16  augustss usbd_status
   3505          1.119  augustss uhci_root_ctrl_start(usbd_xfer_handle xfer)
   3506           1.16  augustss {
   3507           1.63  augustss 	uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
   3508            1.1  augustss 	usb_device_request_t *req;
   3509           1.59  augustss 	void *buf = NULL;
   3510            1.1  augustss 	int port, x;
   3511           1.52  augustss 	int s, len, value, index, status, change, l, totlen = 0;
   3512            1.1  augustss 	usb_port_status_t ps;
   3513           1.63  augustss 	usbd_status err;
   3514            1.1  augustss 
   3515           1.82  augustss 	if (sc->sc_dying)
   3516           1.82  augustss 		return (USBD_IOERROR);
   3517           1.82  augustss 
   3518           1.48  augustss #ifdef DIAGNOSTIC
   3519           1.63  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   3520          1.163    provos 		panic("uhci_root_ctrl_transfer: not a request");
   3521           1.48  augustss #endif
   3522           1.63  augustss 	req = &xfer->request;
   3523            1.1  augustss 
   3524          1.152  augustss 	DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
   3525            1.1  augustss 		    req->bmRequestType, req->bRequest));
   3526            1.1  augustss 
   3527            1.1  augustss 	len = UGETW(req->wLength);
   3528            1.1  augustss 	value = UGETW(req->wValue);
   3529            1.1  augustss 	index = UGETW(req->wIndex);
   3530           1.49  augustss 
   3531           1.49  augustss 	if (len != 0)
   3532          1.159  augustss 		buf = KERNADDR(&xfer->dmabuf, 0);
   3533           1.49  augustss 
   3534            1.1  augustss #define C(x,y) ((x) | ((y) << 8))
   3535            1.1  augustss 	switch(C(req->bRequest, req->bmRequestType)) {
   3536            1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
   3537            1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
   3538            1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
   3539          1.152  augustss 		/*
   3540           1.13  augustss 		 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
   3541            1.1  augustss 		 * for the integrated root hub.
   3542            1.1  augustss 		 */
   3543            1.1  augustss 		break;
   3544            1.1  augustss 	case C(UR_GET_CONFIG, UT_READ_DEVICE):
   3545            1.1  augustss 		if (len > 0) {
   3546            1.1  augustss 			*(u_int8_t *)buf = sc->sc_conf;
   3547            1.1  augustss 			totlen = 1;
   3548            1.1  augustss 		}
   3549            1.1  augustss 		break;
   3550            1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   3551            1.1  augustss 		DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
   3552          1.195  christos 		if (len == 0)
   3553          1.195  christos 			break;
   3554            1.1  augustss 		switch(value >> 8) {
   3555            1.1  augustss 		case UDESC_DEVICE:
   3556            1.1  augustss 			if ((value & 0xff) != 0) {
   3557           1.63  augustss 				err = USBD_IOERROR;
   3558            1.1  augustss 				goto ret;
   3559            1.1  augustss 			}
   3560            1.1  augustss 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
   3561           1.27  augustss 			USETW(uhci_devd.idVendor, sc->sc_id_vendor);
   3562            1.1  augustss 			memcpy(buf, &uhci_devd, l);
   3563            1.1  augustss 			break;
   3564            1.1  augustss 		case UDESC_CONFIG:
   3565            1.1  augustss 			if ((value & 0xff) != 0) {
   3566           1.63  augustss 				err = USBD_IOERROR;
   3567            1.1  augustss 				goto ret;
   3568            1.1  augustss 			}
   3569            1.1  augustss 			totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
   3570            1.1  augustss 			memcpy(buf, &uhci_confd, l);
   3571            1.1  augustss 			buf = (char *)buf + l;
   3572            1.1  augustss 			len -= l;
   3573            1.1  augustss 			l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
   3574            1.1  augustss 			totlen += l;
   3575            1.1  augustss 			memcpy(buf, &uhci_ifcd, l);
   3576            1.1  augustss 			buf = (char *)buf + l;
   3577            1.1  augustss 			len -= l;
   3578            1.1  augustss 			l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
   3579            1.1  augustss 			totlen += l;
   3580            1.1  augustss 			memcpy(buf, &uhci_endpd, l);
   3581            1.1  augustss 			break;
   3582            1.1  augustss 		case UDESC_STRING:
   3583            1.1  augustss 			*(u_int8_t *)buf = 0;
   3584            1.1  augustss 			totlen = 1;
   3585            1.1  augustss 			switch (value & 0xff) {
   3586          1.182  augustss 			case 0: /* Language table */
   3587          1.182  augustss 				totlen = uhci_str(buf, len, "\001");
   3588          1.182  augustss 				break;
   3589            1.1  augustss 			case 1: /* Vendor */
   3590            1.8  augustss 				totlen = uhci_str(buf, len, sc->sc_vendor);
   3591            1.1  augustss 				break;
   3592            1.1  augustss 			case 2: /* Product */
   3593            1.8  augustss 				totlen = uhci_str(buf, len, "UHCI root hub");
   3594            1.1  augustss 				break;
   3595            1.1  augustss 			}
   3596            1.1  augustss 			break;
   3597            1.1  augustss 		default:
   3598           1.63  augustss 			err = USBD_IOERROR;
   3599            1.1  augustss 			goto ret;
   3600            1.1  augustss 		}
   3601            1.1  augustss 		break;
   3602            1.1  augustss 	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
   3603            1.1  augustss 		if (len > 0) {
   3604            1.1  augustss 			*(u_int8_t *)buf = 0;
   3605            1.1  augustss 			totlen = 1;
   3606            1.1  augustss 		}
   3607            1.1  augustss 		break;
   3608            1.1  augustss 	case C(UR_GET_STATUS, UT_READ_DEVICE):
   3609            1.1  augustss 		if (len > 1) {
   3610            1.1  augustss 			USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
   3611            1.1  augustss 			totlen = 2;
   3612            1.1  augustss 		}
   3613            1.1  augustss 		break;
   3614            1.1  augustss 	case C(UR_GET_STATUS, UT_READ_INTERFACE):
   3615            1.1  augustss 	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
   3616            1.1  augustss 		if (len > 1) {
   3617            1.1  augustss 			USETW(((usb_status_t *)buf)->wStatus, 0);
   3618            1.1  augustss 			totlen = 2;
   3619            1.1  augustss 		}
   3620            1.1  augustss 		break;
   3621            1.1  augustss 	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
   3622            1.1  augustss 		if (value >= USB_MAX_DEVICES) {
   3623           1.63  augustss 			err = USBD_IOERROR;
   3624            1.1  augustss 			goto ret;
   3625            1.1  augustss 		}
   3626            1.1  augustss 		sc->sc_addr = value;
   3627            1.1  augustss 		break;
   3628            1.1  augustss 	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
   3629            1.1  augustss 		if (value != 0 && value != 1) {
   3630           1.63  augustss 			err = USBD_IOERROR;
   3631            1.1  augustss 			goto ret;
   3632            1.1  augustss 		}
   3633            1.1  augustss 		sc->sc_conf = value;
   3634            1.1  augustss 		break;
   3635            1.1  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
   3636            1.1  augustss 		break;
   3637            1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
   3638            1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
   3639            1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
   3640           1.63  augustss 		err = USBD_IOERROR;
   3641            1.1  augustss 		goto ret;
   3642            1.1  augustss 	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
   3643            1.1  augustss 		break;
   3644            1.1  augustss 	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
   3645            1.1  augustss 		break;
   3646            1.1  augustss 	/* Hub requests */
   3647            1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   3648            1.1  augustss 		break;
   3649            1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   3650           1.12  augustss 		DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
   3651           1.12  augustss 			     "port=%d feature=%d\n",
   3652            1.1  augustss 			     index, value));
   3653            1.1  augustss 		if (index == 1)
   3654            1.1  augustss 			port = UHCI_PORTSC1;
   3655            1.1  augustss 		else if (index == 2)
   3656            1.1  augustss 			port = UHCI_PORTSC2;
   3657            1.1  augustss 		else {
   3658           1.63  augustss 			err = USBD_IOERROR;
   3659            1.1  augustss 			goto ret;
   3660            1.1  augustss 		}
   3661            1.1  augustss 		switch(value) {
   3662            1.1  augustss 		case UHF_PORT_ENABLE:
   3663          1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3664            1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
   3665            1.1  augustss 			break;
   3666            1.1  augustss 		case UHF_PORT_SUSPEND:
   3667          1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3668            1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
   3669            1.1  augustss 			break;
   3670            1.1  augustss 		case UHF_PORT_RESET:
   3671          1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3672            1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
   3673            1.1  augustss 			break;
   3674            1.1  augustss 		case UHF_C_PORT_CONNECTION:
   3675          1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3676            1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
   3677            1.1  augustss 			break;
   3678            1.1  augustss 		case UHF_C_PORT_ENABLE:
   3679          1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3680            1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
   3681            1.1  augustss 			break;
   3682            1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   3683          1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3684            1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
   3685            1.1  augustss 			break;
   3686            1.1  augustss 		case UHF_C_PORT_RESET:
   3687            1.1  augustss 			sc->sc_isreset = 0;
   3688           1.63  augustss 			err = USBD_NORMAL_COMPLETION;
   3689            1.1  augustss 			goto ret;
   3690            1.1  augustss 		case UHF_PORT_CONNECTION:
   3691            1.1  augustss 		case UHF_PORT_OVER_CURRENT:
   3692            1.1  augustss 		case UHF_PORT_POWER:
   3693            1.1  augustss 		case UHF_PORT_LOW_SPEED:
   3694            1.1  augustss 		case UHF_C_PORT_SUSPEND:
   3695            1.1  augustss 		default:
   3696           1.63  augustss 			err = USBD_IOERROR;
   3697            1.1  augustss 			goto ret;
   3698            1.1  augustss 		}
   3699            1.1  augustss 		break;
   3700            1.1  augustss 	case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
   3701            1.1  augustss 		if (index == 1)
   3702            1.1  augustss 			port = UHCI_PORTSC1;
   3703            1.1  augustss 		else if (index == 2)
   3704            1.1  augustss 			port = UHCI_PORTSC2;
   3705            1.1  augustss 		else {
   3706           1.63  augustss 			err = USBD_IOERROR;
   3707            1.1  augustss 			goto ret;
   3708            1.1  augustss 		}
   3709            1.1  augustss 		if (len > 0) {
   3710          1.152  augustss 			*(u_int8_t *)buf =
   3711            1.1  augustss 				(UREAD2(sc, port) & UHCI_PORTSC_LS) >>
   3712            1.1  augustss 				UHCI_PORTSC_LS_SHIFT;
   3713            1.1  augustss 			totlen = 1;
   3714            1.1  augustss 		}
   3715            1.1  augustss 		break;
   3716            1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   3717          1.195  christos 		if (len == 0)
   3718          1.195  christos 			break;
   3719          1.177    toshii 		if ((value & 0xff) != 0) {
   3720           1.63  augustss 			err = USBD_IOERROR;
   3721            1.1  augustss 			goto ret;
   3722            1.1  augustss 		}
   3723            1.1  augustss 		l = min(len, USB_HUB_DESCRIPTOR_SIZE);
   3724            1.1  augustss 		totlen = l;
   3725            1.1  augustss 		memcpy(buf, &uhci_hubd_piix, l);
   3726            1.1  augustss 		break;
   3727            1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   3728            1.1  augustss 		if (len != 4) {
   3729           1.63  augustss 			err = USBD_IOERROR;
   3730            1.1  augustss 			goto ret;
   3731            1.1  augustss 		}
   3732            1.1  augustss 		memset(buf, 0, len);
   3733            1.1  augustss 		totlen = len;
   3734            1.1  augustss 		break;
   3735            1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   3736            1.1  augustss 		if (index == 1)
   3737            1.1  augustss 			port = UHCI_PORTSC1;
   3738            1.1  augustss 		else if (index == 2)
   3739            1.1  augustss 			port = UHCI_PORTSC2;
   3740            1.1  augustss 		else {
   3741           1.63  augustss 			err = USBD_IOERROR;
   3742            1.1  augustss 			goto ret;
   3743            1.1  augustss 		}
   3744            1.1  augustss 		if (len != 4) {
   3745           1.63  augustss 			err = USBD_IOERROR;
   3746            1.1  augustss 			goto ret;
   3747            1.1  augustss 		}
   3748            1.1  augustss 		x = UREAD2(sc, port);
   3749            1.1  augustss 		status = change = 0;
   3750          1.142  augustss 		if (x & UHCI_PORTSC_CCS)
   3751            1.1  augustss 			status |= UPS_CURRENT_CONNECT_STATUS;
   3752          1.152  augustss 		if (x & UHCI_PORTSC_CSC)
   3753            1.1  augustss 			change |= UPS_C_CONNECT_STATUS;
   3754          1.152  augustss 		if (x & UHCI_PORTSC_PE)
   3755            1.1  augustss 			status |= UPS_PORT_ENABLED;
   3756          1.152  augustss 		if (x & UHCI_PORTSC_POEDC)
   3757            1.1  augustss 			change |= UPS_C_PORT_ENABLED;
   3758          1.152  augustss 		if (x & UHCI_PORTSC_OCI)
   3759            1.1  augustss 			status |= UPS_OVERCURRENT_INDICATOR;
   3760          1.152  augustss 		if (x & UHCI_PORTSC_OCIC)
   3761            1.1  augustss 			change |= UPS_C_OVERCURRENT_INDICATOR;
   3762          1.152  augustss 		if (x & UHCI_PORTSC_SUSP)
   3763            1.1  augustss 			status |= UPS_SUSPEND;
   3764          1.152  augustss 		if (x & UHCI_PORTSC_LSDA)
   3765            1.1  augustss 			status |= UPS_LOW_SPEED;
   3766            1.1  augustss 		status |= UPS_PORT_POWER;
   3767            1.1  augustss 		if (sc->sc_isreset)
   3768            1.1  augustss 			change |= UPS_C_PORT_RESET;
   3769            1.1  augustss 		USETW(ps.wPortStatus, status);
   3770            1.1  augustss 		USETW(ps.wPortChange, change);
   3771            1.1  augustss 		l = min(len, sizeof ps);
   3772            1.1  augustss 		memcpy(buf, &ps, l);
   3773            1.1  augustss 		totlen = l;
   3774            1.1  augustss 		break;
   3775            1.1  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   3776           1.63  augustss 		err = USBD_IOERROR;
   3777            1.1  augustss 		goto ret;
   3778            1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   3779            1.1  augustss 		break;
   3780            1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   3781            1.1  augustss 		if (index == 1)
   3782            1.1  augustss 			port = UHCI_PORTSC1;
   3783            1.1  augustss 		else if (index == 2)
   3784            1.1  augustss 			port = UHCI_PORTSC2;
   3785            1.1  augustss 		else {
   3786           1.63  augustss 			err = USBD_IOERROR;
   3787            1.1  augustss 			goto ret;
   3788            1.1  augustss 		}
   3789            1.1  augustss 		switch(value) {
   3790            1.1  augustss 		case UHF_PORT_ENABLE:
   3791          1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3792            1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_PE);
   3793            1.1  augustss 			break;
   3794            1.1  augustss 		case UHF_PORT_SUSPEND:
   3795          1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3796            1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
   3797            1.1  augustss 			break;
   3798            1.1  augustss 		case UHF_PORT_RESET:
   3799          1.166   dsainty 			err = uhci_portreset(sc, index);
   3800          1.166   dsainty 			goto ret;
   3801          1.111  augustss 		case UHF_PORT_POWER:
   3802          1.111  augustss 			/* Pretend we turned on power */
   3803          1.115   mycroft 			err = USBD_NORMAL_COMPLETION;
   3804          1.111  augustss 			goto ret;
   3805            1.1  augustss 		case UHF_C_PORT_CONNECTION:
   3806            1.1  augustss 		case UHF_C_PORT_ENABLE:
   3807            1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   3808            1.1  augustss 		case UHF_PORT_CONNECTION:
   3809            1.1  augustss 		case UHF_PORT_OVER_CURRENT:
   3810            1.1  augustss 		case UHF_PORT_LOW_SPEED:
   3811            1.1  augustss 		case UHF_C_PORT_SUSPEND:
   3812            1.1  augustss 		case UHF_C_PORT_RESET:
   3813            1.1  augustss 		default:
   3814           1.63  augustss 			err = USBD_IOERROR;
   3815            1.1  augustss 			goto ret;
   3816            1.1  augustss 		}
   3817            1.1  augustss 		break;
   3818            1.1  augustss 	default:
   3819           1.63  augustss 		err = USBD_IOERROR;
   3820            1.1  augustss 		goto ret;
   3821            1.1  augustss 	}
   3822           1.63  augustss 	xfer->actlen = totlen;
   3823           1.63  augustss 	err = USBD_NORMAL_COMPLETION;
   3824            1.1  augustss  ret:
   3825           1.63  augustss 	xfer->status = err;
   3826           1.52  augustss 	s = splusb();
   3827           1.63  augustss 	usb_transfer_complete(xfer);
   3828           1.52  augustss 	splx(s);
   3829            1.1  augustss 	return (USBD_IN_PROGRESS);
   3830            1.1  augustss }
   3831            1.1  augustss 
   3832            1.1  augustss /* Abort a root control request. */
   3833            1.1  augustss void
   3834          1.205  christos uhci_root_ctrl_abort(usbd_xfer_handle xfer)
   3835            1.1  augustss {
   3836           1.70  augustss 	/* Nothing to do, all transfers are synchronous. */
   3837            1.1  augustss }
   3838            1.1  augustss 
   3839            1.1  augustss /* Close the root pipe. */
   3840            1.1  augustss void
   3841          1.205  christos uhci_root_ctrl_close(usbd_pipe_handle pipe)
   3842            1.1  augustss {
   3843            1.1  augustss 	DPRINTF(("uhci_root_ctrl_close\n"));
   3844            1.1  augustss }
   3845            1.1  augustss 
   3846            1.1  augustss /* Abort a root interrupt request. */
   3847            1.1  augustss void
   3848          1.119  augustss uhci_root_intr_abort(usbd_xfer_handle xfer)
   3849            1.1  augustss {
   3850           1.63  augustss 	uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
   3851           1.30  augustss 
   3852           1.96  augustss 	usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, xfer);
   3853           1.96  augustss 	sc->sc_intr_xfer = NULL;
   3854           1.58  augustss 
   3855           1.63  augustss 	if (xfer->pipe->intrxfer == xfer) {
   3856           1.58  augustss 		DPRINTF(("uhci_root_intr_abort: remove\n"));
   3857           1.63  augustss 		xfer->pipe->intrxfer = 0;
   3858           1.58  augustss 	}
   3859           1.63  augustss 	xfer->status = USBD_CANCELLED;
   3860           1.96  augustss #ifdef DIAGNOSTIC
   3861           1.96  augustss 	UXFER(xfer)->iinfo.isdone = 1;
   3862           1.96  augustss #endif
   3863           1.63  augustss 	usb_transfer_complete(xfer);
   3864            1.1  augustss }
   3865            1.1  augustss 
   3866           1.16  augustss usbd_status
   3867          1.119  augustss uhci_root_intr_transfer(usbd_xfer_handle xfer)
   3868           1.16  augustss {
   3869           1.63  augustss 	usbd_status err;
   3870           1.16  augustss 
   3871           1.52  augustss 	/* Insert last in queue. */
   3872           1.63  augustss 	err = usb_insert_transfer(xfer);
   3873           1.63  augustss 	if (err)
   3874           1.63  augustss 		return (err);
   3875           1.52  augustss 
   3876          1.186     skrll 	/*
   3877          1.186     skrll 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   3878           1.67  augustss 	 * start first
   3879           1.67  augustss 	 */
   3880           1.63  augustss 	return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   3881           1.16  augustss }
   3882           1.16  augustss 
   3883            1.1  augustss /* Start a transfer on the root interrupt pipe */
   3884            1.1  augustss usbd_status
   3885          1.119  augustss uhci_root_intr_start(usbd_xfer_handle xfer)
   3886            1.1  augustss {
   3887           1.63  augustss 	usbd_pipe_handle pipe = xfer->pipe;
   3888            1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
   3889          1.174  drochner 	unsigned int ival;
   3890            1.1  augustss 
   3891          1.173      gson 	DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n",
   3892           1.63  augustss 		     xfer, xfer->length, xfer->flags));
   3893           1.82  augustss 
   3894           1.82  augustss 	if (sc->sc_dying)
   3895           1.82  augustss 		return (USBD_IOERROR);
   3896            1.1  augustss 
   3897          1.174  drochner 	/* XXX temporary variable needed to avoid gcc3 warning */
   3898          1.174  drochner 	ival = xfer->pipe->endpoint->edesc->bInterval;
   3899          1.174  drochner 	sc->sc_ival = mstohz(ival);
   3900           1.96  augustss 	usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
   3901           1.96  augustss 	sc->sc_intr_xfer = xfer;
   3902            1.1  augustss 	return (USBD_IN_PROGRESS);
   3903            1.1  augustss }
   3904            1.1  augustss 
   3905            1.1  augustss /* Close the root interrupt pipe. */
   3906            1.1  augustss void
   3907          1.119  augustss uhci_root_intr_close(usbd_pipe_handle pipe)
   3908            1.1  augustss {
   3909           1.30  augustss 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
   3910           1.30  augustss 
   3911           1.96  augustss 	usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, sc->sc_intr_xfer);
   3912           1.96  augustss 	sc->sc_intr_xfer = NULL;
   3913            1.1  augustss 	DPRINTF(("uhci_root_intr_close\n"));
   3914            1.1  augustss }
   3915