uhci.c revision 1.208.12.1 1 1.208.12.1 itohy /* $NetBSD: uhci.c,v 1.208.12.1 2007/05/22 14:57:41 itohy Exp $ */
2 1.208.12.1 itohy /* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.172 2006/10/19 01:15:58 iedowse Exp $ */
3 1.1 augustss
4 1.208.12.1 itohy /*-
5 1.208.12.1 itohy * Copyright (c) 1998, 2004, 2007 The NetBSD Foundation, Inc.
6 1.1 augustss * All rights reserved.
7 1.1 augustss *
8 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
9 1.113 augustss * by Lennart Augustsson (lennart (at) augustsson.net) at
10 1.11 augustss * Carlstedt Research & Technology.
11 1.1 augustss *
12 1.1 augustss * Redistribution and use in source and binary forms, with or without
13 1.1 augustss * modification, are permitted provided that the following conditions
14 1.1 augustss * are met:
15 1.1 augustss * 1. Redistributions of source code must retain the above copyright
16 1.1 augustss * notice, this list of conditions and the following disclaimer.
17 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
18 1.1 augustss * notice, this list of conditions and the following disclaimer in the
19 1.1 augustss * documentation and/or other materials provided with the distribution.
20 1.1 augustss * 3. All advertising materials mentioning features or use of this software
21 1.1 augustss * must display the following acknowledgement:
22 1.1 augustss * This product includes software developed by the NetBSD
23 1.1 augustss * Foundation, Inc. and its contributors.
24 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
25 1.1 augustss * contributors may be used to endorse or promote products derived
26 1.1 augustss * from this software without specific prior written permission.
27 1.1 augustss *
28 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
39 1.1 augustss */
40 1.1 augustss
41 1.1 augustss /*
42 1.1 augustss * USB Universal Host Controller driver.
43 1.28 augustss * Handles e.g. PIIX3 and PIIX4.
44 1.1 augustss *
45 1.208.12.1 itohy * UHCI spec: http://developer.intel.com/technology/usb/uhci11d.htm
46 1.208.12.1 itohy * USB spec: http://www.usb.org/developers/docs/
47 1.71 augustss * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
48 1.71 augustss * ftp://download.intel.com/design/intarch/datashts/29056201.pdf
49 1.1 augustss */
50 1.143 lukem
51 1.143 lukem #include <sys/cdefs.h>
52 1.208.12.1 itohy __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.208.12.1 2007/05/22 14:57:41 itohy Exp $");
53 1.208.12.1 itohy /* __FBSDID("$FreeBSD: src/sys/dev/usb/uhci.c,v 1.172 2006/10/19 01:15:58 iedowse Exp $"); */
54 1.1 augustss
55 1.1 augustss #include <sys/param.h>
56 1.1 augustss #include <sys/systm.h>
57 1.1 augustss #include <sys/kernel.h>
58 1.1 augustss #include <sys/malloc.h>
59 1.37 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
60 1.1 augustss #include <sys/device.h>
61 1.67 augustss #include <sys/select.h>
62 1.183 fvdl #include <sys/extent.h>
63 1.183 fvdl #include <uvm/uvm_extern.h>
64 1.13 augustss #elif defined(__FreeBSD__)
65 1.208.12.1 itohy #include <sys/endian.h>
66 1.13 augustss #include <sys/module.h>
67 1.13 augustss #include <sys/bus.h>
68 1.208.12.1 itohy #include <sys/sysctl.h>
69 1.67 augustss #if defined(DIAGNOSTIC) && defined(__i386__)
70 1.67 augustss #include <machine/cpu.h>
71 1.67 augustss #endif
72 1.13 augustss #endif
73 1.1 augustss #include <sys/proc.h>
74 1.1 augustss #include <sys/queue.h>
75 1.1 augustss
76 1.7 augustss #include <machine/bus.h>
77 1.39 augustss #include <machine/endian.h>
78 1.7 augustss
79 1.1 augustss #include <dev/usb/usb.h>
80 1.1 augustss #include <dev/usb/usbdi.h>
81 1.1 augustss #include <dev/usb/usbdivar.h>
82 1.7 augustss #include <dev/usb/usb_mem.h>
83 1.1 augustss #include <dev/usb/usb_quirks.h>
84 1.1 augustss
85 1.1 augustss #include <dev/usb/uhcireg.h>
86 1.1 augustss #include <dev/usb/uhcivar.h>
87 1.1 augustss
88 1.125 augustss /* Use bandwidth reclamation for control transfers. Some devices choke on it. */
89 1.125 augustss /*#define UHCI_CTL_LOOP */
90 1.125 augustss
91 1.13 augustss #if defined(__FreeBSD__)
92 1.13 augustss
93 1.13 augustss #define delay(d) DELAY(d)
94 1.13 augustss #endif
95 1.13 augustss
96 1.208.12.1 itohy #define MS_TO_TICKS(ms) ((ms) * hz / 1000)
97 1.208.12.1 itohy
98 1.37 augustss #if defined(__OpenBSD__)
99 1.37 augustss struct cfdriver uhci_cd = {
100 1.37 augustss NULL, "uhci", DV_DULL
101 1.37 augustss };
102 1.37 augustss #endif
103 1.37 augustss
104 1.208.12.1 itohy #ifdef USB_DEBUG
105 1.92 augustss uhci_softc_t *thesc;
106 1.59 augustss #define DPRINTF(x) if (uhcidebug) printf x
107 1.59 augustss #define DPRINTFN(n,x) if (uhcidebug>(n)) printf x
108 1.67 augustss int uhcidebug = 0;
109 1.125 augustss int uhcinoloop = 0;
110 1.208.12.1 itohy #ifdef __FreeBSD__
111 1.208.12.1 itohy SYSCTL_NODE(_hw_usb, OID_AUTO, uhci, CTLFLAG_RW, 0, "USB uhci");
112 1.208.12.1 itohy SYSCTL_INT(_hw_usb_uhci, OID_AUTO, debug, CTLFLAG_RW,
113 1.208.12.1 itohy &uhcidebug, 0, "uhci debug level");
114 1.208.12.1 itohy SYSCTL_INT(_hw_usb_uhci, OID_AUTO, loop, CTLFLAG_RW,
115 1.208.12.1 itohy &uhcinoloop, 0, "uhci noloop");
116 1.208.12.1 itohy #endif
117 1.122 tv #ifndef __NetBSD__
118 1.122 tv #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
119 1.122 tv #endif
120 1.59 augustss #else
121 1.59 augustss #define DPRINTF(x)
122 1.59 augustss #define DPRINTFN(n,x)
123 1.59 augustss #endif
124 1.59 augustss
125 1.39 augustss /*
126 1.39 augustss * The UHCI controller is little endian, so on big endian machines
127 1.181 drochner * the data stored in memory needs to be swapped.
128 1.39 augustss */
129 1.208.12.1 itohy #if defined(__OpenBSD__)
130 1.39 augustss #if BYTE_ORDER == BIG_ENDIAN
131 1.88 tsutsui #define htole32(x) (bswap32(x))
132 1.88 tsutsui #define le32toh(x) (bswap32(x))
133 1.39 augustss #else
134 1.88 tsutsui #define htole32(x) (x)
135 1.88 tsutsui #define le32toh(x) (x)
136 1.88 tsutsui #endif
137 1.39 augustss #endif
138 1.39 augustss
139 1.1 augustss struct uhci_pipe {
140 1.1 augustss struct usbd_pipe pipe;
141 1.32 augustss int nexttoggle;
142 1.92 augustss
143 1.92 augustss u_char aborting;
144 1.92 augustss usbd_xfer_handle abortstart, abortend;
145 1.92 augustss
146 1.1 augustss /* Info needed for different pipe kinds. */
147 1.1 augustss union {
148 1.1 augustss /* Control pipe */
149 1.1 augustss struct {
150 1.1 augustss uhci_soft_qh_t *sqh;
151 1.7 augustss usb_dma_t reqdma;
152 1.16 augustss uhci_soft_td_t *setup, *stat;
153 1.1 augustss u_int length;
154 1.1 augustss } ctl;
155 1.1 augustss /* Interrupt pipe */
156 1.1 augustss struct {
157 1.1 augustss int npoll;
158 1.187 skrll int isread;
159 1.1 augustss uhci_soft_qh_t **qhs;
160 1.1 augustss } intr;
161 1.1 augustss /* Bulk pipe */
162 1.1 augustss struct {
163 1.1 augustss uhci_soft_qh_t *sqh;
164 1.1 augustss u_int length;
165 1.1 augustss int isread;
166 1.1 augustss } bulk;
167 1.16 augustss /* Iso pipe */
168 1.16 augustss struct iso {
169 1.16 augustss uhci_soft_td_t **stds;
170 1.48 augustss int next, inuse;
171 1.16 augustss } iso;
172 1.1 augustss } u;
173 1.1 augustss };
174 1.1 augustss
175 1.142 augustss Static void uhci_globalreset(uhci_softc_t *);
176 1.166 dsainty Static usbd_status uhci_portreset(uhci_softc_t*, int);
177 1.142 augustss Static void uhci_reset(uhci_softc_t *);
178 1.119 augustss Static usbd_status uhci_run(uhci_softc_t *, int run);
179 1.208.12.1 itohy Static usbd_status uhci_grow_std(uhci_softc_t *);
180 1.123 augustss Static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *);
181 1.208.12.1 itohy Static uhci_soft_td_t *uhci_alloc_std_norsv(uhci_softc_t *);
182 1.119 augustss Static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *);
183 1.208.12.1 itohy Static void uhci_free_std_norsv(uhci_softc_t *, uhci_soft_td_t *);
184 1.123 augustss Static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *);
185 1.119 augustss Static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *);
186 1.208.12.1 itohy Static void uhci_free_desc_chunks(uhci_softc_t *,
187 1.208.12.1 itohy struct uhci_mdescs *);
188 1.208.12.1 itohy Static void uhci_aux_mem_init(struct uhci_aux_mem *);
189 1.208.12.1 itohy Static usbd_status uhci_aux_mem_alloc(uhci_softc_t *,
190 1.208.12.1 itohy struct uhci_aux_mem *,
191 1.208.12.1 itohy int /*naux*/, int /*maxp*/);
192 1.208.12.1 itohy Static void uhci_aux_mem_free(uhci_softc_t *,
193 1.208.12.1 itohy struct uhci_aux_mem *);
194 1.208.12.1 itohy Static void uhci_aux_dma_alloc(uhci_soft_td_t *,
195 1.208.12.1 itohy struct uhci_aux_mem *, void */*data*/, int /*len*/);
196 1.208.12.1 itohy #if 0
197 1.208.12.1 itohy Static uhci_physaddr_t uhci_aux_dma_prepare(uhci_softc_t *sc,
198 1.208.12.1 itohy uhci_soft_td_t *, int);
199 1.208.12.1 itohy Static void uhci_aux_dma_complete(uhci_softc_t *sc,
200 1.208.12.1 itohy uhci_soft_td_t *, int);
201 1.208.12.1 itohy #endif
202 1.208.12.1 itohy Static void uhci_aux_dma_complete(uhci_soft_td_t *,
203 1.208.12.1 itohy struct uhci_aux_mem *, int /*isread*/);
204 1.208.12.1 itohy Static void uhci_aux_dma_sync(uhci_softc_t *,
205 1.208.12.1 itohy struct uhci_aux_mem *, int /*op*/);
206 1.16 augustss #if 0
207 1.119 augustss Static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *,
208 1.119 augustss uhci_intr_info_t *);
209 1.119 augustss Static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *);
210 1.16 augustss #endif
211 1.1 augustss
212 1.152 augustss Static void uhci_free_std_chain(uhci_softc_t *,
213 1.119 augustss uhci_soft_td_t *, uhci_soft_td_t *);
214 1.119 augustss Static usbd_status uhci_alloc_std_chain(struct uhci_pipe *,
215 1.208.12.1 itohy uhci_softc_t *, int, int, u_int16_t,
216 1.208.12.1 itohy usbd_xfer_handle xfer,
217 1.119 augustss uhci_soft_td_t **, uhci_soft_td_t **);
218 1.119 augustss Static void uhci_poll_hub(void *);
219 1.119 augustss Static void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle);
220 1.119 augustss Static void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *);
221 1.119 augustss Static void uhci_idone(uhci_intr_info_t *);
222 1.119 augustss
223 1.119 augustss Static void uhci_abort_xfer(usbd_xfer_handle, usbd_status status);
224 1.208.12.1 itohy Static void uhci_transfer_complete(usbd_xfer_handle xfer);
225 1.119 augustss
226 1.119 augustss Static void uhci_timeout(void *);
227 1.153 augustss Static void uhci_timeout_task(void *);
228 1.123 augustss Static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
229 1.123 augustss Static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
230 1.119 augustss Static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *);
231 1.123 augustss Static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
232 1.123 augustss Static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
233 1.119 augustss Static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *);
234 1.189 christos Static int uhci_str(usb_string_descriptor_t *, int, const char *);
235 1.123 augustss Static void uhci_add_loop(uhci_softc_t *sc);
236 1.123 augustss Static void uhci_rem_loop(uhci_softc_t *sc);
237 1.119 augustss
238 1.119 augustss Static usbd_status uhci_setup_isoc(usbd_pipe_handle pipe);
239 1.119 augustss Static void uhci_device_isoc_enter(usbd_xfer_handle);
240 1.119 augustss
241 1.208.12.1 itohy Static usbd_status uhci_prealloc(struct uhci_softc *,
242 1.208.12.1 itohy struct uhci_xfer *, size_t /*bufsize*/,
243 1.208.12.1 itohy int /*nseg*/);
244 1.208.12.1 itohy Static usbd_status uhci_allocm(struct usbd_bus *, usbd_xfer_handle,
245 1.208.12.1 itohy void *, size_t);
246 1.208.12.1 itohy Static void uhci_freem(struct usbd_bus *, usbd_xfer_handle,
247 1.208.12.1 itohy enum usbd_waitflg);
248 1.208.12.1 itohy
249 1.208.12.1 itohy Static usbd_status uhci_map_alloc(usbd_xfer_handle);
250 1.208.12.1 itohy Static void uhci_map_free(usbd_xfer_handle);
251 1.208.12.1 itohy Static void uhci_mapm(usbd_xfer_handle, void *, size_t);
252 1.208.12.1 itohy Static void uhci_mapm_mbuf(usbd_xfer_handle, struct mbuf *);
253 1.208.12.1 itohy Static void uhci_unmapm(usbd_xfer_handle);
254 1.119 augustss
255 1.208.12.1 itohy Static usbd_xfer_handle uhci_allocx(struct usbd_bus *, usbd_pipe_handle,
256 1.208.12.1 itohy enum usbd_waitflg);
257 1.119 augustss Static void uhci_freex(struct usbd_bus *, usbd_xfer_handle);
258 1.119 augustss
259 1.119 augustss Static usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle);
260 1.119 augustss Static usbd_status uhci_device_ctrl_start(usbd_xfer_handle);
261 1.119 augustss Static void uhci_device_ctrl_abort(usbd_xfer_handle);
262 1.119 augustss Static void uhci_device_ctrl_close(usbd_pipe_handle);
263 1.119 augustss Static void uhci_device_ctrl_done(usbd_xfer_handle);
264 1.119 augustss
265 1.119 augustss Static usbd_status uhci_device_intr_transfer(usbd_xfer_handle);
266 1.119 augustss Static usbd_status uhci_device_intr_start(usbd_xfer_handle);
267 1.119 augustss Static void uhci_device_intr_abort(usbd_xfer_handle);
268 1.119 augustss Static void uhci_device_intr_close(usbd_pipe_handle);
269 1.119 augustss Static void uhci_device_intr_done(usbd_xfer_handle);
270 1.119 augustss
271 1.119 augustss Static usbd_status uhci_device_bulk_transfer(usbd_xfer_handle);
272 1.119 augustss Static usbd_status uhci_device_bulk_start(usbd_xfer_handle);
273 1.119 augustss Static void uhci_device_bulk_abort(usbd_xfer_handle);
274 1.119 augustss Static void uhci_device_bulk_close(usbd_pipe_handle);
275 1.119 augustss Static void uhci_device_bulk_done(usbd_xfer_handle);
276 1.119 augustss
277 1.119 augustss Static usbd_status uhci_device_isoc_transfer(usbd_xfer_handle);
278 1.119 augustss Static usbd_status uhci_device_isoc_start(usbd_xfer_handle);
279 1.119 augustss Static void uhci_device_isoc_abort(usbd_xfer_handle);
280 1.119 augustss Static void uhci_device_isoc_close(usbd_pipe_handle);
281 1.119 augustss Static void uhci_device_isoc_done(usbd_xfer_handle);
282 1.119 augustss
283 1.119 augustss Static usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle);
284 1.119 augustss Static usbd_status uhci_root_ctrl_start(usbd_xfer_handle);
285 1.119 augustss Static void uhci_root_ctrl_abort(usbd_xfer_handle);
286 1.119 augustss Static void uhci_root_ctrl_close(usbd_pipe_handle);
287 1.119 augustss Static void uhci_root_ctrl_done(usbd_xfer_handle);
288 1.119 augustss
289 1.119 augustss Static usbd_status uhci_root_intr_transfer(usbd_xfer_handle);
290 1.119 augustss Static usbd_status uhci_root_intr_start(usbd_xfer_handle);
291 1.119 augustss Static void uhci_root_intr_abort(usbd_xfer_handle);
292 1.119 augustss Static void uhci_root_intr_close(usbd_pipe_handle);
293 1.119 augustss Static void uhci_root_intr_done(usbd_xfer_handle);
294 1.119 augustss
295 1.119 augustss Static usbd_status uhci_open(usbd_pipe_handle);
296 1.119 augustss Static void uhci_poll(struct usbd_bus *);
297 1.133 augustss Static void uhci_softintr(void *);
298 1.119 augustss
299 1.119 augustss Static usbd_status uhci_device_request(usbd_xfer_handle xfer);
300 1.119 augustss
301 1.119 augustss Static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *);
302 1.158 augustss Static void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *);
303 1.152 augustss Static usbd_status uhci_device_setintr(uhci_softc_t *sc,
304 1.119 augustss struct uhci_pipe *pipe, int ival);
305 1.119 augustss
306 1.119 augustss Static void uhci_device_clear_toggle(usbd_pipe_handle pipe);
307 1.119 augustss Static void uhci_noop(usbd_pipe_handle pipe);
308 1.119 augustss
309 1.192 perry Static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *,
310 1.208.12.1 itohy uhci_soft_qh_t *);
311 1.119 augustss
312 1.208.12.1 itohy #ifdef USB_DEBUG
313 1.119 augustss Static void uhci_dump_all(uhci_softc_t *);
314 1.119 augustss Static void uhci_dumpregs(uhci_softc_t *);
315 1.119 augustss Static void uhci_dump_qhs(uhci_soft_qh_t *);
316 1.119 augustss Static void uhci_dump_qh(uhci_soft_qh_t *);
317 1.119 augustss Static void uhci_dump_tds(uhci_soft_td_t *);
318 1.119 augustss Static void uhci_dump_td(uhci_soft_td_t *);
319 1.119 augustss Static void uhci_dump_ii(uhci_intr_info_t *ii);
320 1.119 augustss void uhci_dump(void);
321 1.1 augustss #endif
322 1.1 augustss
323 1.112 augustss #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
324 1.112 augustss BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
325 1.112 augustss #define UWRITE1(sc, r, x) \
326 1.165 dsainty do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \
327 1.165 dsainty } while (/*CONSTCOND*/0)
328 1.112 augustss #define UWRITE2(sc, r, x) \
329 1.165 dsainty do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \
330 1.165 dsainty } while (/*CONSTCOND*/0)
331 1.112 augustss #define UWRITE4(sc, r, x) \
332 1.165 dsainty do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \
333 1.165 dsainty } while (/*CONSTCOND*/0)
334 1.196 mrg static __inline uint8_t
335 1.196 mrg UREAD1(uhci_softc_t *sc, bus_size_t r)
336 1.196 mrg {
337 1.196 mrg
338 1.196 mrg UBARR(sc);
339 1.196 mrg return bus_space_read_1(sc->iot, sc->ioh, r);
340 1.196 mrg }
341 1.196 mrg
342 1.196 mrg static __inline uint16_t
343 1.196 mrg UREAD2(uhci_softc_t *sc, bus_size_t r)
344 1.196 mrg {
345 1.196 mrg
346 1.196 mrg UBARR(sc);
347 1.196 mrg return bus_space_read_2(sc->iot, sc->ioh, r);
348 1.196 mrg }
349 1.196 mrg
350 1.196 mrg static __inline uint32_t
351 1.196 mrg UREAD4(uhci_softc_t *sc, bus_size_t r)
352 1.196 mrg {
353 1.196 mrg
354 1.196 mrg UBARR(sc);
355 1.196 mrg return bus_space_read_4(sc->iot, sc->ioh, r);
356 1.196 mrg }
357 1.1 augustss
358 1.1 augustss #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
359 1.1 augustss #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
360 1.1 augustss
361 1.142 augustss #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */
362 1.1 augustss
363 1.1 augustss #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
364 1.1 augustss
365 1.1 augustss #define UHCI_INTR_ENDPT 1
366 1.1 augustss
367 1.208 drochner const struct usbd_bus_methods uhci_bus_methods = {
368 1.48 augustss uhci_open,
369 1.85 augustss uhci_softintr,
370 1.48 augustss uhci_poll,
371 1.48 augustss uhci_allocm,
372 1.48 augustss uhci_freem,
373 1.208.12.1 itohy uhci_map_alloc,
374 1.208.12.1 itohy uhci_map_free,
375 1.208.12.1 itohy uhci_mapm,
376 1.208.12.1 itohy uhci_mapm_mbuf,
377 1.208.12.1 itohy uhci_unmapm,
378 1.76 augustss uhci_allocx,
379 1.76 augustss uhci_freex,
380 1.48 augustss };
381 1.48 augustss
382 1.208 drochner const struct usbd_pipe_methods uhci_root_ctrl_methods = {
383 1.1 augustss uhci_root_ctrl_transfer,
384 1.16 augustss uhci_root_ctrl_start,
385 1.1 augustss uhci_root_ctrl_abort,
386 1.1 augustss uhci_root_ctrl_close,
387 1.38 augustss uhci_noop,
388 1.84 augustss uhci_root_ctrl_done,
389 1.1 augustss };
390 1.1 augustss
391 1.208 drochner const struct usbd_pipe_methods uhci_root_intr_methods = {
392 1.1 augustss uhci_root_intr_transfer,
393 1.16 augustss uhci_root_intr_start,
394 1.1 augustss uhci_root_intr_abort,
395 1.1 augustss uhci_root_intr_close,
396 1.38 augustss uhci_noop,
397 1.41 augustss uhci_root_intr_done,
398 1.1 augustss };
399 1.1 augustss
400 1.208 drochner const struct usbd_pipe_methods uhci_device_ctrl_methods = {
401 1.1 augustss uhci_device_ctrl_transfer,
402 1.16 augustss uhci_device_ctrl_start,
403 1.1 augustss uhci_device_ctrl_abort,
404 1.1 augustss uhci_device_ctrl_close,
405 1.38 augustss uhci_noop,
406 1.41 augustss uhci_device_ctrl_done,
407 1.1 augustss };
408 1.1 augustss
409 1.208 drochner const struct usbd_pipe_methods uhci_device_intr_methods = {
410 1.1 augustss uhci_device_intr_transfer,
411 1.16 augustss uhci_device_intr_start,
412 1.1 augustss uhci_device_intr_abort,
413 1.1 augustss uhci_device_intr_close,
414 1.38 augustss uhci_device_clear_toggle,
415 1.41 augustss uhci_device_intr_done,
416 1.1 augustss };
417 1.1 augustss
418 1.208 drochner const struct usbd_pipe_methods uhci_device_bulk_methods = {
419 1.1 augustss uhci_device_bulk_transfer,
420 1.16 augustss uhci_device_bulk_start,
421 1.1 augustss uhci_device_bulk_abort,
422 1.1 augustss uhci_device_bulk_close,
423 1.38 augustss uhci_device_clear_toggle,
424 1.41 augustss uhci_device_bulk_done,
425 1.1 augustss };
426 1.1 augustss
427 1.208 drochner const struct usbd_pipe_methods uhci_device_isoc_methods = {
428 1.16 augustss uhci_device_isoc_transfer,
429 1.16 augustss uhci_device_isoc_start,
430 1.16 augustss uhci_device_isoc_abort,
431 1.16 augustss uhci_device_isoc_close,
432 1.38 augustss uhci_noop,
433 1.41 augustss uhci_device_isoc_done,
434 1.16 augustss };
435 1.16 augustss
436 1.92 augustss #define uhci_add_intr_info(sc, ii) \
437 1.169 augustss LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list)
438 1.92 augustss #define uhci_del_intr_info(ii) \
439 1.169 augustss do { \
440 1.169 augustss LIST_REMOVE((ii), list); \
441 1.169 augustss (ii)->list.le_prev = NULL; \
442 1.169 augustss } while (0)
443 1.169 augustss #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL)
444 1.92 augustss
445 1.192 perry Static inline uhci_soft_qh_t *
446 1.119 augustss uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh)
447 1.92 augustss {
448 1.92 augustss DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh));
449 1.92 augustss
450 1.92 augustss for (; pqh->hlink != sqh; pqh = pqh->hlink) {
451 1.208.12.1 itohy #if defined(DIAGNOSTIC) || defined(USB_DEBUG)
452 1.92 augustss if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) {
453 1.102 augustss printf("uhci_find_prev_qh: QH not found\n");
454 1.92 augustss return (NULL);
455 1.92 augustss }
456 1.92 augustss #endif
457 1.92 augustss }
458 1.92 augustss return (pqh);
459 1.92 augustss }
460 1.92 augustss
461 1.1 augustss void
462 1.142 augustss uhci_globalreset(uhci_softc_t *sc)
463 1.1 augustss {
464 1.1 augustss UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */
465 1.20 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
466 1.1 augustss UHCICMD(sc, 0); /* do nothing */
467 1.1 augustss }
468 1.1 augustss
469 1.1 augustss usbd_status
470 1.119 augustss uhci_init(uhci_softc_t *sc)
471 1.1 augustss {
472 1.63 augustss usbd_status err;
473 1.1 augustss int i, j;
474 1.123 augustss uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh;
475 1.1 augustss uhci_soft_td_t *std;
476 1.1 augustss
477 1.1 augustss DPRINTFN(1,("uhci_init: start\n"));
478 1.1 augustss
479 1.208.12.1 itohy #ifdef USB_DEBUG
480 1.92 augustss thesc = sc;
481 1.92 augustss
482 1.1 augustss if (uhcidebug > 2)
483 1.1 augustss uhci_dumpregs(sc);
484 1.1 augustss #endif
485 1.1 augustss
486 1.1 augustss UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
487 1.142 augustss uhci_globalreset(sc); /* reset the controller */
488 1.142 augustss uhci_reset(sc);
489 1.24 augustss
490 1.208.12.1 itohy usb_dma_tag_init(&sc->sc_dmatag);
491 1.183 fvdl
492 1.1 augustss /* Allocate and initialize real frame array. */
493 1.208.12.1 itohy err = usb_allocmem(&sc->sc_dmatag,
494 1.63 augustss UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
495 1.63 augustss UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
496 1.63 augustss if (err)
497 1.63 augustss return (err);
498 1.159 augustss sc->sc_pframes = KERNADDR(&sc->sc_dma, 0);
499 1.1 augustss UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */
500 1.160 augustss UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/
501 1.1 augustss
502 1.152 augustss /*
503 1.123 augustss * Allocate a TD, inactive, that hangs from the last QH.
504 1.123 augustss * This is to avoid a bug in the PIIX that makes it run berserk
505 1.123 augustss * otherwise.
506 1.123 augustss */
507 1.208.12.1 itohy std = uhci_alloc_std_norsv(sc);
508 1.123 augustss if (std == NULL)
509 1.123 augustss return (USBD_NOMEM);
510 1.123 augustss std->link.std = NULL;
511 1.123 augustss std->td.td_link = htole32(UHCI_PTR_T);
512 1.123 augustss std->td.td_status = htole32(0); /* inactive */
513 1.123 augustss std->td.td_token = htole32(0);
514 1.123 augustss std->td.td_buffer = htole32(0);
515 1.208.12.1 itohy UHCI_STD_SYNC(sc, std, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
516 1.123 augustss
517 1.123 augustss /* Allocate the dummy QH marking the end and used for looping the QHs.*/
518 1.123 augustss lsqh = uhci_alloc_sqh(sc);
519 1.123 augustss if (lsqh == NULL)
520 1.123 augustss return (USBD_NOMEM);
521 1.123 augustss lsqh->hlink = NULL;
522 1.123 augustss lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */
523 1.123 augustss lsqh->elink = std;
524 1.208.12.1 itohy lsqh->qh.qh_elink = htole32(UHCI_STD_DMAADDR(std) | UHCI_PTR_TD);
525 1.208.12.1 itohy UHCI_SQH_SYNC(sc, lsqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
526 1.123 augustss sc->sc_last_qh = lsqh;
527 1.123 augustss
528 1.1 augustss /* Allocate the dummy QH where bulk traffic will be queued. */
529 1.1 augustss bsqh = uhci_alloc_sqh(sc);
530 1.63 augustss if (bsqh == NULL)
531 1.1 augustss return (USBD_NOMEM);
532 1.123 augustss bsqh->hlink = lsqh;
533 1.208.12.1 itohy bsqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(lsqh) | UHCI_PTR_QH);
534 1.121 augustss bsqh->elink = NULL;
535 1.88 tsutsui bsqh->qh.qh_elink = htole32(UHCI_PTR_T);
536 1.208.12.1 itohy UHCI_SQH_SYNC(sc, bsqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
537 1.1 augustss sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
538 1.1 augustss
539 1.123 augustss /* Allocate dummy QH where high speed control traffic will be queued. */
540 1.123 augustss chsqh = uhci_alloc_sqh(sc);
541 1.123 augustss if (chsqh == NULL)
542 1.123 augustss return (USBD_NOMEM);
543 1.123 augustss chsqh->hlink = bsqh;
544 1.208.12.1 itohy chsqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(bsqh) | UHCI_PTR_QH);
545 1.123 augustss chsqh->elink = NULL;
546 1.123 augustss chsqh->qh.qh_elink = htole32(UHCI_PTR_T);
547 1.208.12.1 itohy UHCI_SQH_SYNC(sc, chsqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
548 1.123 augustss sc->sc_hctl_start = sc->sc_hctl_end = chsqh;
549 1.123 augustss
550 1.123 augustss /* Allocate dummy QH where control traffic will be queued. */
551 1.123 augustss clsqh = uhci_alloc_sqh(sc);
552 1.123 augustss if (clsqh == NULL)
553 1.1 augustss return (USBD_NOMEM);
554 1.208.12.1 itohy clsqh->hlink = chsqh;
555 1.208.12.1 itohy clsqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(chsqh) | UHCI_PTR_QH);
556 1.123 augustss clsqh->elink = NULL;
557 1.123 augustss clsqh->qh.qh_elink = htole32(UHCI_PTR_T);
558 1.208.12.1 itohy UHCI_SQH_SYNC(sc, clsqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
559 1.123 augustss sc->sc_lctl_start = sc->sc_lctl_end = clsqh;
560 1.1 augustss
561 1.152 augustss /*
562 1.1 augustss * Make all (virtual) frame list pointers point to the interrupt
563 1.1 augustss * queue heads and the interrupt queue heads at the control
564 1.1 augustss * queue head and point the physical frame list to the virtual.
565 1.1 augustss */
566 1.1 augustss for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
567 1.208.12.1 itohy std = uhci_alloc_std_norsv(sc);
568 1.1 augustss sqh = uhci_alloc_sqh(sc);
569 1.208.12.1 itohy if (std == NULL || sqh == NULL) {
570 1.208.12.1 itohy if (std)
571 1.208.12.1 itohy uhci_free_std_norsv(sc, std);
572 1.208.12.1 itohy /* XXX free resources */
573 1.13 augustss return (USBD_NOMEM);
574 1.208.12.1 itohy }
575 1.42 augustss std->link.sqh = sqh;
576 1.208.12.1 itohy std->td.td_link = htole32(UHCI_SQH_DMAADDR(sqh) | UHCI_PTR_QH);
577 1.88 tsutsui std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
578 1.88 tsutsui std->td.td_token = htole32(0);
579 1.88 tsutsui std->td.td_buffer = htole32(0);
580 1.208.12.1 itohy UHCI_STD_SYNC(sc, std,
581 1.208.12.1 itohy BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
582 1.123 augustss sqh->hlink = clsqh;
583 1.208.12.1 itohy sqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(clsqh) | UHCI_PTR_QH);
584 1.121 augustss sqh->elink = NULL;
585 1.88 tsutsui sqh->qh.qh_elink = htole32(UHCI_PTR_T);
586 1.208.12.1 itohy UHCI_SQH_SYNC(sc, sqh,
587 1.208.12.1 itohy BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
588 1.1 augustss sc->sc_vframes[i].htd = std;
589 1.1 augustss sc->sc_vframes[i].etd = std;
590 1.1 augustss sc->sc_vframes[i].hqh = sqh;
591 1.1 augustss sc->sc_vframes[i].eqh = sqh;
592 1.152 augustss for (j = i;
593 1.152 augustss j < UHCI_FRAMELIST_COUNT;
594 1.1 augustss j += UHCI_VFRAMELIST_COUNT)
595 1.208.12.1 itohy sc->sc_pframes[j] = htole32(UHCI_STD_DMAADDR(std));
596 1.1 augustss }
597 1.1 augustss
598 1.1 augustss LIST_INIT(&sc->sc_intrhead);
599 1.1 augustss
600 1.76 augustss SIMPLEQ_INIT(&sc->sc_free_xfers);
601 1.76 augustss
602 1.96 augustss usb_callout_init(sc->sc_poll_handle);
603 1.96 augustss
604 1.1 augustss /* Set up the bus struct. */
605 1.48 augustss sc->sc_bus.methods = &uhci_bus_methods;
606 1.1 augustss sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
607 1.1 augustss
608 1.30 augustss sc->sc_suspend = PWR_RESUME;
609 1.208.12.1 itohy #if defined(__NetBSD__) || defined(__OpenBSD__)
610 1.200 jmcneill sc->sc_powerhook = powerhook_establish(USBDEVNAME(sc->sc_bus.bdev),
611 1.200 jmcneill uhci_power, sc);
612 1.72 augustss sc->sc_shutdownhook = shutdownhook_establish(uhci_shutdown, sc);
613 1.92 augustss #endif
614 1.72 augustss
615 1.190 augustss UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */
616 1.190 augustss
617 1.1 augustss DPRINTFN(1,("uhci_init: enabling\n"));
618 1.152 augustss UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
619 1.1 augustss UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */
620 1.1 augustss
621 1.16 augustss return (uhci_run(sc, 1)); /* and here we go... */
622 1.53 augustss }
623 1.53 augustss
624 1.67 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
625 1.53 augustss int
626 1.208.12.1 itohy uhci_activate(device_t self, enum devact act)
627 1.53 augustss {
628 1.56 augustss struct uhci_softc *sc = (struct uhci_softc *)self;
629 1.53 augustss int rv = 0;
630 1.53 augustss
631 1.53 augustss switch (act) {
632 1.53 augustss case DVACT_ACTIVATE:
633 1.53 augustss return (EOPNOTSUPP);
634 1.53 augustss
635 1.53 augustss case DVACT_DEACTIVATE:
636 1.56 augustss if (sc->sc_child != NULL)
637 1.56 augustss rv = config_deactivate(sc->sc_child);
638 1.53 augustss break;
639 1.53 augustss }
640 1.53 augustss return (rv);
641 1.53 augustss }
642 1.208.12.1 itohy #endif
643 1.53 augustss
644 1.53 augustss int
645 1.119 augustss uhci_detach(struct uhci_softc *sc, int flags)
646 1.53 augustss {
647 1.76 augustss usbd_xfer_handle xfer;
648 1.53 augustss int rv = 0;
649 1.53 augustss
650 1.208.12.1 itohy #if defined(__NetBSD__) || defined(__OpenBSD__)
651 1.53 augustss if (sc->sc_child != NULL)
652 1.53 augustss rv = config_detach(sc->sc_child, flags);
653 1.152 augustss
654 1.53 augustss if (rv != 0)
655 1.53 augustss return (rv);
656 1.208.12.1 itohy #else
657 1.208.12.1 itohy sc->sc_dying = 1;
658 1.208.12.1 itohy #endif
659 1.208.12.1 itohy
660 1.208.12.1 itohy #if defined(__NetBSD__) || defined(__OpenBSD__)
661 1.208.12.1 itohy /* Don't touch hardware if it has already been gone. */
662 1.208.12.1 itohy if ((flags & DETACH_FORCE) == 0)
663 1.208.12.1 itohy #endif
664 1.208.12.1 itohy {
665 1.208.12.1 itohy UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
666 1.208.12.1 itohy uhci_run(sc, 0);
667 1.208.12.1 itohy }
668 1.53 augustss
669 1.92 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
670 1.53 augustss powerhook_disestablish(sc->sc_powerhook);
671 1.72 augustss shutdownhook_disestablish(sc->sc_shutdownhook);
672 1.92 augustss #endif
673 1.72 augustss
674 1.76 augustss /* Free all xfers associated with this HC. */
675 1.208.12.1 itohy while ((xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers)) == NULL) {
676 1.161 lukem SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
677 1.208.12.1 itohy usb_clean_buffer_dma(&sc->sc_dmatag, &UXFER(xfer)->dmabuf);
678 1.76 augustss free(xfer, M_USB);
679 1.152 augustss }
680 1.76 augustss
681 1.76 augustss /* XXX free other data structures XXX */
682 1.208.12.1 itohy usb_freemem(&sc->sc_dmatag, &sc->sc_dma);
683 1.208.12.1 itohy
684 1.208.12.1 itohy uhci_free_desc_chunks(sc, &sc->sc_std_chunks);
685 1.208.12.1 itohy uhci_free_desc_chunks(sc, &sc->sc_sqh_chunks);
686 1.208.12.1 itohy usb_dma_tag_finish(&sc->sc_dmatag);
687 1.53 augustss
688 1.53 augustss return (rv);
689 1.1 augustss }
690 1.208.12.1 itohy
691 1.208.12.1 itohy Static usbd_status
692 1.208.12.1 itohy uhci_prealloc(struct uhci_softc *sc, struct uhci_xfer *uxfer,
693 1.208.12.1 itohy size_t bufsize, int nseg)
694 1.208.12.1 itohy {
695 1.208.12.1 itohy struct usbd_pipe *pipe;
696 1.208.12.1 itohy int maxp, ntd, naux;
697 1.208.12.1 itohy int s;
698 1.208.12.1 itohy int err;
699 1.208.12.1 itohy
700 1.208.12.1 itohy pipe = uxfer->xfer.pipe;
701 1.208.12.1 itohy maxp = UE_MAXPKTSZ(pipe->endpoint->edesc);
702 1.208.12.1 itohy
703 1.208.12.1 itohy if (maxp == 0 || maxp > UHCI_MAX_PKT_SIZE)
704 1.208.12.1 itohy return (USBD_INVAL);
705 1.208.12.1 itohy
706 1.208.12.1 itohy /* estimate needed number of TDs */
707 1.208.12.1 itohy if ((pipe->endpoint->edesc->bmAttributes & UE_XFERTYPE) ==
708 1.208.12.1 itohy UE_ISOCHRONOUS) {
709 1.208.12.1 itohy /* isochronous: TDs are allocated when uhci_open() is called */
710 1.208.12.1 itohy ntd = 0;
711 1.208.12.1 itohy } else {
712 1.208.12.1 itohy /* UHCI: one TD per packet */
713 1.208.12.1 itohy ntd = (bufsize + maxp - 1) / maxp;
714 1.208.12.1 itohy }
715 1.208.12.1 itohy
716 1.208.12.1 itohy /* estimate needed aux segments */
717 1.208.12.1 itohy naux = nseg - 1;
718 1.208.12.1 itohy
719 1.208.12.1 itohy /* pre-allocate aux memory */
720 1.208.12.1 itohy err = uhci_aux_mem_alloc(sc, &uxfer->aux, naux, maxp);
721 1.208.12.1 itohy if (err)
722 1.208.12.1 itohy return err;
723 1.208.12.1 itohy
724 1.208.12.1 itohy s = splusb();
725 1.208.12.1 itohy /* pre-allocate TDs */
726 1.208.12.1 itohy while (sc->sc_nfreetds < ntd) {
727 1.208.12.1 itohy DPRINTF(("%s: uhci_prealloc: need %d TD (%d cur)\n",
728 1.208.12.1 itohy USBDEVNAME(sc->sc_bus.bdev),
729 1.208.12.1 itohy ntd, sc->sc_nfreetds));
730 1.208.12.1 itohy if ((err = uhci_grow_std(sc)) != USBD_NORMAL_COMPLETION)
731 1.208.12.1 itohy break;
732 1.208.12.1 itohy }
733 1.208.12.1 itohy if (!err) {
734 1.208.12.1 itohy sc->sc_nfreetds -= ntd;
735 1.208.12.1 itohy uxfer->rsvd_tds = ntd;
736 1.208.12.1 itohy }
737 1.208.12.1 itohy splx(s);
738 1.208.12.1 itohy
739 1.208.12.1 itohy if (err)
740 1.208.12.1 itohy uhci_aux_mem_free(sc, &uxfer->aux);
741 1.208.12.1 itohy
742 1.208.12.1 itohy return err;
743 1.208.12.1 itohy }
744 1.1 augustss
745 1.48 augustss usbd_status
746 1.208.12.1 itohy uhci_allocm(struct usbd_bus *bus, usbd_xfer_handle xfer, void *buf, size_t size)
747 1.48 augustss {
748 1.102 augustss struct uhci_softc *sc = (struct uhci_softc *)bus;
749 1.208.12.1 itohy struct uhci_xfer *uxfer = UXFER(xfer);
750 1.208.12.1 itohy usbd_status err;
751 1.102 augustss
752 1.208.12.1 itohy if ((err = usb_alloc_buffer_dma(&sc->sc_dmatag, &UXFER(xfer)->dmabuf,
753 1.208.12.1 itohy buf, size, &xfer->hcbuffer)) == USBD_NORMAL_COMPLETION) {
754 1.208.12.1 itohy if ((xfer->rqflags & URQ_DEV_MAP_PREPARED) == 0 &&
755 1.208.12.1 itohy (err = uhci_prealloc(sc, uxfer, size,
756 1.208.12.1 itohy USB_BUFFER_NSEGS(&uxfer->dmabuf)))
757 1.208.12.1 itohy != USBD_NORMAL_COMPLETION) {
758 1.208.12.1 itohy usb_free_buffer_dma(&sc->sc_dmatag, &uxfer->dmabuf,
759 1.208.12.1 itohy U_WAITOK);
760 1.208.12.1 itohy }
761 1.102 augustss }
762 1.102 augustss
763 1.208.12.1 itohy return err;
764 1.48 augustss }
765 1.48 augustss
766 1.48 augustss void
767 1.208.12.1 itohy uhci_freem(struct usbd_bus *bus, usbd_xfer_handle xfer,
768 1.208.12.1 itohy enum usbd_waitflg waitflg)
769 1.48 augustss {
770 1.208.12.1 itohy struct uhci_softc *sc = (struct uhci_softc *)bus;
771 1.208.12.1 itohy struct uhci_xfer *uxfer = UXFER(xfer);
772 1.208.12.1 itohy int s;
773 1.208.12.1 itohy
774 1.208.12.1 itohy usb_free_buffer_dma(&sc->sc_dmatag, &UXFER(xfer)->dmabuf, waitflg);
775 1.208.12.1 itohy
776 1.208.12.1 itohy if ((xfer->rqflags & URQ_DEV_MAP_PREPARED) == 0) {
777 1.208.12.1 itohy s = splusb();
778 1.208.12.1 itohy sc->sc_nfreetds += uxfer->rsvd_tds;
779 1.208.12.1 itohy splx(s);
780 1.208.12.1 itohy uxfer->rsvd_tds = 0;
781 1.208.12.1 itohy uhci_aux_mem_free(sc, &uxfer->aux);
782 1.183 fvdl }
783 1.208.12.1 itohy }
784 1.208.12.1 itohy
785 1.208.12.1 itohy Static usbd_status
786 1.208.12.1 itohy uhci_map_alloc(usbd_xfer_handle xfer)
787 1.208.12.1 itohy {
788 1.208.12.1 itohy struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus;
789 1.208.12.1 itohy struct uhci_xfer *uxfer = UXFER(xfer);
790 1.208.12.1 itohy usbd_status st;
791 1.208.12.1 itohy
792 1.208.12.1 itohy st = usb_alloc_dma_resources(&sc->sc_dmatag, &uxfer->dmabuf);
793 1.208.12.1 itohy if (st)
794 1.208.12.1 itohy return st;
795 1.208.12.1 itohy
796 1.208.12.1 itohy if ((st = uhci_prealloc(sc, uxfer, MAXPHYS, USB_DMA_NSEG))) {
797 1.208.12.1 itohy usb_free_dma_resources(&sc->sc_dmatag, &uxfer->dmabuf);
798 1.208.12.1 itohy }
799 1.208.12.1 itohy
800 1.208.12.1 itohy return st;
801 1.208.12.1 itohy }
802 1.208.12.1 itohy
803 1.208.12.1 itohy Static void
804 1.208.12.1 itohy uhci_map_free(usbd_xfer_handle xfer)
805 1.208.12.1 itohy {
806 1.208.12.1 itohy struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus;
807 1.208.12.1 itohy struct uhci_xfer *uxfer = UXFER(xfer);
808 1.208.12.1 itohy int s;
809 1.208.12.1 itohy
810 1.208.12.1 itohy USB_KASSERT(xfer->rqflags & URQ_DEV_MAP_PREPARED);
811 1.208.12.1 itohy
812 1.208.12.1 itohy usb_free_dma_resources(&sc->sc_dmatag, &uxfer->dmabuf);
813 1.208.12.1 itohy
814 1.208.12.1 itohy uhci_aux_mem_free(sc, &uxfer->aux);
815 1.208.12.1 itohy s = splusb();
816 1.208.12.1 itohy sc->sc_nfreetds += uxfer->rsvd_tds;
817 1.208.12.1 itohy splx(s);
818 1.208.12.1 itohy uxfer->rsvd_tds = 0;
819 1.208.12.1 itohy }
820 1.208.12.1 itohy
821 1.208.12.1 itohy Static void
822 1.208.12.1 itohy uhci_mapm(usbd_xfer_handle xfer, void *buf, size_t size)
823 1.208.12.1 itohy {
824 1.208.12.1 itohy struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus;
825 1.208.12.1 itohy struct uhci_xfer *uxfer = UXFER(xfer);
826 1.208.12.1 itohy
827 1.208.12.1 itohy usb_map_dma(&sc->sc_dmatag, &uxfer->dmabuf, buf, size);
828 1.208.12.1 itohy }
829 1.208.12.1 itohy
830 1.208.12.1 itohy Static void
831 1.208.12.1 itohy uhci_mapm_mbuf(usbd_xfer_handle xfer, struct mbuf *chain)
832 1.208.12.1 itohy {
833 1.208.12.1 itohy struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus;
834 1.208.12.1 itohy struct uhci_xfer *uxfer = UXFER(xfer);
835 1.208.12.1 itohy
836 1.208.12.1 itohy usb_map_mbuf_dma(&sc->sc_dmatag, &uxfer->dmabuf, chain);
837 1.208.12.1 itohy }
838 1.208.12.1 itohy
839 1.208.12.1 itohy Static void
840 1.208.12.1 itohy uhci_unmapm(usbd_xfer_handle xfer)
841 1.208.12.1 itohy {
842 1.208.12.1 itohy struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus;
843 1.208.12.1 itohy struct uhci_xfer *uxfer = UXFER(xfer);
844 1.208.12.1 itohy
845 1.208.12.1 itohy usb_unmap_dma(&sc->sc_dmatag, &uxfer->dmabuf);
846 1.76 augustss }
847 1.76 augustss
848 1.76 augustss usbd_xfer_handle
849 1.208.12.1 itohy uhci_allocx(struct usbd_bus *bus, usbd_pipe_handle pipe,
850 1.208.12.1 itohy enum usbd_waitflg waitflg)
851 1.76 augustss {
852 1.76 augustss struct uhci_softc *sc = (struct uhci_softc *)bus;
853 1.76 augustss usbd_xfer_handle xfer;
854 1.76 augustss
855 1.76 augustss xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
856 1.94 augustss if (xfer != NULL) {
857 1.161 lukem SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
858 1.98 augustss #ifdef DIAGNOSTIC
859 1.94 augustss if (xfer->busy_free != XFER_FREE) {
860 1.105 augustss printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer,
861 1.94 augustss xfer->busy_free);
862 1.94 augustss }
863 1.98 augustss #endif
864 1.94 augustss } else {
865 1.208.12.1 itohy xfer = malloc(sizeof(struct uhci_xfer), M_USB,
866 1.208.12.1 itohy waitflg == U_WAITOK ? M_WAITOK : M_NOWAIT);
867 1.94 augustss }
868 1.92 augustss if (xfer != NULL) {
869 1.92 augustss memset(xfer, 0, sizeof (struct uhci_xfer));
870 1.92 augustss UXFER(xfer)->iinfo.sc = sc;
871 1.208.12.1 itohy usb_init_task(&UXFER(xfer)->abort_task, uhci_timeout_task,
872 1.208.12.1 itohy xfer);
873 1.208.12.1 itohy UXFER(xfer)->uhci_xfer_flags = 0;
874 1.92 augustss #ifdef DIAGNOSTIC
875 1.92 augustss UXFER(xfer)->iinfo.isdone = 1;
876 1.135 augustss xfer->busy_free = XFER_BUSY;
877 1.92 augustss #endif
878 1.92 augustss }
879 1.76 augustss return (xfer);
880 1.76 augustss }
881 1.76 augustss
882 1.76 augustss void
883 1.119 augustss uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
884 1.76 augustss {
885 1.76 augustss struct uhci_softc *sc = (struct uhci_softc *)bus;
886 1.76 augustss
887 1.93 augustss #ifdef DIAGNOSTIC
888 1.94 augustss if (xfer->busy_free != XFER_BUSY) {
889 1.94 augustss printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer,
890 1.94 augustss xfer->busy_free);
891 1.93 augustss }
892 1.94 augustss xfer->busy_free = XFER_FREE;
893 1.105 augustss if (!UXFER(xfer)->iinfo.isdone) {
894 1.96 augustss printf("uhci_freex: !isdone\n");
895 1.105 augustss }
896 1.93 augustss #endif
897 1.76 augustss SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
898 1.48 augustss }
899 1.48 augustss
900 1.72 augustss /*
901 1.72 augustss * Shut down the controller when the system is going down.
902 1.72 augustss */
903 1.72 augustss void
904 1.119 augustss uhci_shutdown(void *v)
905 1.72 augustss {
906 1.72 augustss uhci_softc_t *sc = v;
907 1.193 augustss int s;
908 1.72 augustss
909 1.72 augustss DPRINTF(("uhci_shutdown: stopping the HC\n"));
910 1.193 augustss
911 1.193 augustss /*
912 1.193 augustss * Use polling mode to prevent the interrupts shutting
913 1.193 augustss * us down before we shut them down.
914 1.193 augustss */
915 1.193 augustss s = splhardusb();
916 1.193 augustss sc->sc_bus.use_polling++;
917 1.72 augustss uhci_run(sc, 0); /* stop the controller */
918 1.193 augustss sc->sc_bus.use_polling--;
919 1.193 augustss splx(s);
920 1.72 augustss }
921 1.72 augustss
922 1.30 augustss /*
923 1.30 augustss * Handle suspend/resume.
924 1.30 augustss *
925 1.40 augustss * We need to switch to polling mode here, because this routine is
926 1.109 augustss * called from an interrupt context. This is all right since we
927 1.40 augustss * are almost suspended anyway.
928 1.30 augustss */
929 1.30 augustss void
930 1.119 augustss uhci_power(int why, void *v)
931 1.30 augustss {
932 1.30 augustss uhci_softc_t *sc = v;
933 1.30 augustss int cmd;
934 1.30 augustss int s;
935 1.30 augustss
936 1.132 augustss s = splhardusb();
937 1.30 augustss cmd = UREAD2(sc, UHCI_CMD);
938 1.30 augustss
939 1.152 augustss DPRINTF(("uhci_power: sc=%p, why=%d (was %d), cmd=0x%x\n",
940 1.30 augustss sc, why, sc->sc_suspend, cmd));
941 1.30 augustss
942 1.128 takemura switch (why) {
943 1.208.12.1 itohy USB_PWR_CASE_SUSPEND:
944 1.208.12.1 itohy #ifdef USB_DEBUG
945 1.30 augustss if (uhcidebug > 2)
946 1.30 augustss uhci_dumpregs(sc);
947 1.30 augustss #endif
948 1.96 augustss if (sc->sc_intr_xfer != NULL)
949 1.96 augustss usb_uncallout(sc->sc_poll_handle, uhci_poll_hub,
950 1.96 augustss sc->sc_intr_xfer);
951 1.54 augustss sc->sc_bus.use_polling++;
952 1.30 augustss uhci_run(sc, 0); /* stop the controller */
953 1.86 augustss
954 1.86 augustss /* save some state if BIOS doesn't */
955 1.86 augustss sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM);
956 1.86 augustss sc->sc_saved_sof = UREAD1(sc, UHCI_SOF);
957 1.88 tsutsui
958 1.134 augustss UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */
959 1.134 augustss
960 1.30 augustss UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */
961 1.40 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
962 1.30 augustss sc->sc_suspend = why;
963 1.61 augustss sc->sc_bus.use_polling--;
964 1.30 augustss DPRINTF(("uhci_power: cmd=0x%x\n", UREAD2(sc, UHCI_CMD)));
965 1.128 takemura break;
966 1.208.12.1 itohy
967 1.208.12.1 itohy USB_PWR_CASE_RESUME:
968 1.60 augustss #ifdef DIAGNOSTIC
969 1.61 augustss if (sc->sc_suspend == PWR_RESUME)
970 1.61 augustss printf("uhci_power: weird, resume without suspend.\n");
971 1.60 augustss #endif
972 1.61 augustss sc->sc_bus.use_polling++;
973 1.30 augustss sc->sc_suspend = why;
974 1.208.12.1 itohy UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
975 1.208.12.1 itohy uhci_globalreset(sc); /* reset the controller */
976 1.208.12.1 itohy uhci_reset(sc);
977 1.30 augustss if (cmd & UHCI_CMD_RS)
978 1.30 augustss uhci_run(sc, 0); /* in case BIOS has started it */
979 1.86 augustss
980 1.208.12.1 itohy uhci_globalreset(sc);
981 1.208.12.1 itohy uhci_reset(sc);
982 1.208.12.1 itohy
983 1.86 augustss /* restore saved state */
984 1.160 augustss UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0));
985 1.86 augustss UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum);
986 1.86 augustss UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof);
987 1.86 augustss
988 1.30 augustss UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */
989 1.40 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
990 1.30 augustss UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
991 1.152 augustss UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
992 1.30 augustss UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */
993 1.208.12.1 itohy UHCICMD(sc, UHCI_CMD_MAXP);
994 1.30 augustss uhci_run(sc, 1); /* and start traffic again */
995 1.40 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
996 1.54 augustss sc->sc_bus.use_polling--;
997 1.96 augustss if (sc->sc_intr_xfer != NULL)
998 1.96 augustss usb_callout(sc->sc_poll_handle, sc->sc_ival,
999 1.96 augustss uhci_poll_hub, sc->sc_intr_xfer);
1000 1.208.12.1 itohy #ifdef USB_DEBUG
1001 1.30 augustss if (uhcidebug > 2)
1002 1.30 augustss uhci_dumpregs(sc);
1003 1.30 augustss #endif
1004 1.128 takemura break;
1005 1.208.12.1 itohy
1006 1.208.12.1 itohy default:
1007 1.128 takemura break;
1008 1.30 augustss }
1009 1.30 augustss splx(s);
1010 1.30 augustss }
1011 1.30 augustss
1012 1.208.12.1 itohy #ifdef USB_DEBUG
1013 1.101 augustss Static void
1014 1.119 augustss uhci_dumpregs(uhci_softc_t *sc)
1015 1.1 augustss {
1016 1.48 augustss DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
1017 1.48 augustss "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
1018 1.48 augustss USBDEVNAME(sc->sc_bus.bdev),
1019 1.48 augustss UREAD2(sc, UHCI_CMD),
1020 1.48 augustss UREAD2(sc, UHCI_STS),
1021 1.48 augustss UREAD2(sc, UHCI_INTR),
1022 1.48 augustss UREAD2(sc, UHCI_FRNUM),
1023 1.48 augustss UREAD4(sc, UHCI_FLBASEADDR),
1024 1.48 augustss UREAD1(sc, UHCI_SOF),
1025 1.48 augustss UREAD2(sc, UHCI_PORTSC1),
1026 1.48 augustss UREAD2(sc, UHCI_PORTSC2)));
1027 1.1 augustss }
1028 1.1 augustss
1029 1.1 augustss void
1030 1.119 augustss uhci_dump_td(uhci_soft_td_t *p)
1031 1.1 augustss {
1032 1.122 tv char sbuf[128], sbuf2[128];
1033 1.122 tv
1034 1.48 augustss DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
1035 1.48 augustss "token=0x%08lx buffer=0x%08lx\n",
1036 1.208.12.1 itohy p, (long)UHCI_STD_DMAADDR(p),
1037 1.88 tsutsui (long)le32toh(p->td.td_link),
1038 1.88 tsutsui (long)le32toh(p->td.td_status),
1039 1.88 tsutsui (long)le32toh(p->td.td_token),
1040 1.88 tsutsui (long)le32toh(p->td.td_buffer)));
1041 1.122 tv
1042 1.147 augustss bitmask_snprintf((u_int32_t)le32toh(p->td.td_link), "\20\1T\2Q\3VF",
1043 1.122 tv sbuf, sizeof(sbuf));
1044 1.147 augustss bitmask_snprintf((u_int32_t)le32toh(p->td.td_status),
1045 1.122 tv "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
1046 1.122 tv "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
1047 1.122 tv sbuf2, sizeof(sbuf2));
1048 1.122 tv
1049 1.122 tv DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
1050 1.122 tv "D=%d,maxlen=%d\n", sbuf, sbuf2,
1051 1.88 tsutsui UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)),
1052 1.88 tsutsui UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)),
1053 1.88 tsutsui UHCI_TD_GET_PID(le32toh(p->td.td_token)),
1054 1.88 tsutsui UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)),
1055 1.88 tsutsui UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)),
1056 1.88 tsutsui UHCI_TD_GET_DT(le32toh(p->td.td_token)),
1057 1.88 tsutsui UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token))));
1058 1.1 augustss }
1059 1.1 augustss
1060 1.1 augustss void
1061 1.119 augustss uhci_dump_qh(uhci_soft_qh_t *sqh)
1062 1.1 augustss {
1063 1.67 augustss DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh,
1064 1.208.12.1 itohy (int)UHCI_SQH_DMAADDR(sqh), le32toh(sqh->qh.qh_hlink),
1065 1.88 tsutsui le32toh(sqh->qh.qh_elink)));
1066 1.1 augustss }
1067 1.1 augustss
1068 1.13 augustss
1069 1.110 augustss #if 1
1070 1.1 augustss void
1071 1.119 augustss uhci_dump(void)
1072 1.1 augustss {
1073 1.110 augustss uhci_dump_all(thesc);
1074 1.110 augustss }
1075 1.110 augustss #endif
1076 1.1 augustss
1077 1.110 augustss void
1078 1.119 augustss uhci_dump_all(uhci_softc_t *sc)
1079 1.110 augustss {
1080 1.1 augustss uhci_dumpregs(sc);
1081 1.50 augustss printf("intrs=%d\n", sc->sc_bus.no_intrs);
1082 1.110 augustss /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/
1083 1.123 augustss uhci_dump_qh(sc->sc_lctl_start);
1084 1.1 augustss }
1085 1.1 augustss
1086 1.67 augustss
1087 1.67 augustss void
1088 1.119 augustss uhci_dump_qhs(uhci_soft_qh_t *sqh)
1089 1.67 augustss {
1090 1.67 augustss uhci_dump_qh(sqh);
1091 1.67 augustss
1092 1.67 augustss /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards
1093 1.67 augustss * Traverses sideways first, then down.
1094 1.67 augustss *
1095 1.67 augustss * QH1
1096 1.67 augustss * QH2
1097 1.67 augustss * No QH
1098 1.67 augustss * TD2.1
1099 1.67 augustss * TD2.2
1100 1.67 augustss * TD1.1
1101 1.67 augustss * etc.
1102 1.67 augustss *
1103 1.67 augustss * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
1104 1.67 augustss */
1105 1.67 augustss
1106 1.67 augustss
1107 1.88 tsutsui if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T))
1108 1.67 augustss uhci_dump_qhs(sqh->hlink);
1109 1.67 augustss else
1110 1.67 augustss DPRINTF(("No QH\n"));
1111 1.67 augustss
1112 1.88 tsutsui if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T))
1113 1.67 augustss uhci_dump_tds(sqh->elink);
1114 1.67 augustss else
1115 1.67 augustss DPRINTF(("No TD\n"));
1116 1.67 augustss }
1117 1.67 augustss
1118 1.1 augustss void
1119 1.119 augustss uhci_dump_tds(uhci_soft_td_t *std)
1120 1.1 augustss {
1121 1.67 augustss uhci_soft_td_t *td;
1122 1.67 augustss
1123 1.67 augustss for(td = std; td != NULL; td = td->link.std) {
1124 1.67 augustss uhci_dump_td(td);
1125 1.1 augustss
1126 1.67 augustss /* Check whether the link pointer in this TD marks
1127 1.67 augustss * the link pointer as end of queue. This avoids
1128 1.67 augustss * printing the free list in case the queue/TD has
1129 1.67 augustss * already been moved there (seatbelt).
1130 1.67 augustss */
1131 1.88 tsutsui if (le32toh(td->td.td_link) & UHCI_PTR_T ||
1132 1.88 tsutsui le32toh(td->td.td_link) == 0)
1133 1.67 augustss break;
1134 1.67 augustss }
1135 1.1 augustss }
1136 1.92 augustss
1137 1.101 augustss Static void
1138 1.119 augustss uhci_dump_ii(uhci_intr_info_t *ii)
1139 1.92 augustss {
1140 1.95 augustss usbd_pipe_handle pipe;
1141 1.95 augustss usb_endpoint_descriptor_t *ed;
1142 1.95 augustss usbd_device_handle dev;
1143 1.152 augustss
1144 1.98 augustss #ifdef DIAGNOSTIC
1145 1.98 augustss #define DONE ii->isdone
1146 1.98 augustss #else
1147 1.98 augustss #define DONE 0
1148 1.98 augustss #endif
1149 1.95 augustss if (ii == NULL) {
1150 1.95 augustss printf("ii NULL\n");
1151 1.95 augustss return;
1152 1.95 augustss }
1153 1.95 augustss if (ii->xfer == NULL) {
1154 1.95 augustss printf("ii %p: done=%d xfer=NULL\n",
1155 1.98 augustss ii, DONE);
1156 1.95 augustss return;
1157 1.95 augustss }
1158 1.95 augustss pipe = ii->xfer->pipe;
1159 1.95 augustss if (pipe == NULL) {
1160 1.95 augustss printf("ii %p: done=%d xfer=%p pipe=NULL\n",
1161 1.98 augustss ii, DONE, ii->xfer);
1162 1.139 augustss return;
1163 1.139 augustss }
1164 1.139 augustss if (pipe->endpoint == NULL) {
1165 1.139 augustss printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n",
1166 1.139 augustss ii, DONE, ii->xfer, pipe);
1167 1.139 augustss return;
1168 1.139 augustss }
1169 1.139 augustss if (pipe->device == NULL) {
1170 1.139 augustss printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n",
1171 1.139 augustss ii, DONE, ii->xfer, pipe);
1172 1.95 augustss return;
1173 1.95 augustss }
1174 1.95 augustss ed = pipe->endpoint->edesc;
1175 1.95 augustss dev = pipe->device;
1176 1.152 augustss printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n",
1177 1.152 augustss ii, DONE, ii->xfer, dev,
1178 1.95 augustss UGETW(dev->ddesc.idVendor),
1179 1.92 augustss UGETW(dev->ddesc.idProduct),
1180 1.92 augustss dev->address, pipe,
1181 1.92 augustss ed->bEndpointAddress, ed->bmAttributes);
1182 1.98 augustss #undef DONE
1183 1.92 augustss }
1184 1.92 augustss
1185 1.120 augustss void uhci_dump_iis(struct uhci_softc *sc);
1186 1.92 augustss void
1187 1.119 augustss uhci_dump_iis(struct uhci_softc *sc)
1188 1.92 augustss {
1189 1.92 augustss uhci_intr_info_t *ii;
1190 1.92 augustss
1191 1.92 augustss printf("intr_info list:\n");
1192 1.92 augustss for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
1193 1.92 augustss uhci_dump_ii(ii);
1194 1.92 augustss }
1195 1.92 augustss
1196 1.120 augustss void iidump(void);
1197 1.119 augustss void iidump(void) { uhci_dump_iis(thesc); }
1198 1.92 augustss
1199 1.1 augustss #endif
1200 1.1 augustss
1201 1.1 augustss /*
1202 1.1 augustss * This routine is executed periodically and simulates interrupts
1203 1.1 augustss * from the root controller interrupt pipe for port status change.
1204 1.1 augustss */
1205 1.1 augustss void
1206 1.119 augustss uhci_poll_hub(void *addr)
1207 1.1 augustss {
1208 1.63 augustss usbd_xfer_handle xfer = addr;
1209 1.63 augustss usbd_pipe_handle pipe = xfer->pipe;
1210 1.208.12.1 itohy usbd_device_handle dev = pipe->device;
1211 1.208.12.1 itohy uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
1212 1.1 augustss int s;
1213 1.1 augustss u_char *p;
1214 1.1 augustss
1215 1.96 augustss DPRINTFN(20, ("uhci_poll_hub\n"));
1216 1.1 augustss
1217 1.96 augustss usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
1218 1.41 augustss
1219 1.208.12.1 itohy p = xfer->hcbuffer;
1220 1.1 augustss p[0] = 0;
1221 1.1 augustss if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
1222 1.1 augustss p[0] |= 1<<1;
1223 1.1 augustss if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
1224 1.1 augustss p[0] |= 1<<2;
1225 1.41 augustss if (p[0] == 0)
1226 1.41 augustss /* No change, try again in a while */
1227 1.41 augustss return;
1228 1.41 augustss
1229 1.63 augustss xfer->actlen = 1;
1230 1.63 augustss xfer->status = USBD_NORMAL_COMPLETION;
1231 1.16 augustss s = splusb();
1232 1.208.12.1 itohy dev->bus->intr_context++;
1233 1.208.12.1 itohy uhci_transfer_complete(xfer);
1234 1.208.12.1 itohy dev->bus->intr_context--;
1235 1.41 augustss splx(s);
1236 1.41 augustss }
1237 1.41 augustss
1238 1.41 augustss void
1239 1.205 christos uhci_root_intr_done(usbd_xfer_handle xfer)
1240 1.84 augustss {
1241 1.84 augustss }
1242 1.84 augustss
1243 1.84 augustss void
1244 1.205 christos uhci_root_ctrl_done(usbd_xfer_handle xfer)
1245 1.41 augustss {
1246 1.1 augustss }
1247 1.1 augustss
1248 1.123 augustss /*
1249 1.123 augustss * Let the last QH loop back to the high speed control transfer QH.
1250 1.123 augustss * This is what intel calls "bandwidth reclamation" and improves
1251 1.123 augustss * USB performance a lot for some devices.
1252 1.123 augustss * If we are already looping, just count it.
1253 1.123 augustss */
1254 1.1 augustss void
1255 1.123 augustss uhci_add_loop(uhci_softc_t *sc) {
1256 1.208.12.1 itohy #ifdef USB_DEBUG
1257 1.125 augustss if (uhcinoloop)
1258 1.125 augustss return;
1259 1.125 augustss #endif
1260 1.123 augustss if (++sc->sc_loops == 1) {
1261 1.125 augustss DPRINTFN(5,("uhci_start_loop: add\n"));
1262 1.123 augustss /* Note, we don't loop back the soft pointer. */
1263 1.152 augustss sc->sc_last_qh->qh.qh_hlink =
1264 1.208.12.1 itohy htole32(UHCI_SQH_DMAADDR(sc->sc_hctl_start) | UHCI_PTR_QH);
1265 1.123 augustss }
1266 1.123 augustss }
1267 1.123 augustss
1268 1.123 augustss void
1269 1.123 augustss uhci_rem_loop(uhci_softc_t *sc) {
1270 1.208.12.1 itohy #ifdef USB_DEBUG
1271 1.125 augustss if (uhcinoloop)
1272 1.125 augustss return;
1273 1.125 augustss #endif
1274 1.123 augustss if (--sc->sc_loops == 0) {
1275 1.123 augustss DPRINTFN(5,("uhci_end_loop: remove\n"));
1276 1.123 augustss sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T);
1277 1.123 augustss }
1278 1.123 augustss }
1279 1.123 augustss
1280 1.123 augustss /* Add high speed control QH, called at splusb(). */
1281 1.123 augustss void
1282 1.123 augustss uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1283 1.1 augustss {
1284 1.42 augustss uhci_soft_qh_t *eqh;
1285 1.1 augustss
1286 1.52 augustss SPLUSBCHECK;
1287 1.52 augustss
1288 1.1 augustss DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
1289 1.123 augustss eqh = sc->sc_hctl_end;
1290 1.42 augustss sqh->hlink = eqh->hlink;
1291 1.42 augustss sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1292 1.208.12.1 itohy UHCI_SQH_SYNC(sc, sqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1293 1.42 augustss eqh->hlink = sqh;
1294 1.208.12.1 itohy eqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(sqh) | UHCI_PTR_QH);
1295 1.208.12.1 itohy UHCI_SQH_SYNC(sc, eqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1296 1.123 augustss sc->sc_hctl_end = sqh;
1297 1.125 augustss #ifdef UHCI_CTL_LOOP
1298 1.123 augustss uhci_add_loop(sc);
1299 1.125 augustss #endif
1300 1.1 augustss }
1301 1.1 augustss
1302 1.123 augustss /* Remove high speed control QH, called at splusb(). */
1303 1.1 augustss void
1304 1.123 augustss uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1305 1.1 augustss {
1306 1.1 augustss uhci_soft_qh_t *pqh;
1307 1.1 augustss
1308 1.52 augustss SPLUSBCHECK;
1309 1.52 augustss
1310 1.123 augustss DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh));
1311 1.125 augustss #ifdef UHCI_CTL_LOOP
1312 1.123 augustss uhci_rem_loop(sc);
1313 1.125 augustss #endif
1314 1.124 augustss /*
1315 1.124 augustss * The T bit should be set in the elink of the QH so that the HC
1316 1.124 augustss * doesn't follow the pointer. This condition may fail if the
1317 1.124 augustss * the transferred packet was short so that the QH still points
1318 1.124 augustss * at the last used TD.
1319 1.124 augustss * In this case we set the T bit and wait a little for the HC
1320 1.124 augustss * to stop looking at the TD.
1321 1.124 augustss */
1322 1.124 augustss if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1323 1.124 augustss sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1324 1.208.12.1 itohy UHCI_SQH_SYNC(sc, sqh,
1325 1.208.12.1 itohy BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1326 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
1327 1.124 augustss }
1328 1.124 augustss
1329 1.123 augustss pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh);
1330 1.152 augustss pqh->hlink = sqh->hlink;
1331 1.42 augustss pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1332 1.208.12.1 itohy UHCI_SQH_SYNC(sc, pqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1333 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
1334 1.123 augustss if (sc->sc_hctl_end == sqh)
1335 1.123 augustss sc->sc_hctl_end = pqh;
1336 1.123 augustss }
1337 1.123 augustss
1338 1.123 augustss /* Add low speed control QH, called at splusb(). */
1339 1.123 augustss void
1340 1.123 augustss uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1341 1.123 augustss {
1342 1.123 augustss uhci_soft_qh_t *eqh;
1343 1.123 augustss
1344 1.123 augustss SPLUSBCHECK;
1345 1.123 augustss
1346 1.123 augustss DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh));
1347 1.123 augustss eqh = sc->sc_lctl_end;
1348 1.152 augustss sqh->hlink = eqh->hlink;
1349 1.123 augustss sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1350 1.208.12.1 itohy UHCI_SQH_SYNC(sc, sqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1351 1.152 augustss eqh->hlink = sqh;
1352 1.208.12.1 itohy eqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(sqh) | UHCI_PTR_QH);
1353 1.208.12.1 itohy UHCI_SQH_SYNC(sc, eqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1354 1.123 augustss sc->sc_lctl_end = sqh;
1355 1.123 augustss }
1356 1.123 augustss
1357 1.123 augustss /* Remove low speed control QH, called at splusb(). */
1358 1.123 augustss void
1359 1.123 augustss uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1360 1.123 augustss {
1361 1.123 augustss uhci_soft_qh_t *pqh;
1362 1.123 augustss
1363 1.123 augustss SPLUSBCHECK;
1364 1.123 augustss
1365 1.123 augustss DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh));
1366 1.124 augustss /* See comment in uhci_remove_hs_ctrl() */
1367 1.124 augustss if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1368 1.124 augustss sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1369 1.208.12.1 itohy UHCI_SQH_SYNC(sc, sqh,
1370 1.208.12.1 itohy BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1371 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
1372 1.124 augustss }
1373 1.123 augustss pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh);
1374 1.152 augustss pqh->hlink = sqh->hlink;
1375 1.123 augustss pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1376 1.208.12.1 itohy UHCI_SQH_SYNC(sc, pqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1377 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
1378 1.123 augustss if (sc->sc_lctl_end == sqh)
1379 1.123 augustss sc->sc_lctl_end = pqh;
1380 1.1 augustss }
1381 1.1 augustss
1382 1.1 augustss /* Add bulk QH, called at splusb(). */
1383 1.1 augustss void
1384 1.119 augustss uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1385 1.1 augustss {
1386 1.42 augustss uhci_soft_qh_t *eqh;
1387 1.1 augustss
1388 1.52 augustss SPLUSBCHECK;
1389 1.52 augustss
1390 1.1 augustss DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
1391 1.42 augustss eqh = sc->sc_bulk_end;
1392 1.152 augustss sqh->hlink = eqh->hlink;
1393 1.42 augustss sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1394 1.208.12.1 itohy UHCI_SQH_SYNC(sc, sqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1395 1.152 augustss eqh->hlink = sqh;
1396 1.208.12.1 itohy eqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(sqh) | UHCI_PTR_QH);
1397 1.208.12.1 itohy UHCI_SQH_SYNC(sc, eqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1398 1.1 augustss sc->sc_bulk_end = sqh;
1399 1.123 augustss uhci_add_loop(sc);
1400 1.1 augustss }
1401 1.1 augustss
1402 1.1 augustss /* Remove bulk QH, called at splusb(). */
1403 1.1 augustss void
1404 1.119 augustss uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1405 1.1 augustss {
1406 1.1 augustss uhci_soft_qh_t *pqh;
1407 1.1 augustss
1408 1.52 augustss SPLUSBCHECK;
1409 1.52 augustss
1410 1.1 augustss DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
1411 1.123 augustss uhci_rem_loop(sc);
1412 1.124 augustss /* See comment in uhci_remove_hs_ctrl() */
1413 1.124 augustss if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1414 1.124 augustss sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1415 1.208.12.1 itohy UHCI_SQH_SYNC(sc, sqh,
1416 1.208.12.1 itohy BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1417 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
1418 1.124 augustss }
1419 1.92 augustss pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh);
1420 1.42 augustss pqh->hlink = sqh->hlink;
1421 1.42 augustss pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1422 1.208.12.1 itohy UHCI_SQH_SYNC(sc, pqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1423 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
1424 1.1 augustss if (sc->sc_bulk_end == sqh)
1425 1.1 augustss sc->sc_bulk_end = pqh;
1426 1.1 augustss }
1427 1.1 augustss
1428 1.141 augustss Static int uhci_intr1(uhci_softc_t *);
1429 1.141 augustss
1430 1.1 augustss int
1431 1.119 augustss uhci_intr(void *arg)
1432 1.1 augustss {
1433 1.44 augustss uhci_softc_t *sc = arg;
1434 1.146 augustss
1435 1.146 augustss if (sc->sc_dying)
1436 1.146 augustss return (0);
1437 1.141 augustss
1438 1.208.12.1 itohy DPRINTFN(15,("uhci_intr: real interrupt\n"));
1439 1.141 augustss if (sc->sc_bus.use_polling) {
1440 1.141 augustss #ifdef DIAGNOSTIC
1441 1.208.12.1 itohy printf("uhci_intr: ignored interrupt while polling\n");
1442 1.141 augustss #endif
1443 1.141 augustss return (0);
1444 1.141 augustss }
1445 1.141 augustss return (uhci_intr1(sc));
1446 1.141 augustss }
1447 1.141 augustss
1448 1.141 augustss int
1449 1.141 augustss uhci_intr1(uhci_softc_t *sc)
1450 1.141 augustss {
1451 1.208.12.1 itohy
1452 1.44 augustss int status;
1453 1.44 augustss int ack;
1454 1.1 augustss
1455 1.208.12.1 itohy #ifdef __FreeBSD__
1456 1.208.12.1 itohy /*
1457 1.208.12.1 itohy * It can happen that an interrupt will be delivered to
1458 1.208.12.1 itohy * us before the device has been fully attached and the
1459 1.208.12.1 itohy * softc struct has been configured on FreeBSD. Usually
1460 1.208.12.1 itohy * this happens when kldloading the USB support as a module
1461 1.208.12.1 itohy * after the system has been booted. If we detect this condition,
1462 1.208.12.1 itohy * we need to squelch the unwanted interrupts until we're
1463 1.208.12.1 itohy * ready for them.
1464 1.208.12.1 itohy */
1465 1.208.12.1 itohy if (sc->sc_bus.bdev == NULL) {
1466 1.208.12.1 itohy UWRITE2(sc, UHCI_STS, 0xFFFF); /* ack pending interrupts */
1467 1.208.12.1 itohy uhci_run(sc, 0); /* stop the controller */
1468 1.208.12.1 itohy UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
1469 1.208.12.1 itohy return(0);
1470 1.208.12.1 itohy }
1471 1.208.12.1 itohy #endif
1472 1.208.12.1 itohy
1473 1.208.12.1 itohy #ifdef USB_DEBUG
1474 1.44 augustss if (uhcidebug > 15) {
1475 1.141 augustss DPRINTF(("%s: uhci_intr1\n", USBDEVNAME(sc->sc_bus.bdev)));
1476 1.1 augustss uhci_dumpregs(sc);
1477 1.1 augustss }
1478 1.1 augustss #endif
1479 1.153 augustss status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS;
1480 1.127 soren if (status == 0) /* The interrupt was not for us. */
1481 1.127 soren return (0);
1482 1.127 soren
1483 1.117 augustss if (sc->sc_suspend != PWR_RESUME) {
1484 1.201 jmcneill #ifdef DIAGNOSTIC
1485 1.208.12.1 itohy printf("uhci_intr: suspended sts=0x%x\n", status);
1486 1.117 augustss printf("%s: interrupt while not operating ignored\n",
1487 1.117 augustss USBDEVNAME(sc->sc_bus.bdev));
1488 1.201 jmcneill #endif
1489 1.134 augustss UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */
1490 1.117 augustss return (0);
1491 1.117 augustss }
1492 1.44 augustss
1493 1.44 augustss ack = 0;
1494 1.44 augustss if (status & UHCI_STS_USBINT)
1495 1.44 augustss ack |= UHCI_STS_USBINT;
1496 1.44 augustss if (status & UHCI_STS_USBEI)
1497 1.44 augustss ack |= UHCI_STS_USBEI;
1498 1.1 augustss if (status & UHCI_STS_RD) {
1499 1.44 augustss ack |= UHCI_STS_RD;
1500 1.208.12.1 itohy #ifdef USB_DEBUG
1501 1.46 augustss printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
1502 1.118 augustss #endif
1503 1.1 augustss }
1504 1.1 augustss if (status & UHCI_STS_HSE) {
1505 1.44 augustss ack |= UHCI_STS_HSE;
1506 1.81 augustss printf("%s: host system error\n", USBDEVNAME(sc->sc_bus.bdev));
1507 1.1 augustss }
1508 1.1 augustss if (status & UHCI_STS_HCPE) {
1509 1.44 augustss ack |= UHCI_STS_HCPE;
1510 1.152 augustss printf("%s: host controller process error\n",
1511 1.81 augustss USBDEVNAME(sc->sc_bus.bdev));
1512 1.44 augustss }
1513 1.44 augustss if (status & UHCI_STS_HCH) {
1514 1.44 augustss /* no acknowledge needed */
1515 1.136 augustss if (!sc->sc_dying) {
1516 1.152 augustss printf("%s: host controller halted\n",
1517 1.129 augustss USBDEVNAME(sc->sc_bus.bdev));
1518 1.208.12.1 itohy #ifdef USB_DEBUG
1519 1.136 augustss uhci_dump_all(sc);
1520 1.110 augustss #endif
1521 1.136 augustss }
1522 1.136 augustss sc->sc_dying = 1;
1523 1.1 augustss }
1524 1.44 augustss
1525 1.132 augustss if (!ack)
1526 1.132 augustss return (0); /* nothing to acknowledge */
1527 1.132 augustss UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */
1528 1.1 augustss
1529 1.85 augustss sc->sc_bus.no_intrs++;
1530 1.85 augustss usb_schedsoftintr(&sc->sc_bus);
1531 1.85 augustss
1532 1.175 mycroft DPRINTFN(15, ("%s: uhci_intr: exit\n", USBDEVNAME(sc->sc_bus.bdev)));
1533 1.85 augustss
1534 1.85 augustss return (1);
1535 1.85 augustss }
1536 1.85 augustss
1537 1.85 augustss void
1538 1.133 augustss uhci_softintr(void *v)
1539 1.85 augustss {
1540 1.133 augustss uhci_softc_t *sc = v;
1541 1.178 martin uhci_intr_info_t *ii, *nextii;
1542 1.85 augustss
1543 1.140 augustss DPRINTFN(10,("%s: uhci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev),
1544 1.140 augustss sc->sc_bus.intr_context));
1545 1.85 augustss
1546 1.51 augustss sc->sc_bus.intr_context++;
1547 1.50 augustss
1548 1.1 augustss /*
1549 1.1 augustss * Interrupts on UHCI really suck. When the host controller
1550 1.1 augustss * interrupts because a transfer is completed there is no
1551 1.1 augustss * way of knowing which transfer it was. You can scan down
1552 1.1 augustss * the TDs and QHs of the previous frame to limit the search,
1553 1.1 augustss * but that assumes that the interrupt was not delayed by more
1554 1.1 augustss * than 1 ms, which may not always be true (e.g. after debug
1555 1.1 augustss * output on a slow console).
1556 1.1 augustss * We scan all interrupt descriptors to see if any have
1557 1.1 augustss * completed.
1558 1.1 augustss */
1559 1.178 martin for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) {
1560 1.178 martin nextii = LIST_NEXT(ii, list);
1561 1.1 augustss uhci_check_intr(sc, ii);
1562 1.178 martin }
1563 1.1 augustss
1564 1.164 augustss #ifdef USB_USE_SOFTINTR
1565 1.153 augustss if (sc->sc_softwake) {
1566 1.153 augustss sc->sc_softwake = 0;
1567 1.153 augustss wakeup(&sc->sc_softwake);
1568 1.153 augustss }
1569 1.164 augustss #endif /* USB_USE_SOFTINTR */
1570 1.153 augustss
1571 1.51 augustss sc->sc_bus.intr_context--;
1572 1.1 augustss }
1573 1.1 augustss
1574 1.1 augustss /* Check for an interrupt. */
1575 1.1 augustss void
1576 1.205 christos uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii)
1577 1.1 augustss {
1578 1.1 augustss uhci_soft_td_t *std, *lstd;
1579 1.18 augustss u_int32_t status;
1580 1.1 augustss
1581 1.1 augustss DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
1582 1.1 augustss #ifdef DIAGNOSTIC
1583 1.63 augustss if (ii == NULL) {
1584 1.1 augustss printf("uhci_check_intr: no ii? %p\n", ii);
1585 1.1 augustss return;
1586 1.1 augustss }
1587 1.1 augustss #endif
1588 1.155 augustss if (ii->xfer->status == USBD_CANCELLED ||
1589 1.155 augustss ii->xfer->status == USBD_TIMEOUT) {
1590 1.155 augustss DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer));
1591 1.155 augustss return;
1592 1.155 augustss }
1593 1.155 augustss
1594 1.63 augustss if (ii->stdstart == NULL)
1595 1.1 augustss return;
1596 1.1 augustss lstd = ii->stdend;
1597 1.1 augustss #ifdef DIAGNOSTIC
1598 1.63 augustss if (lstd == NULL) {
1599 1.1 augustss printf("uhci_check_intr: std==0\n");
1600 1.1 augustss return;
1601 1.1 augustss }
1602 1.1 augustss #endif
1603 1.152 augustss /*
1604 1.26 augustss * If the last TD is still active we need to check whether there
1605 1.186 skrll * is an error somewhere in the middle, or whether there was a
1606 1.26 augustss * short packet (SPD and not ACTIVE).
1607 1.26 augustss */
1608 1.208.12.1 itohy UHCI_STD_SYNC(sc, lstd, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1609 1.88 tsutsui if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) {
1610 1.92 augustss DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii));
1611 1.48 augustss for (std = ii->stdstart; std != lstd; std = std->link.std) {
1612 1.208.12.1 itohy UHCI_STD_SYNC(sc, lstd,
1613 1.208.12.1 itohy BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1614 1.88 tsutsui status = le32toh(std->td.td_status);
1615 1.83 augustss /* If there's an active TD the xfer isn't done. */
1616 1.83 augustss if (status & UHCI_TD_ACTIVE)
1617 1.83 augustss break;
1618 1.83 augustss /* Any kind of error makes the xfer done. */
1619 1.83 augustss if (status & UHCI_TD_STALLED)
1620 1.83 augustss goto done;
1621 1.83 augustss /* We want short packets, and it is short: it's done */
1622 1.83 augustss if ((status & UHCI_TD_SPD) &&
1623 1.152 augustss UHCI_TD_GET_ACTLEN(status) <
1624 1.88 tsutsui UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)))
1625 1.1 augustss goto done;
1626 1.18 augustss }
1627 1.92 augustss DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n",
1628 1.18 augustss ii, ii->stdstart));
1629 1.1 augustss return;
1630 1.1 augustss }
1631 1.1 augustss done:
1632 1.92 augustss DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii));
1633 1.96 augustss usb_uncallout(ii->xfer->timeout_handle, uhci_timeout, ii);
1634 1.208.12.1 itohy usb_rem_task(ii->xfer->pipe->device, &UXFER(ii->xfer)->abort_task);
1635 1.36 augustss uhci_idone(ii);
1636 1.1 augustss }
1637 1.1 augustss
1638 1.52 augustss /* Called at splusb() */
1639 1.1 augustss void
1640 1.119 augustss uhci_idone(uhci_intr_info_t *ii)
1641 1.1 augustss {
1642 1.63 augustss usbd_xfer_handle xfer = ii->xfer;
1643 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1644 1.208.12.1 itohy uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
1645 1.1 augustss uhci_soft_td_t *std;
1646 1.67 augustss u_int32_t status = 0, nstatus;
1647 1.26 augustss int actlen;
1648 1.1 augustss
1649 1.140 augustss DPRINTFN(12, ("uhci_idone: ii=%p\n", ii));
1650 1.7 augustss #ifdef DIAGNOSTIC
1651 1.7 augustss {
1652 1.7 augustss int s = splhigh();
1653 1.7 augustss if (ii->isdone) {
1654 1.26 augustss splx(s);
1655 1.208.12.1 itohy #ifdef USB_DEBUG
1656 1.92 augustss printf("uhci_idone: ii is done!\n ");
1657 1.92 augustss uhci_dump_ii(ii);
1658 1.92 augustss #else
1659 1.36 augustss printf("uhci_idone: ii=%p is done!\n", ii);
1660 1.92 augustss #endif
1661 1.7 augustss return;
1662 1.7 augustss }
1663 1.7 augustss ii->isdone = 1;
1664 1.7 augustss splx(s);
1665 1.7 augustss }
1666 1.7 augustss #endif
1667 1.48 augustss
1668 1.63 augustss if (xfer->nframes != 0) {
1669 1.48 augustss /* Isoc transfer, do things differently. */
1670 1.48 augustss uhci_soft_td_t **stds = upipe->u.iso.stds;
1671 1.126 augustss int i, n, nframes, len;
1672 1.48 augustss
1673 1.48 augustss DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii));
1674 1.48 augustss
1675 1.63 augustss nframes = xfer->nframes;
1676 1.48 augustss actlen = 0;
1677 1.92 augustss n = UXFER(xfer)->curframe;
1678 1.48 augustss for (i = 0; i < nframes; i++) {
1679 1.48 augustss std = stds[n];
1680 1.208.12.1 itohy UHCI_STD_SYNC(sc, std,
1681 1.208.12.1 itohy BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1682 1.208.12.1 itohy #ifdef USB_DEBUG
1683 1.48 augustss if (uhcidebug > 5) {
1684 1.48 augustss DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i));
1685 1.48 augustss uhci_dump_td(std);
1686 1.48 augustss }
1687 1.48 augustss #endif
1688 1.48 augustss if (++n >= UHCI_VFRAMELIST_COUNT)
1689 1.48 augustss n = 0;
1690 1.88 tsutsui status = le32toh(std->td.td_status);
1691 1.126 augustss len = UHCI_TD_GET_ACTLEN(status);
1692 1.126 augustss xfer->frlengths[i] = len;
1693 1.126 augustss actlen += len;
1694 1.48 augustss }
1695 1.48 augustss upipe->u.iso.inuse -= nframes;
1696 1.63 augustss xfer->actlen = actlen;
1697 1.63 augustss xfer->status = USBD_NORMAL_COMPLETION;
1698 1.140 augustss goto end;
1699 1.48 augustss }
1700 1.48 augustss
1701 1.208.12.1 itohy #ifdef USB_DEBUG
1702 1.65 augustss DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n",
1703 1.65 augustss ii, xfer, upipe));
1704 1.48 augustss if (uhcidebug > 10)
1705 1.48 augustss uhci_dump_tds(ii->stdstart);
1706 1.48 augustss #endif
1707 1.48 augustss
1708 1.26 augustss /* The transfer is done, compute actual length and status. */
1709 1.26 augustss actlen = 0;
1710 1.63 augustss for (std = ii->stdstart; std != NULL; std = std->link.std) {
1711 1.88 tsutsui nstatus = le32toh(std->td.td_status);
1712 1.64 augustss if (nstatus & UHCI_TD_ACTIVE)
1713 1.26 augustss break;
1714 1.67 augustss
1715 1.64 augustss status = nstatus;
1716 1.88 tsutsui if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) !=
1717 1.88 tsutsui UHCI_TD_PID_SETUP)
1718 1.26 augustss actlen += UHCI_TD_GET_ACTLEN(status);
1719 1.176 mycroft else {
1720 1.176 mycroft /*
1721 1.176 mycroft * UHCI will report CRCTO in addition to a STALL or NAK
1722 1.176 mycroft * for a SETUP transaction. See section 3.2.2, "TD
1723 1.176 mycroft * CONTROL AND STATUS".
1724 1.176 mycroft */
1725 1.176 mycroft if (status & (UHCI_TD_STALLED | UHCI_TD_NAK))
1726 1.176 mycroft status &= ~UHCI_TD_CRCTO;
1727 1.176 mycroft }
1728 1.1 augustss }
1729 1.38 augustss /* If there are left over TDs we need to update the toggle. */
1730 1.63 augustss if (std != NULL)
1731 1.88 tsutsui upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token));
1732 1.38 augustss
1733 1.1 augustss status &= UHCI_TD_ERROR;
1734 1.152 augustss DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n",
1735 1.26 augustss actlen, status));
1736 1.63 augustss xfer->actlen = actlen;
1737 1.1 augustss if (status != 0) {
1738 1.208.12.1 itohy #ifdef USB_DEBUG
1739 1.122 tv char sbuf[128];
1740 1.122 tv
1741 1.147 augustss bitmask_snprintf((u_int32_t)status,
1742 1.147 augustss "\20\22BITSTUFF\23CRCTO\24NAK\25"
1743 1.122 tv "BABBLE\26DBUFFER\27STALLED\30ACTIVE",
1744 1.122 tv sbuf, sizeof(sbuf));
1745 1.122 tv
1746 1.75 augustss DPRINTFN((status == UHCI_TD_STALLED)*10,
1747 1.36 augustss ("uhci_idone: error, addr=%d, endpt=0x%02x, "
1748 1.122 tv "status 0x%s\n",
1749 1.63 augustss xfer->pipe->device->address,
1750 1.63 augustss xfer->pipe->endpoint->edesc->bEndpointAddress,
1751 1.122 tv sbuf));
1752 1.122 tv #endif
1753 1.122 tv
1754 1.1 augustss if (status == UHCI_TD_STALLED)
1755 1.63 augustss xfer->status = USBD_STALLED;
1756 1.1 augustss else
1757 1.63 augustss xfer->status = USBD_IOERROR; /* more info XXX */
1758 1.1 augustss } else {
1759 1.63 augustss xfer->status = USBD_NORMAL_COMPLETION;
1760 1.1 augustss }
1761 1.140 augustss
1762 1.140 augustss end:
1763 1.208.12.1 itohy uhci_transfer_complete(xfer);
1764 1.140 augustss DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii));
1765 1.1 augustss }
1766 1.1 augustss
1767 1.13 augustss /*
1768 1.13 augustss * Called when a request does not complete.
1769 1.13 augustss */
1770 1.1 augustss void
1771 1.119 augustss uhci_timeout(void *addr)
1772 1.1 augustss {
1773 1.1 augustss uhci_intr_info_t *ii = addr;
1774 1.153 augustss struct uhci_xfer *uxfer = UXFER(ii->xfer);
1775 1.153 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe;
1776 1.153 augustss uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
1777 1.153 augustss
1778 1.153 augustss DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer));
1779 1.153 augustss
1780 1.153 augustss if (sc->sc_dying) {
1781 1.153 augustss uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT);
1782 1.153 augustss return;
1783 1.153 augustss }
1784 1.1 augustss
1785 1.153 augustss /* Execute the abort in a process context. */
1786 1.204 joerg usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task,
1787 1.204 joerg USB_TASKQ_HC);
1788 1.153 augustss }
1789 1.51 augustss
1790 1.153 augustss void
1791 1.153 augustss uhci_timeout_task(void *addr)
1792 1.153 augustss {
1793 1.153 augustss usbd_xfer_handle xfer = addr;
1794 1.153 augustss int s;
1795 1.153 augustss
1796 1.153 augustss DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer));
1797 1.67 augustss
1798 1.153 augustss s = splusb();
1799 1.153 augustss uhci_abort_xfer(xfer, USBD_TIMEOUT);
1800 1.153 augustss splx(s);
1801 1.1 augustss }
1802 1.1 augustss
1803 1.1 augustss /*
1804 1.1 augustss * Wait here until controller claims to have an interrupt.
1805 1.1 augustss * Then call uhci_intr and return. Use timeout to avoid waiting
1806 1.1 augustss * too long.
1807 1.13 augustss * Only used during boot when interrupts are not enabled yet.
1808 1.1 augustss */
1809 1.1 augustss void
1810 1.119 augustss uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer)
1811 1.1 augustss {
1812 1.63 augustss int timo = xfer->timeout;
1813 1.13 augustss uhci_intr_info_t *ii;
1814 1.13 augustss
1815 1.26 augustss DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
1816 1.1 augustss
1817 1.63 augustss xfer->status = USBD_IN_PROGRESS;
1818 1.26 augustss for (; timo >= 0; timo--) {
1819 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1820 1.26 augustss DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
1821 1.208.12.1 itohy if (UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS)
1822 1.141 augustss uhci_intr1(sc);
1823 1.208.12.1 itohy if (xfer->status != USBD_IN_PROGRESS)
1824 1.208.12.1 itohy return;
1825 1.1 augustss }
1826 1.13 augustss
1827 1.13 augustss /* Timeout */
1828 1.13 augustss DPRINTF(("uhci_waitintr: timeout\n"));
1829 1.13 augustss for (ii = LIST_FIRST(&sc->sc_intrhead);
1830 1.152 augustss ii != NULL && ii->xfer != xfer;
1831 1.13 augustss ii = LIST_NEXT(ii, list))
1832 1.13 augustss ;
1833 1.41 augustss #ifdef DIAGNOSTIC
1834 1.63 augustss if (ii == NULL)
1835 1.163 provos panic("uhci_waitintr: lost intr_info");
1836 1.41 augustss #endif
1837 1.41 augustss uhci_idone(ii);
1838 1.1 augustss }
1839 1.1 augustss
1840 1.8 augustss void
1841 1.119 augustss uhci_poll(struct usbd_bus *bus)
1842 1.8 augustss {
1843 1.8 augustss uhci_softc_t *sc = (uhci_softc_t *)bus;
1844 1.8 augustss
1845 1.208.12.1 itohy if (UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS)
1846 1.141 augustss uhci_intr1(sc);
1847 1.8 augustss }
1848 1.8 augustss
1849 1.1 augustss void
1850 1.119 augustss uhci_reset(uhci_softc_t *sc)
1851 1.1 augustss {
1852 1.1 augustss int n;
1853 1.1 augustss
1854 1.1 augustss UHCICMD(sc, UHCI_CMD_HCRESET);
1855 1.1 augustss /* The reset bit goes low when the controller is done. */
1856 1.152 augustss for (n = 0; n < UHCI_RESET_TIMEOUT &&
1857 1.1 augustss (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
1858 1.92 augustss usb_delay_ms(&sc->sc_bus, 1);
1859 1.1 augustss if (n >= UHCI_RESET_TIMEOUT)
1860 1.152 augustss printf("%s: controller did not reset\n",
1861 1.13 augustss USBDEVNAME(sc->sc_bus.bdev));
1862 1.1 augustss }
1863 1.1 augustss
1864 1.16 augustss usbd_status
1865 1.119 augustss uhci_run(uhci_softc_t *sc, int run)
1866 1.1 augustss {
1867 1.1 augustss int s, n, running;
1868 1.71 augustss u_int16_t cmd;
1869 1.1 augustss
1870 1.1 augustss run = run != 0;
1871 1.132 augustss s = splhardusb();
1872 1.30 augustss DPRINTF(("uhci_run: setting run=%d\n", run));
1873 1.71 augustss cmd = UREAD2(sc, UHCI_CMD);
1874 1.71 augustss if (run)
1875 1.71 augustss cmd |= UHCI_CMD_RS;
1876 1.71 augustss else
1877 1.71 augustss cmd &= ~UHCI_CMD_RS;
1878 1.71 augustss UHCICMD(sc, cmd);
1879 1.13 augustss for(n = 0; n < 10; n++) {
1880 1.1 augustss running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
1881 1.1 augustss /* return when we've entered the state we want */
1882 1.1 augustss if (run == running) {
1883 1.1 augustss splx(s);
1884 1.30 augustss DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
1885 1.30 augustss UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
1886 1.16 augustss return (USBD_NORMAL_COMPLETION);
1887 1.1 augustss }
1888 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1889 1.1 augustss }
1890 1.1 augustss splx(s);
1891 1.13 augustss printf("%s: cannot %s\n", USBDEVNAME(sc->sc_bus.bdev),
1892 1.14 augustss run ? "start" : "stop");
1893 1.16 augustss return (USBD_IOERROR);
1894 1.1 augustss }
1895 1.1 augustss
1896 1.1 augustss /*
1897 1.1 augustss * Memory management routines.
1898 1.1 augustss * uhci_alloc_std allocates TDs
1899 1.1 augustss * uhci_alloc_sqh allocates QHs
1900 1.7 augustss * These two routines do their own free list management,
1901 1.1 augustss * partly for speed, partly because allocating DMAable memory
1902 1.1 augustss * has page size granularaity so much memory would be wasted if
1903 1.16 augustss * only one TD/QH (32 bytes) was placed in each allocated chunk.
1904 1.1 augustss */
1905 1.1 augustss
1906 1.208.12.1 itohy Static usbd_status
1907 1.208.12.1 itohy uhci_grow_std(uhci_softc_t *sc)
1908 1.1 augustss {
1909 1.208.12.1 itohy usb_dma_t dma;
1910 1.208.12.1 itohy struct uhci_mem_desc *um;
1911 1.1 augustss uhci_soft_td_t *std;
1912 1.63 augustss usbd_status err;
1913 1.42 augustss int i, offs;
1914 1.208.12.1 itohy int s;
1915 1.1 augustss
1916 1.208.12.1 itohy DPRINTFN(2,("uhci_grow_std: allocating chunk\n"));
1917 1.208.12.1 itohy err = usb_allocmem(&sc->sc_dmatag,
1918 1.208.12.1 itohy UHCI_STD_SIZE*UHCI_STD_CHUNK + sizeof(struct uhci_mem_desc),
1919 1.208.12.1 itohy UHCI_TD_ALIGN, &dma);
1920 1.208.12.1 itohy if (err)
1921 1.208.12.1 itohy return (err);
1922 1.208.12.1 itohy um = KERNADDR(&dma, UHCI_STD_SIZE * UHCI_STD_CHUNK);
1923 1.208.12.1 itohy um->um_top = KERNADDR(&dma, 0);
1924 1.208.12.1 itohy um->um_topdma = DMAADDR(&dma, 0);
1925 1.208.12.1 itohy um->um_dma = dma;
1926 1.208.12.1 itohy s = splusb();
1927 1.208.12.1 itohy SIMPLEQ_INSERT_HEAD(&sc->sc_std_chunks, um, um_next);
1928 1.208.12.1 itohy for(i = 0; i < UHCI_STD_CHUNK; i++) {
1929 1.208.12.1 itohy offs = i * UHCI_STD_SIZE;
1930 1.208.12.1 itohy std = KERNADDR(&dma, offs);
1931 1.208.12.1 itohy std->ut_mdesc = um;
1932 1.208.12.1 itohy std->link.std = sc->sc_freetds;
1933 1.208.12.1 itohy #if 0
1934 1.208.12.1 itohy std->aux_dma.block = NULL;
1935 1.208.12.1 itohy #endif
1936 1.208.12.1 itohy std->aux_data = NULL;
1937 1.208.12.1 itohy std->aux_len = 0;
1938 1.208.12.1 itohy sc->sc_freetds = std;
1939 1.208.12.1 itohy sc->sc_nfreetds++;
1940 1.1 augustss }
1941 1.208.12.1 itohy splx(s);
1942 1.208.12.1 itohy
1943 1.208.12.1 itohy return (USBD_NORMAL_COMPLETION);
1944 1.208.12.1 itohy }
1945 1.208.12.1 itohy
1946 1.208.12.1 itohy uhci_soft_td_t *
1947 1.208.12.1 itohy uhci_alloc_std(uhci_softc_t *sc)
1948 1.208.12.1 itohy {
1949 1.208.12.1 itohy uhci_soft_td_t *std;
1950 1.208.12.1 itohy int s;
1951 1.208.12.1 itohy
1952 1.208.12.1 itohy #ifdef DIAGNOSTIC
1953 1.208.12.1 itohy if (sc->sc_freetds == NULL)
1954 1.208.12.1 itohy panic("uhci_alloc_std: %d", sc->sc_nfreetds);
1955 1.208.12.1 itohy #endif
1956 1.208.12.1 itohy s = splusb();
1957 1.1 augustss std = sc->sc_freetds;
1958 1.42 augustss sc->sc_freetds = std->link.std;
1959 1.208.12.1 itohy splx(s);
1960 1.42 augustss memset(&std->td, 0, sizeof(uhci_td_t));
1961 1.1 augustss return std;
1962 1.1 augustss }
1963 1.1 augustss
1964 1.208.12.1 itohy Static uhci_soft_td_t *
1965 1.208.12.1 itohy uhci_alloc_std_norsv(uhci_softc_t *sc)
1966 1.208.12.1 itohy {
1967 1.208.12.1 itohy int s;
1968 1.208.12.1 itohy
1969 1.208.12.1 itohy s = splusb();
1970 1.208.12.1 itohy if (sc->sc_nfreetds < 1)
1971 1.208.12.1 itohy if (uhci_grow_std(sc))
1972 1.208.12.1 itohy return (NULL);
1973 1.208.12.1 itohy sc->sc_nfreetds--;
1974 1.208.12.1 itohy splx(s);
1975 1.208.12.1 itohy return (uhci_alloc_std(sc));
1976 1.208.12.1 itohy }
1977 1.208.12.1 itohy
1978 1.1 augustss void
1979 1.119 augustss uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std)
1980 1.1 augustss {
1981 1.208.12.1 itohy int s;
1982 1.208.12.1 itohy
1983 1.7 augustss #ifdef DIAGNOSTIC
1984 1.7 augustss #define TD_IS_FREE 0x12345678
1985 1.88 tsutsui if (le32toh(std->td.td_token) == TD_IS_FREE) {
1986 1.7 augustss printf("uhci_free_std: freeing free TD %p\n", std);
1987 1.7 augustss return;
1988 1.7 augustss }
1989 1.88 tsutsui std->td.td_token = htole32(TD_IS_FREE);
1990 1.7 augustss #endif
1991 1.208.12.1 itohy #if 0
1992 1.208.12.1 itohy if (std->aux_dma.block != NULL) {
1993 1.208.12.1 itohy usb_freemem(&sc->sc_dmatag, &std->aux_dma);
1994 1.208.12.1 itohy std->aux_dma.block = NULL;
1995 1.208.12.1 itohy std->aux_data = NULL;
1996 1.208.12.1 itohy std->aux_len = 0;
1997 1.208.12.1 itohy }
1998 1.208.12.1 itohy #endif
1999 1.208.12.1 itohy s = splusb();
2000 1.42 augustss std->link.std = sc->sc_freetds;
2001 1.1 augustss sc->sc_freetds = std;
2002 1.208.12.1 itohy splx(s);
2003 1.208.12.1 itohy }
2004 1.208.12.1 itohy
2005 1.208.12.1 itohy Static void
2006 1.208.12.1 itohy uhci_free_std_norsv(uhci_softc_t *sc, uhci_soft_td_t *std)
2007 1.208.12.1 itohy {
2008 1.208.12.1 itohy int s;
2009 1.208.12.1 itohy
2010 1.208.12.1 itohy s = splusb();
2011 1.208.12.1 itohy uhci_free_std(sc, std);
2012 1.208.12.1 itohy sc->sc_nfreetds++;
2013 1.208.12.1 itohy splx(s);
2014 1.1 augustss }
2015 1.1 augustss
2016 1.1 augustss uhci_soft_qh_t *
2017 1.119 augustss uhci_alloc_sqh(uhci_softc_t *sc)
2018 1.1 augustss {
2019 1.1 augustss uhci_soft_qh_t *sqh;
2020 1.63 augustss usbd_status err;
2021 1.1 augustss int i, offs;
2022 1.7 augustss usb_dma_t dma;
2023 1.208.12.1 itohy struct uhci_mem_desc *um;
2024 1.1 augustss
2025 1.63 augustss if (sc->sc_freeqhs == NULL) {
2026 1.1 augustss DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
2027 1.208.12.1 itohy err = usb_allocmem(&sc->sc_dmatag,
2028 1.208.12.1 itohy UHCI_SQH_SIZE*UHCI_SQH_CHUNK + sizeof(struct uhci_mem_desc),
2029 1.208.12.1 itohy UHCI_QH_ALIGN, &dma);
2030 1.63 augustss if (err)
2031 1.63 augustss return (0);
2032 1.208.12.1 itohy um = KERNADDR(&dma, UHCI_SQH_SIZE * UHCI_SQH_CHUNK);
2033 1.208.12.1 itohy um->um_top = KERNADDR(&dma, 0);
2034 1.208.12.1 itohy um->um_topdma = DMAADDR(&dma, 0);
2035 1.208.12.1 itohy um->um_dma = dma;
2036 1.208.12.1 itohy SIMPLEQ_INSERT_HEAD(&sc->sc_sqh_chunks, um, um_next);
2037 1.43 augustss for(i = 0; i < UHCI_SQH_CHUNK; i++) {
2038 1.42 augustss offs = i * UHCI_SQH_SIZE;
2039 1.159 augustss sqh = KERNADDR(&dma, offs);
2040 1.208.12.1 itohy sqh->uq_mdesc = um;
2041 1.42 augustss sqh->hlink = sc->sc_freeqhs;
2042 1.1 augustss sc->sc_freeqhs = sqh;
2043 1.1 augustss }
2044 1.1 augustss }
2045 1.1 augustss sqh = sc->sc_freeqhs;
2046 1.42 augustss sc->sc_freeqhs = sqh->hlink;
2047 1.42 augustss memset(&sqh->qh, 0, sizeof(uhci_qh_t));
2048 1.16 augustss return (sqh);
2049 1.1 augustss }
2050 1.1 augustss
2051 1.1 augustss void
2052 1.119 augustss uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
2053 1.1 augustss {
2054 1.42 augustss sqh->hlink = sc->sc_freeqhs;
2055 1.1 augustss sc->sc_freeqhs = sqh;
2056 1.1 augustss }
2057 1.1 augustss
2058 1.208.12.1 itohy Static void
2059 1.208.12.1 itohy uhci_free_desc_chunks(uhci_softc_t *sc, struct uhci_mdescs *c)
2060 1.208.12.1 itohy {
2061 1.208.12.1 itohy struct uhci_mem_desc *um;
2062 1.208.12.1 itohy
2063 1.208.12.1 itohy while ((um = SIMPLEQ_FIRST(c)) != NULL) {
2064 1.208.12.1 itohy SIMPLEQ_REMOVE_HEAD(c, um_next);
2065 1.208.12.1 itohy usb_freemem(&sc->sc_dmatag, &um->um_dma);
2066 1.208.12.1 itohy }
2067 1.208.12.1 itohy }
2068 1.208.12.1 itohy
2069 1.1 augustss void
2070 1.119 augustss uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std,
2071 1.119 augustss uhci_soft_td_t *stdend)
2072 1.1 augustss {
2073 1.1 augustss uhci_soft_td_t *p;
2074 1.1 augustss
2075 1.1 augustss for (; std != stdend; std = p) {
2076 1.42 augustss p = std->link.std;
2077 1.1 augustss uhci_free_std(sc, std);
2078 1.1 augustss }
2079 1.1 augustss }
2080 1.1 augustss
2081 1.1 augustss usbd_status
2082 1.119 augustss uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len,
2083 1.208.12.1 itohy int rd, u_int16_t flags, usbd_xfer_handle xfer,
2084 1.119 augustss uhci_soft_td_t **sp, uhci_soft_td_t **ep)
2085 1.1 augustss {
2086 1.208.12.1 itohy struct usb_buffer_dma *ub = &UXFER(xfer)->dmabuf;
2087 1.208.12.1 itohy uhci_soft_td_t *p, *prevp, *startp;
2088 1.208.12.1 itohy int i, ntd, l, tog, maxp, seg, segoff;
2089 1.18 augustss u_int32_t status;
2090 1.1 augustss int addr = upipe->pipe.device->address;
2091 1.1 augustss int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2092 1.208.12.1 itohy bus_dma_segment_t *segs = USB_BUFFER_SEGS(ub);
2093 1.1 augustss
2094 1.144 augustss DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d "
2095 1.152 augustss "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len,
2096 1.144 augustss upipe->pipe.device->speed, flags));
2097 1.208.12.1 itohy maxp = UE_MAXPKTSZ(upipe->pipe.endpoint->edesc);
2098 1.1 augustss if (maxp == 0) {
2099 1.1 augustss printf("uhci_alloc_std_chain: maxp=0\n");
2100 1.1 augustss return (USBD_INVAL);
2101 1.1 augustss }
2102 1.1 augustss ntd = (len + maxp - 1) / maxp;
2103 1.208.12.1 itohy if (len == 0)
2104 1.208.12.1 itohy flags |= USBD_FORCE_SHORT_XFER;
2105 1.73 augustss if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0)
2106 1.73 augustss ntd++;
2107 1.39 augustss DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd));
2108 1.208.12.1 itohy USB_KASSERT2(ntd > 0, ("uhci_alloc_std_chain: ntd=0"));
2109 1.38 augustss tog = upipe->nexttoggle;
2110 1.208.12.1 itohy prevp = NULL;
2111 1.208.12.1 itohy startp = NULL;
2112 1.33 augustss status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
2113 1.144 augustss if (upipe->pipe.device->speed == USB_SPEED_LOW)
2114 1.18 augustss status |= UHCI_TD_LS;
2115 1.73 augustss if (flags & USBD_SHORT_XFER_OK)
2116 1.18 augustss status |= UHCI_TD_SPD;
2117 1.208.12.1 itohy seg = 0;
2118 1.208.12.1 itohy segoff = 0;
2119 1.208.12.1 itohy for (i = 0; i < ntd; i++) {
2120 1.1 augustss p = uhci_alloc_std(sc);
2121 1.63 augustss if (p == NULL) {
2122 1.208.12.1 itohy uhci_free_std_chain(sc, startp, NULL);
2123 1.1 augustss return (USBD_NOMEM);
2124 1.1 augustss }
2125 1.208.12.1 itohy p->link.std = NULL;
2126 1.208.12.1 itohy if (prevp != NULL) {
2127 1.208.12.1 itohy prevp->link.std = p;
2128 1.208.12.1 itohy prevp->td.td_link =
2129 1.208.12.1 itohy htole32(UHCI_STD_DMAADDR(p) | UHCI_PTR_VF |
2130 1.208.12.1 itohy UHCI_PTR_TD);
2131 1.208.12.1 itohy UHCI_STD_SYNC(sc, prevp,
2132 1.208.12.1 itohy BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
2133 1.208.12.1 itohy } else {
2134 1.208.12.1 itohy startp = p;
2135 1.208.12.1 itohy }
2136 1.88 tsutsui p->td.td_status = htole32(status);
2137 1.208.12.1 itohy if (i == ntd - 1) {
2138 1.1 augustss /* last TD */
2139 1.1 augustss l = len % maxp;
2140 1.73 augustss if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER))
2141 1.73 augustss l = maxp;
2142 1.1 augustss *ep = p;
2143 1.1 augustss } else
2144 1.1 augustss l = maxp;
2145 1.152 augustss p->td.td_token =
2146 1.88 tsutsui htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) :
2147 1.88 tsutsui UHCI_TD_OUT(l, endpt, addr, tog));
2148 1.208.12.1 itohy
2149 1.208.12.1 itohy USB_KASSERT2(seg < USB_BUFFER_NSEGS(ub) || l == 0,
2150 1.208.12.1 itohy ("uhci_alloc_std_chain: too few segments"));
2151 1.208.12.1 itohy if (l == 0) {
2152 1.208.12.1 itohy p->td.td_buffer = 0;
2153 1.208.12.1 itohy } else if (l > segs[seg].ds_len - segoff) {
2154 1.208.12.1 itohy /* UHCI can't handle non-contiguous data. */
2155 1.208.12.1 itohy uhci_aux_dma_alloc(p, &UXFER(xfer)->aux,
2156 1.208.12.1 itohy (char *)xfer->hcbuffer + i * maxp, l);
2157 1.208.12.1 itohy
2158 1.208.12.1 itohy /* prepare aux DMA */
2159 1.208.12.1 itohy if (!rd)
2160 1.208.12.1 itohy bcopy(p->aux_data, p->aux_kern, l);
2161 1.208.12.1 itohy p->td.td_buffer = htole32(p->aux_dma);
2162 1.208.12.1 itohy
2163 1.208.12.1 itohy l -= segs[seg].ds_len - segoff;
2164 1.208.12.1 itohy seg++;
2165 1.208.12.1 itohy USB_KASSERT2(seg < USB_BUFFER_NSEGS(ub),
2166 1.208.12.1 itohy ("uhci_alloc_std_chain: too few segments 2"));
2167 1.208.12.1 itohy segoff = 0;
2168 1.208.12.1 itohy } else {
2169 1.208.12.1 itohy p->td.td_buffer = htole32(segs[seg].ds_addr +
2170 1.208.12.1 itohy segoff);
2171 1.208.12.1 itohy }
2172 1.208.12.1 itohy segoff += l;
2173 1.208.12.1 itohy if (l > 0 && segoff >= segs[seg].ds_len) {
2174 1.208.12.1 itohy USB_KASSERT2(segoff == segs[seg].ds_len,
2175 1.208.12.1 itohy ("uhci_alloc_std_chain: overlap"));
2176 1.208.12.1 itohy if (i * maxp + l != len) {
2177 1.208.12.1 itohy seg++;
2178 1.208.12.1 itohy segoff = 0;
2179 1.208.12.1 itohy }
2180 1.208.12.1 itohy }
2181 1.208.12.1 itohy prevp = p;
2182 1.1 augustss tog ^= 1;
2183 1.1 augustss }
2184 1.208.12.1 itohy prevp->td.td_link = htole32(UHCI_PTR_T | UHCI_PTR_VF | UHCI_PTR_TD);
2185 1.208.12.1 itohy upipe->nexttoggle = tog;
2186 1.208.12.1 itohy *sp = startp;
2187 1.208.12.1 itohy uhci_aux_dma_sync(sc, &UXFER(xfer)->aux,
2188 1.208.12.1 itohy rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
2189 1.152 augustss DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n",
2190 1.38 augustss upipe->nexttoggle));
2191 1.1 augustss return (USBD_NORMAL_COMPLETION);
2192 1.1 augustss }
2193 1.1 augustss
2194 1.208.12.1 itohy /*
2195 1.208.12.1 itohy * Allocate a physically contiguous buffer to handle cases where UHCI
2196 1.208.12.1 itohy * cannot handle a packet because it is not physically contiguous.
2197 1.208.12.1 itohy */
2198 1.208.12.1 itohy Static void
2199 1.208.12.1 itohy uhci_aux_mem_init(struct uhci_aux_mem *aux)
2200 1.208.12.1 itohy {
2201 1.208.12.1 itohy
2202 1.208.12.1 itohy aux->aux_curchunk = aux->aux_chunkoff = aux->aux_naux = 0;
2203 1.208.12.1 itohy }
2204 1.208.12.1 itohy
2205 1.208.12.1 itohy Static usbd_status
2206 1.208.12.1 itohy uhci_aux_mem_alloc(uhci_softc_t *sc, struct uhci_aux_mem *aux,
2207 1.208.12.1 itohy int naux, int maxp)
2208 1.208.12.1 itohy {
2209 1.208.12.1 itohy int nchunk, i, j;
2210 1.208.12.1 itohy usbd_status err;
2211 1.208.12.1 itohy
2212 1.208.12.1 itohy USB_KASSERT(aux->aux_nchunk == 0);
2213 1.208.12.1 itohy
2214 1.208.12.1 itohy nchunk = UHCI_NCHUNK(naux, maxp);
2215 1.208.12.1 itohy for (i = 0; i < nchunk; i++) {
2216 1.208.12.1 itohy err = usb_allocmem(&sc->sc_dmatag, UHCI_AUX_CHUNK_SIZE,
2217 1.208.12.1 itohy UHCI_AUX_CHUNK_SIZE, &aux->aux_chunk_dma[i]);
2218 1.208.12.1 itohy if (err) {
2219 1.208.12.1 itohy for (j = 0; j < i; j++)
2220 1.208.12.1 itohy usb_freemem(&sc->sc_dmatag,
2221 1.208.12.1 itohy &aux->aux_chunk_dma[j]);
2222 1.208.12.1 itohy return (err);
2223 1.208.12.1 itohy }
2224 1.208.12.1 itohy }
2225 1.208.12.1 itohy
2226 1.208.12.1 itohy aux->aux_nchunk = nchunk;
2227 1.208.12.1 itohy uhci_aux_mem_init(aux);
2228 1.208.12.1 itohy
2229 1.208.12.1 itohy return (USBD_NORMAL_COMPLETION);
2230 1.208.12.1 itohy }
2231 1.208.12.1 itohy
2232 1.208.12.1 itohy Static void
2233 1.208.12.1 itohy uhci_aux_mem_free(uhci_softc_t *sc, struct uhci_aux_mem *aux)
2234 1.208.12.1 itohy {
2235 1.208.12.1 itohy int i;
2236 1.208.12.1 itohy
2237 1.208.12.1 itohy for (i = 0; i < aux->aux_nchunk; i++)
2238 1.208.12.1 itohy usb_freemem(&sc->sc_dmatag, &aux->aux_chunk_dma[i]);
2239 1.208.12.1 itohy
2240 1.208.12.1 itohy aux->aux_nchunk = 0;
2241 1.208.12.1 itohy }
2242 1.208.12.1 itohy
2243 1.208.12.1 itohy Static void
2244 1.208.12.1 itohy uhci_aux_dma_alloc(uhci_soft_td_t *std, struct uhci_aux_mem *aux,
2245 1.208.12.1 itohy void *data, int len)
2246 1.208.12.1 itohy {
2247 1.208.12.1 itohy
2248 1.208.12.1 itohy if (aux->aux_chunkoff + len > UHCI_AUX_CHUNK_SIZE) {
2249 1.208.12.1 itohy aux->aux_curchunk++;
2250 1.208.12.1 itohy aux->aux_chunkoff = 0;
2251 1.208.12.1 itohy }
2252 1.208.12.1 itohy USB_KASSERT(aux->aux_curchunk < aux->aux_nchunk);
2253 1.208.12.1 itohy
2254 1.208.12.1 itohy std->aux_dma =
2255 1.208.12.1 itohy DMAADDR(&aux->aux_chunk_dma[aux->aux_curchunk], aux->aux_chunkoff);
2256 1.208.12.1 itohy std->aux_kern =
2257 1.208.12.1 itohy KERNADDR(&aux->aux_chunk_dma[aux->aux_curchunk], aux->aux_chunkoff);
2258 1.208.12.1 itohy
2259 1.208.12.1 itohy aux->aux_naux++;
2260 1.208.12.1 itohy }
2261 1.208.12.1 itohy
2262 1.208.12.1 itohy #if 0
2263 1.208.12.1 itohy Static uhci_physaddr_t
2264 1.208.12.1 itohy uhci_aux_dma_prepare(uhci_softc_t *sc, uhci_soft_td_t *std, int isread)
2265 1.208.12.1 itohy {
2266 1.208.12.1 itohy if (!isread) {
2267 1.208.12.1 itohy bcopy(std->aux_data, KERNADDR(&std->aux_dma, 0), std->aux_len);
2268 1.208.12.1 itohy }
2269 1.208.12.1 itohy USB_MEM_SYNC(&sc->sc_dmatag, &std->aux_dma,
2270 1.208.12.1 itohy isread ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
2271 1.208.12.1 itohy
2272 1.208.12.1 itohy return (DMAADDR(&std->aux_dma, 0));
2273 1.208.12.1 itohy }
2274 1.208.12.1 itohy #endif
2275 1.208.12.1 itohy
2276 1.208.12.1 itohy Static void
2277 1.208.12.1 itohy uhci_aux_dma_complete(uhci_soft_td_t *std, struct uhci_aux_mem *aux, int isread)
2278 1.208.12.1 itohy {
2279 1.208.12.1 itohy
2280 1.208.12.1 itohy if (isread) {
2281 1.208.12.1 itohy bcopy(std->aux_kern, std->aux_data, std->aux_len);
2282 1.208.12.1 itohy }
2283 1.208.12.1 itohy std->aux_data = NULL;
2284 1.208.12.1 itohy if (--aux->aux_naux == 0)
2285 1.208.12.1 itohy uhci_aux_mem_init(aux);
2286 1.208.12.1 itohy USB_KASSERT(aux->aux_naux >= 0);
2287 1.208.12.1 itohy }
2288 1.208.12.1 itohy
2289 1.208.12.1 itohy Static void
2290 1.208.12.1 itohy uhci_aux_dma_sync(uhci_softc_t *sc, struct uhci_aux_mem *aux, int op)
2291 1.208.12.1 itohy {
2292 1.208.12.1 itohy int naux, i;
2293 1.208.12.1 itohy
2294 1.208.12.1 itohy naux = aux->aux_curchunk;
2295 1.208.12.1 itohy if (aux->aux_chunkoff)
2296 1.208.12.1 itohy naux++;
2297 1.208.12.1 itohy
2298 1.208.12.1 itohy for (i = 0; i < naux; i++)
2299 1.208.12.1 itohy USB_MEM_SYNC(&sc->sc_dmatag, &aux->aux_chunk_dma[i], op);
2300 1.208.12.1 itohy }
2301 1.208.12.1 itohy
2302 1.38 augustss void
2303 1.119 augustss uhci_device_clear_toggle(usbd_pipe_handle pipe)
2304 1.38 augustss {
2305 1.38 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2306 1.38 augustss upipe->nexttoggle = 0;
2307 1.38 augustss }
2308 1.38 augustss
2309 1.38 augustss void
2310 1.205 christos uhci_noop(usbd_pipe_handle pipe)
2311 1.38 augustss {
2312 1.38 augustss }
2313 1.38 augustss
2314 1.1 augustss usbd_status
2315 1.119 augustss uhci_device_bulk_transfer(usbd_xfer_handle xfer)
2316 1.1 augustss {
2317 1.208.12.1 itohy uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
2318 1.63 augustss usbd_status err;
2319 1.16 augustss
2320 1.52 augustss /* Insert last in queue. */
2321 1.208.12.1 itohy err = usb_insert_transfer_dma(xfer, &sc->sc_dmatag,
2322 1.208.12.1 itohy &UXFER(xfer)->dmabuf);
2323 1.63 augustss if (err)
2324 1.63 augustss return (err);
2325 1.52 augustss
2326 1.152 augustss /*
2327 1.92 augustss * Pipe isn't running (otherwise err would be USBD_INPROG),
2328 1.92 augustss * so start it first.
2329 1.67 augustss */
2330 1.63 augustss return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2331 1.16 augustss }
2332 1.16 augustss
2333 1.16 augustss usbd_status
2334 1.119 augustss uhci_device_bulk_start(usbd_xfer_handle xfer)
2335 1.16 augustss {
2336 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2337 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
2338 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2339 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2340 1.55 augustss uhci_soft_td_t *data, *dataend;
2341 1.1 augustss uhci_soft_qh_t *sqh;
2342 1.63 augustss usbd_status err;
2343 1.45 augustss int len, isread, endpt;
2344 1.1 augustss int s;
2345 1.1 augustss
2346 1.169 augustss DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n",
2347 1.169 augustss xfer, xfer->length, xfer->flags, ii));
2348 1.1 augustss
2349 1.82 augustss if (sc->sc_dying)
2350 1.82 augustss return (USBD_IOERROR);
2351 1.82 augustss
2352 1.48 augustss #ifdef DIAGNOSTIC
2353 1.63 augustss if (xfer->rqflags & URQ_REQUEST)
2354 1.163 provos panic("uhci_device_bulk_transfer: a request");
2355 1.48 augustss #endif
2356 1.1 augustss
2357 1.63 augustss len = xfer->length;
2358 1.102 augustss endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2359 1.45 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2360 1.1 augustss sqh = upipe->u.bulk.sqh;
2361 1.1 augustss
2362 1.1 augustss upipe->u.bulk.isread = isread;
2363 1.1 augustss upipe->u.bulk.length = len;
2364 1.1 augustss
2365 1.208.12.1 itohy err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, xfer,
2366 1.208.12.1 itohy &data, &dataend);
2367 1.63 augustss if (err)
2368 1.63 augustss return (err);
2369 1.88 tsutsui dataend->td.td_status |= htole32(UHCI_TD_IOC);
2370 1.208.12.1 itohy UHCI_STD_SYNC(sc, dataend,
2371 1.208.12.1 itohy BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
2372 1.1 augustss
2373 1.208.12.1 itohy #ifdef USB_DEBUG
2374 1.33 augustss if (uhcidebug > 8) {
2375 1.55 augustss DPRINTF(("uhci_device_bulk_transfer: data(1)\n"));
2376 1.55 augustss uhci_dump_tds(data);
2377 1.1 augustss }
2378 1.1 augustss #endif
2379 1.1 augustss
2380 1.1 augustss /* Set up interrupt info. */
2381 1.63 augustss ii->xfer = xfer;
2382 1.55 augustss ii->stdstart = data;
2383 1.55 augustss ii->stdend = dataend;
2384 1.7 augustss #ifdef DIAGNOSTIC
2385 1.70 augustss if (!ii->isdone) {
2386 1.70 augustss printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii);
2387 1.70 augustss }
2388 1.7 augustss ii->isdone = 0;
2389 1.7 augustss #endif
2390 1.1 augustss
2391 1.55 augustss sqh->elink = data;
2392 1.208.12.1 itohy sqh->qh.qh_elink = htole32(UHCI_STD_DMAADDR(data) | UHCI_PTR_TD);
2393 1.1 augustss
2394 1.1 augustss s = splusb();
2395 1.1 augustss uhci_add_bulk(sc, sqh);
2396 1.92 augustss uhci_add_intr_info(sc, ii);
2397 1.1 augustss
2398 1.63 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
2399 1.208.12.1 itohy usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2400 1.91 augustss uhci_timeout, ii);
2401 1.13 augustss }
2402 1.92 augustss xfer->status = USBD_IN_PROGRESS;
2403 1.1 augustss splx(s);
2404 1.1 augustss
2405 1.208.12.1 itohy #ifdef USB_DEBUG
2406 1.1 augustss if (uhcidebug > 10) {
2407 1.55 augustss DPRINTF(("uhci_device_bulk_transfer: data(2)\n"));
2408 1.55 augustss uhci_dump_tds(data);
2409 1.1 augustss }
2410 1.1 augustss #endif
2411 1.1 augustss
2412 1.26 augustss if (sc->sc_bus.use_polling)
2413 1.63 augustss uhci_waitintr(sc, xfer);
2414 1.26 augustss
2415 1.1 augustss return (USBD_IN_PROGRESS);
2416 1.1 augustss }
2417 1.1 augustss
2418 1.1 augustss /* Abort a device bulk request. */
2419 1.1 augustss void
2420 1.119 augustss uhci_device_bulk_abort(usbd_xfer_handle xfer)
2421 1.1 augustss {
2422 1.33 augustss DPRINTF(("uhci_device_bulk_abort:\n"));
2423 1.66 augustss uhci_abort_xfer(xfer, USBD_CANCELLED);
2424 1.33 augustss }
2425 1.33 augustss
2426 1.92 augustss /*
2427 1.154 augustss * Abort a device request.
2428 1.154 augustss * If this routine is called at splusb() it guarantees that the request
2429 1.154 augustss * will be removed from the hardware scheduling and that the callback
2430 1.154 augustss * for it will be called with USBD_CANCELLED status.
2431 1.154 augustss * It's impossible to guarantee that the requested transfer will not
2432 1.154 augustss * have happened since the hardware runs concurrently.
2433 1.154 augustss * If the transaction has already happened we rely on the ordinary
2434 1.154 augustss * interrupt processing to process it.
2435 1.92 augustss */
2436 1.33 augustss void
2437 1.119 augustss uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2438 1.33 augustss {
2439 1.208.12.1 itohy struct uhci_xfer *uxfer = UXFER(xfer);
2440 1.208.12.1 itohy uhci_intr_info_t *ii = &uxfer->iinfo;
2441 1.153 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2442 1.153 augustss uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
2443 1.33 augustss uhci_soft_td_t *std;
2444 1.92 augustss int s;
2445 1.188 augustss int wake;
2446 1.65 augustss
2447 1.106 augustss DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status));
2448 1.33 augustss
2449 1.153 augustss if (sc->sc_dying) {
2450 1.153 augustss /* If we're dying, just do the software part. */
2451 1.153 augustss s = splusb();
2452 1.153 augustss xfer->status = status; /* make software ignore it */
2453 1.157 tsutsui usb_uncallout(xfer->timeout_handle, uhci_timeout, xfer);
2454 1.208.12.1 itohy usb_rem_task(xfer->pipe->device, &UXFER(xfer)->abort_task);
2455 1.208.12.1 itohy uhci_transfer_complete(xfer);
2456 1.92 augustss splx(s);
2457 1.194 christos return;
2458 1.92 augustss }
2459 1.92 augustss
2460 1.153 augustss if (xfer->device->bus->intr_context || !curproc)
2461 1.163 provos panic("uhci_abort_xfer: not in process context");
2462 1.153 augustss
2463 1.153 augustss /*
2464 1.188 augustss * If an abort is already in progress then just wait for it to
2465 1.188 augustss * complete and return.
2466 1.188 augustss */
2467 1.208.12.1 itohy if (uxfer->uhci_xfer_flags & UHCI_XFER_ABORTING) {
2468 1.188 augustss DPRINTFN(2, ("uhci_abort_xfer: already aborting\n"));
2469 1.208.12.1 itohy /* No need to wait if we're aborting from a timeout. */
2470 1.208.12.1 itohy if (status == USBD_TIMEOUT) {
2471 1.188 augustss #ifdef DIAGNOSTIC
2472 1.188 augustss printf("uhci_abort_xfer: TIMEOUT while aborting\n");
2473 1.188 augustss #endif
2474 1.208.12.1 itohy return;
2475 1.208.12.1 itohy }
2476 1.188 augustss /* Override the status which might be USBD_TIMEOUT. */
2477 1.188 augustss xfer->status = status;
2478 1.188 augustss DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n"));
2479 1.208.12.1 itohy uxfer->uhci_xfer_flags |= UHCI_XFER_ABORTWAIT;
2480 1.208.12.1 itohy while (uxfer->uhci_xfer_flags & UHCI_XFER_ABORTING)
2481 1.208.12.1 itohy tsleep(&uxfer->uhci_xfer_flags, PZERO, "uhciaw", 0);
2482 1.188 augustss return;
2483 1.188 augustss }
2484 1.188 augustss
2485 1.188 augustss /*
2486 1.153 augustss * Step 1: Make interrupt routine and hardware ignore xfer.
2487 1.153 augustss */
2488 1.153 augustss s = splusb();
2489 1.208.12.1 itohy uxfer->uhci_xfer_flags |= UHCI_XFER_ABORTING;
2490 1.153 augustss xfer->status = status; /* make software ignore it */
2491 1.106 augustss usb_uncallout(xfer->timeout_handle, uhci_timeout, ii);
2492 1.208.12.1 itohy usb_rem_task(xfer->pipe->device, &UXFER(xfer)->abort_task);
2493 1.153 augustss DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii));
2494 1.208.12.1 itohy for (std = ii->stdstart; std != NULL; std = std->link.std) {
2495 1.208.12.1 itohy UHCI_STD_SYNC(sc, std,
2496 1.208.12.1 itohy BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
2497 1.92 augustss std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
2498 1.208.12.1 itohy UHCI_STD_SYNC(sc, std,
2499 1.208.12.1 itohy BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
2500 1.208.12.1 itohy }
2501 1.153 augustss splx(s);
2502 1.92 augustss
2503 1.162 augustss /*
2504 1.153 augustss * Step 2: Wait until we know hardware has finished any possible
2505 1.153 augustss * use of the xfer. Also make sure the soft interrupt routine
2506 1.153 augustss * has run.
2507 1.153 augustss */
2508 1.154 augustss usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */
2509 1.153 augustss s = splusb();
2510 1.164 augustss #ifdef USB_USE_SOFTINTR
2511 1.153 augustss sc->sc_softwake = 1;
2512 1.164 augustss #endif /* USB_USE_SOFTINTR */
2513 1.153 augustss usb_schedsoftintr(&sc->sc_bus);
2514 1.164 augustss #ifdef USB_USE_SOFTINTR
2515 1.154 augustss DPRINTFN(1,("uhci_abort_xfer: tsleep\n"));
2516 1.153 augustss tsleep(&sc->sc_softwake, PZERO, "uhciab", 0);
2517 1.164 augustss #endif /* USB_USE_SOFTINTR */
2518 1.153 augustss splx(s);
2519 1.162 augustss
2520 1.153 augustss /*
2521 1.153 augustss * Step 3: Execute callback.
2522 1.153 augustss */
2523 1.154 augustss DPRINTFN(1,("uhci_abort_xfer: callback\n"));
2524 1.92 augustss s = splusb();
2525 1.100 augustss #ifdef DIAGNOSTIC
2526 1.106 augustss ii->isdone = 1;
2527 1.100 augustss #endif
2528 1.208.12.1 itohy /* Do the wakeup first to avoid touching the xfer after the callback. */
2529 1.208.12.1 itohy wake = uxfer->uhci_xfer_flags & UHCI_XFER_ABORTWAIT;
2530 1.208.12.1 itohy uxfer->uhci_xfer_flags &= ~(UHCI_XFER_ABORTING | UHCI_XFER_ABORTWAIT);
2531 1.208.12.1 itohy uhci_transfer_complete(xfer);
2532 1.188 augustss if (wake)
2533 1.208.12.1 itohy wakeup(&uxfer->uhci_xfer_flags);
2534 1.33 augustss splx(s);
2535 1.1 augustss }
2536 1.1 augustss
2537 1.208.12.1 itohy /*
2538 1.208.12.1 itohy * Perform any UHCI-specific transfer completion operations, then
2539 1.208.12.1 itohy * call usb_transfer_complete().
2540 1.208.12.1 itohy */
2541 1.208.12.1 itohy Static void
2542 1.208.12.1 itohy uhci_transfer_complete(usbd_xfer_handle xfer)
2543 1.208.12.1 itohy {
2544 1.208.12.1 itohy uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2545 1.208.12.1 itohy struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2546 1.208.12.1 itohy uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
2547 1.208.12.1 itohy uhci_soft_td_t *p;
2548 1.208.12.1 itohy struct usb_buffer_dma *ub = &UXFER(xfer)->dmabuf;
2549 1.208.12.1 itohy int i, isread, n;
2550 1.208.12.1 itohy
2551 1.208.12.1 itohy /* XXX, must be an easier way to detect reads... */
2552 1.208.12.1 itohy isread = ((xfer->rqflags & URQ_REQUEST) &&
2553 1.208.12.1 itohy (xfer->request.bmRequestType & UT_READ)) ||
2554 1.208.12.1 itohy (xfer->pipe->endpoint->edesc->bEndpointAddress & UE_DIR_IN);
2555 1.208.12.1 itohy
2556 1.208.12.1 itohy if (ub)
2557 1.208.12.1 itohy usb_sync_buffer_dma(&sc->sc_dmatag, ub,
2558 1.208.12.1 itohy isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
2559 1.208.12.1 itohy
2560 1.208.12.1 itohy uhci_aux_dma_sync(sc, &UXFER(xfer)->aux,
2561 1.208.12.1 itohy isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
2562 1.208.12.1 itohy
2563 1.208.12.1 itohy /* Copy back from any auxillary buffers after a read operation. */
2564 1.208.12.1 itohy if (xfer->nframes == 0) {
2565 1.208.12.1 itohy for (p = ii->stdstart; p != NULL; p = p->link.std) {
2566 1.208.12.1 itohy if (p->aux_data != NULL)
2567 1.208.12.1 itohy uhci_aux_dma_complete(p, &UXFER(xfer)->aux,
2568 1.208.12.1 itohy isread);
2569 1.208.12.1 itohy }
2570 1.208.12.1 itohy } else {
2571 1.208.12.1 itohy if (xfer->nframes != 0) {
2572 1.208.12.1 itohy /* Isoc transfer, do things differently. */
2573 1.208.12.1 itohy n = UXFER(xfer)->curframe;
2574 1.208.12.1 itohy for (i = 0; i < xfer->nframes; i++) {
2575 1.208.12.1 itohy p = upipe->u.iso.stds[n];
2576 1.208.12.1 itohy if (p->aux_data != NULL)
2577 1.208.12.1 itohy uhci_aux_dma_complete(p,
2578 1.208.12.1 itohy &UXFER(xfer)->aux, isread);
2579 1.208.12.1 itohy if (++n >= UHCI_VFRAMELIST_COUNT)
2580 1.208.12.1 itohy n = 0;
2581 1.208.12.1 itohy }
2582 1.208.12.1 itohy }
2583 1.208.12.1 itohy }
2584 1.208.12.1 itohy
2585 1.208.12.1 itohy usb_transfer_complete(xfer);
2586 1.208.12.1 itohy }
2587 1.208.12.1 itohy
2588 1.1 augustss /* Close a device bulk pipe. */
2589 1.1 augustss void
2590 1.119 augustss uhci_device_bulk_close(usbd_pipe_handle pipe)
2591 1.1 augustss {
2592 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2593 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
2594 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2595 1.1 augustss
2596 1.1 augustss uhci_free_sqh(sc, upipe->u.bulk.sqh);
2597 1.208.12.1 itohy pipe->endpoint->savedtoggle = upipe->nexttoggle;
2598 1.1 augustss }
2599 1.1 augustss
2600 1.1 augustss usbd_status
2601 1.119 augustss uhci_device_ctrl_transfer(usbd_xfer_handle xfer)
2602 1.1 augustss {
2603 1.208.12.1 itohy uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
2604 1.63 augustss usbd_status err;
2605 1.16 augustss
2606 1.52 augustss /* Insert last in queue. */
2607 1.208.12.1 itohy err = usb_insert_transfer_dma(xfer, &sc->sc_dmatag,
2608 1.208.12.1 itohy &UXFER(xfer)->dmabuf);
2609 1.63 augustss if (err)
2610 1.63 augustss return (err);
2611 1.52 augustss
2612 1.152 augustss /*
2613 1.92 augustss * Pipe isn't running (otherwise err would be USBD_INPROG),
2614 1.92 augustss * so start it first.
2615 1.67 augustss */
2616 1.63 augustss return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2617 1.16 augustss }
2618 1.16 augustss
2619 1.16 augustss usbd_status
2620 1.119 augustss uhci_device_ctrl_start(usbd_xfer_handle xfer)
2621 1.16 augustss {
2622 1.63 augustss uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
2623 1.63 augustss usbd_status err;
2624 1.1 augustss
2625 1.82 augustss if (sc->sc_dying)
2626 1.82 augustss return (USBD_IOERROR);
2627 1.82 augustss
2628 1.48 augustss #ifdef DIAGNOSTIC
2629 1.63 augustss if (!(xfer->rqflags & URQ_REQUEST))
2630 1.163 provos panic("uhci_device_ctrl_transfer: not a request");
2631 1.48 augustss #endif
2632 1.1 augustss
2633 1.63 augustss err = uhci_device_request(xfer);
2634 1.63 augustss if (err)
2635 1.63 augustss return (err);
2636 1.1 augustss
2637 1.9 augustss if (sc->sc_bus.use_polling)
2638 1.63 augustss uhci_waitintr(sc, xfer);
2639 1.1 augustss return (USBD_IN_PROGRESS);
2640 1.1 augustss }
2641 1.1 augustss
2642 1.1 augustss usbd_status
2643 1.119 augustss uhci_device_intr_transfer(usbd_xfer_handle xfer)
2644 1.1 augustss {
2645 1.208.12.1 itohy uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
2646 1.63 augustss usbd_status err;
2647 1.16 augustss
2648 1.52 augustss /* Insert last in queue. */
2649 1.208.12.1 itohy err = usb_insert_transfer_dma(xfer, &sc->sc_dmatag,
2650 1.208.12.1 itohy &UXFER(xfer)->dmabuf);
2651 1.63 augustss if (err)
2652 1.63 augustss return (err);
2653 1.52 augustss
2654 1.152 augustss /*
2655 1.92 augustss * Pipe isn't running (otherwise err would be USBD_INPROG),
2656 1.92 augustss * so start it first.
2657 1.67 augustss */
2658 1.63 augustss return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2659 1.16 augustss }
2660 1.16 augustss
2661 1.16 augustss usbd_status
2662 1.119 augustss uhci_device_intr_start(usbd_xfer_handle xfer)
2663 1.16 augustss {
2664 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2665 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
2666 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2667 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2668 1.55 augustss uhci_soft_td_t *data, *dataend;
2669 1.1 augustss uhci_soft_qh_t *sqh;
2670 1.63 augustss usbd_status err;
2671 1.187 skrll int isread, endpt;
2672 1.49 augustss int i, s;
2673 1.1 augustss
2674 1.82 augustss if (sc->sc_dying)
2675 1.82 augustss return (USBD_IOERROR);
2676 1.82 augustss
2677 1.63 augustss DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n",
2678 1.63 augustss xfer, xfer->length, xfer->flags));
2679 1.1 augustss
2680 1.48 augustss #ifdef DIAGNOSTIC
2681 1.63 augustss if (xfer->rqflags & URQ_REQUEST)
2682 1.163 provos panic("uhci_device_intr_transfer: a request");
2683 1.48 augustss #endif
2684 1.1 augustss
2685 1.187 skrll endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2686 1.187 skrll isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2687 1.208.12.1 itohy sqh = upipe->u.bulk.sqh;
2688 1.187 skrll
2689 1.187 skrll upipe->u.intr.isread = isread;
2690 1.187 skrll
2691 1.208.12.1 itohy err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread, xfer->flags,
2692 1.208.12.1 itohy xfer, &data, &dataend);
2693 1.63 augustss if (err)
2694 1.63 augustss return (err);
2695 1.88 tsutsui dataend->td.td_status |= htole32(UHCI_TD_IOC);
2696 1.208.12.1 itohy UHCI_STD_SYNC(sc, dataend, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
2697 1.1 augustss
2698 1.208.12.1 itohy #ifdef USB_DEBUG
2699 1.1 augustss if (uhcidebug > 10) {
2700 1.55 augustss DPRINTF(("uhci_device_intr_transfer: data(1)\n"));
2701 1.55 augustss uhci_dump_tds(data);
2702 1.1 augustss uhci_dump_qh(upipe->u.intr.qhs[0]);
2703 1.1 augustss }
2704 1.1 augustss #endif
2705 1.1 augustss
2706 1.1 augustss s = splusb();
2707 1.1 augustss /* Set up interrupt info. */
2708 1.63 augustss ii->xfer = xfer;
2709 1.55 augustss ii->stdstart = data;
2710 1.55 augustss ii->stdend = dataend;
2711 1.7 augustss #ifdef DIAGNOSTIC
2712 1.70 augustss if (!ii->isdone) {
2713 1.70 augustss printf("uhci_device_intr_transfer: not done, ii=%p\n", ii);
2714 1.70 augustss }
2715 1.7 augustss ii->isdone = 0;
2716 1.7 augustss #endif
2717 1.1 augustss
2718 1.152 augustss DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
2719 1.12 augustss upipe->u.intr.qhs[0]));
2720 1.1 augustss for (i = 0; i < upipe->u.intr.npoll; i++) {
2721 1.1 augustss sqh = upipe->u.intr.qhs[i];
2722 1.55 augustss sqh->elink = data;
2723 1.208.12.1 itohy sqh->qh.qh_elink = htole32(UHCI_STD_DMAADDR(data) | UHCI_PTR_TD);
2724 1.208.12.1 itohy UHCI_SQH_SYNC(sc, sqh,
2725 1.208.12.1 itohy BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
2726 1.1 augustss }
2727 1.92 augustss uhci_add_intr_info(sc, ii);
2728 1.92 augustss xfer->status = USBD_IN_PROGRESS;
2729 1.1 augustss splx(s);
2730 1.1 augustss
2731 1.208.12.1 itohy #ifdef USB_DEBUG
2732 1.1 augustss if (uhcidebug > 10) {
2733 1.55 augustss DPRINTF(("uhci_device_intr_transfer: data(2)\n"));
2734 1.55 augustss uhci_dump_tds(data);
2735 1.1 augustss uhci_dump_qh(upipe->u.intr.qhs[0]);
2736 1.1 augustss }
2737 1.1 augustss #endif
2738 1.1 augustss
2739 1.1 augustss return (USBD_IN_PROGRESS);
2740 1.1 augustss }
2741 1.1 augustss
2742 1.1 augustss /* Abort a device control request. */
2743 1.1 augustss void
2744 1.119 augustss uhci_device_ctrl_abort(usbd_xfer_handle xfer)
2745 1.1 augustss {
2746 1.33 augustss DPRINTF(("uhci_device_ctrl_abort:\n"));
2747 1.66 augustss uhci_abort_xfer(xfer, USBD_CANCELLED);
2748 1.1 augustss }
2749 1.1 augustss
2750 1.1 augustss /* Close a device control pipe. */
2751 1.1 augustss void
2752 1.205 christos uhci_device_ctrl_close(usbd_pipe_handle pipe)
2753 1.1 augustss {
2754 1.208.12.1 itohy struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2755 1.208.12.1 itohy uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2756 1.208.12.1 itohy
2757 1.208.12.1 itohy uhci_free_sqh(sc, upipe->u.ctl.sqh);
2758 1.208.12.1 itohy uhci_free_std_norsv(sc, upipe->u.ctl.setup);
2759 1.208.12.1 itohy uhci_free_std_norsv(sc, upipe->u.ctl.stat);
2760 1.208.12.1 itohy usb_freemem(&sc->sc_dmatag, &upipe->u.ctl.reqdma);
2761 1.1 augustss }
2762 1.1 augustss
2763 1.1 augustss /* Abort a device interrupt request. */
2764 1.1 augustss void
2765 1.119 augustss uhci_device_intr_abort(usbd_xfer_handle xfer)
2766 1.1 augustss {
2767 1.63 augustss DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer));
2768 1.63 augustss if (xfer->pipe->intrxfer == xfer) {
2769 1.36 augustss DPRINTFN(1,("uhci_device_intr_abort: remove\n"));
2770 1.154 augustss xfer->pipe->intrxfer = NULL;
2771 1.1 augustss }
2772 1.66 augustss uhci_abort_xfer(xfer, USBD_CANCELLED);
2773 1.1 augustss }
2774 1.1 augustss
2775 1.1 augustss /* Close a device interrupt pipe. */
2776 1.1 augustss void
2777 1.119 augustss uhci_device_intr_close(usbd_pipe_handle pipe)
2778 1.1 augustss {
2779 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2780 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
2781 1.92 augustss int i, npoll;
2782 1.92 augustss int s;
2783 1.1 augustss
2784 1.1 augustss /* Unlink descriptors from controller data structures. */
2785 1.1 augustss npoll = upipe->u.intr.npoll;
2786 1.92 augustss s = splusb();
2787 1.1 augustss for (i = 0; i < npoll; i++)
2788 1.92 augustss uhci_remove_intr(sc, upipe->u.intr.qhs[i]);
2789 1.92 augustss splx(s);
2790 1.1 augustss
2791 1.152 augustss /*
2792 1.1 augustss * We now have to wait for any activity on the physical
2793 1.1 augustss * descriptors to stop.
2794 1.1 augustss */
2795 1.20 augustss usb_delay_ms(&sc->sc_bus, 2);
2796 1.1 augustss
2797 1.1 augustss for(i = 0; i < npoll; i++)
2798 1.1 augustss uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
2799 1.31 augustss free(upipe->u.intr.qhs, M_USBHC);
2800 1.1 augustss
2801 1.1 augustss /* XXX free other resources */
2802 1.1 augustss }
2803 1.1 augustss
2804 1.1 augustss usbd_status
2805 1.119 augustss uhci_device_request(usbd_xfer_handle xfer)
2806 1.1 augustss {
2807 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2808 1.63 augustss usb_device_request_t *req = &xfer->request;
2809 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
2810 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2811 1.1 augustss int addr = dev->address;
2812 1.1 augustss int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2813 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2814 1.55 augustss uhci_soft_td_t *setup, *data, *stat, *next, *dataend;
2815 1.1 augustss uhci_soft_qh_t *sqh;
2816 1.1 augustss int len;
2817 1.1 augustss u_int32_t ls;
2818 1.63 augustss usbd_status err;
2819 1.1 augustss int isread;
2820 1.1 augustss int s;
2821 1.1 augustss
2822 1.13 augustss DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
2823 1.12 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
2824 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
2825 1.1 augustss UGETW(req->wIndex), UGETW(req->wLength),
2826 1.1 augustss addr, endpt));
2827 1.1 augustss
2828 1.144 augustss ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0;
2829 1.1 augustss isread = req->bmRequestType & UT_READ;
2830 1.1 augustss len = UGETW(req->wLength);
2831 1.1 augustss
2832 1.1 augustss setup = upipe->u.ctl.setup;
2833 1.1 augustss stat = upipe->u.ctl.stat;
2834 1.1 augustss sqh = upipe->u.ctl.sqh;
2835 1.1 augustss
2836 1.1 augustss /* Set up data transaction */
2837 1.1 augustss if (len != 0) {
2838 1.38 augustss upipe->nexttoggle = 1;
2839 1.73 augustss err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
2840 1.208.12.1 itohy xfer, &data, &dataend);
2841 1.63 augustss if (err)
2842 1.63 augustss return (err);
2843 1.55 augustss next = data;
2844 1.55 augustss dataend->link.std = stat;
2845 1.208.12.1 itohy dataend->td.td_link =
2846 1.208.12.1 itohy htole32(UHCI_STD_DMAADDR(stat) | UHCI_PTR_VF | UHCI_PTR_TD);
2847 1.208.12.1 itohy UHCI_STD_SYNC(sc, dataend,
2848 1.208.12.1 itohy BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
2849 1.1 augustss } else {
2850 1.1 augustss next = stat;
2851 1.1 augustss }
2852 1.1 augustss upipe->u.ctl.length = len;
2853 1.1 augustss
2854 1.159 augustss memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req);
2855 1.208.12.1 itohy USB_MEM_SYNC(&sc->sc_dmatag, &upipe->u.ctl.reqdma,
2856 1.208.12.1 itohy BUS_DMASYNC_PREWRITE);
2857 1.1 augustss
2858 1.42 augustss setup->link.std = next;
2859 1.208.12.1 itohy setup->td.td_link = htole32(UHCI_STD_DMAADDR(next) | UHCI_PTR_VF | UHCI_PTR_TD);
2860 1.88 tsutsui setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
2861 1.88 tsutsui UHCI_TD_ACTIVE);
2862 1.88 tsutsui setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr));
2863 1.160 augustss setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0));
2864 1.208.12.1 itohy UHCI_STD_SYNC(sc, setup, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
2865 1.42 augustss
2866 1.92 augustss stat->link.std = NULL;
2867 1.88 tsutsui stat->td.td_link = htole32(UHCI_PTR_T);
2868 1.152 augustss stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
2869 1.39 augustss UHCI_TD_ACTIVE | UHCI_TD_IOC);
2870 1.152 augustss stat->td.td_token =
2871 1.88 tsutsui htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
2872 1.88 tsutsui UHCI_TD_IN (0, endpt, addr, 1));
2873 1.88 tsutsui stat->td.td_buffer = htole32(0);
2874 1.208.12.1 itohy UHCI_STD_SYNC(sc, stat, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
2875 1.1 augustss
2876 1.208.12.1 itohy #ifdef USB_DEBUG
2877 1.67 augustss if (uhcidebug > 10) {
2878 1.47 augustss DPRINTF(("uhci_device_request: before transfer\n"));
2879 1.41 augustss uhci_dump_tds(setup);
2880 1.1 augustss }
2881 1.1 augustss #endif
2882 1.1 augustss
2883 1.1 augustss /* Set up interrupt info. */
2884 1.63 augustss ii->xfer = xfer;
2885 1.1 augustss ii->stdstart = setup;
2886 1.1 augustss ii->stdend = stat;
2887 1.7 augustss #ifdef DIAGNOSTIC
2888 1.70 augustss if (!ii->isdone) {
2889 1.70 augustss printf("uhci_device_request: not done, ii=%p\n", ii);
2890 1.70 augustss }
2891 1.7 augustss ii->isdone = 0;
2892 1.7 augustss #endif
2893 1.1 augustss
2894 1.42 augustss sqh->elink = setup;
2895 1.208.12.1 itohy sqh->qh.qh_elink = htole32(UHCI_STD_DMAADDR(setup) | UHCI_PTR_TD);
2896 1.208.12.1 itohy UHCI_SQH_SYNC(sc, sqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
2897 1.1 augustss
2898 1.1 augustss s = splusb();
2899 1.144 augustss if (dev->speed == USB_SPEED_LOW)
2900 1.123 augustss uhci_add_ls_ctrl(sc, sqh);
2901 1.123 augustss else
2902 1.123 augustss uhci_add_hs_ctrl(sc, sqh);
2903 1.92 augustss uhci_add_intr_info(sc, ii);
2904 1.208.12.1 itohy #ifdef USB_DEBUG
2905 1.1 augustss if (uhcidebug > 12) {
2906 1.1 augustss uhci_soft_td_t *std;
2907 1.1 augustss uhci_soft_qh_t *xqh;
2908 1.13 augustss uhci_soft_qh_t *sxqh;
2909 1.13 augustss int maxqh = 0;
2910 1.1 augustss uhci_physaddr_t link;
2911 1.47 augustss DPRINTF(("uhci_enter_ctl_q: follow from [0]\n"));
2912 1.1 augustss for (std = sc->sc_vframes[0].htd, link = 0;
2913 1.121 augustss (link & UHCI_PTR_QH) == 0;
2914 1.42 augustss std = std->link.std) {
2915 1.88 tsutsui link = le32toh(std->td.td_link);
2916 1.1 augustss uhci_dump_td(std);
2917 1.1 augustss }
2918 1.67 augustss sxqh = (uhci_soft_qh_t *)std;
2919 1.67 augustss uhci_dump_qh(sxqh);
2920 1.67 augustss for (xqh = sxqh;
2921 1.63 augustss xqh != NULL;
2922 1.152 augustss xqh = (maxqh++ == 5 || xqh->hlink == sxqh ||
2923 1.121 augustss xqh->hlink == xqh ? NULL : xqh->hlink)) {
2924 1.1 augustss uhci_dump_qh(xqh);
2925 1.13 augustss }
2926 1.47 augustss DPRINTF(("Enqueued QH:\n"));
2927 1.1 augustss uhci_dump_qh(sqh);
2928 1.42 augustss uhci_dump_tds(sqh->elink);
2929 1.1 augustss }
2930 1.1 augustss #endif
2931 1.63 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
2932 1.208.12.1 itohy usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2933 1.91 augustss uhci_timeout, ii);
2934 1.13 augustss }
2935 1.92 augustss xfer->status = USBD_IN_PROGRESS;
2936 1.1 augustss splx(s);
2937 1.1 augustss
2938 1.1 augustss return (USBD_NORMAL_COMPLETION);
2939 1.1 augustss }
2940 1.1 augustss
2941 1.16 augustss usbd_status
2942 1.119 augustss uhci_device_isoc_transfer(usbd_xfer_handle xfer)
2943 1.16 augustss {
2944 1.208.12.1 itohy uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
2945 1.63 augustss usbd_status err;
2946 1.48 augustss
2947 1.63 augustss DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer));
2948 1.48 augustss
2949 1.48 augustss /* Put it on our queue, */
2950 1.208.12.1 itohy err = usb_insert_transfer_dma(xfer, &sc->sc_dmatag,
2951 1.208.12.1 itohy &UXFER(xfer)->dmabuf);
2952 1.48 augustss
2953 1.48 augustss /* bail out on error, */
2954 1.63 augustss if (err && err != USBD_IN_PROGRESS)
2955 1.63 augustss return (err);
2956 1.48 augustss
2957 1.48 augustss /* XXX should check inuse here */
2958 1.48 augustss
2959 1.48 augustss /* insert into schedule, */
2960 1.63 augustss uhci_device_isoc_enter(xfer);
2961 1.48 augustss
2962 1.102 augustss /* and start if the pipe wasn't running */
2963 1.67 augustss if (!err)
2964 1.63 augustss uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
2965 1.48 augustss
2966 1.63 augustss return (err);
2967 1.48 augustss }
2968 1.48 augustss
2969 1.48 augustss void
2970 1.119 augustss uhci_device_isoc_enter(usbd_xfer_handle xfer)
2971 1.48 augustss {
2972 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2973 1.16 augustss usbd_device_handle dev = upipe->pipe.device;
2974 1.16 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
2975 1.48 augustss struct iso *iso = &upipe->u.iso;
2976 1.152 augustss uhci_soft_td_t *std;
2977 1.208.12.1 itohy void *dataptr;
2978 1.208.12.1 itohy u_int32_t len, status;
2979 1.208.12.1 itohy int s, i, isread, next, nframes, seg, segoff;
2980 1.208.12.1 itohy struct usb_buffer_dma *ub = &UXFER(xfer)->dmabuf;
2981 1.208.12.1 itohy bus_dma_segment_t *segs = USB_BUFFER_SEGS(ub);
2982 1.208.12.1 itohy int nsegs = USB_BUFFER_NSEGS(ub);
2983 1.48 augustss
2984 1.63 augustss DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p "
2985 1.48 augustss "nframes=%d\n",
2986 1.63 augustss iso->inuse, iso->next, xfer, xfer->nframes));
2987 1.48 augustss
2988 1.82 augustss if (sc->sc_dying)
2989 1.82 augustss return;
2990 1.82 augustss
2991 1.63 augustss if (xfer->status == USBD_IN_PROGRESS) {
2992 1.48 augustss /* This request has already been entered into the frame list */
2993 1.96 augustss printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer);
2994 1.68 augustss /* XXX */
2995 1.48 augustss }
2996 1.48 augustss
2997 1.48 augustss #ifdef DIAGNOSTIC
2998 1.48 augustss if (iso->inuse >= UHCI_VFRAMELIST_COUNT)
2999 1.48 augustss printf("uhci_device_isoc_enter: overflow!\n");
3000 1.19 augustss #endif
3001 1.16 augustss
3002 1.48 augustss next = iso->next;
3003 1.48 augustss if (next == -1) {
3004 1.48 augustss /* Not in use yet, schedule it a few frames ahead. */
3005 1.48 augustss next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
3006 1.48 augustss DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next));
3007 1.48 augustss }
3008 1.48 augustss
3009 1.63 augustss xfer->status = USBD_IN_PROGRESS;
3010 1.92 augustss UXFER(xfer)->curframe = next;
3011 1.48 augustss
3012 1.208.12.1 itohy seg = 0;
3013 1.208.12.1 itohy segoff = 0;
3014 1.208.12.1 itohy dataptr = xfer->hcbuffer;
3015 1.208.12.1 itohy isread = xfer->pipe->endpoint->edesc->bEndpointAddress & UE_DIR_IN;
3016 1.88 tsutsui status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |
3017 1.88 tsutsui UHCI_TD_ACTIVE |
3018 1.88 tsutsui UHCI_TD_IOS);
3019 1.63 augustss nframes = xfer->nframes;
3020 1.48 augustss s = splusb();
3021 1.48 augustss for (i = 0; i < nframes; i++) {
3022 1.48 augustss std = iso->stds[next];
3023 1.48 augustss if (++next >= UHCI_VFRAMELIST_COUNT)
3024 1.48 augustss next = 0;
3025 1.63 augustss len = xfer->frlengths[i];
3026 1.208.12.1 itohy USB_KASSERT2(seg < nsegs,
3027 1.208.12.1 itohy ("uhci_device_isoc_enter: too few segments"));
3028 1.208.12.1 itohy if (len + segoff > segs[seg].ds_len) {
3029 1.208.12.1 itohy /* UHCI can't handle non-contiguous data. */
3030 1.208.12.1 itohy uhci_aux_dma_alloc(std, &UXFER(xfer)->aux,
3031 1.208.12.1 itohy dataptr, len);
3032 1.208.12.1 itohy
3033 1.208.12.1 itohy /* prepare aux DMA */
3034 1.208.12.1 itohy if (!isread)
3035 1.208.12.1 itohy bcopy(std->aux_data, std->aux_kern, len);
3036 1.208.12.1 itohy std->td.td_buffer = htole32(std->aux_dma);
3037 1.208.12.1 itohy
3038 1.208.12.1 itohy segoff += len;
3039 1.208.12.1 itohy while (segoff >= segs[seg].ds_len) {
3040 1.208.12.1 itohy USB_KASSERT2(seg < nsegs - 1 ||
3041 1.208.12.1 itohy segoff == segs[seg].ds_len,
3042 1.208.12.1 itohy ("uhci_device_isoc_enter: overlap2"));
3043 1.208.12.1 itohy segoff -= segs[seg].ds_len;
3044 1.208.12.1 itohy seg++;
3045 1.208.12.1 itohy }
3046 1.208.12.1 itohy } else {
3047 1.208.12.1 itohy std->td.td_buffer =
3048 1.208.12.1 itohy htole32(segs[seg].ds_addr + segoff);
3049 1.208.12.1 itohy segoff += len;
3050 1.208.12.1 itohy if (segoff >= segs[seg].ds_len) {
3051 1.208.12.1 itohy USB_KASSERT2(segoff == segs[seg].ds_len,
3052 1.208.12.1 itohy ("uhci_device_isoc_enter: overlap"));
3053 1.208.12.1 itohy segoff = 0;
3054 1.208.12.1 itohy seg++;
3055 1.208.12.1 itohy }
3056 1.208.12.1 itohy }
3057 1.48 augustss if (i == nframes - 1)
3058 1.88 tsutsui status |= UHCI_TD_IOC;
3059 1.88 tsutsui std->td.td_status = htole32(status);
3060 1.88 tsutsui std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK);
3061 1.88 tsutsui std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len));
3062 1.208.12.1 itohy UHCI_STD_SYNC(sc, std,
3063 1.208.12.1 itohy BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
3064 1.208.12.1 itohy #ifdef USB_DEBUG
3065 1.48 augustss if (uhcidebug > 5) {
3066 1.48 augustss DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i));
3067 1.48 augustss uhci_dump_td(std);
3068 1.48 augustss }
3069 1.48 augustss #endif
3070 1.208.12.1 itohy dataptr = (char *)dataptr + len;
3071 1.48 augustss }
3072 1.48 augustss iso->next = next;
3073 1.63 augustss iso->inuse += xfer->nframes;
3074 1.16 augustss
3075 1.208.12.1 itohy uhci_aux_dma_sync(sc, &UXFER(xfer)->aux,
3076 1.208.12.1 itohy isread ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
3077 1.208.12.1 itohy
3078 1.48 augustss splx(s);
3079 1.16 augustss }
3080 1.16 augustss
3081 1.16 augustss usbd_status
3082 1.119 augustss uhci_device_isoc_start(usbd_xfer_handle xfer)
3083 1.16 augustss {
3084 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
3085 1.48 augustss uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
3086 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
3087 1.48 augustss uhci_soft_td_t *end;
3088 1.48 augustss int s, i;
3089 1.48 augustss
3090 1.96 augustss DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer));
3091 1.96 augustss
3092 1.82 augustss if (sc->sc_dying)
3093 1.82 augustss return (USBD_IOERROR);
3094 1.82 augustss
3095 1.48 augustss #ifdef DIAGNOSTIC
3096 1.63 augustss if (xfer->status != USBD_IN_PROGRESS)
3097 1.63 augustss printf("uhci_device_isoc_start: not in progress %p\n", xfer);
3098 1.48 augustss #endif
3099 1.48 augustss
3100 1.48 augustss /* Find the last TD */
3101 1.92 augustss i = UXFER(xfer)->curframe + xfer->nframes;
3102 1.48 augustss if (i >= UHCI_VFRAMELIST_COUNT)
3103 1.48 augustss i -= UHCI_VFRAMELIST_COUNT;
3104 1.48 augustss end = upipe->u.iso.stds[i];
3105 1.48 augustss
3106 1.96 augustss #ifdef DIAGNOSTIC
3107 1.96 augustss if (end == NULL) {
3108 1.96 augustss printf("uhci_device_isoc_start: end == NULL\n");
3109 1.96 augustss return (USBD_INVAL);
3110 1.96 augustss }
3111 1.96 augustss #endif
3112 1.96 augustss
3113 1.48 augustss s = splusb();
3114 1.152 augustss
3115 1.48 augustss /* Set up interrupt info. */
3116 1.63 augustss ii->xfer = xfer;
3117 1.48 augustss ii->stdstart = end;
3118 1.48 augustss ii->stdend = end;
3119 1.48 augustss #ifdef DIAGNOSTIC
3120 1.102 augustss if (!ii->isdone)
3121 1.70 augustss printf("uhci_device_isoc_start: not done, ii=%p\n", ii);
3122 1.48 augustss ii->isdone = 0;
3123 1.48 augustss #endif
3124 1.92 augustss uhci_add_intr_info(sc, ii);
3125 1.152 augustss
3126 1.48 augustss splx(s);
3127 1.48 augustss
3128 1.48 augustss return (USBD_IN_PROGRESS);
3129 1.16 augustss }
3130 1.16 augustss
3131 1.16 augustss void
3132 1.119 augustss uhci_device_isoc_abort(usbd_xfer_handle xfer)
3133 1.16 augustss {
3134 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
3135 1.208.12.1 itohy uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
3136 1.48 augustss uhci_soft_td_t **stds = upipe->u.iso.stds;
3137 1.48 augustss uhci_soft_td_t *std;
3138 1.92 augustss int i, n, s, nframes, maxlen, len;
3139 1.92 augustss
3140 1.92 augustss s = splusb();
3141 1.92 augustss
3142 1.92 augustss /* Transfer is already done. */
3143 1.152 augustss if (xfer->status != USBD_NOT_STARTED &&
3144 1.92 augustss xfer->status != USBD_IN_PROGRESS) {
3145 1.92 augustss splx(s);
3146 1.92 augustss return;
3147 1.92 augustss }
3148 1.48 augustss
3149 1.92 augustss /* Give xfer the requested abort code. */
3150 1.63 augustss xfer->status = USBD_CANCELLED;
3151 1.48 augustss
3152 1.48 augustss /* make hardware ignore it, */
3153 1.63 augustss nframes = xfer->nframes;
3154 1.92 augustss n = UXFER(xfer)->curframe;
3155 1.92 augustss maxlen = 0;
3156 1.48 augustss for (i = 0; i < nframes; i++) {
3157 1.48 augustss std = stds[n];
3158 1.208.12.1 itohy UHCI_STD_SYNC(sc, std,
3159 1.208.12.1 itohy BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
3160 1.88 tsutsui std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
3161 1.130 tsutsui len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token));
3162 1.208.12.1 itohy UHCI_STD_SYNC(sc, std,
3163 1.208.12.1 itohy BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
3164 1.92 augustss if (len > maxlen)
3165 1.92 augustss maxlen = len;
3166 1.48 augustss if (++n >= UHCI_VFRAMELIST_COUNT)
3167 1.48 augustss n = 0;
3168 1.48 augustss }
3169 1.48 augustss
3170 1.92 augustss /* and wait until we are sure the hardware has finished. */
3171 1.92 augustss delay(maxlen);
3172 1.92 augustss
3173 1.96 augustss #ifdef DIAGNOSTIC
3174 1.96 augustss UXFER(xfer)->iinfo.isdone = 1;
3175 1.96 augustss #endif
3176 1.92 augustss /* Run callback and remove from interrupt list. */
3177 1.208.12.1 itohy uhci_transfer_complete(xfer);
3178 1.48 augustss
3179 1.92 augustss splx(s);
3180 1.16 augustss }
3181 1.16 augustss
3182 1.16 augustss void
3183 1.119 augustss uhci_device_isoc_close(usbd_pipe_handle pipe)
3184 1.16 augustss {
3185 1.16 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
3186 1.16 augustss usbd_device_handle dev = upipe->pipe.device;
3187 1.16 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
3188 1.48 augustss uhci_soft_td_t *std, *vstd;
3189 1.16 augustss struct iso *iso;
3190 1.92 augustss int i, s;
3191 1.16 augustss
3192 1.16 augustss /*
3193 1.16 augustss * Make sure all TDs are marked as inactive.
3194 1.16 augustss * Wait for completion.
3195 1.16 augustss * Unschedule.
3196 1.16 augustss * Deallocate.
3197 1.16 augustss */
3198 1.16 augustss iso = &upipe->u.iso;
3199 1.16 augustss
3200 1.208.12.1 itohy for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
3201 1.208.12.1 itohy UHCI_STD_SYNC(sc, iso->stds[i],
3202 1.208.12.1 itohy BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
3203 1.88 tsutsui iso->stds[i]->td.td_status &= htole32(~UHCI_TD_ACTIVE);
3204 1.208.12.1 itohy UHCI_STD_SYNC(sc, iso->stds[i],
3205 1.208.12.1 itohy BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
3206 1.208.12.1 itohy }
3207 1.20 augustss usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */
3208 1.16 augustss
3209 1.92 augustss s = splusb();
3210 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
3211 1.16 augustss std = iso->stds[i];
3212 1.48 augustss for (vstd = sc->sc_vframes[i].htd;
3213 1.67 augustss vstd != NULL && vstd->link.std != std;
3214 1.42 augustss vstd = vstd->link.std)
3215 1.16 augustss ;
3216 1.67 augustss if (vstd == NULL) {
3217 1.16 augustss /*panic*/
3218 1.16 augustss printf("uhci_device_isoc_close: %p not found\n", std);
3219 1.92 augustss splx(s);
3220 1.16 augustss return;
3221 1.16 augustss }
3222 1.42 augustss vstd->link = std->link;
3223 1.42 augustss vstd->td.td_link = std->td.td_link;
3224 1.208.12.1 itohy uhci_free_std_norsv(sc, std);
3225 1.16 augustss }
3226 1.92 augustss splx(s);
3227 1.16 augustss
3228 1.31 augustss free(iso->stds, M_USBHC);
3229 1.16 augustss }
3230 1.16 augustss
3231 1.16 augustss usbd_status
3232 1.119 augustss uhci_setup_isoc(usbd_pipe_handle pipe)
3233 1.16 augustss {
3234 1.16 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
3235 1.16 augustss usbd_device_handle dev = upipe->pipe.device;
3236 1.16 augustss uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
3237 1.16 augustss int addr = upipe->pipe.device->address;
3238 1.16 augustss int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
3239 1.45 augustss int rd = UE_GET_DIR(endpt) == UE_DIR_IN;
3240 1.48 augustss uhci_soft_td_t *std, *vstd;
3241 1.48 augustss u_int32_t token;
3242 1.16 augustss struct iso *iso;
3243 1.92 augustss int i, s;
3244 1.16 augustss
3245 1.16 augustss iso = &upipe->u.iso;
3246 1.16 augustss iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *),
3247 1.31 augustss M_USBHC, M_WAITOK);
3248 1.16 augustss
3249 1.88 tsutsui token = rd ? UHCI_TD_IN (0, endpt, addr, 0) :
3250 1.88 tsutsui UHCI_TD_OUT(0, endpt, addr, 0);
3251 1.16 augustss
3252 1.48 augustss /* Allocate the TDs and mark as inactive; */
3253 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
3254 1.208.12.1 itohy std = uhci_alloc_std_norsv(sc);
3255 1.48 augustss if (std == 0)
3256 1.48 augustss goto bad;
3257 1.88 tsutsui std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
3258 1.88 tsutsui std->td.td_token = htole32(token);
3259 1.48 augustss iso->stds[i] = std;
3260 1.16 augustss }
3261 1.16 augustss
3262 1.48 augustss /* Insert TDs into schedule. */
3263 1.92 augustss s = splusb();
3264 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
3265 1.16 augustss std = iso->stds[i];
3266 1.48 augustss vstd = sc->sc_vframes[i].htd;
3267 1.42 augustss std->link = vstd->link;
3268 1.42 augustss std->td.td_link = vstd->td.td_link;
3269 1.208.12.1 itohy UHCI_STD_SYNC(sc, std,
3270 1.208.12.1 itohy BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
3271 1.42 augustss vstd->link.std = std;
3272 1.208.12.1 itohy vstd->td.td_link = htole32(UHCI_STD_DMAADDR(std) | UHCI_PTR_TD);
3273 1.16 augustss }
3274 1.92 augustss splx(s);
3275 1.16 augustss
3276 1.48 augustss iso->next = -1;
3277 1.48 augustss iso->inuse = 0;
3278 1.48 augustss
3279 1.16 augustss return (USBD_NORMAL_COMPLETION);
3280 1.16 augustss
3281 1.48 augustss bad:
3282 1.16 augustss while (--i >= 0)
3283 1.208.12.1 itohy uhci_free_std_norsv(sc, iso->stds[i]);
3284 1.31 augustss free(iso->stds, M_USBHC);
3285 1.16 augustss return (USBD_NOMEM);
3286 1.16 augustss }
3287 1.16 augustss
3288 1.16 augustss void
3289 1.119 augustss uhci_device_isoc_done(usbd_xfer_handle xfer)
3290 1.16 augustss {
3291 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
3292 1.208.12.1 itohy uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
3293 1.48 augustss
3294 1.197 gdamore DPRINTFN(4, ("uhci_isoc_done: length=%d, busy_free=0x%08x\n",
3295 1.197 gdamore xfer->actlen, xfer->busy_free));
3296 1.93 augustss
3297 1.96 augustss if (ii->xfer != xfer)
3298 1.96 augustss /* Not on interrupt list, ignore it. */
3299 1.170 augustss return;
3300 1.170 augustss
3301 1.170 augustss if (!uhci_active_intr_info(ii))
3302 1.96 augustss return;
3303 1.96 augustss
3304 1.93 augustss #ifdef DIAGNOSTIC
3305 1.93 augustss if (ii->stdend == NULL) {
3306 1.93 augustss printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
3307 1.208.12.1 itohy #ifdef USB_DEBUG
3308 1.93 augustss uhci_dump_ii(ii);
3309 1.93 augustss #endif
3310 1.93 augustss return;
3311 1.93 augustss }
3312 1.93 augustss #endif
3313 1.48 augustss
3314 1.48 augustss /* Turn off the interrupt since it is active even if the TD is not. */
3315 1.208.12.1 itohy UHCI_STD_SYNC(sc, ii->stdend,
3316 1.208.12.1 itohy BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
3317 1.88 tsutsui ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC);
3318 1.208.12.1 itohy UHCI_STD_SYNC(sc, ii->stdend,
3319 1.208.12.1 itohy BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
3320 1.48 augustss
3321 1.92 augustss uhci_del_intr_info(ii); /* remove from active list */
3322 1.208.12.1 itohy
3323 1.208.12.1 itohy #ifdef DIAGNOSTIC
3324 1.208.12.1 itohy if (ii->stdend == NULL) {
3325 1.208.12.1 itohy printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
3326 1.208.12.1 itohy #ifdef USB_DEBUG
3327 1.208.12.1 itohy uhci_dump_ii(ii);
3328 1.208.12.1 itohy #endif
3329 1.208.12.1 itohy return;
3330 1.208.12.1 itohy }
3331 1.208.12.1 itohy #endif
3332 1.208.12.1 itohy ii->stdstart = NULL;
3333 1.208.12.1 itohy ii->stdend = NULL;
3334 1.16 augustss }
3335 1.16 augustss
3336 1.1 augustss void
3337 1.119 augustss uhci_device_intr_done(usbd_xfer_handle xfer)
3338 1.1 augustss {
3339 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
3340 1.1 augustss uhci_softc_t *sc = ii->sc;
3341 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
3342 1.1 augustss uhci_soft_qh_t *sqh;
3343 1.1 augustss int i, npoll;
3344 1.1 augustss
3345 1.173 gson DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen));
3346 1.1 augustss
3347 1.1 augustss npoll = upipe->u.intr.npoll;
3348 1.1 augustss for(i = 0; i < npoll; i++) {
3349 1.1 augustss sqh = upipe->u.intr.qhs[i];
3350 1.121 augustss sqh->elink = NULL;
3351 1.88 tsutsui sqh->qh.qh_elink = htole32(UHCI_PTR_T);
3352 1.1 augustss }
3353 1.149 augustss uhci_free_std_chain(sc, ii->stdstart, NULL);
3354 1.1 augustss
3355 1.1 augustss /* XXX Wasteful. */
3356 1.63 augustss if (xfer->pipe->repeat) {
3357 1.55 augustss uhci_soft_td_t *data, *dataend;
3358 1.1 augustss
3359 1.92 augustss DPRINTFN(5,("uhci_device_intr_done: requeing\n"));
3360 1.92 augustss
3361 1.1 augustss /* This alloc cannot fail since we freed the chain above. */
3362 1.208.12.1 itohy uhci_alloc_std_chain(upipe, sc, xfer->length,
3363 1.208.12.1 itohy upipe->u.intr.isread, xfer->flags, xfer,
3364 1.208.12.1 itohy &data, &dataend);
3365 1.88 tsutsui dataend->td.td_status |= htole32(UHCI_TD_IOC);
3366 1.208.12.1 itohy UHCI_STD_SYNC(sc, dataend,
3367 1.208.12.1 itohy BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
3368 1.1 augustss
3369 1.208.12.1 itohy #ifdef USB_DEBUG
3370 1.1 augustss if (uhcidebug > 10) {
3371 1.55 augustss DPRINTF(("uhci_device_intr_done: data(1)\n"));
3372 1.55 augustss uhci_dump_tds(data);
3373 1.1 augustss uhci_dump_qh(upipe->u.intr.qhs[0]);
3374 1.1 augustss }
3375 1.1 augustss #endif
3376 1.1 augustss
3377 1.55 augustss ii->stdstart = data;
3378 1.55 augustss ii->stdend = dataend;
3379 1.7 augustss #ifdef DIAGNOSTIC
3380 1.70 augustss if (!ii->isdone) {
3381 1.70 augustss printf("uhci_device_intr_done: not done, ii=%p\n", ii);
3382 1.70 augustss }
3383 1.7 augustss ii->isdone = 0;
3384 1.7 augustss #endif
3385 1.1 augustss for (i = 0; i < npoll; i++) {
3386 1.1 augustss sqh = upipe->u.intr.qhs[i];
3387 1.55 augustss sqh->elink = data;
3388 1.208.12.1 itohy sqh->qh.qh_elink =
3389 1.208.12.1 itohy htole32(UHCI_STD_DMAADDR(data) | UHCI_PTR_TD);
3390 1.208.12.1 itohy UHCI_SQH_SYNC(sc, sqh,
3391 1.208.12.1 itohy BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
3392 1.1 augustss }
3393 1.92 augustss xfer->status = USBD_IN_PROGRESS;
3394 1.92 augustss /* The ii is already on the examined list, just leave it. */
3395 1.1 augustss } else {
3396 1.92 augustss DPRINTFN(5,("uhci_device_intr_done: removing\n"));
3397 1.208.12.1 itohy if (uhci_active_intr_info(ii)) {
3398 1.169 augustss uhci_del_intr_info(ii);
3399 1.208.12.1 itohy ii->stdstart = NULL;
3400 1.208.12.1 itohy ii->stdend = NULL;
3401 1.208.12.1 itohy }
3402 1.1 augustss }
3403 1.1 augustss }
3404 1.1 augustss
3405 1.1 augustss /* Deallocate request data structures */
3406 1.1 augustss void
3407 1.119 augustss uhci_device_ctrl_done(usbd_xfer_handle xfer)
3408 1.1 augustss {
3409 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
3410 1.1 augustss uhci_softc_t *sc = ii->sc;
3411 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
3412 1.1 augustss
3413 1.7 augustss #ifdef DIAGNOSTIC
3414 1.63 augustss if (!(xfer->rqflags & URQ_REQUEST))
3415 1.173 gson panic("uhci_device_ctrl_done: not a request");
3416 1.7 augustss #endif
3417 1.1 augustss
3418 1.169 augustss if (!uhci_active_intr_info(ii))
3419 1.169 augustss return;
3420 1.169 augustss
3421 1.92 augustss uhci_del_intr_info(ii); /* remove from active list */
3422 1.1 augustss
3423 1.144 augustss if (upipe->pipe.device->speed == USB_SPEED_LOW)
3424 1.123 augustss uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh);
3425 1.123 augustss else
3426 1.123 augustss uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh);
3427 1.1 augustss
3428 1.49 augustss if (upipe->u.ctl.length != 0)
3429 1.42 augustss uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend);
3430 1.208.12.1 itohy ii->stdstart = NULL;
3431 1.208.12.1 itohy ii->stdend = NULL;
3432 1.49 augustss
3433 1.173 gson DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen));
3434 1.1 augustss }
3435 1.1 augustss
3436 1.1 augustss /* Deallocate request data structures */
3437 1.1 augustss void
3438 1.119 augustss uhci_device_bulk_done(usbd_xfer_handle xfer)
3439 1.1 augustss {
3440 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
3441 1.1 augustss uhci_softc_t *sc = ii->sc;
3442 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
3443 1.169 augustss
3444 1.173 gson DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n",
3445 1.169 augustss xfer, ii, sc, upipe));
3446 1.169 augustss
3447 1.169 augustss if (!uhci_active_intr_info(ii))
3448 1.169 augustss return;
3449 1.1 augustss
3450 1.92 augustss uhci_del_intr_info(ii); /* remove from active list */
3451 1.1 augustss
3452 1.1 augustss uhci_remove_bulk(sc, upipe->u.bulk.sqh);
3453 1.32 augustss
3454 1.149 augustss uhci_free_std_chain(sc, ii->stdstart, NULL);
3455 1.208.12.1 itohy ii->stdstart = NULL;
3456 1.208.12.1 itohy ii->stdend = NULL;
3457 1.32 augustss
3458 1.173 gson DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen));
3459 1.1 augustss }
3460 1.1 augustss
3461 1.1 augustss /* Add interrupt QH, called with vflock. */
3462 1.1 augustss void
3463 1.119 augustss uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
3464 1.1 augustss {
3465 1.92 augustss struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
3466 1.42 augustss uhci_soft_qh_t *eqh;
3467 1.1 augustss
3468 1.92 augustss DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh));
3469 1.92 augustss
3470 1.42 augustss eqh = vf->eqh;
3471 1.42 augustss sqh->hlink = eqh->hlink;
3472 1.42 augustss sqh->qh.qh_hlink = eqh->qh.qh_hlink;
3473 1.42 augustss eqh->hlink = sqh;
3474 1.208.12.1 itohy eqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(sqh) | UHCI_PTR_QH);
3475 1.1 augustss vf->eqh = sqh;
3476 1.1 augustss vf->bandwidth++;
3477 1.1 augustss }
3478 1.1 augustss
3479 1.119 augustss /* Remove interrupt QH. */
3480 1.1 augustss void
3481 1.119 augustss uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
3482 1.1 augustss {
3483 1.92 augustss struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
3484 1.1 augustss uhci_soft_qh_t *pqh;
3485 1.1 augustss
3486 1.92 augustss DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh));
3487 1.1 augustss
3488 1.124 augustss /* See comment in uhci_remove_ctrl() */
3489 1.124 augustss if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
3490 1.124 augustss sqh->qh.qh_elink = htole32(UHCI_PTR_T);
3491 1.208.12.1 itohy UHCI_SQH_SYNC(sc, sqh,
3492 1.208.12.1 itohy BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
3493 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
3494 1.124 augustss }
3495 1.124 augustss
3496 1.92 augustss pqh = uhci_find_prev_qh(vf->hqh, sqh);
3497 1.42 augustss pqh->hlink = sqh->hlink;
3498 1.42 augustss pqh->qh.qh_hlink = sqh->qh.qh_hlink;
3499 1.208.12.1 itohy UHCI_SQH_SYNC(sc, pqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
3500 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
3501 1.1 augustss if (vf->eqh == sqh)
3502 1.1 augustss vf->eqh = pqh;
3503 1.1 augustss vf->bandwidth--;
3504 1.1 augustss }
3505 1.1 augustss
3506 1.1 augustss usbd_status
3507 1.119 augustss uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival)
3508 1.1 augustss {
3509 1.1 augustss uhci_soft_qh_t *sqh;
3510 1.1 augustss int i, npoll, s;
3511 1.1 augustss u_int bestbw, bw, bestoffs, offs;
3512 1.1 augustss
3513 1.173 gson DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe));
3514 1.1 augustss if (ival == 0) {
3515 1.208.12.1 itohy printf("uhci_setintr: 0 interval\n");
3516 1.1 augustss return (USBD_INVAL);
3517 1.1 augustss }
3518 1.1 augustss
3519 1.1 augustss if (ival > UHCI_VFRAMELIST_COUNT)
3520 1.1 augustss ival = UHCI_VFRAMELIST_COUNT;
3521 1.1 augustss npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
3522 1.173 gson DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll));
3523 1.1 augustss
3524 1.1 augustss upipe->u.intr.npoll = npoll;
3525 1.152 augustss upipe->u.intr.qhs =
3526 1.31 augustss malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK);
3527 1.1 augustss
3528 1.152 augustss /*
3529 1.1 augustss * Figure out which offset in the schedule that has most
3530 1.1 augustss * bandwidth left over.
3531 1.1 augustss */
3532 1.1 augustss #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
3533 1.1 augustss for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
3534 1.1 augustss for (bw = i = 0; i < npoll; i++)
3535 1.1 augustss bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
3536 1.1 augustss if (bw < bestbw) {
3537 1.1 augustss bestbw = bw;
3538 1.1 augustss bestoffs = offs;
3539 1.1 augustss }
3540 1.1 augustss }
3541 1.173 gson DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
3542 1.1 augustss
3543 1.1 augustss for(i = 0; i < npoll; i++) {
3544 1.1 augustss upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
3545 1.121 augustss sqh->elink = NULL;
3546 1.88 tsutsui sqh->qh.qh_elink = htole32(UHCI_PTR_T);
3547 1.1 augustss sqh->pos = MOD(i * ival + bestoffs);
3548 1.1 augustss }
3549 1.1 augustss #undef MOD
3550 1.1 augustss
3551 1.1 augustss s = splusb();
3552 1.1 augustss /* Enter QHs into the controller data structures. */
3553 1.1 augustss for(i = 0; i < npoll; i++)
3554 1.92 augustss uhci_add_intr(sc, upipe->u.intr.qhs[i]);
3555 1.92 augustss splx(s);
3556 1.1 augustss
3557 1.173 gson DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe));
3558 1.1 augustss return (USBD_NORMAL_COMPLETION);
3559 1.1 augustss }
3560 1.1 augustss
3561 1.1 augustss /* Open a new pipe. */
3562 1.1 augustss usbd_status
3563 1.119 augustss uhci_open(usbd_pipe_handle pipe)
3564 1.1 augustss {
3565 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
3566 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
3567 1.1 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
3568 1.63 augustss usbd_status err;
3569 1.79 augustss int ival;
3570 1.1 augustss
3571 1.1 augustss DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
3572 1.152 augustss pipe, pipe->device->address,
3573 1.1 augustss ed->bEndpointAddress, sc->sc_addr));
3574 1.92 augustss
3575 1.92 augustss upipe->aborting = 0;
3576 1.208.12.1 itohy upipe->nexttoggle = pipe->endpoint->savedtoggle;
3577 1.92 augustss
3578 1.1 augustss if (pipe->device->address == sc->sc_addr) {
3579 1.1 augustss switch (ed->bEndpointAddress) {
3580 1.1 augustss case USB_CONTROL_ENDPOINT:
3581 1.1 augustss pipe->methods = &uhci_root_ctrl_methods;
3582 1.1 augustss break;
3583 1.45 augustss case UE_DIR_IN | UHCI_INTR_ENDPT:
3584 1.1 augustss pipe->methods = &uhci_root_intr_methods;
3585 1.1 augustss break;
3586 1.1 augustss default:
3587 1.1 augustss return (USBD_INVAL);
3588 1.1 augustss }
3589 1.1 augustss } else {
3590 1.1 augustss switch (ed->bmAttributes & UE_XFERTYPE) {
3591 1.1 augustss case UE_CONTROL:
3592 1.1 augustss pipe->methods = &uhci_device_ctrl_methods;
3593 1.1 augustss upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
3594 1.63 augustss if (upipe->u.ctl.sqh == NULL)
3595 1.5 augustss goto bad;
3596 1.208.12.1 itohy upipe->u.ctl.setup = uhci_alloc_std_norsv(sc);
3597 1.63 augustss if (upipe->u.ctl.setup == NULL) {
3598 1.5 augustss uhci_free_sqh(sc, upipe->u.ctl.sqh);
3599 1.5 augustss goto bad;
3600 1.5 augustss }
3601 1.208.12.1 itohy upipe->u.ctl.stat = uhci_alloc_std_norsv(sc);
3602 1.63 augustss if (upipe->u.ctl.stat == NULL) {
3603 1.5 augustss uhci_free_sqh(sc, upipe->u.ctl.sqh);
3604 1.208.12.1 itohy uhci_free_std_norsv(sc, upipe->u.ctl.setup);
3605 1.5 augustss goto bad;
3606 1.5 augustss }
3607 1.208.12.1 itohy err = usb_allocmem(&sc->sc_dmatag,
3608 1.152 augustss sizeof(usb_device_request_t),
3609 1.63 augustss 0, &upipe->u.ctl.reqdma);
3610 1.63 augustss if (err) {
3611 1.5 augustss uhci_free_sqh(sc, upipe->u.ctl.sqh);
3612 1.208.12.1 itohy uhci_free_std_norsv(sc, upipe->u.ctl.setup);
3613 1.208.12.1 itohy uhci_free_std_norsv(sc, upipe->u.ctl.stat);
3614 1.5 augustss goto bad;
3615 1.5 augustss }
3616 1.1 augustss break;
3617 1.1 augustss case UE_INTERRUPT:
3618 1.1 augustss pipe->methods = &uhci_device_intr_methods;
3619 1.79 augustss ival = pipe->interval;
3620 1.79 augustss if (ival == USBD_DEFAULT_INTERVAL)
3621 1.79 augustss ival = ed->bInterval;
3622 1.80 augustss return (uhci_device_setintr(sc, upipe, ival));
3623 1.1 augustss case UE_ISOCHRONOUS:
3624 1.16 augustss pipe->methods = &uhci_device_isoc_methods;
3625 1.48 augustss return (uhci_setup_isoc(pipe));
3626 1.1 augustss case UE_BULK:
3627 1.1 augustss pipe->methods = &uhci_device_bulk_methods;
3628 1.1 augustss upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
3629 1.63 augustss if (upipe->u.bulk.sqh == NULL)
3630 1.5 augustss goto bad;
3631 1.1 augustss break;
3632 1.1 augustss }
3633 1.1 augustss }
3634 1.1 augustss return (USBD_NORMAL_COMPLETION);
3635 1.5 augustss
3636 1.5 augustss bad:
3637 1.5 augustss return (USBD_NOMEM);
3638 1.1 augustss }
3639 1.1 augustss
3640 1.1 augustss /*
3641 1.1 augustss * Data structures and routines to emulate the root hub.
3642 1.1 augustss */
3643 1.208.12.1 itohy const usb_device_descriptor_t uhci_devd = {
3644 1.1 augustss USB_DEVICE_DESCRIPTOR_SIZE,
3645 1.1 augustss UDESC_DEVICE, /* type */
3646 1.1 augustss {0x00, 0x01}, /* USB version */
3647 1.87 augustss UDCLASS_HUB, /* class */
3648 1.87 augustss UDSUBCLASS_HUB, /* subclass */
3649 1.144 augustss UDPROTO_FSHUB, /* protocol */
3650 1.1 augustss 64, /* max packet */
3651 1.1 augustss {0},{0},{0x00,0x01}, /* device id */
3652 1.1 augustss 1,2,0, /* string indicies */
3653 1.1 augustss 1 /* # of configurations */
3654 1.1 augustss };
3655 1.1 augustss
3656 1.208 drochner const usb_config_descriptor_t uhci_confd = {
3657 1.1 augustss USB_CONFIG_DESCRIPTOR_SIZE,
3658 1.1 augustss UDESC_CONFIG,
3659 1.1 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
3660 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
3661 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
3662 1.1 augustss 1,
3663 1.1 augustss 1,
3664 1.1 augustss 0,
3665 1.206 drochner UC_ATTR_MBO | UC_SELF_POWERED,
3666 1.1 augustss 0 /* max power */
3667 1.1 augustss };
3668 1.1 augustss
3669 1.208 drochner const usb_interface_descriptor_t uhci_ifcd = {
3670 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
3671 1.1 augustss UDESC_INTERFACE,
3672 1.1 augustss 0,
3673 1.1 augustss 0,
3674 1.1 augustss 1,
3675 1.87 augustss UICLASS_HUB,
3676 1.87 augustss UISUBCLASS_HUB,
3677 1.144 augustss UIPROTO_FSHUB,
3678 1.1 augustss 0
3679 1.1 augustss };
3680 1.1 augustss
3681 1.208 drochner const usb_endpoint_descriptor_t uhci_endpd = {
3682 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
3683 1.1 augustss UDESC_ENDPOINT,
3684 1.45 augustss UE_DIR_IN | UHCI_INTR_ENDPT,
3685 1.1 augustss UE_INTERRUPT,
3686 1.1 augustss {8},
3687 1.1 augustss 255
3688 1.1 augustss };
3689 1.1 augustss
3690 1.208 drochner const usb_hub_descriptor_t uhci_hubd_piix = {
3691 1.1 augustss USB_HUB_DESCRIPTOR_SIZE,
3692 1.1 augustss UDESC_HUB,
3693 1.1 augustss 2,
3694 1.1 augustss { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
3695 1.1 augustss 50, /* power on to power good */
3696 1.1 augustss 0,
3697 1.1 augustss { 0x00 }, /* both ports are removable */
3698 1.199 christos { 0 },
3699 1.1 augustss };
3700 1.1 augustss
3701 1.1 augustss int
3702 1.189 christos uhci_str(usb_string_descriptor_t *p, int l, const char *s)
3703 1.1 augustss {
3704 1.1 augustss int i;
3705 1.1 augustss
3706 1.1 augustss if (l == 0)
3707 1.1 augustss return (0);
3708 1.1 augustss p->bLength = 2 * strlen(s) + 2;
3709 1.1 augustss if (l == 1)
3710 1.1 augustss return (1);
3711 1.1 augustss p->bDescriptorType = UDESC_STRING;
3712 1.1 augustss l -= 2;
3713 1.1 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
3714 1.1 augustss USETW2(p->bString[i], 0, s[i]);
3715 1.1 augustss return (2*i+2);
3716 1.1 augustss }
3717 1.1 augustss
3718 1.1 augustss /*
3719 1.166 dsainty * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also
3720 1.166 dsainty * enables the port, and also states that SET_FEATURE(PORT_ENABLE)
3721 1.166 dsainty * should not be used by the USB subsystem. As we cannot issue a
3722 1.166 dsainty * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port
3723 1.166 dsainty * will be enabled as part of the reset.
3724 1.166 dsainty *
3725 1.166 dsainty * On the VT83C572, the port cannot be successfully enabled until the
3726 1.166 dsainty * outstanding "port enable change" and "connection status change"
3727 1.166 dsainty * events have been reset.
3728 1.166 dsainty */
3729 1.166 dsainty Static usbd_status
3730 1.166 dsainty uhci_portreset(uhci_softc_t *sc, int index)
3731 1.166 dsainty {
3732 1.166 dsainty int lim, port, x;
3733 1.166 dsainty
3734 1.166 dsainty if (index == 1)
3735 1.166 dsainty port = UHCI_PORTSC1;
3736 1.166 dsainty else if (index == 2)
3737 1.166 dsainty port = UHCI_PORTSC2;
3738 1.166 dsainty else
3739 1.166 dsainty return (USBD_IOERROR);
3740 1.166 dsainty
3741 1.166 dsainty x = URWMASK(UREAD2(sc, port));
3742 1.166 dsainty UWRITE2(sc, port, x | UHCI_PORTSC_PR);
3743 1.166 dsainty
3744 1.166 dsainty usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
3745 1.166 dsainty
3746 1.166 dsainty DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n",
3747 1.166 dsainty index, UREAD2(sc, port)));
3748 1.166 dsainty
3749 1.166 dsainty x = URWMASK(UREAD2(sc, port));
3750 1.166 dsainty UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
3751 1.166 dsainty
3752 1.166 dsainty delay(100);
3753 1.166 dsainty
3754 1.166 dsainty DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n",
3755 1.166 dsainty index, UREAD2(sc, port)));
3756 1.166 dsainty
3757 1.166 dsainty x = URWMASK(UREAD2(sc, port));
3758 1.166 dsainty UWRITE2(sc, port, x | UHCI_PORTSC_PE);
3759 1.166 dsainty
3760 1.166 dsainty for (lim = 10; --lim > 0;) {
3761 1.166 dsainty usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY);
3762 1.166 dsainty
3763 1.166 dsainty x = UREAD2(sc, port);
3764 1.166 dsainty
3765 1.166 dsainty DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n",
3766 1.166 dsainty index, lim, x));
3767 1.166 dsainty
3768 1.166 dsainty if (!(x & UHCI_PORTSC_CCS)) {
3769 1.166 dsainty /*
3770 1.166 dsainty * No device is connected (or was disconnected
3771 1.166 dsainty * during reset). Consider the port reset.
3772 1.166 dsainty * The delay must be long enough to ensure on
3773 1.166 dsainty * the initial iteration that the device
3774 1.166 dsainty * connection will have been registered. 50ms
3775 1.166 dsainty * appears to be sufficient, but 20ms is not.
3776 1.166 dsainty */
3777 1.166 dsainty DPRINTFN(3,("uhci port %d loop %u, device detached\n",
3778 1.166 dsainty index, lim));
3779 1.166 dsainty break;
3780 1.166 dsainty }
3781 1.166 dsainty
3782 1.166 dsainty if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) {
3783 1.166 dsainty /*
3784 1.166 dsainty * Port enabled changed and/or connection
3785 1.166 dsainty * status changed were set. Reset either or
3786 1.166 dsainty * both raised flags (by writing a 1 to that
3787 1.166 dsainty * bit), and wait again for state to settle.
3788 1.166 dsainty */
3789 1.166 dsainty UWRITE2(sc, port, URWMASK(x) |
3790 1.166 dsainty (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)));
3791 1.166 dsainty continue;
3792 1.166 dsainty }
3793 1.166 dsainty
3794 1.166 dsainty if (x & UHCI_PORTSC_PE)
3795 1.166 dsainty /* Port is enabled */
3796 1.166 dsainty break;
3797 1.166 dsainty
3798 1.166 dsainty UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE);
3799 1.166 dsainty }
3800 1.166 dsainty
3801 1.166 dsainty DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n",
3802 1.166 dsainty index, UREAD2(sc, port)));
3803 1.166 dsainty
3804 1.166 dsainty if (lim <= 0) {
3805 1.166 dsainty DPRINTFN(1,("uhci port %d reset timed out\n", index));
3806 1.166 dsainty return (USBD_TIMEOUT);
3807 1.166 dsainty }
3808 1.184 perry
3809 1.166 dsainty sc->sc_isreset = 1;
3810 1.166 dsainty return (USBD_NORMAL_COMPLETION);
3811 1.166 dsainty }
3812 1.166 dsainty
3813 1.166 dsainty /*
3814 1.1 augustss * Simulate a hardware hub by handling all the necessary requests.
3815 1.1 augustss */
3816 1.1 augustss usbd_status
3817 1.119 augustss uhci_root_ctrl_transfer(usbd_xfer_handle xfer)
3818 1.1 augustss {
3819 1.63 augustss usbd_status err;
3820 1.16 augustss
3821 1.52 augustss /* Insert last in queue. */
3822 1.63 augustss err = usb_insert_transfer(xfer);
3823 1.63 augustss if (err)
3824 1.63 augustss return (err);
3825 1.52 augustss
3826 1.152 augustss /*
3827 1.94 augustss * Pipe isn't running (otherwise err would be USBD_INPROG),
3828 1.94 augustss * so start it first.
3829 1.67 augustss */
3830 1.63 augustss return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3831 1.16 augustss }
3832 1.16 augustss
3833 1.16 augustss usbd_status
3834 1.119 augustss uhci_root_ctrl_start(usbd_xfer_handle xfer)
3835 1.16 augustss {
3836 1.63 augustss uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
3837 1.1 augustss usb_device_request_t *req;
3838 1.59 augustss void *buf = NULL;
3839 1.1 augustss int port, x;
3840 1.52 augustss int s, len, value, index, status, change, l, totlen = 0;
3841 1.1 augustss usb_port_status_t ps;
3842 1.63 augustss usbd_status err;
3843 1.1 augustss
3844 1.82 augustss if (sc->sc_dying)
3845 1.82 augustss return (USBD_IOERROR);
3846 1.82 augustss
3847 1.48 augustss #ifdef DIAGNOSTIC
3848 1.63 augustss if (!(xfer->rqflags & URQ_REQUEST))
3849 1.163 provos panic("uhci_root_ctrl_transfer: not a request");
3850 1.48 augustss #endif
3851 1.63 augustss req = &xfer->request;
3852 1.1 augustss
3853 1.152 augustss DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
3854 1.1 augustss req->bmRequestType, req->bRequest));
3855 1.1 augustss
3856 1.1 augustss len = UGETW(req->wLength);
3857 1.1 augustss value = UGETW(req->wValue);
3858 1.1 augustss index = UGETW(req->wIndex);
3859 1.49 augustss
3860 1.49 augustss if (len != 0)
3861 1.208.12.1 itohy buf = xfer->hcbuffer;
3862 1.49 augustss
3863 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
3864 1.1 augustss switch(C(req->bRequest, req->bmRequestType)) {
3865 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
3866 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
3867 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
3868 1.152 augustss /*
3869 1.13 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
3870 1.1 augustss * for the integrated root hub.
3871 1.1 augustss */
3872 1.1 augustss break;
3873 1.1 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
3874 1.1 augustss if (len > 0) {
3875 1.1 augustss *(u_int8_t *)buf = sc->sc_conf;
3876 1.1 augustss totlen = 1;
3877 1.1 augustss }
3878 1.1 augustss break;
3879 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
3880 1.1 augustss DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
3881 1.195 christos if (len == 0)
3882 1.195 christos break;
3883 1.1 augustss switch(value >> 8) {
3884 1.1 augustss case UDESC_DEVICE:
3885 1.1 augustss if ((value & 0xff) != 0) {
3886 1.63 augustss err = USBD_IOERROR;
3887 1.1 augustss goto ret;
3888 1.1 augustss }
3889 1.1 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
3890 1.1 augustss memcpy(buf, &uhci_devd, l);
3891 1.208.12.1 itohy USETW(((usb_device_descriptor_t *)buf)->idVendor,
3892 1.208.12.1 itohy sc->sc_id_vendor);
3893 1.1 augustss break;
3894 1.1 augustss case UDESC_CONFIG:
3895 1.1 augustss if ((value & 0xff) != 0) {
3896 1.63 augustss err = USBD_IOERROR;
3897 1.1 augustss goto ret;
3898 1.1 augustss }
3899 1.1 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
3900 1.1 augustss memcpy(buf, &uhci_confd, l);
3901 1.1 augustss buf = (char *)buf + l;
3902 1.1 augustss len -= l;
3903 1.1 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
3904 1.1 augustss totlen += l;
3905 1.1 augustss memcpy(buf, &uhci_ifcd, l);
3906 1.1 augustss buf = (char *)buf + l;
3907 1.1 augustss len -= l;
3908 1.1 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
3909 1.1 augustss totlen += l;
3910 1.1 augustss memcpy(buf, &uhci_endpd, l);
3911 1.1 augustss break;
3912 1.1 augustss case UDESC_STRING:
3913 1.1 augustss *(u_int8_t *)buf = 0;
3914 1.1 augustss totlen = 1;
3915 1.1 augustss switch (value & 0xff) {
3916 1.182 augustss case 0: /* Language table */
3917 1.208 drochner if (len > 0)
3918 1.208 drochner *(u_int8_t *)buf = 4;
3919 1.208 drochner if (len >= 4) {
3920 1.208 drochner USETW(((usb_string_descriptor_t *)buf)->bString[0], 0x0409);
3921 1.208 drochner totlen = 4;
3922 1.208 drochner }
3923 1.182 augustss break;
3924 1.1 augustss case 1: /* Vendor */
3925 1.8 augustss totlen = uhci_str(buf, len, sc->sc_vendor);
3926 1.1 augustss break;
3927 1.1 augustss case 2: /* Product */
3928 1.8 augustss totlen = uhci_str(buf, len, "UHCI root hub");
3929 1.1 augustss break;
3930 1.1 augustss }
3931 1.1 augustss break;
3932 1.1 augustss default:
3933 1.63 augustss err = USBD_IOERROR;
3934 1.1 augustss goto ret;
3935 1.1 augustss }
3936 1.1 augustss break;
3937 1.1 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
3938 1.1 augustss if (len > 0) {
3939 1.1 augustss *(u_int8_t *)buf = 0;
3940 1.1 augustss totlen = 1;
3941 1.1 augustss }
3942 1.1 augustss break;
3943 1.1 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
3944 1.1 augustss if (len > 1) {
3945 1.1 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
3946 1.1 augustss totlen = 2;
3947 1.1 augustss }
3948 1.1 augustss break;
3949 1.1 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
3950 1.1 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
3951 1.1 augustss if (len > 1) {
3952 1.1 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
3953 1.1 augustss totlen = 2;
3954 1.1 augustss }
3955 1.1 augustss break;
3956 1.1 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
3957 1.1 augustss if (value >= USB_MAX_DEVICES) {
3958 1.63 augustss err = USBD_IOERROR;
3959 1.1 augustss goto ret;
3960 1.1 augustss }
3961 1.1 augustss sc->sc_addr = value;
3962 1.1 augustss break;
3963 1.1 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
3964 1.1 augustss if (value != 0 && value != 1) {
3965 1.63 augustss err = USBD_IOERROR;
3966 1.1 augustss goto ret;
3967 1.1 augustss }
3968 1.1 augustss sc->sc_conf = value;
3969 1.1 augustss break;
3970 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
3971 1.1 augustss break;
3972 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
3973 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
3974 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
3975 1.63 augustss err = USBD_IOERROR;
3976 1.1 augustss goto ret;
3977 1.1 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
3978 1.1 augustss break;
3979 1.1 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
3980 1.1 augustss break;
3981 1.1 augustss /* Hub requests */
3982 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
3983 1.1 augustss break;
3984 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
3985 1.12 augustss DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
3986 1.12 augustss "port=%d feature=%d\n",
3987 1.1 augustss index, value));
3988 1.1 augustss if (index == 1)
3989 1.1 augustss port = UHCI_PORTSC1;
3990 1.1 augustss else if (index == 2)
3991 1.1 augustss port = UHCI_PORTSC2;
3992 1.1 augustss else {
3993 1.63 augustss err = USBD_IOERROR;
3994 1.1 augustss goto ret;
3995 1.1 augustss }
3996 1.1 augustss switch(value) {
3997 1.1 augustss case UHF_PORT_ENABLE:
3998 1.137 augustss x = URWMASK(UREAD2(sc, port));
3999 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
4000 1.1 augustss break;
4001 1.1 augustss case UHF_PORT_SUSPEND:
4002 1.137 augustss x = URWMASK(UREAD2(sc, port));
4003 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
4004 1.1 augustss break;
4005 1.1 augustss case UHF_PORT_RESET:
4006 1.137 augustss x = URWMASK(UREAD2(sc, port));
4007 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
4008 1.1 augustss break;
4009 1.1 augustss case UHF_C_PORT_CONNECTION:
4010 1.137 augustss x = URWMASK(UREAD2(sc, port));
4011 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
4012 1.1 augustss break;
4013 1.1 augustss case UHF_C_PORT_ENABLE:
4014 1.137 augustss x = URWMASK(UREAD2(sc, port));
4015 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
4016 1.1 augustss break;
4017 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
4018 1.137 augustss x = URWMASK(UREAD2(sc, port));
4019 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
4020 1.1 augustss break;
4021 1.1 augustss case UHF_C_PORT_RESET:
4022 1.1 augustss sc->sc_isreset = 0;
4023 1.63 augustss err = USBD_NORMAL_COMPLETION;
4024 1.1 augustss goto ret;
4025 1.1 augustss case UHF_PORT_CONNECTION:
4026 1.1 augustss case UHF_PORT_OVER_CURRENT:
4027 1.1 augustss case UHF_PORT_POWER:
4028 1.1 augustss case UHF_PORT_LOW_SPEED:
4029 1.1 augustss case UHF_C_PORT_SUSPEND:
4030 1.1 augustss default:
4031 1.63 augustss err = USBD_IOERROR;
4032 1.1 augustss goto ret;
4033 1.1 augustss }
4034 1.1 augustss break;
4035 1.1 augustss case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
4036 1.1 augustss if (index == 1)
4037 1.1 augustss port = UHCI_PORTSC1;
4038 1.1 augustss else if (index == 2)
4039 1.1 augustss port = UHCI_PORTSC2;
4040 1.1 augustss else {
4041 1.63 augustss err = USBD_IOERROR;
4042 1.1 augustss goto ret;
4043 1.1 augustss }
4044 1.1 augustss if (len > 0) {
4045 1.152 augustss *(u_int8_t *)buf =
4046 1.1 augustss (UREAD2(sc, port) & UHCI_PORTSC_LS) >>
4047 1.1 augustss UHCI_PORTSC_LS_SHIFT;
4048 1.1 augustss totlen = 1;
4049 1.1 augustss }
4050 1.1 augustss break;
4051 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
4052 1.195 christos if (len == 0)
4053 1.195 christos break;
4054 1.177 toshii if ((value & 0xff) != 0) {
4055 1.63 augustss err = USBD_IOERROR;
4056 1.1 augustss goto ret;
4057 1.1 augustss }
4058 1.1 augustss l = min(len, USB_HUB_DESCRIPTOR_SIZE);
4059 1.1 augustss totlen = l;
4060 1.1 augustss memcpy(buf, &uhci_hubd_piix, l);
4061 1.1 augustss break;
4062 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
4063 1.1 augustss if (len != 4) {
4064 1.63 augustss err = USBD_IOERROR;
4065 1.1 augustss goto ret;
4066 1.1 augustss }
4067 1.1 augustss memset(buf, 0, len);
4068 1.1 augustss totlen = len;
4069 1.1 augustss break;
4070 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
4071 1.1 augustss if (index == 1)
4072 1.1 augustss port = UHCI_PORTSC1;
4073 1.1 augustss else if (index == 2)
4074 1.1 augustss port = UHCI_PORTSC2;
4075 1.1 augustss else {
4076 1.63 augustss err = USBD_IOERROR;
4077 1.1 augustss goto ret;
4078 1.1 augustss }
4079 1.1 augustss if (len != 4) {
4080 1.63 augustss err = USBD_IOERROR;
4081 1.1 augustss goto ret;
4082 1.1 augustss }
4083 1.1 augustss x = UREAD2(sc, port);
4084 1.1 augustss status = change = 0;
4085 1.142 augustss if (x & UHCI_PORTSC_CCS)
4086 1.1 augustss status |= UPS_CURRENT_CONNECT_STATUS;
4087 1.152 augustss if (x & UHCI_PORTSC_CSC)
4088 1.1 augustss change |= UPS_C_CONNECT_STATUS;
4089 1.152 augustss if (x & UHCI_PORTSC_PE)
4090 1.1 augustss status |= UPS_PORT_ENABLED;
4091 1.152 augustss if (x & UHCI_PORTSC_POEDC)
4092 1.1 augustss change |= UPS_C_PORT_ENABLED;
4093 1.152 augustss if (x & UHCI_PORTSC_OCI)
4094 1.1 augustss status |= UPS_OVERCURRENT_INDICATOR;
4095 1.152 augustss if (x & UHCI_PORTSC_OCIC)
4096 1.1 augustss change |= UPS_C_OVERCURRENT_INDICATOR;
4097 1.152 augustss if (x & UHCI_PORTSC_SUSP)
4098 1.1 augustss status |= UPS_SUSPEND;
4099 1.152 augustss if (x & UHCI_PORTSC_LSDA)
4100 1.1 augustss status |= UPS_LOW_SPEED;
4101 1.1 augustss status |= UPS_PORT_POWER;
4102 1.1 augustss if (sc->sc_isreset)
4103 1.1 augustss change |= UPS_C_PORT_RESET;
4104 1.1 augustss USETW(ps.wPortStatus, status);
4105 1.1 augustss USETW(ps.wPortChange, change);
4106 1.1 augustss l = min(len, sizeof ps);
4107 1.1 augustss memcpy(buf, &ps, l);
4108 1.1 augustss totlen = l;
4109 1.1 augustss break;
4110 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
4111 1.63 augustss err = USBD_IOERROR;
4112 1.1 augustss goto ret;
4113 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
4114 1.1 augustss break;
4115 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
4116 1.1 augustss if (index == 1)
4117 1.1 augustss port = UHCI_PORTSC1;
4118 1.1 augustss else if (index == 2)
4119 1.1 augustss port = UHCI_PORTSC2;
4120 1.1 augustss else {
4121 1.63 augustss err = USBD_IOERROR;
4122 1.1 augustss goto ret;
4123 1.1 augustss }
4124 1.1 augustss switch(value) {
4125 1.1 augustss case UHF_PORT_ENABLE:
4126 1.137 augustss x = URWMASK(UREAD2(sc, port));
4127 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_PE);
4128 1.1 augustss break;
4129 1.1 augustss case UHF_PORT_SUSPEND:
4130 1.137 augustss x = URWMASK(UREAD2(sc, port));
4131 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
4132 1.1 augustss break;
4133 1.1 augustss case UHF_PORT_RESET:
4134 1.166 dsainty err = uhci_portreset(sc, index);
4135 1.166 dsainty goto ret;
4136 1.111 augustss case UHF_PORT_POWER:
4137 1.111 augustss /* Pretend we turned on power */
4138 1.115 mycroft err = USBD_NORMAL_COMPLETION;
4139 1.111 augustss goto ret;
4140 1.1 augustss case UHF_C_PORT_CONNECTION:
4141 1.1 augustss case UHF_C_PORT_ENABLE:
4142 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
4143 1.1 augustss case UHF_PORT_CONNECTION:
4144 1.1 augustss case UHF_PORT_OVER_CURRENT:
4145 1.1 augustss case UHF_PORT_LOW_SPEED:
4146 1.1 augustss case UHF_C_PORT_SUSPEND:
4147 1.1 augustss case UHF_C_PORT_RESET:
4148 1.1 augustss default:
4149 1.63 augustss err = USBD_IOERROR;
4150 1.1 augustss goto ret;
4151 1.1 augustss }
4152 1.1 augustss break;
4153 1.1 augustss default:
4154 1.63 augustss err = USBD_IOERROR;
4155 1.1 augustss goto ret;
4156 1.1 augustss }
4157 1.63 augustss xfer->actlen = totlen;
4158 1.63 augustss err = USBD_NORMAL_COMPLETION;
4159 1.1 augustss ret:
4160 1.63 augustss xfer->status = err;
4161 1.52 augustss s = splusb();
4162 1.208.12.1 itohy uhci_transfer_complete(xfer);
4163 1.52 augustss splx(s);
4164 1.1 augustss return (USBD_IN_PROGRESS);
4165 1.1 augustss }
4166 1.1 augustss
4167 1.1 augustss /* Abort a root control request. */
4168 1.1 augustss void
4169 1.205 christos uhci_root_ctrl_abort(usbd_xfer_handle xfer)
4170 1.1 augustss {
4171 1.70 augustss /* Nothing to do, all transfers are synchronous. */
4172 1.1 augustss }
4173 1.1 augustss
4174 1.1 augustss /* Close the root pipe. */
4175 1.1 augustss void
4176 1.205 christos uhci_root_ctrl_close(usbd_pipe_handle pipe)
4177 1.1 augustss {
4178 1.1 augustss DPRINTF(("uhci_root_ctrl_close\n"));
4179 1.1 augustss }
4180 1.1 augustss
4181 1.1 augustss /* Abort a root interrupt request. */
4182 1.1 augustss void
4183 1.119 augustss uhci_root_intr_abort(usbd_xfer_handle xfer)
4184 1.1 augustss {
4185 1.63 augustss uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
4186 1.30 augustss
4187 1.96 augustss usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, xfer);
4188 1.96 augustss sc->sc_intr_xfer = NULL;
4189 1.58 augustss
4190 1.63 augustss if (xfer->pipe->intrxfer == xfer) {
4191 1.58 augustss DPRINTF(("uhci_root_intr_abort: remove\n"));
4192 1.63 augustss xfer->pipe->intrxfer = 0;
4193 1.58 augustss }
4194 1.63 augustss xfer->status = USBD_CANCELLED;
4195 1.96 augustss #ifdef DIAGNOSTIC
4196 1.96 augustss UXFER(xfer)->iinfo.isdone = 1;
4197 1.96 augustss #endif
4198 1.208.12.1 itohy uhci_transfer_complete(xfer);
4199 1.1 augustss }
4200 1.1 augustss
4201 1.16 augustss usbd_status
4202 1.119 augustss uhci_root_intr_transfer(usbd_xfer_handle xfer)
4203 1.16 augustss {
4204 1.63 augustss usbd_status err;
4205 1.16 augustss
4206 1.52 augustss /* Insert last in queue. */
4207 1.63 augustss err = usb_insert_transfer(xfer);
4208 1.63 augustss if (err)
4209 1.63 augustss return (err);
4210 1.52 augustss
4211 1.186 skrll /*
4212 1.186 skrll * Pipe isn't running (otherwise err would be USBD_INPROG),
4213 1.208.12.1 itohy * so start it first.
4214 1.67 augustss */
4215 1.63 augustss return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
4216 1.16 augustss }
4217 1.16 augustss
4218 1.1 augustss /* Start a transfer on the root interrupt pipe */
4219 1.1 augustss usbd_status
4220 1.119 augustss uhci_root_intr_start(usbd_xfer_handle xfer)
4221 1.1 augustss {
4222 1.63 augustss usbd_pipe_handle pipe = xfer->pipe;
4223 1.1 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
4224 1.1 augustss
4225 1.173 gson DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n",
4226 1.63 augustss xfer, xfer->length, xfer->flags));
4227 1.82 augustss
4228 1.82 augustss if (sc->sc_dying)
4229 1.82 augustss return (USBD_IOERROR);
4230 1.1 augustss
4231 1.208.12.1 itohy sc->sc_ival = MS_TO_TICKS(xfer->pipe->endpoint->edesc->bInterval);
4232 1.96 augustss usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
4233 1.96 augustss sc->sc_intr_xfer = xfer;
4234 1.1 augustss return (USBD_IN_PROGRESS);
4235 1.1 augustss }
4236 1.1 augustss
4237 1.1 augustss /* Close the root interrupt pipe. */
4238 1.1 augustss void
4239 1.119 augustss uhci_root_intr_close(usbd_pipe_handle pipe)
4240 1.1 augustss {
4241 1.30 augustss uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
4242 1.30 augustss
4243 1.96 augustss usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, sc->sc_intr_xfer);
4244 1.96 augustss sc->sc_intr_xfer = NULL;
4245 1.1 augustss DPRINTF(("uhci_root_intr_close\n"));
4246 1.1 augustss }
4247