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uhci.c revision 1.208.12.6
      1  1.208.12.6     itohy /*	$NetBSD: uhci.c,v 1.208.12.6 2008/05/21 05:03:27 itohy Exp $	*/
      2  1.208.12.1     itohy /*	$FreeBSD: src/sys/dev/usb/uhci.c,v 1.172 2006/10/19 01:15:58 iedowse Exp $	*/
      3         1.1  augustss 
      4  1.208.12.1     itohy /*-
      5  1.208.12.1     itohy  * Copyright (c) 1998, 2004, 2007 The NetBSD Foundation, Inc.
      6         1.1  augustss  * All rights reserved.
      7         1.1  augustss  *
      8        1.11  augustss  * This code is derived from software contributed to The NetBSD Foundation
      9       1.113  augustss  * by Lennart Augustsson (lennart (at) augustsson.net) at
     10        1.11  augustss  * Carlstedt Research & Technology.
     11         1.1  augustss  *
     12         1.1  augustss  * Redistribution and use in source and binary forms, with or without
     13         1.1  augustss  * modification, are permitted provided that the following conditions
     14         1.1  augustss  * are met:
     15         1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     16         1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     17         1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     18         1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     19         1.1  augustss  *    documentation and/or other materials provided with the distribution.
     20         1.1  augustss  * 3. All advertising materials mentioning features or use of this software
     21         1.1  augustss  *    must display the following acknowledgement:
     22         1.1  augustss  *        This product includes software developed by the NetBSD
     23         1.1  augustss  *        Foundation, Inc. and its contributors.
     24         1.1  augustss  * 4. Neither the name of The NetBSD Foundation nor the names of its
     25         1.1  augustss  *    contributors may be used to endorse or promote products derived
     26         1.1  augustss  *    from this software without specific prior written permission.
     27         1.1  augustss  *
     28         1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     29         1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     30         1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     31         1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     32         1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     33         1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     34         1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     35         1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     36         1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     37         1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     38         1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     39         1.1  augustss  */
     40         1.1  augustss 
     41         1.1  augustss /*
     42         1.1  augustss  * USB Universal Host Controller driver.
     43        1.28  augustss  * Handles e.g. PIIX3 and PIIX4.
     44         1.1  augustss  *
     45  1.208.12.1     itohy  * UHCI spec: http://developer.intel.com/technology/usb/uhci11d.htm
     46  1.208.12.1     itohy  * USB spec: http://www.usb.org/developers/docs/
     47        1.71  augustss  * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
     48        1.71  augustss  *             ftp://download.intel.com/design/intarch/datashts/29056201.pdf
     49         1.1  augustss  */
     50       1.143     lukem 
     51       1.143     lukem #include <sys/cdefs.h>
     52  1.208.12.6     itohy __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.208.12.6 2008/05/21 05:03:27 itohy Exp $");
     53  1.208.12.1     itohy /* __FBSDID("$FreeBSD: src/sys/dev/usb/uhci.c,v 1.172 2006/10/19 01:15:58 iedowse Exp $"); */
     54         1.1  augustss 
     55         1.1  augustss #include <sys/param.h>
     56         1.1  augustss #include <sys/systm.h>
     57         1.1  augustss #include <sys/kernel.h>
     58         1.1  augustss #include <sys/malloc.h>
     59  1.208.12.2     itohy #include <sys/mbuf.h>
     60        1.37  augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
     61         1.1  augustss #include <sys/device.h>
     62        1.67  augustss #include <sys/select.h>
     63       1.183      fvdl #include <sys/extent.h>
     64       1.183      fvdl #include <uvm/uvm_extern.h>
     65        1.13  augustss #elif defined(__FreeBSD__)
     66  1.208.12.1     itohy #include <sys/endian.h>
     67        1.13  augustss #include <sys/module.h>
     68        1.13  augustss #include <sys/bus.h>
     69  1.208.12.1     itohy #include <sys/sysctl.h>
     70        1.67  augustss #if defined(DIAGNOSTIC) && defined(__i386__)
     71        1.67  augustss #include <machine/cpu.h>
     72        1.67  augustss #endif
     73        1.13  augustss #endif
     74         1.1  augustss #include <sys/proc.h>
     75         1.1  augustss #include <sys/queue.h>
     76         1.1  augustss 
     77         1.7  augustss #include <machine/bus.h>
     78        1.39  augustss #include <machine/endian.h>
     79         1.7  augustss 
     80         1.1  augustss #include <dev/usb/usb.h>
     81         1.1  augustss #include <dev/usb/usbdi.h>
     82         1.1  augustss #include <dev/usb/usbdivar.h>
     83         1.7  augustss #include <dev/usb/usb_mem.h>
     84         1.1  augustss #include <dev/usb/usb_quirks.h>
     85         1.1  augustss 
     86         1.1  augustss #include <dev/usb/uhcireg.h>
     87         1.1  augustss #include <dev/usb/uhcivar.h>
     88         1.1  augustss 
     89       1.125  augustss /* Use bandwidth reclamation for control transfers. Some devices choke on it. */
     90       1.125  augustss /*#define UHCI_CTL_LOOP */
     91       1.125  augustss 
     92        1.13  augustss #if defined(__FreeBSD__)
     93        1.13  augustss 
     94        1.13  augustss #define delay(d)		DELAY(d)
     95        1.13  augustss #endif
     96        1.13  augustss 
     97  1.208.12.1     itohy #define MS_TO_TICKS(ms) ((ms) * hz / 1000)
     98  1.208.12.1     itohy 
     99        1.37  augustss #if defined(__OpenBSD__)
    100        1.37  augustss struct cfdriver uhci_cd = {
    101        1.37  augustss 	NULL, "uhci", DV_DULL
    102        1.37  augustss };
    103        1.37  augustss #endif
    104        1.37  augustss 
    105  1.208.12.1     itohy #ifdef USB_DEBUG
    106        1.92  augustss uhci_softc_t *thesc;
    107        1.59  augustss #define DPRINTF(x)	if (uhcidebug) printf x
    108        1.59  augustss #define DPRINTFN(n,x)	if (uhcidebug>(n)) printf x
    109        1.67  augustss int uhcidebug = 0;
    110       1.125  augustss int uhcinoloop = 0;
    111  1.208.12.1     itohy #ifdef __FreeBSD__
    112  1.208.12.1     itohy SYSCTL_NODE(_hw_usb, OID_AUTO, uhci, CTLFLAG_RW, 0, "USB uhci");
    113  1.208.12.1     itohy SYSCTL_INT(_hw_usb_uhci, OID_AUTO, debug, CTLFLAG_RW,
    114  1.208.12.1     itohy 	   &uhcidebug, 0, "uhci debug level");
    115  1.208.12.1     itohy SYSCTL_INT(_hw_usb_uhci, OID_AUTO, loop, CTLFLAG_RW,
    116  1.208.12.1     itohy 	   &uhcinoloop, 0, "uhci noloop");
    117  1.208.12.1     itohy #endif
    118       1.122        tv #ifndef __NetBSD__
    119       1.122        tv #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
    120       1.122        tv #endif
    121        1.59  augustss #else
    122        1.59  augustss #define DPRINTF(x)
    123        1.59  augustss #define DPRINTFN(n,x)
    124        1.59  augustss #endif
    125        1.59  augustss 
    126        1.39  augustss /*
    127        1.39  augustss  * The UHCI controller is little endian, so on big endian machines
    128       1.181  drochner  * the data stored in memory needs to be swapped.
    129        1.39  augustss  */
    130  1.208.12.1     itohy #if defined(__OpenBSD__)
    131        1.39  augustss #if BYTE_ORDER == BIG_ENDIAN
    132        1.88   tsutsui #define htole32(x) (bswap32(x))
    133        1.88   tsutsui #define le32toh(x) (bswap32(x))
    134        1.39  augustss #else
    135        1.88   tsutsui #define htole32(x) (x)
    136        1.88   tsutsui #define le32toh(x) (x)
    137        1.88   tsutsui #endif
    138        1.39  augustss #endif
    139        1.39  augustss 
    140         1.1  augustss struct uhci_pipe {
    141         1.1  augustss 	struct usbd_pipe pipe;
    142        1.32  augustss 	int nexttoggle;
    143        1.92  augustss 
    144        1.92  augustss 	u_char aborting;
    145        1.92  augustss 	usbd_xfer_handle abortstart, abortend;
    146        1.92  augustss 
    147         1.1  augustss 	/* Info needed for different pipe kinds. */
    148         1.1  augustss 	union {
    149         1.1  augustss 		/* Control pipe */
    150         1.1  augustss 		struct {
    151         1.1  augustss 			uhci_soft_qh_t *sqh;
    152         1.7  augustss 			usb_dma_t reqdma;
    153        1.16  augustss 			uhci_soft_td_t *setup, *stat;
    154         1.1  augustss 			u_int length;
    155         1.1  augustss 		} ctl;
    156         1.1  augustss 		/* Interrupt pipe */
    157         1.1  augustss 		struct {
    158         1.1  augustss 			int npoll;
    159       1.187     skrll 			int isread;
    160         1.1  augustss 			uhci_soft_qh_t **qhs;
    161         1.1  augustss 		} intr;
    162         1.1  augustss 		/* Bulk pipe */
    163         1.1  augustss 		struct {
    164         1.1  augustss 			uhci_soft_qh_t *sqh;
    165         1.1  augustss 			u_int length;
    166         1.1  augustss 			int isread;
    167         1.1  augustss 		} bulk;
    168        1.16  augustss 		/* Iso pipe */
    169        1.16  augustss 		struct iso {
    170        1.16  augustss 			uhci_soft_td_t **stds;
    171        1.48  augustss 			int next, inuse;
    172        1.16  augustss 		} iso;
    173         1.1  augustss 	} u;
    174         1.1  augustss };
    175         1.1  augustss 
    176       1.142  augustss Static void		uhci_globalreset(uhci_softc_t *);
    177       1.166   dsainty Static usbd_status	uhci_portreset(uhci_softc_t*, int);
    178       1.142  augustss Static void		uhci_reset(uhci_softc_t *);
    179       1.119  augustss Static usbd_status	uhci_run(uhci_softc_t *, int run);
    180  1.208.12.1     itohy Static usbd_status	uhci_grow_std(uhci_softc_t *);
    181       1.123  augustss Static uhci_soft_td_t  *uhci_alloc_std(uhci_softc_t *);
    182  1.208.12.1     itohy Static uhci_soft_td_t  *uhci_alloc_std_norsv(uhci_softc_t *);
    183       1.119  augustss Static void		uhci_free_std(uhci_softc_t *, uhci_soft_td_t *);
    184  1.208.12.1     itohy Static void		uhci_free_std_norsv(uhci_softc_t *, uhci_soft_td_t *);
    185       1.123  augustss Static uhci_soft_qh_t  *uhci_alloc_sqh(uhci_softc_t *);
    186       1.119  augustss Static void		uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *);
    187  1.208.12.1     itohy Static void		uhci_free_desc_chunks(uhci_softc_t *,
    188  1.208.12.1     itohy 			    struct uhci_mdescs *);
    189  1.208.12.2     itohy 
    190  1.208.12.1     itohy Static void		uhci_aux_mem_init(struct uhci_aux_mem *);
    191  1.208.12.1     itohy Static usbd_status	uhci_aux_mem_alloc(uhci_softc_t *,
    192  1.208.12.1     itohy 			    struct uhci_aux_mem *,
    193  1.208.12.1     itohy 			    int /*naux*/, int /*maxp*/);
    194  1.208.12.1     itohy Static void		uhci_aux_mem_free(uhci_softc_t *,
    195  1.208.12.1     itohy 			    struct uhci_aux_mem *);
    196  1.208.12.6     itohy Static bus_addr_t	uhci_aux_dma_alloc(struct usb_aux_desc *,
    197  1.208.12.6     itohy 			    struct uhci_aux_mem *, const union usb_bufptr *,
    198  1.208.12.2     itohy 			    int);
    199  1.208.12.6     itohy Static void		uhci_aux_dma_prepare(struct usb_aux_desc *,
    200  1.208.12.6     itohy 			    int /*is_mbuf*/, int /*isread*/);
    201  1.208.12.6     itohy Static void		uhci_aux_dma_complete(struct usb_aux_desc *,
    202  1.208.12.2     itohy 			    struct uhci_aux_mem *, int /*is_mbuf*/,
    203  1.208.12.2     itohy 			    int /*isread*/);
    204  1.208.12.1     itohy Static void		uhci_aux_dma_sync(uhci_softc_t *,
    205  1.208.12.1     itohy 			    struct uhci_aux_mem *, int /*op*/);
    206        1.16  augustss #if 0
    207       1.119  augustss Static void		uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *,
    208       1.119  augustss 					 uhci_intr_info_t *);
    209       1.119  augustss Static void		uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *);
    210        1.16  augustss #endif
    211         1.1  augustss 
    212       1.152  augustss Static void		uhci_free_std_chain(uhci_softc_t *,
    213       1.119  augustss 					    uhci_soft_td_t *, uhci_soft_td_t *);
    214       1.119  augustss Static usbd_status	uhci_alloc_std_chain(struct uhci_pipe *,
    215  1.208.12.1     itohy 			    uhci_softc_t *, int, int, u_int16_t,
    216  1.208.12.1     itohy 			    usbd_xfer_handle xfer,
    217       1.119  augustss 			    uhci_soft_td_t **, uhci_soft_td_t **);
    218       1.119  augustss Static void		uhci_poll_hub(void *);
    219       1.119  augustss Static void		uhci_waitintr(uhci_softc_t *, usbd_xfer_handle);
    220       1.119  augustss Static void		uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *);
    221       1.119  augustss Static void		uhci_idone(uhci_intr_info_t *);
    222       1.119  augustss 
    223       1.119  augustss Static void		uhci_abort_xfer(usbd_xfer_handle, usbd_status status);
    224  1.208.12.1     itohy Static void		uhci_transfer_complete(usbd_xfer_handle xfer);
    225       1.119  augustss 
    226       1.119  augustss Static void		uhci_timeout(void *);
    227       1.153  augustss Static void		uhci_timeout_task(void *);
    228       1.123  augustss Static void		uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
    229       1.123  augustss Static void		uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
    230       1.119  augustss Static void		uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *);
    231       1.123  augustss Static void		uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
    232       1.123  augustss Static void		uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
    233       1.119  augustss Static void		uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *);
    234       1.189  christos Static int		uhci_str(usb_string_descriptor_t *, int, const char *);
    235       1.123  augustss Static void		uhci_add_loop(uhci_softc_t *sc);
    236       1.123  augustss Static void		uhci_rem_loop(uhci_softc_t *sc);
    237       1.119  augustss 
    238       1.119  augustss Static usbd_status	uhci_setup_isoc(usbd_pipe_handle pipe);
    239       1.119  augustss Static void		uhci_device_isoc_enter(usbd_xfer_handle);
    240       1.119  augustss 
    241  1.208.12.1     itohy Static usbd_status	uhci_prealloc(struct uhci_softc *,
    242  1.208.12.1     itohy 			    struct uhci_xfer *, size_t /*bufsize*/,
    243  1.208.12.1     itohy 			    int /*nseg*/);
    244  1.208.12.1     itohy Static usbd_status	uhci_allocm(struct usbd_bus *, usbd_xfer_handle,
    245  1.208.12.1     itohy 			    void *, size_t);
    246  1.208.12.1     itohy Static void		uhci_freem(struct usbd_bus *, usbd_xfer_handle,
    247  1.208.12.1     itohy 			    enum usbd_waitflg);
    248  1.208.12.1     itohy 
    249  1.208.12.1     itohy Static usbd_status	uhci_map_alloc(usbd_xfer_handle);
    250  1.208.12.1     itohy Static void		uhci_map_free(usbd_xfer_handle);
    251  1.208.12.1     itohy Static void		uhci_mapm(usbd_xfer_handle, void *, size_t);
    252  1.208.12.2     itohy Static usbd_status	uhci_mapm_mbuf(usbd_xfer_handle, struct mbuf *);
    253  1.208.12.1     itohy Static void		uhci_unmapm(usbd_xfer_handle);
    254       1.119  augustss 
    255  1.208.12.1     itohy Static usbd_xfer_handle	uhci_allocx(struct usbd_bus *, usbd_pipe_handle,
    256  1.208.12.1     itohy 			    enum usbd_waitflg);
    257       1.119  augustss Static void		uhci_freex(struct usbd_bus *, usbd_xfer_handle);
    258       1.119  augustss 
    259       1.119  augustss Static usbd_status	uhci_device_ctrl_transfer(usbd_xfer_handle);
    260       1.119  augustss Static usbd_status	uhci_device_ctrl_start(usbd_xfer_handle);
    261       1.119  augustss Static void		uhci_device_ctrl_abort(usbd_xfer_handle);
    262       1.119  augustss Static void		uhci_device_ctrl_close(usbd_pipe_handle);
    263       1.119  augustss Static void		uhci_device_ctrl_done(usbd_xfer_handle);
    264       1.119  augustss 
    265       1.119  augustss Static usbd_status	uhci_device_intr_transfer(usbd_xfer_handle);
    266       1.119  augustss Static usbd_status	uhci_device_intr_start(usbd_xfer_handle);
    267       1.119  augustss Static void		uhci_device_intr_abort(usbd_xfer_handle);
    268       1.119  augustss Static void		uhci_device_intr_close(usbd_pipe_handle);
    269       1.119  augustss Static void		uhci_device_intr_done(usbd_xfer_handle);
    270       1.119  augustss 
    271       1.119  augustss Static usbd_status	uhci_device_bulk_transfer(usbd_xfer_handle);
    272       1.119  augustss Static usbd_status	uhci_device_bulk_start(usbd_xfer_handle);
    273       1.119  augustss Static void		uhci_device_bulk_abort(usbd_xfer_handle);
    274       1.119  augustss Static void		uhci_device_bulk_close(usbd_pipe_handle);
    275       1.119  augustss Static void		uhci_device_bulk_done(usbd_xfer_handle);
    276       1.119  augustss 
    277       1.119  augustss Static usbd_status	uhci_device_isoc_transfer(usbd_xfer_handle);
    278       1.119  augustss Static usbd_status	uhci_device_isoc_start(usbd_xfer_handle);
    279       1.119  augustss Static void		uhci_device_isoc_abort(usbd_xfer_handle);
    280       1.119  augustss Static void		uhci_device_isoc_close(usbd_pipe_handle);
    281       1.119  augustss Static void		uhci_device_isoc_done(usbd_xfer_handle);
    282       1.119  augustss 
    283       1.119  augustss Static usbd_status	uhci_root_ctrl_transfer(usbd_xfer_handle);
    284       1.119  augustss Static usbd_status	uhci_root_ctrl_start(usbd_xfer_handle);
    285       1.119  augustss Static void		uhci_root_ctrl_abort(usbd_xfer_handle);
    286       1.119  augustss Static void		uhci_root_ctrl_close(usbd_pipe_handle);
    287       1.119  augustss Static void		uhci_root_ctrl_done(usbd_xfer_handle);
    288       1.119  augustss 
    289       1.119  augustss Static usbd_status	uhci_root_intr_transfer(usbd_xfer_handle);
    290       1.119  augustss Static usbd_status	uhci_root_intr_start(usbd_xfer_handle);
    291       1.119  augustss Static void		uhci_root_intr_abort(usbd_xfer_handle);
    292       1.119  augustss Static void		uhci_root_intr_close(usbd_pipe_handle);
    293       1.119  augustss Static void		uhci_root_intr_done(usbd_xfer_handle);
    294       1.119  augustss 
    295       1.119  augustss Static usbd_status	uhci_open(usbd_pipe_handle);
    296       1.119  augustss Static void		uhci_poll(struct usbd_bus *);
    297       1.133  augustss Static void		uhci_softintr(void *);
    298       1.119  augustss 
    299       1.119  augustss Static usbd_status	uhci_device_request(usbd_xfer_handle xfer);
    300       1.119  augustss 
    301       1.119  augustss Static void		uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *);
    302       1.158  augustss Static void		uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *);
    303       1.152  augustss Static usbd_status	uhci_device_setintr(uhci_softc_t *sc,
    304       1.119  augustss 			    struct uhci_pipe *pipe, int ival);
    305       1.119  augustss 
    306       1.119  augustss Static void		uhci_device_clear_toggle(usbd_pipe_handle pipe);
    307       1.119  augustss Static void		uhci_noop(usbd_pipe_handle pipe);
    308       1.119  augustss 
    309       1.192     perry Static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *,
    310  1.208.12.1     itohy 						  uhci_soft_qh_t *);
    311       1.119  augustss 
    312  1.208.12.1     itohy #ifdef USB_DEBUG
    313       1.119  augustss Static void		uhci_dump_all(uhci_softc_t *);
    314       1.119  augustss Static void		uhci_dumpregs(uhci_softc_t *);
    315       1.119  augustss Static void		uhci_dump_qhs(uhci_soft_qh_t *);
    316       1.119  augustss Static void		uhci_dump_qh(uhci_soft_qh_t *);
    317       1.119  augustss Static void		uhci_dump_tds(uhci_soft_td_t *);
    318       1.119  augustss Static void		uhci_dump_td(uhci_soft_td_t *);
    319       1.119  augustss Static void		uhci_dump_ii(uhci_intr_info_t *ii);
    320       1.119  augustss void			uhci_dump(void);
    321         1.1  augustss #endif
    322         1.1  augustss 
    323       1.112  augustss #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
    324       1.112  augustss 			BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
    325       1.112  augustss #define UWRITE1(sc, r, x) \
    326       1.165   dsainty  do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \
    327       1.165   dsainty  } while (/*CONSTCOND*/0)
    328       1.112  augustss #define UWRITE2(sc, r, x) \
    329       1.165   dsainty  do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \
    330       1.165   dsainty  } while (/*CONSTCOND*/0)
    331       1.112  augustss #define UWRITE4(sc, r, x) \
    332       1.165   dsainty  do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \
    333       1.165   dsainty  } while (/*CONSTCOND*/0)
    334       1.196       mrg static __inline uint8_t
    335       1.196       mrg UREAD1(uhci_softc_t *sc, bus_size_t r)
    336       1.196       mrg {
    337       1.196       mrg 
    338       1.196       mrg 	UBARR(sc);
    339       1.196       mrg 	return bus_space_read_1(sc->iot, sc->ioh, r);
    340       1.196       mrg }
    341       1.196       mrg 
    342       1.196       mrg static __inline uint16_t
    343       1.196       mrg UREAD2(uhci_softc_t *sc, bus_size_t r)
    344       1.196       mrg {
    345       1.196       mrg 
    346       1.196       mrg 	UBARR(sc);
    347       1.196       mrg 	return bus_space_read_2(sc->iot, sc->ioh, r);
    348       1.196       mrg }
    349       1.196       mrg 
    350       1.196       mrg static __inline uint32_t
    351       1.196       mrg UREAD4(uhci_softc_t *sc, bus_size_t r)
    352       1.196       mrg {
    353       1.196       mrg 
    354       1.196       mrg 	UBARR(sc);
    355       1.196       mrg 	return bus_space_read_4(sc->iot, sc->ioh, r);
    356       1.196       mrg }
    357         1.1  augustss 
    358         1.1  augustss #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
    359         1.1  augustss #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
    360         1.1  augustss 
    361       1.142  augustss #define UHCI_RESET_TIMEOUT 100	/* ms, reset timeout */
    362         1.1  augustss 
    363         1.1  augustss #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
    364         1.1  augustss 
    365         1.1  augustss #define UHCI_INTR_ENDPT 1
    366         1.1  augustss 
    367       1.208  drochner const struct usbd_bus_methods uhci_bus_methods = {
    368        1.48  augustss 	uhci_open,
    369        1.85  augustss 	uhci_softintr,
    370        1.48  augustss 	uhci_poll,
    371        1.48  augustss 	uhci_allocm,
    372        1.48  augustss 	uhci_freem,
    373  1.208.12.1     itohy 	uhci_map_alloc,
    374  1.208.12.1     itohy 	uhci_map_free,
    375  1.208.12.1     itohy 	uhci_mapm,
    376  1.208.12.1     itohy 	uhci_mapm_mbuf,
    377  1.208.12.1     itohy 	uhci_unmapm,
    378        1.76  augustss 	uhci_allocx,
    379        1.76  augustss 	uhci_freex,
    380        1.48  augustss };
    381        1.48  augustss 
    382       1.208  drochner const struct usbd_pipe_methods uhci_root_ctrl_methods = {
    383         1.1  augustss 	uhci_root_ctrl_transfer,
    384        1.16  augustss 	uhci_root_ctrl_start,
    385         1.1  augustss 	uhci_root_ctrl_abort,
    386         1.1  augustss 	uhci_root_ctrl_close,
    387        1.38  augustss 	uhci_noop,
    388        1.84  augustss 	uhci_root_ctrl_done,
    389         1.1  augustss };
    390         1.1  augustss 
    391       1.208  drochner const struct usbd_pipe_methods uhci_root_intr_methods = {
    392         1.1  augustss 	uhci_root_intr_transfer,
    393        1.16  augustss 	uhci_root_intr_start,
    394         1.1  augustss 	uhci_root_intr_abort,
    395         1.1  augustss 	uhci_root_intr_close,
    396        1.38  augustss 	uhci_noop,
    397        1.41  augustss 	uhci_root_intr_done,
    398         1.1  augustss };
    399         1.1  augustss 
    400       1.208  drochner const struct usbd_pipe_methods uhci_device_ctrl_methods = {
    401         1.1  augustss 	uhci_device_ctrl_transfer,
    402        1.16  augustss 	uhci_device_ctrl_start,
    403         1.1  augustss 	uhci_device_ctrl_abort,
    404         1.1  augustss 	uhci_device_ctrl_close,
    405        1.38  augustss 	uhci_noop,
    406        1.41  augustss 	uhci_device_ctrl_done,
    407         1.1  augustss };
    408         1.1  augustss 
    409       1.208  drochner const struct usbd_pipe_methods uhci_device_intr_methods = {
    410         1.1  augustss 	uhci_device_intr_transfer,
    411        1.16  augustss 	uhci_device_intr_start,
    412         1.1  augustss 	uhci_device_intr_abort,
    413         1.1  augustss 	uhci_device_intr_close,
    414        1.38  augustss 	uhci_device_clear_toggle,
    415        1.41  augustss 	uhci_device_intr_done,
    416         1.1  augustss };
    417         1.1  augustss 
    418       1.208  drochner const struct usbd_pipe_methods uhci_device_bulk_methods = {
    419         1.1  augustss 	uhci_device_bulk_transfer,
    420        1.16  augustss 	uhci_device_bulk_start,
    421         1.1  augustss 	uhci_device_bulk_abort,
    422         1.1  augustss 	uhci_device_bulk_close,
    423        1.38  augustss 	uhci_device_clear_toggle,
    424        1.41  augustss 	uhci_device_bulk_done,
    425         1.1  augustss };
    426         1.1  augustss 
    427       1.208  drochner const struct usbd_pipe_methods uhci_device_isoc_methods = {
    428        1.16  augustss 	uhci_device_isoc_transfer,
    429        1.16  augustss 	uhci_device_isoc_start,
    430        1.16  augustss 	uhci_device_isoc_abort,
    431        1.16  augustss 	uhci_device_isoc_close,
    432        1.38  augustss 	uhci_noop,
    433        1.41  augustss 	uhci_device_isoc_done,
    434        1.16  augustss };
    435        1.16  augustss 
    436        1.92  augustss #define uhci_add_intr_info(sc, ii) \
    437       1.169  augustss 	LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list)
    438        1.92  augustss #define uhci_del_intr_info(ii) \
    439       1.169  augustss 	do { \
    440       1.169  augustss 		LIST_REMOVE((ii), list); \
    441       1.169  augustss 		(ii)->list.le_prev = NULL; \
    442       1.169  augustss 	} while (0)
    443       1.169  augustss #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL)
    444        1.92  augustss 
    445       1.192     perry Static inline uhci_soft_qh_t *
    446       1.119  augustss uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh)
    447        1.92  augustss {
    448        1.92  augustss 	DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh));
    449        1.92  augustss 
    450        1.92  augustss 	for (; pqh->hlink != sqh; pqh = pqh->hlink) {
    451  1.208.12.1     itohy #if defined(DIAGNOSTIC) || defined(USB_DEBUG)
    452        1.92  augustss 		if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) {
    453       1.102  augustss 			printf("uhci_find_prev_qh: QH not found\n");
    454        1.92  augustss 			return (NULL);
    455        1.92  augustss 		}
    456        1.92  augustss #endif
    457        1.92  augustss 	}
    458        1.92  augustss 	return (pqh);
    459        1.92  augustss }
    460        1.92  augustss 
    461         1.1  augustss void
    462       1.142  augustss uhci_globalreset(uhci_softc_t *sc)
    463         1.1  augustss {
    464         1.1  augustss 	UHCICMD(sc, UHCI_CMD_GRESET);	/* global reset */
    465        1.20  augustss 	usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
    466         1.1  augustss 	UHCICMD(sc, 0);			/* do nothing */
    467         1.1  augustss }
    468         1.1  augustss 
    469         1.1  augustss usbd_status
    470       1.119  augustss uhci_init(uhci_softc_t *sc)
    471         1.1  augustss {
    472        1.63  augustss 	usbd_status err;
    473         1.1  augustss 	int i, j;
    474       1.123  augustss 	uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh;
    475         1.1  augustss 	uhci_soft_td_t *std;
    476         1.1  augustss 
    477         1.1  augustss 	DPRINTFN(1,("uhci_init: start\n"));
    478         1.1  augustss 
    479  1.208.12.1     itohy #ifdef USB_DEBUG
    480        1.92  augustss 	thesc = sc;
    481        1.92  augustss 
    482         1.1  augustss 	if (uhcidebug > 2)
    483         1.1  augustss 		uhci_dumpregs(sc);
    484         1.1  augustss #endif
    485         1.1  augustss 
    486         1.1  augustss 	UWRITE2(sc, UHCI_INTR, 0);		/* disable interrupts */
    487       1.142  augustss 	uhci_globalreset(sc);			/* reset the controller */
    488       1.142  augustss 	uhci_reset(sc);
    489        1.24  augustss 
    490  1.208.12.1     itohy 	usb_dma_tag_init(&sc->sc_dmatag);
    491       1.183      fvdl 
    492         1.1  augustss 	/* Allocate and initialize real frame array. */
    493  1.208.12.1     itohy 	err = usb_allocmem(&sc->sc_dmatag,
    494        1.63  augustss 		  UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
    495        1.63  augustss 		  UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
    496        1.63  augustss 	if (err)
    497        1.63  augustss 		return (err);
    498       1.159  augustss 	sc->sc_pframes = KERNADDR(&sc->sc_dma, 0);
    499         1.1  augustss 	UWRITE2(sc, UHCI_FRNUM, 0);		/* set frame number to 0 */
    500       1.160  augustss 	UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/
    501         1.1  augustss 
    502       1.152  augustss 	/*
    503       1.123  augustss 	 * Allocate a TD, inactive, that hangs from the last QH.
    504       1.123  augustss 	 * This is to avoid a bug in the PIIX that makes it run berserk
    505       1.123  augustss 	 * otherwise.
    506       1.123  augustss 	 */
    507  1.208.12.1     itohy 	std = uhci_alloc_std_norsv(sc);
    508       1.123  augustss 	if (std == NULL)
    509       1.123  augustss 		return (USBD_NOMEM);
    510       1.123  augustss 	std->link.std = NULL;
    511       1.123  augustss 	std->td.td_link = htole32(UHCI_PTR_T);
    512       1.123  augustss 	std->td.td_status = htole32(0); /* inactive */
    513       1.123  augustss 	std->td.td_token = htole32(0);
    514       1.123  augustss 	std->td.td_buffer = htole32(0);
    515  1.208.12.1     itohy 	UHCI_STD_SYNC(sc, std, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
    516       1.123  augustss 
    517       1.123  augustss 	/* Allocate the dummy QH marking the end and used for looping the QHs.*/
    518       1.123  augustss 	lsqh = uhci_alloc_sqh(sc);
    519       1.123  augustss 	if (lsqh == NULL)
    520       1.123  augustss 		return (USBD_NOMEM);
    521       1.123  augustss 	lsqh->hlink = NULL;
    522       1.123  augustss 	lsqh->qh.qh_hlink = htole32(UHCI_PTR_T);	/* end of QH chain */
    523       1.123  augustss 	lsqh->elink = std;
    524  1.208.12.1     itohy 	lsqh->qh.qh_elink = htole32(UHCI_STD_DMAADDR(std) | UHCI_PTR_TD);
    525  1.208.12.1     itohy 	UHCI_SQH_SYNC(sc, lsqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
    526       1.123  augustss 	sc->sc_last_qh = lsqh;
    527       1.123  augustss 
    528         1.1  augustss 	/* Allocate the dummy QH where bulk traffic will be queued. */
    529         1.1  augustss 	bsqh = uhci_alloc_sqh(sc);
    530        1.63  augustss 	if (bsqh == NULL)
    531         1.1  augustss 		return (USBD_NOMEM);
    532       1.123  augustss 	bsqh->hlink = lsqh;
    533  1.208.12.1     itohy 	bsqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(lsqh) | UHCI_PTR_QH);
    534       1.121  augustss 	bsqh->elink = NULL;
    535        1.88   tsutsui 	bsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    536  1.208.12.1     itohy 	UHCI_SQH_SYNC(sc, bsqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
    537         1.1  augustss 	sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
    538         1.1  augustss 
    539       1.123  augustss 	/* Allocate dummy QH where high speed control traffic will be queued. */
    540       1.123  augustss 	chsqh = uhci_alloc_sqh(sc);
    541       1.123  augustss 	if (chsqh == NULL)
    542       1.123  augustss 		return (USBD_NOMEM);
    543       1.123  augustss 	chsqh->hlink = bsqh;
    544  1.208.12.1     itohy 	chsqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(bsqh) | UHCI_PTR_QH);
    545       1.123  augustss 	chsqh->elink = NULL;
    546       1.123  augustss 	chsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    547  1.208.12.1     itohy 	UHCI_SQH_SYNC(sc, chsqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
    548       1.123  augustss 	sc->sc_hctl_start = sc->sc_hctl_end = chsqh;
    549       1.123  augustss 
    550       1.123  augustss 	/* Allocate dummy QH where control traffic will be queued. */
    551       1.123  augustss 	clsqh = uhci_alloc_sqh(sc);
    552       1.123  augustss 	if (clsqh == NULL)
    553         1.1  augustss 		return (USBD_NOMEM);
    554  1.208.12.1     itohy 	clsqh->hlink = chsqh;
    555  1.208.12.1     itohy 	clsqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(chsqh) | UHCI_PTR_QH);
    556       1.123  augustss 	clsqh->elink = NULL;
    557       1.123  augustss 	clsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    558  1.208.12.1     itohy 	UHCI_SQH_SYNC(sc, clsqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
    559       1.123  augustss 	sc->sc_lctl_start = sc->sc_lctl_end = clsqh;
    560         1.1  augustss 
    561       1.152  augustss 	/*
    562         1.1  augustss 	 * Make all (virtual) frame list pointers point to the interrupt
    563         1.1  augustss 	 * queue heads and the interrupt queue heads at the control
    564         1.1  augustss 	 * queue head and point the physical frame list to the virtual.
    565         1.1  augustss 	 */
    566         1.1  augustss 	for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
    567  1.208.12.1     itohy 		std = uhci_alloc_std_norsv(sc);
    568         1.1  augustss 		sqh = uhci_alloc_sqh(sc);
    569  1.208.12.1     itohy 		if (std == NULL || sqh == NULL) {
    570  1.208.12.1     itohy 			if (std)
    571  1.208.12.1     itohy 				uhci_free_std_norsv(sc, std);
    572  1.208.12.1     itohy 			/* XXX free resources */
    573        1.13  augustss 			return (USBD_NOMEM);
    574  1.208.12.1     itohy 		}
    575        1.42  augustss 		std->link.sqh = sqh;
    576  1.208.12.1     itohy 		std->td.td_link = htole32(UHCI_SQH_DMAADDR(sqh) | UHCI_PTR_QH);
    577        1.88   tsutsui 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
    578        1.88   tsutsui 		std->td.td_token = htole32(0);
    579        1.88   tsutsui 		std->td.td_buffer = htole32(0);
    580  1.208.12.1     itohy 		UHCI_STD_SYNC(sc, std,
    581  1.208.12.1     itohy 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
    582       1.123  augustss 		sqh->hlink = clsqh;
    583  1.208.12.1     itohy 		sqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(clsqh) | UHCI_PTR_QH);
    584       1.121  augustss 		sqh->elink = NULL;
    585        1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
    586  1.208.12.1     itohy 		UHCI_SQH_SYNC(sc, sqh,
    587  1.208.12.1     itohy 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
    588         1.1  augustss 		sc->sc_vframes[i].htd = std;
    589         1.1  augustss 		sc->sc_vframes[i].etd = std;
    590         1.1  augustss 		sc->sc_vframes[i].hqh = sqh;
    591         1.1  augustss 		sc->sc_vframes[i].eqh = sqh;
    592       1.152  augustss 		for (j = i;
    593       1.152  augustss 		     j < UHCI_FRAMELIST_COUNT;
    594         1.1  augustss 		     j += UHCI_VFRAMELIST_COUNT)
    595  1.208.12.1     itohy 			sc->sc_pframes[j] = htole32(UHCI_STD_DMAADDR(std));
    596         1.1  augustss 	}
    597         1.1  augustss 
    598         1.1  augustss 	LIST_INIT(&sc->sc_intrhead);
    599         1.1  augustss 
    600        1.76  augustss 	SIMPLEQ_INIT(&sc->sc_free_xfers);
    601        1.76  augustss 
    602        1.96  augustss 	usb_callout_init(sc->sc_poll_handle);
    603        1.96  augustss 
    604         1.1  augustss 	/* Set up the bus struct. */
    605        1.48  augustss 	sc->sc_bus.methods = &uhci_bus_methods;
    606         1.1  augustss 	sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
    607         1.1  augustss 
    608        1.30  augustss 	sc->sc_suspend = PWR_RESUME;
    609  1.208.12.1     itohy #if defined(__NetBSD__) || defined(__OpenBSD__)
    610       1.200  jmcneill 	sc->sc_powerhook = powerhook_establish(USBDEVNAME(sc->sc_bus.bdev),
    611       1.200  jmcneill 	    uhci_power, sc);
    612        1.72  augustss 	sc->sc_shutdownhook = shutdownhook_establish(uhci_shutdown, sc);
    613        1.92  augustss #endif
    614        1.72  augustss 
    615       1.190  augustss 	UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */
    616       1.190  augustss 
    617         1.1  augustss 	DPRINTFN(1,("uhci_init: enabling\n"));
    618       1.152  augustss 	UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
    619         1.1  augustss 		UHCI_INTR_IOCE | UHCI_INTR_SPIE);	/* enable interrupts */
    620         1.1  augustss 
    621        1.16  augustss 	return (uhci_run(sc, 1));		/* and here we go... */
    622        1.53  augustss }
    623        1.53  augustss 
    624        1.67  augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
    625        1.53  augustss int
    626  1.208.12.1     itohy uhci_activate(device_t self, enum devact act)
    627        1.53  augustss {
    628        1.56  augustss 	struct uhci_softc *sc = (struct uhci_softc *)self;
    629        1.53  augustss 	int rv = 0;
    630        1.53  augustss 
    631        1.53  augustss 	switch (act) {
    632        1.53  augustss 	case DVACT_ACTIVATE:
    633        1.53  augustss 		return (EOPNOTSUPP);
    634        1.53  augustss 
    635        1.53  augustss 	case DVACT_DEACTIVATE:
    636        1.56  augustss 		if (sc->sc_child != NULL)
    637        1.56  augustss 			rv = config_deactivate(sc->sc_child);
    638        1.53  augustss 		break;
    639        1.53  augustss 	}
    640        1.53  augustss 	return (rv);
    641        1.53  augustss }
    642  1.208.12.1     itohy #endif
    643        1.53  augustss 
    644        1.53  augustss int
    645       1.119  augustss uhci_detach(struct uhci_softc *sc, int flags)
    646        1.53  augustss {
    647        1.76  augustss 	usbd_xfer_handle xfer;
    648        1.53  augustss 	int rv = 0;
    649        1.53  augustss 
    650  1.208.12.1     itohy #if defined(__NetBSD__) || defined(__OpenBSD__)
    651        1.53  augustss 	if (sc->sc_child != NULL)
    652        1.53  augustss 		rv = config_detach(sc->sc_child, flags);
    653       1.152  augustss 
    654        1.53  augustss 	if (rv != 0)
    655        1.53  augustss 		return (rv);
    656  1.208.12.1     itohy #else
    657  1.208.12.1     itohy 	sc->sc_dying = 1;
    658  1.208.12.1     itohy #endif
    659  1.208.12.1     itohy 
    660  1.208.12.1     itohy #if defined(__NetBSD__) || defined(__OpenBSD__)
    661  1.208.12.1     itohy 	/* Don't touch hardware if it has already been gone. */
    662  1.208.12.1     itohy 	if ((flags & DETACH_FORCE) == 0)
    663  1.208.12.1     itohy #endif
    664  1.208.12.1     itohy 	{
    665  1.208.12.1     itohy 		UWRITE2(sc, UHCI_INTR, 0);	/* disable interrupts */
    666  1.208.12.1     itohy 		uhci_run(sc, 0);
    667  1.208.12.1     itohy 	}
    668        1.53  augustss 
    669        1.92  augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
    670        1.53  augustss 	powerhook_disestablish(sc->sc_powerhook);
    671        1.72  augustss 	shutdownhook_disestablish(sc->sc_shutdownhook);
    672        1.92  augustss #endif
    673        1.72  augustss 
    674        1.76  augustss 	/* Free all xfers associated with this HC. */
    675  1.208.12.1     itohy 	while ((xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers)) == NULL) {
    676       1.161     lukem 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
    677  1.208.12.1     itohy 		usb_clean_buffer_dma(&sc->sc_dmatag, &UXFER(xfer)->dmabuf);
    678        1.76  augustss 		free(xfer, M_USB);
    679       1.152  augustss 	}
    680        1.76  augustss 
    681        1.76  augustss 	/* XXX free other data structures XXX */
    682  1.208.12.1     itohy 	usb_freemem(&sc->sc_dmatag, &sc->sc_dma);
    683  1.208.12.1     itohy 
    684  1.208.12.1     itohy 	uhci_free_desc_chunks(sc, &sc->sc_std_chunks);
    685  1.208.12.1     itohy 	uhci_free_desc_chunks(sc, &sc->sc_sqh_chunks);
    686  1.208.12.1     itohy 	usb_dma_tag_finish(&sc->sc_dmatag);
    687        1.53  augustss 
    688        1.53  augustss 	return (rv);
    689         1.1  augustss }
    690  1.208.12.1     itohy 
    691  1.208.12.1     itohy Static usbd_status
    692  1.208.12.1     itohy uhci_prealloc(struct uhci_softc *sc, struct uhci_xfer *uxfer,
    693  1.208.12.1     itohy 	size_t bufsize, int nseg)
    694  1.208.12.1     itohy {
    695  1.208.12.1     itohy 	struct usbd_pipe *pipe;
    696  1.208.12.1     itohy 	int maxp, ntd, naux;
    697  1.208.12.1     itohy 	int s;
    698  1.208.12.1     itohy 	int err;
    699  1.208.12.1     itohy 
    700  1.208.12.1     itohy 	pipe = uxfer->xfer.pipe;
    701  1.208.12.1     itohy 	maxp = UE_MAXPKTSZ(pipe->endpoint->edesc);
    702  1.208.12.1     itohy 
    703  1.208.12.1     itohy 	if (maxp == 0 || maxp > UHCI_MAX_PKT_SIZE)
    704  1.208.12.1     itohy 		return (USBD_INVAL);
    705  1.208.12.1     itohy 
    706  1.208.12.1     itohy 	/* estimate needed number of TDs */
    707  1.208.12.1     itohy 	if ((pipe->endpoint->edesc->bmAttributes & UE_XFERTYPE) ==
    708  1.208.12.1     itohy 	    UE_ISOCHRONOUS) {
    709  1.208.12.1     itohy 		/* isochronous: TDs are allocated when uhci_open() is called */
    710  1.208.12.1     itohy 		ntd = 0;
    711  1.208.12.1     itohy 	} else {
    712  1.208.12.1     itohy 		/* UHCI: one TD per packet */
    713  1.208.12.1     itohy 		ntd = (bufsize + maxp - 1) / maxp;
    714  1.208.12.1     itohy 	}
    715  1.208.12.1     itohy 
    716  1.208.12.1     itohy 	/* estimate needed aux segments */
    717  1.208.12.1     itohy 	naux = nseg - 1;
    718  1.208.12.1     itohy 
    719  1.208.12.1     itohy 	/* pre-allocate aux memory */
    720  1.208.12.1     itohy 	err = uhci_aux_mem_alloc(sc, &uxfer->aux, naux, maxp);
    721  1.208.12.1     itohy 	if (err)
    722  1.208.12.1     itohy 		return err;
    723  1.208.12.1     itohy 
    724  1.208.12.1     itohy 	s = splusb();
    725  1.208.12.1     itohy 	/* pre-allocate TDs */
    726  1.208.12.1     itohy 	while (sc->sc_nfreetds < ntd) {
    727  1.208.12.1     itohy 		DPRINTF(("%s: uhci_prealloc: need %d TD (%d cur)\n",
    728  1.208.12.1     itohy 		    USBDEVNAME(sc->sc_bus.bdev),
    729  1.208.12.1     itohy 		    ntd, sc->sc_nfreetds));
    730  1.208.12.1     itohy 		if ((err = uhci_grow_std(sc)) != USBD_NORMAL_COMPLETION)
    731  1.208.12.1     itohy 			break;
    732  1.208.12.1     itohy 	}
    733  1.208.12.1     itohy 	if (!err) {
    734  1.208.12.1     itohy 		sc->sc_nfreetds -= ntd;
    735  1.208.12.1     itohy 		uxfer->rsvd_tds = ntd;
    736  1.208.12.1     itohy 	}
    737  1.208.12.1     itohy 	splx(s);
    738  1.208.12.1     itohy 
    739  1.208.12.1     itohy 	if (err)
    740  1.208.12.1     itohy 		uhci_aux_mem_free(sc, &uxfer->aux);
    741  1.208.12.1     itohy 
    742  1.208.12.1     itohy 	return err;
    743  1.208.12.1     itohy }
    744         1.1  augustss 
    745        1.48  augustss usbd_status
    746  1.208.12.1     itohy uhci_allocm(struct usbd_bus *bus, usbd_xfer_handle xfer, void *buf, size_t size)
    747        1.48  augustss {
    748       1.102  augustss 	struct uhci_softc *sc = (struct uhci_softc *)bus;
    749  1.208.12.1     itohy 	struct uhci_xfer *uxfer = UXFER(xfer);
    750  1.208.12.1     itohy 	usbd_status err;
    751       1.102  augustss 
    752  1.208.12.1     itohy 	if ((err = usb_alloc_buffer_dma(&sc->sc_dmatag, &UXFER(xfer)->dmabuf,
    753  1.208.12.1     itohy 	    buf, size, &xfer->hcbuffer)) == USBD_NORMAL_COMPLETION) {
    754  1.208.12.1     itohy 		if ((xfer->rqflags & URQ_DEV_MAP_PREPARED) == 0 &&
    755  1.208.12.1     itohy 		    (err = uhci_prealloc(sc, uxfer, size,
    756  1.208.12.1     itohy 		    USB_BUFFER_NSEGS(&uxfer->dmabuf)))
    757  1.208.12.1     itohy 		    != USBD_NORMAL_COMPLETION) {
    758  1.208.12.1     itohy 			usb_free_buffer_dma(&sc->sc_dmatag, &uxfer->dmabuf,
    759  1.208.12.1     itohy 			    U_WAITOK);
    760  1.208.12.1     itohy 		}
    761       1.102  augustss 	}
    762       1.102  augustss 
    763  1.208.12.1     itohy 	return err;
    764        1.48  augustss }
    765        1.48  augustss 
    766        1.48  augustss void
    767  1.208.12.1     itohy uhci_freem(struct usbd_bus *bus, usbd_xfer_handle xfer,
    768  1.208.12.1     itohy 	enum usbd_waitflg waitflg)
    769        1.48  augustss {
    770  1.208.12.1     itohy 	struct uhci_softc *sc = (struct uhci_softc *)bus;
    771  1.208.12.1     itohy 	struct uhci_xfer *uxfer = UXFER(xfer);
    772  1.208.12.1     itohy 	int s;
    773  1.208.12.1     itohy 
    774  1.208.12.1     itohy 	usb_free_buffer_dma(&sc->sc_dmatag, &UXFER(xfer)->dmabuf, waitflg);
    775  1.208.12.1     itohy 
    776  1.208.12.1     itohy 	if ((xfer->rqflags & URQ_DEV_MAP_PREPARED) == 0) {
    777  1.208.12.1     itohy 		s = splusb();
    778  1.208.12.1     itohy 		sc->sc_nfreetds += uxfer->rsvd_tds;
    779  1.208.12.1     itohy 		splx(s);
    780  1.208.12.1     itohy 		uxfer->rsvd_tds = 0;
    781  1.208.12.1     itohy 		uhci_aux_mem_free(sc, &uxfer->aux);
    782       1.183      fvdl 	}
    783  1.208.12.1     itohy }
    784  1.208.12.1     itohy 
    785  1.208.12.1     itohy Static usbd_status
    786  1.208.12.1     itohy uhci_map_alloc(usbd_xfer_handle xfer)
    787  1.208.12.1     itohy {
    788  1.208.12.1     itohy 	struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus;
    789  1.208.12.1     itohy 	struct uhci_xfer *uxfer = UXFER(xfer);
    790  1.208.12.1     itohy 	usbd_status st;
    791  1.208.12.1     itohy 
    792  1.208.12.1     itohy 	st = usb_alloc_dma_resources(&sc->sc_dmatag, &uxfer->dmabuf);
    793  1.208.12.1     itohy 	if (st)
    794  1.208.12.1     itohy 		return st;
    795  1.208.12.1     itohy 
    796  1.208.12.1     itohy 	if ((st = uhci_prealloc(sc, uxfer, MAXPHYS, USB_DMA_NSEG))) {
    797  1.208.12.1     itohy 		usb_free_dma_resources(&sc->sc_dmatag, &uxfer->dmabuf);
    798  1.208.12.1     itohy 	}
    799  1.208.12.1     itohy 
    800  1.208.12.1     itohy 	return st;
    801  1.208.12.1     itohy }
    802  1.208.12.1     itohy 
    803  1.208.12.1     itohy Static void
    804  1.208.12.1     itohy uhci_map_free(usbd_xfer_handle xfer)
    805  1.208.12.1     itohy {
    806  1.208.12.1     itohy 	struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus;
    807  1.208.12.1     itohy 	struct uhci_xfer *uxfer = UXFER(xfer);
    808  1.208.12.1     itohy 	int s;
    809  1.208.12.1     itohy 
    810  1.208.12.1     itohy 	USB_KASSERT(xfer->rqflags & URQ_DEV_MAP_PREPARED);
    811  1.208.12.1     itohy 
    812  1.208.12.1     itohy 	usb_free_dma_resources(&sc->sc_dmatag, &uxfer->dmabuf);
    813  1.208.12.1     itohy 
    814  1.208.12.1     itohy 	uhci_aux_mem_free(sc, &uxfer->aux);
    815  1.208.12.1     itohy 	s = splusb();
    816  1.208.12.1     itohy 	sc->sc_nfreetds += uxfer->rsvd_tds;
    817  1.208.12.1     itohy 	splx(s);
    818  1.208.12.1     itohy 	uxfer->rsvd_tds = 0;
    819  1.208.12.1     itohy }
    820  1.208.12.1     itohy 
    821  1.208.12.1     itohy Static void
    822  1.208.12.1     itohy uhci_mapm(usbd_xfer_handle xfer, void *buf, size_t size)
    823  1.208.12.1     itohy {
    824  1.208.12.1     itohy 	struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus;
    825  1.208.12.1     itohy 	struct uhci_xfer *uxfer = UXFER(xfer);
    826  1.208.12.1     itohy 
    827  1.208.12.1     itohy 	usb_map_dma(&sc->sc_dmatag, &uxfer->dmabuf, buf, size);
    828  1.208.12.1     itohy }
    829  1.208.12.1     itohy 
    830  1.208.12.2     itohy Static usbd_status
    831  1.208.12.1     itohy uhci_mapm_mbuf(usbd_xfer_handle xfer, struct mbuf *chain)
    832  1.208.12.1     itohy {
    833  1.208.12.1     itohy 	struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus;
    834  1.208.12.1     itohy 	struct uhci_xfer *uxfer = UXFER(xfer);
    835  1.208.12.2     itohy 	usbd_status err;
    836  1.208.12.2     itohy 
    837  1.208.12.2     itohy 	err = usb_map_mbuf_dma(&sc->sc_dmatag, &uxfer->dmabuf, chain);
    838  1.208.12.1     itohy 
    839  1.208.12.2     itohy 	return (err);
    840  1.208.12.1     itohy }
    841  1.208.12.1     itohy 
    842  1.208.12.1     itohy Static void
    843  1.208.12.1     itohy uhci_unmapm(usbd_xfer_handle xfer)
    844  1.208.12.1     itohy {
    845  1.208.12.1     itohy 	struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus;
    846  1.208.12.1     itohy 	struct uhci_xfer *uxfer = UXFER(xfer);
    847  1.208.12.1     itohy 
    848  1.208.12.1     itohy 	usb_unmap_dma(&sc->sc_dmatag, &uxfer->dmabuf);
    849        1.76  augustss }
    850        1.76  augustss 
    851        1.76  augustss usbd_xfer_handle
    852  1.208.12.1     itohy uhci_allocx(struct usbd_bus *bus, usbd_pipe_handle pipe,
    853  1.208.12.1     itohy 	enum usbd_waitflg waitflg)
    854        1.76  augustss {
    855        1.76  augustss 	struct uhci_softc *sc = (struct uhci_softc *)bus;
    856        1.76  augustss 	usbd_xfer_handle xfer;
    857        1.76  augustss 
    858        1.76  augustss 	xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
    859        1.94  augustss 	if (xfer != NULL) {
    860       1.161     lukem 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
    861        1.98  augustss #ifdef DIAGNOSTIC
    862        1.94  augustss 		if (xfer->busy_free != XFER_FREE) {
    863       1.105  augustss 			printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer,
    864        1.94  augustss 			       xfer->busy_free);
    865        1.94  augustss 		}
    866        1.98  augustss #endif
    867        1.94  augustss 	} else {
    868  1.208.12.1     itohy 		xfer = malloc(sizeof(struct uhci_xfer), M_USB,
    869  1.208.12.1     itohy 		    waitflg == U_WAITOK ? M_WAITOK : M_NOWAIT);
    870        1.94  augustss 	}
    871        1.92  augustss 	if (xfer != NULL) {
    872        1.92  augustss 		memset(xfer, 0, sizeof (struct uhci_xfer));
    873        1.92  augustss 		UXFER(xfer)->iinfo.sc = sc;
    874  1.208.12.1     itohy 		usb_init_task(&UXFER(xfer)->abort_task, uhci_timeout_task,
    875  1.208.12.1     itohy 		    xfer);
    876  1.208.12.1     itohy 		UXFER(xfer)->uhci_xfer_flags = 0;
    877        1.92  augustss #ifdef DIAGNOSTIC
    878        1.92  augustss 		UXFER(xfer)->iinfo.isdone = 1;
    879       1.135  augustss 		xfer->busy_free = XFER_BUSY;
    880        1.92  augustss #endif
    881        1.92  augustss 	}
    882        1.76  augustss 	return (xfer);
    883        1.76  augustss }
    884        1.76  augustss 
    885        1.76  augustss void
    886       1.119  augustss uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
    887        1.76  augustss {
    888        1.76  augustss 	struct uhci_softc *sc = (struct uhci_softc *)bus;
    889        1.76  augustss 
    890        1.93  augustss #ifdef DIAGNOSTIC
    891        1.94  augustss 	if (xfer->busy_free != XFER_BUSY) {
    892        1.94  augustss 		printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer,
    893        1.94  augustss 		       xfer->busy_free);
    894        1.93  augustss 	}
    895        1.94  augustss 	xfer->busy_free = XFER_FREE;
    896       1.105  augustss 	if (!UXFER(xfer)->iinfo.isdone) {
    897        1.96  augustss 		printf("uhci_freex: !isdone\n");
    898       1.105  augustss 	}
    899        1.93  augustss #endif
    900        1.76  augustss 	SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
    901        1.48  augustss }
    902        1.48  augustss 
    903        1.72  augustss /*
    904        1.72  augustss  * Shut down the controller when the system is going down.
    905        1.72  augustss  */
    906        1.72  augustss void
    907       1.119  augustss uhci_shutdown(void *v)
    908        1.72  augustss {
    909        1.72  augustss 	uhci_softc_t *sc = v;
    910       1.193  augustss 	int s;
    911        1.72  augustss 
    912        1.72  augustss 	DPRINTF(("uhci_shutdown: stopping the HC\n"));
    913       1.193  augustss 
    914       1.193  augustss 	/*
    915       1.193  augustss 	 * Use polling mode to prevent the interrupts shutting
    916       1.193  augustss 	 * us down before we shut them down.
    917       1.193  augustss 	 */
    918       1.193  augustss 	s = splhardusb();
    919       1.193  augustss 	sc->sc_bus.use_polling++;
    920        1.72  augustss 	uhci_run(sc, 0); /* stop the controller */
    921       1.193  augustss 	sc->sc_bus.use_polling--;
    922       1.193  augustss 	splx(s);
    923        1.72  augustss }
    924        1.72  augustss 
    925        1.30  augustss /*
    926        1.30  augustss  * Handle suspend/resume.
    927        1.30  augustss  *
    928        1.40  augustss  * We need to switch to polling mode here, because this routine is
    929       1.109  augustss  * called from an interrupt context.  This is all right since we
    930        1.40  augustss  * are almost suspended anyway.
    931        1.30  augustss  */
    932        1.30  augustss void
    933       1.119  augustss uhci_power(int why, void *v)
    934        1.30  augustss {
    935        1.30  augustss 	uhci_softc_t *sc = v;
    936        1.30  augustss 	int cmd;
    937        1.30  augustss 	int s;
    938        1.30  augustss 
    939       1.132  augustss 	s = splhardusb();
    940        1.30  augustss 	cmd = UREAD2(sc, UHCI_CMD);
    941        1.30  augustss 
    942       1.152  augustss 	DPRINTF(("uhci_power: sc=%p, why=%d (was %d), cmd=0x%x\n",
    943        1.30  augustss 		 sc, why, sc->sc_suspend, cmd));
    944        1.30  augustss 
    945       1.128  takemura 	switch (why) {
    946  1.208.12.1     itohy 	USB_PWR_CASE_SUSPEND:
    947  1.208.12.1     itohy #ifdef USB_DEBUG
    948        1.30  augustss 		if (uhcidebug > 2)
    949        1.30  augustss 			uhci_dumpregs(sc);
    950        1.30  augustss #endif
    951        1.96  augustss 		if (sc->sc_intr_xfer != NULL)
    952        1.96  augustss 			usb_uncallout(sc->sc_poll_handle, uhci_poll_hub,
    953        1.96  augustss 			    sc->sc_intr_xfer);
    954        1.54  augustss 		sc->sc_bus.use_polling++;
    955        1.30  augustss 		uhci_run(sc, 0); /* stop the controller */
    956        1.86  augustss 
    957        1.86  augustss 		/* save some state if BIOS doesn't */
    958        1.86  augustss 		sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM);
    959        1.86  augustss 		sc->sc_saved_sof = UREAD1(sc, UHCI_SOF);
    960        1.88   tsutsui 
    961       1.134  augustss 		UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */
    962       1.134  augustss 
    963        1.30  augustss 		UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */
    964        1.40  augustss 		usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
    965        1.30  augustss 		sc->sc_suspend = why;
    966        1.61  augustss 		sc->sc_bus.use_polling--;
    967        1.30  augustss 		DPRINTF(("uhci_power: cmd=0x%x\n", UREAD2(sc, UHCI_CMD)));
    968       1.128  takemura 		break;
    969  1.208.12.1     itohy 
    970  1.208.12.1     itohy 	USB_PWR_CASE_RESUME:
    971        1.60  augustss #ifdef DIAGNOSTIC
    972        1.61  augustss 		if (sc->sc_suspend == PWR_RESUME)
    973        1.61  augustss 			printf("uhci_power: weird, resume without suspend.\n");
    974        1.60  augustss #endif
    975        1.61  augustss 		sc->sc_bus.use_polling++;
    976        1.30  augustss 		sc->sc_suspend = why;
    977  1.208.12.1     itohy 		UWRITE2(sc, UHCI_INTR, 0);	/* disable interrupts */
    978  1.208.12.1     itohy 		uhci_globalreset(sc);		/* reset the controller */
    979  1.208.12.1     itohy 		uhci_reset(sc);
    980        1.30  augustss 		if (cmd & UHCI_CMD_RS)
    981        1.30  augustss 			uhci_run(sc, 0); /* in case BIOS has started it */
    982        1.86  augustss 
    983  1.208.12.1     itohy 		uhci_globalreset(sc);
    984  1.208.12.1     itohy 		uhci_reset(sc);
    985  1.208.12.1     itohy 
    986        1.86  augustss 		/* restore saved state */
    987       1.160  augustss 		UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0));
    988        1.86  augustss 		UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum);
    989        1.86  augustss 		UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof);
    990        1.86  augustss 
    991        1.30  augustss 		UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */
    992        1.40  augustss 		usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
    993        1.30  augustss 		UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
    994       1.152  augustss 		UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
    995        1.30  augustss 			UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */
    996  1.208.12.1     itohy 		UHCICMD(sc, UHCI_CMD_MAXP);
    997        1.30  augustss 		uhci_run(sc, 1); /* and start traffic again */
    998        1.40  augustss 		usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
    999        1.54  augustss 		sc->sc_bus.use_polling--;
   1000        1.96  augustss 		if (sc->sc_intr_xfer != NULL)
   1001        1.96  augustss 			usb_callout(sc->sc_poll_handle, sc->sc_ival,
   1002        1.96  augustss 				    uhci_poll_hub, sc->sc_intr_xfer);
   1003  1.208.12.1     itohy #ifdef USB_DEBUG
   1004        1.30  augustss 		if (uhcidebug > 2)
   1005        1.30  augustss 			uhci_dumpregs(sc);
   1006        1.30  augustss #endif
   1007       1.128  takemura 		break;
   1008  1.208.12.1     itohy 
   1009  1.208.12.1     itohy 	default:
   1010       1.128  takemura 		break;
   1011        1.30  augustss 	}
   1012        1.30  augustss 	splx(s);
   1013        1.30  augustss }
   1014        1.30  augustss 
   1015  1.208.12.1     itohy #ifdef USB_DEBUG
   1016       1.101  augustss Static void
   1017       1.119  augustss uhci_dumpregs(uhci_softc_t *sc)
   1018         1.1  augustss {
   1019        1.48  augustss 	DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
   1020        1.48  augustss 		     "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
   1021        1.48  augustss 		     USBDEVNAME(sc->sc_bus.bdev),
   1022        1.48  augustss 		     UREAD2(sc, UHCI_CMD),
   1023        1.48  augustss 		     UREAD2(sc, UHCI_STS),
   1024        1.48  augustss 		     UREAD2(sc, UHCI_INTR),
   1025        1.48  augustss 		     UREAD2(sc, UHCI_FRNUM),
   1026        1.48  augustss 		     UREAD4(sc, UHCI_FLBASEADDR),
   1027        1.48  augustss 		     UREAD1(sc, UHCI_SOF),
   1028        1.48  augustss 		     UREAD2(sc, UHCI_PORTSC1),
   1029        1.48  augustss 		     UREAD2(sc, UHCI_PORTSC2)));
   1030         1.1  augustss }
   1031         1.1  augustss 
   1032         1.1  augustss void
   1033       1.119  augustss uhci_dump_td(uhci_soft_td_t *p)
   1034         1.1  augustss {
   1035       1.122        tv 	char sbuf[128], sbuf2[128];
   1036       1.122        tv 
   1037        1.48  augustss 	DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
   1038        1.48  augustss 		     "token=0x%08lx buffer=0x%08lx\n",
   1039  1.208.12.1     itohy 		     p, (long)UHCI_STD_DMAADDR(p),
   1040        1.88   tsutsui 		     (long)le32toh(p->td.td_link),
   1041        1.88   tsutsui 		     (long)le32toh(p->td.td_status),
   1042        1.88   tsutsui 		     (long)le32toh(p->td.td_token),
   1043        1.88   tsutsui 		     (long)le32toh(p->td.td_buffer)));
   1044       1.122        tv 
   1045       1.147  augustss 	bitmask_snprintf((u_int32_t)le32toh(p->td.td_link), "\20\1T\2Q\3VF",
   1046       1.122        tv 			 sbuf, sizeof(sbuf));
   1047       1.147  augustss 	bitmask_snprintf((u_int32_t)le32toh(p->td.td_status),
   1048       1.122        tv 			 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
   1049       1.122        tv 			 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
   1050       1.122        tv 			 sbuf2, sizeof(sbuf2));
   1051       1.122        tv 
   1052       1.122        tv 	DPRINTFN(-1,("  %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
   1053       1.122        tv 		     "D=%d,maxlen=%d\n", sbuf, sbuf2,
   1054        1.88   tsutsui 		     UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)),
   1055        1.88   tsutsui 		     UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)),
   1056        1.88   tsutsui 		     UHCI_TD_GET_PID(le32toh(p->td.td_token)),
   1057        1.88   tsutsui 		     UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)),
   1058        1.88   tsutsui 		     UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)),
   1059        1.88   tsutsui 		     UHCI_TD_GET_DT(le32toh(p->td.td_token)),
   1060        1.88   tsutsui 		     UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token))));
   1061         1.1  augustss }
   1062         1.1  augustss 
   1063         1.1  augustss void
   1064       1.119  augustss uhci_dump_qh(uhci_soft_qh_t *sqh)
   1065         1.1  augustss {
   1066        1.67  augustss 	DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh,
   1067  1.208.12.1     itohy 	    (int)UHCI_SQH_DMAADDR(sqh), le32toh(sqh->qh.qh_hlink),
   1068        1.88   tsutsui 	    le32toh(sqh->qh.qh_elink)));
   1069         1.1  augustss }
   1070         1.1  augustss 
   1071        1.13  augustss 
   1072       1.110  augustss #if 1
   1073         1.1  augustss void
   1074       1.119  augustss uhci_dump(void)
   1075         1.1  augustss {
   1076       1.110  augustss 	uhci_dump_all(thesc);
   1077       1.110  augustss }
   1078       1.110  augustss #endif
   1079         1.1  augustss 
   1080       1.110  augustss void
   1081       1.119  augustss uhci_dump_all(uhci_softc_t *sc)
   1082       1.110  augustss {
   1083         1.1  augustss 	uhci_dumpregs(sc);
   1084        1.50  augustss 	printf("intrs=%d\n", sc->sc_bus.no_intrs);
   1085       1.110  augustss 	/*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/
   1086       1.123  augustss 	uhci_dump_qh(sc->sc_lctl_start);
   1087         1.1  augustss }
   1088         1.1  augustss 
   1089        1.67  augustss 
   1090        1.67  augustss void
   1091       1.119  augustss uhci_dump_qhs(uhci_soft_qh_t *sqh)
   1092        1.67  augustss {
   1093        1.67  augustss 	uhci_dump_qh(sqh);
   1094        1.67  augustss 
   1095        1.67  augustss 	/* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards
   1096        1.67  augustss 	 * Traverses sideways first, then down.
   1097        1.67  augustss 	 *
   1098        1.67  augustss 	 * QH1
   1099        1.67  augustss 	 * QH2
   1100        1.67  augustss 	 * No QH
   1101        1.67  augustss 	 * TD2.1
   1102        1.67  augustss 	 * TD2.2
   1103        1.67  augustss 	 * TD1.1
   1104        1.67  augustss 	 * etc.
   1105        1.67  augustss 	 *
   1106        1.67  augustss 	 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
   1107        1.67  augustss 	 */
   1108        1.67  augustss 
   1109        1.67  augustss 
   1110        1.88   tsutsui 	if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T))
   1111        1.67  augustss 		uhci_dump_qhs(sqh->hlink);
   1112        1.67  augustss 	else
   1113        1.67  augustss 		DPRINTF(("No QH\n"));
   1114        1.67  augustss 
   1115        1.88   tsutsui 	if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T))
   1116        1.67  augustss 		uhci_dump_tds(sqh->elink);
   1117        1.67  augustss 	else
   1118        1.67  augustss 		DPRINTF(("No TD\n"));
   1119        1.67  augustss }
   1120        1.67  augustss 
   1121         1.1  augustss void
   1122       1.119  augustss uhci_dump_tds(uhci_soft_td_t *std)
   1123         1.1  augustss {
   1124        1.67  augustss 	uhci_soft_td_t *td;
   1125        1.67  augustss 
   1126        1.67  augustss 	for(td = std; td != NULL; td = td->link.std) {
   1127        1.67  augustss 		uhci_dump_td(td);
   1128         1.1  augustss 
   1129        1.67  augustss 		/* Check whether the link pointer in this TD marks
   1130        1.67  augustss 		 * the link pointer as end of queue. This avoids
   1131        1.67  augustss 		 * printing the free list in case the queue/TD has
   1132        1.67  augustss 		 * already been moved there (seatbelt).
   1133        1.67  augustss 		 */
   1134        1.88   tsutsui 		if (le32toh(td->td.td_link) & UHCI_PTR_T ||
   1135        1.88   tsutsui 		    le32toh(td->td.td_link) == 0)
   1136        1.67  augustss 			break;
   1137        1.67  augustss 	}
   1138         1.1  augustss }
   1139        1.92  augustss 
   1140       1.101  augustss Static void
   1141       1.119  augustss uhci_dump_ii(uhci_intr_info_t *ii)
   1142        1.92  augustss {
   1143        1.95  augustss 	usbd_pipe_handle pipe;
   1144        1.95  augustss 	usb_endpoint_descriptor_t *ed;
   1145        1.95  augustss 	usbd_device_handle dev;
   1146       1.152  augustss 
   1147        1.98  augustss #ifdef DIAGNOSTIC
   1148        1.98  augustss #define DONE ii->isdone
   1149        1.98  augustss #else
   1150        1.98  augustss #define DONE 0
   1151        1.98  augustss #endif
   1152        1.95  augustss         if (ii == NULL) {
   1153        1.95  augustss                 printf("ii NULL\n");
   1154        1.95  augustss                 return;
   1155        1.95  augustss         }
   1156        1.95  augustss         if (ii->xfer == NULL) {
   1157        1.95  augustss 		printf("ii %p: done=%d xfer=NULL\n",
   1158        1.98  augustss 		       ii, DONE);
   1159        1.95  augustss                 return;
   1160        1.95  augustss         }
   1161        1.95  augustss         pipe = ii->xfer->pipe;
   1162        1.95  augustss         if (pipe == NULL) {
   1163        1.95  augustss 		printf("ii %p: done=%d xfer=%p pipe=NULL\n",
   1164        1.98  augustss 		       ii, DONE, ii->xfer);
   1165       1.139  augustss                 return;
   1166       1.139  augustss 	}
   1167       1.139  augustss         if (pipe->endpoint == NULL) {
   1168       1.139  augustss 		printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n",
   1169       1.139  augustss 		       ii, DONE, ii->xfer, pipe);
   1170       1.139  augustss                 return;
   1171       1.139  augustss 	}
   1172       1.139  augustss         if (pipe->device == NULL) {
   1173       1.139  augustss 		printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n",
   1174       1.139  augustss 		       ii, DONE, ii->xfer, pipe);
   1175        1.95  augustss                 return;
   1176        1.95  augustss 	}
   1177        1.95  augustss         ed = pipe->endpoint->edesc;
   1178        1.95  augustss         dev = pipe->device;
   1179       1.152  augustss 	printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n",
   1180       1.152  augustss 	       ii, DONE, ii->xfer, dev,
   1181        1.95  augustss 	       UGETW(dev->ddesc.idVendor),
   1182        1.92  augustss 	       UGETW(dev->ddesc.idProduct),
   1183        1.92  augustss 	       dev->address, pipe,
   1184        1.92  augustss 	       ed->bEndpointAddress, ed->bmAttributes);
   1185        1.98  augustss #undef DONE
   1186        1.92  augustss }
   1187        1.92  augustss 
   1188       1.120  augustss void uhci_dump_iis(struct uhci_softc *sc);
   1189        1.92  augustss void
   1190       1.119  augustss uhci_dump_iis(struct uhci_softc *sc)
   1191        1.92  augustss {
   1192        1.92  augustss 	uhci_intr_info_t *ii;
   1193        1.92  augustss 
   1194        1.92  augustss 	printf("intr_info list:\n");
   1195        1.92  augustss 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
   1196        1.92  augustss 		uhci_dump_ii(ii);
   1197        1.92  augustss }
   1198        1.92  augustss 
   1199       1.120  augustss void iidump(void);
   1200       1.119  augustss void iidump(void) { uhci_dump_iis(thesc); }
   1201        1.92  augustss 
   1202         1.1  augustss #endif
   1203         1.1  augustss 
   1204         1.1  augustss /*
   1205         1.1  augustss  * This routine is executed periodically and simulates interrupts
   1206         1.1  augustss  * from the root controller interrupt pipe for port status change.
   1207         1.1  augustss  */
   1208         1.1  augustss void
   1209       1.119  augustss uhci_poll_hub(void *addr)
   1210         1.1  augustss {
   1211        1.63  augustss 	usbd_xfer_handle xfer = addr;
   1212        1.63  augustss 	usbd_pipe_handle pipe = xfer->pipe;
   1213  1.208.12.1     itohy 	usbd_device_handle dev = pipe->device;
   1214  1.208.12.1     itohy 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   1215         1.1  augustss 	int s;
   1216         1.1  augustss 	u_char *p;
   1217         1.1  augustss 
   1218        1.96  augustss 	DPRINTFN(20, ("uhci_poll_hub\n"));
   1219         1.1  augustss 
   1220        1.96  augustss 	usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
   1221        1.41  augustss 
   1222  1.208.12.1     itohy 	p = xfer->hcbuffer;
   1223         1.1  augustss 	p[0] = 0;
   1224         1.1  augustss 	if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
   1225         1.1  augustss 		p[0] |= 1<<1;
   1226         1.1  augustss 	if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
   1227         1.1  augustss 		p[0] |= 1<<2;
   1228        1.41  augustss 	if (p[0] == 0)
   1229        1.41  augustss 		/* No change, try again in a while */
   1230        1.41  augustss 		return;
   1231        1.41  augustss 
   1232        1.63  augustss 	xfer->actlen = 1;
   1233        1.63  augustss 	xfer->status = USBD_NORMAL_COMPLETION;
   1234        1.16  augustss 	s = splusb();
   1235  1.208.12.1     itohy 	dev->bus->intr_context++;
   1236  1.208.12.1     itohy 	uhci_transfer_complete(xfer);
   1237  1.208.12.1     itohy 	dev->bus->intr_context--;
   1238        1.41  augustss 	splx(s);
   1239        1.41  augustss }
   1240        1.41  augustss 
   1241        1.41  augustss void
   1242       1.205  christos uhci_root_intr_done(usbd_xfer_handle xfer)
   1243        1.84  augustss {
   1244        1.84  augustss }
   1245        1.84  augustss 
   1246        1.84  augustss void
   1247       1.205  christos uhci_root_ctrl_done(usbd_xfer_handle xfer)
   1248        1.41  augustss {
   1249         1.1  augustss }
   1250         1.1  augustss 
   1251       1.123  augustss /*
   1252       1.123  augustss  * Let the last QH loop back to the high speed control transfer QH.
   1253       1.123  augustss  * This is what intel calls "bandwidth reclamation" and improves
   1254       1.123  augustss  * USB performance a lot for some devices.
   1255       1.123  augustss  * If we are already looping, just count it.
   1256       1.123  augustss  */
   1257         1.1  augustss void
   1258       1.123  augustss uhci_add_loop(uhci_softc_t *sc) {
   1259  1.208.12.1     itohy #ifdef USB_DEBUG
   1260       1.125  augustss 	if (uhcinoloop)
   1261       1.125  augustss 		return;
   1262       1.125  augustss #endif
   1263       1.123  augustss 	if (++sc->sc_loops == 1) {
   1264       1.125  augustss 		DPRINTFN(5,("uhci_start_loop: add\n"));
   1265       1.123  augustss 		/* Note, we don't loop back the soft pointer. */
   1266       1.152  augustss 		sc->sc_last_qh->qh.qh_hlink =
   1267  1.208.12.1     itohy 		    htole32(UHCI_SQH_DMAADDR(sc->sc_hctl_start) | UHCI_PTR_QH);
   1268       1.123  augustss 	}
   1269       1.123  augustss }
   1270       1.123  augustss 
   1271       1.123  augustss void
   1272       1.123  augustss uhci_rem_loop(uhci_softc_t *sc) {
   1273  1.208.12.1     itohy #ifdef USB_DEBUG
   1274       1.125  augustss 	if (uhcinoloop)
   1275       1.125  augustss 		return;
   1276       1.125  augustss #endif
   1277       1.123  augustss 	if (--sc->sc_loops == 0) {
   1278       1.123  augustss 		DPRINTFN(5,("uhci_end_loop: remove\n"));
   1279       1.123  augustss 		sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T);
   1280       1.123  augustss 	}
   1281       1.123  augustss }
   1282       1.123  augustss 
   1283       1.123  augustss /* Add high speed control QH, called at splusb(). */
   1284       1.123  augustss void
   1285       1.123  augustss uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1286         1.1  augustss {
   1287        1.42  augustss 	uhci_soft_qh_t *eqh;
   1288         1.1  augustss 
   1289        1.52  augustss 	SPLUSBCHECK;
   1290        1.52  augustss 
   1291         1.1  augustss 	DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
   1292       1.123  augustss 	eqh = sc->sc_hctl_end;
   1293        1.42  augustss 	sqh->hlink       = eqh->hlink;
   1294        1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1295  1.208.12.1     itohy 	UHCI_SQH_SYNC(sc, sqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1296        1.42  augustss 	eqh->hlink       = sqh;
   1297  1.208.12.1     itohy 	eqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(sqh) | UHCI_PTR_QH);
   1298  1.208.12.1     itohy 	UHCI_SQH_SYNC(sc, eqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1299       1.123  augustss 	sc->sc_hctl_end = sqh;
   1300       1.125  augustss #ifdef UHCI_CTL_LOOP
   1301       1.123  augustss 	uhci_add_loop(sc);
   1302       1.125  augustss #endif
   1303         1.1  augustss }
   1304         1.1  augustss 
   1305       1.123  augustss /* Remove high speed control QH, called at splusb(). */
   1306         1.1  augustss void
   1307       1.123  augustss uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1308         1.1  augustss {
   1309         1.1  augustss 	uhci_soft_qh_t *pqh;
   1310         1.1  augustss 
   1311        1.52  augustss 	SPLUSBCHECK;
   1312        1.52  augustss 
   1313       1.123  augustss 	DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh));
   1314       1.125  augustss #ifdef UHCI_CTL_LOOP
   1315       1.123  augustss 	uhci_rem_loop(sc);
   1316       1.125  augustss #endif
   1317       1.124  augustss 	/*
   1318       1.124  augustss 	 * The T bit should be set in the elink of the QH so that the HC
   1319       1.124  augustss 	 * doesn't follow the pointer.  This condition may fail if the
   1320       1.124  augustss 	 * the transferred packet was short so that the QH still points
   1321       1.124  augustss 	 * at the last used TD.
   1322       1.124  augustss 	 * In this case we set the T bit and wait a little for the HC
   1323       1.124  augustss 	 * to stop looking at the TD.
   1324       1.124  augustss 	 */
   1325       1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1326       1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1327  1.208.12.1     itohy 		UHCI_SQH_SYNC(sc, sqh,
   1328  1.208.12.1     itohy 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1329       1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1330       1.124  augustss 	}
   1331       1.124  augustss 
   1332       1.123  augustss 	pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh);
   1333       1.152  augustss 	pqh->hlink = sqh->hlink;
   1334        1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1335  1.208.12.1     itohy 	UHCI_SQH_SYNC(sc, pqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1336       1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1337       1.123  augustss 	if (sc->sc_hctl_end == sqh)
   1338       1.123  augustss 		sc->sc_hctl_end = pqh;
   1339       1.123  augustss }
   1340       1.123  augustss 
   1341       1.123  augustss /* Add low speed control QH, called at splusb(). */
   1342       1.123  augustss void
   1343       1.123  augustss uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1344       1.123  augustss {
   1345       1.123  augustss 	uhci_soft_qh_t *eqh;
   1346       1.123  augustss 
   1347       1.123  augustss 	SPLUSBCHECK;
   1348       1.123  augustss 
   1349       1.123  augustss 	DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh));
   1350       1.123  augustss 	eqh = sc->sc_lctl_end;
   1351       1.152  augustss 	sqh->hlink = eqh->hlink;
   1352       1.123  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1353  1.208.12.1     itohy 	UHCI_SQH_SYNC(sc, sqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1354       1.152  augustss 	eqh->hlink = sqh;
   1355  1.208.12.1     itohy 	eqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(sqh) | UHCI_PTR_QH);
   1356  1.208.12.1     itohy 	UHCI_SQH_SYNC(sc, eqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1357       1.123  augustss 	sc->sc_lctl_end = sqh;
   1358       1.123  augustss }
   1359       1.123  augustss 
   1360       1.123  augustss /* Remove low speed control QH, called at splusb(). */
   1361       1.123  augustss void
   1362       1.123  augustss uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1363       1.123  augustss {
   1364       1.123  augustss 	uhci_soft_qh_t *pqh;
   1365       1.123  augustss 
   1366       1.123  augustss 	SPLUSBCHECK;
   1367       1.123  augustss 
   1368       1.123  augustss 	DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh));
   1369       1.124  augustss 	/* See comment in uhci_remove_hs_ctrl() */
   1370       1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1371       1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1372  1.208.12.1     itohy 		UHCI_SQH_SYNC(sc, sqh,
   1373  1.208.12.1     itohy 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1374       1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1375       1.124  augustss 	}
   1376       1.123  augustss 	pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh);
   1377       1.152  augustss 	pqh->hlink = sqh->hlink;
   1378       1.123  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1379  1.208.12.1     itohy 	UHCI_SQH_SYNC(sc, pqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1380       1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1381       1.123  augustss 	if (sc->sc_lctl_end == sqh)
   1382       1.123  augustss 		sc->sc_lctl_end = pqh;
   1383         1.1  augustss }
   1384         1.1  augustss 
   1385         1.1  augustss /* Add bulk QH, called at splusb(). */
   1386         1.1  augustss void
   1387       1.119  augustss uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1388         1.1  augustss {
   1389        1.42  augustss 	uhci_soft_qh_t *eqh;
   1390         1.1  augustss 
   1391        1.52  augustss 	SPLUSBCHECK;
   1392        1.52  augustss 
   1393         1.1  augustss 	DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
   1394        1.42  augustss 	eqh = sc->sc_bulk_end;
   1395       1.152  augustss 	sqh->hlink = eqh->hlink;
   1396        1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1397  1.208.12.1     itohy 	UHCI_SQH_SYNC(sc, sqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1398       1.152  augustss 	eqh->hlink = sqh;
   1399  1.208.12.1     itohy 	eqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(sqh) | UHCI_PTR_QH);
   1400  1.208.12.1     itohy 	UHCI_SQH_SYNC(sc, eqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1401         1.1  augustss 	sc->sc_bulk_end = sqh;
   1402       1.123  augustss 	uhci_add_loop(sc);
   1403         1.1  augustss }
   1404         1.1  augustss 
   1405         1.1  augustss /* Remove bulk QH, called at splusb(). */
   1406         1.1  augustss void
   1407       1.119  augustss uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1408         1.1  augustss {
   1409         1.1  augustss 	uhci_soft_qh_t *pqh;
   1410         1.1  augustss 
   1411        1.52  augustss 	SPLUSBCHECK;
   1412        1.52  augustss 
   1413         1.1  augustss 	DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
   1414       1.123  augustss 	uhci_rem_loop(sc);
   1415       1.124  augustss 	/* See comment in uhci_remove_hs_ctrl() */
   1416       1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1417       1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1418  1.208.12.1     itohy 		UHCI_SQH_SYNC(sc, sqh,
   1419  1.208.12.1     itohy 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1420       1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1421       1.124  augustss 	}
   1422        1.92  augustss 	pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh);
   1423        1.42  augustss 	pqh->hlink       = sqh->hlink;
   1424        1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1425  1.208.12.1     itohy 	UHCI_SQH_SYNC(sc, pqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1426       1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1427         1.1  augustss 	if (sc->sc_bulk_end == sqh)
   1428         1.1  augustss 		sc->sc_bulk_end = pqh;
   1429         1.1  augustss }
   1430         1.1  augustss 
   1431       1.141  augustss Static int uhci_intr1(uhci_softc_t *);
   1432       1.141  augustss 
   1433         1.1  augustss int
   1434       1.119  augustss uhci_intr(void *arg)
   1435         1.1  augustss {
   1436        1.44  augustss 	uhci_softc_t *sc = arg;
   1437       1.146  augustss 
   1438       1.146  augustss 	if (sc->sc_dying)
   1439       1.146  augustss 		return (0);
   1440       1.141  augustss 
   1441  1.208.12.1     itohy 	DPRINTFN(15,("uhci_intr: real interrupt\n"));
   1442       1.141  augustss 	if (sc->sc_bus.use_polling) {
   1443       1.141  augustss #ifdef DIAGNOSTIC
   1444  1.208.12.1     itohy 		printf("uhci_intr: ignored interrupt while polling\n");
   1445       1.141  augustss #endif
   1446       1.141  augustss 		return (0);
   1447       1.141  augustss 	}
   1448       1.141  augustss 	return (uhci_intr1(sc));
   1449       1.141  augustss }
   1450       1.141  augustss 
   1451       1.141  augustss int
   1452       1.141  augustss uhci_intr1(uhci_softc_t *sc)
   1453       1.141  augustss {
   1454  1.208.12.1     itohy 
   1455        1.44  augustss 	int status;
   1456        1.44  augustss 	int ack;
   1457         1.1  augustss 
   1458  1.208.12.1     itohy #ifdef __FreeBSD__
   1459  1.208.12.1     itohy 	/*
   1460  1.208.12.1     itohy 	 * It can happen that an interrupt will be delivered to
   1461  1.208.12.1     itohy 	 * us before the device has been fully attached and the
   1462  1.208.12.1     itohy 	 * softc struct has been configured on FreeBSD.  Usually
   1463  1.208.12.1     itohy 	 * this happens when kldloading the USB support as a module
   1464  1.208.12.1     itohy 	 * after the system has been booted. If we detect this condition,
   1465  1.208.12.1     itohy 	 * we need to squelch the unwanted interrupts until we're
   1466  1.208.12.1     itohy 	 * ready for them.
   1467  1.208.12.1     itohy 	 */
   1468  1.208.12.1     itohy 	if (sc->sc_bus.bdev == NULL) {
   1469  1.208.12.1     itohy 		UWRITE2(sc, UHCI_STS, 0xFFFF);	/* ack pending interrupts */
   1470  1.208.12.1     itohy 		uhci_run(sc, 0);		/* stop the controller */
   1471  1.208.12.1     itohy 		UWRITE2(sc, UHCI_INTR, 0);	/* disable interrupts */
   1472  1.208.12.1     itohy 		return(0);
   1473  1.208.12.1     itohy 	}
   1474  1.208.12.1     itohy #endif
   1475  1.208.12.1     itohy 
   1476  1.208.12.1     itohy #ifdef USB_DEBUG
   1477        1.44  augustss 	if (uhcidebug > 15) {
   1478       1.141  augustss 		DPRINTF(("%s: uhci_intr1\n", USBDEVNAME(sc->sc_bus.bdev)));
   1479         1.1  augustss 		uhci_dumpregs(sc);
   1480         1.1  augustss 	}
   1481         1.1  augustss #endif
   1482       1.153  augustss 	status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS;
   1483       1.127     soren 	if (status == 0)	/* The interrupt was not for us. */
   1484       1.127     soren 		return (0);
   1485       1.127     soren 
   1486       1.117  augustss 	if (sc->sc_suspend != PWR_RESUME) {
   1487       1.201  jmcneill #ifdef DIAGNOSTIC
   1488  1.208.12.1     itohy 		printf("uhci_intr: suspended sts=0x%x\n", status);
   1489       1.117  augustss 		printf("%s: interrupt while not operating ignored\n",
   1490       1.117  augustss 		       USBDEVNAME(sc->sc_bus.bdev));
   1491       1.201  jmcneill #endif
   1492       1.134  augustss 		UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */
   1493       1.117  augustss 		return (0);
   1494       1.117  augustss 	}
   1495        1.44  augustss 
   1496        1.44  augustss 	ack = 0;
   1497        1.44  augustss 	if (status & UHCI_STS_USBINT)
   1498        1.44  augustss 		ack |= UHCI_STS_USBINT;
   1499        1.44  augustss 	if (status & UHCI_STS_USBEI)
   1500        1.44  augustss 		ack |= UHCI_STS_USBEI;
   1501         1.1  augustss 	if (status & UHCI_STS_RD) {
   1502        1.44  augustss 		ack |= UHCI_STS_RD;
   1503  1.208.12.1     itohy #ifdef USB_DEBUG
   1504        1.46  augustss 		printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
   1505       1.118  augustss #endif
   1506         1.1  augustss 	}
   1507         1.1  augustss 	if (status & UHCI_STS_HSE) {
   1508        1.44  augustss 		ack |= UHCI_STS_HSE;
   1509        1.81  augustss 		printf("%s: host system error\n", USBDEVNAME(sc->sc_bus.bdev));
   1510         1.1  augustss 	}
   1511         1.1  augustss 	if (status & UHCI_STS_HCPE) {
   1512        1.44  augustss 		ack |= UHCI_STS_HCPE;
   1513       1.152  augustss 		printf("%s: host controller process error\n",
   1514        1.81  augustss 		       USBDEVNAME(sc->sc_bus.bdev));
   1515        1.44  augustss 	}
   1516        1.44  augustss 	if (status & UHCI_STS_HCH) {
   1517        1.44  augustss 		/* no acknowledge needed */
   1518       1.136  augustss 		if (!sc->sc_dying) {
   1519       1.152  augustss 			printf("%s: host controller halted\n",
   1520       1.129  augustss 			    USBDEVNAME(sc->sc_bus.bdev));
   1521  1.208.12.1     itohy #ifdef USB_DEBUG
   1522       1.136  augustss 			uhci_dump_all(sc);
   1523       1.110  augustss #endif
   1524       1.136  augustss 		}
   1525       1.136  augustss 		sc->sc_dying = 1;
   1526         1.1  augustss 	}
   1527        1.44  augustss 
   1528       1.132  augustss 	if (!ack)
   1529       1.132  augustss 		return (0);	/* nothing to acknowledge */
   1530       1.132  augustss 	UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */
   1531         1.1  augustss 
   1532        1.85  augustss 	sc->sc_bus.no_intrs++;
   1533        1.85  augustss 	usb_schedsoftintr(&sc->sc_bus);
   1534        1.85  augustss 
   1535       1.175   mycroft 	DPRINTFN(15, ("%s: uhci_intr: exit\n", USBDEVNAME(sc->sc_bus.bdev)));
   1536        1.85  augustss 
   1537        1.85  augustss 	return (1);
   1538        1.85  augustss }
   1539        1.85  augustss 
   1540        1.85  augustss void
   1541       1.133  augustss uhci_softintr(void *v)
   1542        1.85  augustss {
   1543       1.133  augustss 	uhci_softc_t *sc = v;
   1544       1.178    martin 	uhci_intr_info_t *ii, *nextii;
   1545        1.85  augustss 
   1546       1.140  augustss 	DPRINTFN(10,("%s: uhci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev),
   1547       1.140  augustss 		     sc->sc_bus.intr_context));
   1548        1.85  augustss 
   1549        1.51  augustss 	sc->sc_bus.intr_context++;
   1550        1.50  augustss 
   1551         1.1  augustss 	/*
   1552         1.1  augustss 	 * Interrupts on UHCI really suck.  When the host controller
   1553         1.1  augustss 	 * interrupts because a transfer is completed there is no
   1554         1.1  augustss 	 * way of knowing which transfer it was.  You can scan down
   1555         1.1  augustss 	 * the TDs and QHs of the previous frame to limit the search,
   1556         1.1  augustss 	 * but that assumes that the interrupt was not delayed by more
   1557         1.1  augustss 	 * than 1 ms, which may not always be true (e.g. after debug
   1558         1.1  augustss 	 * output on a slow console).
   1559         1.1  augustss 	 * We scan all interrupt descriptors to see if any have
   1560         1.1  augustss 	 * completed.
   1561         1.1  augustss 	 */
   1562       1.178    martin 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) {
   1563       1.178    martin 		nextii = LIST_NEXT(ii, list);
   1564         1.1  augustss 		uhci_check_intr(sc, ii);
   1565       1.178    martin 	}
   1566         1.1  augustss 
   1567       1.164  augustss #ifdef USB_USE_SOFTINTR
   1568       1.153  augustss 	if (sc->sc_softwake) {
   1569       1.153  augustss 		sc->sc_softwake = 0;
   1570       1.153  augustss 		wakeup(&sc->sc_softwake);
   1571       1.153  augustss 	}
   1572       1.164  augustss #endif /* USB_USE_SOFTINTR */
   1573       1.153  augustss 
   1574        1.51  augustss 	sc->sc_bus.intr_context--;
   1575         1.1  augustss }
   1576         1.1  augustss 
   1577         1.1  augustss /* Check for an interrupt. */
   1578         1.1  augustss void
   1579       1.205  christos uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii)
   1580         1.1  augustss {
   1581         1.1  augustss 	uhci_soft_td_t *std, *lstd;
   1582        1.18  augustss 	u_int32_t status;
   1583         1.1  augustss 
   1584         1.1  augustss 	DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
   1585         1.1  augustss #ifdef DIAGNOSTIC
   1586        1.63  augustss 	if (ii == NULL) {
   1587         1.1  augustss 		printf("uhci_check_intr: no ii? %p\n", ii);
   1588         1.1  augustss 		return;
   1589         1.1  augustss 	}
   1590         1.1  augustss #endif
   1591       1.155  augustss 	if (ii->xfer->status == USBD_CANCELLED ||
   1592       1.155  augustss 	    ii->xfer->status == USBD_TIMEOUT) {
   1593       1.155  augustss 		DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer));
   1594       1.155  augustss 		return;
   1595       1.155  augustss 	}
   1596       1.155  augustss 
   1597        1.63  augustss 	if (ii->stdstart == NULL)
   1598         1.1  augustss 		return;
   1599         1.1  augustss 	lstd = ii->stdend;
   1600         1.1  augustss #ifdef DIAGNOSTIC
   1601        1.63  augustss 	if (lstd == NULL) {
   1602         1.1  augustss 		printf("uhci_check_intr: std==0\n");
   1603         1.1  augustss 		return;
   1604         1.1  augustss 	}
   1605         1.1  augustss #endif
   1606       1.152  augustss 	/*
   1607        1.26  augustss 	 * If the last TD is still active we need to check whether there
   1608       1.186     skrll 	 * is an error somewhere in the middle, or whether there was a
   1609        1.26  augustss 	 * short packet (SPD and not ACTIVE).
   1610        1.26  augustss 	 */
   1611  1.208.12.1     itohy 	UHCI_STD_SYNC(sc, lstd, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
   1612        1.88   tsutsui 	if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) {
   1613        1.92  augustss 		DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii));
   1614        1.48  augustss 		for (std = ii->stdstart; std != lstd; std = std->link.std) {
   1615  1.208.12.1     itohy 			UHCI_STD_SYNC(sc, lstd,
   1616  1.208.12.1     itohy 			    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
   1617        1.88   tsutsui 			status = le32toh(std->td.td_status);
   1618        1.83  augustss 			/* If there's an active TD the xfer isn't done. */
   1619        1.83  augustss 			if (status & UHCI_TD_ACTIVE)
   1620        1.83  augustss 				break;
   1621        1.83  augustss 			/* Any kind of error makes the xfer done. */
   1622        1.83  augustss 			if (status & UHCI_TD_STALLED)
   1623        1.83  augustss 				goto done;
   1624        1.83  augustss 			/* We want short packets, and it is short: it's done */
   1625        1.83  augustss 			if ((status & UHCI_TD_SPD) &&
   1626       1.152  augustss 			      UHCI_TD_GET_ACTLEN(status) <
   1627        1.88   tsutsui 			      UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)))
   1628         1.1  augustss 				goto done;
   1629        1.18  augustss 		}
   1630        1.92  augustss 		DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n",
   1631        1.18  augustss 			      ii, ii->stdstart));
   1632         1.1  augustss 		return;
   1633         1.1  augustss 	}
   1634         1.1  augustss  done:
   1635        1.92  augustss 	DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii));
   1636        1.96  augustss 	usb_uncallout(ii->xfer->timeout_handle, uhci_timeout, ii);
   1637  1.208.12.1     itohy 	usb_rem_task(ii->xfer->pipe->device, &UXFER(ii->xfer)->abort_task);
   1638        1.36  augustss 	uhci_idone(ii);
   1639         1.1  augustss }
   1640         1.1  augustss 
   1641        1.52  augustss /* Called at splusb() */
   1642         1.1  augustss void
   1643       1.119  augustss uhci_idone(uhci_intr_info_t *ii)
   1644         1.1  augustss {
   1645        1.63  augustss 	usbd_xfer_handle xfer = ii->xfer;
   1646        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   1647  1.208.12.1     itohy 	uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
   1648         1.1  augustss 	uhci_soft_td_t *std;
   1649        1.67  augustss 	u_int32_t status = 0, nstatus;
   1650        1.26  augustss 	int actlen;
   1651         1.1  augustss 
   1652       1.140  augustss 	DPRINTFN(12, ("uhci_idone: ii=%p\n", ii));
   1653         1.7  augustss #ifdef DIAGNOSTIC
   1654         1.7  augustss 	{
   1655         1.7  augustss 		int s = splhigh();
   1656         1.7  augustss 		if (ii->isdone) {
   1657        1.26  augustss 			splx(s);
   1658  1.208.12.1     itohy #ifdef USB_DEBUG
   1659        1.92  augustss 			printf("uhci_idone: ii is done!\n   ");
   1660        1.92  augustss 			uhci_dump_ii(ii);
   1661        1.92  augustss #else
   1662        1.36  augustss 			printf("uhci_idone: ii=%p is done!\n", ii);
   1663        1.92  augustss #endif
   1664         1.7  augustss 			return;
   1665         1.7  augustss 		}
   1666         1.7  augustss 		ii->isdone = 1;
   1667         1.7  augustss 		splx(s);
   1668         1.7  augustss 	}
   1669         1.7  augustss #endif
   1670        1.48  augustss 
   1671        1.63  augustss 	if (xfer->nframes != 0) {
   1672        1.48  augustss 		/* Isoc transfer, do things differently. */
   1673        1.48  augustss 		uhci_soft_td_t **stds = upipe->u.iso.stds;
   1674       1.126  augustss 		int i, n, nframes, len;
   1675        1.48  augustss 
   1676        1.48  augustss 		DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii));
   1677        1.48  augustss 
   1678        1.63  augustss 		nframes = xfer->nframes;
   1679        1.48  augustss 		actlen = 0;
   1680        1.92  augustss 		n = UXFER(xfer)->curframe;
   1681        1.48  augustss 		for (i = 0; i < nframes; i++) {
   1682        1.48  augustss 			std = stds[n];
   1683  1.208.12.1     itohy 			UHCI_STD_SYNC(sc, std,
   1684  1.208.12.1     itohy 			    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
   1685  1.208.12.1     itohy #ifdef USB_DEBUG
   1686        1.48  augustss 			if (uhcidebug > 5) {
   1687        1.48  augustss 				DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i));
   1688        1.48  augustss 				uhci_dump_td(std);
   1689        1.48  augustss 			}
   1690        1.48  augustss #endif
   1691        1.48  augustss 			if (++n >= UHCI_VFRAMELIST_COUNT)
   1692        1.48  augustss 				n = 0;
   1693        1.88   tsutsui 			status = le32toh(std->td.td_status);
   1694       1.126  augustss 			len = UHCI_TD_GET_ACTLEN(status);
   1695       1.126  augustss 			xfer->frlengths[i] = len;
   1696       1.126  augustss 			actlen += len;
   1697        1.48  augustss 		}
   1698        1.48  augustss 		upipe->u.iso.inuse -= nframes;
   1699        1.63  augustss 		xfer->actlen = actlen;
   1700        1.63  augustss 		xfer->status = USBD_NORMAL_COMPLETION;
   1701       1.140  augustss 		goto end;
   1702        1.48  augustss 	}
   1703        1.48  augustss 
   1704  1.208.12.1     itohy #ifdef USB_DEBUG
   1705        1.65  augustss 	DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n",
   1706        1.65  augustss 		      ii, xfer, upipe));
   1707        1.48  augustss 	if (uhcidebug > 10)
   1708        1.48  augustss 		uhci_dump_tds(ii->stdstart);
   1709        1.48  augustss #endif
   1710        1.48  augustss 
   1711        1.26  augustss 	/* The transfer is done, compute actual length and status. */
   1712        1.26  augustss 	actlen = 0;
   1713        1.63  augustss 	for (std = ii->stdstart; std != NULL; std = std->link.std) {
   1714        1.88   tsutsui 		nstatus = le32toh(std->td.td_status);
   1715        1.64  augustss 		if (nstatus & UHCI_TD_ACTIVE)
   1716        1.26  augustss 			break;
   1717        1.67  augustss 
   1718        1.64  augustss 		status = nstatus;
   1719        1.88   tsutsui 		if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) !=
   1720        1.88   tsutsui 			UHCI_TD_PID_SETUP)
   1721        1.26  augustss 			actlen += UHCI_TD_GET_ACTLEN(status);
   1722       1.176   mycroft 		else {
   1723       1.176   mycroft 			/*
   1724       1.176   mycroft 			 * UHCI will report CRCTO in addition to a STALL or NAK
   1725       1.176   mycroft 			 * for a SETUP transaction.  See section 3.2.2, "TD
   1726       1.176   mycroft 			 * CONTROL AND STATUS".
   1727       1.176   mycroft 			 */
   1728       1.176   mycroft 			if (status & (UHCI_TD_STALLED | UHCI_TD_NAK))
   1729       1.176   mycroft 				status &= ~UHCI_TD_CRCTO;
   1730       1.176   mycroft 		}
   1731         1.1  augustss 	}
   1732        1.38  augustss 	/* If there are left over TDs we need to update the toggle. */
   1733        1.63  augustss 	if (std != NULL)
   1734        1.88   tsutsui 		upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token));
   1735        1.38  augustss 
   1736         1.1  augustss 	status &= UHCI_TD_ERROR;
   1737       1.152  augustss 	DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n",
   1738        1.26  augustss 		      actlen, status));
   1739        1.63  augustss 	xfer->actlen = actlen;
   1740         1.1  augustss 	if (status != 0) {
   1741  1.208.12.1     itohy #ifdef USB_DEBUG
   1742       1.122        tv 		char sbuf[128];
   1743       1.122        tv 
   1744       1.147  augustss 		bitmask_snprintf((u_int32_t)status,
   1745       1.147  augustss 				 "\20\22BITSTUFF\23CRCTO\24NAK\25"
   1746       1.122        tv 				 "BABBLE\26DBUFFER\27STALLED\30ACTIVE",
   1747       1.122        tv 				 sbuf, sizeof(sbuf));
   1748       1.122        tv 
   1749        1.75  augustss 		DPRINTFN((status == UHCI_TD_STALLED)*10,
   1750        1.36  augustss 			 ("uhci_idone: error, addr=%d, endpt=0x%02x, "
   1751       1.122        tv 			  "status 0x%s\n",
   1752        1.63  augustss 			  xfer->pipe->device->address,
   1753        1.63  augustss 			  xfer->pipe->endpoint->edesc->bEndpointAddress,
   1754       1.122        tv 			  sbuf));
   1755       1.122        tv #endif
   1756       1.122        tv 
   1757         1.1  augustss 		if (status == UHCI_TD_STALLED)
   1758        1.63  augustss 			xfer->status = USBD_STALLED;
   1759         1.1  augustss 		else
   1760        1.63  augustss 			xfer->status = USBD_IOERROR; /* more info XXX */
   1761         1.1  augustss 	} else {
   1762        1.63  augustss 		xfer->status = USBD_NORMAL_COMPLETION;
   1763         1.1  augustss 	}
   1764       1.140  augustss 
   1765       1.140  augustss  end:
   1766  1.208.12.1     itohy 	uhci_transfer_complete(xfer);
   1767       1.140  augustss 	DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii));
   1768         1.1  augustss }
   1769         1.1  augustss 
   1770        1.13  augustss /*
   1771        1.13  augustss  * Called when a request does not complete.
   1772        1.13  augustss  */
   1773         1.1  augustss void
   1774       1.119  augustss uhci_timeout(void *addr)
   1775         1.1  augustss {
   1776         1.1  augustss 	uhci_intr_info_t *ii = addr;
   1777       1.153  augustss 	struct uhci_xfer *uxfer = UXFER(ii->xfer);
   1778       1.153  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe;
   1779       1.153  augustss 	uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
   1780       1.153  augustss 
   1781       1.153  augustss 	DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer));
   1782       1.153  augustss 
   1783       1.153  augustss 	if (sc->sc_dying) {
   1784       1.153  augustss 		uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT);
   1785       1.153  augustss 		return;
   1786       1.153  augustss 	}
   1787         1.1  augustss 
   1788       1.153  augustss 	/* Execute the abort in a process context. */
   1789       1.204     joerg 	usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task,
   1790       1.204     joerg 	    USB_TASKQ_HC);
   1791       1.153  augustss }
   1792        1.51  augustss 
   1793       1.153  augustss void
   1794       1.153  augustss uhci_timeout_task(void *addr)
   1795       1.153  augustss {
   1796       1.153  augustss 	usbd_xfer_handle xfer = addr;
   1797       1.153  augustss 	int s;
   1798       1.153  augustss 
   1799       1.153  augustss 	DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer));
   1800        1.67  augustss 
   1801       1.153  augustss 	s = splusb();
   1802       1.153  augustss 	uhci_abort_xfer(xfer, USBD_TIMEOUT);
   1803       1.153  augustss 	splx(s);
   1804         1.1  augustss }
   1805         1.1  augustss 
   1806         1.1  augustss /*
   1807         1.1  augustss  * Wait here until controller claims to have an interrupt.
   1808         1.1  augustss  * Then call uhci_intr and return.  Use timeout to avoid waiting
   1809         1.1  augustss  * too long.
   1810        1.13  augustss  * Only used during boot when interrupts are not enabled yet.
   1811         1.1  augustss  */
   1812         1.1  augustss void
   1813       1.119  augustss uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer)
   1814         1.1  augustss {
   1815        1.63  augustss 	int timo = xfer->timeout;
   1816        1.13  augustss 	uhci_intr_info_t *ii;
   1817        1.13  augustss 
   1818        1.26  augustss 	DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
   1819         1.1  augustss 
   1820        1.63  augustss 	xfer->status = USBD_IN_PROGRESS;
   1821        1.26  augustss 	for (; timo >= 0; timo--) {
   1822        1.20  augustss 		usb_delay_ms(&sc->sc_bus, 1);
   1823        1.26  augustss 		DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
   1824  1.208.12.1     itohy 		if (UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS)
   1825       1.141  augustss 			uhci_intr1(sc);
   1826  1.208.12.1     itohy 		if (xfer->status != USBD_IN_PROGRESS)
   1827  1.208.12.1     itohy 			return;
   1828         1.1  augustss 	}
   1829        1.13  augustss 
   1830        1.13  augustss 	/* Timeout */
   1831        1.13  augustss 	DPRINTF(("uhci_waitintr: timeout\n"));
   1832        1.13  augustss 	for (ii = LIST_FIRST(&sc->sc_intrhead);
   1833       1.152  augustss 	     ii != NULL && ii->xfer != xfer;
   1834        1.13  augustss 	     ii = LIST_NEXT(ii, list))
   1835        1.13  augustss 		;
   1836        1.41  augustss #ifdef DIAGNOSTIC
   1837        1.63  augustss 	if (ii == NULL)
   1838       1.163    provos 		panic("uhci_waitintr: lost intr_info");
   1839        1.41  augustss #endif
   1840        1.41  augustss 	uhci_idone(ii);
   1841         1.1  augustss }
   1842         1.1  augustss 
   1843         1.8  augustss void
   1844       1.119  augustss uhci_poll(struct usbd_bus *bus)
   1845         1.8  augustss {
   1846         1.8  augustss 	uhci_softc_t *sc = (uhci_softc_t *)bus;
   1847         1.8  augustss 
   1848  1.208.12.1     itohy 	if (UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS)
   1849       1.141  augustss 		uhci_intr1(sc);
   1850         1.8  augustss }
   1851         1.8  augustss 
   1852         1.1  augustss void
   1853       1.119  augustss uhci_reset(uhci_softc_t *sc)
   1854         1.1  augustss {
   1855         1.1  augustss 	int n;
   1856         1.1  augustss 
   1857         1.1  augustss 	UHCICMD(sc, UHCI_CMD_HCRESET);
   1858         1.1  augustss 	/* The reset bit goes low when the controller is done. */
   1859       1.152  augustss 	for (n = 0; n < UHCI_RESET_TIMEOUT &&
   1860         1.1  augustss 		    (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
   1861        1.92  augustss 		usb_delay_ms(&sc->sc_bus, 1);
   1862         1.1  augustss 	if (n >= UHCI_RESET_TIMEOUT)
   1863       1.152  augustss 		printf("%s: controller did not reset\n",
   1864        1.13  augustss 		       USBDEVNAME(sc->sc_bus.bdev));
   1865         1.1  augustss }
   1866         1.1  augustss 
   1867        1.16  augustss usbd_status
   1868       1.119  augustss uhci_run(uhci_softc_t *sc, int run)
   1869         1.1  augustss {
   1870         1.1  augustss 	int s, n, running;
   1871        1.71  augustss 	u_int16_t cmd;
   1872         1.1  augustss 
   1873         1.1  augustss 	run = run != 0;
   1874       1.132  augustss 	s = splhardusb();
   1875        1.30  augustss 	DPRINTF(("uhci_run: setting run=%d\n", run));
   1876        1.71  augustss 	cmd = UREAD2(sc, UHCI_CMD);
   1877        1.71  augustss 	if (run)
   1878        1.71  augustss 		cmd |= UHCI_CMD_RS;
   1879        1.71  augustss 	else
   1880        1.71  augustss 		cmd &= ~UHCI_CMD_RS;
   1881        1.71  augustss 	UHCICMD(sc, cmd);
   1882        1.13  augustss 	for(n = 0; n < 10; n++) {
   1883         1.1  augustss 		running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
   1884         1.1  augustss 		/* return when we've entered the state we want */
   1885         1.1  augustss 		if (run == running) {
   1886         1.1  augustss 			splx(s);
   1887        1.30  augustss 			DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
   1888        1.30  augustss 				 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
   1889        1.16  augustss 			return (USBD_NORMAL_COMPLETION);
   1890         1.1  augustss 		}
   1891        1.20  augustss 		usb_delay_ms(&sc->sc_bus, 1);
   1892         1.1  augustss 	}
   1893         1.1  augustss 	splx(s);
   1894        1.13  augustss 	printf("%s: cannot %s\n", USBDEVNAME(sc->sc_bus.bdev),
   1895        1.14  augustss 	       run ? "start" : "stop");
   1896        1.16  augustss 	return (USBD_IOERROR);
   1897         1.1  augustss }
   1898         1.1  augustss 
   1899         1.1  augustss /*
   1900         1.1  augustss  * Memory management routines.
   1901         1.1  augustss  *  uhci_alloc_std allocates TDs
   1902         1.1  augustss  *  uhci_alloc_sqh allocates QHs
   1903         1.7  augustss  * These two routines do their own free list management,
   1904         1.1  augustss  * partly for speed, partly because allocating DMAable memory
   1905         1.1  augustss  * has page size granularaity so much memory would be wasted if
   1906        1.16  augustss  * only one TD/QH (32 bytes) was placed in each allocated chunk.
   1907         1.1  augustss  */
   1908         1.1  augustss 
   1909  1.208.12.1     itohy Static usbd_status
   1910  1.208.12.1     itohy uhci_grow_std(uhci_softc_t *sc)
   1911         1.1  augustss {
   1912  1.208.12.1     itohy 	usb_dma_t dma;
   1913  1.208.12.1     itohy 	struct uhci_mem_desc *um;
   1914         1.1  augustss 	uhci_soft_td_t *std;
   1915        1.63  augustss 	usbd_status err;
   1916        1.42  augustss 	int i, offs;
   1917  1.208.12.1     itohy 	int s;
   1918         1.1  augustss 
   1919  1.208.12.1     itohy 	DPRINTFN(2,("uhci_grow_std: allocating chunk\n"));
   1920  1.208.12.1     itohy 	err = usb_allocmem(&sc->sc_dmatag,
   1921  1.208.12.1     itohy 	    UHCI_STD_SIZE*UHCI_STD_CHUNK + sizeof(struct uhci_mem_desc),
   1922  1.208.12.1     itohy 	    UHCI_TD_ALIGN, &dma);
   1923  1.208.12.1     itohy 	if (err)
   1924  1.208.12.1     itohy 		return (err);
   1925  1.208.12.1     itohy 	um = KERNADDR(&dma, UHCI_STD_SIZE * UHCI_STD_CHUNK);
   1926  1.208.12.1     itohy 	um->um_top = KERNADDR(&dma, 0);
   1927  1.208.12.1     itohy 	um->um_topdma = DMAADDR(&dma, 0);
   1928  1.208.12.1     itohy 	um->um_dma = dma;
   1929  1.208.12.1     itohy 	s = splusb();
   1930  1.208.12.1     itohy 	SIMPLEQ_INSERT_HEAD(&sc->sc_std_chunks, um, um_next);
   1931  1.208.12.1     itohy 	for(i = 0; i < UHCI_STD_CHUNK; i++) {
   1932  1.208.12.1     itohy 		offs = i * UHCI_STD_SIZE;
   1933  1.208.12.1     itohy 		std = KERNADDR(&dma, offs);
   1934  1.208.12.1     itohy 		std->ut_mdesc = um;
   1935  1.208.12.1     itohy 		std->link.std = sc->sc_freetds;
   1936  1.208.12.6     itohy 		std->ad.aux_len = 0;
   1937  1.208.12.1     itohy 		sc->sc_freetds = std;
   1938  1.208.12.1     itohy 		sc->sc_nfreetds++;
   1939         1.1  augustss 	}
   1940  1.208.12.1     itohy 	splx(s);
   1941  1.208.12.1     itohy 
   1942  1.208.12.1     itohy 	return (USBD_NORMAL_COMPLETION);
   1943  1.208.12.1     itohy }
   1944  1.208.12.1     itohy 
   1945  1.208.12.1     itohy uhci_soft_td_t *
   1946  1.208.12.1     itohy uhci_alloc_std(uhci_softc_t *sc)
   1947  1.208.12.1     itohy {
   1948  1.208.12.1     itohy 	uhci_soft_td_t *std;
   1949  1.208.12.1     itohy 	int s;
   1950  1.208.12.1     itohy 
   1951  1.208.12.1     itohy #ifdef DIAGNOSTIC
   1952  1.208.12.1     itohy 	if (sc->sc_freetds == NULL)
   1953  1.208.12.1     itohy 		panic("uhci_alloc_std: %d", sc->sc_nfreetds);
   1954  1.208.12.1     itohy #endif
   1955  1.208.12.1     itohy 	s = splusb();
   1956         1.1  augustss 	std = sc->sc_freetds;
   1957        1.42  augustss 	sc->sc_freetds = std->link.std;
   1958  1.208.12.1     itohy 	splx(s);
   1959        1.42  augustss 	memset(&std->td, 0, sizeof(uhci_td_t));
   1960         1.1  augustss 	return std;
   1961         1.1  augustss }
   1962         1.1  augustss 
   1963  1.208.12.1     itohy Static uhci_soft_td_t *
   1964  1.208.12.1     itohy uhci_alloc_std_norsv(uhci_softc_t *sc)
   1965  1.208.12.1     itohy {
   1966  1.208.12.1     itohy 	int s;
   1967  1.208.12.1     itohy 
   1968  1.208.12.1     itohy 	s = splusb();
   1969  1.208.12.1     itohy 	if (sc->sc_nfreetds < 1)
   1970  1.208.12.1     itohy 		if (uhci_grow_std(sc))
   1971  1.208.12.1     itohy 			return (NULL);
   1972  1.208.12.1     itohy 	sc->sc_nfreetds--;
   1973  1.208.12.1     itohy 	splx(s);
   1974  1.208.12.1     itohy 	return (uhci_alloc_std(sc));
   1975  1.208.12.1     itohy }
   1976  1.208.12.1     itohy 
   1977         1.1  augustss void
   1978       1.119  augustss uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std)
   1979         1.1  augustss {
   1980  1.208.12.1     itohy 	int s;
   1981  1.208.12.1     itohy 
   1982         1.7  augustss #ifdef DIAGNOSTIC
   1983         1.7  augustss #define TD_IS_FREE 0x12345678
   1984        1.88   tsutsui 	if (le32toh(std->td.td_token) == TD_IS_FREE) {
   1985         1.7  augustss 		printf("uhci_free_std: freeing free TD %p\n", std);
   1986         1.7  augustss 		return;
   1987         1.7  augustss 	}
   1988        1.88   tsutsui 	std->td.td_token = htole32(TD_IS_FREE);
   1989         1.7  augustss #endif
   1990  1.208.12.1     itohy 	s = splusb();
   1991        1.42  augustss 	std->link.std = sc->sc_freetds;
   1992         1.1  augustss 	sc->sc_freetds = std;
   1993  1.208.12.1     itohy 	splx(s);
   1994  1.208.12.1     itohy }
   1995  1.208.12.1     itohy 
   1996  1.208.12.1     itohy Static void
   1997  1.208.12.1     itohy uhci_free_std_norsv(uhci_softc_t *sc, uhci_soft_td_t *std)
   1998  1.208.12.1     itohy {
   1999  1.208.12.1     itohy 	int s;
   2000  1.208.12.1     itohy 
   2001  1.208.12.1     itohy 	s = splusb();
   2002  1.208.12.1     itohy 	uhci_free_std(sc, std);
   2003  1.208.12.1     itohy 	sc->sc_nfreetds++;
   2004  1.208.12.1     itohy 	splx(s);
   2005         1.1  augustss }
   2006         1.1  augustss 
   2007         1.1  augustss uhci_soft_qh_t *
   2008       1.119  augustss uhci_alloc_sqh(uhci_softc_t *sc)
   2009         1.1  augustss {
   2010         1.1  augustss 	uhci_soft_qh_t *sqh;
   2011        1.63  augustss 	usbd_status err;
   2012         1.1  augustss 	int i, offs;
   2013         1.7  augustss 	usb_dma_t dma;
   2014  1.208.12.1     itohy 	struct uhci_mem_desc *um;
   2015         1.1  augustss 
   2016        1.63  augustss 	if (sc->sc_freeqhs == NULL) {
   2017         1.1  augustss 		DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
   2018  1.208.12.1     itohy 		err = usb_allocmem(&sc->sc_dmatag,
   2019  1.208.12.1     itohy 		    UHCI_SQH_SIZE*UHCI_SQH_CHUNK + sizeof(struct uhci_mem_desc),
   2020  1.208.12.1     itohy 		    UHCI_QH_ALIGN, &dma);
   2021        1.63  augustss 		if (err)
   2022        1.63  augustss 			return (0);
   2023  1.208.12.1     itohy 		um = KERNADDR(&dma, UHCI_SQH_SIZE * UHCI_SQH_CHUNK);
   2024  1.208.12.1     itohy 		um->um_top = KERNADDR(&dma, 0);
   2025  1.208.12.1     itohy 		um->um_topdma = DMAADDR(&dma, 0);
   2026  1.208.12.1     itohy 		um->um_dma = dma;
   2027  1.208.12.1     itohy 		SIMPLEQ_INSERT_HEAD(&sc->sc_sqh_chunks, um, um_next);
   2028        1.43  augustss 		for(i = 0; i < UHCI_SQH_CHUNK; i++) {
   2029        1.42  augustss 			offs = i * UHCI_SQH_SIZE;
   2030       1.159  augustss 			sqh = KERNADDR(&dma, offs);
   2031  1.208.12.1     itohy 			sqh->uq_mdesc = um;
   2032        1.42  augustss 			sqh->hlink = sc->sc_freeqhs;
   2033         1.1  augustss 			sc->sc_freeqhs = sqh;
   2034         1.1  augustss 		}
   2035         1.1  augustss 	}
   2036         1.1  augustss 	sqh = sc->sc_freeqhs;
   2037        1.42  augustss 	sc->sc_freeqhs = sqh->hlink;
   2038        1.42  augustss 	memset(&sqh->qh, 0, sizeof(uhci_qh_t));
   2039        1.16  augustss 	return (sqh);
   2040         1.1  augustss }
   2041         1.1  augustss 
   2042         1.1  augustss void
   2043       1.119  augustss uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   2044         1.1  augustss {
   2045        1.42  augustss 	sqh->hlink = sc->sc_freeqhs;
   2046         1.1  augustss 	sc->sc_freeqhs = sqh;
   2047         1.1  augustss }
   2048         1.1  augustss 
   2049  1.208.12.1     itohy Static void
   2050  1.208.12.1     itohy uhci_free_desc_chunks(uhci_softc_t *sc, struct uhci_mdescs *c)
   2051  1.208.12.1     itohy {
   2052  1.208.12.1     itohy 	struct uhci_mem_desc *um;
   2053  1.208.12.1     itohy 
   2054  1.208.12.1     itohy 	while ((um = SIMPLEQ_FIRST(c)) != NULL) {
   2055  1.208.12.1     itohy 		SIMPLEQ_REMOVE_HEAD(c, um_next);
   2056  1.208.12.1     itohy 		usb_freemem(&sc->sc_dmatag, &um->um_dma);
   2057  1.208.12.1     itohy 	}
   2058  1.208.12.1     itohy }
   2059  1.208.12.1     itohy 
   2060         1.1  augustss void
   2061       1.119  augustss uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std,
   2062       1.119  augustss 		    uhci_soft_td_t *stdend)
   2063         1.1  augustss {
   2064         1.1  augustss 	uhci_soft_td_t *p;
   2065         1.1  augustss 
   2066         1.1  augustss 	for (; std != stdend; std = p) {
   2067        1.42  augustss 		p = std->link.std;
   2068         1.1  augustss 		uhci_free_std(sc, std);
   2069         1.1  augustss 	}
   2070         1.1  augustss }
   2071         1.1  augustss 
   2072         1.1  augustss usbd_status
   2073       1.119  augustss uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len,
   2074  1.208.12.1     itohy 		     int rd, u_int16_t flags, usbd_xfer_handle xfer,
   2075       1.119  augustss 		     uhci_soft_td_t **sp, uhci_soft_td_t **ep)
   2076         1.1  augustss {
   2077  1.208.12.1     itohy 	struct usb_buffer_dma *ub = &UXFER(xfer)->dmabuf;
   2078  1.208.12.1     itohy 	uhci_soft_td_t *p, *prevp, *startp;
   2079  1.208.12.1     itohy 	int i, ntd, l, tog, maxp, seg, segoff;
   2080        1.18  augustss 	u_int32_t status;
   2081         1.1  augustss 	int addr = upipe->pipe.device->address;
   2082         1.1  augustss 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2083  1.208.12.1     itohy 	bus_dma_segment_t *segs = USB_BUFFER_SEGS(ub);
   2084  1.208.12.6     itohy 	union usb_bufptr bufptr;
   2085  1.208.12.2     itohy 	int is_mbuf;
   2086  1.208.12.6     itohy 	bus_addr_t auxdma;
   2087         1.1  augustss 
   2088       1.144  augustss 	DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d "
   2089       1.152  augustss 		      "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len,
   2090       1.144  augustss 		      upipe->pipe.device->speed, flags));
   2091  1.208.12.1     itohy 	maxp = UE_MAXPKTSZ(upipe->pipe.endpoint->edesc);
   2092         1.1  augustss 	if (maxp == 0) {
   2093         1.1  augustss 		printf("uhci_alloc_std_chain: maxp=0\n");
   2094         1.1  augustss 		return (USBD_INVAL);
   2095         1.1  augustss 	}
   2096         1.1  augustss 	ntd = (len + maxp - 1) / maxp;
   2097  1.208.12.1     itohy 	if (len == 0)
   2098  1.208.12.1     itohy 		flags |= USBD_FORCE_SHORT_XFER;
   2099        1.73  augustss 	if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0)
   2100        1.73  augustss 		ntd++;
   2101        1.39  augustss 	DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd));
   2102  1.208.12.1     itohy 	USB_KASSERT2(ntd > 0, ("uhci_alloc_std_chain: ntd=0"));
   2103        1.38  augustss 	tog = upipe->nexttoggle;
   2104  1.208.12.1     itohy 	prevp = NULL;
   2105  1.208.12.1     itohy 	startp = NULL;
   2106        1.33  augustss 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
   2107       1.144  augustss 	if (upipe->pipe.device->speed == USB_SPEED_LOW)
   2108        1.18  augustss 		status |= UHCI_TD_LS;
   2109        1.73  augustss 	if (flags & USBD_SHORT_XFER_OK)
   2110        1.18  augustss 		status |= UHCI_TD_SPD;
   2111  1.208.12.6     itohy 	usb_bufptr_init(&bufptr, xfer);
   2112  1.208.12.6     itohy 	is_mbuf = (xfer->rqflags & URQ_DEV_MAP_MBUF) != 0;
   2113  1.208.12.1     itohy 	seg = 0;
   2114  1.208.12.1     itohy 	segoff = 0;
   2115  1.208.12.1     itohy 	for (i = 0; i < ntd; i++) {
   2116         1.1  augustss 		p = uhci_alloc_std(sc);
   2117        1.63  augustss 		if (p == NULL) {
   2118  1.208.12.1     itohy 			uhci_free_std_chain(sc, startp, NULL);
   2119         1.1  augustss 			return (USBD_NOMEM);
   2120         1.1  augustss 		}
   2121  1.208.12.1     itohy 		p->link.std = NULL;
   2122  1.208.12.1     itohy 		if (prevp != NULL) {
   2123  1.208.12.1     itohy 			prevp->link.std = p;
   2124  1.208.12.1     itohy 			prevp->td.td_link =
   2125  1.208.12.1     itohy 			    htole32(UHCI_STD_DMAADDR(p) | UHCI_PTR_VF |
   2126  1.208.12.1     itohy 			    UHCI_PTR_TD);
   2127  1.208.12.1     itohy 			UHCI_STD_SYNC(sc, prevp,
   2128  1.208.12.1     itohy 			    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
   2129  1.208.12.1     itohy 		} else {
   2130  1.208.12.1     itohy 			startp = p;
   2131  1.208.12.1     itohy 		}
   2132        1.88   tsutsui 		p->td.td_status = htole32(status);
   2133  1.208.12.1     itohy 		if (i == ntd - 1) {
   2134         1.1  augustss 			/* last TD */
   2135         1.1  augustss 			l = len % maxp;
   2136        1.73  augustss 			if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER))
   2137        1.73  augustss 				l = maxp;
   2138         1.1  augustss 			*ep = p;
   2139         1.1  augustss 		} else
   2140         1.1  augustss 			l = maxp;
   2141       1.152  augustss 		p->td.td_token =
   2142        1.88   tsutsui 		    htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) :
   2143        1.88   tsutsui 				 UHCI_TD_OUT(l, endpt, addr, tog));
   2144  1.208.12.1     itohy 
   2145  1.208.12.2     itohy 		if (i)
   2146  1.208.12.6     itohy 			usb_bufptr_advance(&bufptr, maxp, is_mbuf);
   2147  1.208.12.2     itohy 
   2148  1.208.12.1     itohy 		USB_KASSERT2(seg < USB_BUFFER_NSEGS(ub) || l == 0,
   2149  1.208.12.1     itohy 		    ("uhci_alloc_std_chain: too few segments"));
   2150  1.208.12.1     itohy 		if (l == 0) {
   2151  1.208.12.1     itohy 			p->td.td_buffer = 0;
   2152  1.208.12.1     itohy 		} else if (l > segs[seg].ds_len - segoff) {
   2153  1.208.12.1     itohy 			/* UHCI can't handle non-contiguous data. */
   2154  1.208.12.6     itohy 			auxdma = uhci_aux_dma_alloc(&p->ad, &UXFER(xfer)->aux,
   2155  1.208.12.6     itohy 			    &bufptr, l);
   2156  1.208.12.1     itohy 
   2157  1.208.12.1     itohy 			/* prepare aux DMA */
   2158  1.208.12.6     itohy 			uhci_aux_dma_prepare(&p->ad, is_mbuf, rd);
   2159  1.208.12.6     itohy 			p->td.td_buffer = htole32(auxdma);
   2160  1.208.12.1     itohy 
   2161  1.208.12.3     itohy 			/* skip handled segments */
   2162  1.208.12.3     itohy 			l += segoff;
   2163  1.208.12.3     itohy 			do {
   2164  1.208.12.3     itohy 				l -= segs[seg].ds_len;
   2165  1.208.12.3     itohy 				seg++;
   2166  1.208.12.3     itohy 				USB_KASSERT2(seg < USB_BUFFER_NSEGS(ub),
   2167  1.208.12.3     itohy 				    ("uhci_alloc_std_chain: too few segments 2"));
   2168  1.208.12.3     itohy 			} while (l > segs[seg].ds_len);
   2169  1.208.12.1     itohy 			segoff = 0;
   2170  1.208.12.1     itohy 		} else {
   2171  1.208.12.1     itohy 			p->td.td_buffer = htole32(segs[seg].ds_addr +
   2172  1.208.12.1     itohy 			    segoff);
   2173  1.208.12.1     itohy 		}
   2174  1.208.12.1     itohy 		segoff += l;
   2175  1.208.12.1     itohy 		if (l > 0 && segoff >= segs[seg].ds_len) {
   2176  1.208.12.1     itohy 			USB_KASSERT2(segoff == segs[seg].ds_len,
   2177  1.208.12.1     itohy 			    ("uhci_alloc_std_chain: overlap"));
   2178  1.208.12.1     itohy 			if (i * maxp + l != len) {
   2179  1.208.12.1     itohy 				seg++;
   2180  1.208.12.1     itohy 				segoff = 0;
   2181  1.208.12.1     itohy 			}
   2182  1.208.12.1     itohy 		}
   2183  1.208.12.1     itohy 		prevp = p;
   2184         1.1  augustss 		tog ^= 1;
   2185         1.1  augustss 	}
   2186  1.208.12.1     itohy 	prevp->td.td_link = htole32(UHCI_PTR_T | UHCI_PTR_VF | UHCI_PTR_TD);
   2187  1.208.12.1     itohy 	upipe->nexttoggle = tog;
   2188  1.208.12.1     itohy 	*sp = startp;
   2189  1.208.12.1     itohy 	uhci_aux_dma_sync(sc, &UXFER(xfer)->aux,
   2190  1.208.12.1     itohy 	    rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   2191       1.152  augustss 	DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n",
   2192        1.38  augustss 		      upipe->nexttoggle));
   2193         1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   2194         1.1  augustss }
   2195         1.1  augustss 
   2196  1.208.12.1     itohy /*
   2197  1.208.12.1     itohy  * Allocate a physically contiguous buffer to handle cases where UHCI
   2198  1.208.12.1     itohy  * cannot handle a packet because it is not physically contiguous.
   2199  1.208.12.1     itohy  */
   2200  1.208.12.1     itohy Static void
   2201  1.208.12.1     itohy uhci_aux_mem_init(struct uhci_aux_mem *aux)
   2202  1.208.12.1     itohy {
   2203  1.208.12.1     itohy 
   2204  1.208.12.1     itohy 	aux->aux_curchunk = aux->aux_chunkoff = aux->aux_naux = 0;
   2205  1.208.12.1     itohy }
   2206  1.208.12.1     itohy 
   2207  1.208.12.1     itohy Static usbd_status
   2208  1.208.12.1     itohy uhci_aux_mem_alloc(uhci_softc_t *sc, struct uhci_aux_mem *aux,
   2209  1.208.12.1     itohy 	int naux, int maxp)
   2210  1.208.12.1     itohy {
   2211  1.208.12.1     itohy 	int nchunk, i, j;
   2212  1.208.12.1     itohy 	usbd_status err;
   2213  1.208.12.1     itohy 
   2214  1.208.12.1     itohy 	USB_KASSERT(aux->aux_nchunk == 0);
   2215  1.208.12.1     itohy 
   2216  1.208.12.1     itohy 	nchunk = UHCI_NCHUNK(naux, maxp);
   2217  1.208.12.1     itohy 	for (i = 0; i < nchunk; i++) {
   2218  1.208.12.1     itohy 		err = usb_allocmem(&sc->sc_dmatag, UHCI_AUX_CHUNK_SIZE,
   2219  1.208.12.1     itohy 		    UHCI_AUX_CHUNK_SIZE, &aux->aux_chunk_dma[i]);
   2220  1.208.12.1     itohy 		if (err) {
   2221  1.208.12.1     itohy 			for (j = 0; j < i; j++)
   2222  1.208.12.1     itohy 				usb_freemem(&sc->sc_dmatag,
   2223  1.208.12.1     itohy 				    &aux->aux_chunk_dma[j]);
   2224  1.208.12.1     itohy 			return (err);
   2225  1.208.12.1     itohy 		}
   2226  1.208.12.1     itohy 	}
   2227  1.208.12.1     itohy 
   2228  1.208.12.1     itohy 	aux->aux_nchunk = nchunk;
   2229  1.208.12.1     itohy 	uhci_aux_mem_init(aux);
   2230  1.208.12.1     itohy 
   2231  1.208.12.1     itohy 	return (USBD_NORMAL_COMPLETION);
   2232  1.208.12.1     itohy }
   2233  1.208.12.1     itohy 
   2234  1.208.12.1     itohy Static void
   2235  1.208.12.1     itohy uhci_aux_mem_free(uhci_softc_t *sc, struct uhci_aux_mem *aux)
   2236  1.208.12.1     itohy {
   2237  1.208.12.1     itohy 	int i;
   2238  1.208.12.1     itohy 
   2239  1.208.12.1     itohy 	for (i = 0; i < aux->aux_nchunk; i++)
   2240  1.208.12.1     itohy 		usb_freemem(&sc->sc_dmatag, &aux->aux_chunk_dma[i]);
   2241  1.208.12.1     itohy 
   2242  1.208.12.1     itohy 	aux->aux_nchunk = 0;
   2243  1.208.12.1     itohy }
   2244  1.208.12.1     itohy 
   2245  1.208.12.6     itohy Static bus_addr_t
   2246  1.208.12.6     itohy uhci_aux_dma_alloc(struct usb_aux_desc *ad, struct uhci_aux_mem *aux,
   2247  1.208.12.6     itohy 	const union usb_bufptr *bufptr, int len)
   2248  1.208.12.1     itohy {
   2249  1.208.12.6     itohy 	bus_addr_t auxdma;
   2250  1.208.12.1     itohy 
   2251  1.208.12.1     itohy 	if (aux->aux_chunkoff + len > UHCI_AUX_CHUNK_SIZE) {
   2252  1.208.12.1     itohy 		aux->aux_curchunk++;
   2253  1.208.12.1     itohy 		aux->aux_chunkoff = 0;
   2254  1.208.12.1     itohy 	}
   2255  1.208.12.1     itohy 	USB_KASSERT(aux->aux_curchunk < aux->aux_nchunk);
   2256  1.208.12.1     itohy 
   2257  1.208.12.6     itohy 	auxdma =
   2258  1.208.12.1     itohy 	    DMAADDR(&aux->aux_chunk_dma[aux->aux_curchunk], aux->aux_chunkoff);
   2259  1.208.12.6     itohy 	ad->aux_kern =
   2260  1.208.12.1     itohy 	    KERNADDR(&aux->aux_chunk_dma[aux->aux_curchunk], aux->aux_chunkoff);
   2261  1.208.12.6     itohy 	ad->aux_ptr = *bufptr;
   2262  1.208.12.6     itohy 	ad->aux_len = len;
   2263  1.208.12.1     itohy 
   2264  1.208.12.4     itohy 	aux->aux_chunkoff += len;
   2265  1.208.12.1     itohy 	aux->aux_naux++;
   2266  1.208.12.6     itohy 
   2267  1.208.12.6     itohy 	return auxdma;
   2268  1.208.12.1     itohy }
   2269  1.208.12.1     itohy 
   2270  1.208.12.2     itohy Static void
   2271  1.208.12.6     itohy uhci_aux_dma_prepare(struct usb_aux_desc *ad, int is_mbuf, int isread)
   2272  1.208.12.1     itohy {
   2273  1.208.12.2     itohy 
   2274  1.208.12.1     itohy 	if (!isread) {
   2275  1.208.12.6     itohy 		usb_bufptr_wr(&ad->aux_ptr, ad->aux_kern, ad->aux_len,
   2276  1.208.12.2     itohy 		    is_mbuf);
   2277  1.208.12.1     itohy 	}
   2278  1.208.12.1     itohy }
   2279  1.208.12.1     itohy 
   2280  1.208.12.1     itohy Static void
   2281  1.208.12.6     itohy uhci_aux_dma_complete(struct usb_aux_desc *ad, struct uhci_aux_mem *aux,
   2282  1.208.12.2     itohy 	int is_mbuf, int isread)
   2283  1.208.12.1     itohy {
   2284  1.208.12.1     itohy 
   2285  1.208.12.1     itohy 	if (isread) {
   2286  1.208.12.6     itohy 		usb_bufptr_rd(&ad->aux_ptr, ad->aux_kern, ad->aux_len,
   2287  1.208.12.2     itohy 		    is_mbuf);
   2288  1.208.12.1     itohy 	}
   2289  1.208.12.6     itohy 	ad->aux_len = 0;
   2290  1.208.12.4     itohy 	USB_KASSERT(aux->aux_naux > 0);
   2291  1.208.12.1     itohy 	if (--aux->aux_naux == 0)
   2292  1.208.12.1     itohy 		uhci_aux_mem_init(aux);
   2293  1.208.12.1     itohy }
   2294  1.208.12.1     itohy 
   2295  1.208.12.1     itohy Static void
   2296  1.208.12.1     itohy uhci_aux_dma_sync(uhci_softc_t *sc, struct uhci_aux_mem *aux, int op)
   2297  1.208.12.1     itohy {
   2298  1.208.12.6     itohy 	int i;
   2299  1.208.12.1     itohy 
   2300  1.208.12.6     itohy 	for (i = 0; i < aux->aux_curchunk; i++)
   2301  1.208.12.1     itohy 		USB_MEM_SYNC(&sc->sc_dmatag, &aux->aux_chunk_dma[i], op);
   2302  1.208.12.6     itohy 	if (aux->aux_chunkoff)
   2303  1.208.12.6     itohy 		USB_MEM_SYNC2(&sc->sc_dmatag, &aux->aux_chunk_dma[i],
   2304  1.208.12.6     itohy 		    0, aux->aux_chunkoff, op);
   2305  1.208.12.1     itohy }
   2306  1.208.12.1     itohy 
   2307        1.38  augustss void
   2308       1.119  augustss uhci_device_clear_toggle(usbd_pipe_handle pipe)
   2309        1.38  augustss {
   2310        1.38  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2311        1.38  augustss 	upipe->nexttoggle = 0;
   2312        1.38  augustss }
   2313        1.38  augustss 
   2314        1.38  augustss void
   2315       1.205  christos uhci_noop(usbd_pipe_handle pipe)
   2316        1.38  augustss {
   2317        1.38  augustss }
   2318        1.38  augustss 
   2319         1.1  augustss usbd_status
   2320       1.119  augustss uhci_device_bulk_transfer(usbd_xfer_handle xfer)
   2321         1.1  augustss {
   2322  1.208.12.1     itohy 	uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
   2323        1.63  augustss 	usbd_status err;
   2324        1.16  augustss 
   2325        1.52  augustss 	/* Insert last in queue. */
   2326  1.208.12.1     itohy 	err = usb_insert_transfer_dma(xfer, &sc->sc_dmatag,
   2327  1.208.12.1     itohy 	    &UXFER(xfer)->dmabuf);
   2328        1.63  augustss 	if (err)
   2329        1.63  augustss 		return (err);
   2330        1.52  augustss 
   2331       1.152  augustss 	/*
   2332        1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2333        1.92  augustss 	 * so start it first.
   2334        1.67  augustss 	 */
   2335        1.63  augustss 	return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2336        1.16  augustss }
   2337        1.16  augustss 
   2338        1.16  augustss usbd_status
   2339       1.119  augustss uhci_device_bulk_start(usbd_xfer_handle xfer)
   2340        1.16  augustss {
   2341        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2342         1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2343         1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   2344        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2345        1.55  augustss 	uhci_soft_td_t *data, *dataend;
   2346         1.1  augustss 	uhci_soft_qh_t *sqh;
   2347        1.63  augustss 	usbd_status err;
   2348        1.45  augustss 	int len, isread, endpt;
   2349         1.1  augustss 	int s;
   2350         1.1  augustss 
   2351       1.169  augustss 	DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n",
   2352       1.169  augustss 		     xfer, xfer->length, xfer->flags, ii));
   2353         1.1  augustss 
   2354        1.82  augustss 	if (sc->sc_dying)
   2355        1.82  augustss 		return (USBD_IOERROR);
   2356        1.82  augustss 
   2357        1.48  augustss #ifdef DIAGNOSTIC
   2358        1.63  augustss 	if (xfer->rqflags & URQ_REQUEST)
   2359       1.163    provos 		panic("uhci_device_bulk_transfer: a request");
   2360        1.48  augustss #endif
   2361         1.1  augustss 
   2362        1.63  augustss 	len = xfer->length;
   2363       1.102  augustss 	endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2364        1.45  augustss 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2365         1.1  augustss 	sqh = upipe->u.bulk.sqh;
   2366         1.1  augustss 
   2367         1.1  augustss 	upipe->u.bulk.isread = isread;
   2368         1.1  augustss 	upipe->u.bulk.length = len;
   2369         1.1  augustss 
   2370  1.208.12.1     itohy 	err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, xfer,
   2371  1.208.12.1     itohy 	    &data, &dataend);
   2372        1.63  augustss 	if (err)
   2373        1.63  augustss 		return (err);
   2374        1.88   tsutsui 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2375  1.208.12.1     itohy 	UHCI_STD_SYNC(sc, dataend,
   2376  1.208.12.1     itohy 	    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   2377         1.1  augustss 
   2378  1.208.12.1     itohy #ifdef USB_DEBUG
   2379        1.33  augustss 	if (uhcidebug > 8) {
   2380        1.55  augustss 		DPRINTF(("uhci_device_bulk_transfer: data(1)\n"));
   2381        1.55  augustss 		uhci_dump_tds(data);
   2382         1.1  augustss 	}
   2383         1.1  augustss #endif
   2384         1.1  augustss 
   2385         1.1  augustss 	/* Set up interrupt info. */
   2386        1.63  augustss 	ii->xfer = xfer;
   2387        1.55  augustss 	ii->stdstart = data;
   2388        1.55  augustss 	ii->stdend = dataend;
   2389         1.7  augustss #ifdef DIAGNOSTIC
   2390        1.70  augustss 	if (!ii->isdone) {
   2391        1.70  augustss 		printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii);
   2392        1.70  augustss 	}
   2393         1.7  augustss 	ii->isdone = 0;
   2394         1.7  augustss #endif
   2395         1.1  augustss 
   2396        1.55  augustss 	sqh->elink = data;
   2397  1.208.12.1     itohy 	sqh->qh.qh_elink = htole32(UHCI_STD_DMAADDR(data) | UHCI_PTR_TD);
   2398         1.1  augustss 
   2399         1.1  augustss 	s = splusb();
   2400         1.1  augustss 	uhci_add_bulk(sc, sqh);
   2401        1.92  augustss 	uhci_add_intr_info(sc, ii);
   2402         1.1  augustss 
   2403        1.63  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   2404  1.208.12.1     itohy 		usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
   2405        1.91  augustss 			    uhci_timeout, ii);
   2406        1.13  augustss 	}
   2407        1.92  augustss 	xfer->status = USBD_IN_PROGRESS;
   2408         1.1  augustss 	splx(s);
   2409         1.1  augustss 
   2410  1.208.12.1     itohy #ifdef USB_DEBUG
   2411         1.1  augustss 	if (uhcidebug > 10) {
   2412        1.55  augustss 		DPRINTF(("uhci_device_bulk_transfer: data(2)\n"));
   2413        1.55  augustss 		uhci_dump_tds(data);
   2414         1.1  augustss 	}
   2415         1.1  augustss #endif
   2416         1.1  augustss 
   2417        1.26  augustss 	if (sc->sc_bus.use_polling)
   2418        1.63  augustss 		uhci_waitintr(sc, xfer);
   2419        1.26  augustss 
   2420         1.1  augustss 	return (USBD_IN_PROGRESS);
   2421         1.1  augustss }
   2422         1.1  augustss 
   2423         1.1  augustss /* Abort a device bulk request. */
   2424         1.1  augustss void
   2425       1.119  augustss uhci_device_bulk_abort(usbd_xfer_handle xfer)
   2426         1.1  augustss {
   2427        1.33  augustss 	DPRINTF(("uhci_device_bulk_abort:\n"));
   2428        1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2429        1.33  augustss }
   2430        1.33  augustss 
   2431        1.92  augustss /*
   2432       1.154  augustss  * Abort a device request.
   2433       1.154  augustss  * If this routine is called at splusb() it guarantees that the request
   2434       1.154  augustss  * will be removed from the hardware scheduling and that the callback
   2435       1.154  augustss  * for it will be called with USBD_CANCELLED status.
   2436       1.154  augustss  * It's impossible to guarantee that the requested transfer will not
   2437       1.154  augustss  * have happened since the hardware runs concurrently.
   2438       1.154  augustss  * If the transaction has already happened we rely on the ordinary
   2439       1.154  augustss  * interrupt processing to process it.
   2440        1.92  augustss  */
   2441        1.33  augustss void
   2442       1.119  augustss uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
   2443        1.33  augustss {
   2444  1.208.12.1     itohy 	struct uhci_xfer *uxfer = UXFER(xfer);
   2445  1.208.12.1     itohy 	uhci_intr_info_t *ii = &uxfer->iinfo;
   2446       1.153  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2447       1.153  augustss 	uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
   2448        1.33  augustss 	uhci_soft_td_t *std;
   2449        1.92  augustss 	int s;
   2450       1.188  augustss 	int wake;
   2451        1.65  augustss 
   2452       1.106  augustss 	DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status));
   2453        1.33  augustss 
   2454       1.153  augustss 	if (sc->sc_dying) {
   2455       1.153  augustss 		/* If we're dying, just do the software part. */
   2456       1.153  augustss 		s = splusb();
   2457       1.153  augustss 		xfer->status = status;	/* make software ignore it */
   2458       1.157   tsutsui 		usb_uncallout(xfer->timeout_handle, uhci_timeout, xfer);
   2459  1.208.12.1     itohy 		usb_rem_task(xfer->pipe->device, &UXFER(xfer)->abort_task);
   2460  1.208.12.1     itohy 		uhci_transfer_complete(xfer);
   2461        1.92  augustss 		splx(s);
   2462       1.194  christos 		return;
   2463        1.92  augustss 	}
   2464        1.92  augustss 
   2465       1.153  augustss 	if (xfer->device->bus->intr_context || !curproc)
   2466       1.163    provos 		panic("uhci_abort_xfer: not in process context");
   2467       1.153  augustss 
   2468       1.153  augustss 	/*
   2469       1.188  augustss 	 * If an abort is already in progress then just wait for it to
   2470       1.188  augustss 	 * complete and return.
   2471       1.188  augustss 	 */
   2472  1.208.12.1     itohy 	if (uxfer->uhci_xfer_flags & UHCI_XFER_ABORTING) {
   2473       1.188  augustss 		DPRINTFN(2, ("uhci_abort_xfer: already aborting\n"));
   2474  1.208.12.1     itohy 		/* No need to wait if we're aborting from a timeout. */
   2475  1.208.12.1     itohy 		if (status == USBD_TIMEOUT) {
   2476       1.188  augustss #ifdef DIAGNOSTIC
   2477       1.188  augustss 			printf("uhci_abort_xfer: TIMEOUT while aborting\n");
   2478       1.188  augustss #endif
   2479  1.208.12.1     itohy 			return;
   2480  1.208.12.1     itohy 		}
   2481       1.188  augustss 		/* Override the status which might be USBD_TIMEOUT. */
   2482       1.188  augustss 		xfer->status = status;
   2483       1.188  augustss 		DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n"));
   2484  1.208.12.1     itohy 		uxfer->uhci_xfer_flags |= UHCI_XFER_ABORTWAIT;
   2485  1.208.12.1     itohy 		while (uxfer->uhci_xfer_flags & UHCI_XFER_ABORTING)
   2486  1.208.12.1     itohy 			tsleep(&uxfer->uhci_xfer_flags, PZERO, "uhciaw", 0);
   2487       1.188  augustss 		return;
   2488       1.188  augustss 	}
   2489       1.188  augustss 
   2490       1.188  augustss 	/*
   2491       1.153  augustss 	 * Step 1: Make interrupt routine and hardware ignore xfer.
   2492       1.153  augustss 	 */
   2493       1.153  augustss 	s = splusb();
   2494  1.208.12.1     itohy 	uxfer->uhci_xfer_flags |= UHCI_XFER_ABORTING;
   2495       1.153  augustss 	xfer->status = status;	/* make software ignore it */
   2496       1.106  augustss 	usb_uncallout(xfer->timeout_handle, uhci_timeout, ii);
   2497  1.208.12.1     itohy 	usb_rem_task(xfer->pipe->device, &UXFER(xfer)->abort_task);
   2498       1.153  augustss 	DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii));
   2499  1.208.12.1     itohy 	for (std = ii->stdstart; std != NULL; std = std->link.std) {
   2500  1.208.12.1     itohy 		UHCI_STD_SYNC(sc, std,
   2501  1.208.12.1     itohy 		    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
   2502        1.92  augustss 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
   2503  1.208.12.1     itohy 		UHCI_STD_SYNC(sc, std,
   2504  1.208.12.1     itohy 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   2505  1.208.12.1     itohy 	}
   2506       1.153  augustss 	splx(s);
   2507        1.92  augustss 
   2508       1.162  augustss 	/*
   2509       1.153  augustss 	 * Step 2: Wait until we know hardware has finished any possible
   2510       1.153  augustss 	 * use of the xfer.  Also make sure the soft interrupt routine
   2511       1.153  augustss 	 * has run.
   2512       1.153  augustss 	 */
   2513       1.154  augustss 	usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */
   2514       1.153  augustss 	s = splusb();
   2515       1.164  augustss #ifdef USB_USE_SOFTINTR
   2516       1.153  augustss 	sc->sc_softwake = 1;
   2517       1.164  augustss #endif /* USB_USE_SOFTINTR */
   2518       1.153  augustss 	usb_schedsoftintr(&sc->sc_bus);
   2519       1.164  augustss #ifdef USB_USE_SOFTINTR
   2520       1.154  augustss 	DPRINTFN(1,("uhci_abort_xfer: tsleep\n"));
   2521       1.153  augustss 	tsleep(&sc->sc_softwake, PZERO, "uhciab", 0);
   2522       1.164  augustss #endif /* USB_USE_SOFTINTR */
   2523       1.153  augustss 	splx(s);
   2524       1.162  augustss 
   2525       1.153  augustss 	/*
   2526       1.153  augustss 	 * Step 3: Execute callback.
   2527       1.153  augustss 	 */
   2528       1.154  augustss 	DPRINTFN(1,("uhci_abort_xfer: callback\n"));
   2529        1.92  augustss 	s = splusb();
   2530       1.100  augustss #ifdef DIAGNOSTIC
   2531       1.106  augustss 	ii->isdone = 1;
   2532       1.100  augustss #endif
   2533  1.208.12.1     itohy 	/* Do the wakeup first to avoid touching the xfer after the callback. */
   2534  1.208.12.1     itohy 	wake = uxfer->uhci_xfer_flags & UHCI_XFER_ABORTWAIT;
   2535  1.208.12.1     itohy 	uxfer->uhci_xfer_flags &= ~(UHCI_XFER_ABORTING | UHCI_XFER_ABORTWAIT);
   2536  1.208.12.1     itohy 	uhci_transfer_complete(xfer);
   2537       1.188  augustss 	if (wake)
   2538  1.208.12.1     itohy 		wakeup(&uxfer->uhci_xfer_flags);
   2539        1.33  augustss 	splx(s);
   2540         1.1  augustss }
   2541         1.1  augustss 
   2542  1.208.12.1     itohy /*
   2543  1.208.12.1     itohy  * Perform any UHCI-specific transfer completion operations, then
   2544  1.208.12.1     itohy  * call usb_transfer_complete().
   2545  1.208.12.1     itohy  */
   2546  1.208.12.1     itohy Static void
   2547  1.208.12.1     itohy uhci_transfer_complete(usbd_xfer_handle xfer)
   2548  1.208.12.1     itohy {
   2549  1.208.12.1     itohy 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2550  1.208.12.1     itohy 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2551  1.208.12.1     itohy 	uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
   2552  1.208.12.1     itohy 	uhci_soft_td_t *p;
   2553  1.208.12.1     itohy 	struct usb_buffer_dma *ub = &UXFER(xfer)->dmabuf;
   2554  1.208.12.1     itohy 	int i, isread, n;
   2555  1.208.12.2     itohy 	int is_mbuf;
   2556  1.208.12.1     itohy 
   2557  1.208.12.6     itohy 	isread = usbd_xfer_isread(xfer);
   2558  1.208.12.1     itohy 
   2559  1.208.12.1     itohy 	if (ub)
   2560  1.208.12.1     itohy 		usb_sync_buffer_dma(&sc->sc_dmatag, ub,
   2561  1.208.12.1     itohy 		    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   2562  1.208.12.1     itohy 
   2563  1.208.12.1     itohy 	uhci_aux_dma_sync(sc, &UXFER(xfer)->aux,
   2564  1.208.12.1     itohy 	    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   2565  1.208.12.1     itohy 
   2566  1.208.12.6     itohy 	is_mbuf = (xfer->rqflags & URQ_DEV_MAP_MBUF) != 0;
   2567  1.208.12.2     itohy 
   2568  1.208.12.1     itohy 	/* Copy back from any auxillary buffers after a read operation. */
   2569  1.208.12.1     itohy 	if (xfer->nframes == 0) {
   2570  1.208.12.1     itohy 		for (p = ii->stdstart; p != NULL; p = p->link.std) {
   2571  1.208.12.6     itohy 			if (p->ad.aux_len)
   2572  1.208.12.6     itohy 				uhci_aux_dma_complete(&p->ad, &UXFER(xfer)->aux,
   2573  1.208.12.2     itohy 				    is_mbuf, isread);
   2574  1.208.12.1     itohy 		}
   2575  1.208.12.1     itohy 	} else {
   2576  1.208.12.6     itohy 		/* Isoc transfer, do things differently. */
   2577  1.208.12.6     itohy 		n = UXFER(xfer)->curframe;
   2578  1.208.12.6     itohy 		for (i = 0; i < xfer->nframes; i++) {
   2579  1.208.12.6     itohy 			p = upipe->u.iso.stds[n];
   2580  1.208.12.6     itohy 			if (p->ad.aux_len)
   2581  1.208.12.6     itohy 				uhci_aux_dma_complete(&p->ad,
   2582  1.208.12.6     itohy 				    &UXFER(xfer)->aux, is_mbuf, isread);
   2583  1.208.12.6     itohy 			if (++n >= UHCI_VFRAMELIST_COUNT)
   2584  1.208.12.1     itohy 				n = 0;
   2585  1.208.12.1     itohy 		}
   2586  1.208.12.1     itohy 	}
   2587  1.208.12.1     itohy 
   2588  1.208.12.1     itohy 	usb_transfer_complete(xfer);
   2589  1.208.12.1     itohy }
   2590  1.208.12.1     itohy 
   2591         1.1  augustss /* Close a device bulk pipe. */
   2592         1.1  augustss void
   2593       1.119  augustss uhci_device_bulk_close(usbd_pipe_handle pipe)
   2594         1.1  augustss {
   2595         1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2596         1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2597         1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   2598         1.1  augustss 
   2599         1.1  augustss 	uhci_free_sqh(sc, upipe->u.bulk.sqh);
   2600  1.208.12.1     itohy 	pipe->endpoint->savedtoggle = upipe->nexttoggle;
   2601         1.1  augustss }
   2602         1.1  augustss 
   2603         1.1  augustss usbd_status
   2604       1.119  augustss uhci_device_ctrl_transfer(usbd_xfer_handle xfer)
   2605         1.1  augustss {
   2606  1.208.12.1     itohy 	uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
   2607        1.63  augustss 	usbd_status err;
   2608        1.16  augustss 
   2609        1.52  augustss 	/* Insert last in queue. */
   2610  1.208.12.1     itohy 	err = usb_insert_transfer_dma(xfer, &sc->sc_dmatag,
   2611  1.208.12.1     itohy 	    &UXFER(xfer)->dmabuf);
   2612        1.63  augustss 	if (err)
   2613        1.63  augustss 		return (err);
   2614        1.52  augustss 
   2615       1.152  augustss 	/*
   2616        1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2617        1.92  augustss 	 * so start it first.
   2618        1.67  augustss 	 */
   2619        1.63  augustss 	return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2620        1.16  augustss }
   2621        1.16  augustss 
   2622        1.16  augustss usbd_status
   2623       1.119  augustss uhci_device_ctrl_start(usbd_xfer_handle xfer)
   2624        1.16  augustss {
   2625        1.63  augustss 	uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
   2626        1.63  augustss 	usbd_status err;
   2627         1.1  augustss 
   2628        1.82  augustss 	if (sc->sc_dying)
   2629        1.82  augustss 		return (USBD_IOERROR);
   2630        1.82  augustss 
   2631        1.48  augustss #ifdef DIAGNOSTIC
   2632        1.63  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   2633       1.163    provos 		panic("uhci_device_ctrl_transfer: not a request");
   2634        1.48  augustss #endif
   2635         1.1  augustss 
   2636        1.63  augustss 	err = uhci_device_request(xfer);
   2637        1.63  augustss 	if (err)
   2638        1.63  augustss 		return (err);
   2639         1.1  augustss 
   2640         1.9  augustss 	if (sc->sc_bus.use_polling)
   2641        1.63  augustss 		uhci_waitintr(sc, xfer);
   2642         1.1  augustss 	return (USBD_IN_PROGRESS);
   2643         1.1  augustss }
   2644         1.1  augustss 
   2645         1.1  augustss usbd_status
   2646       1.119  augustss uhci_device_intr_transfer(usbd_xfer_handle xfer)
   2647         1.1  augustss {
   2648  1.208.12.1     itohy 	uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
   2649        1.63  augustss 	usbd_status err;
   2650        1.16  augustss 
   2651        1.52  augustss 	/* Insert last in queue. */
   2652  1.208.12.1     itohy 	err = usb_insert_transfer_dma(xfer, &sc->sc_dmatag,
   2653  1.208.12.1     itohy 	    &UXFER(xfer)->dmabuf);
   2654        1.63  augustss 	if (err)
   2655        1.63  augustss 		return (err);
   2656        1.52  augustss 
   2657       1.152  augustss 	/*
   2658        1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2659        1.92  augustss 	 * so start it first.
   2660        1.67  augustss 	 */
   2661        1.63  augustss 	return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2662        1.16  augustss }
   2663        1.16  augustss 
   2664        1.16  augustss usbd_status
   2665       1.119  augustss uhci_device_intr_start(usbd_xfer_handle xfer)
   2666        1.16  augustss {
   2667        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2668         1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2669         1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   2670        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2671        1.55  augustss 	uhci_soft_td_t *data, *dataend;
   2672         1.1  augustss 	uhci_soft_qh_t *sqh;
   2673        1.63  augustss 	usbd_status err;
   2674       1.187     skrll 	int isread, endpt;
   2675        1.49  augustss 	int i, s;
   2676         1.1  augustss 
   2677        1.82  augustss 	if (sc->sc_dying)
   2678        1.82  augustss 		return (USBD_IOERROR);
   2679        1.82  augustss 
   2680        1.63  augustss 	DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n",
   2681        1.63  augustss 		    xfer, xfer->length, xfer->flags));
   2682         1.1  augustss 
   2683        1.48  augustss #ifdef DIAGNOSTIC
   2684        1.63  augustss 	if (xfer->rqflags & URQ_REQUEST)
   2685       1.163    provos 		panic("uhci_device_intr_transfer: a request");
   2686        1.48  augustss #endif
   2687         1.1  augustss 
   2688       1.187     skrll 	endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2689       1.187     skrll 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2690  1.208.12.1     itohy 	sqh = upipe->u.bulk.sqh;
   2691       1.187     skrll 
   2692       1.187     skrll 	upipe->u.intr.isread = isread;
   2693       1.187     skrll 
   2694  1.208.12.1     itohy 	err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread, xfer->flags,
   2695  1.208.12.1     itohy 	     xfer, &data, &dataend);
   2696        1.63  augustss 	if (err)
   2697        1.63  augustss 		return (err);
   2698        1.88   tsutsui 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2699  1.208.12.1     itohy 	UHCI_STD_SYNC(sc, dataend, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   2700         1.1  augustss 
   2701  1.208.12.1     itohy #ifdef USB_DEBUG
   2702         1.1  augustss 	if (uhcidebug > 10) {
   2703        1.55  augustss 		DPRINTF(("uhci_device_intr_transfer: data(1)\n"));
   2704        1.55  augustss 		uhci_dump_tds(data);
   2705         1.1  augustss 		uhci_dump_qh(upipe->u.intr.qhs[0]);
   2706         1.1  augustss 	}
   2707         1.1  augustss #endif
   2708         1.1  augustss 
   2709         1.1  augustss 	s = splusb();
   2710         1.1  augustss 	/* Set up interrupt info. */
   2711        1.63  augustss 	ii->xfer = xfer;
   2712        1.55  augustss 	ii->stdstart = data;
   2713        1.55  augustss 	ii->stdend = dataend;
   2714         1.7  augustss #ifdef DIAGNOSTIC
   2715        1.70  augustss 	if (!ii->isdone) {
   2716        1.70  augustss 		printf("uhci_device_intr_transfer: not done, ii=%p\n", ii);
   2717        1.70  augustss 	}
   2718         1.7  augustss 	ii->isdone = 0;
   2719         1.7  augustss #endif
   2720         1.1  augustss 
   2721       1.152  augustss 	DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
   2722        1.12  augustss 		     upipe->u.intr.qhs[0]));
   2723         1.1  augustss 	for (i = 0; i < upipe->u.intr.npoll; i++) {
   2724         1.1  augustss 		sqh = upipe->u.intr.qhs[i];
   2725        1.55  augustss 		sqh->elink = data;
   2726  1.208.12.1     itohy 		sqh->qh.qh_elink = htole32(UHCI_STD_DMAADDR(data) | UHCI_PTR_TD);
   2727  1.208.12.1     itohy 		UHCI_SQH_SYNC(sc, sqh,
   2728  1.208.12.1     itohy 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   2729         1.1  augustss 	}
   2730        1.92  augustss 	uhci_add_intr_info(sc, ii);
   2731        1.92  augustss 	xfer->status = USBD_IN_PROGRESS;
   2732         1.1  augustss 	splx(s);
   2733         1.1  augustss 
   2734  1.208.12.1     itohy #ifdef USB_DEBUG
   2735         1.1  augustss 	if (uhcidebug > 10) {
   2736        1.55  augustss 		DPRINTF(("uhci_device_intr_transfer: data(2)\n"));
   2737        1.55  augustss 		uhci_dump_tds(data);
   2738         1.1  augustss 		uhci_dump_qh(upipe->u.intr.qhs[0]);
   2739         1.1  augustss 	}
   2740         1.1  augustss #endif
   2741         1.1  augustss 
   2742         1.1  augustss 	return (USBD_IN_PROGRESS);
   2743         1.1  augustss }
   2744         1.1  augustss 
   2745         1.1  augustss /* Abort a device control request. */
   2746         1.1  augustss void
   2747       1.119  augustss uhci_device_ctrl_abort(usbd_xfer_handle xfer)
   2748         1.1  augustss {
   2749        1.33  augustss 	DPRINTF(("uhci_device_ctrl_abort:\n"));
   2750        1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2751         1.1  augustss }
   2752         1.1  augustss 
   2753         1.1  augustss /* Close a device control pipe. */
   2754         1.1  augustss void
   2755       1.205  christos uhci_device_ctrl_close(usbd_pipe_handle pipe)
   2756         1.1  augustss {
   2757  1.208.12.1     itohy 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2758  1.208.12.1     itohy 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
   2759  1.208.12.1     itohy 
   2760  1.208.12.1     itohy 	uhci_free_sqh(sc, upipe->u.ctl.sqh);
   2761  1.208.12.1     itohy 	uhci_free_std_norsv(sc, upipe->u.ctl.setup);
   2762  1.208.12.1     itohy 	uhci_free_std_norsv(sc, upipe->u.ctl.stat);
   2763  1.208.12.1     itohy 	usb_freemem(&sc->sc_dmatag, &upipe->u.ctl.reqdma);
   2764         1.1  augustss }
   2765         1.1  augustss 
   2766         1.1  augustss /* Abort a device interrupt request. */
   2767         1.1  augustss void
   2768       1.119  augustss uhci_device_intr_abort(usbd_xfer_handle xfer)
   2769         1.1  augustss {
   2770        1.63  augustss 	DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer));
   2771        1.63  augustss 	if (xfer->pipe->intrxfer == xfer) {
   2772        1.36  augustss 		DPRINTFN(1,("uhci_device_intr_abort: remove\n"));
   2773       1.154  augustss 		xfer->pipe->intrxfer = NULL;
   2774         1.1  augustss 	}
   2775        1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2776         1.1  augustss }
   2777         1.1  augustss 
   2778         1.1  augustss /* Close a device interrupt pipe. */
   2779         1.1  augustss void
   2780       1.119  augustss uhci_device_intr_close(usbd_pipe_handle pipe)
   2781         1.1  augustss {
   2782         1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2783         1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
   2784        1.92  augustss 	int i, npoll;
   2785        1.92  augustss 	int s;
   2786         1.1  augustss 
   2787         1.1  augustss 	/* Unlink descriptors from controller data structures. */
   2788         1.1  augustss 	npoll = upipe->u.intr.npoll;
   2789        1.92  augustss 	s = splusb();
   2790         1.1  augustss 	for (i = 0; i < npoll; i++)
   2791        1.92  augustss 		uhci_remove_intr(sc, upipe->u.intr.qhs[i]);
   2792        1.92  augustss 	splx(s);
   2793         1.1  augustss 
   2794       1.152  augustss 	/*
   2795         1.1  augustss 	 * We now have to wait for any activity on the physical
   2796         1.1  augustss 	 * descriptors to stop.
   2797         1.1  augustss 	 */
   2798        1.20  augustss 	usb_delay_ms(&sc->sc_bus, 2);
   2799         1.1  augustss 
   2800         1.1  augustss 	for(i = 0; i < npoll; i++)
   2801         1.1  augustss 		uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
   2802        1.31  augustss 	free(upipe->u.intr.qhs, M_USBHC);
   2803         1.1  augustss 
   2804         1.1  augustss 	/* XXX free other resources */
   2805         1.1  augustss }
   2806         1.1  augustss 
   2807         1.1  augustss usbd_status
   2808       1.119  augustss uhci_device_request(usbd_xfer_handle xfer)
   2809         1.1  augustss {
   2810        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2811        1.63  augustss 	usb_device_request_t *req = &xfer->request;
   2812         1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2813         1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   2814         1.1  augustss 	int addr = dev->address;
   2815         1.1  augustss 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2816        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2817        1.55  augustss 	uhci_soft_td_t *setup, *data, *stat, *next, *dataend;
   2818         1.1  augustss 	uhci_soft_qh_t *sqh;
   2819         1.1  augustss 	int len;
   2820         1.1  augustss 	u_int32_t ls;
   2821        1.63  augustss 	usbd_status err;
   2822         1.1  augustss 	int isread;
   2823         1.1  augustss 	int s;
   2824         1.1  augustss 
   2825        1.13  augustss 	DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
   2826        1.12  augustss 		    "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
   2827         1.1  augustss 		    req->bmRequestType, req->bRequest, UGETW(req->wValue),
   2828         1.1  augustss 		    UGETW(req->wIndex), UGETW(req->wLength),
   2829         1.1  augustss 		    addr, endpt));
   2830         1.1  augustss 
   2831       1.144  augustss 	ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0;
   2832         1.1  augustss 	isread = req->bmRequestType & UT_READ;
   2833         1.1  augustss 	len = UGETW(req->wLength);
   2834         1.1  augustss 
   2835         1.1  augustss 	setup = upipe->u.ctl.setup;
   2836         1.1  augustss 	stat = upipe->u.ctl.stat;
   2837         1.1  augustss 	sqh = upipe->u.ctl.sqh;
   2838         1.1  augustss 
   2839         1.1  augustss 	/* Set up data transaction */
   2840         1.1  augustss 	if (len != 0) {
   2841        1.38  augustss 		upipe->nexttoggle = 1;
   2842        1.73  augustss 		err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
   2843  1.208.12.1     itohy 		    xfer, &data, &dataend);
   2844        1.63  augustss 		if (err)
   2845        1.63  augustss 			return (err);
   2846        1.55  augustss 		next = data;
   2847        1.55  augustss 		dataend->link.std = stat;
   2848  1.208.12.1     itohy 		dataend->td.td_link =
   2849  1.208.12.1     itohy 		    htole32(UHCI_STD_DMAADDR(stat) | UHCI_PTR_VF | UHCI_PTR_TD);
   2850  1.208.12.1     itohy 		UHCI_STD_SYNC(sc, dataend,
   2851  1.208.12.1     itohy 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   2852         1.1  augustss 	} else {
   2853         1.1  augustss 		next = stat;
   2854         1.1  augustss 	}
   2855         1.1  augustss 	upipe->u.ctl.length = len;
   2856         1.1  augustss 
   2857       1.159  augustss 	memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req);
   2858  1.208.12.1     itohy 	USB_MEM_SYNC(&sc->sc_dmatag, &upipe->u.ctl.reqdma,
   2859  1.208.12.1     itohy 	    BUS_DMASYNC_PREWRITE);
   2860         1.1  augustss 
   2861        1.42  augustss 	setup->link.std = next;
   2862  1.208.12.1     itohy 	setup->td.td_link = htole32(UHCI_STD_DMAADDR(next) | UHCI_PTR_VF | UHCI_PTR_TD);
   2863        1.88   tsutsui 	setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
   2864        1.88   tsutsui 		UHCI_TD_ACTIVE);
   2865        1.88   tsutsui 	setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr));
   2866       1.160  augustss 	setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0));
   2867  1.208.12.1     itohy 	UHCI_STD_SYNC(sc, setup, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   2868        1.42  augustss 
   2869        1.92  augustss 	stat->link.std = NULL;
   2870        1.88   tsutsui 	stat->td.td_link = htole32(UHCI_PTR_T);
   2871       1.152  augustss 	stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
   2872        1.39  augustss 		UHCI_TD_ACTIVE | UHCI_TD_IOC);
   2873       1.152  augustss 	stat->td.td_token =
   2874        1.88   tsutsui 		htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
   2875        1.88   tsutsui 		                 UHCI_TD_IN (0, endpt, addr, 1));
   2876        1.88   tsutsui 	stat->td.td_buffer = htole32(0);
   2877  1.208.12.1     itohy 	UHCI_STD_SYNC(sc, stat, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   2878         1.1  augustss 
   2879  1.208.12.1     itohy #ifdef USB_DEBUG
   2880        1.67  augustss 	if (uhcidebug > 10) {
   2881        1.47  augustss 		DPRINTF(("uhci_device_request: before transfer\n"));
   2882        1.41  augustss 		uhci_dump_tds(setup);
   2883         1.1  augustss 	}
   2884         1.1  augustss #endif
   2885         1.1  augustss 
   2886         1.1  augustss 	/* Set up interrupt info. */
   2887        1.63  augustss 	ii->xfer = xfer;
   2888         1.1  augustss 	ii->stdstart = setup;
   2889         1.1  augustss 	ii->stdend = stat;
   2890         1.7  augustss #ifdef DIAGNOSTIC
   2891        1.70  augustss 	if (!ii->isdone) {
   2892        1.70  augustss 		printf("uhci_device_request: not done, ii=%p\n", ii);
   2893        1.70  augustss 	}
   2894         1.7  augustss 	ii->isdone = 0;
   2895         1.7  augustss #endif
   2896         1.1  augustss 
   2897        1.42  augustss 	sqh->elink = setup;
   2898  1.208.12.1     itohy 	sqh->qh.qh_elink = htole32(UHCI_STD_DMAADDR(setup) | UHCI_PTR_TD);
   2899  1.208.12.1     itohy 	UHCI_SQH_SYNC(sc, sqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   2900         1.1  augustss 
   2901         1.1  augustss 	s = splusb();
   2902       1.144  augustss 	if (dev->speed == USB_SPEED_LOW)
   2903       1.123  augustss 		uhci_add_ls_ctrl(sc, sqh);
   2904       1.123  augustss 	else
   2905       1.123  augustss 		uhci_add_hs_ctrl(sc, sqh);
   2906        1.92  augustss 	uhci_add_intr_info(sc, ii);
   2907  1.208.12.1     itohy #ifdef USB_DEBUG
   2908         1.1  augustss 	if (uhcidebug > 12) {
   2909         1.1  augustss 		uhci_soft_td_t *std;
   2910         1.1  augustss 		uhci_soft_qh_t *xqh;
   2911        1.13  augustss 		uhci_soft_qh_t *sxqh;
   2912        1.13  augustss 		int maxqh = 0;
   2913         1.1  augustss 		uhci_physaddr_t link;
   2914        1.47  augustss 		DPRINTF(("uhci_enter_ctl_q: follow from [0]\n"));
   2915         1.1  augustss 		for (std = sc->sc_vframes[0].htd, link = 0;
   2916       1.121  augustss 		     (link & UHCI_PTR_QH) == 0;
   2917        1.42  augustss 		     std = std->link.std) {
   2918        1.88   tsutsui 			link = le32toh(std->td.td_link);
   2919         1.1  augustss 			uhci_dump_td(std);
   2920         1.1  augustss 		}
   2921        1.67  augustss 		sxqh = (uhci_soft_qh_t *)std;
   2922        1.67  augustss 		uhci_dump_qh(sxqh);
   2923        1.67  augustss 		for (xqh = sxqh;
   2924        1.63  augustss 		     xqh != NULL;
   2925       1.152  augustss 		     xqh = (maxqh++ == 5 || xqh->hlink == sxqh ||
   2926       1.121  augustss                             xqh->hlink == xqh ? NULL : xqh->hlink)) {
   2927         1.1  augustss 			uhci_dump_qh(xqh);
   2928        1.13  augustss 		}
   2929        1.47  augustss 		DPRINTF(("Enqueued QH:\n"));
   2930         1.1  augustss 		uhci_dump_qh(sqh);
   2931        1.42  augustss 		uhci_dump_tds(sqh->elink);
   2932         1.1  augustss 	}
   2933         1.1  augustss #endif
   2934        1.63  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   2935  1.208.12.1     itohy 		usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
   2936        1.91  augustss 			    uhci_timeout, ii);
   2937        1.13  augustss 	}
   2938        1.92  augustss 	xfer->status = USBD_IN_PROGRESS;
   2939         1.1  augustss 	splx(s);
   2940         1.1  augustss 
   2941         1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   2942         1.1  augustss }
   2943         1.1  augustss 
   2944        1.16  augustss usbd_status
   2945       1.119  augustss uhci_device_isoc_transfer(usbd_xfer_handle xfer)
   2946        1.16  augustss {
   2947  1.208.12.1     itohy 	uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
   2948        1.63  augustss 	usbd_status err;
   2949        1.48  augustss 
   2950        1.63  augustss 	DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer));
   2951        1.48  augustss 
   2952        1.48  augustss 	/* Put it on our queue, */
   2953  1.208.12.1     itohy 	err = usb_insert_transfer_dma(xfer, &sc->sc_dmatag,
   2954  1.208.12.1     itohy 	    &UXFER(xfer)->dmabuf);
   2955        1.48  augustss 
   2956        1.48  augustss 	/* bail out on error, */
   2957        1.63  augustss 	if (err && err != USBD_IN_PROGRESS)
   2958        1.63  augustss 		return (err);
   2959        1.48  augustss 
   2960        1.48  augustss 	/* XXX should check inuse here */
   2961        1.48  augustss 
   2962        1.48  augustss 	/* insert into schedule, */
   2963        1.63  augustss 	uhci_device_isoc_enter(xfer);
   2964        1.48  augustss 
   2965       1.102  augustss 	/* and start if the pipe wasn't running */
   2966        1.67  augustss 	if (!err)
   2967        1.63  augustss 		uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
   2968        1.48  augustss 
   2969        1.63  augustss 	return (err);
   2970        1.48  augustss }
   2971        1.48  augustss 
   2972        1.48  augustss void
   2973       1.119  augustss uhci_device_isoc_enter(usbd_xfer_handle xfer)
   2974        1.48  augustss {
   2975        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2976        1.16  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2977        1.16  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   2978        1.48  augustss 	struct iso *iso = &upipe->u.iso;
   2979       1.152  augustss 	uhci_soft_td_t *std;
   2980  1.208.12.1     itohy 	u_int32_t len, status;
   2981  1.208.12.1     itohy 	int s, i, isread, next, nframes, seg, segoff;
   2982  1.208.12.1     itohy 	struct usb_buffer_dma *ub = &UXFER(xfer)->dmabuf;
   2983  1.208.12.1     itohy 	bus_dma_segment_t *segs = USB_BUFFER_SEGS(ub);
   2984  1.208.12.1     itohy 	int nsegs = USB_BUFFER_NSEGS(ub);
   2985  1.208.12.6     itohy 	union usb_bufptr bufptr;
   2986  1.208.12.2     itohy 	int is_mbuf;
   2987  1.208.12.6     itohy 	bus_addr_t auxdma;
   2988        1.48  augustss 
   2989        1.63  augustss 	DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p "
   2990        1.48  augustss 		    "nframes=%d\n",
   2991        1.63  augustss 		    iso->inuse, iso->next, xfer, xfer->nframes));
   2992        1.48  augustss 
   2993        1.82  augustss 	if (sc->sc_dying)
   2994        1.82  augustss 		return;
   2995        1.82  augustss 
   2996        1.63  augustss 	if (xfer->status == USBD_IN_PROGRESS) {
   2997        1.48  augustss 		/* This request has already been entered into the frame list */
   2998        1.96  augustss 		printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer);
   2999        1.68  augustss 		/* XXX */
   3000        1.48  augustss 	}
   3001        1.48  augustss 
   3002        1.48  augustss #ifdef DIAGNOSTIC
   3003        1.48  augustss 	if (iso->inuse >= UHCI_VFRAMELIST_COUNT)
   3004        1.48  augustss 		printf("uhci_device_isoc_enter: overflow!\n");
   3005        1.19  augustss #endif
   3006        1.16  augustss 
   3007        1.48  augustss 	next = iso->next;
   3008        1.48  augustss 	if (next == -1) {
   3009        1.48  augustss 		/* Not in use yet, schedule it a few frames ahead. */
   3010        1.48  augustss 		next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
   3011        1.48  augustss 		DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next));
   3012        1.48  augustss 	}
   3013        1.48  augustss 
   3014        1.63  augustss 	xfer->status = USBD_IN_PROGRESS;
   3015        1.92  augustss 	UXFER(xfer)->curframe = next;
   3016        1.48  augustss 
   3017  1.208.12.1     itohy 	seg = 0;
   3018  1.208.12.1     itohy 	segoff = 0;
   3019  1.208.12.6     itohy 	usb_bufptr_init(&bufptr, xfer);
   3020  1.208.12.6     itohy 	is_mbuf = (xfer->rqflags & URQ_DEV_MAP_MBUF) != 0;
   3021  1.208.12.1     itohy 	isread = xfer->pipe->endpoint->edesc->bEndpointAddress & UE_DIR_IN;
   3022        1.88   tsutsui 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |
   3023        1.88   tsutsui 				     UHCI_TD_ACTIVE |
   3024        1.88   tsutsui 				     UHCI_TD_IOS);
   3025        1.63  augustss 	nframes = xfer->nframes;
   3026        1.48  augustss 	s = splusb();
   3027        1.48  augustss 	for (i = 0; i < nframes; i++) {
   3028        1.48  augustss 		std = iso->stds[next];
   3029        1.48  augustss 		if (++next >= UHCI_VFRAMELIST_COUNT)
   3030        1.48  augustss 			next = 0;
   3031        1.63  augustss 		len = xfer->frlengths[i];
   3032  1.208.12.1     itohy 		USB_KASSERT2(seg < nsegs,
   3033  1.208.12.1     itohy 		    ("uhci_device_isoc_enter: too few segments"));
   3034  1.208.12.1     itohy 		if (len + segoff > segs[seg].ds_len) {
   3035  1.208.12.1     itohy 			/* UHCI can't handle non-contiguous data. */
   3036  1.208.12.6     itohy 			auxdma = uhci_aux_dma_alloc(&std->ad, &UXFER(xfer)->aux,
   3037  1.208.12.6     itohy 			    &bufptr, len);
   3038  1.208.12.1     itohy 
   3039  1.208.12.1     itohy 			/* prepare aux DMA */
   3040  1.208.12.6     itohy 			uhci_aux_dma_prepare(&std->ad, is_mbuf, isread);
   3041  1.208.12.6     itohy 			std->td.td_buffer = htole32(auxdma);
   3042  1.208.12.1     itohy 
   3043  1.208.12.3     itohy 			/* skip handled segments */
   3044  1.208.12.1     itohy 			segoff += len;
   3045  1.208.12.1     itohy 			while (segoff >= segs[seg].ds_len) {
   3046  1.208.12.1     itohy 				USB_KASSERT2(seg < nsegs - 1 ||
   3047  1.208.12.1     itohy 				    segoff == segs[seg].ds_len,
   3048  1.208.12.1     itohy 				    ("uhci_device_isoc_enter: overlap2"));
   3049  1.208.12.1     itohy 				segoff -= segs[seg].ds_len;
   3050  1.208.12.1     itohy 				seg++;
   3051  1.208.12.1     itohy 			}
   3052  1.208.12.1     itohy 		} else {
   3053  1.208.12.1     itohy 			std->td.td_buffer =
   3054  1.208.12.1     itohy 			    htole32(segs[seg].ds_addr + segoff);
   3055  1.208.12.1     itohy 			segoff += len;
   3056  1.208.12.1     itohy 			if (segoff >= segs[seg].ds_len) {
   3057  1.208.12.1     itohy 				USB_KASSERT2(segoff == segs[seg].ds_len,
   3058  1.208.12.1     itohy 				    ("uhci_device_isoc_enter: overlap"));
   3059  1.208.12.1     itohy 				segoff = 0;
   3060  1.208.12.1     itohy 				seg++;
   3061  1.208.12.1     itohy 			}
   3062  1.208.12.1     itohy 		}
   3063        1.48  augustss 		if (i == nframes - 1)
   3064        1.88   tsutsui 			status |= UHCI_TD_IOC;
   3065        1.88   tsutsui 		std->td.td_status = htole32(status);
   3066        1.88   tsutsui 		std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK);
   3067        1.88   tsutsui 		std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len));
   3068  1.208.12.1     itohy 		UHCI_STD_SYNC(sc, std,
   3069  1.208.12.1     itohy 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   3070  1.208.12.1     itohy #ifdef USB_DEBUG
   3071        1.48  augustss 		if (uhcidebug > 5) {
   3072        1.48  augustss 			DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i));
   3073        1.48  augustss 			uhci_dump_td(std);
   3074        1.48  augustss 		}
   3075        1.48  augustss #endif
   3076  1.208.12.6     itohy 		usb_bufptr_advance(&bufptr, len, is_mbuf);
   3077        1.48  augustss 	}
   3078        1.48  augustss 	iso->next = next;
   3079        1.63  augustss 	iso->inuse += xfer->nframes;
   3080        1.16  augustss 
   3081  1.208.12.1     itohy 	uhci_aux_dma_sync(sc, &UXFER(xfer)->aux,
   3082  1.208.12.1     itohy 	    isread ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   3083  1.208.12.1     itohy 
   3084        1.48  augustss 	splx(s);
   3085        1.16  augustss }
   3086        1.16  augustss 
   3087        1.16  augustss usbd_status
   3088       1.119  augustss uhci_device_isoc_start(usbd_xfer_handle xfer)
   3089        1.16  augustss {
   3090        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   3091        1.48  augustss 	uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
   3092        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   3093        1.48  augustss 	uhci_soft_td_t *end;
   3094        1.48  augustss 	int s, i;
   3095        1.48  augustss 
   3096        1.96  augustss 	DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer));
   3097        1.96  augustss 
   3098        1.82  augustss 	if (sc->sc_dying)
   3099        1.82  augustss 		return (USBD_IOERROR);
   3100        1.82  augustss 
   3101        1.48  augustss #ifdef DIAGNOSTIC
   3102        1.63  augustss 	if (xfer->status != USBD_IN_PROGRESS)
   3103        1.63  augustss 		printf("uhci_device_isoc_start: not in progress %p\n", xfer);
   3104        1.48  augustss #endif
   3105        1.48  augustss 
   3106        1.48  augustss 	/* Find the last TD */
   3107        1.92  augustss 	i = UXFER(xfer)->curframe + xfer->nframes;
   3108        1.48  augustss 	if (i >= UHCI_VFRAMELIST_COUNT)
   3109        1.48  augustss 		i -= UHCI_VFRAMELIST_COUNT;
   3110        1.48  augustss 	end = upipe->u.iso.stds[i];
   3111        1.48  augustss 
   3112        1.96  augustss #ifdef DIAGNOSTIC
   3113        1.96  augustss 	if (end == NULL) {
   3114        1.96  augustss 		printf("uhci_device_isoc_start: end == NULL\n");
   3115        1.96  augustss 		return (USBD_INVAL);
   3116        1.96  augustss 	}
   3117        1.96  augustss #endif
   3118        1.96  augustss 
   3119        1.48  augustss 	s = splusb();
   3120       1.152  augustss 
   3121        1.48  augustss 	/* Set up interrupt info. */
   3122        1.63  augustss 	ii->xfer = xfer;
   3123        1.48  augustss 	ii->stdstart = end;
   3124        1.48  augustss 	ii->stdend = end;
   3125        1.48  augustss #ifdef DIAGNOSTIC
   3126       1.102  augustss 	if (!ii->isdone)
   3127        1.70  augustss 		printf("uhci_device_isoc_start: not done, ii=%p\n", ii);
   3128        1.48  augustss 	ii->isdone = 0;
   3129        1.48  augustss #endif
   3130        1.92  augustss 	uhci_add_intr_info(sc, ii);
   3131       1.152  augustss 
   3132        1.48  augustss 	splx(s);
   3133        1.48  augustss 
   3134        1.48  augustss 	return (USBD_IN_PROGRESS);
   3135        1.16  augustss }
   3136        1.16  augustss 
   3137        1.16  augustss void
   3138       1.119  augustss uhci_device_isoc_abort(usbd_xfer_handle xfer)
   3139        1.16  augustss {
   3140        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   3141  1.208.12.1     itohy 	uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
   3142        1.48  augustss 	uhci_soft_td_t **stds = upipe->u.iso.stds;
   3143        1.48  augustss 	uhci_soft_td_t *std;
   3144        1.92  augustss 	int i, n, s, nframes, maxlen, len;
   3145        1.92  augustss 
   3146        1.92  augustss 	s = splusb();
   3147        1.92  augustss 
   3148        1.92  augustss 	/* Transfer is already done. */
   3149       1.152  augustss 	if (xfer->status != USBD_NOT_STARTED &&
   3150        1.92  augustss 	    xfer->status != USBD_IN_PROGRESS) {
   3151        1.92  augustss 		splx(s);
   3152        1.92  augustss 		return;
   3153        1.92  augustss 	}
   3154        1.48  augustss 
   3155        1.92  augustss 	/* Give xfer the requested abort code. */
   3156        1.63  augustss 	xfer->status = USBD_CANCELLED;
   3157        1.48  augustss 
   3158        1.48  augustss 	/* make hardware ignore it, */
   3159        1.63  augustss 	nframes = xfer->nframes;
   3160        1.92  augustss 	n = UXFER(xfer)->curframe;
   3161        1.92  augustss 	maxlen = 0;
   3162        1.48  augustss 	for (i = 0; i < nframes; i++) {
   3163        1.48  augustss 		std = stds[n];
   3164  1.208.12.1     itohy 		UHCI_STD_SYNC(sc, std,
   3165  1.208.12.1     itohy 		    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
   3166        1.88   tsutsui 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
   3167       1.130   tsutsui 		len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token));
   3168  1.208.12.1     itohy 		UHCI_STD_SYNC(sc, std,
   3169  1.208.12.1     itohy 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   3170        1.92  augustss 		if (len > maxlen)
   3171        1.92  augustss 			maxlen = len;
   3172        1.48  augustss 		if (++n >= UHCI_VFRAMELIST_COUNT)
   3173        1.48  augustss 			n = 0;
   3174        1.48  augustss 	}
   3175        1.48  augustss 
   3176        1.92  augustss 	/* and wait until we are sure the hardware has finished. */
   3177        1.92  augustss 	delay(maxlen);
   3178        1.92  augustss 
   3179        1.96  augustss #ifdef DIAGNOSTIC
   3180        1.96  augustss 	UXFER(xfer)->iinfo.isdone = 1;
   3181        1.96  augustss #endif
   3182        1.92  augustss 	/* Run callback and remove from interrupt list. */
   3183  1.208.12.1     itohy 	uhci_transfer_complete(xfer);
   3184        1.48  augustss 
   3185        1.92  augustss 	splx(s);
   3186        1.16  augustss }
   3187        1.16  augustss 
   3188        1.16  augustss void
   3189       1.119  augustss uhci_device_isoc_close(usbd_pipe_handle pipe)
   3190        1.16  augustss {
   3191        1.16  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   3192        1.16  augustss 	usbd_device_handle dev = upipe->pipe.device;
   3193        1.16  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   3194        1.48  augustss 	uhci_soft_td_t *std, *vstd;
   3195        1.16  augustss 	struct iso *iso;
   3196        1.92  augustss 	int i, s;
   3197        1.16  augustss 
   3198        1.16  augustss 	/*
   3199        1.16  augustss 	 * Make sure all TDs are marked as inactive.
   3200        1.16  augustss 	 * Wait for completion.
   3201        1.16  augustss 	 * Unschedule.
   3202        1.16  augustss 	 * Deallocate.
   3203        1.16  augustss 	 */
   3204        1.16  augustss 	iso = &upipe->u.iso;
   3205        1.16  augustss 
   3206  1.208.12.1     itohy 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   3207  1.208.12.1     itohy 		UHCI_STD_SYNC(sc, iso->stds[i],
   3208  1.208.12.1     itohy 		    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
   3209        1.88   tsutsui 		iso->stds[i]->td.td_status &= htole32(~UHCI_TD_ACTIVE);
   3210  1.208.12.1     itohy 		UHCI_STD_SYNC(sc, iso->stds[i],
   3211  1.208.12.1     itohy 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   3212  1.208.12.1     itohy 	}
   3213        1.20  augustss 	usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */
   3214        1.16  augustss 
   3215        1.92  augustss 	s = splusb();
   3216        1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   3217        1.16  augustss 		std = iso->stds[i];
   3218        1.48  augustss 		for (vstd = sc->sc_vframes[i].htd;
   3219        1.67  augustss 		     vstd != NULL && vstd->link.std != std;
   3220        1.42  augustss 		     vstd = vstd->link.std)
   3221        1.16  augustss 			;
   3222        1.67  augustss 		if (vstd == NULL) {
   3223        1.16  augustss 			/*panic*/
   3224        1.16  augustss 			printf("uhci_device_isoc_close: %p not found\n", std);
   3225        1.92  augustss 			splx(s);
   3226        1.16  augustss 			return;
   3227        1.16  augustss 		}
   3228        1.42  augustss 		vstd->link = std->link;
   3229        1.42  augustss 		vstd->td.td_link = std->td.td_link;
   3230  1.208.12.1     itohy 		uhci_free_std_norsv(sc, std);
   3231        1.16  augustss 	}
   3232        1.92  augustss 	splx(s);
   3233        1.16  augustss 
   3234        1.31  augustss 	free(iso->stds, M_USBHC);
   3235        1.16  augustss }
   3236        1.16  augustss 
   3237        1.16  augustss usbd_status
   3238       1.119  augustss uhci_setup_isoc(usbd_pipe_handle pipe)
   3239        1.16  augustss {
   3240        1.16  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   3241        1.16  augustss 	usbd_device_handle dev = upipe->pipe.device;
   3242        1.16  augustss 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   3243        1.16  augustss 	int addr = upipe->pipe.device->address;
   3244        1.16  augustss 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   3245        1.45  augustss 	int rd = UE_GET_DIR(endpt) == UE_DIR_IN;
   3246        1.48  augustss 	uhci_soft_td_t *std, *vstd;
   3247        1.48  augustss 	u_int32_t token;
   3248        1.16  augustss 	struct iso *iso;
   3249        1.92  augustss 	int i, s;
   3250        1.16  augustss 
   3251        1.16  augustss 	iso = &upipe->u.iso;
   3252        1.16  augustss 	iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *),
   3253        1.31  augustss 			   M_USBHC, M_WAITOK);
   3254        1.16  augustss 
   3255        1.88   tsutsui 	token = rd ? UHCI_TD_IN (0, endpt, addr, 0) :
   3256        1.88   tsutsui 		     UHCI_TD_OUT(0, endpt, addr, 0);
   3257        1.16  augustss 
   3258        1.48  augustss 	/* Allocate the TDs and mark as inactive; */
   3259        1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   3260  1.208.12.1     itohy 		std = uhci_alloc_std_norsv(sc);
   3261        1.48  augustss 		if (std == 0)
   3262        1.48  augustss 			goto bad;
   3263        1.88   tsutsui 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
   3264        1.88   tsutsui 		std->td.td_token = htole32(token);
   3265        1.48  augustss 		iso->stds[i] = std;
   3266        1.16  augustss 	}
   3267        1.16  augustss 
   3268        1.48  augustss 	/* Insert TDs into schedule. */
   3269        1.92  augustss 	s = splusb();
   3270        1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   3271        1.16  augustss 		std = iso->stds[i];
   3272        1.48  augustss 		vstd = sc->sc_vframes[i].htd;
   3273        1.42  augustss 		std->link = vstd->link;
   3274        1.42  augustss 		std->td.td_link = vstd->td.td_link;
   3275  1.208.12.1     itohy 		UHCI_STD_SYNC(sc, std,
   3276  1.208.12.1     itohy 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   3277        1.42  augustss 		vstd->link.std = std;
   3278  1.208.12.1     itohy 		vstd->td.td_link = htole32(UHCI_STD_DMAADDR(std) | UHCI_PTR_TD);
   3279        1.16  augustss 	}
   3280        1.92  augustss 	splx(s);
   3281        1.16  augustss 
   3282        1.48  augustss 	iso->next = -1;
   3283        1.48  augustss 	iso->inuse = 0;
   3284        1.48  augustss 
   3285        1.16  augustss 	return (USBD_NORMAL_COMPLETION);
   3286        1.16  augustss 
   3287        1.48  augustss  bad:
   3288        1.16  augustss 	while (--i >= 0)
   3289  1.208.12.1     itohy 		uhci_free_std_norsv(sc, iso->stds[i]);
   3290        1.31  augustss 	free(iso->stds, M_USBHC);
   3291        1.16  augustss 	return (USBD_NOMEM);
   3292        1.16  augustss }
   3293        1.16  augustss 
   3294        1.16  augustss void
   3295       1.119  augustss uhci_device_isoc_done(usbd_xfer_handle xfer)
   3296        1.16  augustss {
   3297        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   3298  1.208.12.1     itohy 	uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
   3299        1.48  augustss 
   3300       1.197   gdamore 	DPRINTFN(4, ("uhci_isoc_done: length=%d, busy_free=0x%08x\n",
   3301       1.197   gdamore 			xfer->actlen, xfer->busy_free));
   3302        1.93  augustss 
   3303        1.96  augustss 	if (ii->xfer != xfer)
   3304        1.96  augustss 		/* Not on interrupt list, ignore it. */
   3305       1.170  augustss 		return;
   3306       1.170  augustss 
   3307       1.170  augustss 	if (!uhci_active_intr_info(ii))
   3308        1.96  augustss 		return;
   3309        1.96  augustss 
   3310        1.93  augustss #ifdef DIAGNOSTIC
   3311        1.93  augustss         if (ii->stdend == NULL) {
   3312        1.93  augustss                 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
   3313  1.208.12.1     itohy #ifdef USB_DEBUG
   3314        1.93  augustss 		uhci_dump_ii(ii);
   3315        1.93  augustss #endif
   3316        1.93  augustss 		return;
   3317        1.93  augustss 	}
   3318        1.93  augustss #endif
   3319        1.48  augustss 
   3320        1.48  augustss 	/* Turn off the interrupt since it is active even if the TD is not. */
   3321  1.208.12.1     itohy 	UHCI_STD_SYNC(sc, ii->stdend,
   3322  1.208.12.1     itohy 	    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
   3323        1.88   tsutsui 	ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC);
   3324  1.208.12.1     itohy 	UHCI_STD_SYNC(sc, ii->stdend,
   3325  1.208.12.1     itohy 	    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   3326        1.48  augustss 
   3327        1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   3328  1.208.12.1     itohy 
   3329  1.208.12.1     itohy #ifdef DIAGNOSTIC
   3330  1.208.12.1     itohy         if (ii->stdend == NULL) {
   3331  1.208.12.1     itohy                 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
   3332  1.208.12.1     itohy #ifdef USB_DEBUG
   3333  1.208.12.1     itohy 		uhci_dump_ii(ii);
   3334  1.208.12.1     itohy #endif
   3335  1.208.12.1     itohy 		return;
   3336  1.208.12.1     itohy 	}
   3337  1.208.12.1     itohy #endif
   3338  1.208.12.1     itohy 	ii->stdstart = NULL;
   3339  1.208.12.1     itohy 	ii->stdend = NULL;
   3340        1.16  augustss }
   3341        1.16  augustss 
   3342         1.1  augustss void
   3343       1.119  augustss uhci_device_intr_done(usbd_xfer_handle xfer)
   3344         1.1  augustss {
   3345        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   3346         1.1  augustss 	uhci_softc_t *sc = ii->sc;
   3347        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   3348         1.1  augustss 	uhci_soft_qh_t *sqh;
   3349         1.1  augustss 	int i, npoll;
   3350         1.1  augustss 
   3351       1.173      gson 	DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen));
   3352         1.1  augustss 
   3353         1.1  augustss 	npoll = upipe->u.intr.npoll;
   3354         1.1  augustss 	for(i = 0; i < npoll; i++) {
   3355         1.1  augustss 		sqh = upipe->u.intr.qhs[i];
   3356       1.121  augustss 		sqh->elink = NULL;
   3357        1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   3358         1.1  augustss 	}
   3359       1.149  augustss 	uhci_free_std_chain(sc, ii->stdstart, NULL);
   3360         1.1  augustss 
   3361         1.1  augustss 	/* XXX Wasteful. */
   3362        1.63  augustss 	if (xfer->pipe->repeat) {
   3363        1.55  augustss 		uhci_soft_td_t *data, *dataend;
   3364         1.1  augustss 
   3365        1.92  augustss 		DPRINTFN(5,("uhci_device_intr_done: requeing\n"));
   3366        1.92  augustss 
   3367         1.1  augustss 		/* This alloc cannot fail since we freed the chain above. */
   3368  1.208.12.1     itohy 		uhci_alloc_std_chain(upipe, sc, xfer->length,
   3369  1.208.12.1     itohy 				     upipe->u.intr.isread, xfer->flags, xfer,
   3370  1.208.12.1     itohy 				     &data, &dataend);
   3371        1.88   tsutsui 		dataend->td.td_status |= htole32(UHCI_TD_IOC);
   3372  1.208.12.1     itohy 		UHCI_STD_SYNC(sc, dataend,
   3373  1.208.12.1     itohy 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   3374         1.1  augustss 
   3375  1.208.12.1     itohy #ifdef USB_DEBUG
   3376         1.1  augustss 		if (uhcidebug > 10) {
   3377        1.55  augustss 			DPRINTF(("uhci_device_intr_done: data(1)\n"));
   3378        1.55  augustss 			uhci_dump_tds(data);
   3379         1.1  augustss 			uhci_dump_qh(upipe->u.intr.qhs[0]);
   3380         1.1  augustss 		}
   3381         1.1  augustss #endif
   3382         1.1  augustss 
   3383        1.55  augustss 		ii->stdstart = data;
   3384        1.55  augustss 		ii->stdend = dataend;
   3385         1.7  augustss #ifdef DIAGNOSTIC
   3386        1.70  augustss 		if (!ii->isdone) {
   3387        1.70  augustss 			printf("uhci_device_intr_done: not done, ii=%p\n", ii);
   3388        1.70  augustss 		}
   3389         1.7  augustss 		ii->isdone = 0;
   3390         1.7  augustss #endif
   3391         1.1  augustss 		for (i = 0; i < npoll; i++) {
   3392         1.1  augustss 			sqh = upipe->u.intr.qhs[i];
   3393        1.55  augustss 			sqh->elink = data;
   3394  1.208.12.1     itohy 			sqh->qh.qh_elink =
   3395  1.208.12.1     itohy 			    htole32(UHCI_STD_DMAADDR(data) | UHCI_PTR_TD);
   3396  1.208.12.1     itohy 			UHCI_SQH_SYNC(sc, sqh,
   3397  1.208.12.1     itohy 			    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   3398         1.1  augustss 		}
   3399        1.92  augustss 		xfer->status = USBD_IN_PROGRESS;
   3400        1.92  augustss 		/* The ii is already on the examined list, just leave it. */
   3401         1.1  augustss 	} else {
   3402        1.92  augustss 		DPRINTFN(5,("uhci_device_intr_done: removing\n"));
   3403  1.208.12.1     itohy 		if (uhci_active_intr_info(ii)) {
   3404       1.169  augustss 			uhci_del_intr_info(ii);
   3405  1.208.12.1     itohy 			ii->stdstart = NULL;
   3406  1.208.12.1     itohy 			ii->stdend = NULL;
   3407  1.208.12.1     itohy 		}
   3408         1.1  augustss 	}
   3409         1.1  augustss }
   3410         1.1  augustss 
   3411         1.1  augustss /* Deallocate request data structures */
   3412         1.1  augustss void
   3413       1.119  augustss uhci_device_ctrl_done(usbd_xfer_handle xfer)
   3414         1.1  augustss {
   3415        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   3416         1.1  augustss 	uhci_softc_t *sc = ii->sc;
   3417        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   3418         1.1  augustss 
   3419         1.7  augustss #ifdef DIAGNOSTIC
   3420        1.63  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   3421       1.173      gson 		panic("uhci_device_ctrl_done: not a request");
   3422         1.7  augustss #endif
   3423         1.1  augustss 
   3424       1.169  augustss 	if (!uhci_active_intr_info(ii))
   3425       1.169  augustss 		return;
   3426       1.169  augustss 
   3427        1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   3428         1.1  augustss 
   3429       1.144  augustss 	if (upipe->pipe.device->speed == USB_SPEED_LOW)
   3430       1.123  augustss 		uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh);
   3431       1.123  augustss 	else
   3432       1.123  augustss 		uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh);
   3433         1.1  augustss 
   3434        1.49  augustss 	if (upipe->u.ctl.length != 0)
   3435        1.42  augustss 		uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend);
   3436  1.208.12.1     itohy 	ii->stdstart = NULL;
   3437  1.208.12.1     itohy 	ii->stdend = NULL;
   3438        1.49  augustss 
   3439       1.173      gson 	DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen));
   3440         1.1  augustss }
   3441         1.1  augustss 
   3442         1.1  augustss /* Deallocate request data structures */
   3443         1.1  augustss void
   3444       1.119  augustss uhci_device_bulk_done(usbd_xfer_handle xfer)
   3445         1.1  augustss {
   3446        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   3447         1.1  augustss 	uhci_softc_t *sc = ii->sc;
   3448        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   3449       1.169  augustss 
   3450       1.173      gson 	DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n",
   3451       1.169  augustss 		    xfer, ii, sc, upipe));
   3452       1.169  augustss 
   3453       1.169  augustss 	if (!uhci_active_intr_info(ii))
   3454       1.169  augustss 		return;
   3455         1.1  augustss 
   3456        1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   3457         1.1  augustss 
   3458         1.1  augustss 	uhci_remove_bulk(sc, upipe->u.bulk.sqh);
   3459        1.32  augustss 
   3460       1.149  augustss 	uhci_free_std_chain(sc, ii->stdstart, NULL);
   3461  1.208.12.1     itohy 	ii->stdstart = NULL;
   3462  1.208.12.1     itohy 	ii->stdend = NULL;
   3463        1.32  augustss 
   3464       1.173      gson 	DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen));
   3465         1.1  augustss }
   3466         1.1  augustss 
   3467         1.1  augustss /* Add interrupt QH, called with vflock. */
   3468         1.1  augustss void
   3469       1.119  augustss uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   3470         1.1  augustss {
   3471        1.92  augustss 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
   3472        1.42  augustss 	uhci_soft_qh_t *eqh;
   3473         1.1  augustss 
   3474        1.92  augustss 	DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh));
   3475        1.92  augustss 
   3476        1.42  augustss 	eqh = vf->eqh;
   3477        1.42  augustss 	sqh->hlink       = eqh->hlink;
   3478        1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   3479        1.42  augustss 	eqh->hlink       = sqh;
   3480  1.208.12.1     itohy 	eqh->qh.qh_hlink = htole32(UHCI_SQH_DMAADDR(sqh) | UHCI_PTR_QH);
   3481         1.1  augustss 	vf->eqh = sqh;
   3482         1.1  augustss 	vf->bandwidth++;
   3483         1.1  augustss }
   3484         1.1  augustss 
   3485       1.119  augustss /* Remove interrupt QH. */
   3486         1.1  augustss void
   3487       1.119  augustss uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   3488         1.1  augustss {
   3489        1.92  augustss 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
   3490         1.1  augustss 	uhci_soft_qh_t *pqh;
   3491         1.1  augustss 
   3492        1.92  augustss 	DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh));
   3493         1.1  augustss 
   3494       1.124  augustss 	/* See comment in uhci_remove_ctrl() */
   3495       1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   3496       1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   3497  1.208.12.1     itohy 		UHCI_SQH_SYNC(sc, sqh,
   3498  1.208.12.1     itohy 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   3499       1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   3500       1.124  augustss 	}
   3501       1.124  augustss 
   3502        1.92  augustss 	pqh = uhci_find_prev_qh(vf->hqh, sqh);
   3503        1.42  augustss 	pqh->hlink       = sqh->hlink;
   3504        1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   3505  1.208.12.1     itohy 	UHCI_SQH_SYNC(sc, pqh, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   3506       1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   3507         1.1  augustss 	if (vf->eqh == sqh)
   3508         1.1  augustss 		vf->eqh = pqh;
   3509         1.1  augustss 	vf->bandwidth--;
   3510         1.1  augustss }
   3511         1.1  augustss 
   3512         1.1  augustss usbd_status
   3513       1.119  augustss uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival)
   3514         1.1  augustss {
   3515         1.1  augustss 	uhci_soft_qh_t *sqh;
   3516         1.1  augustss 	int i, npoll, s;
   3517         1.1  augustss 	u_int bestbw, bw, bestoffs, offs;
   3518         1.1  augustss 
   3519       1.173      gson 	DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe));
   3520         1.1  augustss 	if (ival == 0) {
   3521  1.208.12.1     itohy 		printf("uhci_setintr: 0 interval\n");
   3522         1.1  augustss 		return (USBD_INVAL);
   3523         1.1  augustss 	}
   3524         1.1  augustss 
   3525         1.1  augustss 	if (ival > UHCI_VFRAMELIST_COUNT)
   3526         1.1  augustss 		ival = UHCI_VFRAMELIST_COUNT;
   3527         1.1  augustss 	npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
   3528       1.173      gson 	DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll));
   3529         1.1  augustss 
   3530         1.1  augustss 	upipe->u.intr.npoll = npoll;
   3531       1.152  augustss 	upipe->u.intr.qhs =
   3532        1.31  augustss 		malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK);
   3533         1.1  augustss 
   3534       1.152  augustss 	/*
   3535         1.1  augustss 	 * Figure out which offset in the schedule that has most
   3536         1.1  augustss 	 * bandwidth left over.
   3537         1.1  augustss 	 */
   3538         1.1  augustss #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
   3539         1.1  augustss 	for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
   3540         1.1  augustss 		for (bw = i = 0; i < npoll; i++)
   3541         1.1  augustss 			bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
   3542         1.1  augustss 		if (bw < bestbw) {
   3543         1.1  augustss 			bestbw = bw;
   3544         1.1  augustss 			bestoffs = offs;
   3545         1.1  augustss 		}
   3546         1.1  augustss 	}
   3547       1.173      gson 	DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
   3548         1.1  augustss 
   3549         1.1  augustss 	for(i = 0; i < npoll; i++) {
   3550         1.1  augustss 		upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
   3551       1.121  augustss 		sqh->elink = NULL;
   3552        1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   3553         1.1  augustss 		sqh->pos = MOD(i * ival + bestoffs);
   3554         1.1  augustss 	}
   3555         1.1  augustss #undef MOD
   3556         1.1  augustss 
   3557         1.1  augustss 	s = splusb();
   3558         1.1  augustss 	/* Enter QHs into the controller data structures. */
   3559         1.1  augustss 	for(i = 0; i < npoll; i++)
   3560        1.92  augustss 		uhci_add_intr(sc, upipe->u.intr.qhs[i]);
   3561        1.92  augustss 	splx(s);
   3562         1.1  augustss 
   3563       1.173      gson 	DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe));
   3564         1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   3565         1.1  augustss }
   3566         1.1  augustss 
   3567         1.1  augustss /* Open a new pipe. */
   3568         1.1  augustss usbd_status
   3569       1.119  augustss uhci_open(usbd_pipe_handle pipe)
   3570         1.1  augustss {
   3571         1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
   3572         1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   3573         1.1  augustss 	usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
   3574        1.63  augustss 	usbd_status err;
   3575        1.79  augustss 	int ival;
   3576         1.1  augustss 
   3577         1.1  augustss 	DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
   3578       1.152  augustss 		     pipe, pipe->device->address,
   3579         1.1  augustss 		     ed->bEndpointAddress, sc->sc_addr));
   3580        1.92  augustss 
   3581        1.92  augustss 	upipe->aborting = 0;
   3582  1.208.12.1     itohy 	upipe->nexttoggle = pipe->endpoint->savedtoggle;
   3583        1.92  augustss 
   3584         1.1  augustss 	if (pipe->device->address == sc->sc_addr) {
   3585         1.1  augustss 		switch (ed->bEndpointAddress) {
   3586         1.1  augustss 		case USB_CONTROL_ENDPOINT:
   3587         1.1  augustss 			pipe->methods = &uhci_root_ctrl_methods;
   3588         1.1  augustss 			break;
   3589        1.45  augustss 		case UE_DIR_IN | UHCI_INTR_ENDPT:
   3590         1.1  augustss 			pipe->methods = &uhci_root_intr_methods;
   3591         1.1  augustss 			break;
   3592         1.1  augustss 		default:
   3593         1.1  augustss 			return (USBD_INVAL);
   3594         1.1  augustss 		}
   3595         1.1  augustss 	} else {
   3596         1.1  augustss 		switch (ed->bmAttributes & UE_XFERTYPE) {
   3597         1.1  augustss 		case UE_CONTROL:
   3598         1.1  augustss 			pipe->methods = &uhci_device_ctrl_methods;
   3599         1.1  augustss 			upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
   3600        1.63  augustss 			if (upipe->u.ctl.sqh == NULL)
   3601         1.5  augustss 				goto bad;
   3602  1.208.12.1     itohy 			upipe->u.ctl.setup = uhci_alloc_std_norsv(sc);
   3603        1.63  augustss 			if (upipe->u.ctl.setup == NULL) {
   3604         1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   3605         1.5  augustss 				goto bad;
   3606         1.5  augustss 			}
   3607  1.208.12.1     itohy 			upipe->u.ctl.stat = uhci_alloc_std_norsv(sc);
   3608        1.63  augustss 			if (upipe->u.ctl.stat == NULL) {
   3609         1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   3610  1.208.12.1     itohy 				uhci_free_std_norsv(sc, upipe->u.ctl.setup);
   3611         1.5  augustss 				goto bad;
   3612         1.5  augustss 			}
   3613  1.208.12.1     itohy 			err = usb_allocmem(&sc->sc_dmatag,
   3614       1.152  augustss 				  sizeof(usb_device_request_t),
   3615        1.63  augustss 				  0, &upipe->u.ctl.reqdma);
   3616        1.63  augustss 			if (err) {
   3617         1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   3618  1.208.12.1     itohy 				uhci_free_std_norsv(sc, upipe->u.ctl.setup);
   3619  1.208.12.1     itohy 				uhci_free_std_norsv(sc, upipe->u.ctl.stat);
   3620         1.5  augustss 				goto bad;
   3621         1.5  augustss 			}
   3622         1.1  augustss 			break;
   3623         1.1  augustss 		case UE_INTERRUPT:
   3624         1.1  augustss 			pipe->methods = &uhci_device_intr_methods;
   3625        1.79  augustss 			ival = pipe->interval;
   3626        1.79  augustss 			if (ival == USBD_DEFAULT_INTERVAL)
   3627        1.79  augustss 				ival = ed->bInterval;
   3628        1.80  augustss 			return (uhci_device_setintr(sc, upipe, ival));
   3629         1.1  augustss 		case UE_ISOCHRONOUS:
   3630        1.16  augustss 			pipe->methods = &uhci_device_isoc_methods;
   3631        1.48  augustss 			return (uhci_setup_isoc(pipe));
   3632         1.1  augustss 		case UE_BULK:
   3633         1.1  augustss 			pipe->methods = &uhci_device_bulk_methods;
   3634         1.1  augustss 			upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
   3635        1.63  augustss 			if (upipe->u.bulk.sqh == NULL)
   3636         1.5  augustss 				goto bad;
   3637         1.1  augustss 			break;
   3638         1.1  augustss 		}
   3639         1.1  augustss 	}
   3640         1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   3641         1.5  augustss 
   3642         1.5  augustss  bad:
   3643         1.5  augustss 	return (USBD_NOMEM);
   3644         1.1  augustss }
   3645         1.1  augustss 
   3646         1.1  augustss /*
   3647         1.1  augustss  * Data structures and routines to emulate the root hub.
   3648         1.1  augustss  */
   3649  1.208.12.1     itohy const usb_device_descriptor_t uhci_devd = {
   3650         1.1  augustss 	USB_DEVICE_DESCRIPTOR_SIZE,
   3651         1.1  augustss 	UDESC_DEVICE,		/* type */
   3652         1.1  augustss 	{0x00, 0x01},		/* USB version */
   3653        1.87  augustss 	UDCLASS_HUB,		/* class */
   3654        1.87  augustss 	UDSUBCLASS_HUB,		/* subclass */
   3655       1.144  augustss 	UDPROTO_FSHUB,		/* protocol */
   3656         1.1  augustss 	64,			/* max packet */
   3657         1.1  augustss 	{0},{0},{0x00,0x01},	/* device id */
   3658         1.1  augustss 	1,2,0,			/* string indicies */
   3659         1.1  augustss 	1			/* # of configurations */
   3660         1.1  augustss };
   3661         1.1  augustss 
   3662       1.208  drochner const usb_config_descriptor_t uhci_confd = {
   3663         1.1  augustss 	USB_CONFIG_DESCRIPTOR_SIZE,
   3664         1.1  augustss 	UDESC_CONFIG,
   3665         1.1  augustss 	{USB_CONFIG_DESCRIPTOR_SIZE +
   3666         1.1  augustss 	 USB_INTERFACE_DESCRIPTOR_SIZE +
   3667         1.1  augustss 	 USB_ENDPOINT_DESCRIPTOR_SIZE},
   3668         1.1  augustss 	1,
   3669         1.1  augustss 	1,
   3670         1.1  augustss 	0,
   3671       1.206  drochner 	UC_ATTR_MBO | UC_SELF_POWERED,
   3672         1.1  augustss 	0			/* max power */
   3673         1.1  augustss };
   3674         1.1  augustss 
   3675       1.208  drochner const usb_interface_descriptor_t uhci_ifcd = {
   3676         1.1  augustss 	USB_INTERFACE_DESCRIPTOR_SIZE,
   3677         1.1  augustss 	UDESC_INTERFACE,
   3678         1.1  augustss 	0,
   3679         1.1  augustss 	0,
   3680         1.1  augustss 	1,
   3681        1.87  augustss 	UICLASS_HUB,
   3682        1.87  augustss 	UISUBCLASS_HUB,
   3683       1.144  augustss 	UIPROTO_FSHUB,
   3684         1.1  augustss 	0
   3685         1.1  augustss };
   3686         1.1  augustss 
   3687       1.208  drochner const usb_endpoint_descriptor_t uhci_endpd = {
   3688         1.1  augustss 	USB_ENDPOINT_DESCRIPTOR_SIZE,
   3689         1.1  augustss 	UDESC_ENDPOINT,
   3690        1.45  augustss 	UE_DIR_IN | UHCI_INTR_ENDPT,
   3691         1.1  augustss 	UE_INTERRUPT,
   3692         1.1  augustss 	{8},
   3693         1.1  augustss 	255
   3694         1.1  augustss };
   3695         1.1  augustss 
   3696       1.208  drochner const usb_hub_descriptor_t uhci_hubd_piix = {
   3697         1.1  augustss 	USB_HUB_DESCRIPTOR_SIZE,
   3698         1.1  augustss 	UDESC_HUB,
   3699         1.1  augustss 	2,
   3700         1.1  augustss 	{ UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
   3701         1.1  augustss 	50,			/* power on to power good */
   3702         1.1  augustss 	0,
   3703         1.1  augustss 	{ 0x00 },		/* both ports are removable */
   3704       1.199  christos 	{ 0 },
   3705         1.1  augustss };
   3706         1.1  augustss 
   3707         1.1  augustss int
   3708       1.189  christos uhci_str(usb_string_descriptor_t *p, int l, const char *s)
   3709         1.1  augustss {
   3710         1.1  augustss 	int i;
   3711         1.1  augustss 
   3712         1.1  augustss 	if (l == 0)
   3713         1.1  augustss 		return (0);
   3714         1.1  augustss 	p->bLength = 2 * strlen(s) + 2;
   3715         1.1  augustss 	if (l == 1)
   3716         1.1  augustss 		return (1);
   3717         1.1  augustss 	p->bDescriptorType = UDESC_STRING;
   3718         1.1  augustss 	l -= 2;
   3719         1.1  augustss 	for (i = 0; s[i] && l > 1; i++, l -= 2)
   3720         1.1  augustss 		USETW2(p->bString[i], 0, s[i]);
   3721         1.1  augustss 	return (2*i+2);
   3722         1.1  augustss }
   3723         1.1  augustss 
   3724         1.1  augustss /*
   3725       1.166   dsainty  * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also
   3726       1.166   dsainty  * enables the port, and also states that SET_FEATURE(PORT_ENABLE)
   3727       1.166   dsainty  * should not be used by the USB subsystem.  As we cannot issue a
   3728       1.166   dsainty  * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port
   3729       1.166   dsainty  * will be enabled as part of the reset.
   3730       1.166   dsainty  *
   3731       1.166   dsainty  * On the VT83C572, the port cannot be successfully enabled until the
   3732       1.166   dsainty  * outstanding "port enable change" and "connection status change"
   3733       1.166   dsainty  * events have been reset.
   3734       1.166   dsainty  */
   3735       1.166   dsainty Static usbd_status
   3736       1.166   dsainty uhci_portreset(uhci_softc_t *sc, int index)
   3737       1.166   dsainty {
   3738       1.166   dsainty 	int lim, port, x;
   3739       1.166   dsainty 
   3740       1.166   dsainty 	if (index == 1)
   3741       1.166   dsainty 		port = UHCI_PORTSC1;
   3742       1.166   dsainty 	else if (index == 2)
   3743       1.166   dsainty 		port = UHCI_PORTSC2;
   3744       1.166   dsainty 	else
   3745       1.166   dsainty 		return (USBD_IOERROR);
   3746       1.166   dsainty 
   3747       1.166   dsainty 	x = URWMASK(UREAD2(sc, port));
   3748       1.166   dsainty 	UWRITE2(sc, port, x | UHCI_PORTSC_PR);
   3749       1.166   dsainty 
   3750       1.166   dsainty 	usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
   3751       1.166   dsainty 
   3752       1.166   dsainty 	DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n",
   3753       1.166   dsainty 		    index, UREAD2(sc, port)));
   3754       1.166   dsainty 
   3755       1.166   dsainty 	x = URWMASK(UREAD2(sc, port));
   3756       1.166   dsainty 	UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
   3757       1.166   dsainty 
   3758       1.166   dsainty 	delay(100);
   3759       1.166   dsainty 
   3760       1.166   dsainty 	DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n",
   3761       1.166   dsainty 		    index, UREAD2(sc, port)));
   3762       1.166   dsainty 
   3763       1.166   dsainty 	x = URWMASK(UREAD2(sc, port));
   3764       1.166   dsainty 	UWRITE2(sc, port, x  | UHCI_PORTSC_PE);
   3765       1.166   dsainty 
   3766       1.166   dsainty 	for (lim = 10; --lim > 0;) {
   3767       1.166   dsainty 		usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY);
   3768       1.166   dsainty 
   3769       1.166   dsainty 		x = UREAD2(sc, port);
   3770       1.166   dsainty 
   3771       1.166   dsainty 		DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n",
   3772       1.166   dsainty 			    index, lim, x));
   3773       1.166   dsainty 
   3774       1.166   dsainty 		if (!(x & UHCI_PORTSC_CCS)) {
   3775       1.166   dsainty 			/*
   3776       1.166   dsainty 			 * No device is connected (or was disconnected
   3777       1.166   dsainty 			 * during reset).  Consider the port reset.
   3778       1.166   dsainty 			 * The delay must be long enough to ensure on
   3779       1.166   dsainty 			 * the initial iteration that the device
   3780       1.166   dsainty 			 * connection will have been registered.  50ms
   3781       1.166   dsainty 			 * appears to be sufficient, but 20ms is not.
   3782       1.166   dsainty 			 */
   3783       1.166   dsainty 			DPRINTFN(3,("uhci port %d loop %u, device detached\n",
   3784       1.166   dsainty 				    index, lim));
   3785       1.166   dsainty 			break;
   3786       1.166   dsainty 		}
   3787       1.166   dsainty 
   3788       1.166   dsainty 		if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) {
   3789       1.166   dsainty 			/*
   3790       1.166   dsainty 			 * Port enabled changed and/or connection
   3791       1.166   dsainty 			 * status changed were set.  Reset either or
   3792       1.166   dsainty 			 * both raised flags (by writing a 1 to that
   3793       1.166   dsainty 			 * bit), and wait again for state to settle.
   3794       1.166   dsainty 			 */
   3795       1.166   dsainty 			UWRITE2(sc, port, URWMASK(x) |
   3796       1.166   dsainty 				(x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)));
   3797       1.166   dsainty 			continue;
   3798       1.166   dsainty 		}
   3799       1.166   dsainty 
   3800       1.166   dsainty 		if (x & UHCI_PORTSC_PE)
   3801       1.166   dsainty 			/* Port is enabled */
   3802       1.166   dsainty 			break;
   3803       1.166   dsainty 
   3804       1.166   dsainty 		UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE);
   3805       1.166   dsainty 	}
   3806       1.166   dsainty 
   3807       1.166   dsainty 	DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n",
   3808       1.166   dsainty 		    index, UREAD2(sc, port)));
   3809       1.166   dsainty 
   3810       1.166   dsainty 	if (lim <= 0) {
   3811       1.166   dsainty 		DPRINTFN(1,("uhci port %d reset timed out\n", index));
   3812       1.166   dsainty 		return (USBD_TIMEOUT);
   3813       1.166   dsainty 	}
   3814       1.184     perry 
   3815       1.166   dsainty 	sc->sc_isreset = 1;
   3816       1.166   dsainty 	return (USBD_NORMAL_COMPLETION);
   3817       1.166   dsainty }
   3818       1.166   dsainty 
   3819       1.166   dsainty /*
   3820         1.1  augustss  * Simulate a hardware hub by handling all the necessary requests.
   3821         1.1  augustss  */
   3822         1.1  augustss usbd_status
   3823       1.119  augustss uhci_root_ctrl_transfer(usbd_xfer_handle xfer)
   3824         1.1  augustss {
   3825        1.63  augustss 	usbd_status err;
   3826        1.16  augustss 
   3827        1.52  augustss 	/* Insert last in queue. */
   3828        1.63  augustss 	err = usb_insert_transfer(xfer);
   3829        1.63  augustss 	if (err)
   3830        1.63  augustss 		return (err);
   3831        1.52  augustss 
   3832       1.152  augustss 	/*
   3833        1.94  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   3834        1.94  augustss 	 * so start it first.
   3835        1.67  augustss 	 */
   3836        1.63  augustss 	return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   3837        1.16  augustss }
   3838        1.16  augustss 
   3839        1.16  augustss usbd_status
   3840       1.119  augustss uhci_root_ctrl_start(usbd_xfer_handle xfer)
   3841        1.16  augustss {
   3842        1.63  augustss 	uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
   3843         1.1  augustss 	usb_device_request_t *req;
   3844        1.59  augustss 	void *buf = NULL;
   3845         1.1  augustss 	int port, x;
   3846        1.52  augustss 	int s, len, value, index, status, change, l, totlen = 0;
   3847         1.1  augustss 	usb_port_status_t ps;
   3848        1.63  augustss 	usbd_status err;
   3849         1.1  augustss 
   3850        1.82  augustss 	if (sc->sc_dying)
   3851        1.82  augustss 		return (USBD_IOERROR);
   3852        1.82  augustss 
   3853        1.48  augustss #ifdef DIAGNOSTIC
   3854        1.63  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   3855       1.163    provos 		panic("uhci_root_ctrl_transfer: not a request");
   3856        1.48  augustss #endif
   3857        1.63  augustss 	req = &xfer->request;
   3858         1.1  augustss 
   3859       1.152  augustss 	DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
   3860         1.1  augustss 		    req->bmRequestType, req->bRequest));
   3861         1.1  augustss 
   3862         1.1  augustss 	len = UGETW(req->wLength);
   3863         1.1  augustss 	value = UGETW(req->wValue);
   3864         1.1  augustss 	index = UGETW(req->wIndex);
   3865        1.49  augustss 
   3866  1.208.12.2     itohy 	if (len != 0) {
   3867  1.208.12.2     itohy 		/* mbuf transfer is not supported */
   3868  1.208.12.2     itohy 		if (xfer->rqflags & URQ_DEV_MAP_MBUF)
   3869  1.208.12.2     itohy 			return (USBD_INVAL);
   3870  1.208.12.1     itohy 		buf = xfer->hcbuffer;
   3871  1.208.12.2     itohy 	}
   3872        1.49  augustss 
   3873         1.1  augustss #define C(x,y) ((x) | ((y) << 8))
   3874         1.1  augustss 	switch(C(req->bRequest, req->bmRequestType)) {
   3875         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
   3876         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
   3877         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
   3878       1.152  augustss 		/*
   3879        1.13  augustss 		 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
   3880         1.1  augustss 		 * for the integrated root hub.
   3881         1.1  augustss 		 */
   3882         1.1  augustss 		break;
   3883         1.1  augustss 	case C(UR_GET_CONFIG, UT_READ_DEVICE):
   3884         1.1  augustss 		if (len > 0) {
   3885         1.1  augustss 			*(u_int8_t *)buf = sc->sc_conf;
   3886         1.1  augustss 			totlen = 1;
   3887         1.1  augustss 		}
   3888         1.1  augustss 		break;
   3889         1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   3890         1.1  augustss 		DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
   3891       1.195  christos 		if (len == 0)
   3892       1.195  christos 			break;
   3893         1.1  augustss 		switch(value >> 8) {
   3894         1.1  augustss 		case UDESC_DEVICE:
   3895         1.1  augustss 			if ((value & 0xff) != 0) {
   3896        1.63  augustss 				err = USBD_IOERROR;
   3897         1.1  augustss 				goto ret;
   3898         1.1  augustss 			}
   3899         1.1  augustss 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
   3900         1.1  augustss 			memcpy(buf, &uhci_devd, l);
   3901  1.208.12.1     itohy 			USETW(((usb_device_descriptor_t *)buf)->idVendor,
   3902  1.208.12.1     itohy 			    sc->sc_id_vendor);
   3903         1.1  augustss 			break;
   3904         1.1  augustss 		case UDESC_CONFIG:
   3905         1.1  augustss 			if ((value & 0xff) != 0) {
   3906        1.63  augustss 				err = USBD_IOERROR;
   3907         1.1  augustss 				goto ret;
   3908         1.1  augustss 			}
   3909         1.1  augustss 			totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
   3910         1.1  augustss 			memcpy(buf, &uhci_confd, l);
   3911         1.1  augustss 			buf = (char *)buf + l;
   3912         1.1  augustss 			len -= l;
   3913         1.1  augustss 			l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
   3914         1.1  augustss 			totlen += l;
   3915         1.1  augustss 			memcpy(buf, &uhci_ifcd, l);
   3916         1.1  augustss 			buf = (char *)buf + l;
   3917         1.1  augustss 			len -= l;
   3918         1.1  augustss 			l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
   3919         1.1  augustss 			totlen += l;
   3920         1.1  augustss 			memcpy(buf, &uhci_endpd, l);
   3921         1.1  augustss 			break;
   3922         1.1  augustss 		case UDESC_STRING:
   3923         1.1  augustss 			*(u_int8_t *)buf = 0;
   3924         1.1  augustss 			totlen = 1;
   3925         1.1  augustss 			switch (value & 0xff) {
   3926       1.182  augustss 			case 0: /* Language table */
   3927       1.208  drochner 				if (len > 0)
   3928       1.208  drochner 					*(u_int8_t *)buf = 4;
   3929       1.208  drochner 				if (len >=  4) {
   3930       1.208  drochner 		USETW(((usb_string_descriptor_t *)buf)->bString[0], 0x0409);
   3931       1.208  drochner 					totlen = 4;
   3932       1.208  drochner 				}
   3933       1.182  augustss 				break;
   3934         1.1  augustss 			case 1: /* Vendor */
   3935         1.8  augustss 				totlen = uhci_str(buf, len, sc->sc_vendor);
   3936         1.1  augustss 				break;
   3937         1.1  augustss 			case 2: /* Product */
   3938         1.8  augustss 				totlen = uhci_str(buf, len, "UHCI root hub");
   3939         1.1  augustss 				break;
   3940         1.1  augustss 			}
   3941         1.1  augustss 			break;
   3942         1.1  augustss 		default:
   3943        1.63  augustss 			err = USBD_IOERROR;
   3944         1.1  augustss 			goto ret;
   3945         1.1  augustss 		}
   3946         1.1  augustss 		break;
   3947         1.1  augustss 	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
   3948         1.1  augustss 		if (len > 0) {
   3949         1.1  augustss 			*(u_int8_t *)buf = 0;
   3950         1.1  augustss 			totlen = 1;
   3951         1.1  augustss 		}
   3952         1.1  augustss 		break;
   3953         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_DEVICE):
   3954         1.1  augustss 		if (len > 1) {
   3955         1.1  augustss 			USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
   3956         1.1  augustss 			totlen = 2;
   3957         1.1  augustss 		}
   3958         1.1  augustss 		break;
   3959         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_INTERFACE):
   3960         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
   3961         1.1  augustss 		if (len > 1) {
   3962         1.1  augustss 			USETW(((usb_status_t *)buf)->wStatus, 0);
   3963         1.1  augustss 			totlen = 2;
   3964         1.1  augustss 		}
   3965         1.1  augustss 		break;
   3966         1.1  augustss 	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
   3967         1.1  augustss 		if (value >= USB_MAX_DEVICES) {
   3968        1.63  augustss 			err = USBD_IOERROR;
   3969         1.1  augustss 			goto ret;
   3970         1.1  augustss 		}
   3971         1.1  augustss 		sc->sc_addr = value;
   3972         1.1  augustss 		break;
   3973         1.1  augustss 	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
   3974         1.1  augustss 		if (value != 0 && value != 1) {
   3975        1.63  augustss 			err = USBD_IOERROR;
   3976         1.1  augustss 			goto ret;
   3977         1.1  augustss 		}
   3978         1.1  augustss 		sc->sc_conf = value;
   3979         1.1  augustss 		break;
   3980         1.1  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
   3981         1.1  augustss 		break;
   3982         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
   3983         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
   3984         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
   3985        1.63  augustss 		err = USBD_IOERROR;
   3986         1.1  augustss 		goto ret;
   3987         1.1  augustss 	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
   3988         1.1  augustss 		break;
   3989         1.1  augustss 	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
   3990         1.1  augustss 		break;
   3991         1.1  augustss 	/* Hub requests */
   3992         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   3993         1.1  augustss 		break;
   3994         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   3995        1.12  augustss 		DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
   3996        1.12  augustss 			     "port=%d feature=%d\n",
   3997         1.1  augustss 			     index, value));
   3998         1.1  augustss 		if (index == 1)
   3999         1.1  augustss 			port = UHCI_PORTSC1;
   4000         1.1  augustss 		else if (index == 2)
   4001         1.1  augustss 			port = UHCI_PORTSC2;
   4002         1.1  augustss 		else {
   4003        1.63  augustss 			err = USBD_IOERROR;
   4004         1.1  augustss 			goto ret;
   4005         1.1  augustss 		}
   4006         1.1  augustss 		switch(value) {
   4007         1.1  augustss 		case UHF_PORT_ENABLE:
   4008       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   4009         1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
   4010         1.1  augustss 			break;
   4011         1.1  augustss 		case UHF_PORT_SUSPEND:
   4012       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   4013         1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
   4014         1.1  augustss 			break;
   4015         1.1  augustss 		case UHF_PORT_RESET:
   4016       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   4017         1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
   4018         1.1  augustss 			break;
   4019         1.1  augustss 		case UHF_C_PORT_CONNECTION:
   4020       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   4021         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
   4022         1.1  augustss 			break;
   4023         1.1  augustss 		case UHF_C_PORT_ENABLE:
   4024       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   4025         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
   4026         1.1  augustss 			break;
   4027         1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   4028       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   4029         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
   4030         1.1  augustss 			break;
   4031         1.1  augustss 		case UHF_C_PORT_RESET:
   4032         1.1  augustss 			sc->sc_isreset = 0;
   4033        1.63  augustss 			err = USBD_NORMAL_COMPLETION;
   4034         1.1  augustss 			goto ret;
   4035         1.1  augustss 		case UHF_PORT_CONNECTION:
   4036         1.1  augustss 		case UHF_PORT_OVER_CURRENT:
   4037         1.1  augustss 		case UHF_PORT_POWER:
   4038         1.1  augustss 		case UHF_PORT_LOW_SPEED:
   4039         1.1  augustss 		case UHF_C_PORT_SUSPEND:
   4040         1.1  augustss 		default:
   4041        1.63  augustss 			err = USBD_IOERROR;
   4042         1.1  augustss 			goto ret;
   4043         1.1  augustss 		}
   4044         1.1  augustss 		break;
   4045         1.1  augustss 	case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
   4046         1.1  augustss 		if (index == 1)
   4047         1.1  augustss 			port = UHCI_PORTSC1;
   4048         1.1  augustss 		else if (index == 2)
   4049         1.1  augustss 			port = UHCI_PORTSC2;
   4050         1.1  augustss 		else {
   4051        1.63  augustss 			err = USBD_IOERROR;
   4052         1.1  augustss 			goto ret;
   4053         1.1  augustss 		}
   4054         1.1  augustss 		if (len > 0) {
   4055       1.152  augustss 			*(u_int8_t *)buf =
   4056         1.1  augustss 				(UREAD2(sc, port) & UHCI_PORTSC_LS) >>
   4057         1.1  augustss 				UHCI_PORTSC_LS_SHIFT;
   4058         1.1  augustss 			totlen = 1;
   4059         1.1  augustss 		}
   4060         1.1  augustss 		break;
   4061         1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   4062       1.195  christos 		if (len == 0)
   4063       1.195  christos 			break;
   4064       1.177    toshii 		if ((value & 0xff) != 0) {
   4065        1.63  augustss 			err = USBD_IOERROR;
   4066         1.1  augustss 			goto ret;
   4067         1.1  augustss 		}
   4068         1.1  augustss 		l = min(len, USB_HUB_DESCRIPTOR_SIZE);
   4069         1.1  augustss 		totlen = l;
   4070         1.1  augustss 		memcpy(buf, &uhci_hubd_piix, l);
   4071         1.1  augustss 		break;
   4072         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   4073         1.1  augustss 		if (len != 4) {
   4074        1.63  augustss 			err = USBD_IOERROR;
   4075         1.1  augustss 			goto ret;
   4076         1.1  augustss 		}
   4077         1.1  augustss 		memset(buf, 0, len);
   4078         1.1  augustss 		totlen = len;
   4079         1.1  augustss 		break;
   4080         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   4081         1.1  augustss 		if (index == 1)
   4082         1.1  augustss 			port = UHCI_PORTSC1;
   4083         1.1  augustss 		else if (index == 2)
   4084         1.1  augustss 			port = UHCI_PORTSC2;
   4085         1.1  augustss 		else {
   4086        1.63  augustss 			err = USBD_IOERROR;
   4087         1.1  augustss 			goto ret;
   4088         1.1  augustss 		}
   4089         1.1  augustss 		if (len != 4) {
   4090        1.63  augustss 			err = USBD_IOERROR;
   4091         1.1  augustss 			goto ret;
   4092         1.1  augustss 		}
   4093         1.1  augustss 		x = UREAD2(sc, port);
   4094         1.1  augustss 		status = change = 0;
   4095       1.142  augustss 		if (x & UHCI_PORTSC_CCS)
   4096         1.1  augustss 			status |= UPS_CURRENT_CONNECT_STATUS;
   4097       1.152  augustss 		if (x & UHCI_PORTSC_CSC)
   4098         1.1  augustss 			change |= UPS_C_CONNECT_STATUS;
   4099       1.152  augustss 		if (x & UHCI_PORTSC_PE)
   4100         1.1  augustss 			status |= UPS_PORT_ENABLED;
   4101       1.152  augustss 		if (x & UHCI_PORTSC_POEDC)
   4102         1.1  augustss 			change |= UPS_C_PORT_ENABLED;
   4103       1.152  augustss 		if (x & UHCI_PORTSC_OCI)
   4104         1.1  augustss 			status |= UPS_OVERCURRENT_INDICATOR;
   4105       1.152  augustss 		if (x & UHCI_PORTSC_OCIC)
   4106         1.1  augustss 			change |= UPS_C_OVERCURRENT_INDICATOR;
   4107       1.152  augustss 		if (x & UHCI_PORTSC_SUSP)
   4108         1.1  augustss 			status |= UPS_SUSPEND;
   4109       1.152  augustss 		if (x & UHCI_PORTSC_LSDA)
   4110         1.1  augustss 			status |= UPS_LOW_SPEED;
   4111         1.1  augustss 		status |= UPS_PORT_POWER;
   4112         1.1  augustss 		if (sc->sc_isreset)
   4113         1.1  augustss 			change |= UPS_C_PORT_RESET;
   4114         1.1  augustss 		USETW(ps.wPortStatus, status);
   4115         1.1  augustss 		USETW(ps.wPortChange, change);
   4116         1.1  augustss 		l = min(len, sizeof ps);
   4117         1.1  augustss 		memcpy(buf, &ps, l);
   4118         1.1  augustss 		totlen = l;
   4119         1.1  augustss 		break;
   4120         1.1  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   4121        1.63  augustss 		err = USBD_IOERROR;
   4122         1.1  augustss 		goto ret;
   4123         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   4124         1.1  augustss 		break;
   4125         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   4126         1.1  augustss 		if (index == 1)
   4127         1.1  augustss 			port = UHCI_PORTSC1;
   4128         1.1  augustss 		else if (index == 2)
   4129         1.1  augustss 			port = UHCI_PORTSC2;
   4130         1.1  augustss 		else {
   4131        1.63  augustss 			err = USBD_IOERROR;
   4132         1.1  augustss 			goto ret;
   4133         1.1  augustss 		}
   4134         1.1  augustss 		switch(value) {
   4135         1.1  augustss 		case UHF_PORT_ENABLE:
   4136       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   4137         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_PE);
   4138         1.1  augustss 			break;
   4139         1.1  augustss 		case UHF_PORT_SUSPEND:
   4140       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   4141         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
   4142         1.1  augustss 			break;
   4143         1.1  augustss 		case UHF_PORT_RESET:
   4144       1.166   dsainty 			err = uhci_portreset(sc, index);
   4145       1.166   dsainty 			goto ret;
   4146       1.111  augustss 		case UHF_PORT_POWER:
   4147       1.111  augustss 			/* Pretend we turned on power */
   4148       1.115   mycroft 			err = USBD_NORMAL_COMPLETION;
   4149       1.111  augustss 			goto ret;
   4150         1.1  augustss 		case UHF_C_PORT_CONNECTION:
   4151         1.1  augustss 		case UHF_C_PORT_ENABLE:
   4152         1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   4153         1.1  augustss 		case UHF_PORT_CONNECTION:
   4154         1.1  augustss 		case UHF_PORT_OVER_CURRENT:
   4155         1.1  augustss 		case UHF_PORT_LOW_SPEED:
   4156         1.1  augustss 		case UHF_C_PORT_SUSPEND:
   4157         1.1  augustss 		case UHF_C_PORT_RESET:
   4158         1.1  augustss 		default:
   4159        1.63  augustss 			err = USBD_IOERROR;
   4160         1.1  augustss 			goto ret;
   4161         1.1  augustss 		}
   4162         1.1  augustss 		break;
   4163         1.1  augustss 	default:
   4164        1.63  augustss 		err = USBD_IOERROR;
   4165         1.1  augustss 		goto ret;
   4166         1.1  augustss 	}
   4167        1.63  augustss 	xfer->actlen = totlen;
   4168        1.63  augustss 	err = USBD_NORMAL_COMPLETION;
   4169         1.1  augustss  ret:
   4170        1.63  augustss 	xfer->status = err;
   4171        1.52  augustss 	s = splusb();
   4172  1.208.12.1     itohy 	uhci_transfer_complete(xfer);
   4173        1.52  augustss 	splx(s);
   4174         1.1  augustss 	return (USBD_IN_PROGRESS);
   4175         1.1  augustss }
   4176         1.1  augustss 
   4177         1.1  augustss /* Abort a root control request. */
   4178         1.1  augustss void
   4179       1.205  christos uhci_root_ctrl_abort(usbd_xfer_handle xfer)
   4180         1.1  augustss {
   4181        1.70  augustss 	/* Nothing to do, all transfers are synchronous. */
   4182         1.1  augustss }
   4183         1.1  augustss 
   4184         1.1  augustss /* Close the root pipe. */
   4185         1.1  augustss void
   4186       1.205  christos uhci_root_ctrl_close(usbd_pipe_handle pipe)
   4187         1.1  augustss {
   4188         1.1  augustss 	DPRINTF(("uhci_root_ctrl_close\n"));
   4189         1.1  augustss }
   4190         1.1  augustss 
   4191         1.1  augustss /* Abort a root interrupt request. */
   4192         1.1  augustss void
   4193       1.119  augustss uhci_root_intr_abort(usbd_xfer_handle xfer)
   4194         1.1  augustss {
   4195        1.63  augustss 	uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
   4196        1.30  augustss 
   4197        1.96  augustss 	usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, xfer);
   4198        1.96  augustss 	sc->sc_intr_xfer = NULL;
   4199        1.58  augustss 
   4200        1.63  augustss 	if (xfer->pipe->intrxfer == xfer) {
   4201        1.58  augustss 		DPRINTF(("uhci_root_intr_abort: remove\n"));
   4202        1.63  augustss 		xfer->pipe->intrxfer = 0;
   4203        1.58  augustss 	}
   4204        1.63  augustss 	xfer->status = USBD_CANCELLED;
   4205        1.96  augustss #ifdef DIAGNOSTIC
   4206        1.96  augustss 	UXFER(xfer)->iinfo.isdone = 1;
   4207        1.96  augustss #endif
   4208  1.208.12.1     itohy 	uhci_transfer_complete(xfer);
   4209         1.1  augustss }
   4210         1.1  augustss 
   4211        1.16  augustss usbd_status
   4212       1.119  augustss uhci_root_intr_transfer(usbd_xfer_handle xfer)
   4213        1.16  augustss {
   4214        1.63  augustss 	usbd_status err;
   4215        1.16  augustss 
   4216        1.52  augustss 	/* Insert last in queue. */
   4217        1.63  augustss 	err = usb_insert_transfer(xfer);
   4218        1.63  augustss 	if (err)
   4219        1.63  augustss 		return (err);
   4220        1.52  augustss 
   4221       1.186     skrll 	/*
   4222       1.186     skrll 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   4223  1.208.12.1     itohy 	 * so start it first.
   4224        1.67  augustss 	 */
   4225        1.63  augustss 	return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   4226        1.16  augustss }
   4227        1.16  augustss 
   4228         1.1  augustss /* Start a transfer on the root interrupt pipe */
   4229         1.1  augustss usbd_status
   4230       1.119  augustss uhci_root_intr_start(usbd_xfer_handle xfer)
   4231         1.1  augustss {
   4232        1.63  augustss 	usbd_pipe_handle pipe = xfer->pipe;
   4233         1.1  augustss 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
   4234         1.1  augustss 
   4235       1.173      gson 	DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n",
   4236        1.63  augustss 		     xfer, xfer->length, xfer->flags));
   4237        1.82  augustss 
   4238        1.82  augustss 	if (sc->sc_dying)
   4239        1.82  augustss 		return (USBD_IOERROR);
   4240         1.1  augustss 
   4241  1.208.12.2     itohy 	if (xfer->rqflags & URQ_DEV_MAP_MBUF)
   4242  1.208.12.2     itohy 		return (USBD_INVAL);	/* mbuf transfer is not supported */
   4243  1.208.12.2     itohy 
   4244  1.208.12.1     itohy 	sc->sc_ival = MS_TO_TICKS(xfer->pipe->endpoint->edesc->bInterval);
   4245        1.96  augustss 	usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
   4246        1.96  augustss 	sc->sc_intr_xfer = xfer;
   4247         1.1  augustss 	return (USBD_IN_PROGRESS);
   4248         1.1  augustss }
   4249         1.1  augustss 
   4250         1.1  augustss /* Close the root interrupt pipe. */
   4251         1.1  augustss void
   4252       1.119  augustss uhci_root_intr_close(usbd_pipe_handle pipe)
   4253         1.1  augustss {
   4254        1.30  augustss 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
   4255        1.30  augustss 
   4256        1.96  augustss 	usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, sc->sc_intr_xfer);
   4257        1.96  augustss 	sc->sc_intr_xfer = NULL;
   4258         1.1  augustss 	DPRINTF(("uhci_root_intr_close\n"));
   4259         1.1  augustss }
   4260