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uhci.c revision 1.209.4.2
      1  1.209.4.2  jmcneill /*	$NetBSD: uhci.c,v 1.209.4.2 2007/08/01 22:40:17 jmcneill Exp $	*/
      2  1.209.4.2  jmcneill /*	$FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $	*/
      3  1.209.4.2  jmcneill 
      4  1.209.4.2  jmcneill /*
      5  1.209.4.2  jmcneill  * Copyright (c) 1998, 2004 The NetBSD Foundation, Inc.
      6  1.209.4.2  jmcneill  * All rights reserved.
      7  1.209.4.2  jmcneill  *
      8  1.209.4.2  jmcneill  * This code is derived from software contributed to The NetBSD Foundation
      9  1.209.4.2  jmcneill  * by Lennart Augustsson (lennart (at) augustsson.net) at
     10  1.209.4.2  jmcneill  * Carlstedt Research & Technology.
     11  1.209.4.2  jmcneill  *
     12  1.209.4.2  jmcneill  * Redistribution and use in source and binary forms, with or without
     13  1.209.4.2  jmcneill  * modification, are permitted provided that the following conditions
     14  1.209.4.2  jmcneill  * are met:
     15  1.209.4.2  jmcneill  * 1. Redistributions of source code must retain the above copyright
     16  1.209.4.2  jmcneill  *    notice, this list of conditions and the following disclaimer.
     17  1.209.4.2  jmcneill  * 2. Redistributions in binary form must reproduce the above copyright
     18  1.209.4.2  jmcneill  *    notice, this list of conditions and the following disclaimer in the
     19  1.209.4.2  jmcneill  *    documentation and/or other materials provided with the distribution.
     20  1.209.4.2  jmcneill  * 3. All advertising materials mentioning features or use of this software
     21  1.209.4.2  jmcneill  *    must display the following acknowledgement:
     22  1.209.4.2  jmcneill  *        This product includes software developed by the NetBSD
     23  1.209.4.2  jmcneill  *        Foundation, Inc. and its contributors.
     24  1.209.4.2  jmcneill  * 4. Neither the name of The NetBSD Foundation nor the names of its
     25  1.209.4.2  jmcneill  *    contributors may be used to endorse or promote products derived
     26  1.209.4.2  jmcneill  *    from this software without specific prior written permission.
     27  1.209.4.2  jmcneill  *
     28  1.209.4.2  jmcneill  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     29  1.209.4.2  jmcneill  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     30  1.209.4.2  jmcneill  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     31  1.209.4.2  jmcneill  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     32  1.209.4.2  jmcneill  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     33  1.209.4.2  jmcneill  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     34  1.209.4.2  jmcneill  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     35  1.209.4.2  jmcneill  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     36  1.209.4.2  jmcneill  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     37  1.209.4.2  jmcneill  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     38  1.209.4.2  jmcneill  * POSSIBILITY OF SUCH DAMAGE.
     39  1.209.4.2  jmcneill  */
     40  1.209.4.2  jmcneill 
     41  1.209.4.2  jmcneill /*
     42  1.209.4.2  jmcneill  * USB Universal Host Controller driver.
     43  1.209.4.2  jmcneill  * Handles e.g. PIIX3 and PIIX4.
     44  1.209.4.2  jmcneill  *
     45  1.209.4.2  jmcneill  * UHCI spec: http://developer.intel.com/design/USB/UHCI11D.htm
     46  1.209.4.2  jmcneill  * USB spec: http://www.usb.org/developers/docs/usbspec.zip
     47  1.209.4.2  jmcneill  * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
     48  1.209.4.2  jmcneill  *             ftp://download.intel.com/design/intarch/datashts/29056201.pdf
     49  1.209.4.2  jmcneill  */
     50  1.209.4.2  jmcneill 
     51  1.209.4.2  jmcneill #include <sys/cdefs.h>
     52  1.209.4.2  jmcneill __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.209.4.2 2007/08/01 22:40:17 jmcneill Exp $");
     53  1.209.4.2  jmcneill 
     54  1.209.4.2  jmcneill #include <sys/param.h>
     55  1.209.4.2  jmcneill #include <sys/systm.h>
     56  1.209.4.2  jmcneill #include <sys/kernel.h>
     57  1.209.4.2  jmcneill #include <sys/malloc.h>
     58  1.209.4.2  jmcneill #if defined(__NetBSD__) || defined(__OpenBSD__)
     59  1.209.4.2  jmcneill #include <sys/device.h>
     60  1.209.4.2  jmcneill #include <sys/select.h>
     61  1.209.4.2  jmcneill #include <sys/extent.h>
     62  1.209.4.2  jmcneill #include <uvm/uvm_extern.h>
     63  1.209.4.2  jmcneill #elif defined(__FreeBSD__)
     64  1.209.4.2  jmcneill #include <sys/module.h>
     65  1.209.4.2  jmcneill #include <sys/bus.h>
     66  1.209.4.2  jmcneill #include <machine/bus_pio.h>
     67  1.209.4.2  jmcneill #if defined(DIAGNOSTIC) && defined(__i386__)
     68  1.209.4.2  jmcneill #include <machine/cpu.h>
     69  1.209.4.2  jmcneill #endif
     70  1.209.4.2  jmcneill #endif
     71  1.209.4.2  jmcneill #include <sys/proc.h>
     72  1.209.4.2  jmcneill #include <sys/queue.h>
     73  1.209.4.2  jmcneill 
     74  1.209.4.2  jmcneill #include <machine/bus.h>
     75  1.209.4.2  jmcneill #include <machine/endian.h>
     76  1.209.4.2  jmcneill 
     77  1.209.4.2  jmcneill #include <dev/usb/usb.h>
     78  1.209.4.2  jmcneill #include <dev/usb/usbdi.h>
     79  1.209.4.2  jmcneill #include <dev/usb/usbdivar.h>
     80  1.209.4.2  jmcneill #include <dev/usb/usb_mem.h>
     81  1.209.4.2  jmcneill #include <dev/usb/usb_quirks.h>
     82  1.209.4.2  jmcneill 
     83  1.209.4.2  jmcneill #include <dev/usb/uhcireg.h>
     84  1.209.4.2  jmcneill #include <dev/usb/uhcivar.h>
     85  1.209.4.2  jmcneill 
     86  1.209.4.2  jmcneill /* Use bandwidth reclamation for control transfers. Some devices choke on it. */
     87  1.209.4.2  jmcneill /*#define UHCI_CTL_LOOP */
     88  1.209.4.2  jmcneill 
     89  1.209.4.2  jmcneill #if defined(__FreeBSD__)
     90  1.209.4.2  jmcneill #include <machine/clock.h>
     91  1.209.4.2  jmcneill 
     92  1.209.4.2  jmcneill #define delay(d)		DELAY(d)
     93  1.209.4.2  jmcneill #endif
     94  1.209.4.2  jmcneill 
     95  1.209.4.2  jmcneill #if defined(__OpenBSD__)
     96  1.209.4.2  jmcneill struct cfdriver uhci_cd = {
     97  1.209.4.2  jmcneill 	NULL, "uhci", DV_DULL
     98  1.209.4.2  jmcneill };
     99  1.209.4.2  jmcneill #endif
    100  1.209.4.2  jmcneill 
    101  1.209.4.2  jmcneill #ifdef UHCI_DEBUG
    102  1.209.4.2  jmcneill uhci_softc_t *thesc;
    103  1.209.4.2  jmcneill #define DPRINTF(x)	if (uhcidebug) printf x
    104  1.209.4.2  jmcneill #define DPRINTFN(n,x)	if (uhcidebug>(n)) printf x
    105  1.209.4.2  jmcneill int uhcidebug = 0;
    106  1.209.4.2  jmcneill int uhcinoloop = 0;
    107  1.209.4.2  jmcneill #ifndef __NetBSD__
    108  1.209.4.2  jmcneill #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
    109  1.209.4.2  jmcneill #endif
    110  1.209.4.2  jmcneill #else
    111  1.209.4.2  jmcneill #define DPRINTF(x)
    112  1.209.4.2  jmcneill #define DPRINTFN(n,x)
    113  1.209.4.2  jmcneill #endif
    114  1.209.4.2  jmcneill 
    115  1.209.4.2  jmcneill /*
    116  1.209.4.2  jmcneill  * The UHCI controller is little endian, so on big endian machines
    117  1.209.4.2  jmcneill  * the data stored in memory needs to be swapped.
    118  1.209.4.2  jmcneill  */
    119  1.209.4.2  jmcneill #if defined(__FreeBSD__) || defined(__OpenBSD__)
    120  1.209.4.2  jmcneill #if BYTE_ORDER == BIG_ENDIAN
    121  1.209.4.2  jmcneill #define htole32(x) (bswap32(x))
    122  1.209.4.2  jmcneill #define le32toh(x) (bswap32(x))
    123  1.209.4.2  jmcneill #else
    124  1.209.4.2  jmcneill #define htole32(x) (x)
    125  1.209.4.2  jmcneill #define le32toh(x) (x)
    126  1.209.4.2  jmcneill #endif
    127  1.209.4.2  jmcneill #endif
    128  1.209.4.2  jmcneill 
    129  1.209.4.2  jmcneill struct uhci_pipe {
    130  1.209.4.2  jmcneill 	struct usbd_pipe pipe;
    131  1.209.4.2  jmcneill 	int nexttoggle;
    132  1.209.4.2  jmcneill 
    133  1.209.4.2  jmcneill 	u_char aborting;
    134  1.209.4.2  jmcneill 	usbd_xfer_handle abortstart, abortend;
    135  1.209.4.2  jmcneill 
    136  1.209.4.2  jmcneill 	/* Info needed for different pipe kinds. */
    137  1.209.4.2  jmcneill 	union {
    138  1.209.4.2  jmcneill 		/* Control pipe */
    139  1.209.4.2  jmcneill 		struct {
    140  1.209.4.2  jmcneill 			uhci_soft_qh_t *sqh;
    141  1.209.4.2  jmcneill 			usb_dma_t reqdma;
    142  1.209.4.2  jmcneill 			uhci_soft_td_t *setup, *stat;
    143  1.209.4.2  jmcneill 			u_int length;
    144  1.209.4.2  jmcneill 		} ctl;
    145  1.209.4.2  jmcneill 		/* Interrupt pipe */
    146  1.209.4.2  jmcneill 		struct {
    147  1.209.4.2  jmcneill 			int npoll;
    148  1.209.4.2  jmcneill 			int isread;
    149  1.209.4.2  jmcneill 			uhci_soft_qh_t **qhs;
    150  1.209.4.2  jmcneill 		} intr;
    151  1.209.4.2  jmcneill 		/* Bulk pipe */
    152  1.209.4.2  jmcneill 		struct {
    153  1.209.4.2  jmcneill 			uhci_soft_qh_t *sqh;
    154  1.209.4.2  jmcneill 			u_int length;
    155  1.209.4.2  jmcneill 			int isread;
    156  1.209.4.2  jmcneill 		} bulk;
    157  1.209.4.2  jmcneill 		/* Iso pipe */
    158  1.209.4.2  jmcneill 		struct iso {
    159  1.209.4.2  jmcneill 			uhci_soft_td_t **stds;
    160  1.209.4.2  jmcneill 			int next, inuse;
    161  1.209.4.2  jmcneill 		} iso;
    162  1.209.4.2  jmcneill 	} u;
    163  1.209.4.2  jmcneill };
    164  1.209.4.2  jmcneill 
    165  1.209.4.2  jmcneill Static void		uhci_globalreset(uhci_softc_t *);
    166  1.209.4.2  jmcneill Static usbd_status	uhci_portreset(uhci_softc_t*, int);
    167  1.209.4.2  jmcneill Static void		uhci_reset(uhci_softc_t *);
    168  1.209.4.2  jmcneill Static void		uhci_shutdown(void *v);
    169  1.209.4.2  jmcneill Static void		uhci_power(int, void *);
    170  1.209.4.2  jmcneill Static usbd_status	uhci_run(uhci_softc_t *, int run);
    171  1.209.4.2  jmcneill Static uhci_soft_td_t  *uhci_alloc_std(uhci_softc_t *);
    172  1.209.4.2  jmcneill Static void		uhci_free_std(uhci_softc_t *, uhci_soft_td_t *);
    173  1.209.4.2  jmcneill Static uhci_soft_qh_t  *uhci_alloc_sqh(uhci_softc_t *);
    174  1.209.4.2  jmcneill Static void		uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *);
    175  1.209.4.2  jmcneill #if 0
    176  1.209.4.2  jmcneill Static void		uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *,
    177  1.209.4.2  jmcneill 					 uhci_intr_info_t *);
    178  1.209.4.2  jmcneill Static void		uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *);
    179  1.209.4.2  jmcneill #endif
    180  1.209.4.2  jmcneill 
    181  1.209.4.2  jmcneill Static void		uhci_free_std_chain(uhci_softc_t *,
    182  1.209.4.2  jmcneill 					    uhci_soft_td_t *, uhci_soft_td_t *);
    183  1.209.4.2  jmcneill Static usbd_status	uhci_alloc_std_chain(struct uhci_pipe *,
    184  1.209.4.2  jmcneill 			    uhci_softc_t *, int, int, u_int16_t, usb_dma_t *,
    185  1.209.4.2  jmcneill 			    uhci_soft_td_t **, uhci_soft_td_t **);
    186  1.209.4.2  jmcneill Static void		uhci_poll_hub(void *);
    187  1.209.4.2  jmcneill Static void		uhci_waitintr(uhci_softc_t *, usbd_xfer_handle);
    188  1.209.4.2  jmcneill Static void		uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *);
    189  1.209.4.2  jmcneill Static void		uhci_idone(uhci_intr_info_t *);
    190  1.209.4.2  jmcneill 
    191  1.209.4.2  jmcneill Static void		uhci_abort_xfer(usbd_xfer_handle, usbd_status status);
    192  1.209.4.2  jmcneill 
    193  1.209.4.2  jmcneill Static void		uhci_timeout(void *);
    194  1.209.4.2  jmcneill Static void		uhci_timeout_task(void *);
    195  1.209.4.2  jmcneill Static void		uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
    196  1.209.4.2  jmcneill Static void		uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
    197  1.209.4.2  jmcneill Static void		uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *);
    198  1.209.4.2  jmcneill Static void		uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
    199  1.209.4.2  jmcneill Static void		uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
    200  1.209.4.2  jmcneill Static void		uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *);
    201  1.209.4.2  jmcneill Static int		uhci_str(usb_string_descriptor_t *, int, const char *);
    202  1.209.4.2  jmcneill Static void		uhci_add_loop(uhci_softc_t *sc);
    203  1.209.4.2  jmcneill Static void		uhci_rem_loop(uhci_softc_t *sc);
    204  1.209.4.2  jmcneill 
    205  1.209.4.2  jmcneill Static usbd_status	uhci_setup_isoc(usbd_pipe_handle pipe);
    206  1.209.4.2  jmcneill Static void		uhci_device_isoc_enter(usbd_xfer_handle);
    207  1.209.4.2  jmcneill 
    208  1.209.4.2  jmcneill Static usbd_status	uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
    209  1.209.4.2  jmcneill Static void		uhci_freem(struct usbd_bus *, usb_dma_t *);
    210  1.209.4.2  jmcneill 
    211  1.209.4.2  jmcneill Static usbd_xfer_handle	uhci_allocx(struct usbd_bus *);
    212  1.209.4.2  jmcneill Static void		uhci_freex(struct usbd_bus *, usbd_xfer_handle);
    213  1.209.4.2  jmcneill 
    214  1.209.4.2  jmcneill Static usbd_status	uhci_device_ctrl_transfer(usbd_xfer_handle);
    215  1.209.4.2  jmcneill Static usbd_status	uhci_device_ctrl_start(usbd_xfer_handle);
    216  1.209.4.2  jmcneill Static void		uhci_device_ctrl_abort(usbd_xfer_handle);
    217  1.209.4.2  jmcneill Static void		uhci_device_ctrl_close(usbd_pipe_handle);
    218  1.209.4.2  jmcneill Static void		uhci_device_ctrl_done(usbd_xfer_handle);
    219  1.209.4.2  jmcneill 
    220  1.209.4.2  jmcneill Static usbd_status	uhci_device_intr_transfer(usbd_xfer_handle);
    221  1.209.4.2  jmcneill Static usbd_status	uhci_device_intr_start(usbd_xfer_handle);
    222  1.209.4.2  jmcneill Static void		uhci_device_intr_abort(usbd_xfer_handle);
    223  1.209.4.2  jmcneill Static void		uhci_device_intr_close(usbd_pipe_handle);
    224  1.209.4.2  jmcneill Static void		uhci_device_intr_done(usbd_xfer_handle);
    225  1.209.4.2  jmcneill 
    226  1.209.4.2  jmcneill Static usbd_status	uhci_device_bulk_transfer(usbd_xfer_handle);
    227  1.209.4.2  jmcneill Static usbd_status	uhci_device_bulk_start(usbd_xfer_handle);
    228  1.209.4.2  jmcneill Static void		uhci_device_bulk_abort(usbd_xfer_handle);
    229  1.209.4.2  jmcneill Static void		uhci_device_bulk_close(usbd_pipe_handle);
    230  1.209.4.2  jmcneill Static void		uhci_device_bulk_done(usbd_xfer_handle);
    231  1.209.4.2  jmcneill 
    232  1.209.4.2  jmcneill Static usbd_status	uhci_device_isoc_transfer(usbd_xfer_handle);
    233  1.209.4.2  jmcneill Static usbd_status	uhci_device_isoc_start(usbd_xfer_handle);
    234  1.209.4.2  jmcneill Static void		uhci_device_isoc_abort(usbd_xfer_handle);
    235  1.209.4.2  jmcneill Static void		uhci_device_isoc_close(usbd_pipe_handle);
    236  1.209.4.2  jmcneill Static void		uhci_device_isoc_done(usbd_xfer_handle);
    237  1.209.4.2  jmcneill 
    238  1.209.4.2  jmcneill Static usbd_status	uhci_root_ctrl_transfer(usbd_xfer_handle);
    239  1.209.4.2  jmcneill Static usbd_status	uhci_root_ctrl_start(usbd_xfer_handle);
    240  1.209.4.2  jmcneill Static void		uhci_root_ctrl_abort(usbd_xfer_handle);
    241  1.209.4.2  jmcneill Static void		uhci_root_ctrl_close(usbd_pipe_handle);
    242  1.209.4.2  jmcneill Static void		uhci_root_ctrl_done(usbd_xfer_handle);
    243  1.209.4.2  jmcneill 
    244  1.209.4.2  jmcneill Static usbd_status	uhci_root_intr_transfer(usbd_xfer_handle);
    245  1.209.4.2  jmcneill Static usbd_status	uhci_root_intr_start(usbd_xfer_handle);
    246  1.209.4.2  jmcneill Static void		uhci_root_intr_abort(usbd_xfer_handle);
    247  1.209.4.2  jmcneill Static void		uhci_root_intr_close(usbd_pipe_handle);
    248  1.209.4.2  jmcneill Static void		uhci_root_intr_done(usbd_xfer_handle);
    249  1.209.4.2  jmcneill 
    250  1.209.4.2  jmcneill Static usbd_status	uhci_open(usbd_pipe_handle);
    251  1.209.4.2  jmcneill Static void		uhci_poll(struct usbd_bus *);
    252  1.209.4.2  jmcneill Static void		uhci_softintr(void *);
    253  1.209.4.2  jmcneill 
    254  1.209.4.2  jmcneill Static usbd_status	uhci_device_request(usbd_xfer_handle xfer);
    255  1.209.4.2  jmcneill 
    256  1.209.4.2  jmcneill Static void		uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *);
    257  1.209.4.2  jmcneill Static void		uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *);
    258  1.209.4.2  jmcneill Static usbd_status	uhci_device_setintr(uhci_softc_t *sc,
    259  1.209.4.2  jmcneill 			    struct uhci_pipe *pipe, int ival);
    260  1.209.4.2  jmcneill 
    261  1.209.4.2  jmcneill Static void		uhci_device_clear_toggle(usbd_pipe_handle pipe);
    262  1.209.4.2  jmcneill Static void		uhci_noop(usbd_pipe_handle pipe);
    263  1.209.4.2  jmcneill 
    264  1.209.4.2  jmcneill Static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *,
    265  1.209.4.2  jmcneill 						    uhci_soft_qh_t *);
    266  1.209.4.2  jmcneill 
    267  1.209.4.2  jmcneill #ifdef UHCI_DEBUG
    268  1.209.4.2  jmcneill Static void		uhci_dump_all(uhci_softc_t *);
    269  1.209.4.2  jmcneill Static void		uhci_dumpregs(uhci_softc_t *);
    270  1.209.4.2  jmcneill Static void		uhci_dump_qhs(uhci_soft_qh_t *);
    271  1.209.4.2  jmcneill Static void		uhci_dump_qh(uhci_soft_qh_t *);
    272  1.209.4.2  jmcneill Static void		uhci_dump_tds(uhci_soft_td_t *);
    273  1.209.4.2  jmcneill Static void		uhci_dump_td(uhci_soft_td_t *);
    274  1.209.4.2  jmcneill Static void		uhci_dump_ii(uhci_intr_info_t *ii);
    275  1.209.4.2  jmcneill void			uhci_dump(void);
    276  1.209.4.2  jmcneill #endif
    277  1.209.4.2  jmcneill 
    278  1.209.4.2  jmcneill #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
    279  1.209.4.2  jmcneill 			BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
    280  1.209.4.2  jmcneill #define UWRITE1(sc, r, x) \
    281  1.209.4.2  jmcneill  do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \
    282  1.209.4.2  jmcneill  } while (/*CONSTCOND*/0)
    283  1.209.4.2  jmcneill #define UWRITE2(sc, r, x) \
    284  1.209.4.2  jmcneill  do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \
    285  1.209.4.2  jmcneill  } while (/*CONSTCOND*/0)
    286  1.209.4.2  jmcneill #define UWRITE4(sc, r, x) \
    287  1.209.4.2  jmcneill  do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \
    288  1.209.4.2  jmcneill  } while (/*CONSTCOND*/0)
    289  1.209.4.2  jmcneill static __inline uint8_t
    290  1.209.4.2  jmcneill UREAD1(uhci_softc_t *sc, bus_size_t r)
    291  1.209.4.2  jmcneill {
    292  1.209.4.2  jmcneill 
    293  1.209.4.2  jmcneill 	UBARR(sc);
    294  1.209.4.2  jmcneill 	return bus_space_read_1(sc->iot, sc->ioh, r);
    295  1.209.4.2  jmcneill }
    296  1.209.4.2  jmcneill 
    297  1.209.4.2  jmcneill static __inline uint16_t
    298  1.209.4.2  jmcneill UREAD2(uhci_softc_t *sc, bus_size_t r)
    299  1.209.4.2  jmcneill {
    300  1.209.4.2  jmcneill 
    301  1.209.4.2  jmcneill 	UBARR(sc);
    302  1.209.4.2  jmcneill 	return bus_space_read_2(sc->iot, sc->ioh, r);
    303  1.209.4.2  jmcneill }
    304  1.209.4.2  jmcneill 
    305  1.209.4.2  jmcneill static __inline uint32_t
    306  1.209.4.2  jmcneill UREAD4(uhci_softc_t *sc, bus_size_t r)
    307  1.209.4.2  jmcneill {
    308  1.209.4.2  jmcneill 
    309  1.209.4.2  jmcneill 	UBARR(sc);
    310  1.209.4.2  jmcneill 	return bus_space_read_4(sc->iot, sc->ioh, r);
    311  1.209.4.2  jmcneill }
    312  1.209.4.2  jmcneill 
    313  1.209.4.2  jmcneill #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
    314  1.209.4.2  jmcneill #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
    315  1.209.4.2  jmcneill 
    316  1.209.4.2  jmcneill #define UHCI_RESET_TIMEOUT 100	/* ms, reset timeout */
    317  1.209.4.2  jmcneill 
    318  1.209.4.2  jmcneill #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
    319  1.209.4.2  jmcneill 
    320  1.209.4.2  jmcneill #define UHCI_INTR_ENDPT 1
    321  1.209.4.2  jmcneill 
    322  1.209.4.2  jmcneill const struct usbd_bus_methods uhci_bus_methods = {
    323  1.209.4.2  jmcneill 	uhci_open,
    324  1.209.4.2  jmcneill 	uhci_softintr,
    325  1.209.4.2  jmcneill 	uhci_poll,
    326  1.209.4.2  jmcneill 	uhci_allocm,
    327  1.209.4.2  jmcneill 	uhci_freem,
    328  1.209.4.2  jmcneill 	uhci_allocx,
    329  1.209.4.2  jmcneill 	uhci_freex,
    330  1.209.4.2  jmcneill };
    331  1.209.4.2  jmcneill 
    332  1.209.4.2  jmcneill const struct usbd_pipe_methods uhci_root_ctrl_methods = {
    333  1.209.4.2  jmcneill 	uhci_root_ctrl_transfer,
    334  1.209.4.2  jmcneill 	uhci_root_ctrl_start,
    335  1.209.4.2  jmcneill 	uhci_root_ctrl_abort,
    336  1.209.4.2  jmcneill 	uhci_root_ctrl_close,
    337  1.209.4.2  jmcneill 	uhci_noop,
    338  1.209.4.2  jmcneill 	uhci_root_ctrl_done,
    339  1.209.4.2  jmcneill };
    340  1.209.4.2  jmcneill 
    341  1.209.4.2  jmcneill const struct usbd_pipe_methods uhci_root_intr_methods = {
    342  1.209.4.2  jmcneill 	uhci_root_intr_transfer,
    343  1.209.4.2  jmcneill 	uhci_root_intr_start,
    344  1.209.4.2  jmcneill 	uhci_root_intr_abort,
    345  1.209.4.2  jmcneill 	uhci_root_intr_close,
    346  1.209.4.2  jmcneill 	uhci_noop,
    347  1.209.4.2  jmcneill 	uhci_root_intr_done,
    348  1.209.4.2  jmcneill };
    349  1.209.4.2  jmcneill 
    350  1.209.4.2  jmcneill const struct usbd_pipe_methods uhci_device_ctrl_methods = {
    351  1.209.4.2  jmcneill 	uhci_device_ctrl_transfer,
    352  1.209.4.2  jmcneill 	uhci_device_ctrl_start,
    353  1.209.4.2  jmcneill 	uhci_device_ctrl_abort,
    354  1.209.4.2  jmcneill 	uhci_device_ctrl_close,
    355  1.209.4.2  jmcneill 	uhci_noop,
    356  1.209.4.2  jmcneill 	uhci_device_ctrl_done,
    357  1.209.4.2  jmcneill };
    358  1.209.4.2  jmcneill 
    359  1.209.4.2  jmcneill const struct usbd_pipe_methods uhci_device_intr_methods = {
    360  1.209.4.2  jmcneill 	uhci_device_intr_transfer,
    361  1.209.4.2  jmcneill 	uhci_device_intr_start,
    362  1.209.4.2  jmcneill 	uhci_device_intr_abort,
    363  1.209.4.2  jmcneill 	uhci_device_intr_close,
    364  1.209.4.2  jmcneill 	uhci_device_clear_toggle,
    365  1.209.4.2  jmcneill 	uhci_device_intr_done,
    366  1.209.4.2  jmcneill };
    367  1.209.4.2  jmcneill 
    368  1.209.4.2  jmcneill const struct usbd_pipe_methods uhci_device_bulk_methods = {
    369  1.209.4.2  jmcneill 	uhci_device_bulk_transfer,
    370  1.209.4.2  jmcneill 	uhci_device_bulk_start,
    371  1.209.4.2  jmcneill 	uhci_device_bulk_abort,
    372  1.209.4.2  jmcneill 	uhci_device_bulk_close,
    373  1.209.4.2  jmcneill 	uhci_device_clear_toggle,
    374  1.209.4.2  jmcneill 	uhci_device_bulk_done,
    375  1.209.4.2  jmcneill };
    376  1.209.4.2  jmcneill 
    377  1.209.4.2  jmcneill const struct usbd_pipe_methods uhci_device_isoc_methods = {
    378  1.209.4.2  jmcneill 	uhci_device_isoc_transfer,
    379  1.209.4.2  jmcneill 	uhci_device_isoc_start,
    380  1.209.4.2  jmcneill 	uhci_device_isoc_abort,
    381  1.209.4.2  jmcneill 	uhci_device_isoc_close,
    382  1.209.4.2  jmcneill 	uhci_noop,
    383  1.209.4.2  jmcneill 	uhci_device_isoc_done,
    384  1.209.4.2  jmcneill };
    385  1.209.4.2  jmcneill 
    386  1.209.4.2  jmcneill #define uhci_add_intr_info(sc, ii) \
    387  1.209.4.2  jmcneill 	LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list)
    388  1.209.4.2  jmcneill #define uhci_del_intr_info(ii) \
    389  1.209.4.2  jmcneill 	do { \
    390  1.209.4.2  jmcneill 		LIST_REMOVE((ii), list); \
    391  1.209.4.2  jmcneill 		(ii)->list.le_prev = NULL; \
    392  1.209.4.2  jmcneill 	} while (0)
    393  1.209.4.2  jmcneill #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL)
    394  1.209.4.2  jmcneill 
    395  1.209.4.2  jmcneill Static inline uhci_soft_qh_t *
    396  1.209.4.2  jmcneill uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh)
    397  1.209.4.2  jmcneill {
    398  1.209.4.2  jmcneill 	DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh));
    399  1.209.4.2  jmcneill 
    400  1.209.4.2  jmcneill 	for (; pqh->hlink != sqh; pqh = pqh->hlink) {
    401  1.209.4.2  jmcneill #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG)
    402  1.209.4.2  jmcneill 		if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) {
    403  1.209.4.2  jmcneill 			printf("uhci_find_prev_qh: QH not found\n");
    404  1.209.4.2  jmcneill 			return (NULL);
    405  1.209.4.2  jmcneill 		}
    406  1.209.4.2  jmcneill #endif
    407  1.209.4.2  jmcneill 	}
    408  1.209.4.2  jmcneill 	return (pqh);
    409  1.209.4.2  jmcneill }
    410  1.209.4.2  jmcneill 
    411  1.209.4.2  jmcneill void
    412  1.209.4.2  jmcneill uhci_globalreset(uhci_softc_t *sc)
    413  1.209.4.2  jmcneill {
    414  1.209.4.2  jmcneill 	UHCICMD(sc, UHCI_CMD_GRESET);	/* global reset */
    415  1.209.4.2  jmcneill 	usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
    416  1.209.4.2  jmcneill 	UHCICMD(sc, 0);			/* do nothing */
    417  1.209.4.2  jmcneill }
    418  1.209.4.2  jmcneill 
    419  1.209.4.2  jmcneill usbd_status
    420  1.209.4.2  jmcneill uhci_init(uhci_softc_t *sc)
    421  1.209.4.2  jmcneill {
    422  1.209.4.2  jmcneill 	usbd_status err;
    423  1.209.4.2  jmcneill 	int i, j;
    424  1.209.4.2  jmcneill 	uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh;
    425  1.209.4.2  jmcneill 	uhci_soft_td_t *std;
    426  1.209.4.2  jmcneill 
    427  1.209.4.2  jmcneill 	DPRINTFN(1,("uhci_init: start\n"));
    428  1.209.4.2  jmcneill 
    429  1.209.4.2  jmcneill #ifdef UHCI_DEBUG
    430  1.209.4.2  jmcneill 	thesc = sc;
    431  1.209.4.2  jmcneill 
    432  1.209.4.2  jmcneill 	if (uhcidebug > 2)
    433  1.209.4.2  jmcneill 		uhci_dumpregs(sc);
    434  1.209.4.2  jmcneill #endif
    435  1.209.4.2  jmcneill 
    436  1.209.4.2  jmcneill 	UWRITE2(sc, UHCI_INTR, 0);		/* disable interrupts */
    437  1.209.4.2  jmcneill 	uhci_globalreset(sc);			/* reset the controller */
    438  1.209.4.2  jmcneill 	uhci_reset(sc);
    439  1.209.4.2  jmcneill 
    440  1.209.4.2  jmcneill #ifdef __NetBSD__
    441  1.209.4.2  jmcneill 	usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
    442  1.209.4.2  jmcneill 	    USB_MEM_RESERVE);
    443  1.209.4.2  jmcneill #endif
    444  1.209.4.2  jmcneill 
    445  1.209.4.2  jmcneill 	/* Allocate and initialize real frame array. */
    446  1.209.4.2  jmcneill 	err = usb_allocmem(&sc->sc_bus,
    447  1.209.4.2  jmcneill 		  UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
    448  1.209.4.2  jmcneill 		  UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
    449  1.209.4.2  jmcneill 	if (err)
    450  1.209.4.2  jmcneill 		return (err);
    451  1.209.4.2  jmcneill 	sc->sc_pframes = KERNADDR(&sc->sc_dma, 0);
    452  1.209.4.2  jmcneill 	UWRITE2(sc, UHCI_FRNUM, 0);		/* set frame number to 0 */
    453  1.209.4.2  jmcneill 	UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/
    454  1.209.4.2  jmcneill 
    455  1.209.4.2  jmcneill 	/*
    456  1.209.4.2  jmcneill 	 * Allocate a TD, inactive, that hangs from the last QH.
    457  1.209.4.2  jmcneill 	 * This is to avoid a bug in the PIIX that makes it run berserk
    458  1.209.4.2  jmcneill 	 * otherwise.
    459  1.209.4.2  jmcneill 	 */
    460  1.209.4.2  jmcneill 	std = uhci_alloc_std(sc);
    461  1.209.4.2  jmcneill 	if (std == NULL)
    462  1.209.4.2  jmcneill 		return (USBD_NOMEM);
    463  1.209.4.2  jmcneill 	std->link.std = NULL;
    464  1.209.4.2  jmcneill 	std->td.td_link = htole32(UHCI_PTR_T);
    465  1.209.4.2  jmcneill 	std->td.td_status = htole32(0); /* inactive */
    466  1.209.4.2  jmcneill 	std->td.td_token = htole32(0);
    467  1.209.4.2  jmcneill 	std->td.td_buffer = htole32(0);
    468  1.209.4.2  jmcneill 
    469  1.209.4.2  jmcneill 	/* Allocate the dummy QH marking the end and used for looping the QHs.*/
    470  1.209.4.2  jmcneill 	lsqh = uhci_alloc_sqh(sc);
    471  1.209.4.2  jmcneill 	if (lsqh == NULL)
    472  1.209.4.2  jmcneill 		return (USBD_NOMEM);
    473  1.209.4.2  jmcneill 	lsqh->hlink = NULL;
    474  1.209.4.2  jmcneill 	lsqh->qh.qh_hlink = htole32(UHCI_PTR_T);	/* end of QH chain */
    475  1.209.4.2  jmcneill 	lsqh->elink = std;
    476  1.209.4.2  jmcneill 	lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD);
    477  1.209.4.2  jmcneill 	sc->sc_last_qh = lsqh;
    478  1.209.4.2  jmcneill 
    479  1.209.4.2  jmcneill 	/* Allocate the dummy QH where bulk traffic will be queued. */
    480  1.209.4.2  jmcneill 	bsqh = uhci_alloc_sqh(sc);
    481  1.209.4.2  jmcneill 	if (bsqh == NULL)
    482  1.209.4.2  jmcneill 		return (USBD_NOMEM);
    483  1.209.4.2  jmcneill 	bsqh->hlink = lsqh;
    484  1.209.4.2  jmcneill 	bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH);
    485  1.209.4.2  jmcneill 	bsqh->elink = NULL;
    486  1.209.4.2  jmcneill 	bsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    487  1.209.4.2  jmcneill 	sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
    488  1.209.4.2  jmcneill 
    489  1.209.4.2  jmcneill 	/* Allocate dummy QH where high speed control traffic will be queued. */
    490  1.209.4.2  jmcneill 	chsqh = uhci_alloc_sqh(sc);
    491  1.209.4.2  jmcneill 	if (chsqh == NULL)
    492  1.209.4.2  jmcneill 		return (USBD_NOMEM);
    493  1.209.4.2  jmcneill 	chsqh->hlink = bsqh;
    494  1.209.4.2  jmcneill 	chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH);
    495  1.209.4.2  jmcneill 	chsqh->elink = NULL;
    496  1.209.4.2  jmcneill 	chsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    497  1.209.4.2  jmcneill 	sc->sc_hctl_start = sc->sc_hctl_end = chsqh;
    498  1.209.4.2  jmcneill 
    499  1.209.4.2  jmcneill 	/* Allocate dummy QH where control traffic will be queued. */
    500  1.209.4.2  jmcneill 	clsqh = uhci_alloc_sqh(sc);
    501  1.209.4.2  jmcneill 	if (clsqh == NULL)
    502  1.209.4.2  jmcneill 		return (USBD_NOMEM);
    503  1.209.4.2  jmcneill 	clsqh->hlink = bsqh;
    504  1.209.4.2  jmcneill 	clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH);
    505  1.209.4.2  jmcneill 	clsqh->elink = NULL;
    506  1.209.4.2  jmcneill 	clsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    507  1.209.4.2  jmcneill 	sc->sc_lctl_start = sc->sc_lctl_end = clsqh;
    508  1.209.4.2  jmcneill 
    509  1.209.4.2  jmcneill 	/*
    510  1.209.4.2  jmcneill 	 * Make all (virtual) frame list pointers point to the interrupt
    511  1.209.4.2  jmcneill 	 * queue heads and the interrupt queue heads at the control
    512  1.209.4.2  jmcneill 	 * queue head and point the physical frame list to the virtual.
    513  1.209.4.2  jmcneill 	 */
    514  1.209.4.2  jmcneill 	for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
    515  1.209.4.2  jmcneill 		std = uhci_alloc_std(sc);
    516  1.209.4.2  jmcneill 		sqh = uhci_alloc_sqh(sc);
    517  1.209.4.2  jmcneill 		if (std == NULL || sqh == NULL)
    518  1.209.4.2  jmcneill 			return (USBD_NOMEM);
    519  1.209.4.2  jmcneill 		std->link.sqh = sqh;
    520  1.209.4.2  jmcneill 		std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH);
    521  1.209.4.2  jmcneill 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
    522  1.209.4.2  jmcneill 		std->td.td_token = htole32(0);
    523  1.209.4.2  jmcneill 		std->td.td_buffer = htole32(0);
    524  1.209.4.2  jmcneill 		sqh->hlink = clsqh;
    525  1.209.4.2  jmcneill 		sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH);
    526  1.209.4.2  jmcneill 		sqh->elink = NULL;
    527  1.209.4.2  jmcneill 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
    528  1.209.4.2  jmcneill 		sc->sc_vframes[i].htd = std;
    529  1.209.4.2  jmcneill 		sc->sc_vframes[i].etd = std;
    530  1.209.4.2  jmcneill 		sc->sc_vframes[i].hqh = sqh;
    531  1.209.4.2  jmcneill 		sc->sc_vframes[i].eqh = sqh;
    532  1.209.4.2  jmcneill 		for (j = i;
    533  1.209.4.2  jmcneill 		     j < UHCI_FRAMELIST_COUNT;
    534  1.209.4.2  jmcneill 		     j += UHCI_VFRAMELIST_COUNT)
    535  1.209.4.2  jmcneill 			sc->sc_pframes[j] = htole32(std->physaddr);
    536  1.209.4.2  jmcneill 	}
    537  1.209.4.2  jmcneill 
    538  1.209.4.2  jmcneill 	LIST_INIT(&sc->sc_intrhead);
    539  1.209.4.2  jmcneill 
    540  1.209.4.2  jmcneill 	SIMPLEQ_INIT(&sc->sc_free_xfers);
    541  1.209.4.2  jmcneill 
    542  1.209.4.2  jmcneill 	usb_callout_init(sc->sc_poll_handle);
    543  1.209.4.2  jmcneill 
    544  1.209.4.2  jmcneill 	/* Set up the bus struct. */
    545  1.209.4.2  jmcneill 	sc->sc_bus.methods = &uhci_bus_methods;
    546  1.209.4.2  jmcneill 	sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
    547  1.209.4.2  jmcneill 
    548  1.209.4.2  jmcneill #if defined(__NetBSD__) || defined(__OpenBSD__)
    549  1.209.4.2  jmcneill 	sc->sc_suspend = PWR_RESUME;
    550  1.209.4.2  jmcneill 	sc->sc_powerhook = powerhook_establish(USBDEVNAME(sc->sc_bus.bdev),
    551  1.209.4.2  jmcneill 	    uhci_power, sc);
    552  1.209.4.2  jmcneill 	sc->sc_shutdownhook = shutdownhook_establish(uhci_shutdown, sc);
    553  1.209.4.2  jmcneill #endif
    554  1.209.4.2  jmcneill 
    555  1.209.4.2  jmcneill 	UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */
    556  1.209.4.2  jmcneill 
    557  1.209.4.2  jmcneill 	DPRINTFN(1,("uhci_init: enabling\n"));
    558  1.209.4.2  jmcneill 	UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
    559  1.209.4.2  jmcneill 		UHCI_INTR_IOCE | UHCI_INTR_SPIE);	/* enable interrupts */
    560  1.209.4.2  jmcneill 
    561  1.209.4.2  jmcneill 	return (uhci_run(sc, 1));		/* and here we go... */
    562  1.209.4.2  jmcneill }
    563  1.209.4.2  jmcneill 
    564  1.209.4.2  jmcneill #if defined(__NetBSD__) || defined(__OpenBSD__)
    565  1.209.4.2  jmcneill int
    566  1.209.4.2  jmcneill uhci_activate(device_ptr_t self, enum devact act)
    567  1.209.4.2  jmcneill {
    568  1.209.4.2  jmcneill 	struct uhci_softc *sc = (struct uhci_softc *)self;
    569  1.209.4.2  jmcneill 	int rv = 0;
    570  1.209.4.2  jmcneill 
    571  1.209.4.2  jmcneill 	switch (act) {
    572  1.209.4.2  jmcneill 	case DVACT_ACTIVATE:
    573  1.209.4.2  jmcneill 		return (EOPNOTSUPP);
    574  1.209.4.2  jmcneill 
    575  1.209.4.2  jmcneill 	case DVACT_DEACTIVATE:
    576  1.209.4.2  jmcneill 		if (sc->sc_child != NULL)
    577  1.209.4.2  jmcneill 			rv = config_deactivate(sc->sc_child);
    578  1.209.4.2  jmcneill 		break;
    579  1.209.4.2  jmcneill 	}
    580  1.209.4.2  jmcneill 	return (rv);
    581  1.209.4.2  jmcneill }
    582  1.209.4.2  jmcneill 
    583  1.209.4.2  jmcneill int
    584  1.209.4.2  jmcneill uhci_detach(struct uhci_softc *sc, int flags)
    585  1.209.4.2  jmcneill {
    586  1.209.4.2  jmcneill 	usbd_xfer_handle xfer;
    587  1.209.4.2  jmcneill 	int rv = 0;
    588  1.209.4.2  jmcneill 
    589  1.209.4.2  jmcneill 	if (sc->sc_child != NULL)
    590  1.209.4.2  jmcneill 		rv = config_detach(sc->sc_child, flags);
    591  1.209.4.2  jmcneill 
    592  1.209.4.2  jmcneill 	if (rv != 0)
    593  1.209.4.2  jmcneill 		return (rv);
    594  1.209.4.2  jmcneill 
    595  1.209.4.2  jmcneill #if defined(__NetBSD__) || defined(__OpenBSD__)
    596  1.209.4.2  jmcneill 	powerhook_disestablish(sc->sc_powerhook);
    597  1.209.4.2  jmcneill 	shutdownhook_disestablish(sc->sc_shutdownhook);
    598  1.209.4.2  jmcneill #endif
    599  1.209.4.2  jmcneill 
    600  1.209.4.2  jmcneill 	/* Free all xfers associated with this HC. */
    601  1.209.4.2  jmcneill 	for (;;) {
    602  1.209.4.2  jmcneill 		xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
    603  1.209.4.2  jmcneill 		if (xfer == NULL)
    604  1.209.4.2  jmcneill 			break;
    605  1.209.4.2  jmcneill 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
    606  1.209.4.2  jmcneill 		free(xfer, M_USB);
    607  1.209.4.2  jmcneill 	}
    608  1.209.4.2  jmcneill 
    609  1.209.4.2  jmcneill 	/* XXX free other data structures XXX */
    610  1.209.4.2  jmcneill 
    611  1.209.4.2  jmcneill 	return (rv);
    612  1.209.4.2  jmcneill }
    613  1.209.4.2  jmcneill #endif
    614  1.209.4.2  jmcneill 
    615  1.209.4.2  jmcneill usbd_status
    616  1.209.4.2  jmcneill uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
    617  1.209.4.2  jmcneill {
    618  1.209.4.2  jmcneill 	struct uhci_softc *sc = (struct uhci_softc *)bus;
    619  1.209.4.2  jmcneill 	usbd_status status;
    620  1.209.4.2  jmcneill 	u_int32_t n;
    621  1.209.4.2  jmcneill 
    622  1.209.4.2  jmcneill 	/*
    623  1.209.4.2  jmcneill 	 * XXX
    624  1.209.4.2  jmcneill 	 * Since we are allocating a buffer we can assume that we will
    625  1.209.4.2  jmcneill 	 * need TDs for it.  Since we don't want to allocate those from
    626  1.209.4.2  jmcneill 	 * an interrupt context, we allocate them here and free them again.
    627  1.209.4.2  jmcneill 	 * This is no guarantee that we'll get the TDs next time...
    628  1.209.4.2  jmcneill 	 */
    629  1.209.4.2  jmcneill 	n = size / 8;
    630  1.209.4.2  jmcneill 	if (n > 16) {
    631  1.209.4.2  jmcneill 		u_int32_t i;
    632  1.209.4.2  jmcneill 		uhci_soft_td_t **stds;
    633  1.209.4.2  jmcneill 		DPRINTF(("uhci_allocm: get %d TDs\n", n));
    634  1.209.4.2  jmcneill 		stds = malloc(sizeof(uhci_soft_td_t *) * n, M_TEMP,
    635  1.209.4.2  jmcneill 		    M_WAITOK|M_ZERO);
    636  1.209.4.2  jmcneill 		for(i=0; i < n; i++)
    637  1.209.4.2  jmcneill 			stds[i] = uhci_alloc_std(sc);
    638  1.209.4.2  jmcneill 		for(i=0; i < n; i++)
    639  1.209.4.2  jmcneill 			if (stds[i] != NULL)
    640  1.209.4.2  jmcneill 				uhci_free_std(sc, stds[i]);
    641  1.209.4.2  jmcneill 		free(stds, M_TEMP);
    642  1.209.4.2  jmcneill 	}
    643  1.209.4.2  jmcneill 
    644  1.209.4.2  jmcneill 
    645  1.209.4.2  jmcneill 	status = usb_allocmem(&sc->sc_bus, size, 0, dma);
    646  1.209.4.2  jmcneill #ifdef __NetBSD__
    647  1.209.4.2  jmcneill 	if (status == USBD_NOMEM)
    648  1.209.4.2  jmcneill 		status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
    649  1.209.4.2  jmcneill #endif
    650  1.209.4.2  jmcneill 	return status;
    651  1.209.4.2  jmcneill }
    652  1.209.4.2  jmcneill 
    653  1.209.4.2  jmcneill void
    654  1.209.4.2  jmcneill uhci_freem(struct usbd_bus *bus, usb_dma_t *dma)
    655  1.209.4.2  jmcneill {
    656  1.209.4.2  jmcneill #ifdef __NetBSD__
    657  1.209.4.2  jmcneill 	if (dma->block->flags & USB_DMA_RESERVE) {
    658  1.209.4.2  jmcneill 		usb_reserve_freem(&((struct uhci_softc *)bus)->sc_dma_reserve,
    659  1.209.4.2  jmcneill 		    dma);
    660  1.209.4.2  jmcneill 		return;
    661  1.209.4.2  jmcneill 	}
    662  1.209.4.2  jmcneill #endif
    663  1.209.4.2  jmcneill 	usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma);
    664  1.209.4.2  jmcneill }
    665  1.209.4.2  jmcneill 
    666  1.209.4.2  jmcneill usbd_xfer_handle
    667  1.209.4.2  jmcneill uhci_allocx(struct usbd_bus *bus)
    668  1.209.4.2  jmcneill {
    669  1.209.4.2  jmcneill 	struct uhci_softc *sc = (struct uhci_softc *)bus;
    670  1.209.4.2  jmcneill 	usbd_xfer_handle xfer;
    671  1.209.4.2  jmcneill 
    672  1.209.4.2  jmcneill 	xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
    673  1.209.4.2  jmcneill 	if (xfer != NULL) {
    674  1.209.4.2  jmcneill 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
    675  1.209.4.2  jmcneill #ifdef DIAGNOSTIC
    676  1.209.4.2  jmcneill 		if (xfer->busy_free != XFER_FREE) {
    677  1.209.4.2  jmcneill 			printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer,
    678  1.209.4.2  jmcneill 			       xfer->busy_free);
    679  1.209.4.2  jmcneill 		}
    680  1.209.4.2  jmcneill #endif
    681  1.209.4.2  jmcneill 	} else {
    682  1.209.4.2  jmcneill 		xfer = malloc(sizeof(struct uhci_xfer), M_USB, M_NOWAIT);
    683  1.209.4.2  jmcneill 	}
    684  1.209.4.2  jmcneill 	if (xfer != NULL) {
    685  1.209.4.2  jmcneill 		memset(xfer, 0, sizeof (struct uhci_xfer));
    686  1.209.4.2  jmcneill 		UXFER(xfer)->iinfo.sc = sc;
    687  1.209.4.2  jmcneill #ifdef DIAGNOSTIC
    688  1.209.4.2  jmcneill 		UXFER(xfer)->iinfo.isdone = 1;
    689  1.209.4.2  jmcneill 		xfer->busy_free = XFER_BUSY;
    690  1.209.4.2  jmcneill #endif
    691  1.209.4.2  jmcneill 	}
    692  1.209.4.2  jmcneill 	return (xfer);
    693  1.209.4.2  jmcneill }
    694  1.209.4.2  jmcneill 
    695  1.209.4.2  jmcneill void
    696  1.209.4.2  jmcneill uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
    697  1.209.4.2  jmcneill {
    698  1.209.4.2  jmcneill 	struct uhci_softc *sc = (struct uhci_softc *)bus;
    699  1.209.4.2  jmcneill 
    700  1.209.4.2  jmcneill #ifdef DIAGNOSTIC
    701  1.209.4.2  jmcneill 	if (xfer->busy_free != XFER_BUSY) {
    702  1.209.4.2  jmcneill 		printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer,
    703  1.209.4.2  jmcneill 		       xfer->busy_free);
    704  1.209.4.2  jmcneill 	}
    705  1.209.4.2  jmcneill 	xfer->busy_free = XFER_FREE;
    706  1.209.4.2  jmcneill 	if (!UXFER(xfer)->iinfo.isdone) {
    707  1.209.4.2  jmcneill 		printf("uhci_freex: !isdone\n");
    708  1.209.4.2  jmcneill 	}
    709  1.209.4.2  jmcneill #endif
    710  1.209.4.2  jmcneill 	SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
    711  1.209.4.2  jmcneill }
    712  1.209.4.2  jmcneill 
    713  1.209.4.2  jmcneill /*
    714  1.209.4.2  jmcneill  * Shut down the controller when the system is going down.
    715  1.209.4.2  jmcneill  */
    716  1.209.4.2  jmcneill void
    717  1.209.4.2  jmcneill uhci_shutdown(void *v)
    718  1.209.4.2  jmcneill {
    719  1.209.4.2  jmcneill 	uhci_softc_t *sc = v;
    720  1.209.4.2  jmcneill 	int s;
    721  1.209.4.2  jmcneill 
    722  1.209.4.2  jmcneill 	DPRINTF(("uhci_shutdown: stopping the HC\n"));
    723  1.209.4.2  jmcneill 
    724  1.209.4.2  jmcneill 	/*
    725  1.209.4.2  jmcneill 	 * Use polling mode to prevent the interrupts shutting
    726  1.209.4.2  jmcneill 	 * us down before we shut them down.
    727  1.209.4.2  jmcneill 	 */
    728  1.209.4.2  jmcneill 	s = splhardusb();
    729  1.209.4.2  jmcneill 	sc->sc_bus.use_polling++;
    730  1.209.4.2  jmcneill 	uhci_run(sc, 0); /* stop the controller */
    731  1.209.4.2  jmcneill 	sc->sc_bus.use_polling--;
    732  1.209.4.2  jmcneill 	splx(s);
    733  1.209.4.2  jmcneill }
    734  1.209.4.2  jmcneill 
    735  1.209.4.2  jmcneill /*
    736  1.209.4.2  jmcneill  * Handle suspend/resume.
    737  1.209.4.2  jmcneill  *
    738  1.209.4.2  jmcneill  * We need to switch to polling mode here, because this routine is
    739  1.209.4.2  jmcneill  * called from an interrupt context.  This is all right since we
    740  1.209.4.2  jmcneill  * are almost suspended anyway.
    741  1.209.4.2  jmcneill  */
    742  1.209.4.2  jmcneill void
    743  1.209.4.2  jmcneill uhci_power(int why, void *v)
    744  1.209.4.2  jmcneill {
    745  1.209.4.2  jmcneill 	uhci_softc_t *sc = v;
    746  1.209.4.2  jmcneill 	int cmd;
    747  1.209.4.2  jmcneill 	int s;
    748  1.209.4.2  jmcneill 
    749  1.209.4.2  jmcneill 	s = splhardusb();
    750  1.209.4.2  jmcneill 	cmd = UREAD2(sc, UHCI_CMD);
    751  1.209.4.2  jmcneill 
    752  1.209.4.2  jmcneill 	DPRINTF(("uhci_power: sc=%p, why=%d (was %d), cmd=0x%x\n",
    753  1.209.4.2  jmcneill 		 sc, why, sc->sc_suspend, cmd));
    754  1.209.4.2  jmcneill 
    755  1.209.4.2  jmcneill 	switch (why) {
    756  1.209.4.2  jmcneill 	case PWR_SUSPEND:
    757  1.209.4.2  jmcneill 	case PWR_STANDBY:
    758  1.209.4.2  jmcneill #ifdef UHCI_DEBUG
    759  1.209.4.2  jmcneill 		if (uhcidebug > 2)
    760  1.209.4.2  jmcneill 			uhci_dumpregs(sc);
    761  1.209.4.2  jmcneill #endif
    762  1.209.4.2  jmcneill 		if (sc->sc_intr_xfer != NULL)
    763  1.209.4.2  jmcneill 			usb_uncallout(sc->sc_poll_handle, uhci_poll_hub,
    764  1.209.4.2  jmcneill 			    sc->sc_intr_xfer);
    765  1.209.4.2  jmcneill 		sc->sc_bus.use_polling++;
    766  1.209.4.2  jmcneill 		uhci_run(sc, 0); /* stop the controller */
    767  1.209.4.2  jmcneill 		cmd &= ~UHCI_CMD_RS;
    768  1.209.4.2  jmcneill 
    769  1.209.4.2  jmcneill 		/* save some state if BIOS doesn't */
    770  1.209.4.2  jmcneill 		sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM);
    771  1.209.4.2  jmcneill 		sc->sc_saved_sof = UREAD1(sc, UHCI_SOF);
    772  1.209.4.2  jmcneill 
    773  1.209.4.2  jmcneill 		UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */
    774  1.209.4.2  jmcneill 
    775  1.209.4.2  jmcneill 		UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */
    776  1.209.4.2  jmcneill 		usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
    777  1.209.4.2  jmcneill 		sc->sc_suspend = why;
    778  1.209.4.2  jmcneill 		sc->sc_bus.use_polling--;
    779  1.209.4.2  jmcneill 		DPRINTF(("uhci_power: cmd=0x%x\n", UREAD2(sc, UHCI_CMD)));
    780  1.209.4.2  jmcneill 		break;
    781  1.209.4.2  jmcneill 	case PWR_RESUME:
    782  1.209.4.2  jmcneill #ifdef DIAGNOSTIC
    783  1.209.4.2  jmcneill 		if (sc->sc_suspend == PWR_RESUME)
    784  1.209.4.2  jmcneill 			printf("uhci_power: weird, resume without suspend.\n");
    785  1.209.4.2  jmcneill #endif
    786  1.209.4.2  jmcneill 		sc->sc_bus.use_polling++;
    787  1.209.4.2  jmcneill 		sc->sc_suspend = why;
    788  1.209.4.2  jmcneill 		if (cmd & UHCI_CMD_RS)
    789  1.209.4.2  jmcneill 			uhci_run(sc, 0); /* in case BIOS has started it */
    790  1.209.4.2  jmcneill 
    791  1.209.4.2  jmcneill 		/* restore saved state */
    792  1.209.4.2  jmcneill 		UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0));
    793  1.209.4.2  jmcneill 		UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum);
    794  1.209.4.2  jmcneill 		UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof);
    795  1.209.4.2  jmcneill 
    796  1.209.4.2  jmcneill 		UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */
    797  1.209.4.2  jmcneill 		usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
    798  1.209.4.2  jmcneill 		UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
    799  1.209.4.2  jmcneill 		UHCICMD(sc, UHCI_CMD_MAXP);
    800  1.209.4.2  jmcneill 		UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
    801  1.209.4.2  jmcneill 			UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */
    802  1.209.4.2  jmcneill 		uhci_run(sc, 1); /* and start traffic again */
    803  1.209.4.2  jmcneill 		usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
    804  1.209.4.2  jmcneill 		sc->sc_bus.use_polling--;
    805  1.209.4.2  jmcneill 		if (sc->sc_intr_xfer != NULL)
    806  1.209.4.2  jmcneill 			usb_callout(sc->sc_poll_handle, sc->sc_ival,
    807  1.209.4.2  jmcneill 				    uhci_poll_hub, sc->sc_intr_xfer);
    808  1.209.4.2  jmcneill #ifdef UHCI_DEBUG
    809  1.209.4.2  jmcneill 		if (uhcidebug > 2)
    810  1.209.4.2  jmcneill 			uhci_dumpregs(sc);
    811  1.209.4.2  jmcneill #endif
    812  1.209.4.2  jmcneill 		break;
    813  1.209.4.2  jmcneill 	case PWR_SOFTSUSPEND:
    814  1.209.4.2  jmcneill 	case PWR_SOFTSTANDBY:
    815  1.209.4.2  jmcneill 	case PWR_SOFTRESUME:
    816  1.209.4.2  jmcneill 		break;
    817  1.209.4.2  jmcneill 	}
    818  1.209.4.2  jmcneill 	splx(s);
    819  1.209.4.2  jmcneill }
    820  1.209.4.2  jmcneill 
    821  1.209.4.2  jmcneill #ifdef UHCI_DEBUG
    822  1.209.4.2  jmcneill Static void
    823  1.209.4.2  jmcneill uhci_dumpregs(uhci_softc_t *sc)
    824  1.209.4.2  jmcneill {
    825  1.209.4.2  jmcneill 	DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
    826  1.209.4.2  jmcneill 		     "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
    827  1.209.4.2  jmcneill 		     USBDEVNAME(sc->sc_bus.bdev),
    828  1.209.4.2  jmcneill 		     UREAD2(sc, UHCI_CMD),
    829  1.209.4.2  jmcneill 		     UREAD2(sc, UHCI_STS),
    830  1.209.4.2  jmcneill 		     UREAD2(sc, UHCI_INTR),
    831  1.209.4.2  jmcneill 		     UREAD2(sc, UHCI_FRNUM),
    832  1.209.4.2  jmcneill 		     UREAD4(sc, UHCI_FLBASEADDR),
    833  1.209.4.2  jmcneill 		     UREAD1(sc, UHCI_SOF),
    834  1.209.4.2  jmcneill 		     UREAD2(sc, UHCI_PORTSC1),
    835  1.209.4.2  jmcneill 		     UREAD2(sc, UHCI_PORTSC2)));
    836  1.209.4.2  jmcneill }
    837  1.209.4.2  jmcneill 
    838  1.209.4.2  jmcneill void
    839  1.209.4.2  jmcneill uhci_dump_td(uhci_soft_td_t *p)
    840  1.209.4.2  jmcneill {
    841  1.209.4.2  jmcneill 	char sbuf[128], sbuf2[128];
    842  1.209.4.2  jmcneill 
    843  1.209.4.2  jmcneill 	DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
    844  1.209.4.2  jmcneill 		     "token=0x%08lx buffer=0x%08lx\n",
    845  1.209.4.2  jmcneill 		     p, (long)p->physaddr,
    846  1.209.4.2  jmcneill 		     (long)le32toh(p->td.td_link),
    847  1.209.4.2  jmcneill 		     (long)le32toh(p->td.td_status),
    848  1.209.4.2  jmcneill 		     (long)le32toh(p->td.td_token),
    849  1.209.4.2  jmcneill 		     (long)le32toh(p->td.td_buffer)));
    850  1.209.4.2  jmcneill 
    851  1.209.4.2  jmcneill 	bitmask_snprintf((u_int32_t)le32toh(p->td.td_link), "\20\1T\2Q\3VF",
    852  1.209.4.2  jmcneill 			 sbuf, sizeof(sbuf));
    853  1.209.4.2  jmcneill 	bitmask_snprintf((u_int32_t)le32toh(p->td.td_status),
    854  1.209.4.2  jmcneill 			 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
    855  1.209.4.2  jmcneill 			 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
    856  1.209.4.2  jmcneill 			 sbuf2, sizeof(sbuf2));
    857  1.209.4.2  jmcneill 
    858  1.209.4.2  jmcneill 	DPRINTFN(-1,("  %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
    859  1.209.4.2  jmcneill 		     "D=%d,maxlen=%d\n", sbuf, sbuf2,
    860  1.209.4.2  jmcneill 		     UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)),
    861  1.209.4.2  jmcneill 		     UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)),
    862  1.209.4.2  jmcneill 		     UHCI_TD_GET_PID(le32toh(p->td.td_token)),
    863  1.209.4.2  jmcneill 		     UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)),
    864  1.209.4.2  jmcneill 		     UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)),
    865  1.209.4.2  jmcneill 		     UHCI_TD_GET_DT(le32toh(p->td.td_token)),
    866  1.209.4.2  jmcneill 		     UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token))));
    867  1.209.4.2  jmcneill }
    868  1.209.4.2  jmcneill 
    869  1.209.4.2  jmcneill void
    870  1.209.4.2  jmcneill uhci_dump_qh(uhci_soft_qh_t *sqh)
    871  1.209.4.2  jmcneill {
    872  1.209.4.2  jmcneill 	DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh,
    873  1.209.4.2  jmcneill 	    (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink),
    874  1.209.4.2  jmcneill 	    le32toh(sqh->qh.qh_elink)));
    875  1.209.4.2  jmcneill }
    876  1.209.4.2  jmcneill 
    877  1.209.4.2  jmcneill 
    878  1.209.4.2  jmcneill #if 1
    879  1.209.4.2  jmcneill void
    880  1.209.4.2  jmcneill uhci_dump(void)
    881  1.209.4.2  jmcneill {
    882  1.209.4.2  jmcneill 	uhci_dump_all(thesc);
    883  1.209.4.2  jmcneill }
    884  1.209.4.2  jmcneill #endif
    885  1.209.4.2  jmcneill 
    886  1.209.4.2  jmcneill void
    887  1.209.4.2  jmcneill uhci_dump_all(uhci_softc_t *sc)
    888  1.209.4.2  jmcneill {
    889  1.209.4.2  jmcneill 	uhci_dumpregs(sc);
    890  1.209.4.2  jmcneill 	printf("intrs=%d\n", sc->sc_bus.no_intrs);
    891  1.209.4.2  jmcneill 	/*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/
    892  1.209.4.2  jmcneill 	uhci_dump_qh(sc->sc_lctl_start);
    893  1.209.4.2  jmcneill }
    894  1.209.4.2  jmcneill 
    895  1.209.4.2  jmcneill 
    896  1.209.4.2  jmcneill void
    897  1.209.4.2  jmcneill uhci_dump_qhs(uhci_soft_qh_t *sqh)
    898  1.209.4.2  jmcneill {
    899  1.209.4.2  jmcneill 	uhci_dump_qh(sqh);
    900  1.209.4.2  jmcneill 
    901  1.209.4.2  jmcneill 	/* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards
    902  1.209.4.2  jmcneill 	 * Traverses sideways first, then down.
    903  1.209.4.2  jmcneill 	 *
    904  1.209.4.2  jmcneill 	 * QH1
    905  1.209.4.2  jmcneill 	 * QH2
    906  1.209.4.2  jmcneill 	 * No QH
    907  1.209.4.2  jmcneill 	 * TD2.1
    908  1.209.4.2  jmcneill 	 * TD2.2
    909  1.209.4.2  jmcneill 	 * TD1.1
    910  1.209.4.2  jmcneill 	 * etc.
    911  1.209.4.2  jmcneill 	 *
    912  1.209.4.2  jmcneill 	 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
    913  1.209.4.2  jmcneill 	 */
    914  1.209.4.2  jmcneill 
    915  1.209.4.2  jmcneill 
    916  1.209.4.2  jmcneill 	if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T))
    917  1.209.4.2  jmcneill 		uhci_dump_qhs(sqh->hlink);
    918  1.209.4.2  jmcneill 	else
    919  1.209.4.2  jmcneill 		DPRINTF(("No QH\n"));
    920  1.209.4.2  jmcneill 
    921  1.209.4.2  jmcneill 	if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T))
    922  1.209.4.2  jmcneill 		uhci_dump_tds(sqh->elink);
    923  1.209.4.2  jmcneill 	else
    924  1.209.4.2  jmcneill 		DPRINTF(("No TD\n"));
    925  1.209.4.2  jmcneill }
    926  1.209.4.2  jmcneill 
    927  1.209.4.2  jmcneill void
    928  1.209.4.2  jmcneill uhci_dump_tds(uhci_soft_td_t *std)
    929  1.209.4.2  jmcneill {
    930  1.209.4.2  jmcneill 	uhci_soft_td_t *td;
    931  1.209.4.2  jmcneill 
    932  1.209.4.2  jmcneill 	for(td = std; td != NULL; td = td->link.std) {
    933  1.209.4.2  jmcneill 		uhci_dump_td(td);
    934  1.209.4.2  jmcneill 
    935  1.209.4.2  jmcneill 		/* Check whether the link pointer in this TD marks
    936  1.209.4.2  jmcneill 		 * the link pointer as end of queue. This avoids
    937  1.209.4.2  jmcneill 		 * printing the free list in case the queue/TD has
    938  1.209.4.2  jmcneill 		 * already been moved there (seatbelt).
    939  1.209.4.2  jmcneill 		 */
    940  1.209.4.2  jmcneill 		if (le32toh(td->td.td_link) & UHCI_PTR_T ||
    941  1.209.4.2  jmcneill 		    le32toh(td->td.td_link) == 0)
    942  1.209.4.2  jmcneill 			break;
    943  1.209.4.2  jmcneill 	}
    944  1.209.4.2  jmcneill }
    945  1.209.4.2  jmcneill 
    946  1.209.4.2  jmcneill Static void
    947  1.209.4.2  jmcneill uhci_dump_ii(uhci_intr_info_t *ii)
    948  1.209.4.2  jmcneill {
    949  1.209.4.2  jmcneill 	usbd_pipe_handle pipe;
    950  1.209.4.2  jmcneill 	usb_endpoint_descriptor_t *ed;
    951  1.209.4.2  jmcneill 	usbd_device_handle dev;
    952  1.209.4.2  jmcneill 
    953  1.209.4.2  jmcneill #ifdef DIAGNOSTIC
    954  1.209.4.2  jmcneill #define DONE ii->isdone
    955  1.209.4.2  jmcneill #else
    956  1.209.4.2  jmcneill #define DONE 0
    957  1.209.4.2  jmcneill #endif
    958  1.209.4.2  jmcneill         if (ii == NULL) {
    959  1.209.4.2  jmcneill                 printf("ii NULL\n");
    960  1.209.4.2  jmcneill                 return;
    961  1.209.4.2  jmcneill         }
    962  1.209.4.2  jmcneill         if (ii->xfer == NULL) {
    963  1.209.4.2  jmcneill 		printf("ii %p: done=%d xfer=NULL\n",
    964  1.209.4.2  jmcneill 		       ii, DONE);
    965  1.209.4.2  jmcneill                 return;
    966  1.209.4.2  jmcneill         }
    967  1.209.4.2  jmcneill         pipe = ii->xfer->pipe;
    968  1.209.4.2  jmcneill         if (pipe == NULL) {
    969  1.209.4.2  jmcneill 		printf("ii %p: done=%d xfer=%p pipe=NULL\n",
    970  1.209.4.2  jmcneill 		       ii, DONE, ii->xfer);
    971  1.209.4.2  jmcneill                 return;
    972  1.209.4.2  jmcneill 	}
    973  1.209.4.2  jmcneill         if (pipe->endpoint == NULL) {
    974  1.209.4.2  jmcneill 		printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n",
    975  1.209.4.2  jmcneill 		       ii, DONE, ii->xfer, pipe);
    976  1.209.4.2  jmcneill                 return;
    977  1.209.4.2  jmcneill 	}
    978  1.209.4.2  jmcneill         if (pipe->device == NULL) {
    979  1.209.4.2  jmcneill 		printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n",
    980  1.209.4.2  jmcneill 		       ii, DONE, ii->xfer, pipe);
    981  1.209.4.2  jmcneill                 return;
    982  1.209.4.2  jmcneill 	}
    983  1.209.4.2  jmcneill         ed = pipe->endpoint->edesc;
    984  1.209.4.2  jmcneill         dev = pipe->device;
    985  1.209.4.2  jmcneill 	printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n",
    986  1.209.4.2  jmcneill 	       ii, DONE, ii->xfer, dev,
    987  1.209.4.2  jmcneill 	       UGETW(dev->ddesc.idVendor),
    988  1.209.4.2  jmcneill 	       UGETW(dev->ddesc.idProduct),
    989  1.209.4.2  jmcneill 	       dev->address, pipe,
    990  1.209.4.2  jmcneill 	       ed->bEndpointAddress, ed->bmAttributes);
    991  1.209.4.2  jmcneill #undef DONE
    992  1.209.4.2  jmcneill }
    993  1.209.4.2  jmcneill 
    994  1.209.4.2  jmcneill void uhci_dump_iis(struct uhci_softc *sc);
    995  1.209.4.2  jmcneill void
    996  1.209.4.2  jmcneill uhci_dump_iis(struct uhci_softc *sc)
    997  1.209.4.2  jmcneill {
    998  1.209.4.2  jmcneill 	uhci_intr_info_t *ii;
    999  1.209.4.2  jmcneill 
   1000  1.209.4.2  jmcneill 	printf("intr_info list:\n");
   1001  1.209.4.2  jmcneill 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
   1002  1.209.4.2  jmcneill 		uhci_dump_ii(ii);
   1003  1.209.4.2  jmcneill }
   1004  1.209.4.2  jmcneill 
   1005  1.209.4.2  jmcneill void iidump(void);
   1006  1.209.4.2  jmcneill void iidump(void) { uhci_dump_iis(thesc); }
   1007  1.209.4.2  jmcneill 
   1008  1.209.4.2  jmcneill #endif
   1009  1.209.4.2  jmcneill 
   1010  1.209.4.2  jmcneill /*
   1011  1.209.4.2  jmcneill  * This routine is executed periodically and simulates interrupts
   1012  1.209.4.2  jmcneill  * from the root controller interrupt pipe for port status change.
   1013  1.209.4.2  jmcneill  */
   1014  1.209.4.2  jmcneill void
   1015  1.209.4.2  jmcneill uhci_poll_hub(void *addr)
   1016  1.209.4.2  jmcneill {
   1017  1.209.4.2  jmcneill 	usbd_xfer_handle xfer = addr;
   1018  1.209.4.2  jmcneill 	usbd_pipe_handle pipe = xfer->pipe;
   1019  1.209.4.2  jmcneill 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
   1020  1.209.4.2  jmcneill 	int s;
   1021  1.209.4.2  jmcneill 	u_char *p;
   1022  1.209.4.2  jmcneill 
   1023  1.209.4.2  jmcneill 	DPRINTFN(20, ("uhci_poll_hub\n"));
   1024  1.209.4.2  jmcneill 
   1025  1.209.4.2  jmcneill 	usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
   1026  1.209.4.2  jmcneill 
   1027  1.209.4.2  jmcneill 	p = KERNADDR(&xfer->dmabuf, 0);
   1028  1.209.4.2  jmcneill 	p[0] = 0;
   1029  1.209.4.2  jmcneill 	if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
   1030  1.209.4.2  jmcneill 		p[0] |= 1<<1;
   1031  1.209.4.2  jmcneill 	if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
   1032  1.209.4.2  jmcneill 		p[0] |= 1<<2;
   1033  1.209.4.2  jmcneill 	if (p[0] == 0)
   1034  1.209.4.2  jmcneill 		/* No change, try again in a while */
   1035  1.209.4.2  jmcneill 		return;
   1036  1.209.4.2  jmcneill 
   1037  1.209.4.2  jmcneill 	xfer->actlen = 1;
   1038  1.209.4.2  jmcneill 	xfer->status = USBD_NORMAL_COMPLETION;
   1039  1.209.4.2  jmcneill 	s = splusb();
   1040  1.209.4.2  jmcneill 	xfer->device->bus->intr_context++;
   1041  1.209.4.2  jmcneill 	usb_transfer_complete(xfer);
   1042  1.209.4.2  jmcneill 	xfer->device->bus->intr_context--;
   1043  1.209.4.2  jmcneill 	splx(s);
   1044  1.209.4.2  jmcneill }
   1045  1.209.4.2  jmcneill 
   1046  1.209.4.2  jmcneill void
   1047  1.209.4.2  jmcneill uhci_root_intr_done(usbd_xfer_handle xfer)
   1048  1.209.4.2  jmcneill {
   1049  1.209.4.2  jmcneill }
   1050  1.209.4.2  jmcneill 
   1051  1.209.4.2  jmcneill void
   1052  1.209.4.2  jmcneill uhci_root_ctrl_done(usbd_xfer_handle xfer)
   1053  1.209.4.2  jmcneill {
   1054  1.209.4.2  jmcneill }
   1055  1.209.4.2  jmcneill 
   1056  1.209.4.2  jmcneill /*
   1057  1.209.4.2  jmcneill  * Let the last QH loop back to the high speed control transfer QH.
   1058  1.209.4.2  jmcneill  * This is what intel calls "bandwidth reclamation" and improves
   1059  1.209.4.2  jmcneill  * USB performance a lot for some devices.
   1060  1.209.4.2  jmcneill  * If we are already looping, just count it.
   1061  1.209.4.2  jmcneill  */
   1062  1.209.4.2  jmcneill void
   1063  1.209.4.2  jmcneill uhci_add_loop(uhci_softc_t *sc) {
   1064  1.209.4.2  jmcneill #ifdef UHCI_DEBUG
   1065  1.209.4.2  jmcneill 	if (uhcinoloop)
   1066  1.209.4.2  jmcneill 		return;
   1067  1.209.4.2  jmcneill #endif
   1068  1.209.4.2  jmcneill 	if (++sc->sc_loops == 1) {
   1069  1.209.4.2  jmcneill 		DPRINTFN(5,("uhci_start_loop: add\n"));
   1070  1.209.4.2  jmcneill 		/* Note, we don't loop back the soft pointer. */
   1071  1.209.4.2  jmcneill 		sc->sc_last_qh->qh.qh_hlink =
   1072  1.209.4.2  jmcneill 		    htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH);
   1073  1.209.4.2  jmcneill 	}
   1074  1.209.4.2  jmcneill }
   1075  1.209.4.2  jmcneill 
   1076  1.209.4.2  jmcneill void
   1077  1.209.4.2  jmcneill uhci_rem_loop(uhci_softc_t *sc) {
   1078  1.209.4.2  jmcneill #ifdef UHCI_DEBUG
   1079  1.209.4.2  jmcneill 	if (uhcinoloop)
   1080  1.209.4.2  jmcneill 		return;
   1081  1.209.4.2  jmcneill #endif
   1082  1.209.4.2  jmcneill 	if (--sc->sc_loops == 0) {
   1083  1.209.4.2  jmcneill 		DPRINTFN(5,("uhci_end_loop: remove\n"));
   1084  1.209.4.2  jmcneill 		sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T);
   1085  1.209.4.2  jmcneill 	}
   1086  1.209.4.2  jmcneill }
   1087  1.209.4.2  jmcneill 
   1088  1.209.4.2  jmcneill /* Add high speed control QH, called at splusb(). */
   1089  1.209.4.2  jmcneill void
   1090  1.209.4.2  jmcneill uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1091  1.209.4.2  jmcneill {
   1092  1.209.4.2  jmcneill 	uhci_soft_qh_t *eqh;
   1093  1.209.4.2  jmcneill 
   1094  1.209.4.2  jmcneill 	SPLUSBCHECK;
   1095  1.209.4.2  jmcneill 
   1096  1.209.4.2  jmcneill 	DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
   1097  1.209.4.2  jmcneill 	eqh = sc->sc_hctl_end;
   1098  1.209.4.2  jmcneill 	sqh->hlink       = eqh->hlink;
   1099  1.209.4.2  jmcneill 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1100  1.209.4.2  jmcneill 	eqh->hlink       = sqh;
   1101  1.209.4.2  jmcneill 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1102  1.209.4.2  jmcneill 	sc->sc_hctl_end = sqh;
   1103  1.209.4.2  jmcneill #ifdef UHCI_CTL_LOOP
   1104  1.209.4.2  jmcneill 	uhci_add_loop(sc);
   1105  1.209.4.2  jmcneill #endif
   1106  1.209.4.2  jmcneill }
   1107  1.209.4.2  jmcneill 
   1108  1.209.4.2  jmcneill /* Remove high speed control QH, called at splusb(). */
   1109  1.209.4.2  jmcneill void
   1110  1.209.4.2  jmcneill uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1111  1.209.4.2  jmcneill {
   1112  1.209.4.2  jmcneill 	uhci_soft_qh_t *pqh;
   1113  1.209.4.2  jmcneill 
   1114  1.209.4.2  jmcneill 	SPLUSBCHECK;
   1115  1.209.4.2  jmcneill 
   1116  1.209.4.2  jmcneill 	DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh));
   1117  1.209.4.2  jmcneill #ifdef UHCI_CTL_LOOP
   1118  1.209.4.2  jmcneill 	uhci_rem_loop(sc);
   1119  1.209.4.2  jmcneill #endif
   1120  1.209.4.2  jmcneill 	/*
   1121  1.209.4.2  jmcneill 	 * The T bit should be set in the elink of the QH so that the HC
   1122  1.209.4.2  jmcneill 	 * doesn't follow the pointer.  This condition may fail if the
   1123  1.209.4.2  jmcneill 	 * the transferred packet was short so that the QH still points
   1124  1.209.4.2  jmcneill 	 * at the last used TD.
   1125  1.209.4.2  jmcneill 	 * In this case we set the T bit and wait a little for the HC
   1126  1.209.4.2  jmcneill 	 * to stop looking at the TD.
   1127  1.209.4.2  jmcneill 	 */
   1128  1.209.4.2  jmcneill 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1129  1.209.4.2  jmcneill 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1130  1.209.4.2  jmcneill 		delay(UHCI_QH_REMOVE_DELAY);
   1131  1.209.4.2  jmcneill 	}
   1132  1.209.4.2  jmcneill 
   1133  1.209.4.2  jmcneill 	pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh);
   1134  1.209.4.2  jmcneill 	pqh->hlink = sqh->hlink;
   1135  1.209.4.2  jmcneill 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1136  1.209.4.2  jmcneill 	delay(UHCI_QH_REMOVE_DELAY);
   1137  1.209.4.2  jmcneill 	if (sc->sc_hctl_end == sqh)
   1138  1.209.4.2  jmcneill 		sc->sc_hctl_end = pqh;
   1139  1.209.4.2  jmcneill }
   1140  1.209.4.2  jmcneill 
   1141  1.209.4.2  jmcneill /* Add low speed control QH, called at splusb(). */
   1142  1.209.4.2  jmcneill void
   1143  1.209.4.2  jmcneill uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1144  1.209.4.2  jmcneill {
   1145  1.209.4.2  jmcneill 	uhci_soft_qh_t *eqh;
   1146  1.209.4.2  jmcneill 
   1147  1.209.4.2  jmcneill 	SPLUSBCHECK;
   1148  1.209.4.2  jmcneill 
   1149  1.209.4.2  jmcneill 	DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh));
   1150  1.209.4.2  jmcneill 	eqh = sc->sc_lctl_end;
   1151  1.209.4.2  jmcneill 	sqh->hlink = eqh->hlink;
   1152  1.209.4.2  jmcneill 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1153  1.209.4.2  jmcneill 	eqh->hlink = sqh;
   1154  1.209.4.2  jmcneill 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1155  1.209.4.2  jmcneill 	sc->sc_lctl_end = sqh;
   1156  1.209.4.2  jmcneill }
   1157  1.209.4.2  jmcneill 
   1158  1.209.4.2  jmcneill /* Remove low speed control QH, called at splusb(). */
   1159  1.209.4.2  jmcneill void
   1160  1.209.4.2  jmcneill uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1161  1.209.4.2  jmcneill {
   1162  1.209.4.2  jmcneill 	uhci_soft_qh_t *pqh;
   1163  1.209.4.2  jmcneill 
   1164  1.209.4.2  jmcneill 	SPLUSBCHECK;
   1165  1.209.4.2  jmcneill 
   1166  1.209.4.2  jmcneill 	DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh));
   1167  1.209.4.2  jmcneill 	/* See comment in uhci_remove_hs_ctrl() */
   1168  1.209.4.2  jmcneill 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1169  1.209.4.2  jmcneill 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1170  1.209.4.2  jmcneill 		delay(UHCI_QH_REMOVE_DELAY);
   1171  1.209.4.2  jmcneill 	}
   1172  1.209.4.2  jmcneill 	pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh);
   1173  1.209.4.2  jmcneill 	pqh->hlink = sqh->hlink;
   1174  1.209.4.2  jmcneill 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1175  1.209.4.2  jmcneill 	delay(UHCI_QH_REMOVE_DELAY);
   1176  1.209.4.2  jmcneill 	if (sc->sc_lctl_end == sqh)
   1177  1.209.4.2  jmcneill 		sc->sc_lctl_end = pqh;
   1178  1.209.4.2  jmcneill }
   1179  1.209.4.2  jmcneill 
   1180  1.209.4.2  jmcneill /* Add bulk QH, called at splusb(). */
   1181  1.209.4.2  jmcneill void
   1182  1.209.4.2  jmcneill uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1183  1.209.4.2  jmcneill {
   1184  1.209.4.2  jmcneill 	uhci_soft_qh_t *eqh;
   1185  1.209.4.2  jmcneill 
   1186  1.209.4.2  jmcneill 	SPLUSBCHECK;
   1187  1.209.4.2  jmcneill 
   1188  1.209.4.2  jmcneill 	DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
   1189  1.209.4.2  jmcneill 	eqh = sc->sc_bulk_end;
   1190  1.209.4.2  jmcneill 	sqh->hlink = eqh->hlink;
   1191  1.209.4.2  jmcneill 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1192  1.209.4.2  jmcneill 	eqh->hlink = sqh;
   1193  1.209.4.2  jmcneill 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1194  1.209.4.2  jmcneill 	sc->sc_bulk_end = sqh;
   1195  1.209.4.2  jmcneill 	uhci_add_loop(sc);
   1196  1.209.4.2  jmcneill }
   1197  1.209.4.2  jmcneill 
   1198  1.209.4.2  jmcneill /* Remove bulk QH, called at splusb(). */
   1199  1.209.4.2  jmcneill void
   1200  1.209.4.2  jmcneill uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1201  1.209.4.2  jmcneill {
   1202  1.209.4.2  jmcneill 	uhci_soft_qh_t *pqh;
   1203  1.209.4.2  jmcneill 
   1204  1.209.4.2  jmcneill 	SPLUSBCHECK;
   1205  1.209.4.2  jmcneill 
   1206  1.209.4.2  jmcneill 	DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
   1207  1.209.4.2  jmcneill 	uhci_rem_loop(sc);
   1208  1.209.4.2  jmcneill 	/* See comment in uhci_remove_hs_ctrl() */
   1209  1.209.4.2  jmcneill 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1210  1.209.4.2  jmcneill 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1211  1.209.4.2  jmcneill 		delay(UHCI_QH_REMOVE_DELAY);
   1212  1.209.4.2  jmcneill 	}
   1213  1.209.4.2  jmcneill 	pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh);
   1214  1.209.4.2  jmcneill 	pqh->hlink       = sqh->hlink;
   1215  1.209.4.2  jmcneill 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1216  1.209.4.2  jmcneill 	delay(UHCI_QH_REMOVE_DELAY);
   1217  1.209.4.2  jmcneill 	if (sc->sc_bulk_end == sqh)
   1218  1.209.4.2  jmcneill 		sc->sc_bulk_end = pqh;
   1219  1.209.4.2  jmcneill }
   1220  1.209.4.2  jmcneill 
   1221  1.209.4.2  jmcneill Static int uhci_intr1(uhci_softc_t *);
   1222  1.209.4.2  jmcneill 
   1223  1.209.4.2  jmcneill int
   1224  1.209.4.2  jmcneill uhci_intr(void *arg)
   1225  1.209.4.2  jmcneill {
   1226  1.209.4.2  jmcneill 	uhci_softc_t *sc = arg;
   1227  1.209.4.2  jmcneill 
   1228  1.209.4.2  jmcneill 	if (sc->sc_dying)
   1229  1.209.4.2  jmcneill 		return (0);
   1230  1.209.4.2  jmcneill 
   1231  1.209.4.2  jmcneill 	if (sc->sc_bus.use_polling) {
   1232  1.209.4.2  jmcneill #ifdef DIAGNOSTIC
   1233  1.209.4.2  jmcneill 		DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n"));
   1234  1.209.4.2  jmcneill #endif
   1235  1.209.4.2  jmcneill 		return (0);
   1236  1.209.4.2  jmcneill 	}
   1237  1.209.4.2  jmcneill 
   1238  1.209.4.2  jmcneill 	return (uhci_intr1(sc));
   1239  1.209.4.2  jmcneill }
   1240  1.209.4.2  jmcneill 
   1241  1.209.4.2  jmcneill int
   1242  1.209.4.2  jmcneill uhci_intr1(uhci_softc_t *sc)
   1243  1.209.4.2  jmcneill {
   1244  1.209.4.2  jmcneill 	int status;
   1245  1.209.4.2  jmcneill 	int ack;
   1246  1.209.4.2  jmcneill 
   1247  1.209.4.2  jmcneill #ifdef UHCI_DEBUG
   1248  1.209.4.2  jmcneill 	if (uhcidebug > 15) {
   1249  1.209.4.2  jmcneill 		DPRINTF(("%s: uhci_intr1\n", USBDEVNAME(sc->sc_bus.bdev)));
   1250  1.209.4.2  jmcneill 		uhci_dumpregs(sc);
   1251  1.209.4.2  jmcneill 	}
   1252  1.209.4.2  jmcneill #endif
   1253  1.209.4.2  jmcneill 
   1254  1.209.4.2  jmcneill 	status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS;
   1255  1.209.4.2  jmcneill 	if (status == 0)	/* The interrupt was not for us. */
   1256  1.209.4.2  jmcneill 		return (0);
   1257  1.209.4.2  jmcneill 
   1258  1.209.4.2  jmcneill 	if (sc->sc_suspend != PWR_RESUME) {
   1259  1.209.4.2  jmcneill #ifdef DIAGNOSTIC
   1260  1.209.4.2  jmcneill 		printf("%s: interrupt while not operating ignored\n",
   1261  1.209.4.2  jmcneill 		       USBDEVNAME(sc->sc_bus.bdev));
   1262  1.209.4.2  jmcneill #endif
   1263  1.209.4.2  jmcneill 		UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */
   1264  1.209.4.2  jmcneill 		return (0);
   1265  1.209.4.2  jmcneill 	}
   1266  1.209.4.2  jmcneill 
   1267  1.209.4.2  jmcneill 	ack = 0;
   1268  1.209.4.2  jmcneill 	if (status & UHCI_STS_USBINT)
   1269  1.209.4.2  jmcneill 		ack |= UHCI_STS_USBINT;
   1270  1.209.4.2  jmcneill 	if (status & UHCI_STS_USBEI)
   1271  1.209.4.2  jmcneill 		ack |= UHCI_STS_USBEI;
   1272  1.209.4.2  jmcneill 	if (status & UHCI_STS_RD) {
   1273  1.209.4.2  jmcneill 		ack |= UHCI_STS_RD;
   1274  1.209.4.2  jmcneill #ifdef UHCI_DEBUG
   1275  1.209.4.2  jmcneill 		printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
   1276  1.209.4.2  jmcneill #endif
   1277  1.209.4.2  jmcneill 	}
   1278  1.209.4.2  jmcneill 	if (status & UHCI_STS_HSE) {
   1279  1.209.4.2  jmcneill 		ack |= UHCI_STS_HSE;
   1280  1.209.4.2  jmcneill 		printf("%s: host system error\n", USBDEVNAME(sc->sc_bus.bdev));
   1281  1.209.4.2  jmcneill 	}
   1282  1.209.4.2  jmcneill 	if (status & UHCI_STS_HCPE) {
   1283  1.209.4.2  jmcneill 		ack |= UHCI_STS_HCPE;
   1284  1.209.4.2  jmcneill 		printf("%s: host controller process error\n",
   1285  1.209.4.2  jmcneill 		       USBDEVNAME(sc->sc_bus.bdev));
   1286  1.209.4.2  jmcneill 	}
   1287  1.209.4.2  jmcneill 	if (status & UHCI_STS_HCH) {
   1288  1.209.4.2  jmcneill 		/* no acknowledge needed */
   1289  1.209.4.2  jmcneill 		if (!sc->sc_dying) {
   1290  1.209.4.2  jmcneill 			printf("%s: host controller halted\n",
   1291  1.209.4.2  jmcneill 			    USBDEVNAME(sc->sc_bus.bdev));
   1292  1.209.4.2  jmcneill #ifdef UHCI_DEBUG
   1293  1.209.4.2  jmcneill 			uhci_dump_all(sc);
   1294  1.209.4.2  jmcneill #endif
   1295  1.209.4.2  jmcneill 		}
   1296  1.209.4.2  jmcneill 		sc->sc_dying = 1;
   1297  1.209.4.2  jmcneill 	}
   1298  1.209.4.2  jmcneill 
   1299  1.209.4.2  jmcneill 	if (!ack)
   1300  1.209.4.2  jmcneill 		return (0);	/* nothing to acknowledge */
   1301  1.209.4.2  jmcneill 	UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */
   1302  1.209.4.2  jmcneill 
   1303  1.209.4.2  jmcneill 	sc->sc_bus.no_intrs++;
   1304  1.209.4.2  jmcneill 	usb_schedsoftintr(&sc->sc_bus);
   1305  1.209.4.2  jmcneill 
   1306  1.209.4.2  jmcneill 	DPRINTFN(15, ("%s: uhci_intr: exit\n", USBDEVNAME(sc->sc_bus.bdev)));
   1307  1.209.4.2  jmcneill 
   1308  1.209.4.2  jmcneill 	return (1);
   1309  1.209.4.2  jmcneill }
   1310  1.209.4.2  jmcneill 
   1311  1.209.4.2  jmcneill void
   1312  1.209.4.2  jmcneill uhci_softintr(void *v)
   1313  1.209.4.2  jmcneill {
   1314  1.209.4.2  jmcneill 	uhci_softc_t *sc = v;
   1315  1.209.4.2  jmcneill 	uhci_intr_info_t *ii, *nextii;
   1316  1.209.4.2  jmcneill 
   1317  1.209.4.2  jmcneill 	DPRINTFN(10,("%s: uhci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev),
   1318  1.209.4.2  jmcneill 		     sc->sc_bus.intr_context));
   1319  1.209.4.2  jmcneill 
   1320  1.209.4.2  jmcneill 	sc->sc_bus.intr_context++;
   1321  1.209.4.2  jmcneill 
   1322  1.209.4.2  jmcneill 	/*
   1323  1.209.4.2  jmcneill 	 * Interrupts on UHCI really suck.  When the host controller
   1324  1.209.4.2  jmcneill 	 * interrupts because a transfer is completed there is no
   1325  1.209.4.2  jmcneill 	 * way of knowing which transfer it was.  You can scan down
   1326  1.209.4.2  jmcneill 	 * the TDs and QHs of the previous frame to limit the search,
   1327  1.209.4.2  jmcneill 	 * but that assumes that the interrupt was not delayed by more
   1328  1.209.4.2  jmcneill 	 * than 1 ms, which may not always be true (e.g. after debug
   1329  1.209.4.2  jmcneill 	 * output on a slow console).
   1330  1.209.4.2  jmcneill 	 * We scan all interrupt descriptors to see if any have
   1331  1.209.4.2  jmcneill 	 * completed.
   1332  1.209.4.2  jmcneill 	 */
   1333  1.209.4.2  jmcneill 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) {
   1334  1.209.4.2  jmcneill 		nextii = LIST_NEXT(ii, list);
   1335  1.209.4.2  jmcneill 		uhci_check_intr(sc, ii);
   1336  1.209.4.2  jmcneill 	}
   1337  1.209.4.2  jmcneill 
   1338  1.209.4.2  jmcneill #ifdef USB_USE_SOFTINTR
   1339  1.209.4.2  jmcneill 	if (sc->sc_softwake) {
   1340  1.209.4.2  jmcneill 		sc->sc_softwake = 0;
   1341  1.209.4.2  jmcneill 		wakeup(&sc->sc_softwake);
   1342  1.209.4.2  jmcneill 	}
   1343  1.209.4.2  jmcneill #endif /* USB_USE_SOFTINTR */
   1344  1.209.4.2  jmcneill 
   1345  1.209.4.2  jmcneill 	sc->sc_bus.intr_context--;
   1346  1.209.4.2  jmcneill }
   1347  1.209.4.2  jmcneill 
   1348  1.209.4.2  jmcneill /* Check for an interrupt. */
   1349  1.209.4.2  jmcneill void
   1350  1.209.4.2  jmcneill uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii)
   1351  1.209.4.2  jmcneill {
   1352  1.209.4.2  jmcneill 	uhci_soft_td_t *std, *lstd;
   1353  1.209.4.2  jmcneill 	u_int32_t status;
   1354  1.209.4.2  jmcneill 
   1355  1.209.4.2  jmcneill 	DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
   1356  1.209.4.2  jmcneill #ifdef DIAGNOSTIC
   1357  1.209.4.2  jmcneill 	if (ii == NULL) {
   1358  1.209.4.2  jmcneill 		printf("uhci_check_intr: no ii? %p\n", ii);
   1359  1.209.4.2  jmcneill 		return;
   1360  1.209.4.2  jmcneill 	}
   1361  1.209.4.2  jmcneill #endif
   1362  1.209.4.2  jmcneill 	if (ii->xfer->status == USBD_CANCELLED ||
   1363  1.209.4.2  jmcneill 	    ii->xfer->status == USBD_TIMEOUT) {
   1364  1.209.4.2  jmcneill 		DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer));
   1365  1.209.4.2  jmcneill 		return;
   1366  1.209.4.2  jmcneill 	}
   1367  1.209.4.2  jmcneill 
   1368  1.209.4.2  jmcneill 	if (ii->stdstart == NULL)
   1369  1.209.4.2  jmcneill 		return;
   1370  1.209.4.2  jmcneill 	lstd = ii->stdend;
   1371  1.209.4.2  jmcneill #ifdef DIAGNOSTIC
   1372  1.209.4.2  jmcneill 	if (lstd == NULL) {
   1373  1.209.4.2  jmcneill 		printf("uhci_check_intr: std==0\n");
   1374  1.209.4.2  jmcneill 		return;
   1375  1.209.4.2  jmcneill 	}
   1376  1.209.4.2  jmcneill #endif
   1377  1.209.4.2  jmcneill 	/*
   1378  1.209.4.2  jmcneill 	 * If the last TD is still active we need to check whether there
   1379  1.209.4.2  jmcneill 	 * is an error somewhere in the middle, or whether there was a
   1380  1.209.4.2  jmcneill 	 * short packet (SPD and not ACTIVE).
   1381  1.209.4.2  jmcneill 	 */
   1382  1.209.4.2  jmcneill 	if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) {
   1383  1.209.4.2  jmcneill 		DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii));
   1384  1.209.4.2  jmcneill 		for (std = ii->stdstart; std != lstd; std = std->link.std) {
   1385  1.209.4.2  jmcneill 			status = le32toh(std->td.td_status);
   1386  1.209.4.2  jmcneill 			/* If there's an active TD the xfer isn't done. */
   1387  1.209.4.2  jmcneill 			if (status & UHCI_TD_ACTIVE)
   1388  1.209.4.2  jmcneill 				break;
   1389  1.209.4.2  jmcneill 			/* Any kind of error makes the xfer done. */
   1390  1.209.4.2  jmcneill 			if (status & UHCI_TD_STALLED)
   1391  1.209.4.2  jmcneill 				goto done;
   1392  1.209.4.2  jmcneill 			/* We want short packets, and it is short: it's done */
   1393  1.209.4.2  jmcneill 			if ((status & UHCI_TD_SPD) &&
   1394  1.209.4.2  jmcneill 			      UHCI_TD_GET_ACTLEN(status) <
   1395  1.209.4.2  jmcneill 			      UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)))
   1396  1.209.4.2  jmcneill 				goto done;
   1397  1.209.4.2  jmcneill 		}
   1398  1.209.4.2  jmcneill 		DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n",
   1399  1.209.4.2  jmcneill 			      ii, ii->stdstart));
   1400  1.209.4.2  jmcneill 		return;
   1401  1.209.4.2  jmcneill 	}
   1402  1.209.4.2  jmcneill  done:
   1403  1.209.4.2  jmcneill 	DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii));
   1404  1.209.4.2  jmcneill 	usb_uncallout(ii->xfer->timeout_handle, uhci_timeout, ii);
   1405  1.209.4.2  jmcneill 	uhci_idone(ii);
   1406  1.209.4.2  jmcneill }
   1407  1.209.4.2  jmcneill 
   1408  1.209.4.2  jmcneill /* Called at splusb() */
   1409  1.209.4.2  jmcneill void
   1410  1.209.4.2  jmcneill uhci_idone(uhci_intr_info_t *ii)
   1411  1.209.4.2  jmcneill {
   1412  1.209.4.2  jmcneill 	usbd_xfer_handle xfer = ii->xfer;
   1413  1.209.4.2  jmcneill 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   1414  1.209.4.2  jmcneill 	uhci_soft_td_t *std;
   1415  1.209.4.2  jmcneill 	u_int32_t status = 0, nstatus;
   1416  1.209.4.2  jmcneill 	int actlen;
   1417  1.209.4.2  jmcneill 
   1418  1.209.4.2  jmcneill 	DPRINTFN(12, ("uhci_idone: ii=%p\n", ii));
   1419  1.209.4.2  jmcneill #ifdef DIAGNOSTIC
   1420  1.209.4.2  jmcneill 	{
   1421  1.209.4.2  jmcneill 		int s = splhigh();
   1422  1.209.4.2  jmcneill 		if (ii->isdone) {
   1423  1.209.4.2  jmcneill 			splx(s);
   1424  1.209.4.2  jmcneill #ifdef UHCI_DEBUG
   1425  1.209.4.2  jmcneill 			printf("uhci_idone: ii is done!\n   ");
   1426  1.209.4.2  jmcneill 			uhci_dump_ii(ii);
   1427  1.209.4.2  jmcneill #else
   1428  1.209.4.2  jmcneill 			printf("uhci_idone: ii=%p is done!\n", ii);
   1429  1.209.4.2  jmcneill #endif
   1430  1.209.4.2  jmcneill 			return;
   1431  1.209.4.2  jmcneill 		}
   1432  1.209.4.2  jmcneill 		ii->isdone = 1;
   1433  1.209.4.2  jmcneill 		splx(s);
   1434  1.209.4.2  jmcneill 	}
   1435  1.209.4.2  jmcneill #endif
   1436  1.209.4.2  jmcneill 
   1437  1.209.4.2  jmcneill 	if (xfer->nframes != 0) {
   1438  1.209.4.2  jmcneill 		/* Isoc transfer, do things differently. */
   1439  1.209.4.2  jmcneill 		uhci_soft_td_t **stds = upipe->u.iso.stds;
   1440  1.209.4.2  jmcneill 		int i, n, nframes, len;
   1441  1.209.4.2  jmcneill 
   1442  1.209.4.2  jmcneill 		DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii));
   1443  1.209.4.2  jmcneill 
   1444  1.209.4.2  jmcneill 		nframes = xfer->nframes;
   1445  1.209.4.2  jmcneill 		actlen = 0;
   1446  1.209.4.2  jmcneill 		n = UXFER(xfer)->curframe;
   1447  1.209.4.2  jmcneill 		for (i = 0; i < nframes; i++) {
   1448  1.209.4.2  jmcneill 			std = stds[n];
   1449  1.209.4.2  jmcneill #ifdef UHCI_DEBUG
   1450  1.209.4.2  jmcneill 			if (uhcidebug > 5) {
   1451  1.209.4.2  jmcneill 				DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i));
   1452  1.209.4.2  jmcneill 				uhci_dump_td(std);
   1453  1.209.4.2  jmcneill 			}
   1454  1.209.4.2  jmcneill #endif
   1455  1.209.4.2  jmcneill 			if (++n >= UHCI_VFRAMELIST_COUNT)
   1456  1.209.4.2  jmcneill 				n = 0;
   1457  1.209.4.2  jmcneill 			status = le32toh(std->td.td_status);
   1458  1.209.4.2  jmcneill 			len = UHCI_TD_GET_ACTLEN(status);
   1459  1.209.4.2  jmcneill 			xfer->frlengths[i] = len;
   1460  1.209.4.2  jmcneill 			actlen += len;
   1461  1.209.4.2  jmcneill 		}
   1462  1.209.4.2  jmcneill 		upipe->u.iso.inuse -= nframes;
   1463  1.209.4.2  jmcneill 		xfer->actlen = actlen;
   1464  1.209.4.2  jmcneill 		xfer->status = USBD_NORMAL_COMPLETION;
   1465  1.209.4.2  jmcneill 		goto end;
   1466  1.209.4.2  jmcneill 	}
   1467  1.209.4.2  jmcneill 
   1468  1.209.4.2  jmcneill #ifdef UHCI_DEBUG
   1469  1.209.4.2  jmcneill 	DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n",
   1470  1.209.4.2  jmcneill 		      ii, xfer, upipe));
   1471  1.209.4.2  jmcneill 	if (uhcidebug > 10)
   1472  1.209.4.2  jmcneill 		uhci_dump_tds(ii->stdstart);
   1473  1.209.4.2  jmcneill #endif
   1474  1.209.4.2  jmcneill 
   1475  1.209.4.2  jmcneill 	/* The transfer is done, compute actual length and status. */
   1476  1.209.4.2  jmcneill 	actlen = 0;
   1477  1.209.4.2  jmcneill 	for (std = ii->stdstart; std != NULL; std = std->link.std) {
   1478  1.209.4.2  jmcneill 		nstatus = le32toh(std->td.td_status);
   1479  1.209.4.2  jmcneill 		if (nstatus & UHCI_TD_ACTIVE)
   1480  1.209.4.2  jmcneill 			break;
   1481  1.209.4.2  jmcneill 
   1482  1.209.4.2  jmcneill 		status = nstatus;
   1483  1.209.4.2  jmcneill 		if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) !=
   1484  1.209.4.2  jmcneill 			UHCI_TD_PID_SETUP)
   1485  1.209.4.2  jmcneill 			actlen += UHCI_TD_GET_ACTLEN(status);
   1486  1.209.4.2  jmcneill 		else {
   1487  1.209.4.2  jmcneill 			/*
   1488  1.209.4.2  jmcneill 			 * UHCI will report CRCTO in addition to a STALL or NAK
   1489  1.209.4.2  jmcneill 			 * for a SETUP transaction.  See section 3.2.2, "TD
   1490  1.209.4.2  jmcneill 			 * CONTROL AND STATUS".
   1491  1.209.4.2  jmcneill 			 */
   1492  1.209.4.2  jmcneill 			if (status & (UHCI_TD_STALLED | UHCI_TD_NAK))
   1493  1.209.4.2  jmcneill 				status &= ~UHCI_TD_CRCTO;
   1494  1.209.4.2  jmcneill 		}
   1495  1.209.4.2  jmcneill 	}
   1496  1.209.4.2  jmcneill 	/* If there are left over TDs we need to update the toggle. */
   1497  1.209.4.2  jmcneill 	if (std != NULL)
   1498  1.209.4.2  jmcneill 		upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token));
   1499  1.209.4.2  jmcneill 
   1500  1.209.4.2  jmcneill 	status &= UHCI_TD_ERROR;
   1501  1.209.4.2  jmcneill 	DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n",
   1502  1.209.4.2  jmcneill 		      actlen, status));
   1503  1.209.4.2  jmcneill 	xfer->actlen = actlen;
   1504  1.209.4.2  jmcneill 	if (status != 0) {
   1505  1.209.4.2  jmcneill #ifdef UHCI_DEBUG
   1506  1.209.4.2  jmcneill 		char sbuf[128];
   1507  1.209.4.2  jmcneill 
   1508  1.209.4.2  jmcneill 		bitmask_snprintf((u_int32_t)status,
   1509  1.209.4.2  jmcneill 				 "\20\22BITSTUFF\23CRCTO\24NAK\25"
   1510  1.209.4.2  jmcneill 				 "BABBLE\26DBUFFER\27STALLED\30ACTIVE",
   1511  1.209.4.2  jmcneill 				 sbuf, sizeof(sbuf));
   1512  1.209.4.2  jmcneill 
   1513  1.209.4.2  jmcneill 		DPRINTFN((status == UHCI_TD_STALLED)*10,
   1514  1.209.4.2  jmcneill 			 ("uhci_idone: error, addr=%d, endpt=0x%02x, "
   1515  1.209.4.2  jmcneill 			  "status 0x%s\n",
   1516  1.209.4.2  jmcneill 			  xfer->pipe->device->address,
   1517  1.209.4.2  jmcneill 			  xfer->pipe->endpoint->edesc->bEndpointAddress,
   1518  1.209.4.2  jmcneill 			  sbuf));
   1519  1.209.4.2  jmcneill #endif
   1520  1.209.4.2  jmcneill 
   1521  1.209.4.2  jmcneill 		if (status == UHCI_TD_STALLED)
   1522  1.209.4.2  jmcneill 			xfer->status = USBD_STALLED;
   1523  1.209.4.2  jmcneill 		else
   1524  1.209.4.2  jmcneill 			xfer->status = USBD_IOERROR; /* more info XXX */
   1525  1.209.4.2  jmcneill 	} else {
   1526  1.209.4.2  jmcneill 		xfer->status = USBD_NORMAL_COMPLETION;
   1527  1.209.4.2  jmcneill 	}
   1528  1.209.4.2  jmcneill 
   1529  1.209.4.2  jmcneill  end:
   1530  1.209.4.2  jmcneill 	usb_transfer_complete(xfer);
   1531  1.209.4.2  jmcneill 	DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii));
   1532  1.209.4.2  jmcneill }
   1533  1.209.4.2  jmcneill 
   1534  1.209.4.2  jmcneill /*
   1535  1.209.4.2  jmcneill  * Called when a request does not complete.
   1536  1.209.4.2  jmcneill  */
   1537  1.209.4.2  jmcneill void
   1538  1.209.4.2  jmcneill uhci_timeout(void *addr)
   1539  1.209.4.2  jmcneill {
   1540  1.209.4.2  jmcneill 	uhci_intr_info_t *ii = addr;
   1541  1.209.4.2  jmcneill 	struct uhci_xfer *uxfer = UXFER(ii->xfer);
   1542  1.209.4.2  jmcneill 	struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe;
   1543  1.209.4.2  jmcneill 	uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
   1544  1.209.4.2  jmcneill 
   1545  1.209.4.2  jmcneill 	DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer));
   1546  1.209.4.2  jmcneill 
   1547  1.209.4.2  jmcneill 	if (sc->sc_dying) {
   1548  1.209.4.2  jmcneill 		uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT);
   1549  1.209.4.2  jmcneill 		return;
   1550  1.209.4.2  jmcneill 	}
   1551  1.209.4.2  jmcneill 
   1552  1.209.4.2  jmcneill 	/* Execute the abort in a process context. */
   1553  1.209.4.2  jmcneill 	usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer);
   1554  1.209.4.2  jmcneill 	usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task,
   1555  1.209.4.2  jmcneill 	    USB_TASKQ_HC);
   1556  1.209.4.2  jmcneill }
   1557  1.209.4.2  jmcneill 
   1558  1.209.4.2  jmcneill void
   1559  1.209.4.2  jmcneill uhci_timeout_task(void *addr)
   1560  1.209.4.2  jmcneill {
   1561  1.209.4.2  jmcneill 	usbd_xfer_handle xfer = addr;
   1562  1.209.4.2  jmcneill 	int s;
   1563  1.209.4.2  jmcneill 
   1564  1.209.4.2  jmcneill 	DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer));
   1565  1.209.4.2  jmcneill 
   1566  1.209.4.2  jmcneill 	s = splusb();
   1567  1.209.4.2  jmcneill 	uhci_abort_xfer(xfer, USBD_TIMEOUT);
   1568  1.209.4.2  jmcneill 	splx(s);
   1569  1.209.4.2  jmcneill }
   1570  1.209.4.2  jmcneill 
   1571  1.209.4.2  jmcneill /*
   1572  1.209.4.2  jmcneill  * Wait here until controller claims to have an interrupt.
   1573  1.209.4.2  jmcneill  * Then call uhci_intr and return.  Use timeout to avoid waiting
   1574  1.209.4.2  jmcneill  * too long.
   1575  1.209.4.2  jmcneill  * Only used during boot when interrupts are not enabled yet.
   1576  1.209.4.2  jmcneill  */
   1577  1.209.4.2  jmcneill void
   1578  1.209.4.2  jmcneill uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer)
   1579  1.209.4.2  jmcneill {
   1580  1.209.4.2  jmcneill 	int timo = xfer->timeout;
   1581  1.209.4.2  jmcneill 	uhci_intr_info_t *ii;
   1582  1.209.4.2  jmcneill 
   1583  1.209.4.2  jmcneill 	DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
   1584  1.209.4.2  jmcneill 
   1585  1.209.4.2  jmcneill 	xfer->status = USBD_IN_PROGRESS;
   1586  1.209.4.2  jmcneill 	for (; timo >= 0; timo--) {
   1587  1.209.4.2  jmcneill 		usb_delay_ms(&sc->sc_bus, 1);
   1588  1.209.4.2  jmcneill 		DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
   1589  1.209.4.2  jmcneill 		if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
   1590  1.209.4.2  jmcneill 			uhci_intr1(sc);
   1591  1.209.4.2  jmcneill 			if (xfer->status != USBD_IN_PROGRESS)
   1592  1.209.4.2  jmcneill 				return;
   1593  1.209.4.2  jmcneill 		}
   1594  1.209.4.2  jmcneill 	}
   1595  1.209.4.2  jmcneill 
   1596  1.209.4.2  jmcneill 	/* Timeout */
   1597  1.209.4.2  jmcneill 	DPRINTF(("uhci_waitintr: timeout\n"));
   1598  1.209.4.2  jmcneill 	for (ii = LIST_FIRST(&sc->sc_intrhead);
   1599  1.209.4.2  jmcneill 	     ii != NULL && ii->xfer != xfer;
   1600  1.209.4.2  jmcneill 	     ii = LIST_NEXT(ii, list))
   1601  1.209.4.2  jmcneill 		;
   1602  1.209.4.2  jmcneill #ifdef DIAGNOSTIC
   1603  1.209.4.2  jmcneill 	if (ii == NULL)
   1604  1.209.4.2  jmcneill 		panic("uhci_waitintr: lost intr_info");
   1605  1.209.4.2  jmcneill #endif
   1606  1.209.4.2  jmcneill 	uhci_idone(ii);
   1607  1.209.4.2  jmcneill }
   1608  1.209.4.2  jmcneill 
   1609  1.209.4.2  jmcneill void
   1610  1.209.4.2  jmcneill uhci_poll(struct usbd_bus *bus)
   1611  1.209.4.2  jmcneill {
   1612  1.209.4.2  jmcneill 	uhci_softc_t *sc = (uhci_softc_t *)bus;
   1613  1.209.4.2  jmcneill 
   1614  1.209.4.2  jmcneill 	if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT)
   1615  1.209.4.2  jmcneill 		uhci_intr1(sc);
   1616  1.209.4.2  jmcneill }
   1617  1.209.4.2  jmcneill 
   1618  1.209.4.2  jmcneill void
   1619  1.209.4.2  jmcneill uhci_reset(uhci_softc_t *sc)
   1620  1.209.4.2  jmcneill {
   1621  1.209.4.2  jmcneill 	int n;
   1622  1.209.4.2  jmcneill 
   1623  1.209.4.2  jmcneill 	UHCICMD(sc, UHCI_CMD_HCRESET);
   1624  1.209.4.2  jmcneill 	/* The reset bit goes low when the controller is done. */
   1625  1.209.4.2  jmcneill 	for (n = 0; n < UHCI_RESET_TIMEOUT &&
   1626  1.209.4.2  jmcneill 		    (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
   1627  1.209.4.2  jmcneill 		usb_delay_ms(&sc->sc_bus, 1);
   1628  1.209.4.2  jmcneill 	if (n >= UHCI_RESET_TIMEOUT)
   1629  1.209.4.2  jmcneill 		printf("%s: controller did not reset\n",
   1630  1.209.4.2  jmcneill 		       USBDEVNAME(sc->sc_bus.bdev));
   1631  1.209.4.2  jmcneill }
   1632  1.209.4.2  jmcneill 
   1633  1.209.4.2  jmcneill usbd_status
   1634  1.209.4.2  jmcneill uhci_run(uhci_softc_t *sc, int run)
   1635  1.209.4.2  jmcneill {
   1636  1.209.4.2  jmcneill 	int s, n, running;
   1637  1.209.4.2  jmcneill 	u_int16_t cmd;
   1638  1.209.4.2  jmcneill 
   1639  1.209.4.2  jmcneill 	run = run != 0;
   1640  1.209.4.2  jmcneill 	s = splhardusb();
   1641  1.209.4.2  jmcneill 	DPRINTF(("uhci_run: setting run=%d\n", run));
   1642  1.209.4.2  jmcneill 	cmd = UREAD2(sc, UHCI_CMD);
   1643  1.209.4.2  jmcneill 	if (run)
   1644  1.209.4.2  jmcneill 		cmd |= UHCI_CMD_RS;
   1645  1.209.4.2  jmcneill 	else
   1646  1.209.4.2  jmcneill 		cmd &= ~UHCI_CMD_RS;
   1647  1.209.4.2  jmcneill 	UHCICMD(sc, cmd);
   1648  1.209.4.2  jmcneill 	for(n = 0; n < 10; n++) {
   1649  1.209.4.2  jmcneill 		running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
   1650  1.209.4.2  jmcneill 		/* return when we've entered the state we want */
   1651  1.209.4.2  jmcneill 		if (run == running) {
   1652  1.209.4.2  jmcneill 			splx(s);
   1653  1.209.4.2  jmcneill 			DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
   1654  1.209.4.2  jmcneill 				 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
   1655  1.209.4.2  jmcneill 			return (USBD_NORMAL_COMPLETION);
   1656  1.209.4.2  jmcneill 		}
   1657  1.209.4.2  jmcneill 		usb_delay_ms(&sc->sc_bus, 1);
   1658  1.209.4.2  jmcneill 	}
   1659  1.209.4.2  jmcneill 	splx(s);
   1660  1.209.4.2  jmcneill 	printf("%s: cannot %s\n", USBDEVNAME(sc->sc_bus.bdev),
   1661  1.209.4.2  jmcneill 	       run ? "start" : "stop");
   1662  1.209.4.2  jmcneill 	return (USBD_IOERROR);
   1663  1.209.4.2  jmcneill }
   1664  1.209.4.2  jmcneill 
   1665  1.209.4.2  jmcneill /*
   1666  1.209.4.2  jmcneill  * Memory management routines.
   1667  1.209.4.2  jmcneill  *  uhci_alloc_std allocates TDs
   1668  1.209.4.2  jmcneill  *  uhci_alloc_sqh allocates QHs
   1669  1.209.4.2  jmcneill  * These two routines do their own free list management,
   1670  1.209.4.2  jmcneill  * partly for speed, partly because allocating DMAable memory
   1671  1.209.4.2  jmcneill  * has page size granularaity so much memory would be wasted if
   1672  1.209.4.2  jmcneill  * only one TD/QH (32 bytes) was placed in each allocated chunk.
   1673  1.209.4.2  jmcneill  */
   1674  1.209.4.2  jmcneill 
   1675  1.209.4.2  jmcneill uhci_soft_td_t *
   1676  1.209.4.2  jmcneill uhci_alloc_std(uhci_softc_t *sc)
   1677  1.209.4.2  jmcneill {
   1678  1.209.4.2  jmcneill 	uhci_soft_td_t *std;
   1679  1.209.4.2  jmcneill 	usbd_status err;
   1680  1.209.4.2  jmcneill 	int i, offs;
   1681  1.209.4.2  jmcneill 	usb_dma_t dma;
   1682  1.209.4.2  jmcneill 
   1683  1.209.4.2  jmcneill 	if (sc->sc_freetds == NULL) {
   1684  1.209.4.2  jmcneill 		DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
   1685  1.209.4.2  jmcneill 		err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK,
   1686  1.209.4.2  jmcneill 			  UHCI_TD_ALIGN, &dma);
   1687  1.209.4.2  jmcneill 		if (err)
   1688  1.209.4.2  jmcneill 			return (0);
   1689  1.209.4.2  jmcneill 		for(i = 0; i < UHCI_STD_CHUNK; i++) {
   1690  1.209.4.2  jmcneill 			offs = i * UHCI_STD_SIZE;
   1691  1.209.4.2  jmcneill 			std = KERNADDR(&dma, offs);
   1692  1.209.4.2  jmcneill 			std->physaddr = DMAADDR(&dma, offs);
   1693  1.209.4.2  jmcneill 			std->link.std = sc->sc_freetds;
   1694  1.209.4.2  jmcneill 			sc->sc_freetds = std;
   1695  1.209.4.2  jmcneill 		}
   1696  1.209.4.2  jmcneill 	}
   1697  1.209.4.2  jmcneill 	std = sc->sc_freetds;
   1698  1.209.4.2  jmcneill 	sc->sc_freetds = std->link.std;
   1699  1.209.4.2  jmcneill 	memset(&std->td, 0, sizeof(uhci_td_t));
   1700  1.209.4.2  jmcneill 	return std;
   1701  1.209.4.2  jmcneill }
   1702  1.209.4.2  jmcneill 
   1703  1.209.4.2  jmcneill void
   1704  1.209.4.2  jmcneill uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std)
   1705  1.209.4.2  jmcneill {
   1706  1.209.4.2  jmcneill #ifdef DIAGNOSTIC
   1707  1.209.4.2  jmcneill #define TD_IS_FREE 0x12345678
   1708  1.209.4.2  jmcneill 	if (le32toh(std->td.td_token) == TD_IS_FREE) {
   1709  1.209.4.2  jmcneill 		printf("uhci_free_std: freeing free TD %p\n", std);
   1710  1.209.4.2  jmcneill 		return;
   1711  1.209.4.2  jmcneill 	}
   1712  1.209.4.2  jmcneill 	std->td.td_token = htole32(TD_IS_FREE);
   1713  1.209.4.2  jmcneill #endif
   1714  1.209.4.2  jmcneill 	std->link.std = sc->sc_freetds;
   1715  1.209.4.2  jmcneill 	sc->sc_freetds = std;
   1716  1.209.4.2  jmcneill }
   1717  1.209.4.2  jmcneill 
   1718  1.209.4.2  jmcneill uhci_soft_qh_t *
   1719  1.209.4.2  jmcneill uhci_alloc_sqh(uhci_softc_t *sc)
   1720  1.209.4.2  jmcneill {
   1721  1.209.4.2  jmcneill 	uhci_soft_qh_t *sqh;
   1722  1.209.4.2  jmcneill 	usbd_status err;
   1723  1.209.4.2  jmcneill 	int i, offs;
   1724  1.209.4.2  jmcneill 	usb_dma_t dma;
   1725  1.209.4.2  jmcneill 
   1726  1.209.4.2  jmcneill 	if (sc->sc_freeqhs == NULL) {
   1727  1.209.4.2  jmcneill 		DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
   1728  1.209.4.2  jmcneill 		err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK,
   1729  1.209.4.2  jmcneill 			  UHCI_QH_ALIGN, &dma);
   1730  1.209.4.2  jmcneill 		if (err)
   1731  1.209.4.2  jmcneill 			return (0);
   1732  1.209.4.2  jmcneill 		for(i = 0; i < UHCI_SQH_CHUNK; i++) {
   1733  1.209.4.2  jmcneill 			offs = i * UHCI_SQH_SIZE;
   1734  1.209.4.2  jmcneill 			sqh = KERNADDR(&dma, offs);
   1735  1.209.4.2  jmcneill 			sqh->physaddr = DMAADDR(&dma, offs);
   1736  1.209.4.2  jmcneill 			sqh->hlink = sc->sc_freeqhs;
   1737  1.209.4.2  jmcneill 			sc->sc_freeqhs = sqh;
   1738  1.209.4.2  jmcneill 		}
   1739  1.209.4.2  jmcneill 	}
   1740  1.209.4.2  jmcneill 	sqh = sc->sc_freeqhs;
   1741  1.209.4.2  jmcneill 	sc->sc_freeqhs = sqh->hlink;
   1742  1.209.4.2  jmcneill 	memset(&sqh->qh, 0, sizeof(uhci_qh_t));
   1743  1.209.4.2  jmcneill 	return (sqh);
   1744  1.209.4.2  jmcneill }
   1745  1.209.4.2  jmcneill 
   1746  1.209.4.2  jmcneill void
   1747  1.209.4.2  jmcneill uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1748  1.209.4.2  jmcneill {
   1749  1.209.4.2  jmcneill 	sqh->hlink = sc->sc_freeqhs;
   1750  1.209.4.2  jmcneill 	sc->sc_freeqhs = sqh;
   1751  1.209.4.2  jmcneill }
   1752  1.209.4.2  jmcneill 
   1753  1.209.4.2  jmcneill void
   1754  1.209.4.2  jmcneill uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std,
   1755  1.209.4.2  jmcneill 		    uhci_soft_td_t *stdend)
   1756  1.209.4.2  jmcneill {
   1757  1.209.4.2  jmcneill 	uhci_soft_td_t *p;
   1758  1.209.4.2  jmcneill 
   1759  1.209.4.2  jmcneill 	for (; std != stdend; std = p) {
   1760  1.209.4.2  jmcneill 		p = std->link.std;
   1761  1.209.4.2  jmcneill 		uhci_free_std(sc, std);
   1762  1.209.4.2  jmcneill 	}
   1763  1.209.4.2  jmcneill }
   1764  1.209.4.2  jmcneill 
   1765  1.209.4.2  jmcneill usbd_status
   1766  1.209.4.2  jmcneill uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len,
   1767  1.209.4.2  jmcneill 		     int rd, u_int16_t flags, usb_dma_t *dma,
   1768  1.209.4.2  jmcneill 		     uhci_soft_td_t **sp, uhci_soft_td_t **ep)
   1769  1.209.4.2  jmcneill {
   1770  1.209.4.2  jmcneill 	uhci_soft_td_t *p, *lastp;
   1771  1.209.4.2  jmcneill 	uhci_physaddr_t lastlink;
   1772  1.209.4.2  jmcneill 	int i, ntd, l, tog, maxp;
   1773  1.209.4.2  jmcneill 	u_int32_t status;
   1774  1.209.4.2  jmcneill 	int addr = upipe->pipe.device->address;
   1775  1.209.4.2  jmcneill 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   1776  1.209.4.2  jmcneill 
   1777  1.209.4.2  jmcneill 	DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d "
   1778  1.209.4.2  jmcneill 		      "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len,
   1779  1.209.4.2  jmcneill 		      upipe->pipe.device->speed, flags));
   1780  1.209.4.2  jmcneill 	maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
   1781  1.209.4.2  jmcneill 	if (maxp == 0) {
   1782  1.209.4.2  jmcneill 		printf("uhci_alloc_std_chain: maxp=0\n");
   1783  1.209.4.2  jmcneill 		return (USBD_INVAL);
   1784  1.209.4.2  jmcneill 	}
   1785  1.209.4.2  jmcneill 	ntd = (len + maxp - 1) / maxp;
   1786  1.209.4.2  jmcneill 	if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0)
   1787  1.209.4.2  jmcneill 		ntd++;
   1788  1.209.4.2  jmcneill 	DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd));
   1789  1.209.4.2  jmcneill 	if (ntd == 0) {
   1790  1.209.4.2  jmcneill 		*sp = *ep = 0;
   1791  1.209.4.2  jmcneill 		DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n"));
   1792  1.209.4.2  jmcneill 		return (USBD_NORMAL_COMPLETION);
   1793  1.209.4.2  jmcneill 	}
   1794  1.209.4.2  jmcneill 	tog = upipe->nexttoggle;
   1795  1.209.4.2  jmcneill 	if (ntd % 2 == 0)
   1796  1.209.4.2  jmcneill 		tog ^= 1;
   1797  1.209.4.2  jmcneill 	upipe->nexttoggle = tog ^ 1;
   1798  1.209.4.2  jmcneill 	lastp = NULL;
   1799  1.209.4.2  jmcneill 	lastlink = UHCI_PTR_T;
   1800  1.209.4.2  jmcneill 	ntd--;
   1801  1.209.4.2  jmcneill 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
   1802  1.209.4.2  jmcneill 	if (upipe->pipe.device->speed == USB_SPEED_LOW)
   1803  1.209.4.2  jmcneill 		status |= UHCI_TD_LS;
   1804  1.209.4.2  jmcneill 	if (flags & USBD_SHORT_XFER_OK)
   1805  1.209.4.2  jmcneill 		status |= UHCI_TD_SPD;
   1806  1.209.4.2  jmcneill 	for (i = ntd; i >= 0; i--) {
   1807  1.209.4.2  jmcneill 		p = uhci_alloc_std(sc);
   1808  1.209.4.2  jmcneill 		if (p == NULL) {
   1809  1.209.4.2  jmcneill 			KASSERT(lastp != NULL);
   1810  1.209.4.2  jmcneill 			uhci_free_std_chain(sc, lastp, NULL);
   1811  1.209.4.2  jmcneill 			return (USBD_NOMEM);
   1812  1.209.4.2  jmcneill 		}
   1813  1.209.4.2  jmcneill 		p->link.std = lastp;
   1814  1.209.4.2  jmcneill 		p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD);
   1815  1.209.4.2  jmcneill 		lastp = p;
   1816  1.209.4.2  jmcneill 		lastlink = p->physaddr;
   1817  1.209.4.2  jmcneill 		p->td.td_status = htole32(status);
   1818  1.209.4.2  jmcneill 		if (i == ntd) {
   1819  1.209.4.2  jmcneill 			/* last TD */
   1820  1.209.4.2  jmcneill 			l = len % maxp;
   1821  1.209.4.2  jmcneill 			if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER))
   1822  1.209.4.2  jmcneill 				l = maxp;
   1823  1.209.4.2  jmcneill 			*ep = p;
   1824  1.209.4.2  jmcneill 		} else
   1825  1.209.4.2  jmcneill 			l = maxp;
   1826  1.209.4.2  jmcneill 		p->td.td_token =
   1827  1.209.4.2  jmcneill 		    htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) :
   1828  1.209.4.2  jmcneill 				 UHCI_TD_OUT(l, endpt, addr, tog));
   1829  1.209.4.2  jmcneill 		p->td.td_buffer = htole32(DMAADDR(dma, i * maxp));
   1830  1.209.4.2  jmcneill 		tog ^= 1;
   1831  1.209.4.2  jmcneill 	}
   1832  1.209.4.2  jmcneill 	*sp = lastp;
   1833  1.209.4.2  jmcneill 	DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n",
   1834  1.209.4.2  jmcneill 		      upipe->nexttoggle));
   1835  1.209.4.2  jmcneill 	return (USBD_NORMAL_COMPLETION);
   1836  1.209.4.2  jmcneill }
   1837  1.209.4.2  jmcneill 
   1838  1.209.4.2  jmcneill void
   1839  1.209.4.2  jmcneill uhci_device_clear_toggle(usbd_pipe_handle pipe)
   1840  1.209.4.2  jmcneill {
   1841  1.209.4.2  jmcneill 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   1842  1.209.4.2  jmcneill 	upipe->nexttoggle = 0;
   1843  1.209.4.2  jmcneill }
   1844  1.209.4.2  jmcneill 
   1845  1.209.4.2  jmcneill void
   1846  1.209.4.2  jmcneill uhci_noop(usbd_pipe_handle pipe)
   1847  1.209.4.2  jmcneill {
   1848  1.209.4.2  jmcneill }
   1849  1.209.4.2  jmcneill 
   1850  1.209.4.2  jmcneill usbd_status
   1851  1.209.4.2  jmcneill uhci_device_bulk_transfer(usbd_xfer_handle xfer)
   1852  1.209.4.2  jmcneill {
   1853  1.209.4.2  jmcneill 	usbd_status err;
   1854  1.209.4.2  jmcneill 
   1855  1.209.4.2  jmcneill 	/* Insert last in queue. */
   1856  1.209.4.2  jmcneill 	err = usb_insert_transfer(xfer);
   1857  1.209.4.2  jmcneill 	if (err)
   1858  1.209.4.2  jmcneill 		return (err);
   1859  1.209.4.2  jmcneill 
   1860  1.209.4.2  jmcneill 	/*
   1861  1.209.4.2  jmcneill 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   1862  1.209.4.2  jmcneill 	 * so start it first.
   1863  1.209.4.2  jmcneill 	 */
   1864  1.209.4.2  jmcneill 	return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   1865  1.209.4.2  jmcneill }
   1866  1.209.4.2  jmcneill 
   1867  1.209.4.2  jmcneill usbd_status
   1868  1.209.4.2  jmcneill uhci_device_bulk_start(usbd_xfer_handle xfer)
   1869  1.209.4.2  jmcneill {
   1870  1.209.4.2  jmcneill 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   1871  1.209.4.2  jmcneill 	usbd_device_handle dev = upipe->pipe.device;
   1872  1.209.4.2  jmcneill 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   1873  1.209.4.2  jmcneill 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   1874  1.209.4.2  jmcneill 	uhci_soft_td_t *data, *dataend;
   1875  1.209.4.2  jmcneill 	uhci_soft_qh_t *sqh;
   1876  1.209.4.2  jmcneill 	usbd_status err;
   1877  1.209.4.2  jmcneill 	int len, isread, endpt;
   1878  1.209.4.2  jmcneill 	int s;
   1879  1.209.4.2  jmcneill 
   1880  1.209.4.2  jmcneill 	DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n",
   1881  1.209.4.2  jmcneill 		     xfer, xfer->length, xfer->flags, ii));
   1882  1.209.4.2  jmcneill 
   1883  1.209.4.2  jmcneill 	if (sc->sc_dying)
   1884  1.209.4.2  jmcneill 		return (USBD_IOERROR);
   1885  1.209.4.2  jmcneill 
   1886  1.209.4.2  jmcneill #ifdef DIAGNOSTIC
   1887  1.209.4.2  jmcneill 	if (xfer->rqflags & URQ_REQUEST)
   1888  1.209.4.2  jmcneill 		panic("uhci_device_bulk_transfer: a request");
   1889  1.209.4.2  jmcneill #endif
   1890  1.209.4.2  jmcneill 
   1891  1.209.4.2  jmcneill 	len = xfer->length;
   1892  1.209.4.2  jmcneill 	endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   1893  1.209.4.2  jmcneill 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   1894  1.209.4.2  jmcneill 	sqh = upipe->u.bulk.sqh;
   1895  1.209.4.2  jmcneill 
   1896  1.209.4.2  jmcneill 	upipe->u.bulk.isread = isread;
   1897  1.209.4.2  jmcneill 	upipe->u.bulk.length = len;
   1898  1.209.4.2  jmcneill 
   1899  1.209.4.2  jmcneill 	err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
   1900  1.209.4.2  jmcneill 				   &xfer->dmabuf, &data, &dataend);
   1901  1.209.4.2  jmcneill 	if (err)
   1902  1.209.4.2  jmcneill 		return (err);
   1903  1.209.4.2  jmcneill 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
   1904  1.209.4.2  jmcneill 
   1905  1.209.4.2  jmcneill #ifdef UHCI_DEBUG
   1906  1.209.4.2  jmcneill 	if (uhcidebug > 8) {
   1907  1.209.4.2  jmcneill 		DPRINTF(("uhci_device_bulk_transfer: data(1)\n"));
   1908  1.209.4.2  jmcneill 		uhci_dump_tds(data);
   1909  1.209.4.2  jmcneill 	}
   1910  1.209.4.2  jmcneill #endif
   1911  1.209.4.2  jmcneill 
   1912  1.209.4.2  jmcneill 	/* Set up interrupt info. */
   1913  1.209.4.2  jmcneill 	ii->xfer = xfer;
   1914  1.209.4.2  jmcneill 	ii->stdstart = data;
   1915  1.209.4.2  jmcneill 	ii->stdend = dataend;
   1916  1.209.4.2  jmcneill #ifdef DIAGNOSTIC
   1917  1.209.4.2  jmcneill 	if (!ii->isdone) {
   1918  1.209.4.2  jmcneill 		printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii);
   1919  1.209.4.2  jmcneill 	}
   1920  1.209.4.2  jmcneill 	ii->isdone = 0;
   1921  1.209.4.2  jmcneill #endif
   1922  1.209.4.2  jmcneill 
   1923  1.209.4.2  jmcneill 	sqh->elink = data;
   1924  1.209.4.2  jmcneill 	sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   1925  1.209.4.2  jmcneill 
   1926  1.209.4.2  jmcneill 	s = splusb();
   1927  1.209.4.2  jmcneill 	uhci_add_bulk(sc, sqh);
   1928  1.209.4.2  jmcneill 	uhci_add_intr_info(sc, ii);
   1929  1.209.4.2  jmcneill 
   1930  1.209.4.2  jmcneill 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   1931  1.209.4.2  jmcneill 		usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
   1932  1.209.4.2  jmcneill 			    uhci_timeout, ii);
   1933  1.209.4.2  jmcneill 	}
   1934  1.209.4.2  jmcneill 	xfer->status = USBD_IN_PROGRESS;
   1935  1.209.4.2  jmcneill 	splx(s);
   1936  1.209.4.2  jmcneill 
   1937  1.209.4.2  jmcneill #ifdef UHCI_DEBUG
   1938  1.209.4.2  jmcneill 	if (uhcidebug > 10) {
   1939  1.209.4.2  jmcneill 		DPRINTF(("uhci_device_bulk_transfer: data(2)\n"));
   1940  1.209.4.2  jmcneill 		uhci_dump_tds(data);
   1941  1.209.4.2  jmcneill 	}
   1942  1.209.4.2  jmcneill #endif
   1943  1.209.4.2  jmcneill 
   1944  1.209.4.2  jmcneill 	if (sc->sc_bus.use_polling)
   1945  1.209.4.2  jmcneill 		uhci_waitintr(sc, xfer);
   1946  1.209.4.2  jmcneill 
   1947  1.209.4.2  jmcneill 	return (USBD_IN_PROGRESS);
   1948  1.209.4.2  jmcneill }
   1949  1.209.4.2  jmcneill 
   1950  1.209.4.2  jmcneill /* Abort a device bulk request. */
   1951  1.209.4.2  jmcneill void
   1952  1.209.4.2  jmcneill uhci_device_bulk_abort(usbd_xfer_handle xfer)
   1953  1.209.4.2  jmcneill {
   1954  1.209.4.2  jmcneill 	DPRINTF(("uhci_device_bulk_abort:\n"));
   1955  1.209.4.2  jmcneill 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   1956  1.209.4.2  jmcneill }
   1957  1.209.4.2  jmcneill 
   1958  1.209.4.2  jmcneill /*
   1959  1.209.4.2  jmcneill  * Abort a device request.
   1960  1.209.4.2  jmcneill  * If this routine is called at splusb() it guarantees that the request
   1961  1.209.4.2  jmcneill  * will be removed from the hardware scheduling and that the callback
   1962  1.209.4.2  jmcneill  * for it will be called with USBD_CANCELLED status.
   1963  1.209.4.2  jmcneill  * It's impossible to guarantee that the requested transfer will not
   1964  1.209.4.2  jmcneill  * have happened since the hardware runs concurrently.
   1965  1.209.4.2  jmcneill  * If the transaction has already happened we rely on the ordinary
   1966  1.209.4.2  jmcneill  * interrupt processing to process it.
   1967  1.209.4.2  jmcneill  */
   1968  1.209.4.2  jmcneill void
   1969  1.209.4.2  jmcneill uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
   1970  1.209.4.2  jmcneill {
   1971  1.209.4.2  jmcneill 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   1972  1.209.4.2  jmcneill 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   1973  1.209.4.2  jmcneill 	uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
   1974  1.209.4.2  jmcneill 	uhci_soft_td_t *std;
   1975  1.209.4.2  jmcneill 	int s;
   1976  1.209.4.2  jmcneill 	int wake;
   1977  1.209.4.2  jmcneill 
   1978  1.209.4.2  jmcneill 	DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status));
   1979  1.209.4.2  jmcneill 
   1980  1.209.4.2  jmcneill 	if (sc->sc_dying) {
   1981  1.209.4.2  jmcneill 		/* If we're dying, just do the software part. */
   1982  1.209.4.2  jmcneill 		s = splusb();
   1983  1.209.4.2  jmcneill 		xfer->status = status;	/* make software ignore it */
   1984  1.209.4.2  jmcneill 		usb_uncallout(xfer->timeout_handle, uhci_timeout, xfer);
   1985  1.209.4.2  jmcneill 		usb_transfer_complete(xfer);
   1986  1.209.4.2  jmcneill 		splx(s);
   1987  1.209.4.2  jmcneill 		return;
   1988  1.209.4.2  jmcneill 	}
   1989  1.209.4.2  jmcneill 
   1990  1.209.4.2  jmcneill 	if (xfer->device->bus->intr_context || !curproc)
   1991  1.209.4.2  jmcneill 		panic("uhci_abort_xfer: not in process context");
   1992  1.209.4.2  jmcneill 
   1993  1.209.4.2  jmcneill 	/*
   1994  1.209.4.2  jmcneill 	 * If an abort is already in progress then just wait for it to
   1995  1.209.4.2  jmcneill 	 * complete and return.
   1996  1.209.4.2  jmcneill 	 */
   1997  1.209.4.2  jmcneill 	if (xfer->hcflags & UXFER_ABORTING) {
   1998  1.209.4.2  jmcneill 		DPRINTFN(2, ("uhci_abort_xfer: already aborting\n"));
   1999  1.209.4.2  jmcneill #ifdef DIAGNOSTIC
   2000  1.209.4.2  jmcneill 		if (status == USBD_TIMEOUT)
   2001  1.209.4.2  jmcneill 			printf("uhci_abort_xfer: TIMEOUT while aborting\n");
   2002  1.209.4.2  jmcneill #endif
   2003  1.209.4.2  jmcneill 		/* Override the status which might be USBD_TIMEOUT. */
   2004  1.209.4.2  jmcneill 		xfer->status = status;
   2005  1.209.4.2  jmcneill 		DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n"));
   2006  1.209.4.2  jmcneill 		xfer->hcflags |= UXFER_ABORTWAIT;
   2007  1.209.4.2  jmcneill 		while (xfer->hcflags & UXFER_ABORTING)
   2008  1.209.4.2  jmcneill 			tsleep(&xfer->hcflags, PZERO, "uhciaw", 0);
   2009  1.209.4.2  jmcneill 		return;
   2010  1.209.4.2  jmcneill 	}
   2011  1.209.4.2  jmcneill 	xfer->hcflags |= UXFER_ABORTING;
   2012  1.209.4.2  jmcneill 
   2013  1.209.4.2  jmcneill 	/*
   2014  1.209.4.2  jmcneill 	 * Step 1: Make interrupt routine and hardware ignore xfer.
   2015  1.209.4.2  jmcneill 	 */
   2016  1.209.4.2  jmcneill 	s = splusb();
   2017  1.209.4.2  jmcneill 	xfer->status = status;	/* make software ignore it */
   2018  1.209.4.2  jmcneill 	usb_uncallout(xfer->timeout_handle, uhci_timeout, ii);
   2019  1.209.4.2  jmcneill 	DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii));
   2020  1.209.4.2  jmcneill 	for (std = ii->stdstart; std != NULL; std = std->link.std)
   2021  1.209.4.2  jmcneill 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
   2022  1.209.4.2  jmcneill 	splx(s);
   2023  1.209.4.2  jmcneill 
   2024  1.209.4.2  jmcneill 	/*
   2025  1.209.4.2  jmcneill 	 * Step 2: Wait until we know hardware has finished any possible
   2026  1.209.4.2  jmcneill 	 * use of the xfer.  Also make sure the soft interrupt routine
   2027  1.209.4.2  jmcneill 	 * has run.
   2028  1.209.4.2  jmcneill 	 */
   2029  1.209.4.2  jmcneill 	usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */
   2030  1.209.4.2  jmcneill 	s = splusb();
   2031  1.209.4.2  jmcneill #ifdef USB_USE_SOFTINTR
   2032  1.209.4.2  jmcneill 	sc->sc_softwake = 1;
   2033  1.209.4.2  jmcneill #endif /* USB_USE_SOFTINTR */
   2034  1.209.4.2  jmcneill 	usb_schedsoftintr(&sc->sc_bus);
   2035  1.209.4.2  jmcneill #ifdef USB_USE_SOFTINTR
   2036  1.209.4.2  jmcneill 	DPRINTFN(1,("uhci_abort_xfer: tsleep\n"));
   2037  1.209.4.2  jmcneill 	tsleep(&sc->sc_softwake, PZERO, "uhciab", 0);
   2038  1.209.4.2  jmcneill #endif /* USB_USE_SOFTINTR */
   2039  1.209.4.2  jmcneill 	splx(s);
   2040  1.209.4.2  jmcneill 
   2041  1.209.4.2  jmcneill 	/*
   2042  1.209.4.2  jmcneill 	 * Step 3: Execute callback.
   2043  1.209.4.2  jmcneill 	 */
   2044  1.209.4.2  jmcneill 	DPRINTFN(1,("uhci_abort_xfer: callback\n"));
   2045  1.209.4.2  jmcneill 	s = splusb();
   2046  1.209.4.2  jmcneill #ifdef DIAGNOSTIC
   2047  1.209.4.2  jmcneill 	ii->isdone = 1;
   2048  1.209.4.2  jmcneill #endif
   2049  1.209.4.2  jmcneill 	wake = xfer->hcflags & UXFER_ABORTWAIT;
   2050  1.209.4.2  jmcneill 	xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
   2051  1.209.4.2  jmcneill 	usb_transfer_complete(xfer);
   2052  1.209.4.2  jmcneill 	if (wake)
   2053  1.209.4.2  jmcneill 		wakeup(&xfer->hcflags);
   2054  1.209.4.2  jmcneill 	splx(s);
   2055  1.209.4.2  jmcneill }
   2056  1.209.4.2  jmcneill 
   2057  1.209.4.2  jmcneill /* Close a device bulk pipe. */
   2058  1.209.4.2  jmcneill void
   2059  1.209.4.2  jmcneill uhci_device_bulk_close(usbd_pipe_handle pipe)
   2060  1.209.4.2  jmcneill {
   2061  1.209.4.2  jmcneill 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2062  1.209.4.2  jmcneill 	usbd_device_handle dev = upipe->pipe.device;
   2063  1.209.4.2  jmcneill 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   2064  1.209.4.2  jmcneill 
   2065  1.209.4.2  jmcneill 	uhci_free_sqh(sc, upipe->u.bulk.sqh);
   2066  1.209.4.2  jmcneill }
   2067  1.209.4.2  jmcneill 
   2068  1.209.4.2  jmcneill usbd_status
   2069  1.209.4.2  jmcneill uhci_device_ctrl_transfer(usbd_xfer_handle xfer)
   2070  1.209.4.2  jmcneill {
   2071  1.209.4.2  jmcneill 	usbd_status err;
   2072  1.209.4.2  jmcneill 
   2073  1.209.4.2  jmcneill 	/* Insert last in queue. */
   2074  1.209.4.2  jmcneill 	err = usb_insert_transfer(xfer);
   2075  1.209.4.2  jmcneill 	if (err)
   2076  1.209.4.2  jmcneill 		return (err);
   2077  1.209.4.2  jmcneill 
   2078  1.209.4.2  jmcneill 	/*
   2079  1.209.4.2  jmcneill 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2080  1.209.4.2  jmcneill 	 * so start it first.
   2081  1.209.4.2  jmcneill 	 */
   2082  1.209.4.2  jmcneill 	return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2083  1.209.4.2  jmcneill }
   2084  1.209.4.2  jmcneill 
   2085  1.209.4.2  jmcneill usbd_status
   2086  1.209.4.2  jmcneill uhci_device_ctrl_start(usbd_xfer_handle xfer)
   2087  1.209.4.2  jmcneill {
   2088  1.209.4.2  jmcneill 	uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
   2089  1.209.4.2  jmcneill 	usbd_status err;
   2090  1.209.4.2  jmcneill 
   2091  1.209.4.2  jmcneill 	if (sc->sc_dying)
   2092  1.209.4.2  jmcneill 		return (USBD_IOERROR);
   2093  1.209.4.2  jmcneill 
   2094  1.209.4.2  jmcneill #ifdef DIAGNOSTIC
   2095  1.209.4.2  jmcneill 	if (!(xfer->rqflags & URQ_REQUEST))
   2096  1.209.4.2  jmcneill 		panic("uhci_device_ctrl_transfer: not a request");
   2097  1.209.4.2  jmcneill #endif
   2098  1.209.4.2  jmcneill 
   2099  1.209.4.2  jmcneill 	err = uhci_device_request(xfer);
   2100  1.209.4.2  jmcneill 	if (err)
   2101  1.209.4.2  jmcneill 		return (err);
   2102  1.209.4.2  jmcneill 
   2103  1.209.4.2  jmcneill 	if (sc->sc_bus.use_polling)
   2104  1.209.4.2  jmcneill 		uhci_waitintr(sc, xfer);
   2105  1.209.4.2  jmcneill 	return (USBD_IN_PROGRESS);
   2106  1.209.4.2  jmcneill }
   2107  1.209.4.2  jmcneill 
   2108  1.209.4.2  jmcneill usbd_status
   2109  1.209.4.2  jmcneill uhci_device_intr_transfer(usbd_xfer_handle xfer)
   2110  1.209.4.2  jmcneill {
   2111  1.209.4.2  jmcneill 	usbd_status err;
   2112  1.209.4.2  jmcneill 
   2113  1.209.4.2  jmcneill 	/* Insert last in queue. */
   2114  1.209.4.2  jmcneill 	err = usb_insert_transfer(xfer);
   2115  1.209.4.2  jmcneill 	if (err)
   2116  1.209.4.2  jmcneill 		return (err);
   2117  1.209.4.2  jmcneill 
   2118  1.209.4.2  jmcneill 	/*
   2119  1.209.4.2  jmcneill 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2120  1.209.4.2  jmcneill 	 * so start it first.
   2121  1.209.4.2  jmcneill 	 */
   2122  1.209.4.2  jmcneill 	return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2123  1.209.4.2  jmcneill }
   2124  1.209.4.2  jmcneill 
   2125  1.209.4.2  jmcneill usbd_status
   2126  1.209.4.2  jmcneill uhci_device_intr_start(usbd_xfer_handle xfer)
   2127  1.209.4.2  jmcneill {
   2128  1.209.4.2  jmcneill 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2129  1.209.4.2  jmcneill 	usbd_device_handle dev = upipe->pipe.device;
   2130  1.209.4.2  jmcneill 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   2131  1.209.4.2  jmcneill 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2132  1.209.4.2  jmcneill 	uhci_soft_td_t *data, *dataend;
   2133  1.209.4.2  jmcneill 	uhci_soft_qh_t *sqh;
   2134  1.209.4.2  jmcneill 	usbd_status err;
   2135  1.209.4.2  jmcneill 	int isread, endpt;
   2136  1.209.4.2  jmcneill 	int i, s;
   2137  1.209.4.2  jmcneill 
   2138  1.209.4.2  jmcneill 	if (sc->sc_dying)
   2139  1.209.4.2  jmcneill 		return (USBD_IOERROR);
   2140  1.209.4.2  jmcneill 
   2141  1.209.4.2  jmcneill 	DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n",
   2142  1.209.4.2  jmcneill 		    xfer, xfer->length, xfer->flags));
   2143  1.209.4.2  jmcneill 
   2144  1.209.4.2  jmcneill #ifdef DIAGNOSTIC
   2145  1.209.4.2  jmcneill 	if (xfer->rqflags & URQ_REQUEST)
   2146  1.209.4.2  jmcneill 		panic("uhci_device_intr_transfer: a request");
   2147  1.209.4.2  jmcneill #endif
   2148  1.209.4.2  jmcneill 
   2149  1.209.4.2  jmcneill 	endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2150  1.209.4.2  jmcneill 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2151  1.209.4.2  jmcneill 
   2152  1.209.4.2  jmcneill 	upipe->u.intr.isread = isread;
   2153  1.209.4.2  jmcneill 
   2154  1.209.4.2  jmcneill 	err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread,
   2155  1.209.4.2  jmcneill 				   xfer->flags, &xfer->dmabuf, &data,
   2156  1.209.4.2  jmcneill 				   &dataend);
   2157  1.209.4.2  jmcneill 	if (err)
   2158  1.209.4.2  jmcneill 		return (err);
   2159  1.209.4.2  jmcneill 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2160  1.209.4.2  jmcneill 
   2161  1.209.4.2  jmcneill #ifdef UHCI_DEBUG
   2162  1.209.4.2  jmcneill 	if (uhcidebug > 10) {
   2163  1.209.4.2  jmcneill 		DPRINTF(("uhci_device_intr_transfer: data(1)\n"));
   2164  1.209.4.2  jmcneill 		uhci_dump_tds(data);
   2165  1.209.4.2  jmcneill 		uhci_dump_qh(upipe->u.intr.qhs[0]);
   2166  1.209.4.2  jmcneill 	}
   2167  1.209.4.2  jmcneill #endif
   2168  1.209.4.2  jmcneill 
   2169  1.209.4.2  jmcneill 	s = splusb();
   2170  1.209.4.2  jmcneill 	/* Set up interrupt info. */
   2171  1.209.4.2  jmcneill 	ii->xfer = xfer;
   2172  1.209.4.2  jmcneill 	ii->stdstart = data;
   2173  1.209.4.2  jmcneill 	ii->stdend = dataend;
   2174  1.209.4.2  jmcneill #ifdef DIAGNOSTIC
   2175  1.209.4.2  jmcneill 	if (!ii->isdone) {
   2176  1.209.4.2  jmcneill 		printf("uhci_device_intr_transfer: not done, ii=%p\n", ii);
   2177  1.209.4.2  jmcneill 	}
   2178  1.209.4.2  jmcneill 	ii->isdone = 0;
   2179  1.209.4.2  jmcneill #endif
   2180  1.209.4.2  jmcneill 
   2181  1.209.4.2  jmcneill 	DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
   2182  1.209.4.2  jmcneill 		     upipe->u.intr.qhs[0]));
   2183  1.209.4.2  jmcneill 	for (i = 0; i < upipe->u.intr.npoll; i++) {
   2184  1.209.4.2  jmcneill 		sqh = upipe->u.intr.qhs[i];
   2185  1.209.4.2  jmcneill 		sqh->elink = data;
   2186  1.209.4.2  jmcneill 		sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2187  1.209.4.2  jmcneill 	}
   2188  1.209.4.2  jmcneill 	uhci_add_intr_info(sc, ii);
   2189  1.209.4.2  jmcneill 	xfer->status = USBD_IN_PROGRESS;
   2190  1.209.4.2  jmcneill 	splx(s);
   2191  1.209.4.2  jmcneill 
   2192  1.209.4.2  jmcneill #ifdef UHCI_DEBUG
   2193  1.209.4.2  jmcneill 	if (uhcidebug > 10) {
   2194  1.209.4.2  jmcneill 		DPRINTF(("uhci_device_intr_transfer: data(2)\n"));
   2195  1.209.4.2  jmcneill 		uhci_dump_tds(data);
   2196  1.209.4.2  jmcneill 		uhci_dump_qh(upipe->u.intr.qhs[0]);
   2197  1.209.4.2  jmcneill 	}
   2198  1.209.4.2  jmcneill #endif
   2199  1.209.4.2  jmcneill 
   2200  1.209.4.2  jmcneill 	return (USBD_IN_PROGRESS);
   2201  1.209.4.2  jmcneill }
   2202  1.209.4.2  jmcneill 
   2203  1.209.4.2  jmcneill /* Abort a device control request. */
   2204  1.209.4.2  jmcneill void
   2205  1.209.4.2  jmcneill uhci_device_ctrl_abort(usbd_xfer_handle xfer)
   2206  1.209.4.2  jmcneill {
   2207  1.209.4.2  jmcneill 	DPRINTF(("uhci_device_ctrl_abort:\n"));
   2208  1.209.4.2  jmcneill 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2209  1.209.4.2  jmcneill }
   2210  1.209.4.2  jmcneill 
   2211  1.209.4.2  jmcneill /* Close a device control pipe. */
   2212  1.209.4.2  jmcneill void
   2213  1.209.4.2  jmcneill uhci_device_ctrl_close(usbd_pipe_handle pipe)
   2214  1.209.4.2  jmcneill {
   2215  1.209.4.2  jmcneill }
   2216  1.209.4.2  jmcneill 
   2217  1.209.4.2  jmcneill /* Abort a device interrupt request. */
   2218  1.209.4.2  jmcneill void
   2219  1.209.4.2  jmcneill uhci_device_intr_abort(usbd_xfer_handle xfer)
   2220  1.209.4.2  jmcneill {
   2221  1.209.4.2  jmcneill 	DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer));
   2222  1.209.4.2  jmcneill 	if (xfer->pipe->intrxfer == xfer) {
   2223  1.209.4.2  jmcneill 		DPRINTFN(1,("uhci_device_intr_abort: remove\n"));
   2224  1.209.4.2  jmcneill 		xfer->pipe->intrxfer = NULL;
   2225  1.209.4.2  jmcneill 	}
   2226  1.209.4.2  jmcneill 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2227  1.209.4.2  jmcneill }
   2228  1.209.4.2  jmcneill 
   2229  1.209.4.2  jmcneill /* Close a device interrupt pipe. */
   2230  1.209.4.2  jmcneill void
   2231  1.209.4.2  jmcneill uhci_device_intr_close(usbd_pipe_handle pipe)
   2232  1.209.4.2  jmcneill {
   2233  1.209.4.2  jmcneill 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2234  1.209.4.2  jmcneill 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
   2235  1.209.4.2  jmcneill 	int i, npoll;
   2236  1.209.4.2  jmcneill 	int s;
   2237  1.209.4.2  jmcneill 
   2238  1.209.4.2  jmcneill 	/* Unlink descriptors from controller data structures. */
   2239  1.209.4.2  jmcneill 	npoll = upipe->u.intr.npoll;
   2240  1.209.4.2  jmcneill 	s = splusb();
   2241  1.209.4.2  jmcneill 	for (i = 0; i < npoll; i++)
   2242  1.209.4.2  jmcneill 		uhci_remove_intr(sc, upipe->u.intr.qhs[i]);
   2243  1.209.4.2  jmcneill 	splx(s);
   2244  1.209.4.2  jmcneill 
   2245  1.209.4.2  jmcneill 	/*
   2246  1.209.4.2  jmcneill 	 * We now have to wait for any activity on the physical
   2247  1.209.4.2  jmcneill 	 * descriptors to stop.
   2248  1.209.4.2  jmcneill 	 */
   2249  1.209.4.2  jmcneill 	usb_delay_ms(&sc->sc_bus, 2);
   2250  1.209.4.2  jmcneill 
   2251  1.209.4.2  jmcneill 	for(i = 0; i < npoll; i++)
   2252  1.209.4.2  jmcneill 		uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
   2253  1.209.4.2  jmcneill 	free(upipe->u.intr.qhs, M_USBHC);
   2254  1.209.4.2  jmcneill 
   2255  1.209.4.2  jmcneill 	/* XXX free other resources */
   2256  1.209.4.2  jmcneill }
   2257  1.209.4.2  jmcneill 
   2258  1.209.4.2  jmcneill usbd_status
   2259  1.209.4.2  jmcneill uhci_device_request(usbd_xfer_handle xfer)
   2260  1.209.4.2  jmcneill {
   2261  1.209.4.2  jmcneill 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2262  1.209.4.2  jmcneill 	usb_device_request_t *req = &xfer->request;
   2263  1.209.4.2  jmcneill 	usbd_device_handle dev = upipe->pipe.device;
   2264  1.209.4.2  jmcneill 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   2265  1.209.4.2  jmcneill 	int addr = dev->address;
   2266  1.209.4.2  jmcneill 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2267  1.209.4.2  jmcneill 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2268  1.209.4.2  jmcneill 	uhci_soft_td_t *setup, *data, *stat, *next, *dataend;
   2269  1.209.4.2  jmcneill 	uhci_soft_qh_t *sqh;
   2270  1.209.4.2  jmcneill 	int len;
   2271  1.209.4.2  jmcneill 	u_int32_t ls;
   2272  1.209.4.2  jmcneill 	usbd_status err;
   2273  1.209.4.2  jmcneill 	int isread;
   2274  1.209.4.2  jmcneill 	int s;
   2275  1.209.4.2  jmcneill 
   2276  1.209.4.2  jmcneill 	DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
   2277  1.209.4.2  jmcneill 		    "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
   2278  1.209.4.2  jmcneill 		    req->bmRequestType, req->bRequest, UGETW(req->wValue),
   2279  1.209.4.2  jmcneill 		    UGETW(req->wIndex), UGETW(req->wLength),
   2280  1.209.4.2  jmcneill 		    addr, endpt));
   2281  1.209.4.2  jmcneill 
   2282  1.209.4.2  jmcneill 	ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0;
   2283  1.209.4.2  jmcneill 	isread = req->bmRequestType & UT_READ;
   2284  1.209.4.2  jmcneill 	len = UGETW(req->wLength);
   2285  1.209.4.2  jmcneill 
   2286  1.209.4.2  jmcneill 	setup = upipe->u.ctl.setup;
   2287  1.209.4.2  jmcneill 	stat = upipe->u.ctl.stat;
   2288  1.209.4.2  jmcneill 	sqh = upipe->u.ctl.sqh;
   2289  1.209.4.2  jmcneill 
   2290  1.209.4.2  jmcneill 	/* Set up data transaction */
   2291  1.209.4.2  jmcneill 	if (len != 0) {
   2292  1.209.4.2  jmcneill 		upipe->nexttoggle = 1;
   2293  1.209.4.2  jmcneill 		err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
   2294  1.209.4.2  jmcneill 					   &xfer->dmabuf, &data, &dataend);
   2295  1.209.4.2  jmcneill 		if (err)
   2296  1.209.4.2  jmcneill 			return (err);
   2297  1.209.4.2  jmcneill 		next = data;
   2298  1.209.4.2  jmcneill 		dataend->link.std = stat;
   2299  1.209.4.2  jmcneill 		dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
   2300  1.209.4.2  jmcneill 	} else {
   2301  1.209.4.2  jmcneill 		next = stat;
   2302  1.209.4.2  jmcneill 	}
   2303  1.209.4.2  jmcneill 	upipe->u.ctl.length = len;
   2304  1.209.4.2  jmcneill 
   2305  1.209.4.2  jmcneill 	memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req);
   2306  1.209.4.2  jmcneill 
   2307  1.209.4.2  jmcneill 	setup->link.std = next;
   2308  1.209.4.2  jmcneill 	setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
   2309  1.209.4.2  jmcneill 	setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
   2310  1.209.4.2  jmcneill 		UHCI_TD_ACTIVE);
   2311  1.209.4.2  jmcneill 	setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr));
   2312  1.209.4.2  jmcneill 	setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0));
   2313  1.209.4.2  jmcneill 
   2314  1.209.4.2  jmcneill 	stat->link.std = NULL;
   2315  1.209.4.2  jmcneill 	stat->td.td_link = htole32(UHCI_PTR_T);
   2316  1.209.4.2  jmcneill 	stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
   2317  1.209.4.2  jmcneill 		UHCI_TD_ACTIVE | UHCI_TD_IOC);
   2318  1.209.4.2  jmcneill 	stat->td.td_token =
   2319  1.209.4.2  jmcneill 		htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
   2320  1.209.4.2  jmcneill 		                 UHCI_TD_IN (0, endpt, addr, 1));
   2321  1.209.4.2  jmcneill 	stat->td.td_buffer = htole32(0);
   2322  1.209.4.2  jmcneill 
   2323  1.209.4.2  jmcneill #ifdef UHCI_DEBUG
   2324  1.209.4.2  jmcneill 	if (uhcidebug > 10) {
   2325  1.209.4.2  jmcneill 		DPRINTF(("uhci_device_request: before transfer\n"));
   2326  1.209.4.2  jmcneill 		uhci_dump_tds(setup);
   2327  1.209.4.2  jmcneill 	}
   2328  1.209.4.2  jmcneill #endif
   2329  1.209.4.2  jmcneill 
   2330  1.209.4.2  jmcneill 	/* Set up interrupt info. */
   2331  1.209.4.2  jmcneill 	ii->xfer = xfer;
   2332  1.209.4.2  jmcneill 	ii->stdstart = setup;
   2333  1.209.4.2  jmcneill 	ii->stdend = stat;
   2334  1.209.4.2  jmcneill #ifdef DIAGNOSTIC
   2335  1.209.4.2  jmcneill 	if (!ii->isdone) {
   2336  1.209.4.2  jmcneill 		printf("uhci_device_request: not done, ii=%p\n", ii);
   2337  1.209.4.2  jmcneill 	}
   2338  1.209.4.2  jmcneill 	ii->isdone = 0;
   2339  1.209.4.2  jmcneill #endif
   2340  1.209.4.2  jmcneill 
   2341  1.209.4.2  jmcneill 	sqh->elink = setup;
   2342  1.209.4.2  jmcneill 	sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD);
   2343  1.209.4.2  jmcneill 
   2344  1.209.4.2  jmcneill 	s = splusb();
   2345  1.209.4.2  jmcneill 	if (dev->speed == USB_SPEED_LOW)
   2346  1.209.4.2  jmcneill 		uhci_add_ls_ctrl(sc, sqh);
   2347  1.209.4.2  jmcneill 	else
   2348  1.209.4.2  jmcneill 		uhci_add_hs_ctrl(sc, sqh);
   2349  1.209.4.2  jmcneill 	uhci_add_intr_info(sc, ii);
   2350  1.209.4.2  jmcneill #ifdef UHCI_DEBUG
   2351  1.209.4.2  jmcneill 	if (uhcidebug > 12) {
   2352  1.209.4.2  jmcneill 		uhci_soft_td_t *std;
   2353  1.209.4.2  jmcneill 		uhci_soft_qh_t *xqh;
   2354  1.209.4.2  jmcneill 		uhci_soft_qh_t *sxqh;
   2355  1.209.4.2  jmcneill 		int maxqh = 0;
   2356  1.209.4.2  jmcneill 		uhci_physaddr_t link;
   2357  1.209.4.2  jmcneill 		DPRINTF(("uhci_enter_ctl_q: follow from [0]\n"));
   2358  1.209.4.2  jmcneill 		for (std = sc->sc_vframes[0].htd, link = 0;
   2359  1.209.4.2  jmcneill 		     (link & UHCI_PTR_QH) == 0;
   2360  1.209.4.2  jmcneill 		     std = std->link.std) {
   2361  1.209.4.2  jmcneill 			link = le32toh(std->td.td_link);
   2362  1.209.4.2  jmcneill 			uhci_dump_td(std);
   2363  1.209.4.2  jmcneill 		}
   2364  1.209.4.2  jmcneill 		sxqh = (uhci_soft_qh_t *)std;
   2365  1.209.4.2  jmcneill 		uhci_dump_qh(sxqh);
   2366  1.209.4.2  jmcneill 		for (xqh = sxqh;
   2367  1.209.4.2  jmcneill 		     xqh != NULL;
   2368  1.209.4.2  jmcneill 		     xqh = (maxqh++ == 5 || xqh->hlink == sxqh ||
   2369  1.209.4.2  jmcneill                             xqh->hlink == xqh ? NULL : xqh->hlink)) {
   2370  1.209.4.2  jmcneill 			uhci_dump_qh(xqh);
   2371  1.209.4.2  jmcneill 		}
   2372  1.209.4.2  jmcneill 		DPRINTF(("Enqueued QH:\n"));
   2373  1.209.4.2  jmcneill 		uhci_dump_qh(sqh);
   2374  1.209.4.2  jmcneill 		uhci_dump_tds(sqh->elink);
   2375  1.209.4.2  jmcneill 	}
   2376  1.209.4.2  jmcneill #endif
   2377  1.209.4.2  jmcneill 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   2378  1.209.4.2  jmcneill 		usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
   2379  1.209.4.2  jmcneill 			    uhci_timeout, ii);
   2380  1.209.4.2  jmcneill 	}
   2381  1.209.4.2  jmcneill 	xfer->status = USBD_IN_PROGRESS;
   2382  1.209.4.2  jmcneill 	splx(s);
   2383  1.209.4.2  jmcneill 
   2384  1.209.4.2  jmcneill 	return (USBD_NORMAL_COMPLETION);
   2385  1.209.4.2  jmcneill }
   2386  1.209.4.2  jmcneill 
   2387  1.209.4.2  jmcneill usbd_status
   2388  1.209.4.2  jmcneill uhci_device_isoc_transfer(usbd_xfer_handle xfer)
   2389  1.209.4.2  jmcneill {
   2390  1.209.4.2  jmcneill 	usbd_status err;
   2391  1.209.4.2  jmcneill 
   2392  1.209.4.2  jmcneill 	DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer));
   2393  1.209.4.2  jmcneill 
   2394  1.209.4.2  jmcneill 	/* Put it on our queue, */
   2395  1.209.4.2  jmcneill 	err = usb_insert_transfer(xfer);
   2396  1.209.4.2  jmcneill 
   2397  1.209.4.2  jmcneill 	/* bail out on error, */
   2398  1.209.4.2  jmcneill 	if (err && err != USBD_IN_PROGRESS)
   2399  1.209.4.2  jmcneill 		return (err);
   2400  1.209.4.2  jmcneill 
   2401  1.209.4.2  jmcneill 	/* XXX should check inuse here */
   2402  1.209.4.2  jmcneill 
   2403  1.209.4.2  jmcneill 	/* insert into schedule, */
   2404  1.209.4.2  jmcneill 	uhci_device_isoc_enter(xfer);
   2405  1.209.4.2  jmcneill 
   2406  1.209.4.2  jmcneill 	/* and start if the pipe wasn't running */
   2407  1.209.4.2  jmcneill 	if (!err)
   2408  1.209.4.2  jmcneill 		uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
   2409  1.209.4.2  jmcneill 
   2410  1.209.4.2  jmcneill 	return (err);
   2411  1.209.4.2  jmcneill }
   2412  1.209.4.2  jmcneill 
   2413  1.209.4.2  jmcneill void
   2414  1.209.4.2  jmcneill uhci_device_isoc_enter(usbd_xfer_handle xfer)
   2415  1.209.4.2  jmcneill {
   2416  1.209.4.2  jmcneill 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2417  1.209.4.2  jmcneill 	usbd_device_handle dev = upipe->pipe.device;
   2418  1.209.4.2  jmcneill 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   2419  1.209.4.2  jmcneill 	struct iso *iso = &upipe->u.iso;
   2420  1.209.4.2  jmcneill 	uhci_soft_td_t *std;
   2421  1.209.4.2  jmcneill 	u_int32_t buf, len, status;
   2422  1.209.4.2  jmcneill 	int s, i, next, nframes;
   2423  1.209.4.2  jmcneill 
   2424  1.209.4.2  jmcneill 	DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p "
   2425  1.209.4.2  jmcneill 		    "nframes=%d\n",
   2426  1.209.4.2  jmcneill 		    iso->inuse, iso->next, xfer, xfer->nframes));
   2427  1.209.4.2  jmcneill 
   2428  1.209.4.2  jmcneill 	if (sc->sc_dying)
   2429  1.209.4.2  jmcneill 		return;
   2430  1.209.4.2  jmcneill 
   2431  1.209.4.2  jmcneill 	if (xfer->status == USBD_IN_PROGRESS) {
   2432  1.209.4.2  jmcneill 		/* This request has already been entered into the frame list */
   2433  1.209.4.2  jmcneill 		printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer);
   2434  1.209.4.2  jmcneill 		/* XXX */
   2435  1.209.4.2  jmcneill 	}
   2436  1.209.4.2  jmcneill 
   2437  1.209.4.2  jmcneill #ifdef DIAGNOSTIC
   2438  1.209.4.2  jmcneill 	if (iso->inuse >= UHCI_VFRAMELIST_COUNT)
   2439  1.209.4.2  jmcneill 		printf("uhci_device_isoc_enter: overflow!\n");
   2440  1.209.4.2  jmcneill #endif
   2441  1.209.4.2  jmcneill 
   2442  1.209.4.2  jmcneill 	next = iso->next;
   2443  1.209.4.2  jmcneill 	if (next == -1) {
   2444  1.209.4.2  jmcneill 		/* Not in use yet, schedule it a few frames ahead. */
   2445  1.209.4.2  jmcneill 		next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
   2446  1.209.4.2  jmcneill 		DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next));
   2447  1.209.4.2  jmcneill 	}
   2448  1.209.4.2  jmcneill 
   2449  1.209.4.2  jmcneill 	xfer->status = USBD_IN_PROGRESS;
   2450  1.209.4.2  jmcneill 	UXFER(xfer)->curframe = next;
   2451  1.209.4.2  jmcneill 
   2452  1.209.4.2  jmcneill 	buf = DMAADDR(&xfer->dmabuf, 0);
   2453  1.209.4.2  jmcneill 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |
   2454  1.209.4.2  jmcneill 				     UHCI_TD_ACTIVE |
   2455  1.209.4.2  jmcneill 				     UHCI_TD_IOS);
   2456  1.209.4.2  jmcneill 	nframes = xfer->nframes;
   2457  1.209.4.2  jmcneill 	s = splusb();
   2458  1.209.4.2  jmcneill 	for (i = 0; i < nframes; i++) {
   2459  1.209.4.2  jmcneill 		std = iso->stds[next];
   2460  1.209.4.2  jmcneill 		if (++next >= UHCI_VFRAMELIST_COUNT)
   2461  1.209.4.2  jmcneill 			next = 0;
   2462  1.209.4.2  jmcneill 		len = xfer->frlengths[i];
   2463  1.209.4.2  jmcneill 		std->td.td_buffer = htole32(buf);
   2464  1.209.4.2  jmcneill 		if (i == nframes - 1)
   2465  1.209.4.2  jmcneill 			status |= UHCI_TD_IOC;
   2466  1.209.4.2  jmcneill 		std->td.td_status = htole32(status);
   2467  1.209.4.2  jmcneill 		std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK);
   2468  1.209.4.2  jmcneill 		std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len));
   2469  1.209.4.2  jmcneill #ifdef UHCI_DEBUG
   2470  1.209.4.2  jmcneill 		if (uhcidebug > 5) {
   2471  1.209.4.2  jmcneill 			DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i));
   2472  1.209.4.2  jmcneill 			uhci_dump_td(std);
   2473  1.209.4.2  jmcneill 		}
   2474  1.209.4.2  jmcneill #endif
   2475  1.209.4.2  jmcneill 		buf += len;
   2476  1.209.4.2  jmcneill 	}
   2477  1.209.4.2  jmcneill 	iso->next = next;
   2478  1.209.4.2  jmcneill 	iso->inuse += xfer->nframes;
   2479  1.209.4.2  jmcneill 
   2480  1.209.4.2  jmcneill 	splx(s);
   2481  1.209.4.2  jmcneill }
   2482  1.209.4.2  jmcneill 
   2483  1.209.4.2  jmcneill usbd_status
   2484  1.209.4.2  jmcneill uhci_device_isoc_start(usbd_xfer_handle xfer)
   2485  1.209.4.2  jmcneill {
   2486  1.209.4.2  jmcneill 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2487  1.209.4.2  jmcneill 	uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
   2488  1.209.4.2  jmcneill 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2489  1.209.4.2  jmcneill 	uhci_soft_td_t *end;
   2490  1.209.4.2  jmcneill 	int s, i;
   2491  1.209.4.2  jmcneill 
   2492  1.209.4.2  jmcneill 	DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer));
   2493  1.209.4.2  jmcneill 
   2494  1.209.4.2  jmcneill 	if (sc->sc_dying)
   2495  1.209.4.2  jmcneill 		return (USBD_IOERROR);
   2496  1.209.4.2  jmcneill 
   2497  1.209.4.2  jmcneill #ifdef DIAGNOSTIC
   2498  1.209.4.2  jmcneill 	if (xfer->status != USBD_IN_PROGRESS)
   2499  1.209.4.2  jmcneill 		printf("uhci_device_isoc_start: not in progress %p\n", xfer);
   2500  1.209.4.2  jmcneill #endif
   2501  1.209.4.2  jmcneill 
   2502  1.209.4.2  jmcneill 	/* Find the last TD */
   2503  1.209.4.2  jmcneill 	i = UXFER(xfer)->curframe + xfer->nframes;
   2504  1.209.4.2  jmcneill 	if (i >= UHCI_VFRAMELIST_COUNT)
   2505  1.209.4.2  jmcneill 		i -= UHCI_VFRAMELIST_COUNT;
   2506  1.209.4.2  jmcneill 	end = upipe->u.iso.stds[i];
   2507  1.209.4.2  jmcneill 
   2508  1.209.4.2  jmcneill #ifdef DIAGNOSTIC
   2509  1.209.4.2  jmcneill 	if (end == NULL) {
   2510  1.209.4.2  jmcneill 		printf("uhci_device_isoc_start: end == NULL\n");
   2511  1.209.4.2  jmcneill 		return (USBD_INVAL);
   2512  1.209.4.2  jmcneill 	}
   2513  1.209.4.2  jmcneill #endif
   2514  1.209.4.2  jmcneill 
   2515  1.209.4.2  jmcneill 	s = splusb();
   2516  1.209.4.2  jmcneill 
   2517  1.209.4.2  jmcneill 	/* Set up interrupt info. */
   2518  1.209.4.2  jmcneill 	ii->xfer = xfer;
   2519  1.209.4.2  jmcneill 	ii->stdstart = end;
   2520  1.209.4.2  jmcneill 	ii->stdend = end;
   2521  1.209.4.2  jmcneill #ifdef DIAGNOSTIC
   2522  1.209.4.2  jmcneill 	if (!ii->isdone)
   2523  1.209.4.2  jmcneill 		printf("uhci_device_isoc_start: not done, ii=%p\n", ii);
   2524  1.209.4.2  jmcneill 	ii->isdone = 0;
   2525  1.209.4.2  jmcneill #endif
   2526  1.209.4.2  jmcneill 	uhci_add_intr_info(sc, ii);
   2527  1.209.4.2  jmcneill 
   2528  1.209.4.2  jmcneill 	splx(s);
   2529  1.209.4.2  jmcneill 
   2530  1.209.4.2  jmcneill 	return (USBD_IN_PROGRESS);
   2531  1.209.4.2  jmcneill }
   2532  1.209.4.2  jmcneill 
   2533  1.209.4.2  jmcneill void
   2534  1.209.4.2  jmcneill uhci_device_isoc_abort(usbd_xfer_handle xfer)
   2535  1.209.4.2  jmcneill {
   2536  1.209.4.2  jmcneill 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2537  1.209.4.2  jmcneill 	uhci_soft_td_t **stds = upipe->u.iso.stds;
   2538  1.209.4.2  jmcneill 	uhci_soft_td_t *std;
   2539  1.209.4.2  jmcneill 	int i, n, s, nframes, maxlen, len;
   2540  1.209.4.2  jmcneill 
   2541  1.209.4.2  jmcneill 	s = splusb();
   2542  1.209.4.2  jmcneill 
   2543  1.209.4.2  jmcneill 	/* Transfer is already done. */
   2544  1.209.4.2  jmcneill 	if (xfer->status != USBD_NOT_STARTED &&
   2545  1.209.4.2  jmcneill 	    xfer->status != USBD_IN_PROGRESS) {
   2546  1.209.4.2  jmcneill 		splx(s);
   2547  1.209.4.2  jmcneill 		return;
   2548  1.209.4.2  jmcneill 	}
   2549  1.209.4.2  jmcneill 
   2550  1.209.4.2  jmcneill 	/* Give xfer the requested abort code. */
   2551  1.209.4.2  jmcneill 	xfer->status = USBD_CANCELLED;
   2552  1.209.4.2  jmcneill 
   2553  1.209.4.2  jmcneill 	/* make hardware ignore it, */
   2554  1.209.4.2  jmcneill 	nframes = xfer->nframes;
   2555  1.209.4.2  jmcneill 	n = UXFER(xfer)->curframe;
   2556  1.209.4.2  jmcneill 	maxlen = 0;
   2557  1.209.4.2  jmcneill 	for (i = 0; i < nframes; i++) {
   2558  1.209.4.2  jmcneill 		std = stds[n];
   2559  1.209.4.2  jmcneill 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
   2560  1.209.4.2  jmcneill 		len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token));
   2561  1.209.4.2  jmcneill 		if (len > maxlen)
   2562  1.209.4.2  jmcneill 			maxlen = len;
   2563  1.209.4.2  jmcneill 		if (++n >= UHCI_VFRAMELIST_COUNT)
   2564  1.209.4.2  jmcneill 			n = 0;
   2565  1.209.4.2  jmcneill 	}
   2566  1.209.4.2  jmcneill 
   2567  1.209.4.2  jmcneill 	/* and wait until we are sure the hardware has finished. */
   2568  1.209.4.2  jmcneill 	delay(maxlen);
   2569  1.209.4.2  jmcneill 
   2570  1.209.4.2  jmcneill #ifdef DIAGNOSTIC
   2571  1.209.4.2  jmcneill 	UXFER(xfer)->iinfo.isdone = 1;
   2572  1.209.4.2  jmcneill #endif
   2573  1.209.4.2  jmcneill 	/* Run callback and remove from interrupt list. */
   2574  1.209.4.2  jmcneill 	usb_transfer_complete(xfer);
   2575  1.209.4.2  jmcneill 
   2576  1.209.4.2  jmcneill 	splx(s);
   2577  1.209.4.2  jmcneill }
   2578  1.209.4.2  jmcneill 
   2579  1.209.4.2  jmcneill void
   2580  1.209.4.2  jmcneill uhci_device_isoc_close(usbd_pipe_handle pipe)
   2581  1.209.4.2  jmcneill {
   2582  1.209.4.2  jmcneill 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2583  1.209.4.2  jmcneill 	usbd_device_handle dev = upipe->pipe.device;
   2584  1.209.4.2  jmcneill 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   2585  1.209.4.2  jmcneill 	uhci_soft_td_t *std, *vstd;
   2586  1.209.4.2  jmcneill 	struct iso *iso;
   2587  1.209.4.2  jmcneill 	int i, s;
   2588  1.209.4.2  jmcneill 
   2589  1.209.4.2  jmcneill 	/*
   2590  1.209.4.2  jmcneill 	 * Make sure all TDs are marked as inactive.
   2591  1.209.4.2  jmcneill 	 * Wait for completion.
   2592  1.209.4.2  jmcneill 	 * Unschedule.
   2593  1.209.4.2  jmcneill 	 * Deallocate.
   2594  1.209.4.2  jmcneill 	 */
   2595  1.209.4.2  jmcneill 	iso = &upipe->u.iso;
   2596  1.209.4.2  jmcneill 
   2597  1.209.4.2  jmcneill 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++)
   2598  1.209.4.2  jmcneill 		iso->stds[i]->td.td_status &= htole32(~UHCI_TD_ACTIVE);
   2599  1.209.4.2  jmcneill 	usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */
   2600  1.209.4.2  jmcneill 
   2601  1.209.4.2  jmcneill 	s = splusb();
   2602  1.209.4.2  jmcneill 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2603  1.209.4.2  jmcneill 		std = iso->stds[i];
   2604  1.209.4.2  jmcneill 		for (vstd = sc->sc_vframes[i].htd;
   2605  1.209.4.2  jmcneill 		     vstd != NULL && vstd->link.std != std;
   2606  1.209.4.2  jmcneill 		     vstd = vstd->link.std)
   2607  1.209.4.2  jmcneill 			;
   2608  1.209.4.2  jmcneill 		if (vstd == NULL) {
   2609  1.209.4.2  jmcneill 			/*panic*/
   2610  1.209.4.2  jmcneill 			printf("uhci_device_isoc_close: %p not found\n", std);
   2611  1.209.4.2  jmcneill 			splx(s);
   2612  1.209.4.2  jmcneill 			return;
   2613  1.209.4.2  jmcneill 		}
   2614  1.209.4.2  jmcneill 		vstd->link = std->link;
   2615  1.209.4.2  jmcneill 		vstd->td.td_link = std->td.td_link;
   2616  1.209.4.2  jmcneill 		uhci_free_std(sc, std);
   2617  1.209.4.2  jmcneill 	}
   2618  1.209.4.2  jmcneill 	splx(s);
   2619  1.209.4.2  jmcneill 
   2620  1.209.4.2  jmcneill 	free(iso->stds, M_USBHC);
   2621  1.209.4.2  jmcneill }
   2622  1.209.4.2  jmcneill 
   2623  1.209.4.2  jmcneill usbd_status
   2624  1.209.4.2  jmcneill uhci_setup_isoc(usbd_pipe_handle pipe)
   2625  1.209.4.2  jmcneill {
   2626  1.209.4.2  jmcneill 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2627  1.209.4.2  jmcneill 	usbd_device_handle dev = upipe->pipe.device;
   2628  1.209.4.2  jmcneill 	uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
   2629  1.209.4.2  jmcneill 	int addr = upipe->pipe.device->address;
   2630  1.209.4.2  jmcneill 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2631  1.209.4.2  jmcneill 	int rd = UE_GET_DIR(endpt) == UE_DIR_IN;
   2632  1.209.4.2  jmcneill 	uhci_soft_td_t *std, *vstd;
   2633  1.209.4.2  jmcneill 	u_int32_t token;
   2634  1.209.4.2  jmcneill 	struct iso *iso;
   2635  1.209.4.2  jmcneill 	int i, s;
   2636  1.209.4.2  jmcneill 
   2637  1.209.4.2  jmcneill 	iso = &upipe->u.iso;
   2638  1.209.4.2  jmcneill 	iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *),
   2639  1.209.4.2  jmcneill 			   M_USBHC, M_WAITOK);
   2640  1.209.4.2  jmcneill 
   2641  1.209.4.2  jmcneill 	token = rd ? UHCI_TD_IN (0, endpt, addr, 0) :
   2642  1.209.4.2  jmcneill 		     UHCI_TD_OUT(0, endpt, addr, 0);
   2643  1.209.4.2  jmcneill 
   2644  1.209.4.2  jmcneill 	/* Allocate the TDs and mark as inactive; */
   2645  1.209.4.2  jmcneill 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2646  1.209.4.2  jmcneill 		std = uhci_alloc_std(sc);
   2647  1.209.4.2  jmcneill 		if (std == 0)
   2648  1.209.4.2  jmcneill 			goto bad;
   2649  1.209.4.2  jmcneill 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
   2650  1.209.4.2  jmcneill 		std->td.td_token = htole32(token);
   2651  1.209.4.2  jmcneill 		iso->stds[i] = std;
   2652  1.209.4.2  jmcneill 	}
   2653  1.209.4.2  jmcneill 
   2654  1.209.4.2  jmcneill 	/* Insert TDs into schedule. */
   2655  1.209.4.2  jmcneill 	s = splusb();
   2656  1.209.4.2  jmcneill 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2657  1.209.4.2  jmcneill 		std = iso->stds[i];
   2658  1.209.4.2  jmcneill 		vstd = sc->sc_vframes[i].htd;
   2659  1.209.4.2  jmcneill 		std->link = vstd->link;
   2660  1.209.4.2  jmcneill 		std->td.td_link = vstd->td.td_link;
   2661  1.209.4.2  jmcneill 		vstd->link.std = std;
   2662  1.209.4.2  jmcneill 		vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD);
   2663  1.209.4.2  jmcneill 	}
   2664  1.209.4.2  jmcneill 	splx(s);
   2665  1.209.4.2  jmcneill 
   2666  1.209.4.2  jmcneill 	iso->next = -1;
   2667  1.209.4.2  jmcneill 	iso->inuse = 0;
   2668  1.209.4.2  jmcneill 
   2669  1.209.4.2  jmcneill 	return (USBD_NORMAL_COMPLETION);
   2670  1.209.4.2  jmcneill 
   2671  1.209.4.2  jmcneill  bad:
   2672  1.209.4.2  jmcneill 	while (--i >= 0)
   2673  1.209.4.2  jmcneill 		uhci_free_std(sc, iso->stds[i]);
   2674  1.209.4.2  jmcneill 	free(iso->stds, M_USBHC);
   2675  1.209.4.2  jmcneill 	return (USBD_NOMEM);
   2676  1.209.4.2  jmcneill }
   2677  1.209.4.2  jmcneill 
   2678  1.209.4.2  jmcneill void
   2679  1.209.4.2  jmcneill uhci_device_isoc_done(usbd_xfer_handle xfer)
   2680  1.209.4.2  jmcneill {
   2681  1.209.4.2  jmcneill 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2682  1.209.4.2  jmcneill 
   2683  1.209.4.2  jmcneill 	DPRINTFN(4, ("uhci_isoc_done: length=%d, busy_free=0x%08x\n",
   2684  1.209.4.2  jmcneill 			xfer->actlen, xfer->busy_free));
   2685  1.209.4.2  jmcneill 
   2686  1.209.4.2  jmcneill 	if (ii->xfer != xfer)
   2687  1.209.4.2  jmcneill 		/* Not on interrupt list, ignore it. */
   2688  1.209.4.2  jmcneill 		return;
   2689  1.209.4.2  jmcneill 
   2690  1.209.4.2  jmcneill 	if (!uhci_active_intr_info(ii))
   2691  1.209.4.2  jmcneill 		return;
   2692  1.209.4.2  jmcneill 
   2693  1.209.4.2  jmcneill #ifdef DIAGNOSTIC
   2694  1.209.4.2  jmcneill         if (ii->stdend == NULL) {
   2695  1.209.4.2  jmcneill                 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
   2696  1.209.4.2  jmcneill #ifdef UHCI_DEBUG
   2697  1.209.4.2  jmcneill 		uhci_dump_ii(ii);
   2698  1.209.4.2  jmcneill #endif
   2699  1.209.4.2  jmcneill 		return;
   2700  1.209.4.2  jmcneill 	}
   2701  1.209.4.2  jmcneill #endif
   2702  1.209.4.2  jmcneill 
   2703  1.209.4.2  jmcneill 	/* Turn off the interrupt since it is active even if the TD is not. */
   2704  1.209.4.2  jmcneill 	ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC);
   2705  1.209.4.2  jmcneill 
   2706  1.209.4.2  jmcneill 	uhci_del_intr_info(ii);	/* remove from active list */
   2707  1.209.4.2  jmcneill }
   2708  1.209.4.2  jmcneill 
   2709  1.209.4.2  jmcneill void
   2710  1.209.4.2  jmcneill uhci_device_intr_done(usbd_xfer_handle xfer)
   2711  1.209.4.2  jmcneill {
   2712  1.209.4.2  jmcneill 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2713  1.209.4.2  jmcneill 	uhci_softc_t *sc = ii->sc;
   2714  1.209.4.2  jmcneill 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2715  1.209.4.2  jmcneill 	uhci_soft_qh_t *sqh;
   2716  1.209.4.2  jmcneill 	int i, npoll;
   2717  1.209.4.2  jmcneill 
   2718  1.209.4.2  jmcneill 	DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen));
   2719  1.209.4.2  jmcneill 
   2720  1.209.4.2  jmcneill 	npoll = upipe->u.intr.npoll;
   2721  1.209.4.2  jmcneill 	for(i = 0; i < npoll; i++) {
   2722  1.209.4.2  jmcneill 		sqh = upipe->u.intr.qhs[i];
   2723  1.209.4.2  jmcneill 		sqh->elink = NULL;
   2724  1.209.4.2  jmcneill 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   2725  1.209.4.2  jmcneill 	}
   2726  1.209.4.2  jmcneill 	uhci_free_std_chain(sc, ii->stdstart, NULL);
   2727  1.209.4.2  jmcneill 
   2728  1.209.4.2  jmcneill 	/* XXX Wasteful. */
   2729  1.209.4.2  jmcneill 	if (xfer->pipe->repeat) {
   2730  1.209.4.2  jmcneill 		uhci_soft_td_t *data, *dataend;
   2731  1.209.4.2  jmcneill 
   2732  1.209.4.2  jmcneill 		DPRINTFN(5,("uhci_device_intr_done: requeing\n"));
   2733  1.209.4.2  jmcneill 
   2734  1.209.4.2  jmcneill 		/* This alloc cannot fail since we freed the chain above. */
   2735  1.209.4.2  jmcneill 		uhci_alloc_std_chain(upipe, sc, xfer->length, 1, xfer->flags,
   2736  1.209.4.2  jmcneill 				     &xfer->dmabuf, &data, &dataend);
   2737  1.209.4.2  jmcneill 		dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2738  1.209.4.2  jmcneill 
   2739  1.209.4.2  jmcneill #ifdef UHCI_DEBUG
   2740  1.209.4.2  jmcneill 		if (uhcidebug > 10) {
   2741  1.209.4.2  jmcneill 			DPRINTF(("uhci_device_intr_done: data(1)\n"));
   2742  1.209.4.2  jmcneill 			uhci_dump_tds(data);
   2743  1.209.4.2  jmcneill 			uhci_dump_qh(upipe->u.intr.qhs[0]);
   2744  1.209.4.2  jmcneill 		}
   2745  1.209.4.2  jmcneill #endif
   2746  1.209.4.2  jmcneill 
   2747  1.209.4.2  jmcneill 		ii->stdstart = data;
   2748  1.209.4.2  jmcneill 		ii->stdend = dataend;
   2749  1.209.4.2  jmcneill #ifdef DIAGNOSTIC
   2750  1.209.4.2  jmcneill 		if (!ii->isdone) {
   2751  1.209.4.2  jmcneill 			printf("uhci_device_intr_done: not done, ii=%p\n", ii);
   2752  1.209.4.2  jmcneill 		}
   2753  1.209.4.2  jmcneill 		ii->isdone = 0;
   2754  1.209.4.2  jmcneill #endif
   2755  1.209.4.2  jmcneill 		for (i = 0; i < npoll; i++) {
   2756  1.209.4.2  jmcneill 			sqh = upipe->u.intr.qhs[i];
   2757  1.209.4.2  jmcneill 			sqh->elink = data;
   2758  1.209.4.2  jmcneill 			sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2759  1.209.4.2  jmcneill 		}
   2760  1.209.4.2  jmcneill 		xfer->status = USBD_IN_PROGRESS;
   2761  1.209.4.2  jmcneill 		/* The ii is already on the examined list, just leave it. */
   2762  1.209.4.2  jmcneill 	} else {
   2763  1.209.4.2  jmcneill 		DPRINTFN(5,("uhci_device_intr_done: removing\n"));
   2764  1.209.4.2  jmcneill 		if (uhci_active_intr_info(ii))
   2765  1.209.4.2  jmcneill 			uhci_del_intr_info(ii);
   2766  1.209.4.2  jmcneill 	}
   2767  1.209.4.2  jmcneill }
   2768  1.209.4.2  jmcneill 
   2769  1.209.4.2  jmcneill /* Deallocate request data structures */
   2770  1.209.4.2  jmcneill void
   2771  1.209.4.2  jmcneill uhci_device_ctrl_done(usbd_xfer_handle xfer)
   2772  1.209.4.2  jmcneill {
   2773  1.209.4.2  jmcneill 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2774  1.209.4.2  jmcneill 	uhci_softc_t *sc = ii->sc;
   2775  1.209.4.2  jmcneill 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2776  1.209.4.2  jmcneill 
   2777  1.209.4.2  jmcneill #ifdef DIAGNOSTIC
   2778  1.209.4.2  jmcneill 	if (!(xfer->rqflags & URQ_REQUEST))
   2779  1.209.4.2  jmcneill 		panic("uhci_device_ctrl_done: not a request");
   2780  1.209.4.2  jmcneill #endif
   2781  1.209.4.2  jmcneill 
   2782  1.209.4.2  jmcneill 	if (!uhci_active_intr_info(ii))
   2783  1.209.4.2  jmcneill 		return;
   2784  1.209.4.2  jmcneill 
   2785  1.209.4.2  jmcneill 	uhci_del_intr_info(ii);	/* remove from active list */
   2786  1.209.4.2  jmcneill 
   2787  1.209.4.2  jmcneill 	if (upipe->pipe.device->speed == USB_SPEED_LOW)
   2788  1.209.4.2  jmcneill 		uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh);
   2789  1.209.4.2  jmcneill 	else
   2790  1.209.4.2  jmcneill 		uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh);
   2791  1.209.4.2  jmcneill 
   2792  1.209.4.2  jmcneill 	if (upipe->u.ctl.length != 0)
   2793  1.209.4.2  jmcneill 		uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend);
   2794  1.209.4.2  jmcneill 
   2795  1.209.4.2  jmcneill 	DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen));
   2796  1.209.4.2  jmcneill }
   2797  1.209.4.2  jmcneill 
   2798  1.209.4.2  jmcneill /* Deallocate request data structures */
   2799  1.209.4.2  jmcneill void
   2800  1.209.4.2  jmcneill uhci_device_bulk_done(usbd_xfer_handle xfer)
   2801  1.209.4.2  jmcneill {
   2802  1.209.4.2  jmcneill 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2803  1.209.4.2  jmcneill 	uhci_softc_t *sc = ii->sc;
   2804  1.209.4.2  jmcneill 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2805  1.209.4.2  jmcneill 
   2806  1.209.4.2  jmcneill 	DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n",
   2807  1.209.4.2  jmcneill 		    xfer, ii, sc, upipe));
   2808  1.209.4.2  jmcneill 
   2809  1.209.4.2  jmcneill 	if (!uhci_active_intr_info(ii))
   2810  1.209.4.2  jmcneill 		return;
   2811  1.209.4.2  jmcneill 
   2812  1.209.4.2  jmcneill 	uhci_del_intr_info(ii);	/* remove from active list */
   2813  1.209.4.2  jmcneill 
   2814  1.209.4.2  jmcneill 	uhci_remove_bulk(sc, upipe->u.bulk.sqh);
   2815  1.209.4.2  jmcneill 
   2816  1.209.4.2  jmcneill 	uhci_free_std_chain(sc, ii->stdstart, NULL);
   2817  1.209.4.2  jmcneill 
   2818  1.209.4.2  jmcneill 	DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen));
   2819  1.209.4.2  jmcneill }
   2820  1.209.4.2  jmcneill 
   2821  1.209.4.2  jmcneill /* Add interrupt QH, called with vflock. */
   2822  1.209.4.2  jmcneill void
   2823  1.209.4.2  jmcneill uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   2824  1.209.4.2  jmcneill {
   2825  1.209.4.2  jmcneill 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
   2826  1.209.4.2  jmcneill 	uhci_soft_qh_t *eqh;
   2827  1.209.4.2  jmcneill 
   2828  1.209.4.2  jmcneill 	DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh));
   2829  1.209.4.2  jmcneill 
   2830  1.209.4.2  jmcneill 	eqh = vf->eqh;
   2831  1.209.4.2  jmcneill 	sqh->hlink       = eqh->hlink;
   2832  1.209.4.2  jmcneill 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   2833  1.209.4.2  jmcneill 	eqh->hlink       = sqh;
   2834  1.209.4.2  jmcneill 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   2835  1.209.4.2  jmcneill 	vf->eqh = sqh;
   2836  1.209.4.2  jmcneill 	vf->bandwidth++;
   2837  1.209.4.2  jmcneill }
   2838  1.209.4.2  jmcneill 
   2839  1.209.4.2  jmcneill /* Remove interrupt QH. */
   2840  1.209.4.2  jmcneill void
   2841  1.209.4.2  jmcneill uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   2842  1.209.4.2  jmcneill {
   2843  1.209.4.2  jmcneill 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
   2844  1.209.4.2  jmcneill 	uhci_soft_qh_t *pqh;
   2845  1.209.4.2  jmcneill 
   2846  1.209.4.2  jmcneill 	DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh));
   2847  1.209.4.2  jmcneill 
   2848  1.209.4.2  jmcneill 	/* See comment in uhci_remove_ctrl() */
   2849  1.209.4.2  jmcneill 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   2850  1.209.4.2  jmcneill 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   2851  1.209.4.2  jmcneill 		delay(UHCI_QH_REMOVE_DELAY);
   2852  1.209.4.2  jmcneill 	}
   2853  1.209.4.2  jmcneill 
   2854  1.209.4.2  jmcneill 	pqh = uhci_find_prev_qh(vf->hqh, sqh);
   2855  1.209.4.2  jmcneill 	pqh->hlink       = sqh->hlink;
   2856  1.209.4.2  jmcneill 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   2857  1.209.4.2  jmcneill 	delay(UHCI_QH_REMOVE_DELAY);
   2858  1.209.4.2  jmcneill 	if (vf->eqh == sqh)
   2859  1.209.4.2  jmcneill 		vf->eqh = pqh;
   2860  1.209.4.2  jmcneill 	vf->bandwidth--;
   2861  1.209.4.2  jmcneill }
   2862  1.209.4.2  jmcneill 
   2863  1.209.4.2  jmcneill usbd_status
   2864  1.209.4.2  jmcneill uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival)
   2865  1.209.4.2  jmcneill {
   2866  1.209.4.2  jmcneill 	uhci_soft_qh_t *sqh;
   2867  1.209.4.2  jmcneill 	int i, npoll, s;
   2868  1.209.4.2  jmcneill 	u_int bestbw, bw, bestoffs, offs;
   2869  1.209.4.2  jmcneill 
   2870  1.209.4.2  jmcneill 	DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe));
   2871  1.209.4.2  jmcneill 	if (ival == 0) {
   2872  1.209.4.2  jmcneill 		printf("uhci_device_setintr: 0 interval\n");
   2873  1.209.4.2  jmcneill 		return (USBD_INVAL);
   2874  1.209.4.2  jmcneill 	}
   2875  1.209.4.2  jmcneill 
   2876  1.209.4.2  jmcneill 	if (ival > UHCI_VFRAMELIST_COUNT)
   2877  1.209.4.2  jmcneill 		ival = UHCI_VFRAMELIST_COUNT;
   2878  1.209.4.2  jmcneill 	npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
   2879  1.209.4.2  jmcneill 	DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll));
   2880  1.209.4.2  jmcneill 
   2881  1.209.4.2  jmcneill 	upipe->u.intr.npoll = npoll;
   2882  1.209.4.2  jmcneill 	upipe->u.intr.qhs =
   2883  1.209.4.2  jmcneill 		malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK);
   2884  1.209.4.2  jmcneill 
   2885  1.209.4.2  jmcneill 	/*
   2886  1.209.4.2  jmcneill 	 * Figure out which offset in the schedule that has most
   2887  1.209.4.2  jmcneill 	 * bandwidth left over.
   2888  1.209.4.2  jmcneill 	 */
   2889  1.209.4.2  jmcneill #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
   2890  1.209.4.2  jmcneill 	for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
   2891  1.209.4.2  jmcneill 		for (bw = i = 0; i < npoll; i++)
   2892  1.209.4.2  jmcneill 			bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
   2893  1.209.4.2  jmcneill 		if (bw < bestbw) {
   2894  1.209.4.2  jmcneill 			bestbw = bw;
   2895  1.209.4.2  jmcneill 			bestoffs = offs;
   2896  1.209.4.2  jmcneill 		}
   2897  1.209.4.2  jmcneill 	}
   2898  1.209.4.2  jmcneill 	DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
   2899  1.209.4.2  jmcneill 
   2900  1.209.4.2  jmcneill 	for(i = 0; i < npoll; i++) {
   2901  1.209.4.2  jmcneill 		upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
   2902  1.209.4.2  jmcneill 		sqh->elink = NULL;
   2903  1.209.4.2  jmcneill 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   2904  1.209.4.2  jmcneill 		sqh->pos = MOD(i * ival + bestoffs);
   2905  1.209.4.2  jmcneill 	}
   2906  1.209.4.2  jmcneill #undef MOD
   2907  1.209.4.2  jmcneill 
   2908  1.209.4.2  jmcneill 	s = splusb();
   2909  1.209.4.2  jmcneill 	/* Enter QHs into the controller data structures. */
   2910  1.209.4.2  jmcneill 	for(i = 0; i < npoll; i++)
   2911  1.209.4.2  jmcneill 		uhci_add_intr(sc, upipe->u.intr.qhs[i]);
   2912  1.209.4.2  jmcneill 	splx(s);
   2913  1.209.4.2  jmcneill 
   2914  1.209.4.2  jmcneill 	DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe));
   2915  1.209.4.2  jmcneill 	return (USBD_NORMAL_COMPLETION);
   2916  1.209.4.2  jmcneill }
   2917  1.209.4.2  jmcneill 
   2918  1.209.4.2  jmcneill /* Open a new pipe. */
   2919  1.209.4.2  jmcneill usbd_status
   2920  1.209.4.2  jmcneill uhci_open(usbd_pipe_handle pipe)
   2921  1.209.4.2  jmcneill {
   2922  1.209.4.2  jmcneill 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
   2923  1.209.4.2  jmcneill 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2924  1.209.4.2  jmcneill 	usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
   2925  1.209.4.2  jmcneill 	usbd_status err;
   2926  1.209.4.2  jmcneill 	int ival;
   2927  1.209.4.2  jmcneill 
   2928  1.209.4.2  jmcneill 	DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
   2929  1.209.4.2  jmcneill 		     pipe, pipe->device->address,
   2930  1.209.4.2  jmcneill 		     ed->bEndpointAddress, sc->sc_addr));
   2931  1.209.4.2  jmcneill 
   2932  1.209.4.2  jmcneill 	upipe->aborting = 0;
   2933  1.209.4.2  jmcneill 	upipe->nexttoggle = 0;
   2934  1.209.4.2  jmcneill 
   2935  1.209.4.2  jmcneill 	if (pipe->device->address == sc->sc_addr) {
   2936  1.209.4.2  jmcneill 		switch (ed->bEndpointAddress) {
   2937  1.209.4.2  jmcneill 		case USB_CONTROL_ENDPOINT:
   2938  1.209.4.2  jmcneill 			pipe->methods = &uhci_root_ctrl_methods;
   2939  1.209.4.2  jmcneill 			break;
   2940  1.209.4.2  jmcneill 		case UE_DIR_IN | UHCI_INTR_ENDPT:
   2941  1.209.4.2  jmcneill 			pipe->methods = &uhci_root_intr_methods;
   2942  1.209.4.2  jmcneill 			break;
   2943  1.209.4.2  jmcneill 		default:
   2944  1.209.4.2  jmcneill 			return (USBD_INVAL);
   2945  1.209.4.2  jmcneill 		}
   2946  1.209.4.2  jmcneill 	} else {
   2947  1.209.4.2  jmcneill 		switch (ed->bmAttributes & UE_XFERTYPE) {
   2948  1.209.4.2  jmcneill 		case UE_CONTROL:
   2949  1.209.4.2  jmcneill 			pipe->methods = &uhci_device_ctrl_methods;
   2950  1.209.4.2  jmcneill 			upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
   2951  1.209.4.2  jmcneill 			if (upipe->u.ctl.sqh == NULL)
   2952  1.209.4.2  jmcneill 				goto bad;
   2953  1.209.4.2  jmcneill 			upipe->u.ctl.setup = uhci_alloc_std(sc);
   2954  1.209.4.2  jmcneill 			if (upipe->u.ctl.setup == NULL) {
   2955  1.209.4.2  jmcneill 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   2956  1.209.4.2  jmcneill 				goto bad;
   2957  1.209.4.2  jmcneill 			}
   2958  1.209.4.2  jmcneill 			upipe->u.ctl.stat = uhci_alloc_std(sc);
   2959  1.209.4.2  jmcneill 			if (upipe->u.ctl.stat == NULL) {
   2960  1.209.4.2  jmcneill 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   2961  1.209.4.2  jmcneill 				uhci_free_std(sc, upipe->u.ctl.setup);
   2962  1.209.4.2  jmcneill 				goto bad;
   2963  1.209.4.2  jmcneill 			}
   2964  1.209.4.2  jmcneill 			err = usb_allocmem(&sc->sc_bus,
   2965  1.209.4.2  jmcneill 				  sizeof(usb_device_request_t),
   2966  1.209.4.2  jmcneill 				  0, &upipe->u.ctl.reqdma);
   2967  1.209.4.2  jmcneill 			if (err) {
   2968  1.209.4.2  jmcneill 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   2969  1.209.4.2  jmcneill 				uhci_free_std(sc, upipe->u.ctl.setup);
   2970  1.209.4.2  jmcneill 				uhci_free_std(sc, upipe->u.ctl.stat);
   2971  1.209.4.2  jmcneill 				goto bad;
   2972  1.209.4.2  jmcneill 			}
   2973  1.209.4.2  jmcneill 			break;
   2974  1.209.4.2  jmcneill 		case UE_INTERRUPT:
   2975  1.209.4.2  jmcneill 			pipe->methods = &uhci_device_intr_methods;
   2976  1.209.4.2  jmcneill 			ival = pipe->interval;
   2977  1.209.4.2  jmcneill 			if (ival == USBD_DEFAULT_INTERVAL)
   2978  1.209.4.2  jmcneill 				ival = ed->bInterval;
   2979  1.209.4.2  jmcneill 			return (uhci_device_setintr(sc, upipe, ival));
   2980  1.209.4.2  jmcneill 		case UE_ISOCHRONOUS:
   2981  1.209.4.2  jmcneill 			pipe->methods = &uhci_device_isoc_methods;
   2982  1.209.4.2  jmcneill 			return (uhci_setup_isoc(pipe));
   2983  1.209.4.2  jmcneill 		case UE_BULK:
   2984  1.209.4.2  jmcneill 			pipe->methods = &uhci_device_bulk_methods;
   2985  1.209.4.2  jmcneill 			upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
   2986  1.209.4.2  jmcneill 			if (upipe->u.bulk.sqh == NULL)
   2987  1.209.4.2  jmcneill 				goto bad;
   2988  1.209.4.2  jmcneill 			break;
   2989  1.209.4.2  jmcneill 		}
   2990  1.209.4.2  jmcneill 	}
   2991  1.209.4.2  jmcneill 	return (USBD_NORMAL_COMPLETION);
   2992  1.209.4.2  jmcneill 
   2993  1.209.4.2  jmcneill  bad:
   2994  1.209.4.2  jmcneill 	return (USBD_NOMEM);
   2995  1.209.4.2  jmcneill }
   2996  1.209.4.2  jmcneill 
   2997  1.209.4.2  jmcneill /*
   2998  1.209.4.2  jmcneill  * Data structures and routines to emulate the root hub.
   2999  1.209.4.2  jmcneill  */
   3000  1.209.4.2  jmcneill usb_device_descriptor_t uhci_devd = {
   3001  1.209.4.2  jmcneill 	USB_DEVICE_DESCRIPTOR_SIZE,
   3002  1.209.4.2  jmcneill 	UDESC_DEVICE,		/* type */
   3003  1.209.4.2  jmcneill 	{0x00, 0x01},		/* USB version */
   3004  1.209.4.2  jmcneill 	UDCLASS_HUB,		/* class */
   3005  1.209.4.2  jmcneill 	UDSUBCLASS_HUB,		/* subclass */
   3006  1.209.4.2  jmcneill 	UDPROTO_FSHUB,		/* protocol */
   3007  1.209.4.2  jmcneill 	64,			/* max packet */
   3008  1.209.4.2  jmcneill 	{0},{0},{0x00,0x01},	/* device id */
   3009  1.209.4.2  jmcneill 	1,2,0,			/* string indicies */
   3010  1.209.4.2  jmcneill 	1			/* # of configurations */
   3011  1.209.4.2  jmcneill };
   3012  1.209.4.2  jmcneill 
   3013  1.209.4.2  jmcneill const usb_config_descriptor_t uhci_confd = {
   3014  1.209.4.2  jmcneill 	USB_CONFIG_DESCRIPTOR_SIZE,
   3015  1.209.4.2  jmcneill 	UDESC_CONFIG,
   3016  1.209.4.2  jmcneill 	{USB_CONFIG_DESCRIPTOR_SIZE +
   3017  1.209.4.2  jmcneill 	 USB_INTERFACE_DESCRIPTOR_SIZE +
   3018  1.209.4.2  jmcneill 	 USB_ENDPOINT_DESCRIPTOR_SIZE},
   3019  1.209.4.2  jmcneill 	1,
   3020  1.209.4.2  jmcneill 	1,
   3021  1.209.4.2  jmcneill 	0,
   3022  1.209.4.2  jmcneill 	UC_ATTR_MBO | UC_SELF_POWERED,
   3023  1.209.4.2  jmcneill 	0			/* max power */
   3024  1.209.4.2  jmcneill };
   3025  1.209.4.2  jmcneill 
   3026  1.209.4.2  jmcneill const usb_interface_descriptor_t uhci_ifcd = {
   3027  1.209.4.2  jmcneill 	USB_INTERFACE_DESCRIPTOR_SIZE,
   3028  1.209.4.2  jmcneill 	UDESC_INTERFACE,
   3029  1.209.4.2  jmcneill 	0,
   3030  1.209.4.2  jmcneill 	0,
   3031  1.209.4.2  jmcneill 	1,
   3032  1.209.4.2  jmcneill 	UICLASS_HUB,
   3033  1.209.4.2  jmcneill 	UISUBCLASS_HUB,
   3034  1.209.4.2  jmcneill 	UIPROTO_FSHUB,
   3035  1.209.4.2  jmcneill 	0
   3036  1.209.4.2  jmcneill };
   3037  1.209.4.2  jmcneill 
   3038  1.209.4.2  jmcneill const usb_endpoint_descriptor_t uhci_endpd = {
   3039  1.209.4.2  jmcneill 	USB_ENDPOINT_DESCRIPTOR_SIZE,
   3040  1.209.4.2  jmcneill 	UDESC_ENDPOINT,
   3041  1.209.4.2  jmcneill 	UE_DIR_IN | UHCI_INTR_ENDPT,
   3042  1.209.4.2  jmcneill 	UE_INTERRUPT,
   3043  1.209.4.2  jmcneill 	{8},
   3044  1.209.4.2  jmcneill 	255
   3045  1.209.4.2  jmcneill };
   3046  1.209.4.2  jmcneill 
   3047  1.209.4.2  jmcneill const usb_hub_descriptor_t uhci_hubd_piix = {
   3048  1.209.4.2  jmcneill 	USB_HUB_DESCRIPTOR_SIZE,
   3049  1.209.4.2  jmcneill 	UDESC_HUB,
   3050  1.209.4.2  jmcneill 	2,
   3051  1.209.4.2  jmcneill 	{ UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
   3052  1.209.4.2  jmcneill 	50,			/* power on to power good */
   3053  1.209.4.2  jmcneill 	0,
   3054  1.209.4.2  jmcneill 	{ 0x00 },		/* both ports are removable */
   3055  1.209.4.2  jmcneill 	{ 0 },
   3056  1.209.4.2  jmcneill };
   3057  1.209.4.2  jmcneill 
   3058  1.209.4.2  jmcneill int
   3059  1.209.4.2  jmcneill uhci_str(usb_string_descriptor_t *p, int l, const char *s)
   3060  1.209.4.2  jmcneill {
   3061  1.209.4.2  jmcneill 	int i;
   3062  1.209.4.2  jmcneill 
   3063  1.209.4.2  jmcneill 	if (l == 0)
   3064  1.209.4.2  jmcneill 		return (0);
   3065  1.209.4.2  jmcneill 	p->bLength = 2 * strlen(s) + 2;
   3066  1.209.4.2  jmcneill 	if (l == 1)
   3067  1.209.4.2  jmcneill 		return (1);
   3068  1.209.4.2  jmcneill 	p->bDescriptorType = UDESC_STRING;
   3069  1.209.4.2  jmcneill 	l -= 2;
   3070  1.209.4.2  jmcneill 	for (i = 0; s[i] && l > 1; i++, l -= 2)
   3071  1.209.4.2  jmcneill 		USETW2(p->bString[i], 0, s[i]);
   3072  1.209.4.2  jmcneill 	return (2*i+2);
   3073  1.209.4.2  jmcneill }
   3074  1.209.4.2  jmcneill 
   3075  1.209.4.2  jmcneill /*
   3076  1.209.4.2  jmcneill  * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also
   3077  1.209.4.2  jmcneill  * enables the port, and also states that SET_FEATURE(PORT_ENABLE)
   3078  1.209.4.2  jmcneill  * should not be used by the USB subsystem.  As we cannot issue a
   3079  1.209.4.2  jmcneill  * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port
   3080  1.209.4.2  jmcneill  * will be enabled as part of the reset.
   3081  1.209.4.2  jmcneill  *
   3082  1.209.4.2  jmcneill  * On the VT83C572, the port cannot be successfully enabled until the
   3083  1.209.4.2  jmcneill  * outstanding "port enable change" and "connection status change"
   3084  1.209.4.2  jmcneill  * events have been reset.
   3085  1.209.4.2  jmcneill  */
   3086  1.209.4.2  jmcneill Static usbd_status
   3087  1.209.4.2  jmcneill uhci_portreset(uhci_softc_t *sc, int index)
   3088  1.209.4.2  jmcneill {
   3089  1.209.4.2  jmcneill 	int lim, port, x;
   3090  1.209.4.2  jmcneill 
   3091  1.209.4.2  jmcneill 	if (index == 1)
   3092  1.209.4.2  jmcneill 		port = UHCI_PORTSC1;
   3093  1.209.4.2  jmcneill 	else if (index == 2)
   3094  1.209.4.2  jmcneill 		port = UHCI_PORTSC2;
   3095  1.209.4.2  jmcneill 	else
   3096  1.209.4.2  jmcneill 		return (USBD_IOERROR);
   3097  1.209.4.2  jmcneill 
   3098  1.209.4.2  jmcneill 	x = URWMASK(UREAD2(sc, port));
   3099  1.209.4.2  jmcneill 	UWRITE2(sc, port, x | UHCI_PORTSC_PR);
   3100  1.209.4.2  jmcneill 
   3101  1.209.4.2  jmcneill 	usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
   3102  1.209.4.2  jmcneill 
   3103  1.209.4.2  jmcneill 	DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n",
   3104  1.209.4.2  jmcneill 		    index, UREAD2(sc, port)));
   3105  1.209.4.2  jmcneill 
   3106  1.209.4.2  jmcneill 	x = URWMASK(UREAD2(sc, port));
   3107  1.209.4.2  jmcneill 	UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
   3108  1.209.4.2  jmcneill 
   3109  1.209.4.2  jmcneill 	delay(100);
   3110  1.209.4.2  jmcneill 
   3111  1.209.4.2  jmcneill 	DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n",
   3112  1.209.4.2  jmcneill 		    index, UREAD2(sc, port)));
   3113  1.209.4.2  jmcneill 
   3114  1.209.4.2  jmcneill 	x = URWMASK(UREAD2(sc, port));
   3115  1.209.4.2  jmcneill 	UWRITE2(sc, port, x  | UHCI_PORTSC_PE);
   3116  1.209.4.2  jmcneill 
   3117  1.209.4.2  jmcneill 	for (lim = 10; --lim > 0;) {
   3118  1.209.4.2  jmcneill 		usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY);
   3119  1.209.4.2  jmcneill 
   3120  1.209.4.2  jmcneill 		x = UREAD2(sc, port);
   3121  1.209.4.2  jmcneill 
   3122  1.209.4.2  jmcneill 		DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n",
   3123  1.209.4.2  jmcneill 			    index, lim, x));
   3124  1.209.4.2  jmcneill 
   3125  1.209.4.2  jmcneill 		if (!(x & UHCI_PORTSC_CCS)) {
   3126  1.209.4.2  jmcneill 			/*
   3127  1.209.4.2  jmcneill 			 * No device is connected (or was disconnected
   3128  1.209.4.2  jmcneill 			 * during reset).  Consider the port reset.
   3129  1.209.4.2  jmcneill 			 * The delay must be long enough to ensure on
   3130  1.209.4.2  jmcneill 			 * the initial iteration that the device
   3131  1.209.4.2  jmcneill 			 * connection will have been registered.  50ms
   3132  1.209.4.2  jmcneill 			 * appears to be sufficient, but 20ms is not.
   3133  1.209.4.2  jmcneill 			 */
   3134  1.209.4.2  jmcneill 			DPRINTFN(3,("uhci port %d loop %u, device detached\n",
   3135  1.209.4.2  jmcneill 				    index, lim));
   3136  1.209.4.2  jmcneill 			break;
   3137  1.209.4.2  jmcneill 		}
   3138  1.209.4.2  jmcneill 
   3139  1.209.4.2  jmcneill 		if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) {
   3140  1.209.4.2  jmcneill 			/*
   3141  1.209.4.2  jmcneill 			 * Port enabled changed and/or connection
   3142  1.209.4.2  jmcneill 			 * status changed were set.  Reset either or
   3143  1.209.4.2  jmcneill 			 * both raised flags (by writing a 1 to that
   3144  1.209.4.2  jmcneill 			 * bit), and wait again for state to settle.
   3145  1.209.4.2  jmcneill 			 */
   3146  1.209.4.2  jmcneill 			UWRITE2(sc, port, URWMASK(x) |
   3147  1.209.4.2  jmcneill 				(x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)));
   3148  1.209.4.2  jmcneill 			continue;
   3149  1.209.4.2  jmcneill 		}
   3150  1.209.4.2  jmcneill 
   3151  1.209.4.2  jmcneill 		if (x & UHCI_PORTSC_PE)
   3152  1.209.4.2  jmcneill 			/* Port is enabled */
   3153  1.209.4.2  jmcneill 			break;
   3154  1.209.4.2  jmcneill 
   3155  1.209.4.2  jmcneill 		UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE);
   3156  1.209.4.2  jmcneill 	}
   3157  1.209.4.2  jmcneill 
   3158  1.209.4.2  jmcneill 	DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n",
   3159  1.209.4.2  jmcneill 		    index, UREAD2(sc, port)));
   3160  1.209.4.2  jmcneill 
   3161  1.209.4.2  jmcneill 	if (lim <= 0) {
   3162  1.209.4.2  jmcneill 		DPRINTFN(1,("uhci port %d reset timed out\n", index));
   3163  1.209.4.2  jmcneill 		return (USBD_TIMEOUT);
   3164  1.209.4.2  jmcneill 	}
   3165  1.209.4.2  jmcneill 
   3166  1.209.4.2  jmcneill 	sc->sc_isreset = 1;
   3167  1.209.4.2  jmcneill 	return (USBD_NORMAL_COMPLETION);
   3168  1.209.4.2  jmcneill }
   3169  1.209.4.2  jmcneill 
   3170  1.209.4.2  jmcneill /*
   3171  1.209.4.2  jmcneill  * Simulate a hardware hub by handling all the necessary requests.
   3172  1.209.4.2  jmcneill  */
   3173  1.209.4.2  jmcneill usbd_status
   3174  1.209.4.2  jmcneill uhci_root_ctrl_transfer(usbd_xfer_handle xfer)
   3175  1.209.4.2  jmcneill {
   3176  1.209.4.2  jmcneill 	usbd_status err;
   3177  1.209.4.2  jmcneill 
   3178  1.209.4.2  jmcneill 	/* Insert last in queue. */
   3179  1.209.4.2  jmcneill 	err = usb_insert_transfer(xfer);
   3180  1.209.4.2  jmcneill 	if (err)
   3181  1.209.4.2  jmcneill 		return (err);
   3182  1.209.4.2  jmcneill 
   3183  1.209.4.2  jmcneill 	/*
   3184  1.209.4.2  jmcneill 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   3185  1.209.4.2  jmcneill 	 * so start it first.
   3186  1.209.4.2  jmcneill 	 */
   3187  1.209.4.2  jmcneill 	return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   3188  1.209.4.2  jmcneill }
   3189  1.209.4.2  jmcneill 
   3190  1.209.4.2  jmcneill usbd_status
   3191  1.209.4.2  jmcneill uhci_root_ctrl_start(usbd_xfer_handle xfer)
   3192  1.209.4.2  jmcneill {
   3193  1.209.4.2  jmcneill 	uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
   3194  1.209.4.2  jmcneill 	usb_device_request_t *req;
   3195  1.209.4.2  jmcneill 	void *buf = NULL;
   3196  1.209.4.2  jmcneill 	int port, x;
   3197  1.209.4.2  jmcneill 	int s, len, value, index, status, change, l, totlen = 0;
   3198  1.209.4.2  jmcneill 	usb_port_status_t ps;
   3199  1.209.4.2  jmcneill 	usbd_status err;
   3200  1.209.4.2  jmcneill 
   3201  1.209.4.2  jmcneill 	if (sc->sc_dying)
   3202  1.209.4.2  jmcneill 		return (USBD_IOERROR);
   3203  1.209.4.2  jmcneill 
   3204  1.209.4.2  jmcneill #ifdef DIAGNOSTIC
   3205  1.209.4.2  jmcneill 	if (!(xfer->rqflags & URQ_REQUEST))
   3206  1.209.4.2  jmcneill 		panic("uhci_root_ctrl_transfer: not a request");
   3207  1.209.4.2  jmcneill #endif
   3208  1.209.4.2  jmcneill 	req = &xfer->request;
   3209  1.209.4.2  jmcneill 
   3210  1.209.4.2  jmcneill 	DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
   3211  1.209.4.2  jmcneill 		    req->bmRequestType, req->bRequest));
   3212  1.209.4.2  jmcneill 
   3213  1.209.4.2  jmcneill 	len = UGETW(req->wLength);
   3214  1.209.4.2  jmcneill 	value = UGETW(req->wValue);
   3215  1.209.4.2  jmcneill 	index = UGETW(req->wIndex);
   3216  1.209.4.2  jmcneill 
   3217  1.209.4.2  jmcneill 	if (len != 0)
   3218  1.209.4.2  jmcneill 		buf = KERNADDR(&xfer->dmabuf, 0);
   3219  1.209.4.2  jmcneill 
   3220  1.209.4.2  jmcneill #define C(x,y) ((x) | ((y) << 8))
   3221  1.209.4.2  jmcneill 	switch(C(req->bRequest, req->bmRequestType)) {
   3222  1.209.4.2  jmcneill 	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
   3223  1.209.4.2  jmcneill 	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
   3224  1.209.4.2  jmcneill 	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
   3225  1.209.4.2  jmcneill 		/*
   3226  1.209.4.2  jmcneill 		 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
   3227  1.209.4.2  jmcneill 		 * for the integrated root hub.
   3228  1.209.4.2  jmcneill 		 */
   3229  1.209.4.2  jmcneill 		break;
   3230  1.209.4.2  jmcneill 	case C(UR_GET_CONFIG, UT_READ_DEVICE):
   3231  1.209.4.2  jmcneill 		if (len > 0) {
   3232  1.209.4.2  jmcneill 			*(u_int8_t *)buf = sc->sc_conf;
   3233  1.209.4.2  jmcneill 			totlen = 1;
   3234  1.209.4.2  jmcneill 		}
   3235  1.209.4.2  jmcneill 		break;
   3236  1.209.4.2  jmcneill 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   3237  1.209.4.2  jmcneill 		DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
   3238  1.209.4.2  jmcneill 		if (len == 0)
   3239  1.209.4.2  jmcneill 			break;
   3240  1.209.4.2  jmcneill 		switch(value >> 8) {
   3241  1.209.4.2  jmcneill 		case UDESC_DEVICE:
   3242  1.209.4.2  jmcneill 			if ((value & 0xff) != 0) {
   3243  1.209.4.2  jmcneill 				err = USBD_IOERROR;
   3244  1.209.4.2  jmcneill 				goto ret;
   3245  1.209.4.2  jmcneill 			}
   3246  1.209.4.2  jmcneill 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
   3247  1.209.4.2  jmcneill 			USETW(uhci_devd.idVendor, sc->sc_id_vendor);
   3248  1.209.4.2  jmcneill 			memcpy(buf, &uhci_devd, l);
   3249  1.209.4.2  jmcneill 			break;
   3250  1.209.4.2  jmcneill 		case UDESC_CONFIG:
   3251  1.209.4.2  jmcneill 			if ((value & 0xff) != 0) {
   3252  1.209.4.2  jmcneill 				err = USBD_IOERROR;
   3253  1.209.4.2  jmcneill 				goto ret;
   3254  1.209.4.2  jmcneill 			}
   3255  1.209.4.2  jmcneill 			totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
   3256  1.209.4.2  jmcneill 			memcpy(buf, &uhci_confd, l);
   3257  1.209.4.2  jmcneill 			buf = (char *)buf + l;
   3258  1.209.4.2  jmcneill 			len -= l;
   3259  1.209.4.2  jmcneill 			l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
   3260  1.209.4.2  jmcneill 			totlen += l;
   3261  1.209.4.2  jmcneill 			memcpy(buf, &uhci_ifcd, l);
   3262  1.209.4.2  jmcneill 			buf = (char *)buf + l;
   3263  1.209.4.2  jmcneill 			len -= l;
   3264  1.209.4.2  jmcneill 			l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
   3265  1.209.4.2  jmcneill 			totlen += l;
   3266  1.209.4.2  jmcneill 			memcpy(buf, &uhci_endpd, l);
   3267  1.209.4.2  jmcneill 			break;
   3268  1.209.4.2  jmcneill 		case UDESC_STRING:
   3269  1.209.4.2  jmcneill 			*(u_int8_t *)buf = 0;
   3270  1.209.4.2  jmcneill 			totlen = 1;
   3271  1.209.4.2  jmcneill 			switch (value & 0xff) {
   3272  1.209.4.2  jmcneill 			case 0: /* Language table */
   3273  1.209.4.2  jmcneill 				if (len > 0)
   3274  1.209.4.2  jmcneill 					*(u_int8_t *)buf = 4;
   3275  1.209.4.2  jmcneill 				if (len >=  4) {
   3276  1.209.4.2  jmcneill 		USETW(((usb_string_descriptor_t *)buf)->bString[0], 0x0409);
   3277  1.209.4.2  jmcneill 					totlen = 4;
   3278  1.209.4.2  jmcneill 				}
   3279  1.209.4.2  jmcneill 				break;
   3280  1.209.4.2  jmcneill 			case 1: /* Vendor */
   3281  1.209.4.2  jmcneill 				totlen = uhci_str(buf, len, sc->sc_vendor);
   3282  1.209.4.2  jmcneill 				break;
   3283  1.209.4.2  jmcneill 			case 2: /* Product */
   3284  1.209.4.2  jmcneill 				totlen = uhci_str(buf, len, "UHCI root hub");
   3285  1.209.4.2  jmcneill 				break;
   3286  1.209.4.2  jmcneill 			}
   3287  1.209.4.2  jmcneill 			break;
   3288  1.209.4.2  jmcneill 		default:
   3289  1.209.4.2  jmcneill 			err = USBD_IOERROR;
   3290  1.209.4.2  jmcneill 			goto ret;
   3291  1.209.4.2  jmcneill 		}
   3292  1.209.4.2  jmcneill 		break;
   3293  1.209.4.2  jmcneill 	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
   3294  1.209.4.2  jmcneill 		if (len > 0) {
   3295  1.209.4.2  jmcneill 			*(u_int8_t *)buf = 0;
   3296  1.209.4.2  jmcneill 			totlen = 1;
   3297  1.209.4.2  jmcneill 		}
   3298  1.209.4.2  jmcneill 		break;
   3299  1.209.4.2  jmcneill 	case C(UR_GET_STATUS, UT_READ_DEVICE):
   3300  1.209.4.2  jmcneill 		if (len > 1) {
   3301  1.209.4.2  jmcneill 			USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
   3302  1.209.4.2  jmcneill 			totlen = 2;
   3303  1.209.4.2  jmcneill 		}
   3304  1.209.4.2  jmcneill 		break;
   3305  1.209.4.2  jmcneill 	case C(UR_GET_STATUS, UT_READ_INTERFACE):
   3306  1.209.4.2  jmcneill 	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
   3307  1.209.4.2  jmcneill 		if (len > 1) {
   3308  1.209.4.2  jmcneill 			USETW(((usb_status_t *)buf)->wStatus, 0);
   3309  1.209.4.2  jmcneill 			totlen = 2;
   3310  1.209.4.2  jmcneill 		}
   3311  1.209.4.2  jmcneill 		break;
   3312  1.209.4.2  jmcneill 	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
   3313  1.209.4.2  jmcneill 		if (value >= USB_MAX_DEVICES) {
   3314  1.209.4.2  jmcneill 			err = USBD_IOERROR;
   3315  1.209.4.2  jmcneill 			goto ret;
   3316  1.209.4.2  jmcneill 		}
   3317  1.209.4.2  jmcneill 		sc->sc_addr = value;
   3318  1.209.4.2  jmcneill 		break;
   3319  1.209.4.2  jmcneill 	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
   3320  1.209.4.2  jmcneill 		if (value != 0 && value != 1) {
   3321  1.209.4.2  jmcneill 			err = USBD_IOERROR;
   3322  1.209.4.2  jmcneill 			goto ret;
   3323  1.209.4.2  jmcneill 		}
   3324  1.209.4.2  jmcneill 		sc->sc_conf = value;
   3325  1.209.4.2  jmcneill 		break;
   3326  1.209.4.2  jmcneill 	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
   3327  1.209.4.2  jmcneill 		break;
   3328  1.209.4.2  jmcneill 	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
   3329  1.209.4.2  jmcneill 	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
   3330  1.209.4.2  jmcneill 	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
   3331  1.209.4.2  jmcneill 		err = USBD_IOERROR;
   3332  1.209.4.2  jmcneill 		goto ret;
   3333  1.209.4.2  jmcneill 	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
   3334  1.209.4.2  jmcneill 		break;
   3335  1.209.4.2  jmcneill 	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
   3336  1.209.4.2  jmcneill 		break;
   3337  1.209.4.2  jmcneill 	/* Hub requests */
   3338  1.209.4.2  jmcneill 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   3339  1.209.4.2  jmcneill 		break;
   3340  1.209.4.2  jmcneill 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   3341  1.209.4.2  jmcneill 		DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
   3342  1.209.4.2  jmcneill 			     "port=%d feature=%d\n",
   3343  1.209.4.2  jmcneill 			     index, value));
   3344  1.209.4.2  jmcneill 		if (index == 1)
   3345  1.209.4.2  jmcneill 			port = UHCI_PORTSC1;
   3346  1.209.4.2  jmcneill 		else if (index == 2)
   3347  1.209.4.2  jmcneill 			port = UHCI_PORTSC2;
   3348  1.209.4.2  jmcneill 		else {
   3349  1.209.4.2  jmcneill 			err = USBD_IOERROR;
   3350  1.209.4.2  jmcneill 			goto ret;
   3351  1.209.4.2  jmcneill 		}
   3352  1.209.4.2  jmcneill 		switch(value) {
   3353  1.209.4.2  jmcneill 		case UHF_PORT_ENABLE:
   3354  1.209.4.2  jmcneill 			x = URWMASK(UREAD2(sc, port));
   3355  1.209.4.2  jmcneill 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
   3356  1.209.4.2  jmcneill 			break;
   3357  1.209.4.2  jmcneill 		case UHF_PORT_SUSPEND:
   3358  1.209.4.2  jmcneill 			x = URWMASK(UREAD2(sc, port));
   3359  1.209.4.2  jmcneill 			UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
   3360  1.209.4.2  jmcneill 			break;
   3361  1.209.4.2  jmcneill 		case UHF_PORT_RESET:
   3362  1.209.4.2  jmcneill 			x = URWMASK(UREAD2(sc, port));
   3363  1.209.4.2  jmcneill 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
   3364  1.209.4.2  jmcneill 			break;
   3365  1.209.4.2  jmcneill 		case UHF_C_PORT_CONNECTION:
   3366  1.209.4.2  jmcneill 			x = URWMASK(UREAD2(sc, port));
   3367  1.209.4.2  jmcneill 			UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
   3368  1.209.4.2  jmcneill 			break;
   3369  1.209.4.2  jmcneill 		case UHF_C_PORT_ENABLE:
   3370  1.209.4.2  jmcneill 			x = URWMASK(UREAD2(sc, port));
   3371  1.209.4.2  jmcneill 			UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
   3372  1.209.4.2  jmcneill 			break;
   3373  1.209.4.2  jmcneill 		case UHF_C_PORT_OVER_CURRENT:
   3374  1.209.4.2  jmcneill 			x = URWMASK(UREAD2(sc, port));
   3375  1.209.4.2  jmcneill 			UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
   3376  1.209.4.2  jmcneill 			break;
   3377  1.209.4.2  jmcneill 		case UHF_C_PORT_RESET:
   3378  1.209.4.2  jmcneill 			sc->sc_isreset = 0;
   3379  1.209.4.2  jmcneill 			err = USBD_NORMAL_COMPLETION;
   3380  1.209.4.2  jmcneill 			goto ret;
   3381  1.209.4.2  jmcneill 		case UHF_PORT_CONNECTION:
   3382  1.209.4.2  jmcneill 		case UHF_PORT_OVER_CURRENT:
   3383  1.209.4.2  jmcneill 		case UHF_PORT_POWER:
   3384  1.209.4.2  jmcneill 		case UHF_PORT_LOW_SPEED:
   3385  1.209.4.2  jmcneill 		case UHF_C_PORT_SUSPEND:
   3386  1.209.4.2  jmcneill 		default:
   3387  1.209.4.2  jmcneill 			err = USBD_IOERROR;
   3388  1.209.4.2  jmcneill 			goto ret;
   3389  1.209.4.2  jmcneill 		}
   3390  1.209.4.2  jmcneill 		break;
   3391  1.209.4.2  jmcneill 	case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
   3392  1.209.4.2  jmcneill 		if (index == 1)
   3393  1.209.4.2  jmcneill 			port = UHCI_PORTSC1;
   3394  1.209.4.2  jmcneill 		else if (index == 2)
   3395  1.209.4.2  jmcneill 			port = UHCI_PORTSC2;
   3396  1.209.4.2  jmcneill 		else {
   3397  1.209.4.2  jmcneill 			err = USBD_IOERROR;
   3398  1.209.4.2  jmcneill 			goto ret;
   3399  1.209.4.2  jmcneill 		}
   3400  1.209.4.2  jmcneill 		if (len > 0) {
   3401  1.209.4.2  jmcneill 			*(u_int8_t *)buf =
   3402  1.209.4.2  jmcneill 				(UREAD2(sc, port) & UHCI_PORTSC_LS) >>
   3403  1.209.4.2  jmcneill 				UHCI_PORTSC_LS_SHIFT;
   3404  1.209.4.2  jmcneill 			totlen = 1;
   3405  1.209.4.2  jmcneill 		}
   3406  1.209.4.2  jmcneill 		break;
   3407  1.209.4.2  jmcneill 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   3408  1.209.4.2  jmcneill 		if (len == 0)
   3409  1.209.4.2  jmcneill 			break;
   3410  1.209.4.2  jmcneill 		if ((value & 0xff) != 0) {
   3411  1.209.4.2  jmcneill 			err = USBD_IOERROR;
   3412  1.209.4.2  jmcneill 			goto ret;
   3413  1.209.4.2  jmcneill 		}
   3414  1.209.4.2  jmcneill 		l = min(len, USB_HUB_DESCRIPTOR_SIZE);
   3415  1.209.4.2  jmcneill 		totlen = l;
   3416  1.209.4.2  jmcneill 		memcpy(buf, &uhci_hubd_piix, l);
   3417  1.209.4.2  jmcneill 		break;
   3418  1.209.4.2  jmcneill 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   3419  1.209.4.2  jmcneill 		if (len != 4) {
   3420  1.209.4.2  jmcneill 			err = USBD_IOERROR;
   3421  1.209.4.2  jmcneill 			goto ret;
   3422  1.209.4.2  jmcneill 		}
   3423  1.209.4.2  jmcneill 		memset(buf, 0, len);
   3424  1.209.4.2  jmcneill 		totlen = len;
   3425  1.209.4.2  jmcneill 		break;
   3426  1.209.4.2  jmcneill 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   3427  1.209.4.2  jmcneill 		if (index == 1)
   3428  1.209.4.2  jmcneill 			port = UHCI_PORTSC1;
   3429  1.209.4.2  jmcneill 		else if (index == 2)
   3430  1.209.4.2  jmcneill 			port = UHCI_PORTSC2;
   3431  1.209.4.2  jmcneill 		else {
   3432  1.209.4.2  jmcneill 			err = USBD_IOERROR;
   3433  1.209.4.2  jmcneill 			goto ret;
   3434  1.209.4.2  jmcneill 		}
   3435  1.209.4.2  jmcneill 		if (len != 4) {
   3436  1.209.4.2  jmcneill 			err = USBD_IOERROR;
   3437  1.209.4.2  jmcneill 			goto ret;
   3438  1.209.4.2  jmcneill 		}
   3439  1.209.4.2  jmcneill 		x = UREAD2(sc, port);
   3440  1.209.4.2  jmcneill 		status = change = 0;
   3441  1.209.4.2  jmcneill 		if (x & UHCI_PORTSC_CCS)
   3442  1.209.4.2  jmcneill 			status |= UPS_CURRENT_CONNECT_STATUS;
   3443  1.209.4.2  jmcneill 		if (x & UHCI_PORTSC_CSC)
   3444  1.209.4.2  jmcneill 			change |= UPS_C_CONNECT_STATUS;
   3445  1.209.4.2  jmcneill 		if (x & UHCI_PORTSC_PE)
   3446  1.209.4.2  jmcneill 			status |= UPS_PORT_ENABLED;
   3447  1.209.4.2  jmcneill 		if (x & UHCI_PORTSC_POEDC)
   3448  1.209.4.2  jmcneill 			change |= UPS_C_PORT_ENABLED;
   3449  1.209.4.2  jmcneill 		if (x & UHCI_PORTSC_OCI)
   3450  1.209.4.2  jmcneill 			status |= UPS_OVERCURRENT_INDICATOR;
   3451  1.209.4.2  jmcneill 		if (x & UHCI_PORTSC_OCIC)
   3452  1.209.4.2  jmcneill 			change |= UPS_C_OVERCURRENT_INDICATOR;
   3453  1.209.4.2  jmcneill 		if (x & UHCI_PORTSC_SUSP)
   3454  1.209.4.2  jmcneill 			status |= UPS_SUSPEND;
   3455  1.209.4.2  jmcneill 		if (x & UHCI_PORTSC_LSDA)
   3456  1.209.4.2  jmcneill 			status |= UPS_LOW_SPEED;
   3457  1.209.4.2  jmcneill 		status |= UPS_PORT_POWER;
   3458  1.209.4.2  jmcneill 		if (sc->sc_isreset)
   3459  1.209.4.2  jmcneill 			change |= UPS_C_PORT_RESET;
   3460  1.209.4.2  jmcneill 		USETW(ps.wPortStatus, status);
   3461  1.209.4.2  jmcneill 		USETW(ps.wPortChange, change);
   3462  1.209.4.2  jmcneill 		l = min(len, sizeof ps);
   3463  1.209.4.2  jmcneill 		memcpy(buf, &ps, l);
   3464  1.209.4.2  jmcneill 		totlen = l;
   3465  1.209.4.2  jmcneill 		break;
   3466  1.209.4.2  jmcneill 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   3467  1.209.4.2  jmcneill 		err = USBD_IOERROR;
   3468  1.209.4.2  jmcneill 		goto ret;
   3469  1.209.4.2  jmcneill 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   3470  1.209.4.2  jmcneill 		break;
   3471  1.209.4.2  jmcneill 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   3472  1.209.4.2  jmcneill 		if (index == 1)
   3473  1.209.4.2  jmcneill 			port = UHCI_PORTSC1;
   3474  1.209.4.2  jmcneill 		else if (index == 2)
   3475  1.209.4.2  jmcneill 			port = UHCI_PORTSC2;
   3476  1.209.4.2  jmcneill 		else {
   3477  1.209.4.2  jmcneill 			err = USBD_IOERROR;
   3478  1.209.4.2  jmcneill 			goto ret;
   3479  1.209.4.2  jmcneill 		}
   3480  1.209.4.2  jmcneill 		switch(value) {
   3481  1.209.4.2  jmcneill 		case UHF_PORT_ENABLE:
   3482  1.209.4.2  jmcneill 			x = URWMASK(UREAD2(sc, port));
   3483  1.209.4.2  jmcneill 			UWRITE2(sc, port, x | UHCI_PORTSC_PE);
   3484  1.209.4.2  jmcneill 			break;
   3485  1.209.4.2  jmcneill 		case UHF_PORT_SUSPEND:
   3486  1.209.4.2  jmcneill 			x = URWMASK(UREAD2(sc, port));
   3487  1.209.4.2  jmcneill 			UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
   3488  1.209.4.2  jmcneill 			break;
   3489  1.209.4.2  jmcneill 		case UHF_PORT_RESET:
   3490  1.209.4.2  jmcneill 			err = uhci_portreset(sc, index);
   3491  1.209.4.2  jmcneill 			goto ret;
   3492  1.209.4.2  jmcneill 		case UHF_PORT_POWER:
   3493  1.209.4.2  jmcneill 			/* Pretend we turned on power */
   3494  1.209.4.2  jmcneill 			err = USBD_NORMAL_COMPLETION;
   3495  1.209.4.2  jmcneill 			goto ret;
   3496  1.209.4.2  jmcneill 		case UHF_C_PORT_CONNECTION:
   3497  1.209.4.2  jmcneill 		case UHF_C_PORT_ENABLE:
   3498  1.209.4.2  jmcneill 		case UHF_C_PORT_OVER_CURRENT:
   3499  1.209.4.2  jmcneill 		case UHF_PORT_CONNECTION:
   3500  1.209.4.2  jmcneill 		case UHF_PORT_OVER_CURRENT:
   3501  1.209.4.2  jmcneill 		case UHF_PORT_LOW_SPEED:
   3502  1.209.4.2  jmcneill 		case UHF_C_PORT_SUSPEND:
   3503  1.209.4.2  jmcneill 		case UHF_C_PORT_RESET:
   3504  1.209.4.2  jmcneill 		default:
   3505  1.209.4.2  jmcneill 			err = USBD_IOERROR;
   3506  1.209.4.2  jmcneill 			goto ret;
   3507  1.209.4.2  jmcneill 		}
   3508  1.209.4.2  jmcneill 		break;
   3509  1.209.4.2  jmcneill 	default:
   3510  1.209.4.2  jmcneill 		err = USBD_IOERROR;
   3511  1.209.4.2  jmcneill 		goto ret;
   3512  1.209.4.2  jmcneill 	}
   3513  1.209.4.2  jmcneill 	xfer->actlen = totlen;
   3514  1.209.4.2  jmcneill 	err = USBD_NORMAL_COMPLETION;
   3515  1.209.4.2  jmcneill  ret:
   3516  1.209.4.2  jmcneill 	xfer->status = err;
   3517  1.209.4.2  jmcneill 	s = splusb();
   3518  1.209.4.2  jmcneill 	usb_transfer_complete(xfer);
   3519  1.209.4.2  jmcneill 	splx(s);
   3520  1.209.4.2  jmcneill 	return (USBD_IN_PROGRESS);
   3521  1.209.4.2  jmcneill }
   3522  1.209.4.2  jmcneill 
   3523  1.209.4.2  jmcneill /* Abort a root control request. */
   3524  1.209.4.2  jmcneill void
   3525  1.209.4.2  jmcneill uhci_root_ctrl_abort(usbd_xfer_handle xfer)
   3526  1.209.4.2  jmcneill {
   3527  1.209.4.2  jmcneill 	/* Nothing to do, all transfers are synchronous. */
   3528  1.209.4.2  jmcneill }
   3529  1.209.4.2  jmcneill 
   3530  1.209.4.2  jmcneill /* Close the root pipe. */
   3531  1.209.4.2  jmcneill void
   3532  1.209.4.2  jmcneill uhci_root_ctrl_close(usbd_pipe_handle pipe)
   3533  1.209.4.2  jmcneill {
   3534  1.209.4.2  jmcneill 	DPRINTF(("uhci_root_ctrl_close\n"));
   3535  1.209.4.2  jmcneill }
   3536  1.209.4.2  jmcneill 
   3537  1.209.4.2  jmcneill /* Abort a root interrupt request. */
   3538  1.209.4.2  jmcneill void
   3539  1.209.4.2  jmcneill uhci_root_intr_abort(usbd_xfer_handle xfer)
   3540  1.209.4.2  jmcneill {
   3541  1.209.4.2  jmcneill 	uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
   3542  1.209.4.2  jmcneill 
   3543  1.209.4.2  jmcneill 	usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, xfer);
   3544  1.209.4.2  jmcneill 	sc->sc_intr_xfer = NULL;
   3545  1.209.4.2  jmcneill 
   3546  1.209.4.2  jmcneill 	if (xfer->pipe->intrxfer == xfer) {
   3547  1.209.4.2  jmcneill 		DPRINTF(("uhci_root_intr_abort: remove\n"));
   3548  1.209.4.2  jmcneill 		xfer->pipe->intrxfer = 0;
   3549  1.209.4.2  jmcneill 	}
   3550  1.209.4.2  jmcneill 	xfer->status = USBD_CANCELLED;
   3551  1.209.4.2  jmcneill #ifdef DIAGNOSTIC
   3552  1.209.4.2  jmcneill 	UXFER(xfer)->iinfo.isdone = 1;
   3553  1.209.4.2  jmcneill #endif
   3554  1.209.4.2  jmcneill 	usb_transfer_complete(xfer);
   3555  1.209.4.2  jmcneill }
   3556  1.209.4.2  jmcneill 
   3557  1.209.4.2  jmcneill usbd_status
   3558  1.209.4.2  jmcneill uhci_root_intr_transfer(usbd_xfer_handle xfer)
   3559  1.209.4.2  jmcneill {
   3560  1.209.4.2  jmcneill 	usbd_status err;
   3561  1.209.4.2  jmcneill 
   3562  1.209.4.2  jmcneill 	/* Insert last in queue. */
   3563  1.209.4.2  jmcneill 	err = usb_insert_transfer(xfer);
   3564  1.209.4.2  jmcneill 	if (err)
   3565  1.209.4.2  jmcneill 		return (err);
   3566  1.209.4.2  jmcneill 
   3567  1.209.4.2  jmcneill 	/*
   3568  1.209.4.2  jmcneill 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   3569  1.209.4.2  jmcneill 	 * start first
   3570  1.209.4.2  jmcneill 	 */
   3571  1.209.4.2  jmcneill 	return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   3572  1.209.4.2  jmcneill }
   3573  1.209.4.2  jmcneill 
   3574  1.209.4.2  jmcneill /* Start a transfer on the root interrupt pipe */
   3575  1.209.4.2  jmcneill usbd_status
   3576  1.209.4.2  jmcneill uhci_root_intr_start(usbd_xfer_handle xfer)
   3577  1.209.4.2  jmcneill {
   3578  1.209.4.2  jmcneill 	usbd_pipe_handle pipe = xfer->pipe;
   3579  1.209.4.2  jmcneill 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
   3580  1.209.4.2  jmcneill 	unsigned int ival;
   3581  1.209.4.2  jmcneill 
   3582  1.209.4.2  jmcneill 	DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n",
   3583  1.209.4.2  jmcneill 		     xfer, xfer->length, xfer->flags));
   3584  1.209.4.2  jmcneill 
   3585  1.209.4.2  jmcneill 	if (sc->sc_dying)
   3586  1.209.4.2  jmcneill 		return (USBD_IOERROR);
   3587  1.209.4.2  jmcneill 
   3588  1.209.4.2  jmcneill 	/* XXX temporary variable needed to avoid gcc3 warning */
   3589  1.209.4.2  jmcneill 	ival = xfer->pipe->endpoint->edesc->bInterval;
   3590  1.209.4.2  jmcneill 	sc->sc_ival = mstohz(ival);
   3591  1.209.4.2  jmcneill 	usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
   3592  1.209.4.2  jmcneill 	sc->sc_intr_xfer = xfer;
   3593  1.209.4.2  jmcneill 	return (USBD_IN_PROGRESS);
   3594  1.209.4.2  jmcneill }
   3595  1.209.4.2  jmcneill 
   3596  1.209.4.2  jmcneill /* Close the root interrupt pipe. */
   3597  1.209.4.2  jmcneill void
   3598  1.209.4.2  jmcneill uhci_root_intr_close(usbd_pipe_handle pipe)
   3599  1.209.4.2  jmcneill {
   3600  1.209.4.2  jmcneill 	uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
   3601  1.209.4.2  jmcneill 
   3602  1.209.4.2  jmcneill 	usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, sc->sc_intr_xfer);
   3603  1.209.4.2  jmcneill 	sc->sc_intr_xfer = NULL;
   3604  1.209.4.2  jmcneill 	DPRINTF(("uhci_root_intr_close\n"));
   3605  1.209.4.2  jmcneill }
   3606