uhci.c revision 1.216 1 1.216 drochner /* $NetBSD: uhci.c,v 1.216 2008/03/28 17:14:46 drochner Exp $ */
2 1.67 augustss /* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $ */
3 1.1 augustss
4 1.1 augustss /*
5 1.185 mycroft * Copyright (c) 1998, 2004 The NetBSD Foundation, Inc.
6 1.1 augustss * All rights reserved.
7 1.1 augustss *
8 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
9 1.113 augustss * by Lennart Augustsson (lennart (at) augustsson.net) at
10 1.11 augustss * Carlstedt Research & Technology.
11 1.1 augustss *
12 1.1 augustss * Redistribution and use in source and binary forms, with or without
13 1.1 augustss * modification, are permitted provided that the following conditions
14 1.1 augustss * are met:
15 1.1 augustss * 1. Redistributions of source code must retain the above copyright
16 1.1 augustss * notice, this list of conditions and the following disclaimer.
17 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
18 1.1 augustss * notice, this list of conditions and the following disclaimer in the
19 1.1 augustss * documentation and/or other materials provided with the distribution.
20 1.1 augustss * 3. All advertising materials mentioning features or use of this software
21 1.1 augustss * must display the following acknowledgement:
22 1.1 augustss * This product includes software developed by the NetBSD
23 1.1 augustss * Foundation, Inc. and its contributors.
24 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
25 1.1 augustss * contributors may be used to endorse or promote products derived
26 1.1 augustss * from this software without specific prior written permission.
27 1.1 augustss *
28 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
39 1.1 augustss */
40 1.1 augustss
41 1.1 augustss /*
42 1.1 augustss * USB Universal Host Controller driver.
43 1.28 augustss * Handles e.g. PIIX3 and PIIX4.
44 1.1 augustss *
45 1.131 augustss * UHCI spec: http://developer.intel.com/design/USB/UHCI11D.htm
46 1.168 ichiro * USB spec: http://www.usb.org/developers/docs/usbspec.zip
47 1.71 augustss * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
48 1.71 augustss * ftp://download.intel.com/design/intarch/datashts/29056201.pdf
49 1.1 augustss */
50 1.143 lukem
51 1.143 lukem #include <sys/cdefs.h>
52 1.216 drochner __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.216 2008/03/28 17:14:46 drochner Exp $");
53 1.1 augustss
54 1.1 augustss #include <sys/param.h>
55 1.1 augustss #include <sys/systm.h>
56 1.1 augustss #include <sys/kernel.h>
57 1.1 augustss #include <sys/malloc.h>
58 1.37 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
59 1.1 augustss #include <sys/device.h>
60 1.67 augustss #include <sys/select.h>
61 1.183 fvdl #include <sys/extent.h>
62 1.183 fvdl #include <uvm/uvm_extern.h>
63 1.13 augustss #elif defined(__FreeBSD__)
64 1.13 augustss #include <sys/module.h>
65 1.13 augustss #include <sys/bus.h>
66 1.67 augustss #include <machine/bus_pio.h>
67 1.67 augustss #if defined(DIAGNOSTIC) && defined(__i386__)
68 1.211 ad #include <sys/cpu.h>
69 1.67 augustss #endif
70 1.13 augustss #endif
71 1.1 augustss #include <sys/proc.h>
72 1.1 augustss #include <sys/queue.h>
73 1.211 ad #include <sys/bus.h>
74 1.1 augustss
75 1.39 augustss #include <machine/endian.h>
76 1.7 augustss
77 1.1 augustss #include <dev/usb/usb.h>
78 1.1 augustss #include <dev/usb/usbdi.h>
79 1.1 augustss #include <dev/usb/usbdivar.h>
80 1.7 augustss #include <dev/usb/usb_mem.h>
81 1.1 augustss #include <dev/usb/usb_quirks.h>
82 1.1 augustss
83 1.1 augustss #include <dev/usb/uhcireg.h>
84 1.1 augustss #include <dev/usb/uhcivar.h>
85 1.213 drochner #include <dev/usb/usbroothub_subr.h>
86 1.1 augustss
87 1.125 augustss /* Use bandwidth reclamation for control transfers. Some devices choke on it. */
88 1.125 augustss /*#define UHCI_CTL_LOOP */
89 1.125 augustss
90 1.13 augustss #if defined(__FreeBSD__)
91 1.13 augustss #include <machine/clock.h>
92 1.13 augustss
93 1.13 augustss #define delay(d) DELAY(d)
94 1.13 augustss #endif
95 1.13 augustss
96 1.37 augustss #if defined(__OpenBSD__)
97 1.37 augustss struct cfdriver uhci_cd = {
98 1.37 augustss NULL, "uhci", DV_DULL
99 1.37 augustss };
100 1.37 augustss #endif
101 1.37 augustss
102 1.67 augustss #ifdef UHCI_DEBUG
103 1.92 augustss uhci_softc_t *thesc;
104 1.59 augustss #define DPRINTF(x) if (uhcidebug) printf x
105 1.59 augustss #define DPRINTFN(n,x) if (uhcidebug>(n)) printf x
106 1.67 augustss int uhcidebug = 0;
107 1.125 augustss int uhcinoloop = 0;
108 1.122 tv #ifndef __NetBSD__
109 1.122 tv #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
110 1.122 tv #endif
111 1.59 augustss #else
112 1.59 augustss #define DPRINTF(x)
113 1.59 augustss #define DPRINTFN(n,x)
114 1.59 augustss #endif
115 1.59 augustss
116 1.39 augustss /*
117 1.39 augustss * The UHCI controller is little endian, so on big endian machines
118 1.181 drochner * the data stored in memory needs to be swapped.
119 1.39 augustss */
120 1.107 augustss #if defined(__FreeBSD__) || defined(__OpenBSD__)
121 1.39 augustss #if BYTE_ORDER == BIG_ENDIAN
122 1.88 tsutsui #define htole32(x) (bswap32(x))
123 1.88 tsutsui #define le32toh(x) (bswap32(x))
124 1.39 augustss #else
125 1.88 tsutsui #define htole32(x) (x)
126 1.88 tsutsui #define le32toh(x) (x)
127 1.88 tsutsui #endif
128 1.39 augustss #endif
129 1.39 augustss
130 1.1 augustss struct uhci_pipe {
131 1.1 augustss struct usbd_pipe pipe;
132 1.32 augustss int nexttoggle;
133 1.92 augustss
134 1.92 augustss u_char aborting;
135 1.92 augustss usbd_xfer_handle abortstart, abortend;
136 1.92 augustss
137 1.1 augustss /* Info needed for different pipe kinds. */
138 1.1 augustss union {
139 1.1 augustss /* Control pipe */
140 1.1 augustss struct {
141 1.1 augustss uhci_soft_qh_t *sqh;
142 1.7 augustss usb_dma_t reqdma;
143 1.16 augustss uhci_soft_td_t *setup, *stat;
144 1.1 augustss u_int length;
145 1.1 augustss } ctl;
146 1.1 augustss /* Interrupt pipe */
147 1.1 augustss struct {
148 1.1 augustss int npoll;
149 1.187 skrll int isread;
150 1.1 augustss uhci_soft_qh_t **qhs;
151 1.1 augustss } intr;
152 1.1 augustss /* Bulk pipe */
153 1.1 augustss struct {
154 1.1 augustss uhci_soft_qh_t *sqh;
155 1.1 augustss u_int length;
156 1.1 augustss int isread;
157 1.1 augustss } bulk;
158 1.16 augustss /* Iso pipe */
159 1.16 augustss struct iso {
160 1.16 augustss uhci_soft_td_t **stds;
161 1.48 augustss int next, inuse;
162 1.16 augustss } iso;
163 1.1 augustss } u;
164 1.1 augustss };
165 1.1 augustss
166 1.142 augustss Static void uhci_globalreset(uhci_softc_t *);
167 1.166 dsainty Static usbd_status uhci_portreset(uhci_softc_t*, int);
168 1.142 augustss Static void uhci_reset(uhci_softc_t *);
169 1.119 augustss Static usbd_status uhci_run(uhci_softc_t *, int run);
170 1.123 augustss Static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *);
171 1.119 augustss Static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *);
172 1.123 augustss Static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *);
173 1.119 augustss Static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *);
174 1.16 augustss #if 0
175 1.119 augustss Static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *,
176 1.119 augustss uhci_intr_info_t *);
177 1.119 augustss Static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *);
178 1.16 augustss #endif
179 1.1 augustss
180 1.152 augustss Static void uhci_free_std_chain(uhci_softc_t *,
181 1.119 augustss uhci_soft_td_t *, uhci_soft_td_t *);
182 1.119 augustss Static usbd_status uhci_alloc_std_chain(struct uhci_pipe *,
183 1.152 augustss uhci_softc_t *, int, int, u_int16_t, usb_dma_t *,
184 1.119 augustss uhci_soft_td_t **, uhci_soft_td_t **);
185 1.119 augustss Static void uhci_poll_hub(void *);
186 1.119 augustss Static void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle);
187 1.119 augustss Static void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *);
188 1.119 augustss Static void uhci_idone(uhci_intr_info_t *);
189 1.119 augustss
190 1.119 augustss Static void uhci_abort_xfer(usbd_xfer_handle, usbd_status status);
191 1.119 augustss
192 1.119 augustss Static void uhci_timeout(void *);
193 1.153 augustss Static void uhci_timeout_task(void *);
194 1.123 augustss Static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
195 1.123 augustss Static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
196 1.119 augustss Static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *);
197 1.123 augustss Static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
198 1.123 augustss Static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
199 1.119 augustss Static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *);
200 1.123 augustss Static void uhci_add_loop(uhci_softc_t *sc);
201 1.123 augustss Static void uhci_rem_loop(uhci_softc_t *sc);
202 1.119 augustss
203 1.119 augustss Static usbd_status uhci_setup_isoc(usbd_pipe_handle pipe);
204 1.119 augustss Static void uhci_device_isoc_enter(usbd_xfer_handle);
205 1.119 augustss
206 1.119 augustss Static usbd_status uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
207 1.119 augustss Static void uhci_freem(struct usbd_bus *, usb_dma_t *);
208 1.119 augustss
209 1.119 augustss Static usbd_xfer_handle uhci_allocx(struct usbd_bus *);
210 1.119 augustss Static void uhci_freex(struct usbd_bus *, usbd_xfer_handle);
211 1.119 augustss
212 1.119 augustss Static usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle);
213 1.119 augustss Static usbd_status uhci_device_ctrl_start(usbd_xfer_handle);
214 1.119 augustss Static void uhci_device_ctrl_abort(usbd_xfer_handle);
215 1.119 augustss Static void uhci_device_ctrl_close(usbd_pipe_handle);
216 1.119 augustss Static void uhci_device_ctrl_done(usbd_xfer_handle);
217 1.119 augustss
218 1.119 augustss Static usbd_status uhci_device_intr_transfer(usbd_xfer_handle);
219 1.119 augustss Static usbd_status uhci_device_intr_start(usbd_xfer_handle);
220 1.119 augustss Static void uhci_device_intr_abort(usbd_xfer_handle);
221 1.119 augustss Static void uhci_device_intr_close(usbd_pipe_handle);
222 1.119 augustss Static void uhci_device_intr_done(usbd_xfer_handle);
223 1.119 augustss
224 1.119 augustss Static usbd_status uhci_device_bulk_transfer(usbd_xfer_handle);
225 1.119 augustss Static usbd_status uhci_device_bulk_start(usbd_xfer_handle);
226 1.119 augustss Static void uhci_device_bulk_abort(usbd_xfer_handle);
227 1.119 augustss Static void uhci_device_bulk_close(usbd_pipe_handle);
228 1.119 augustss Static void uhci_device_bulk_done(usbd_xfer_handle);
229 1.119 augustss
230 1.119 augustss Static usbd_status uhci_device_isoc_transfer(usbd_xfer_handle);
231 1.119 augustss Static usbd_status uhci_device_isoc_start(usbd_xfer_handle);
232 1.119 augustss Static void uhci_device_isoc_abort(usbd_xfer_handle);
233 1.119 augustss Static void uhci_device_isoc_close(usbd_pipe_handle);
234 1.119 augustss Static void uhci_device_isoc_done(usbd_xfer_handle);
235 1.119 augustss
236 1.119 augustss Static usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle);
237 1.119 augustss Static usbd_status uhci_root_ctrl_start(usbd_xfer_handle);
238 1.119 augustss Static void uhci_root_ctrl_abort(usbd_xfer_handle);
239 1.119 augustss Static void uhci_root_ctrl_close(usbd_pipe_handle);
240 1.119 augustss Static void uhci_root_ctrl_done(usbd_xfer_handle);
241 1.119 augustss
242 1.119 augustss Static usbd_status uhci_root_intr_transfer(usbd_xfer_handle);
243 1.119 augustss Static usbd_status uhci_root_intr_start(usbd_xfer_handle);
244 1.119 augustss Static void uhci_root_intr_abort(usbd_xfer_handle);
245 1.119 augustss Static void uhci_root_intr_close(usbd_pipe_handle);
246 1.119 augustss Static void uhci_root_intr_done(usbd_xfer_handle);
247 1.119 augustss
248 1.119 augustss Static usbd_status uhci_open(usbd_pipe_handle);
249 1.119 augustss Static void uhci_poll(struct usbd_bus *);
250 1.133 augustss Static void uhci_softintr(void *);
251 1.119 augustss
252 1.119 augustss Static usbd_status uhci_device_request(usbd_xfer_handle xfer);
253 1.119 augustss
254 1.119 augustss Static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *);
255 1.158 augustss Static void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *);
256 1.152 augustss Static usbd_status uhci_device_setintr(uhci_softc_t *sc,
257 1.119 augustss struct uhci_pipe *pipe, int ival);
258 1.119 augustss
259 1.119 augustss Static void uhci_device_clear_toggle(usbd_pipe_handle pipe);
260 1.119 augustss Static void uhci_noop(usbd_pipe_handle pipe);
261 1.119 augustss
262 1.192 perry Static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *,
263 1.119 augustss uhci_soft_qh_t *);
264 1.119 augustss
265 1.119 augustss #ifdef UHCI_DEBUG
266 1.119 augustss Static void uhci_dump_all(uhci_softc_t *);
267 1.119 augustss Static void uhci_dumpregs(uhci_softc_t *);
268 1.119 augustss Static void uhci_dump_qhs(uhci_soft_qh_t *);
269 1.119 augustss Static void uhci_dump_qh(uhci_soft_qh_t *);
270 1.119 augustss Static void uhci_dump_tds(uhci_soft_td_t *);
271 1.119 augustss Static void uhci_dump_td(uhci_soft_td_t *);
272 1.119 augustss Static void uhci_dump_ii(uhci_intr_info_t *ii);
273 1.119 augustss void uhci_dump(void);
274 1.1 augustss #endif
275 1.1 augustss
276 1.112 augustss #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
277 1.112 augustss BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
278 1.112 augustss #define UWRITE1(sc, r, x) \
279 1.165 dsainty do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \
280 1.165 dsainty } while (/*CONSTCOND*/0)
281 1.112 augustss #define UWRITE2(sc, r, x) \
282 1.165 dsainty do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \
283 1.165 dsainty } while (/*CONSTCOND*/0)
284 1.112 augustss #define UWRITE4(sc, r, x) \
285 1.165 dsainty do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \
286 1.165 dsainty } while (/*CONSTCOND*/0)
287 1.196 mrg static __inline uint8_t
288 1.196 mrg UREAD1(uhci_softc_t *sc, bus_size_t r)
289 1.196 mrg {
290 1.196 mrg
291 1.196 mrg UBARR(sc);
292 1.196 mrg return bus_space_read_1(sc->iot, sc->ioh, r);
293 1.196 mrg }
294 1.196 mrg
295 1.196 mrg static __inline uint16_t
296 1.196 mrg UREAD2(uhci_softc_t *sc, bus_size_t r)
297 1.196 mrg {
298 1.196 mrg
299 1.196 mrg UBARR(sc);
300 1.196 mrg return bus_space_read_2(sc->iot, sc->ioh, r);
301 1.196 mrg }
302 1.196 mrg
303 1.196 mrg static __inline uint32_t
304 1.196 mrg UREAD4(uhci_softc_t *sc, bus_size_t r)
305 1.196 mrg {
306 1.196 mrg
307 1.196 mrg UBARR(sc);
308 1.196 mrg return bus_space_read_4(sc->iot, sc->ioh, r);
309 1.196 mrg }
310 1.1 augustss
311 1.1 augustss #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
312 1.1 augustss #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
313 1.1 augustss
314 1.142 augustss #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */
315 1.1 augustss
316 1.1 augustss #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
317 1.1 augustss
318 1.1 augustss #define UHCI_INTR_ENDPT 1
319 1.1 augustss
320 1.208 drochner const struct usbd_bus_methods uhci_bus_methods = {
321 1.48 augustss uhci_open,
322 1.85 augustss uhci_softintr,
323 1.48 augustss uhci_poll,
324 1.48 augustss uhci_allocm,
325 1.48 augustss uhci_freem,
326 1.76 augustss uhci_allocx,
327 1.76 augustss uhci_freex,
328 1.48 augustss };
329 1.48 augustss
330 1.208 drochner const struct usbd_pipe_methods uhci_root_ctrl_methods = {
331 1.1 augustss uhci_root_ctrl_transfer,
332 1.16 augustss uhci_root_ctrl_start,
333 1.1 augustss uhci_root_ctrl_abort,
334 1.1 augustss uhci_root_ctrl_close,
335 1.38 augustss uhci_noop,
336 1.84 augustss uhci_root_ctrl_done,
337 1.1 augustss };
338 1.1 augustss
339 1.208 drochner const struct usbd_pipe_methods uhci_root_intr_methods = {
340 1.1 augustss uhci_root_intr_transfer,
341 1.16 augustss uhci_root_intr_start,
342 1.1 augustss uhci_root_intr_abort,
343 1.1 augustss uhci_root_intr_close,
344 1.38 augustss uhci_noop,
345 1.41 augustss uhci_root_intr_done,
346 1.1 augustss };
347 1.1 augustss
348 1.208 drochner const struct usbd_pipe_methods uhci_device_ctrl_methods = {
349 1.1 augustss uhci_device_ctrl_transfer,
350 1.16 augustss uhci_device_ctrl_start,
351 1.1 augustss uhci_device_ctrl_abort,
352 1.1 augustss uhci_device_ctrl_close,
353 1.38 augustss uhci_noop,
354 1.41 augustss uhci_device_ctrl_done,
355 1.1 augustss };
356 1.1 augustss
357 1.208 drochner const struct usbd_pipe_methods uhci_device_intr_methods = {
358 1.1 augustss uhci_device_intr_transfer,
359 1.16 augustss uhci_device_intr_start,
360 1.1 augustss uhci_device_intr_abort,
361 1.1 augustss uhci_device_intr_close,
362 1.38 augustss uhci_device_clear_toggle,
363 1.41 augustss uhci_device_intr_done,
364 1.1 augustss };
365 1.1 augustss
366 1.208 drochner const struct usbd_pipe_methods uhci_device_bulk_methods = {
367 1.1 augustss uhci_device_bulk_transfer,
368 1.16 augustss uhci_device_bulk_start,
369 1.1 augustss uhci_device_bulk_abort,
370 1.1 augustss uhci_device_bulk_close,
371 1.38 augustss uhci_device_clear_toggle,
372 1.41 augustss uhci_device_bulk_done,
373 1.1 augustss };
374 1.1 augustss
375 1.208 drochner const struct usbd_pipe_methods uhci_device_isoc_methods = {
376 1.16 augustss uhci_device_isoc_transfer,
377 1.16 augustss uhci_device_isoc_start,
378 1.16 augustss uhci_device_isoc_abort,
379 1.16 augustss uhci_device_isoc_close,
380 1.38 augustss uhci_noop,
381 1.41 augustss uhci_device_isoc_done,
382 1.16 augustss };
383 1.16 augustss
384 1.92 augustss #define uhci_add_intr_info(sc, ii) \
385 1.169 augustss LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list)
386 1.92 augustss #define uhci_del_intr_info(ii) \
387 1.169 augustss do { \
388 1.169 augustss LIST_REMOVE((ii), list); \
389 1.169 augustss (ii)->list.le_prev = NULL; \
390 1.169 augustss } while (0)
391 1.169 augustss #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL)
392 1.92 augustss
393 1.192 perry Static inline uhci_soft_qh_t *
394 1.119 augustss uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh)
395 1.92 augustss {
396 1.92 augustss DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh));
397 1.92 augustss
398 1.92 augustss for (; pqh->hlink != sqh; pqh = pqh->hlink) {
399 1.152 augustss #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG)
400 1.92 augustss if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) {
401 1.102 augustss printf("uhci_find_prev_qh: QH not found\n");
402 1.92 augustss return (NULL);
403 1.92 augustss }
404 1.92 augustss #endif
405 1.92 augustss }
406 1.92 augustss return (pqh);
407 1.92 augustss }
408 1.92 augustss
409 1.1 augustss void
410 1.142 augustss uhci_globalreset(uhci_softc_t *sc)
411 1.1 augustss {
412 1.1 augustss UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */
413 1.20 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
414 1.1 augustss UHCICMD(sc, 0); /* do nothing */
415 1.1 augustss }
416 1.1 augustss
417 1.1 augustss usbd_status
418 1.119 augustss uhci_init(uhci_softc_t *sc)
419 1.1 augustss {
420 1.63 augustss usbd_status err;
421 1.1 augustss int i, j;
422 1.123 augustss uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh;
423 1.1 augustss uhci_soft_td_t *std;
424 1.1 augustss
425 1.1 augustss DPRINTFN(1,("uhci_init: start\n"));
426 1.1 augustss
427 1.67 augustss #ifdef UHCI_DEBUG
428 1.92 augustss thesc = sc;
429 1.92 augustss
430 1.1 augustss if (uhcidebug > 2)
431 1.1 augustss uhci_dumpregs(sc);
432 1.1 augustss #endif
433 1.1 augustss
434 1.1 augustss UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
435 1.142 augustss uhci_globalreset(sc); /* reset the controller */
436 1.142 augustss uhci_reset(sc);
437 1.24 augustss
438 1.183 fvdl #ifdef __NetBSD__
439 1.183 fvdl usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
440 1.183 fvdl USB_MEM_RESERVE);
441 1.183 fvdl #endif
442 1.183 fvdl
443 1.1 augustss /* Allocate and initialize real frame array. */
444 1.152 augustss err = usb_allocmem(&sc->sc_bus,
445 1.63 augustss UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
446 1.63 augustss UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
447 1.63 augustss if (err)
448 1.63 augustss return (err);
449 1.159 augustss sc->sc_pframes = KERNADDR(&sc->sc_dma, 0);
450 1.1 augustss UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */
451 1.160 augustss UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/
452 1.1 augustss
453 1.152 augustss /*
454 1.123 augustss * Allocate a TD, inactive, that hangs from the last QH.
455 1.123 augustss * This is to avoid a bug in the PIIX that makes it run berserk
456 1.123 augustss * otherwise.
457 1.123 augustss */
458 1.123 augustss std = uhci_alloc_std(sc);
459 1.123 augustss if (std == NULL)
460 1.123 augustss return (USBD_NOMEM);
461 1.123 augustss std->link.std = NULL;
462 1.123 augustss std->td.td_link = htole32(UHCI_PTR_T);
463 1.123 augustss std->td.td_status = htole32(0); /* inactive */
464 1.123 augustss std->td.td_token = htole32(0);
465 1.123 augustss std->td.td_buffer = htole32(0);
466 1.123 augustss
467 1.123 augustss /* Allocate the dummy QH marking the end and used for looping the QHs.*/
468 1.123 augustss lsqh = uhci_alloc_sqh(sc);
469 1.123 augustss if (lsqh == NULL)
470 1.123 augustss return (USBD_NOMEM);
471 1.123 augustss lsqh->hlink = NULL;
472 1.123 augustss lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */
473 1.123 augustss lsqh->elink = std;
474 1.123 augustss lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD);
475 1.123 augustss sc->sc_last_qh = lsqh;
476 1.123 augustss
477 1.1 augustss /* Allocate the dummy QH where bulk traffic will be queued. */
478 1.1 augustss bsqh = uhci_alloc_sqh(sc);
479 1.63 augustss if (bsqh == NULL)
480 1.1 augustss return (USBD_NOMEM);
481 1.123 augustss bsqh->hlink = lsqh;
482 1.123 augustss bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH);
483 1.121 augustss bsqh->elink = NULL;
484 1.88 tsutsui bsqh->qh.qh_elink = htole32(UHCI_PTR_T);
485 1.1 augustss sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
486 1.1 augustss
487 1.123 augustss /* Allocate dummy QH where high speed control traffic will be queued. */
488 1.123 augustss chsqh = uhci_alloc_sqh(sc);
489 1.123 augustss if (chsqh == NULL)
490 1.123 augustss return (USBD_NOMEM);
491 1.123 augustss chsqh->hlink = bsqh;
492 1.123 augustss chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH);
493 1.123 augustss chsqh->elink = NULL;
494 1.123 augustss chsqh->qh.qh_elink = htole32(UHCI_PTR_T);
495 1.123 augustss sc->sc_hctl_start = sc->sc_hctl_end = chsqh;
496 1.123 augustss
497 1.123 augustss /* Allocate dummy QH where control traffic will be queued. */
498 1.123 augustss clsqh = uhci_alloc_sqh(sc);
499 1.123 augustss if (clsqh == NULL)
500 1.1 augustss return (USBD_NOMEM);
501 1.123 augustss clsqh->hlink = bsqh;
502 1.123 augustss clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH);
503 1.123 augustss clsqh->elink = NULL;
504 1.123 augustss clsqh->qh.qh_elink = htole32(UHCI_PTR_T);
505 1.123 augustss sc->sc_lctl_start = sc->sc_lctl_end = clsqh;
506 1.1 augustss
507 1.152 augustss /*
508 1.1 augustss * Make all (virtual) frame list pointers point to the interrupt
509 1.1 augustss * queue heads and the interrupt queue heads at the control
510 1.1 augustss * queue head and point the physical frame list to the virtual.
511 1.1 augustss */
512 1.1 augustss for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
513 1.1 augustss std = uhci_alloc_std(sc);
514 1.1 augustss sqh = uhci_alloc_sqh(sc);
515 1.67 augustss if (std == NULL || sqh == NULL)
516 1.13 augustss return (USBD_NOMEM);
517 1.42 augustss std->link.sqh = sqh;
518 1.121 augustss std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH);
519 1.88 tsutsui std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
520 1.88 tsutsui std->td.td_token = htole32(0);
521 1.88 tsutsui std->td.td_buffer = htole32(0);
522 1.123 augustss sqh->hlink = clsqh;
523 1.123 augustss sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH);
524 1.121 augustss sqh->elink = NULL;
525 1.88 tsutsui sqh->qh.qh_elink = htole32(UHCI_PTR_T);
526 1.1 augustss sc->sc_vframes[i].htd = std;
527 1.1 augustss sc->sc_vframes[i].etd = std;
528 1.1 augustss sc->sc_vframes[i].hqh = sqh;
529 1.1 augustss sc->sc_vframes[i].eqh = sqh;
530 1.152 augustss for (j = i;
531 1.152 augustss j < UHCI_FRAMELIST_COUNT;
532 1.1 augustss j += UHCI_VFRAMELIST_COUNT)
533 1.88 tsutsui sc->sc_pframes[j] = htole32(std->physaddr);
534 1.1 augustss }
535 1.1 augustss
536 1.1 augustss LIST_INIT(&sc->sc_intrhead);
537 1.1 augustss
538 1.76 augustss SIMPLEQ_INIT(&sc->sc_free_xfers);
539 1.76 augustss
540 1.96 augustss usb_callout_init(sc->sc_poll_handle);
541 1.96 augustss
542 1.1 augustss /* Set up the bus struct. */
543 1.48 augustss sc->sc_bus.methods = &uhci_bus_methods;
544 1.1 augustss sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
545 1.1 augustss
546 1.190 augustss UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */
547 1.190 augustss
548 1.1 augustss DPRINTFN(1,("uhci_init: enabling\n"));
549 1.152 augustss UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
550 1.1 augustss UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */
551 1.1 augustss
552 1.16 augustss return (uhci_run(sc, 1)); /* and here we go... */
553 1.53 augustss }
554 1.53 augustss
555 1.67 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
556 1.53 augustss int
557 1.215 dyoung uhci_activate(device_t self, enum devact act)
558 1.53 augustss {
559 1.215 dyoung struct uhci_softc *sc = device_private(self);
560 1.53 augustss int rv = 0;
561 1.53 augustss
562 1.53 augustss switch (act) {
563 1.53 augustss case DVACT_ACTIVATE:
564 1.53 augustss return (EOPNOTSUPP);
565 1.53 augustss
566 1.53 augustss case DVACT_DEACTIVATE:
567 1.210 kiyohara sc->sc_dying = 1;
568 1.56 augustss if (sc->sc_child != NULL)
569 1.56 augustss rv = config_deactivate(sc->sc_child);
570 1.53 augustss break;
571 1.53 augustss }
572 1.53 augustss return (rv);
573 1.53 augustss }
574 1.53 augustss
575 1.215 dyoung void
576 1.215 dyoung uhci_childdet(device_t self, device_t child)
577 1.215 dyoung {
578 1.215 dyoung struct uhci_softc *sc = device_private(self);
579 1.215 dyoung
580 1.215 dyoung KASSERT(sc->sc_child == child);
581 1.215 dyoung sc->sc_child = NULL;
582 1.215 dyoung }
583 1.215 dyoung
584 1.53 augustss int
585 1.119 augustss uhci_detach(struct uhci_softc *sc, int flags)
586 1.53 augustss {
587 1.76 augustss usbd_xfer_handle xfer;
588 1.53 augustss int rv = 0;
589 1.53 augustss
590 1.53 augustss if (sc->sc_child != NULL)
591 1.53 augustss rv = config_detach(sc->sc_child, flags);
592 1.152 augustss
593 1.53 augustss if (rv != 0)
594 1.53 augustss return (rv);
595 1.53 augustss
596 1.76 augustss /* Free all xfers associated with this HC. */
597 1.76 augustss for (;;) {
598 1.76 augustss xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
599 1.76 augustss if (xfer == NULL)
600 1.76 augustss break;
601 1.161 lukem SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
602 1.76 augustss free(xfer, M_USB);
603 1.152 augustss }
604 1.76 augustss
605 1.76 augustss /* XXX free other data structures XXX */
606 1.53 augustss
607 1.53 augustss return (rv);
608 1.1 augustss }
609 1.67 augustss #endif
610 1.1 augustss
611 1.48 augustss usbd_status
612 1.119 augustss uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
613 1.48 augustss {
614 1.216 drochner struct uhci_softc *sc = bus->hci_private;
615 1.183 fvdl usbd_status status;
616 1.102 augustss u_int32_t n;
617 1.102 augustss
618 1.152 augustss /*
619 1.102 augustss * XXX
620 1.102 augustss * Since we are allocating a buffer we can assume that we will
621 1.148 augustss * need TDs for it. Since we don't want to allocate those from
622 1.102 augustss * an interrupt context, we allocate them here and free them again.
623 1.102 augustss * This is no guarantee that we'll get the TDs next time...
624 1.102 augustss */
625 1.102 augustss n = size / 8;
626 1.102 augustss if (n > 16) {
627 1.102 augustss u_int32_t i;
628 1.102 augustss uhci_soft_td_t **stds;
629 1.102 augustss DPRINTF(("uhci_allocm: get %d TDs\n", n));
630 1.150 tsutsui stds = malloc(sizeof(uhci_soft_td_t *) * n, M_TEMP,
631 1.151 augustss M_WAITOK|M_ZERO);
632 1.102 augustss for(i=0; i < n; i++)
633 1.102 augustss stds[i] = uhci_alloc_std(sc);
634 1.102 augustss for(i=0; i < n; i++)
635 1.102 augustss if (stds[i] != NULL)
636 1.102 augustss uhci_free_std(sc, stds[i]);
637 1.102 augustss free(stds, M_TEMP);
638 1.102 augustss }
639 1.102 augustss
640 1.183 fvdl
641 1.183 fvdl status = usb_allocmem(&sc->sc_bus, size, 0, dma);
642 1.183 fvdl #ifdef __NetBSD__
643 1.183 fvdl if (status == USBD_NOMEM)
644 1.183 fvdl status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
645 1.183 fvdl #endif
646 1.183 fvdl return status;
647 1.48 augustss }
648 1.48 augustss
649 1.48 augustss void
650 1.119 augustss uhci_freem(struct usbd_bus *bus, usb_dma_t *dma)
651 1.48 augustss {
652 1.183 fvdl #ifdef __NetBSD__
653 1.183 fvdl if (dma->block->flags & USB_DMA_RESERVE) {
654 1.183 fvdl usb_reserve_freem(&((struct uhci_softc *)bus)->sc_dma_reserve,
655 1.183 fvdl dma);
656 1.183 fvdl return;
657 1.183 fvdl }
658 1.183 fvdl #endif
659 1.63 augustss usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma);
660 1.76 augustss }
661 1.76 augustss
662 1.76 augustss usbd_xfer_handle
663 1.119 augustss uhci_allocx(struct usbd_bus *bus)
664 1.76 augustss {
665 1.216 drochner struct uhci_softc *sc = bus->hci_private;
666 1.76 augustss usbd_xfer_handle xfer;
667 1.76 augustss
668 1.76 augustss xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
669 1.94 augustss if (xfer != NULL) {
670 1.161 lukem SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
671 1.98 augustss #ifdef DIAGNOSTIC
672 1.94 augustss if (xfer->busy_free != XFER_FREE) {
673 1.105 augustss printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer,
674 1.94 augustss xfer->busy_free);
675 1.94 augustss }
676 1.98 augustss #endif
677 1.94 augustss } else {
678 1.92 augustss xfer = malloc(sizeof(struct uhci_xfer), M_USB, M_NOWAIT);
679 1.94 augustss }
680 1.92 augustss if (xfer != NULL) {
681 1.92 augustss memset(xfer, 0, sizeof (struct uhci_xfer));
682 1.92 augustss UXFER(xfer)->iinfo.sc = sc;
683 1.92 augustss #ifdef DIAGNOSTIC
684 1.92 augustss UXFER(xfer)->iinfo.isdone = 1;
685 1.135 augustss xfer->busy_free = XFER_BUSY;
686 1.92 augustss #endif
687 1.92 augustss }
688 1.76 augustss return (xfer);
689 1.76 augustss }
690 1.76 augustss
691 1.76 augustss void
692 1.119 augustss uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
693 1.76 augustss {
694 1.216 drochner struct uhci_softc *sc = bus->hci_private;
695 1.76 augustss
696 1.93 augustss #ifdef DIAGNOSTIC
697 1.94 augustss if (xfer->busy_free != XFER_BUSY) {
698 1.94 augustss printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer,
699 1.94 augustss xfer->busy_free);
700 1.93 augustss }
701 1.94 augustss xfer->busy_free = XFER_FREE;
702 1.105 augustss if (!UXFER(xfer)->iinfo.isdone) {
703 1.96 augustss printf("uhci_freex: !isdone\n");
704 1.105 augustss }
705 1.93 augustss #endif
706 1.76 augustss SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
707 1.48 augustss }
708 1.48 augustss
709 1.72 augustss /*
710 1.212 jmcneill * Handle suspend/resume.
711 1.212 jmcneill *
712 1.212 jmcneill * We need to switch to polling mode here, because this routine is
713 1.212 jmcneill * called from an interrupt context. This is all right since we
714 1.212 jmcneill * are almost suspended anyway.
715 1.72 augustss */
716 1.212 jmcneill bool
717 1.215 dyoung uhci_resume(device_t dv PMF_FN_ARGS)
718 1.72 augustss {
719 1.212 jmcneill uhci_softc_t *sc = device_private(dv);
720 1.212 jmcneill int cmd;
721 1.193 augustss int s;
722 1.72 augustss
723 1.212 jmcneill s = splhardusb();
724 1.193 augustss
725 1.212 jmcneill cmd = UREAD2(sc, UHCI_CMD);
726 1.193 augustss sc->sc_bus.use_polling++;
727 1.214 smb UWRITE2(sc, UHCI_INTR, 0);
728 1.214 smb uhci_globalreset(sc);
729 1.214 smb uhci_reset(sc);
730 1.212 jmcneill if (cmd & UHCI_CMD_RS)
731 1.212 jmcneill uhci_run(sc, 0);
732 1.212 jmcneill
733 1.212 jmcneill /* restore saved state */
734 1.212 jmcneill UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0));
735 1.212 jmcneill UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum);
736 1.212 jmcneill UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof);
737 1.212 jmcneill
738 1.212 jmcneill UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */
739 1.212 jmcneill usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
740 1.212 jmcneill UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
741 1.212 jmcneill UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE |
742 1.212 jmcneill UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE);
743 1.214 smb UHCICMD(sc, UHCI_CMD_MAXP);
744 1.212 jmcneill uhci_run(sc, 1); /* and start traffic again */
745 1.212 jmcneill usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
746 1.193 augustss sc->sc_bus.use_polling--;
747 1.212 jmcneill if (sc->sc_intr_xfer != NULL)
748 1.212 jmcneill usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub,
749 1.212 jmcneill sc->sc_intr_xfer);
750 1.212 jmcneill #ifdef UHCI_DEBUG
751 1.212 jmcneill if (uhcidebug > 2)
752 1.212 jmcneill uhci_dumpregs(sc);
753 1.212 jmcneill #endif
754 1.212 jmcneill
755 1.193 augustss splx(s);
756 1.212 jmcneill
757 1.212 jmcneill return true;
758 1.72 augustss }
759 1.72 augustss
760 1.212 jmcneill bool
761 1.215 dyoung uhci_suspend(device_t dv PMF_FN_ARGS)
762 1.30 augustss {
763 1.212 jmcneill uhci_softc_t *sc = device_private(dv);
764 1.30 augustss int cmd;
765 1.30 augustss int s;
766 1.30 augustss
767 1.132 augustss s = splhardusb();
768 1.212 jmcneill
769 1.30 augustss cmd = UREAD2(sc, UHCI_CMD);
770 1.30 augustss
771 1.212 jmcneill #ifdef UHCI_DEBUG
772 1.212 jmcneill if (uhcidebug > 2)
773 1.212 jmcneill uhci_dumpregs(sc);
774 1.212 jmcneill #endif
775 1.212 jmcneill if (sc->sc_intr_xfer != NULL)
776 1.212 jmcneill usb_uncallout(sc->sc_poll_handle, uhci_poll_hub,
777 1.212 jmcneill sc->sc_intr_xfer);
778 1.212 jmcneill sc->sc_bus.use_polling++;
779 1.212 jmcneill uhci_run(sc, 0); /* stop the controller */
780 1.212 jmcneill cmd &= ~UHCI_CMD_RS;
781 1.212 jmcneill
782 1.212 jmcneill /* save some state if BIOS doesn't */
783 1.212 jmcneill sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM);
784 1.212 jmcneill sc->sc_saved_sof = UREAD1(sc, UHCI_SOF);
785 1.212 jmcneill
786 1.212 jmcneill UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */
787 1.30 augustss
788 1.212 jmcneill UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */
789 1.212 jmcneill usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
790 1.212 jmcneill sc->sc_bus.use_polling--;
791 1.86 augustss
792 1.30 augustss splx(s);
793 1.212 jmcneill
794 1.212 jmcneill return true;
795 1.30 augustss }
796 1.30 augustss
797 1.59 augustss #ifdef UHCI_DEBUG
798 1.101 augustss Static void
799 1.119 augustss uhci_dumpregs(uhci_softc_t *sc)
800 1.1 augustss {
801 1.48 augustss DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
802 1.48 augustss "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
803 1.216 drochner device_xname(sc->sc_dev),
804 1.48 augustss UREAD2(sc, UHCI_CMD),
805 1.48 augustss UREAD2(sc, UHCI_STS),
806 1.48 augustss UREAD2(sc, UHCI_INTR),
807 1.48 augustss UREAD2(sc, UHCI_FRNUM),
808 1.48 augustss UREAD4(sc, UHCI_FLBASEADDR),
809 1.48 augustss UREAD1(sc, UHCI_SOF),
810 1.48 augustss UREAD2(sc, UHCI_PORTSC1),
811 1.48 augustss UREAD2(sc, UHCI_PORTSC2)));
812 1.1 augustss }
813 1.1 augustss
814 1.1 augustss void
815 1.119 augustss uhci_dump_td(uhci_soft_td_t *p)
816 1.1 augustss {
817 1.122 tv char sbuf[128], sbuf2[128];
818 1.122 tv
819 1.48 augustss DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
820 1.48 augustss "token=0x%08lx buffer=0x%08lx\n",
821 1.48 augustss p, (long)p->physaddr,
822 1.88 tsutsui (long)le32toh(p->td.td_link),
823 1.88 tsutsui (long)le32toh(p->td.td_status),
824 1.88 tsutsui (long)le32toh(p->td.td_token),
825 1.88 tsutsui (long)le32toh(p->td.td_buffer)));
826 1.122 tv
827 1.147 augustss bitmask_snprintf((u_int32_t)le32toh(p->td.td_link), "\20\1T\2Q\3VF",
828 1.122 tv sbuf, sizeof(sbuf));
829 1.147 augustss bitmask_snprintf((u_int32_t)le32toh(p->td.td_status),
830 1.122 tv "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
831 1.122 tv "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
832 1.122 tv sbuf2, sizeof(sbuf2));
833 1.122 tv
834 1.122 tv DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
835 1.122 tv "D=%d,maxlen=%d\n", sbuf, sbuf2,
836 1.88 tsutsui UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)),
837 1.88 tsutsui UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)),
838 1.88 tsutsui UHCI_TD_GET_PID(le32toh(p->td.td_token)),
839 1.88 tsutsui UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)),
840 1.88 tsutsui UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)),
841 1.88 tsutsui UHCI_TD_GET_DT(le32toh(p->td.td_token)),
842 1.88 tsutsui UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token))));
843 1.1 augustss }
844 1.1 augustss
845 1.1 augustss void
846 1.119 augustss uhci_dump_qh(uhci_soft_qh_t *sqh)
847 1.1 augustss {
848 1.67 augustss DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh,
849 1.88 tsutsui (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink),
850 1.88 tsutsui le32toh(sqh->qh.qh_elink)));
851 1.1 augustss }
852 1.1 augustss
853 1.13 augustss
854 1.110 augustss #if 1
855 1.1 augustss void
856 1.119 augustss uhci_dump(void)
857 1.1 augustss {
858 1.110 augustss uhci_dump_all(thesc);
859 1.110 augustss }
860 1.110 augustss #endif
861 1.1 augustss
862 1.110 augustss void
863 1.119 augustss uhci_dump_all(uhci_softc_t *sc)
864 1.110 augustss {
865 1.1 augustss uhci_dumpregs(sc);
866 1.50 augustss printf("intrs=%d\n", sc->sc_bus.no_intrs);
867 1.110 augustss /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/
868 1.123 augustss uhci_dump_qh(sc->sc_lctl_start);
869 1.1 augustss }
870 1.1 augustss
871 1.67 augustss
872 1.67 augustss void
873 1.119 augustss uhci_dump_qhs(uhci_soft_qh_t *sqh)
874 1.67 augustss {
875 1.67 augustss uhci_dump_qh(sqh);
876 1.67 augustss
877 1.67 augustss /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards
878 1.67 augustss * Traverses sideways first, then down.
879 1.67 augustss *
880 1.67 augustss * QH1
881 1.67 augustss * QH2
882 1.67 augustss * No QH
883 1.67 augustss * TD2.1
884 1.67 augustss * TD2.2
885 1.67 augustss * TD1.1
886 1.67 augustss * etc.
887 1.67 augustss *
888 1.67 augustss * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
889 1.67 augustss */
890 1.67 augustss
891 1.67 augustss
892 1.88 tsutsui if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T))
893 1.67 augustss uhci_dump_qhs(sqh->hlink);
894 1.67 augustss else
895 1.67 augustss DPRINTF(("No QH\n"));
896 1.67 augustss
897 1.88 tsutsui if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T))
898 1.67 augustss uhci_dump_tds(sqh->elink);
899 1.67 augustss else
900 1.67 augustss DPRINTF(("No TD\n"));
901 1.67 augustss }
902 1.67 augustss
903 1.1 augustss void
904 1.119 augustss uhci_dump_tds(uhci_soft_td_t *std)
905 1.1 augustss {
906 1.67 augustss uhci_soft_td_t *td;
907 1.67 augustss
908 1.67 augustss for(td = std; td != NULL; td = td->link.std) {
909 1.67 augustss uhci_dump_td(td);
910 1.1 augustss
911 1.67 augustss /* Check whether the link pointer in this TD marks
912 1.67 augustss * the link pointer as end of queue. This avoids
913 1.67 augustss * printing the free list in case the queue/TD has
914 1.67 augustss * already been moved there (seatbelt).
915 1.67 augustss */
916 1.88 tsutsui if (le32toh(td->td.td_link) & UHCI_PTR_T ||
917 1.88 tsutsui le32toh(td->td.td_link) == 0)
918 1.67 augustss break;
919 1.67 augustss }
920 1.1 augustss }
921 1.92 augustss
922 1.101 augustss Static void
923 1.119 augustss uhci_dump_ii(uhci_intr_info_t *ii)
924 1.92 augustss {
925 1.95 augustss usbd_pipe_handle pipe;
926 1.95 augustss usb_endpoint_descriptor_t *ed;
927 1.95 augustss usbd_device_handle dev;
928 1.152 augustss
929 1.98 augustss #ifdef DIAGNOSTIC
930 1.98 augustss #define DONE ii->isdone
931 1.98 augustss #else
932 1.98 augustss #define DONE 0
933 1.98 augustss #endif
934 1.95 augustss if (ii == NULL) {
935 1.95 augustss printf("ii NULL\n");
936 1.95 augustss return;
937 1.95 augustss }
938 1.95 augustss if (ii->xfer == NULL) {
939 1.95 augustss printf("ii %p: done=%d xfer=NULL\n",
940 1.98 augustss ii, DONE);
941 1.95 augustss return;
942 1.95 augustss }
943 1.95 augustss pipe = ii->xfer->pipe;
944 1.95 augustss if (pipe == NULL) {
945 1.95 augustss printf("ii %p: done=%d xfer=%p pipe=NULL\n",
946 1.98 augustss ii, DONE, ii->xfer);
947 1.139 augustss return;
948 1.139 augustss }
949 1.139 augustss if (pipe->endpoint == NULL) {
950 1.139 augustss printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n",
951 1.139 augustss ii, DONE, ii->xfer, pipe);
952 1.139 augustss return;
953 1.139 augustss }
954 1.139 augustss if (pipe->device == NULL) {
955 1.139 augustss printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n",
956 1.139 augustss ii, DONE, ii->xfer, pipe);
957 1.95 augustss return;
958 1.95 augustss }
959 1.95 augustss ed = pipe->endpoint->edesc;
960 1.95 augustss dev = pipe->device;
961 1.152 augustss printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n",
962 1.152 augustss ii, DONE, ii->xfer, dev,
963 1.95 augustss UGETW(dev->ddesc.idVendor),
964 1.92 augustss UGETW(dev->ddesc.idProduct),
965 1.92 augustss dev->address, pipe,
966 1.92 augustss ed->bEndpointAddress, ed->bmAttributes);
967 1.98 augustss #undef DONE
968 1.92 augustss }
969 1.92 augustss
970 1.120 augustss void uhci_dump_iis(struct uhci_softc *sc);
971 1.92 augustss void
972 1.119 augustss uhci_dump_iis(struct uhci_softc *sc)
973 1.92 augustss {
974 1.92 augustss uhci_intr_info_t *ii;
975 1.92 augustss
976 1.92 augustss printf("intr_info list:\n");
977 1.92 augustss for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
978 1.92 augustss uhci_dump_ii(ii);
979 1.92 augustss }
980 1.92 augustss
981 1.120 augustss void iidump(void);
982 1.119 augustss void iidump(void) { uhci_dump_iis(thesc); }
983 1.92 augustss
984 1.1 augustss #endif
985 1.1 augustss
986 1.1 augustss /*
987 1.1 augustss * This routine is executed periodically and simulates interrupts
988 1.1 augustss * from the root controller interrupt pipe for port status change.
989 1.1 augustss */
990 1.1 augustss void
991 1.119 augustss uhci_poll_hub(void *addr)
992 1.1 augustss {
993 1.63 augustss usbd_xfer_handle xfer = addr;
994 1.63 augustss usbd_pipe_handle pipe = xfer->pipe;
995 1.216 drochner uhci_softc_t *sc = pipe->device->bus->hci_private;
996 1.1 augustss int s;
997 1.1 augustss u_char *p;
998 1.1 augustss
999 1.96 augustss DPRINTFN(20, ("uhci_poll_hub\n"));
1000 1.1 augustss
1001 1.96 augustss usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
1002 1.41 augustss
1003 1.159 augustss p = KERNADDR(&xfer->dmabuf, 0);
1004 1.1 augustss p[0] = 0;
1005 1.1 augustss if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
1006 1.1 augustss p[0] |= 1<<1;
1007 1.1 augustss if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
1008 1.1 augustss p[0] |= 1<<2;
1009 1.41 augustss if (p[0] == 0)
1010 1.41 augustss /* No change, try again in a while */
1011 1.41 augustss return;
1012 1.41 augustss
1013 1.63 augustss xfer->actlen = 1;
1014 1.63 augustss xfer->status = USBD_NORMAL_COMPLETION;
1015 1.16 augustss s = splusb();
1016 1.63 augustss xfer->device->bus->intr_context++;
1017 1.63 augustss usb_transfer_complete(xfer);
1018 1.63 augustss xfer->device->bus->intr_context--;
1019 1.41 augustss splx(s);
1020 1.41 augustss }
1021 1.41 augustss
1022 1.41 augustss void
1023 1.205 christos uhci_root_intr_done(usbd_xfer_handle xfer)
1024 1.84 augustss {
1025 1.84 augustss }
1026 1.84 augustss
1027 1.84 augustss void
1028 1.205 christos uhci_root_ctrl_done(usbd_xfer_handle xfer)
1029 1.41 augustss {
1030 1.1 augustss }
1031 1.1 augustss
1032 1.123 augustss /*
1033 1.123 augustss * Let the last QH loop back to the high speed control transfer QH.
1034 1.123 augustss * This is what intel calls "bandwidth reclamation" and improves
1035 1.123 augustss * USB performance a lot for some devices.
1036 1.123 augustss * If we are already looping, just count it.
1037 1.123 augustss */
1038 1.1 augustss void
1039 1.123 augustss uhci_add_loop(uhci_softc_t *sc) {
1040 1.125 augustss #ifdef UHCI_DEBUG
1041 1.125 augustss if (uhcinoloop)
1042 1.125 augustss return;
1043 1.125 augustss #endif
1044 1.123 augustss if (++sc->sc_loops == 1) {
1045 1.125 augustss DPRINTFN(5,("uhci_start_loop: add\n"));
1046 1.123 augustss /* Note, we don't loop back the soft pointer. */
1047 1.152 augustss sc->sc_last_qh->qh.qh_hlink =
1048 1.123 augustss htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH);
1049 1.123 augustss }
1050 1.123 augustss }
1051 1.123 augustss
1052 1.123 augustss void
1053 1.123 augustss uhci_rem_loop(uhci_softc_t *sc) {
1054 1.125 augustss #ifdef UHCI_DEBUG
1055 1.125 augustss if (uhcinoloop)
1056 1.125 augustss return;
1057 1.125 augustss #endif
1058 1.123 augustss if (--sc->sc_loops == 0) {
1059 1.123 augustss DPRINTFN(5,("uhci_end_loop: remove\n"));
1060 1.123 augustss sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T);
1061 1.123 augustss }
1062 1.123 augustss }
1063 1.123 augustss
1064 1.123 augustss /* Add high speed control QH, called at splusb(). */
1065 1.123 augustss void
1066 1.123 augustss uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1067 1.1 augustss {
1068 1.42 augustss uhci_soft_qh_t *eqh;
1069 1.1 augustss
1070 1.52 augustss SPLUSBCHECK;
1071 1.52 augustss
1072 1.1 augustss DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
1073 1.123 augustss eqh = sc->sc_hctl_end;
1074 1.42 augustss sqh->hlink = eqh->hlink;
1075 1.42 augustss sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1076 1.42 augustss eqh->hlink = sqh;
1077 1.121 augustss eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
1078 1.123 augustss sc->sc_hctl_end = sqh;
1079 1.125 augustss #ifdef UHCI_CTL_LOOP
1080 1.123 augustss uhci_add_loop(sc);
1081 1.125 augustss #endif
1082 1.1 augustss }
1083 1.1 augustss
1084 1.123 augustss /* Remove high speed control QH, called at splusb(). */
1085 1.1 augustss void
1086 1.123 augustss uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1087 1.1 augustss {
1088 1.1 augustss uhci_soft_qh_t *pqh;
1089 1.1 augustss
1090 1.52 augustss SPLUSBCHECK;
1091 1.52 augustss
1092 1.123 augustss DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh));
1093 1.125 augustss #ifdef UHCI_CTL_LOOP
1094 1.123 augustss uhci_rem_loop(sc);
1095 1.125 augustss #endif
1096 1.124 augustss /*
1097 1.124 augustss * The T bit should be set in the elink of the QH so that the HC
1098 1.124 augustss * doesn't follow the pointer. This condition may fail if the
1099 1.124 augustss * the transferred packet was short so that the QH still points
1100 1.124 augustss * at the last used TD.
1101 1.124 augustss * In this case we set the T bit and wait a little for the HC
1102 1.124 augustss * to stop looking at the TD.
1103 1.124 augustss */
1104 1.124 augustss if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1105 1.124 augustss sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1106 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
1107 1.124 augustss }
1108 1.124 augustss
1109 1.123 augustss pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh);
1110 1.152 augustss pqh->hlink = sqh->hlink;
1111 1.42 augustss pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1112 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
1113 1.123 augustss if (sc->sc_hctl_end == sqh)
1114 1.123 augustss sc->sc_hctl_end = pqh;
1115 1.123 augustss }
1116 1.123 augustss
1117 1.123 augustss /* Add low speed control QH, called at splusb(). */
1118 1.123 augustss void
1119 1.123 augustss uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1120 1.123 augustss {
1121 1.123 augustss uhci_soft_qh_t *eqh;
1122 1.123 augustss
1123 1.123 augustss SPLUSBCHECK;
1124 1.123 augustss
1125 1.123 augustss DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh));
1126 1.123 augustss eqh = sc->sc_lctl_end;
1127 1.152 augustss sqh->hlink = eqh->hlink;
1128 1.123 augustss sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1129 1.152 augustss eqh->hlink = sqh;
1130 1.123 augustss eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
1131 1.123 augustss sc->sc_lctl_end = sqh;
1132 1.123 augustss }
1133 1.123 augustss
1134 1.123 augustss /* Remove low speed control QH, called at splusb(). */
1135 1.123 augustss void
1136 1.123 augustss uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1137 1.123 augustss {
1138 1.123 augustss uhci_soft_qh_t *pqh;
1139 1.123 augustss
1140 1.123 augustss SPLUSBCHECK;
1141 1.123 augustss
1142 1.123 augustss DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh));
1143 1.124 augustss /* See comment in uhci_remove_hs_ctrl() */
1144 1.124 augustss if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1145 1.124 augustss sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1146 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
1147 1.124 augustss }
1148 1.123 augustss pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh);
1149 1.152 augustss pqh->hlink = sqh->hlink;
1150 1.123 augustss pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1151 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
1152 1.123 augustss if (sc->sc_lctl_end == sqh)
1153 1.123 augustss sc->sc_lctl_end = pqh;
1154 1.1 augustss }
1155 1.1 augustss
1156 1.1 augustss /* Add bulk QH, called at splusb(). */
1157 1.1 augustss void
1158 1.119 augustss uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1159 1.1 augustss {
1160 1.42 augustss uhci_soft_qh_t *eqh;
1161 1.1 augustss
1162 1.52 augustss SPLUSBCHECK;
1163 1.52 augustss
1164 1.1 augustss DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
1165 1.42 augustss eqh = sc->sc_bulk_end;
1166 1.152 augustss sqh->hlink = eqh->hlink;
1167 1.42 augustss sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1168 1.152 augustss eqh->hlink = sqh;
1169 1.121 augustss eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
1170 1.1 augustss sc->sc_bulk_end = sqh;
1171 1.123 augustss uhci_add_loop(sc);
1172 1.1 augustss }
1173 1.1 augustss
1174 1.1 augustss /* Remove bulk QH, called at splusb(). */
1175 1.1 augustss void
1176 1.119 augustss uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1177 1.1 augustss {
1178 1.1 augustss uhci_soft_qh_t *pqh;
1179 1.1 augustss
1180 1.52 augustss SPLUSBCHECK;
1181 1.52 augustss
1182 1.1 augustss DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
1183 1.123 augustss uhci_rem_loop(sc);
1184 1.124 augustss /* See comment in uhci_remove_hs_ctrl() */
1185 1.124 augustss if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1186 1.124 augustss sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1187 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
1188 1.124 augustss }
1189 1.92 augustss pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh);
1190 1.42 augustss pqh->hlink = sqh->hlink;
1191 1.42 augustss pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1192 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
1193 1.1 augustss if (sc->sc_bulk_end == sqh)
1194 1.1 augustss sc->sc_bulk_end = pqh;
1195 1.1 augustss }
1196 1.1 augustss
1197 1.141 augustss Static int uhci_intr1(uhci_softc_t *);
1198 1.141 augustss
1199 1.1 augustss int
1200 1.119 augustss uhci_intr(void *arg)
1201 1.1 augustss {
1202 1.44 augustss uhci_softc_t *sc = arg;
1203 1.146 augustss
1204 1.216 drochner if (sc->sc_dying || !device_has_power(sc->sc_dev))
1205 1.146 augustss return (0);
1206 1.141 augustss
1207 1.141 augustss if (sc->sc_bus.use_polling) {
1208 1.141 augustss #ifdef DIAGNOSTIC
1209 1.179 mycroft DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n"));
1210 1.141 augustss #endif
1211 1.141 augustss return (0);
1212 1.141 augustss }
1213 1.179 mycroft
1214 1.141 augustss return (uhci_intr1(sc));
1215 1.141 augustss }
1216 1.141 augustss
1217 1.141 augustss int
1218 1.141 augustss uhci_intr1(uhci_softc_t *sc)
1219 1.141 augustss {
1220 1.44 augustss int status;
1221 1.44 augustss int ack;
1222 1.1 augustss
1223 1.67 augustss #ifdef UHCI_DEBUG
1224 1.44 augustss if (uhcidebug > 15) {
1225 1.216 drochner DPRINTF(("%s: uhci_intr1\n", device_xname(sc->sc_dev)));
1226 1.1 augustss uhci_dumpregs(sc);
1227 1.1 augustss }
1228 1.1 augustss #endif
1229 1.117 augustss
1230 1.153 augustss status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS;
1231 1.127 soren if (status == 0) /* The interrupt was not for us. */
1232 1.127 soren return (0);
1233 1.127 soren
1234 1.117 augustss if (sc->sc_suspend != PWR_RESUME) {
1235 1.201 jmcneill #ifdef DIAGNOSTIC
1236 1.117 augustss printf("%s: interrupt while not operating ignored\n",
1237 1.216 drochner device_xname(sc->sc_dev));
1238 1.201 jmcneill #endif
1239 1.134 augustss UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */
1240 1.117 augustss return (0);
1241 1.117 augustss }
1242 1.44 augustss
1243 1.44 augustss ack = 0;
1244 1.44 augustss if (status & UHCI_STS_USBINT)
1245 1.44 augustss ack |= UHCI_STS_USBINT;
1246 1.44 augustss if (status & UHCI_STS_USBEI)
1247 1.44 augustss ack |= UHCI_STS_USBEI;
1248 1.1 augustss if (status & UHCI_STS_RD) {
1249 1.44 augustss ack |= UHCI_STS_RD;
1250 1.118 augustss #ifdef UHCI_DEBUG
1251 1.216 drochner printf("%s: resume detect\n", device_xname(sc->sc_dev));
1252 1.118 augustss #endif
1253 1.1 augustss }
1254 1.1 augustss if (status & UHCI_STS_HSE) {
1255 1.44 augustss ack |= UHCI_STS_HSE;
1256 1.216 drochner printf("%s: host system error\n", device_xname(sc->sc_dev));
1257 1.1 augustss }
1258 1.1 augustss if (status & UHCI_STS_HCPE) {
1259 1.44 augustss ack |= UHCI_STS_HCPE;
1260 1.152 augustss printf("%s: host controller process error\n",
1261 1.216 drochner device_xname(sc->sc_dev));
1262 1.44 augustss }
1263 1.44 augustss if (status & UHCI_STS_HCH) {
1264 1.44 augustss /* no acknowledge needed */
1265 1.136 augustss if (!sc->sc_dying) {
1266 1.152 augustss printf("%s: host controller halted\n",
1267 1.216 drochner device_xname(sc->sc_dev));
1268 1.110 augustss #ifdef UHCI_DEBUG
1269 1.136 augustss uhci_dump_all(sc);
1270 1.110 augustss #endif
1271 1.136 augustss }
1272 1.136 augustss sc->sc_dying = 1;
1273 1.1 augustss }
1274 1.44 augustss
1275 1.132 augustss if (!ack)
1276 1.132 augustss return (0); /* nothing to acknowledge */
1277 1.132 augustss UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */
1278 1.1 augustss
1279 1.85 augustss sc->sc_bus.no_intrs++;
1280 1.85 augustss usb_schedsoftintr(&sc->sc_bus);
1281 1.85 augustss
1282 1.216 drochner DPRINTFN(15, ("%s: uhci_intr: exit\n", device_xname(sc->sc_dev)));
1283 1.85 augustss
1284 1.85 augustss return (1);
1285 1.85 augustss }
1286 1.85 augustss
1287 1.85 augustss void
1288 1.133 augustss uhci_softintr(void *v)
1289 1.85 augustss {
1290 1.216 drochner struct usbd_bus *bus = v;
1291 1.216 drochner uhci_softc_t *sc = bus->hci_private;
1292 1.178 martin uhci_intr_info_t *ii, *nextii;
1293 1.85 augustss
1294 1.216 drochner DPRINTFN(10,("%s: uhci_softintr (%d)\n", device_xname(sc->sc_dev),
1295 1.140 augustss sc->sc_bus.intr_context));
1296 1.85 augustss
1297 1.51 augustss sc->sc_bus.intr_context++;
1298 1.50 augustss
1299 1.1 augustss /*
1300 1.1 augustss * Interrupts on UHCI really suck. When the host controller
1301 1.1 augustss * interrupts because a transfer is completed there is no
1302 1.1 augustss * way of knowing which transfer it was. You can scan down
1303 1.1 augustss * the TDs and QHs of the previous frame to limit the search,
1304 1.1 augustss * but that assumes that the interrupt was not delayed by more
1305 1.1 augustss * than 1 ms, which may not always be true (e.g. after debug
1306 1.1 augustss * output on a slow console).
1307 1.1 augustss * We scan all interrupt descriptors to see if any have
1308 1.1 augustss * completed.
1309 1.1 augustss */
1310 1.178 martin for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) {
1311 1.178 martin nextii = LIST_NEXT(ii, list);
1312 1.1 augustss uhci_check_intr(sc, ii);
1313 1.178 martin }
1314 1.1 augustss
1315 1.164 augustss #ifdef USB_USE_SOFTINTR
1316 1.153 augustss if (sc->sc_softwake) {
1317 1.153 augustss sc->sc_softwake = 0;
1318 1.153 augustss wakeup(&sc->sc_softwake);
1319 1.153 augustss }
1320 1.164 augustss #endif /* USB_USE_SOFTINTR */
1321 1.153 augustss
1322 1.51 augustss sc->sc_bus.intr_context--;
1323 1.1 augustss }
1324 1.1 augustss
1325 1.1 augustss /* Check for an interrupt. */
1326 1.1 augustss void
1327 1.205 christos uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii)
1328 1.1 augustss {
1329 1.1 augustss uhci_soft_td_t *std, *lstd;
1330 1.18 augustss u_int32_t status;
1331 1.1 augustss
1332 1.1 augustss DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
1333 1.1 augustss #ifdef DIAGNOSTIC
1334 1.63 augustss if (ii == NULL) {
1335 1.1 augustss printf("uhci_check_intr: no ii? %p\n", ii);
1336 1.1 augustss return;
1337 1.1 augustss }
1338 1.1 augustss #endif
1339 1.155 augustss if (ii->xfer->status == USBD_CANCELLED ||
1340 1.155 augustss ii->xfer->status == USBD_TIMEOUT) {
1341 1.155 augustss DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer));
1342 1.155 augustss return;
1343 1.155 augustss }
1344 1.155 augustss
1345 1.63 augustss if (ii->stdstart == NULL)
1346 1.1 augustss return;
1347 1.1 augustss lstd = ii->stdend;
1348 1.1 augustss #ifdef DIAGNOSTIC
1349 1.63 augustss if (lstd == NULL) {
1350 1.1 augustss printf("uhci_check_intr: std==0\n");
1351 1.1 augustss return;
1352 1.1 augustss }
1353 1.1 augustss #endif
1354 1.152 augustss /*
1355 1.26 augustss * If the last TD is still active we need to check whether there
1356 1.186 skrll * is an error somewhere in the middle, or whether there was a
1357 1.26 augustss * short packet (SPD and not ACTIVE).
1358 1.26 augustss */
1359 1.88 tsutsui if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) {
1360 1.92 augustss DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii));
1361 1.48 augustss for (std = ii->stdstart; std != lstd; std = std->link.std) {
1362 1.88 tsutsui status = le32toh(std->td.td_status);
1363 1.83 augustss /* If there's an active TD the xfer isn't done. */
1364 1.83 augustss if (status & UHCI_TD_ACTIVE)
1365 1.83 augustss break;
1366 1.83 augustss /* Any kind of error makes the xfer done. */
1367 1.83 augustss if (status & UHCI_TD_STALLED)
1368 1.83 augustss goto done;
1369 1.83 augustss /* We want short packets, and it is short: it's done */
1370 1.83 augustss if ((status & UHCI_TD_SPD) &&
1371 1.152 augustss UHCI_TD_GET_ACTLEN(status) <
1372 1.88 tsutsui UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)))
1373 1.1 augustss goto done;
1374 1.18 augustss }
1375 1.92 augustss DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n",
1376 1.18 augustss ii, ii->stdstart));
1377 1.1 augustss return;
1378 1.1 augustss }
1379 1.1 augustss done:
1380 1.92 augustss DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii));
1381 1.96 augustss usb_uncallout(ii->xfer->timeout_handle, uhci_timeout, ii);
1382 1.36 augustss uhci_idone(ii);
1383 1.1 augustss }
1384 1.1 augustss
1385 1.52 augustss /* Called at splusb() */
1386 1.1 augustss void
1387 1.119 augustss uhci_idone(uhci_intr_info_t *ii)
1388 1.1 augustss {
1389 1.63 augustss usbd_xfer_handle xfer = ii->xfer;
1390 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1391 1.1 augustss uhci_soft_td_t *std;
1392 1.67 augustss u_int32_t status = 0, nstatus;
1393 1.26 augustss int actlen;
1394 1.1 augustss
1395 1.140 augustss DPRINTFN(12, ("uhci_idone: ii=%p\n", ii));
1396 1.7 augustss #ifdef DIAGNOSTIC
1397 1.7 augustss {
1398 1.7 augustss int s = splhigh();
1399 1.7 augustss if (ii->isdone) {
1400 1.26 augustss splx(s);
1401 1.92 augustss #ifdef UHCI_DEBUG
1402 1.92 augustss printf("uhci_idone: ii is done!\n ");
1403 1.92 augustss uhci_dump_ii(ii);
1404 1.92 augustss #else
1405 1.36 augustss printf("uhci_idone: ii=%p is done!\n", ii);
1406 1.92 augustss #endif
1407 1.7 augustss return;
1408 1.7 augustss }
1409 1.7 augustss ii->isdone = 1;
1410 1.7 augustss splx(s);
1411 1.7 augustss }
1412 1.7 augustss #endif
1413 1.48 augustss
1414 1.63 augustss if (xfer->nframes != 0) {
1415 1.48 augustss /* Isoc transfer, do things differently. */
1416 1.48 augustss uhci_soft_td_t **stds = upipe->u.iso.stds;
1417 1.126 augustss int i, n, nframes, len;
1418 1.48 augustss
1419 1.48 augustss DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii));
1420 1.48 augustss
1421 1.63 augustss nframes = xfer->nframes;
1422 1.48 augustss actlen = 0;
1423 1.92 augustss n = UXFER(xfer)->curframe;
1424 1.48 augustss for (i = 0; i < nframes; i++) {
1425 1.48 augustss std = stds[n];
1426 1.59 augustss #ifdef UHCI_DEBUG
1427 1.48 augustss if (uhcidebug > 5) {
1428 1.48 augustss DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i));
1429 1.48 augustss uhci_dump_td(std);
1430 1.48 augustss }
1431 1.48 augustss #endif
1432 1.48 augustss if (++n >= UHCI_VFRAMELIST_COUNT)
1433 1.48 augustss n = 0;
1434 1.88 tsutsui status = le32toh(std->td.td_status);
1435 1.126 augustss len = UHCI_TD_GET_ACTLEN(status);
1436 1.126 augustss xfer->frlengths[i] = len;
1437 1.126 augustss actlen += len;
1438 1.48 augustss }
1439 1.48 augustss upipe->u.iso.inuse -= nframes;
1440 1.63 augustss xfer->actlen = actlen;
1441 1.63 augustss xfer->status = USBD_NORMAL_COMPLETION;
1442 1.140 augustss goto end;
1443 1.48 augustss }
1444 1.48 augustss
1445 1.59 augustss #ifdef UHCI_DEBUG
1446 1.65 augustss DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n",
1447 1.65 augustss ii, xfer, upipe));
1448 1.48 augustss if (uhcidebug > 10)
1449 1.48 augustss uhci_dump_tds(ii->stdstart);
1450 1.48 augustss #endif
1451 1.48 augustss
1452 1.26 augustss /* The transfer is done, compute actual length and status. */
1453 1.26 augustss actlen = 0;
1454 1.63 augustss for (std = ii->stdstart; std != NULL; std = std->link.std) {
1455 1.88 tsutsui nstatus = le32toh(std->td.td_status);
1456 1.64 augustss if (nstatus & UHCI_TD_ACTIVE)
1457 1.26 augustss break;
1458 1.67 augustss
1459 1.64 augustss status = nstatus;
1460 1.88 tsutsui if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) !=
1461 1.88 tsutsui UHCI_TD_PID_SETUP)
1462 1.26 augustss actlen += UHCI_TD_GET_ACTLEN(status);
1463 1.176 mycroft else {
1464 1.176 mycroft /*
1465 1.176 mycroft * UHCI will report CRCTO in addition to a STALL or NAK
1466 1.176 mycroft * for a SETUP transaction. See section 3.2.2, "TD
1467 1.176 mycroft * CONTROL AND STATUS".
1468 1.176 mycroft */
1469 1.176 mycroft if (status & (UHCI_TD_STALLED | UHCI_TD_NAK))
1470 1.176 mycroft status &= ~UHCI_TD_CRCTO;
1471 1.176 mycroft }
1472 1.1 augustss }
1473 1.38 augustss /* If there are left over TDs we need to update the toggle. */
1474 1.63 augustss if (std != NULL)
1475 1.88 tsutsui upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token));
1476 1.38 augustss
1477 1.1 augustss status &= UHCI_TD_ERROR;
1478 1.152 augustss DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n",
1479 1.26 augustss actlen, status));
1480 1.63 augustss xfer->actlen = actlen;
1481 1.1 augustss if (status != 0) {
1482 1.122 tv #ifdef UHCI_DEBUG
1483 1.122 tv char sbuf[128];
1484 1.122 tv
1485 1.147 augustss bitmask_snprintf((u_int32_t)status,
1486 1.147 augustss "\20\22BITSTUFF\23CRCTO\24NAK\25"
1487 1.122 tv "BABBLE\26DBUFFER\27STALLED\30ACTIVE",
1488 1.122 tv sbuf, sizeof(sbuf));
1489 1.122 tv
1490 1.75 augustss DPRINTFN((status == UHCI_TD_STALLED)*10,
1491 1.36 augustss ("uhci_idone: error, addr=%d, endpt=0x%02x, "
1492 1.122 tv "status 0x%s\n",
1493 1.63 augustss xfer->pipe->device->address,
1494 1.63 augustss xfer->pipe->endpoint->edesc->bEndpointAddress,
1495 1.122 tv sbuf));
1496 1.122 tv #endif
1497 1.122 tv
1498 1.1 augustss if (status == UHCI_TD_STALLED)
1499 1.63 augustss xfer->status = USBD_STALLED;
1500 1.1 augustss else
1501 1.63 augustss xfer->status = USBD_IOERROR; /* more info XXX */
1502 1.1 augustss } else {
1503 1.63 augustss xfer->status = USBD_NORMAL_COMPLETION;
1504 1.1 augustss }
1505 1.140 augustss
1506 1.140 augustss end:
1507 1.63 augustss usb_transfer_complete(xfer);
1508 1.140 augustss DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii));
1509 1.1 augustss }
1510 1.1 augustss
1511 1.13 augustss /*
1512 1.13 augustss * Called when a request does not complete.
1513 1.13 augustss */
1514 1.1 augustss void
1515 1.119 augustss uhci_timeout(void *addr)
1516 1.1 augustss {
1517 1.1 augustss uhci_intr_info_t *ii = addr;
1518 1.153 augustss struct uhci_xfer *uxfer = UXFER(ii->xfer);
1519 1.153 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe;
1520 1.216 drochner uhci_softc_t *sc = upipe->pipe.device->bus->hci_private;
1521 1.153 augustss
1522 1.153 augustss DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer));
1523 1.153 augustss
1524 1.153 augustss if (sc->sc_dying) {
1525 1.153 augustss uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT);
1526 1.153 augustss return;
1527 1.153 augustss }
1528 1.1 augustss
1529 1.153 augustss /* Execute the abort in a process context. */
1530 1.156 augustss usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer);
1531 1.204 joerg usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task,
1532 1.204 joerg USB_TASKQ_HC);
1533 1.153 augustss }
1534 1.51 augustss
1535 1.153 augustss void
1536 1.153 augustss uhci_timeout_task(void *addr)
1537 1.153 augustss {
1538 1.153 augustss usbd_xfer_handle xfer = addr;
1539 1.153 augustss int s;
1540 1.153 augustss
1541 1.153 augustss DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer));
1542 1.67 augustss
1543 1.153 augustss s = splusb();
1544 1.153 augustss uhci_abort_xfer(xfer, USBD_TIMEOUT);
1545 1.153 augustss splx(s);
1546 1.1 augustss }
1547 1.1 augustss
1548 1.1 augustss /*
1549 1.1 augustss * Wait here until controller claims to have an interrupt.
1550 1.1 augustss * Then call uhci_intr and return. Use timeout to avoid waiting
1551 1.1 augustss * too long.
1552 1.13 augustss * Only used during boot when interrupts are not enabled yet.
1553 1.1 augustss */
1554 1.1 augustss void
1555 1.119 augustss uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer)
1556 1.1 augustss {
1557 1.63 augustss int timo = xfer->timeout;
1558 1.13 augustss uhci_intr_info_t *ii;
1559 1.13 augustss
1560 1.26 augustss DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
1561 1.1 augustss
1562 1.63 augustss xfer->status = USBD_IN_PROGRESS;
1563 1.26 augustss for (; timo >= 0; timo--) {
1564 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1565 1.26 augustss DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
1566 1.1 augustss if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
1567 1.141 augustss uhci_intr1(sc);
1568 1.63 augustss if (xfer->status != USBD_IN_PROGRESS)
1569 1.1 augustss return;
1570 1.1 augustss }
1571 1.1 augustss }
1572 1.13 augustss
1573 1.13 augustss /* Timeout */
1574 1.13 augustss DPRINTF(("uhci_waitintr: timeout\n"));
1575 1.13 augustss for (ii = LIST_FIRST(&sc->sc_intrhead);
1576 1.152 augustss ii != NULL && ii->xfer != xfer;
1577 1.13 augustss ii = LIST_NEXT(ii, list))
1578 1.13 augustss ;
1579 1.41 augustss #ifdef DIAGNOSTIC
1580 1.63 augustss if (ii == NULL)
1581 1.163 provos panic("uhci_waitintr: lost intr_info");
1582 1.41 augustss #endif
1583 1.41 augustss uhci_idone(ii);
1584 1.1 augustss }
1585 1.1 augustss
1586 1.8 augustss void
1587 1.119 augustss uhci_poll(struct usbd_bus *bus)
1588 1.8 augustss {
1589 1.216 drochner uhci_softc_t *sc = bus->hci_private;
1590 1.8 augustss
1591 1.8 augustss if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT)
1592 1.141 augustss uhci_intr1(sc);
1593 1.8 augustss }
1594 1.8 augustss
1595 1.1 augustss void
1596 1.119 augustss uhci_reset(uhci_softc_t *sc)
1597 1.1 augustss {
1598 1.1 augustss int n;
1599 1.1 augustss
1600 1.1 augustss UHCICMD(sc, UHCI_CMD_HCRESET);
1601 1.1 augustss /* The reset bit goes low when the controller is done. */
1602 1.152 augustss for (n = 0; n < UHCI_RESET_TIMEOUT &&
1603 1.1 augustss (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
1604 1.92 augustss usb_delay_ms(&sc->sc_bus, 1);
1605 1.1 augustss if (n >= UHCI_RESET_TIMEOUT)
1606 1.152 augustss printf("%s: controller did not reset\n",
1607 1.216 drochner device_xname(sc->sc_dev));
1608 1.1 augustss }
1609 1.1 augustss
1610 1.16 augustss usbd_status
1611 1.119 augustss uhci_run(uhci_softc_t *sc, int run)
1612 1.1 augustss {
1613 1.1 augustss int s, n, running;
1614 1.71 augustss u_int16_t cmd;
1615 1.1 augustss
1616 1.1 augustss run = run != 0;
1617 1.132 augustss s = splhardusb();
1618 1.30 augustss DPRINTF(("uhci_run: setting run=%d\n", run));
1619 1.71 augustss cmd = UREAD2(sc, UHCI_CMD);
1620 1.71 augustss if (run)
1621 1.71 augustss cmd |= UHCI_CMD_RS;
1622 1.71 augustss else
1623 1.71 augustss cmd &= ~UHCI_CMD_RS;
1624 1.71 augustss UHCICMD(sc, cmd);
1625 1.13 augustss for(n = 0; n < 10; n++) {
1626 1.1 augustss running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
1627 1.1 augustss /* return when we've entered the state we want */
1628 1.1 augustss if (run == running) {
1629 1.1 augustss splx(s);
1630 1.30 augustss DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
1631 1.30 augustss UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
1632 1.16 augustss return (USBD_NORMAL_COMPLETION);
1633 1.1 augustss }
1634 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1635 1.1 augustss }
1636 1.1 augustss splx(s);
1637 1.216 drochner printf("%s: cannot %s\n", device_xname(sc->sc_dev),
1638 1.14 augustss run ? "start" : "stop");
1639 1.16 augustss return (USBD_IOERROR);
1640 1.1 augustss }
1641 1.1 augustss
1642 1.1 augustss /*
1643 1.1 augustss * Memory management routines.
1644 1.1 augustss * uhci_alloc_std allocates TDs
1645 1.1 augustss * uhci_alloc_sqh allocates QHs
1646 1.7 augustss * These two routines do their own free list management,
1647 1.1 augustss * partly for speed, partly because allocating DMAable memory
1648 1.1 augustss * has page size granularaity so much memory would be wasted if
1649 1.16 augustss * only one TD/QH (32 bytes) was placed in each allocated chunk.
1650 1.1 augustss */
1651 1.1 augustss
1652 1.1 augustss uhci_soft_td_t *
1653 1.119 augustss uhci_alloc_std(uhci_softc_t *sc)
1654 1.1 augustss {
1655 1.1 augustss uhci_soft_td_t *std;
1656 1.63 augustss usbd_status err;
1657 1.42 augustss int i, offs;
1658 1.7 augustss usb_dma_t dma;
1659 1.1 augustss
1660 1.63 augustss if (sc->sc_freetds == NULL) {
1661 1.1 augustss DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
1662 1.63 augustss err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK,
1663 1.63 augustss UHCI_TD_ALIGN, &dma);
1664 1.63 augustss if (err)
1665 1.16 augustss return (0);
1666 1.43 augustss for(i = 0; i < UHCI_STD_CHUNK; i++) {
1667 1.42 augustss offs = i * UHCI_STD_SIZE;
1668 1.159 augustss std = KERNADDR(&dma, offs);
1669 1.160 augustss std->physaddr = DMAADDR(&dma, offs);
1670 1.42 augustss std->link.std = sc->sc_freetds;
1671 1.1 augustss sc->sc_freetds = std;
1672 1.1 augustss }
1673 1.1 augustss }
1674 1.1 augustss std = sc->sc_freetds;
1675 1.42 augustss sc->sc_freetds = std->link.std;
1676 1.42 augustss memset(&std->td, 0, sizeof(uhci_td_t));
1677 1.1 augustss return std;
1678 1.1 augustss }
1679 1.1 augustss
1680 1.1 augustss void
1681 1.119 augustss uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std)
1682 1.1 augustss {
1683 1.7 augustss #ifdef DIAGNOSTIC
1684 1.7 augustss #define TD_IS_FREE 0x12345678
1685 1.88 tsutsui if (le32toh(std->td.td_token) == TD_IS_FREE) {
1686 1.7 augustss printf("uhci_free_std: freeing free TD %p\n", std);
1687 1.7 augustss return;
1688 1.7 augustss }
1689 1.88 tsutsui std->td.td_token = htole32(TD_IS_FREE);
1690 1.7 augustss #endif
1691 1.42 augustss std->link.std = sc->sc_freetds;
1692 1.1 augustss sc->sc_freetds = std;
1693 1.1 augustss }
1694 1.1 augustss
1695 1.1 augustss uhci_soft_qh_t *
1696 1.119 augustss uhci_alloc_sqh(uhci_softc_t *sc)
1697 1.1 augustss {
1698 1.1 augustss uhci_soft_qh_t *sqh;
1699 1.63 augustss usbd_status err;
1700 1.1 augustss int i, offs;
1701 1.7 augustss usb_dma_t dma;
1702 1.1 augustss
1703 1.63 augustss if (sc->sc_freeqhs == NULL) {
1704 1.1 augustss DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
1705 1.63 augustss err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK,
1706 1.63 augustss UHCI_QH_ALIGN, &dma);
1707 1.63 augustss if (err)
1708 1.63 augustss return (0);
1709 1.43 augustss for(i = 0; i < UHCI_SQH_CHUNK; i++) {
1710 1.42 augustss offs = i * UHCI_SQH_SIZE;
1711 1.159 augustss sqh = KERNADDR(&dma, offs);
1712 1.160 augustss sqh->physaddr = DMAADDR(&dma, offs);
1713 1.42 augustss sqh->hlink = sc->sc_freeqhs;
1714 1.1 augustss sc->sc_freeqhs = sqh;
1715 1.1 augustss }
1716 1.1 augustss }
1717 1.1 augustss sqh = sc->sc_freeqhs;
1718 1.42 augustss sc->sc_freeqhs = sqh->hlink;
1719 1.42 augustss memset(&sqh->qh, 0, sizeof(uhci_qh_t));
1720 1.16 augustss return (sqh);
1721 1.1 augustss }
1722 1.1 augustss
1723 1.1 augustss void
1724 1.119 augustss uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1725 1.1 augustss {
1726 1.42 augustss sqh->hlink = sc->sc_freeqhs;
1727 1.1 augustss sc->sc_freeqhs = sqh;
1728 1.1 augustss }
1729 1.1 augustss
1730 1.1 augustss void
1731 1.119 augustss uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std,
1732 1.119 augustss uhci_soft_td_t *stdend)
1733 1.1 augustss {
1734 1.1 augustss uhci_soft_td_t *p;
1735 1.1 augustss
1736 1.1 augustss for (; std != stdend; std = p) {
1737 1.42 augustss p = std->link.std;
1738 1.1 augustss uhci_free_std(sc, std);
1739 1.1 augustss }
1740 1.1 augustss }
1741 1.1 augustss
1742 1.1 augustss usbd_status
1743 1.119 augustss uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len,
1744 1.119 augustss int rd, u_int16_t flags, usb_dma_t *dma,
1745 1.119 augustss uhci_soft_td_t **sp, uhci_soft_td_t **ep)
1746 1.1 augustss {
1747 1.1 augustss uhci_soft_td_t *p, *lastp;
1748 1.1 augustss uhci_physaddr_t lastlink;
1749 1.1 augustss int i, ntd, l, tog, maxp;
1750 1.18 augustss u_int32_t status;
1751 1.1 augustss int addr = upipe->pipe.device->address;
1752 1.1 augustss int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1753 1.1 augustss
1754 1.144 augustss DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d "
1755 1.152 augustss "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len,
1756 1.144 augustss upipe->pipe.device->speed, flags));
1757 1.4 augustss maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
1758 1.1 augustss if (maxp == 0) {
1759 1.1 augustss printf("uhci_alloc_std_chain: maxp=0\n");
1760 1.1 augustss return (USBD_INVAL);
1761 1.1 augustss }
1762 1.1 augustss ntd = (len + maxp - 1) / maxp;
1763 1.73 augustss if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0)
1764 1.73 augustss ntd++;
1765 1.39 augustss DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd));
1766 1.73 augustss if (ntd == 0) {
1767 1.73 augustss *sp = *ep = 0;
1768 1.73 augustss DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n"));
1769 1.73 augustss return (USBD_NORMAL_COMPLETION);
1770 1.73 augustss }
1771 1.38 augustss tog = upipe->nexttoggle;
1772 1.1 augustss if (ntd % 2 == 0)
1773 1.1 augustss tog ^= 1;
1774 1.32 augustss upipe->nexttoggle = tog ^ 1;
1775 1.121 augustss lastp = NULL;
1776 1.1 augustss lastlink = UHCI_PTR_T;
1777 1.1 augustss ntd--;
1778 1.33 augustss status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
1779 1.144 augustss if (upipe->pipe.device->speed == USB_SPEED_LOW)
1780 1.18 augustss status |= UHCI_TD_LS;
1781 1.73 augustss if (flags & USBD_SHORT_XFER_OK)
1782 1.18 augustss status |= UHCI_TD_SPD;
1783 1.1 augustss for (i = ntd; i >= 0; i--) {
1784 1.1 augustss p = uhci_alloc_std(sc);
1785 1.63 augustss if (p == NULL) {
1786 1.202 christos KASSERT(lastp != NULL);
1787 1.149 augustss uhci_free_std_chain(sc, lastp, NULL);
1788 1.1 augustss return (USBD_NOMEM);
1789 1.1 augustss }
1790 1.42 augustss p->link.std = lastp;
1791 1.121 augustss p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD);
1792 1.1 augustss lastp = p;
1793 1.1 augustss lastlink = p->physaddr;
1794 1.88 tsutsui p->td.td_status = htole32(status);
1795 1.1 augustss if (i == ntd) {
1796 1.1 augustss /* last TD */
1797 1.1 augustss l = len % maxp;
1798 1.73 augustss if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER))
1799 1.73 augustss l = maxp;
1800 1.1 augustss *ep = p;
1801 1.1 augustss } else
1802 1.1 augustss l = maxp;
1803 1.152 augustss p->td.td_token =
1804 1.88 tsutsui htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) :
1805 1.88 tsutsui UHCI_TD_OUT(l, endpt, addr, tog));
1806 1.160 augustss p->td.td_buffer = htole32(DMAADDR(dma, i * maxp));
1807 1.1 augustss tog ^= 1;
1808 1.1 augustss }
1809 1.1 augustss *sp = lastp;
1810 1.152 augustss DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n",
1811 1.38 augustss upipe->nexttoggle));
1812 1.1 augustss return (USBD_NORMAL_COMPLETION);
1813 1.1 augustss }
1814 1.1 augustss
1815 1.38 augustss void
1816 1.119 augustss uhci_device_clear_toggle(usbd_pipe_handle pipe)
1817 1.38 augustss {
1818 1.38 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1819 1.38 augustss upipe->nexttoggle = 0;
1820 1.38 augustss }
1821 1.38 augustss
1822 1.38 augustss void
1823 1.205 christos uhci_noop(usbd_pipe_handle pipe)
1824 1.38 augustss {
1825 1.38 augustss }
1826 1.38 augustss
1827 1.1 augustss usbd_status
1828 1.119 augustss uhci_device_bulk_transfer(usbd_xfer_handle xfer)
1829 1.1 augustss {
1830 1.63 augustss usbd_status err;
1831 1.16 augustss
1832 1.52 augustss /* Insert last in queue. */
1833 1.63 augustss err = usb_insert_transfer(xfer);
1834 1.63 augustss if (err)
1835 1.63 augustss return (err);
1836 1.52 augustss
1837 1.152 augustss /*
1838 1.92 augustss * Pipe isn't running (otherwise err would be USBD_INPROG),
1839 1.92 augustss * so start it first.
1840 1.67 augustss */
1841 1.63 augustss return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1842 1.16 augustss }
1843 1.16 augustss
1844 1.16 augustss usbd_status
1845 1.119 augustss uhci_device_bulk_start(usbd_xfer_handle xfer)
1846 1.16 augustss {
1847 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1848 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
1849 1.216 drochner uhci_softc_t *sc = dev->bus->hci_private;
1850 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
1851 1.55 augustss uhci_soft_td_t *data, *dataend;
1852 1.1 augustss uhci_soft_qh_t *sqh;
1853 1.63 augustss usbd_status err;
1854 1.45 augustss int len, isread, endpt;
1855 1.1 augustss int s;
1856 1.1 augustss
1857 1.169 augustss DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n",
1858 1.169 augustss xfer, xfer->length, xfer->flags, ii));
1859 1.1 augustss
1860 1.82 augustss if (sc->sc_dying)
1861 1.82 augustss return (USBD_IOERROR);
1862 1.82 augustss
1863 1.48 augustss #ifdef DIAGNOSTIC
1864 1.63 augustss if (xfer->rqflags & URQ_REQUEST)
1865 1.163 provos panic("uhci_device_bulk_transfer: a request");
1866 1.48 augustss #endif
1867 1.1 augustss
1868 1.63 augustss len = xfer->length;
1869 1.102 augustss endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1870 1.45 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
1871 1.1 augustss sqh = upipe->u.bulk.sqh;
1872 1.1 augustss
1873 1.1 augustss upipe->u.bulk.isread = isread;
1874 1.1 augustss upipe->u.bulk.length = len;
1875 1.1 augustss
1876 1.73 augustss err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
1877 1.73 augustss &xfer->dmabuf, &data, &dataend);
1878 1.63 augustss if (err)
1879 1.63 augustss return (err);
1880 1.88 tsutsui dataend->td.td_status |= htole32(UHCI_TD_IOC);
1881 1.1 augustss
1882 1.59 augustss #ifdef UHCI_DEBUG
1883 1.33 augustss if (uhcidebug > 8) {
1884 1.55 augustss DPRINTF(("uhci_device_bulk_transfer: data(1)\n"));
1885 1.55 augustss uhci_dump_tds(data);
1886 1.1 augustss }
1887 1.1 augustss #endif
1888 1.1 augustss
1889 1.1 augustss /* Set up interrupt info. */
1890 1.63 augustss ii->xfer = xfer;
1891 1.55 augustss ii->stdstart = data;
1892 1.55 augustss ii->stdend = dataend;
1893 1.7 augustss #ifdef DIAGNOSTIC
1894 1.70 augustss if (!ii->isdone) {
1895 1.70 augustss printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii);
1896 1.70 augustss }
1897 1.7 augustss ii->isdone = 0;
1898 1.7 augustss #endif
1899 1.1 augustss
1900 1.55 augustss sqh->elink = data;
1901 1.121 augustss sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
1902 1.1 augustss
1903 1.1 augustss s = splusb();
1904 1.1 augustss uhci_add_bulk(sc, sqh);
1905 1.92 augustss uhci_add_intr_info(sc, ii);
1906 1.1 augustss
1907 1.63 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
1908 1.171 tsutsui usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
1909 1.91 augustss uhci_timeout, ii);
1910 1.13 augustss }
1911 1.92 augustss xfer->status = USBD_IN_PROGRESS;
1912 1.1 augustss splx(s);
1913 1.1 augustss
1914 1.59 augustss #ifdef UHCI_DEBUG
1915 1.1 augustss if (uhcidebug > 10) {
1916 1.55 augustss DPRINTF(("uhci_device_bulk_transfer: data(2)\n"));
1917 1.55 augustss uhci_dump_tds(data);
1918 1.1 augustss }
1919 1.1 augustss #endif
1920 1.1 augustss
1921 1.26 augustss if (sc->sc_bus.use_polling)
1922 1.63 augustss uhci_waitintr(sc, xfer);
1923 1.26 augustss
1924 1.1 augustss return (USBD_IN_PROGRESS);
1925 1.1 augustss }
1926 1.1 augustss
1927 1.1 augustss /* Abort a device bulk request. */
1928 1.1 augustss void
1929 1.119 augustss uhci_device_bulk_abort(usbd_xfer_handle xfer)
1930 1.1 augustss {
1931 1.33 augustss DPRINTF(("uhci_device_bulk_abort:\n"));
1932 1.66 augustss uhci_abort_xfer(xfer, USBD_CANCELLED);
1933 1.33 augustss }
1934 1.33 augustss
1935 1.92 augustss /*
1936 1.154 augustss * Abort a device request.
1937 1.154 augustss * If this routine is called at splusb() it guarantees that the request
1938 1.154 augustss * will be removed from the hardware scheduling and that the callback
1939 1.154 augustss * for it will be called with USBD_CANCELLED status.
1940 1.154 augustss * It's impossible to guarantee that the requested transfer will not
1941 1.154 augustss * have happened since the hardware runs concurrently.
1942 1.154 augustss * If the transaction has already happened we rely on the ordinary
1943 1.154 augustss * interrupt processing to process it.
1944 1.92 augustss */
1945 1.33 augustss void
1946 1.119 augustss uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
1947 1.33 augustss {
1948 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
1949 1.153 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1950 1.216 drochner uhci_softc_t *sc = upipe->pipe.device->bus->hci_private;
1951 1.33 augustss uhci_soft_td_t *std;
1952 1.92 augustss int s;
1953 1.188 augustss int wake;
1954 1.65 augustss
1955 1.106 augustss DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status));
1956 1.33 augustss
1957 1.153 augustss if (sc->sc_dying) {
1958 1.153 augustss /* If we're dying, just do the software part. */
1959 1.153 augustss s = splusb();
1960 1.153 augustss xfer->status = status; /* make software ignore it */
1961 1.157 tsutsui usb_uncallout(xfer->timeout_handle, uhci_timeout, xfer);
1962 1.153 augustss usb_transfer_complete(xfer);
1963 1.92 augustss splx(s);
1964 1.194 christos return;
1965 1.92 augustss }
1966 1.92 augustss
1967 1.153 augustss if (xfer->device->bus->intr_context || !curproc)
1968 1.163 provos panic("uhci_abort_xfer: not in process context");
1969 1.153 augustss
1970 1.153 augustss /*
1971 1.188 augustss * If an abort is already in progress then just wait for it to
1972 1.188 augustss * complete and return.
1973 1.188 augustss */
1974 1.188 augustss if (xfer->hcflags & UXFER_ABORTING) {
1975 1.188 augustss DPRINTFN(2, ("uhci_abort_xfer: already aborting\n"));
1976 1.188 augustss #ifdef DIAGNOSTIC
1977 1.188 augustss if (status == USBD_TIMEOUT)
1978 1.188 augustss printf("uhci_abort_xfer: TIMEOUT while aborting\n");
1979 1.188 augustss #endif
1980 1.188 augustss /* Override the status which might be USBD_TIMEOUT. */
1981 1.188 augustss xfer->status = status;
1982 1.188 augustss DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n"));
1983 1.188 augustss xfer->hcflags |= UXFER_ABORTWAIT;
1984 1.188 augustss while (xfer->hcflags & UXFER_ABORTING)
1985 1.188 augustss tsleep(&xfer->hcflags, PZERO, "uhciaw", 0);
1986 1.188 augustss return;
1987 1.188 augustss }
1988 1.188 augustss xfer->hcflags |= UXFER_ABORTING;
1989 1.188 augustss
1990 1.188 augustss /*
1991 1.153 augustss * Step 1: Make interrupt routine and hardware ignore xfer.
1992 1.153 augustss */
1993 1.153 augustss s = splusb();
1994 1.153 augustss xfer->status = status; /* make software ignore it */
1995 1.106 augustss usb_uncallout(xfer->timeout_handle, uhci_timeout, ii);
1996 1.153 augustss DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii));
1997 1.106 augustss for (std = ii->stdstart; std != NULL; std = std->link.std)
1998 1.92 augustss std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
1999 1.153 augustss splx(s);
2000 1.92 augustss
2001 1.162 augustss /*
2002 1.153 augustss * Step 2: Wait until we know hardware has finished any possible
2003 1.153 augustss * use of the xfer. Also make sure the soft interrupt routine
2004 1.153 augustss * has run.
2005 1.153 augustss */
2006 1.154 augustss usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */
2007 1.153 augustss s = splusb();
2008 1.164 augustss #ifdef USB_USE_SOFTINTR
2009 1.153 augustss sc->sc_softwake = 1;
2010 1.164 augustss #endif /* USB_USE_SOFTINTR */
2011 1.153 augustss usb_schedsoftintr(&sc->sc_bus);
2012 1.164 augustss #ifdef USB_USE_SOFTINTR
2013 1.154 augustss DPRINTFN(1,("uhci_abort_xfer: tsleep\n"));
2014 1.153 augustss tsleep(&sc->sc_softwake, PZERO, "uhciab", 0);
2015 1.164 augustss #endif /* USB_USE_SOFTINTR */
2016 1.153 augustss splx(s);
2017 1.162 augustss
2018 1.153 augustss /*
2019 1.153 augustss * Step 3: Execute callback.
2020 1.153 augustss */
2021 1.154 augustss DPRINTFN(1,("uhci_abort_xfer: callback\n"));
2022 1.92 augustss s = splusb();
2023 1.100 augustss #ifdef DIAGNOSTIC
2024 1.106 augustss ii->isdone = 1;
2025 1.100 augustss #endif
2026 1.188 augustss wake = xfer->hcflags & UXFER_ABORTWAIT;
2027 1.188 augustss xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
2028 1.106 augustss usb_transfer_complete(xfer);
2029 1.188 augustss if (wake)
2030 1.188 augustss wakeup(&xfer->hcflags);
2031 1.33 augustss splx(s);
2032 1.1 augustss }
2033 1.1 augustss
2034 1.1 augustss /* Close a device bulk pipe. */
2035 1.1 augustss void
2036 1.119 augustss uhci_device_bulk_close(usbd_pipe_handle pipe)
2037 1.1 augustss {
2038 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2039 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
2040 1.216 drochner uhci_softc_t *sc = dev->bus->hci_private;
2041 1.1 augustss
2042 1.1 augustss uhci_free_sqh(sc, upipe->u.bulk.sqh);
2043 1.1 augustss }
2044 1.1 augustss
2045 1.1 augustss usbd_status
2046 1.119 augustss uhci_device_ctrl_transfer(usbd_xfer_handle xfer)
2047 1.1 augustss {
2048 1.63 augustss usbd_status err;
2049 1.16 augustss
2050 1.52 augustss /* Insert last in queue. */
2051 1.63 augustss err = usb_insert_transfer(xfer);
2052 1.63 augustss if (err)
2053 1.63 augustss return (err);
2054 1.52 augustss
2055 1.152 augustss /*
2056 1.92 augustss * Pipe isn't running (otherwise err would be USBD_INPROG),
2057 1.92 augustss * so start it first.
2058 1.67 augustss */
2059 1.63 augustss return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2060 1.16 augustss }
2061 1.16 augustss
2062 1.16 augustss usbd_status
2063 1.119 augustss uhci_device_ctrl_start(usbd_xfer_handle xfer)
2064 1.16 augustss {
2065 1.216 drochner uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2066 1.63 augustss usbd_status err;
2067 1.1 augustss
2068 1.82 augustss if (sc->sc_dying)
2069 1.82 augustss return (USBD_IOERROR);
2070 1.82 augustss
2071 1.48 augustss #ifdef DIAGNOSTIC
2072 1.63 augustss if (!(xfer->rqflags & URQ_REQUEST))
2073 1.163 provos panic("uhci_device_ctrl_transfer: not a request");
2074 1.48 augustss #endif
2075 1.1 augustss
2076 1.63 augustss err = uhci_device_request(xfer);
2077 1.63 augustss if (err)
2078 1.63 augustss return (err);
2079 1.1 augustss
2080 1.9 augustss if (sc->sc_bus.use_polling)
2081 1.63 augustss uhci_waitintr(sc, xfer);
2082 1.1 augustss return (USBD_IN_PROGRESS);
2083 1.1 augustss }
2084 1.1 augustss
2085 1.1 augustss usbd_status
2086 1.119 augustss uhci_device_intr_transfer(usbd_xfer_handle xfer)
2087 1.1 augustss {
2088 1.63 augustss usbd_status err;
2089 1.16 augustss
2090 1.52 augustss /* Insert last in queue. */
2091 1.63 augustss err = usb_insert_transfer(xfer);
2092 1.63 augustss if (err)
2093 1.63 augustss return (err);
2094 1.52 augustss
2095 1.152 augustss /*
2096 1.92 augustss * Pipe isn't running (otherwise err would be USBD_INPROG),
2097 1.92 augustss * so start it first.
2098 1.67 augustss */
2099 1.63 augustss return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2100 1.16 augustss }
2101 1.16 augustss
2102 1.16 augustss usbd_status
2103 1.119 augustss uhci_device_intr_start(usbd_xfer_handle xfer)
2104 1.16 augustss {
2105 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2106 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
2107 1.216 drochner uhci_softc_t *sc = dev->bus->hci_private;
2108 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2109 1.55 augustss uhci_soft_td_t *data, *dataend;
2110 1.1 augustss uhci_soft_qh_t *sqh;
2111 1.63 augustss usbd_status err;
2112 1.187 skrll int isread, endpt;
2113 1.49 augustss int i, s;
2114 1.1 augustss
2115 1.82 augustss if (sc->sc_dying)
2116 1.82 augustss return (USBD_IOERROR);
2117 1.82 augustss
2118 1.63 augustss DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n",
2119 1.63 augustss xfer, xfer->length, xfer->flags));
2120 1.1 augustss
2121 1.48 augustss #ifdef DIAGNOSTIC
2122 1.63 augustss if (xfer->rqflags & URQ_REQUEST)
2123 1.163 provos panic("uhci_device_intr_transfer: a request");
2124 1.48 augustss #endif
2125 1.1 augustss
2126 1.187 skrll endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2127 1.187 skrll isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2128 1.187 skrll
2129 1.187 skrll upipe->u.intr.isread = isread;
2130 1.187 skrll
2131 1.187 skrll err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread,
2132 1.187 skrll xfer->flags, &xfer->dmabuf, &data,
2133 1.187 skrll &dataend);
2134 1.63 augustss if (err)
2135 1.63 augustss return (err);
2136 1.88 tsutsui dataend->td.td_status |= htole32(UHCI_TD_IOC);
2137 1.1 augustss
2138 1.59 augustss #ifdef UHCI_DEBUG
2139 1.1 augustss if (uhcidebug > 10) {
2140 1.55 augustss DPRINTF(("uhci_device_intr_transfer: data(1)\n"));
2141 1.55 augustss uhci_dump_tds(data);
2142 1.1 augustss uhci_dump_qh(upipe->u.intr.qhs[0]);
2143 1.1 augustss }
2144 1.1 augustss #endif
2145 1.1 augustss
2146 1.1 augustss s = splusb();
2147 1.1 augustss /* Set up interrupt info. */
2148 1.63 augustss ii->xfer = xfer;
2149 1.55 augustss ii->stdstart = data;
2150 1.55 augustss ii->stdend = dataend;
2151 1.7 augustss #ifdef DIAGNOSTIC
2152 1.70 augustss if (!ii->isdone) {
2153 1.70 augustss printf("uhci_device_intr_transfer: not done, ii=%p\n", ii);
2154 1.70 augustss }
2155 1.7 augustss ii->isdone = 0;
2156 1.7 augustss #endif
2157 1.1 augustss
2158 1.152 augustss DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
2159 1.12 augustss upipe->u.intr.qhs[0]));
2160 1.1 augustss for (i = 0; i < upipe->u.intr.npoll; i++) {
2161 1.1 augustss sqh = upipe->u.intr.qhs[i];
2162 1.55 augustss sqh->elink = data;
2163 1.121 augustss sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
2164 1.1 augustss }
2165 1.92 augustss uhci_add_intr_info(sc, ii);
2166 1.92 augustss xfer->status = USBD_IN_PROGRESS;
2167 1.1 augustss splx(s);
2168 1.1 augustss
2169 1.59 augustss #ifdef UHCI_DEBUG
2170 1.1 augustss if (uhcidebug > 10) {
2171 1.55 augustss DPRINTF(("uhci_device_intr_transfer: data(2)\n"));
2172 1.55 augustss uhci_dump_tds(data);
2173 1.1 augustss uhci_dump_qh(upipe->u.intr.qhs[0]);
2174 1.1 augustss }
2175 1.1 augustss #endif
2176 1.1 augustss
2177 1.1 augustss return (USBD_IN_PROGRESS);
2178 1.1 augustss }
2179 1.1 augustss
2180 1.1 augustss /* Abort a device control request. */
2181 1.1 augustss void
2182 1.119 augustss uhci_device_ctrl_abort(usbd_xfer_handle xfer)
2183 1.1 augustss {
2184 1.33 augustss DPRINTF(("uhci_device_ctrl_abort:\n"));
2185 1.66 augustss uhci_abort_xfer(xfer, USBD_CANCELLED);
2186 1.1 augustss }
2187 1.1 augustss
2188 1.1 augustss /* Close a device control pipe. */
2189 1.1 augustss void
2190 1.205 christos uhci_device_ctrl_close(usbd_pipe_handle pipe)
2191 1.1 augustss {
2192 1.1 augustss }
2193 1.1 augustss
2194 1.1 augustss /* Abort a device interrupt request. */
2195 1.1 augustss void
2196 1.119 augustss uhci_device_intr_abort(usbd_xfer_handle xfer)
2197 1.1 augustss {
2198 1.63 augustss DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer));
2199 1.63 augustss if (xfer->pipe->intrxfer == xfer) {
2200 1.36 augustss DPRINTFN(1,("uhci_device_intr_abort: remove\n"));
2201 1.154 augustss xfer->pipe->intrxfer = NULL;
2202 1.1 augustss }
2203 1.66 augustss uhci_abort_xfer(xfer, USBD_CANCELLED);
2204 1.1 augustss }
2205 1.1 augustss
2206 1.1 augustss /* Close a device interrupt pipe. */
2207 1.1 augustss void
2208 1.119 augustss uhci_device_intr_close(usbd_pipe_handle pipe)
2209 1.1 augustss {
2210 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2211 1.216 drochner uhci_softc_t *sc = pipe->device->bus->hci_private;
2212 1.92 augustss int i, npoll;
2213 1.92 augustss int s;
2214 1.1 augustss
2215 1.1 augustss /* Unlink descriptors from controller data structures. */
2216 1.1 augustss npoll = upipe->u.intr.npoll;
2217 1.92 augustss s = splusb();
2218 1.1 augustss for (i = 0; i < npoll; i++)
2219 1.92 augustss uhci_remove_intr(sc, upipe->u.intr.qhs[i]);
2220 1.92 augustss splx(s);
2221 1.1 augustss
2222 1.152 augustss /*
2223 1.1 augustss * We now have to wait for any activity on the physical
2224 1.1 augustss * descriptors to stop.
2225 1.1 augustss */
2226 1.20 augustss usb_delay_ms(&sc->sc_bus, 2);
2227 1.1 augustss
2228 1.1 augustss for(i = 0; i < npoll; i++)
2229 1.1 augustss uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
2230 1.31 augustss free(upipe->u.intr.qhs, M_USBHC);
2231 1.1 augustss
2232 1.1 augustss /* XXX free other resources */
2233 1.1 augustss }
2234 1.1 augustss
2235 1.1 augustss usbd_status
2236 1.119 augustss uhci_device_request(usbd_xfer_handle xfer)
2237 1.1 augustss {
2238 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2239 1.63 augustss usb_device_request_t *req = &xfer->request;
2240 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
2241 1.216 drochner uhci_softc_t *sc = dev->bus->hci_private;
2242 1.1 augustss int addr = dev->address;
2243 1.1 augustss int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2244 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2245 1.55 augustss uhci_soft_td_t *setup, *data, *stat, *next, *dataend;
2246 1.1 augustss uhci_soft_qh_t *sqh;
2247 1.1 augustss int len;
2248 1.1 augustss u_int32_t ls;
2249 1.63 augustss usbd_status err;
2250 1.1 augustss int isread;
2251 1.1 augustss int s;
2252 1.1 augustss
2253 1.13 augustss DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
2254 1.12 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
2255 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
2256 1.1 augustss UGETW(req->wIndex), UGETW(req->wLength),
2257 1.1 augustss addr, endpt));
2258 1.1 augustss
2259 1.144 augustss ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0;
2260 1.1 augustss isread = req->bmRequestType & UT_READ;
2261 1.1 augustss len = UGETW(req->wLength);
2262 1.1 augustss
2263 1.1 augustss setup = upipe->u.ctl.setup;
2264 1.1 augustss stat = upipe->u.ctl.stat;
2265 1.1 augustss sqh = upipe->u.ctl.sqh;
2266 1.1 augustss
2267 1.1 augustss /* Set up data transaction */
2268 1.1 augustss if (len != 0) {
2269 1.38 augustss upipe->nexttoggle = 1;
2270 1.73 augustss err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
2271 1.73 augustss &xfer->dmabuf, &data, &dataend);
2272 1.63 augustss if (err)
2273 1.63 augustss return (err);
2274 1.55 augustss next = data;
2275 1.55 augustss dataend->link.std = stat;
2276 1.121 augustss dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
2277 1.1 augustss } else {
2278 1.1 augustss next = stat;
2279 1.1 augustss }
2280 1.1 augustss upipe->u.ctl.length = len;
2281 1.1 augustss
2282 1.159 augustss memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req);
2283 1.1 augustss
2284 1.42 augustss setup->link.std = next;
2285 1.121 augustss setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
2286 1.88 tsutsui setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
2287 1.88 tsutsui UHCI_TD_ACTIVE);
2288 1.88 tsutsui setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr));
2289 1.160 augustss setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0));
2290 1.42 augustss
2291 1.92 augustss stat->link.std = NULL;
2292 1.88 tsutsui stat->td.td_link = htole32(UHCI_PTR_T);
2293 1.152 augustss stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
2294 1.39 augustss UHCI_TD_ACTIVE | UHCI_TD_IOC);
2295 1.152 augustss stat->td.td_token =
2296 1.88 tsutsui htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
2297 1.88 tsutsui UHCI_TD_IN (0, endpt, addr, 1));
2298 1.88 tsutsui stat->td.td_buffer = htole32(0);
2299 1.1 augustss
2300 1.59 augustss #ifdef UHCI_DEBUG
2301 1.67 augustss if (uhcidebug > 10) {
2302 1.47 augustss DPRINTF(("uhci_device_request: before transfer\n"));
2303 1.41 augustss uhci_dump_tds(setup);
2304 1.1 augustss }
2305 1.1 augustss #endif
2306 1.1 augustss
2307 1.1 augustss /* Set up interrupt info. */
2308 1.63 augustss ii->xfer = xfer;
2309 1.1 augustss ii->stdstart = setup;
2310 1.1 augustss ii->stdend = stat;
2311 1.7 augustss #ifdef DIAGNOSTIC
2312 1.70 augustss if (!ii->isdone) {
2313 1.70 augustss printf("uhci_device_request: not done, ii=%p\n", ii);
2314 1.70 augustss }
2315 1.7 augustss ii->isdone = 0;
2316 1.7 augustss #endif
2317 1.1 augustss
2318 1.42 augustss sqh->elink = setup;
2319 1.121 augustss sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD);
2320 1.1 augustss
2321 1.1 augustss s = splusb();
2322 1.144 augustss if (dev->speed == USB_SPEED_LOW)
2323 1.123 augustss uhci_add_ls_ctrl(sc, sqh);
2324 1.123 augustss else
2325 1.123 augustss uhci_add_hs_ctrl(sc, sqh);
2326 1.92 augustss uhci_add_intr_info(sc, ii);
2327 1.59 augustss #ifdef UHCI_DEBUG
2328 1.1 augustss if (uhcidebug > 12) {
2329 1.1 augustss uhci_soft_td_t *std;
2330 1.1 augustss uhci_soft_qh_t *xqh;
2331 1.13 augustss uhci_soft_qh_t *sxqh;
2332 1.13 augustss int maxqh = 0;
2333 1.1 augustss uhci_physaddr_t link;
2334 1.47 augustss DPRINTF(("uhci_enter_ctl_q: follow from [0]\n"));
2335 1.1 augustss for (std = sc->sc_vframes[0].htd, link = 0;
2336 1.121 augustss (link & UHCI_PTR_QH) == 0;
2337 1.42 augustss std = std->link.std) {
2338 1.88 tsutsui link = le32toh(std->td.td_link);
2339 1.1 augustss uhci_dump_td(std);
2340 1.1 augustss }
2341 1.67 augustss sxqh = (uhci_soft_qh_t *)std;
2342 1.67 augustss uhci_dump_qh(sxqh);
2343 1.67 augustss for (xqh = sxqh;
2344 1.63 augustss xqh != NULL;
2345 1.152 augustss xqh = (maxqh++ == 5 || xqh->hlink == sxqh ||
2346 1.121 augustss xqh->hlink == xqh ? NULL : xqh->hlink)) {
2347 1.1 augustss uhci_dump_qh(xqh);
2348 1.13 augustss }
2349 1.47 augustss DPRINTF(("Enqueued QH:\n"));
2350 1.1 augustss uhci_dump_qh(sqh);
2351 1.42 augustss uhci_dump_tds(sqh->elink);
2352 1.1 augustss }
2353 1.1 augustss #endif
2354 1.63 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
2355 1.171 tsutsui usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
2356 1.91 augustss uhci_timeout, ii);
2357 1.13 augustss }
2358 1.92 augustss xfer->status = USBD_IN_PROGRESS;
2359 1.1 augustss splx(s);
2360 1.1 augustss
2361 1.1 augustss return (USBD_NORMAL_COMPLETION);
2362 1.1 augustss }
2363 1.1 augustss
2364 1.16 augustss usbd_status
2365 1.119 augustss uhci_device_isoc_transfer(usbd_xfer_handle xfer)
2366 1.16 augustss {
2367 1.63 augustss usbd_status err;
2368 1.48 augustss
2369 1.63 augustss DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer));
2370 1.48 augustss
2371 1.48 augustss /* Put it on our queue, */
2372 1.63 augustss err = usb_insert_transfer(xfer);
2373 1.48 augustss
2374 1.48 augustss /* bail out on error, */
2375 1.63 augustss if (err && err != USBD_IN_PROGRESS)
2376 1.63 augustss return (err);
2377 1.48 augustss
2378 1.48 augustss /* XXX should check inuse here */
2379 1.48 augustss
2380 1.48 augustss /* insert into schedule, */
2381 1.63 augustss uhci_device_isoc_enter(xfer);
2382 1.48 augustss
2383 1.102 augustss /* and start if the pipe wasn't running */
2384 1.67 augustss if (!err)
2385 1.63 augustss uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
2386 1.48 augustss
2387 1.63 augustss return (err);
2388 1.48 augustss }
2389 1.48 augustss
2390 1.48 augustss void
2391 1.119 augustss uhci_device_isoc_enter(usbd_xfer_handle xfer)
2392 1.48 augustss {
2393 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2394 1.16 augustss usbd_device_handle dev = upipe->pipe.device;
2395 1.216 drochner uhci_softc_t *sc = dev->bus->hci_private;
2396 1.48 augustss struct iso *iso = &upipe->u.iso;
2397 1.152 augustss uhci_soft_td_t *std;
2398 1.48 augustss u_int32_t buf, len, status;
2399 1.48 augustss int s, i, next, nframes;
2400 1.48 augustss
2401 1.63 augustss DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p "
2402 1.48 augustss "nframes=%d\n",
2403 1.63 augustss iso->inuse, iso->next, xfer, xfer->nframes));
2404 1.48 augustss
2405 1.82 augustss if (sc->sc_dying)
2406 1.82 augustss return;
2407 1.82 augustss
2408 1.63 augustss if (xfer->status == USBD_IN_PROGRESS) {
2409 1.48 augustss /* This request has already been entered into the frame list */
2410 1.96 augustss printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer);
2411 1.68 augustss /* XXX */
2412 1.48 augustss }
2413 1.48 augustss
2414 1.48 augustss #ifdef DIAGNOSTIC
2415 1.48 augustss if (iso->inuse >= UHCI_VFRAMELIST_COUNT)
2416 1.48 augustss printf("uhci_device_isoc_enter: overflow!\n");
2417 1.19 augustss #endif
2418 1.16 augustss
2419 1.48 augustss next = iso->next;
2420 1.48 augustss if (next == -1) {
2421 1.48 augustss /* Not in use yet, schedule it a few frames ahead. */
2422 1.48 augustss next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
2423 1.48 augustss DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next));
2424 1.48 augustss }
2425 1.48 augustss
2426 1.63 augustss xfer->status = USBD_IN_PROGRESS;
2427 1.92 augustss UXFER(xfer)->curframe = next;
2428 1.48 augustss
2429 1.160 augustss buf = DMAADDR(&xfer->dmabuf, 0);
2430 1.88 tsutsui status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |
2431 1.88 tsutsui UHCI_TD_ACTIVE |
2432 1.88 tsutsui UHCI_TD_IOS);
2433 1.63 augustss nframes = xfer->nframes;
2434 1.48 augustss s = splusb();
2435 1.48 augustss for (i = 0; i < nframes; i++) {
2436 1.48 augustss std = iso->stds[next];
2437 1.48 augustss if (++next >= UHCI_VFRAMELIST_COUNT)
2438 1.48 augustss next = 0;
2439 1.63 augustss len = xfer->frlengths[i];
2440 1.88 tsutsui std->td.td_buffer = htole32(buf);
2441 1.48 augustss if (i == nframes - 1)
2442 1.88 tsutsui status |= UHCI_TD_IOC;
2443 1.88 tsutsui std->td.td_status = htole32(status);
2444 1.88 tsutsui std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK);
2445 1.88 tsutsui std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len));
2446 1.59 augustss #ifdef UHCI_DEBUG
2447 1.48 augustss if (uhcidebug > 5) {
2448 1.48 augustss DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i));
2449 1.48 augustss uhci_dump_td(std);
2450 1.48 augustss }
2451 1.48 augustss #endif
2452 1.48 augustss buf += len;
2453 1.48 augustss }
2454 1.48 augustss iso->next = next;
2455 1.63 augustss iso->inuse += xfer->nframes;
2456 1.16 augustss
2457 1.48 augustss splx(s);
2458 1.16 augustss }
2459 1.16 augustss
2460 1.16 augustss usbd_status
2461 1.119 augustss uhci_device_isoc_start(usbd_xfer_handle xfer)
2462 1.16 augustss {
2463 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2464 1.216 drochner uhci_softc_t *sc = upipe->pipe.device->bus->hci_private;
2465 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2466 1.48 augustss uhci_soft_td_t *end;
2467 1.48 augustss int s, i;
2468 1.48 augustss
2469 1.96 augustss DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer));
2470 1.96 augustss
2471 1.82 augustss if (sc->sc_dying)
2472 1.82 augustss return (USBD_IOERROR);
2473 1.82 augustss
2474 1.48 augustss #ifdef DIAGNOSTIC
2475 1.63 augustss if (xfer->status != USBD_IN_PROGRESS)
2476 1.63 augustss printf("uhci_device_isoc_start: not in progress %p\n", xfer);
2477 1.48 augustss #endif
2478 1.48 augustss
2479 1.48 augustss /* Find the last TD */
2480 1.92 augustss i = UXFER(xfer)->curframe + xfer->nframes;
2481 1.48 augustss if (i >= UHCI_VFRAMELIST_COUNT)
2482 1.48 augustss i -= UHCI_VFRAMELIST_COUNT;
2483 1.48 augustss end = upipe->u.iso.stds[i];
2484 1.48 augustss
2485 1.96 augustss #ifdef DIAGNOSTIC
2486 1.96 augustss if (end == NULL) {
2487 1.96 augustss printf("uhci_device_isoc_start: end == NULL\n");
2488 1.96 augustss return (USBD_INVAL);
2489 1.96 augustss }
2490 1.96 augustss #endif
2491 1.96 augustss
2492 1.48 augustss s = splusb();
2493 1.152 augustss
2494 1.48 augustss /* Set up interrupt info. */
2495 1.63 augustss ii->xfer = xfer;
2496 1.48 augustss ii->stdstart = end;
2497 1.48 augustss ii->stdend = end;
2498 1.48 augustss #ifdef DIAGNOSTIC
2499 1.102 augustss if (!ii->isdone)
2500 1.70 augustss printf("uhci_device_isoc_start: not done, ii=%p\n", ii);
2501 1.48 augustss ii->isdone = 0;
2502 1.48 augustss #endif
2503 1.92 augustss uhci_add_intr_info(sc, ii);
2504 1.152 augustss
2505 1.48 augustss splx(s);
2506 1.48 augustss
2507 1.48 augustss return (USBD_IN_PROGRESS);
2508 1.16 augustss }
2509 1.16 augustss
2510 1.16 augustss void
2511 1.119 augustss uhci_device_isoc_abort(usbd_xfer_handle xfer)
2512 1.16 augustss {
2513 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2514 1.48 augustss uhci_soft_td_t **stds = upipe->u.iso.stds;
2515 1.48 augustss uhci_soft_td_t *std;
2516 1.92 augustss int i, n, s, nframes, maxlen, len;
2517 1.92 augustss
2518 1.92 augustss s = splusb();
2519 1.92 augustss
2520 1.92 augustss /* Transfer is already done. */
2521 1.152 augustss if (xfer->status != USBD_NOT_STARTED &&
2522 1.92 augustss xfer->status != USBD_IN_PROGRESS) {
2523 1.92 augustss splx(s);
2524 1.92 augustss return;
2525 1.92 augustss }
2526 1.48 augustss
2527 1.92 augustss /* Give xfer the requested abort code. */
2528 1.63 augustss xfer->status = USBD_CANCELLED;
2529 1.48 augustss
2530 1.48 augustss /* make hardware ignore it, */
2531 1.63 augustss nframes = xfer->nframes;
2532 1.92 augustss n = UXFER(xfer)->curframe;
2533 1.92 augustss maxlen = 0;
2534 1.48 augustss for (i = 0; i < nframes; i++) {
2535 1.48 augustss std = stds[n];
2536 1.88 tsutsui std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
2537 1.130 tsutsui len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token));
2538 1.92 augustss if (len > maxlen)
2539 1.92 augustss maxlen = len;
2540 1.48 augustss if (++n >= UHCI_VFRAMELIST_COUNT)
2541 1.48 augustss n = 0;
2542 1.48 augustss }
2543 1.48 augustss
2544 1.92 augustss /* and wait until we are sure the hardware has finished. */
2545 1.92 augustss delay(maxlen);
2546 1.92 augustss
2547 1.96 augustss #ifdef DIAGNOSTIC
2548 1.96 augustss UXFER(xfer)->iinfo.isdone = 1;
2549 1.96 augustss #endif
2550 1.92 augustss /* Run callback and remove from interrupt list. */
2551 1.92 augustss usb_transfer_complete(xfer);
2552 1.48 augustss
2553 1.92 augustss splx(s);
2554 1.16 augustss }
2555 1.16 augustss
2556 1.16 augustss void
2557 1.119 augustss uhci_device_isoc_close(usbd_pipe_handle pipe)
2558 1.16 augustss {
2559 1.16 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2560 1.16 augustss usbd_device_handle dev = upipe->pipe.device;
2561 1.216 drochner uhci_softc_t *sc = dev->bus->hci_private;
2562 1.48 augustss uhci_soft_td_t *std, *vstd;
2563 1.16 augustss struct iso *iso;
2564 1.92 augustss int i, s;
2565 1.16 augustss
2566 1.16 augustss /*
2567 1.16 augustss * Make sure all TDs are marked as inactive.
2568 1.16 augustss * Wait for completion.
2569 1.16 augustss * Unschedule.
2570 1.16 augustss * Deallocate.
2571 1.16 augustss */
2572 1.16 augustss iso = &upipe->u.iso;
2573 1.16 augustss
2574 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++)
2575 1.88 tsutsui iso->stds[i]->td.td_status &= htole32(~UHCI_TD_ACTIVE);
2576 1.20 augustss usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */
2577 1.16 augustss
2578 1.92 augustss s = splusb();
2579 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2580 1.16 augustss std = iso->stds[i];
2581 1.48 augustss for (vstd = sc->sc_vframes[i].htd;
2582 1.67 augustss vstd != NULL && vstd->link.std != std;
2583 1.42 augustss vstd = vstd->link.std)
2584 1.16 augustss ;
2585 1.67 augustss if (vstd == NULL) {
2586 1.16 augustss /*panic*/
2587 1.16 augustss printf("uhci_device_isoc_close: %p not found\n", std);
2588 1.92 augustss splx(s);
2589 1.16 augustss return;
2590 1.16 augustss }
2591 1.42 augustss vstd->link = std->link;
2592 1.42 augustss vstd->td.td_link = std->td.td_link;
2593 1.16 augustss uhci_free_std(sc, std);
2594 1.16 augustss }
2595 1.92 augustss splx(s);
2596 1.16 augustss
2597 1.31 augustss free(iso->stds, M_USBHC);
2598 1.16 augustss }
2599 1.16 augustss
2600 1.16 augustss usbd_status
2601 1.119 augustss uhci_setup_isoc(usbd_pipe_handle pipe)
2602 1.16 augustss {
2603 1.16 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2604 1.16 augustss usbd_device_handle dev = upipe->pipe.device;
2605 1.216 drochner uhci_softc_t *sc = dev->bus->hci_private;
2606 1.16 augustss int addr = upipe->pipe.device->address;
2607 1.16 augustss int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2608 1.45 augustss int rd = UE_GET_DIR(endpt) == UE_DIR_IN;
2609 1.48 augustss uhci_soft_td_t *std, *vstd;
2610 1.48 augustss u_int32_t token;
2611 1.16 augustss struct iso *iso;
2612 1.92 augustss int i, s;
2613 1.16 augustss
2614 1.16 augustss iso = &upipe->u.iso;
2615 1.16 augustss iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *),
2616 1.31 augustss M_USBHC, M_WAITOK);
2617 1.16 augustss
2618 1.88 tsutsui token = rd ? UHCI_TD_IN (0, endpt, addr, 0) :
2619 1.88 tsutsui UHCI_TD_OUT(0, endpt, addr, 0);
2620 1.16 augustss
2621 1.48 augustss /* Allocate the TDs and mark as inactive; */
2622 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2623 1.48 augustss std = uhci_alloc_std(sc);
2624 1.48 augustss if (std == 0)
2625 1.48 augustss goto bad;
2626 1.88 tsutsui std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
2627 1.88 tsutsui std->td.td_token = htole32(token);
2628 1.48 augustss iso->stds[i] = std;
2629 1.16 augustss }
2630 1.16 augustss
2631 1.48 augustss /* Insert TDs into schedule. */
2632 1.92 augustss s = splusb();
2633 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2634 1.16 augustss std = iso->stds[i];
2635 1.48 augustss vstd = sc->sc_vframes[i].htd;
2636 1.42 augustss std->link = vstd->link;
2637 1.42 augustss std->td.td_link = vstd->td.td_link;
2638 1.42 augustss vstd->link.std = std;
2639 1.121 augustss vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD);
2640 1.16 augustss }
2641 1.92 augustss splx(s);
2642 1.16 augustss
2643 1.48 augustss iso->next = -1;
2644 1.48 augustss iso->inuse = 0;
2645 1.48 augustss
2646 1.16 augustss return (USBD_NORMAL_COMPLETION);
2647 1.16 augustss
2648 1.48 augustss bad:
2649 1.16 augustss while (--i >= 0)
2650 1.16 augustss uhci_free_std(sc, iso->stds[i]);
2651 1.31 augustss free(iso->stds, M_USBHC);
2652 1.16 augustss return (USBD_NOMEM);
2653 1.16 augustss }
2654 1.16 augustss
2655 1.16 augustss void
2656 1.119 augustss uhci_device_isoc_done(usbd_xfer_handle xfer)
2657 1.16 augustss {
2658 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2659 1.48 augustss
2660 1.197 gdamore DPRINTFN(4, ("uhci_isoc_done: length=%d, busy_free=0x%08x\n",
2661 1.197 gdamore xfer->actlen, xfer->busy_free));
2662 1.93 augustss
2663 1.96 augustss if (ii->xfer != xfer)
2664 1.96 augustss /* Not on interrupt list, ignore it. */
2665 1.170 augustss return;
2666 1.170 augustss
2667 1.170 augustss if (!uhci_active_intr_info(ii))
2668 1.96 augustss return;
2669 1.96 augustss
2670 1.93 augustss #ifdef DIAGNOSTIC
2671 1.93 augustss if (ii->stdend == NULL) {
2672 1.93 augustss printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
2673 1.93 augustss #ifdef UHCI_DEBUG
2674 1.93 augustss uhci_dump_ii(ii);
2675 1.93 augustss #endif
2676 1.93 augustss return;
2677 1.93 augustss }
2678 1.93 augustss #endif
2679 1.48 augustss
2680 1.48 augustss /* Turn off the interrupt since it is active even if the TD is not. */
2681 1.88 tsutsui ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC);
2682 1.48 augustss
2683 1.92 augustss uhci_del_intr_info(ii); /* remove from active list */
2684 1.16 augustss }
2685 1.16 augustss
2686 1.1 augustss void
2687 1.119 augustss uhci_device_intr_done(usbd_xfer_handle xfer)
2688 1.1 augustss {
2689 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2690 1.1 augustss uhci_softc_t *sc = ii->sc;
2691 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2692 1.1 augustss uhci_soft_qh_t *sqh;
2693 1.1 augustss int i, npoll;
2694 1.1 augustss
2695 1.173 gson DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen));
2696 1.1 augustss
2697 1.1 augustss npoll = upipe->u.intr.npoll;
2698 1.1 augustss for(i = 0; i < npoll; i++) {
2699 1.1 augustss sqh = upipe->u.intr.qhs[i];
2700 1.121 augustss sqh->elink = NULL;
2701 1.88 tsutsui sqh->qh.qh_elink = htole32(UHCI_PTR_T);
2702 1.1 augustss }
2703 1.149 augustss uhci_free_std_chain(sc, ii->stdstart, NULL);
2704 1.1 augustss
2705 1.1 augustss /* XXX Wasteful. */
2706 1.63 augustss if (xfer->pipe->repeat) {
2707 1.55 augustss uhci_soft_td_t *data, *dataend;
2708 1.1 augustss
2709 1.92 augustss DPRINTFN(5,("uhci_device_intr_done: requeing\n"));
2710 1.92 augustss
2711 1.1 augustss /* This alloc cannot fail since we freed the chain above. */
2712 1.73 augustss uhci_alloc_std_chain(upipe, sc, xfer->length, 1, xfer->flags,
2713 1.63 augustss &xfer->dmabuf, &data, &dataend);
2714 1.88 tsutsui dataend->td.td_status |= htole32(UHCI_TD_IOC);
2715 1.1 augustss
2716 1.59 augustss #ifdef UHCI_DEBUG
2717 1.1 augustss if (uhcidebug > 10) {
2718 1.55 augustss DPRINTF(("uhci_device_intr_done: data(1)\n"));
2719 1.55 augustss uhci_dump_tds(data);
2720 1.1 augustss uhci_dump_qh(upipe->u.intr.qhs[0]);
2721 1.1 augustss }
2722 1.1 augustss #endif
2723 1.1 augustss
2724 1.55 augustss ii->stdstart = data;
2725 1.55 augustss ii->stdend = dataend;
2726 1.7 augustss #ifdef DIAGNOSTIC
2727 1.70 augustss if (!ii->isdone) {
2728 1.70 augustss printf("uhci_device_intr_done: not done, ii=%p\n", ii);
2729 1.70 augustss }
2730 1.7 augustss ii->isdone = 0;
2731 1.7 augustss #endif
2732 1.1 augustss for (i = 0; i < npoll; i++) {
2733 1.1 augustss sqh = upipe->u.intr.qhs[i];
2734 1.55 augustss sqh->elink = data;
2735 1.121 augustss sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
2736 1.1 augustss }
2737 1.92 augustss xfer->status = USBD_IN_PROGRESS;
2738 1.92 augustss /* The ii is already on the examined list, just leave it. */
2739 1.1 augustss } else {
2740 1.92 augustss DPRINTFN(5,("uhci_device_intr_done: removing\n"));
2741 1.169 augustss if (uhci_active_intr_info(ii))
2742 1.169 augustss uhci_del_intr_info(ii);
2743 1.1 augustss }
2744 1.1 augustss }
2745 1.1 augustss
2746 1.1 augustss /* Deallocate request data structures */
2747 1.1 augustss void
2748 1.119 augustss uhci_device_ctrl_done(usbd_xfer_handle xfer)
2749 1.1 augustss {
2750 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2751 1.1 augustss uhci_softc_t *sc = ii->sc;
2752 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2753 1.1 augustss
2754 1.7 augustss #ifdef DIAGNOSTIC
2755 1.63 augustss if (!(xfer->rqflags & URQ_REQUEST))
2756 1.173 gson panic("uhci_device_ctrl_done: not a request");
2757 1.7 augustss #endif
2758 1.1 augustss
2759 1.169 augustss if (!uhci_active_intr_info(ii))
2760 1.169 augustss return;
2761 1.169 augustss
2762 1.92 augustss uhci_del_intr_info(ii); /* remove from active list */
2763 1.1 augustss
2764 1.144 augustss if (upipe->pipe.device->speed == USB_SPEED_LOW)
2765 1.123 augustss uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh);
2766 1.123 augustss else
2767 1.123 augustss uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh);
2768 1.1 augustss
2769 1.49 augustss if (upipe->u.ctl.length != 0)
2770 1.42 augustss uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend);
2771 1.49 augustss
2772 1.173 gson DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen));
2773 1.1 augustss }
2774 1.1 augustss
2775 1.1 augustss /* Deallocate request data structures */
2776 1.1 augustss void
2777 1.119 augustss uhci_device_bulk_done(usbd_xfer_handle xfer)
2778 1.1 augustss {
2779 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2780 1.1 augustss uhci_softc_t *sc = ii->sc;
2781 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2782 1.169 augustss
2783 1.173 gson DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n",
2784 1.169 augustss xfer, ii, sc, upipe));
2785 1.169 augustss
2786 1.169 augustss if (!uhci_active_intr_info(ii))
2787 1.169 augustss return;
2788 1.1 augustss
2789 1.92 augustss uhci_del_intr_info(ii); /* remove from active list */
2790 1.1 augustss
2791 1.1 augustss uhci_remove_bulk(sc, upipe->u.bulk.sqh);
2792 1.32 augustss
2793 1.149 augustss uhci_free_std_chain(sc, ii->stdstart, NULL);
2794 1.32 augustss
2795 1.173 gson DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen));
2796 1.1 augustss }
2797 1.1 augustss
2798 1.1 augustss /* Add interrupt QH, called with vflock. */
2799 1.1 augustss void
2800 1.119 augustss uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
2801 1.1 augustss {
2802 1.92 augustss struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
2803 1.42 augustss uhci_soft_qh_t *eqh;
2804 1.1 augustss
2805 1.92 augustss DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh));
2806 1.92 augustss
2807 1.42 augustss eqh = vf->eqh;
2808 1.42 augustss sqh->hlink = eqh->hlink;
2809 1.42 augustss sqh->qh.qh_hlink = eqh->qh.qh_hlink;
2810 1.42 augustss eqh->hlink = sqh;
2811 1.121 augustss eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
2812 1.1 augustss vf->eqh = sqh;
2813 1.1 augustss vf->bandwidth++;
2814 1.1 augustss }
2815 1.1 augustss
2816 1.119 augustss /* Remove interrupt QH. */
2817 1.1 augustss void
2818 1.119 augustss uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
2819 1.1 augustss {
2820 1.92 augustss struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
2821 1.1 augustss uhci_soft_qh_t *pqh;
2822 1.1 augustss
2823 1.92 augustss DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh));
2824 1.1 augustss
2825 1.124 augustss /* See comment in uhci_remove_ctrl() */
2826 1.124 augustss if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
2827 1.124 augustss sqh->qh.qh_elink = htole32(UHCI_PTR_T);
2828 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
2829 1.124 augustss }
2830 1.124 augustss
2831 1.92 augustss pqh = uhci_find_prev_qh(vf->hqh, sqh);
2832 1.42 augustss pqh->hlink = sqh->hlink;
2833 1.42 augustss pqh->qh.qh_hlink = sqh->qh.qh_hlink;
2834 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
2835 1.1 augustss if (vf->eqh == sqh)
2836 1.1 augustss vf->eqh = pqh;
2837 1.1 augustss vf->bandwidth--;
2838 1.1 augustss }
2839 1.1 augustss
2840 1.1 augustss usbd_status
2841 1.119 augustss uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival)
2842 1.1 augustss {
2843 1.1 augustss uhci_soft_qh_t *sqh;
2844 1.1 augustss int i, npoll, s;
2845 1.1 augustss u_int bestbw, bw, bestoffs, offs;
2846 1.1 augustss
2847 1.173 gson DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe));
2848 1.1 augustss if (ival == 0) {
2849 1.173 gson printf("uhci_device_setintr: 0 interval\n");
2850 1.1 augustss return (USBD_INVAL);
2851 1.1 augustss }
2852 1.1 augustss
2853 1.1 augustss if (ival > UHCI_VFRAMELIST_COUNT)
2854 1.1 augustss ival = UHCI_VFRAMELIST_COUNT;
2855 1.1 augustss npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
2856 1.173 gson DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll));
2857 1.1 augustss
2858 1.1 augustss upipe->u.intr.npoll = npoll;
2859 1.152 augustss upipe->u.intr.qhs =
2860 1.31 augustss malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK);
2861 1.1 augustss
2862 1.152 augustss /*
2863 1.1 augustss * Figure out which offset in the schedule that has most
2864 1.1 augustss * bandwidth left over.
2865 1.1 augustss */
2866 1.1 augustss #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
2867 1.1 augustss for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
2868 1.1 augustss for (bw = i = 0; i < npoll; i++)
2869 1.1 augustss bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
2870 1.1 augustss if (bw < bestbw) {
2871 1.1 augustss bestbw = bw;
2872 1.1 augustss bestoffs = offs;
2873 1.1 augustss }
2874 1.1 augustss }
2875 1.173 gson DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
2876 1.1 augustss
2877 1.1 augustss for(i = 0; i < npoll; i++) {
2878 1.1 augustss upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
2879 1.121 augustss sqh->elink = NULL;
2880 1.88 tsutsui sqh->qh.qh_elink = htole32(UHCI_PTR_T);
2881 1.1 augustss sqh->pos = MOD(i * ival + bestoffs);
2882 1.1 augustss }
2883 1.1 augustss #undef MOD
2884 1.1 augustss
2885 1.1 augustss s = splusb();
2886 1.1 augustss /* Enter QHs into the controller data structures. */
2887 1.1 augustss for(i = 0; i < npoll; i++)
2888 1.92 augustss uhci_add_intr(sc, upipe->u.intr.qhs[i]);
2889 1.92 augustss splx(s);
2890 1.1 augustss
2891 1.173 gson DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe));
2892 1.1 augustss return (USBD_NORMAL_COMPLETION);
2893 1.1 augustss }
2894 1.1 augustss
2895 1.1 augustss /* Open a new pipe. */
2896 1.1 augustss usbd_status
2897 1.119 augustss uhci_open(usbd_pipe_handle pipe)
2898 1.1 augustss {
2899 1.216 drochner uhci_softc_t *sc = pipe->device->bus->hci_private;
2900 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2901 1.1 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2902 1.63 augustss usbd_status err;
2903 1.79 augustss int ival;
2904 1.1 augustss
2905 1.1 augustss DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2906 1.152 augustss pipe, pipe->device->address,
2907 1.1 augustss ed->bEndpointAddress, sc->sc_addr));
2908 1.92 augustss
2909 1.92 augustss upipe->aborting = 0;
2910 1.92 augustss upipe->nexttoggle = 0;
2911 1.92 augustss
2912 1.1 augustss if (pipe->device->address == sc->sc_addr) {
2913 1.1 augustss switch (ed->bEndpointAddress) {
2914 1.1 augustss case USB_CONTROL_ENDPOINT:
2915 1.1 augustss pipe->methods = &uhci_root_ctrl_methods;
2916 1.1 augustss break;
2917 1.45 augustss case UE_DIR_IN | UHCI_INTR_ENDPT:
2918 1.1 augustss pipe->methods = &uhci_root_intr_methods;
2919 1.1 augustss break;
2920 1.1 augustss default:
2921 1.1 augustss return (USBD_INVAL);
2922 1.1 augustss }
2923 1.1 augustss } else {
2924 1.1 augustss switch (ed->bmAttributes & UE_XFERTYPE) {
2925 1.1 augustss case UE_CONTROL:
2926 1.1 augustss pipe->methods = &uhci_device_ctrl_methods;
2927 1.1 augustss upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
2928 1.63 augustss if (upipe->u.ctl.sqh == NULL)
2929 1.5 augustss goto bad;
2930 1.1 augustss upipe->u.ctl.setup = uhci_alloc_std(sc);
2931 1.63 augustss if (upipe->u.ctl.setup == NULL) {
2932 1.5 augustss uhci_free_sqh(sc, upipe->u.ctl.sqh);
2933 1.5 augustss goto bad;
2934 1.5 augustss }
2935 1.1 augustss upipe->u.ctl.stat = uhci_alloc_std(sc);
2936 1.63 augustss if (upipe->u.ctl.stat == NULL) {
2937 1.5 augustss uhci_free_sqh(sc, upipe->u.ctl.sqh);
2938 1.5 augustss uhci_free_std(sc, upipe->u.ctl.setup);
2939 1.5 augustss goto bad;
2940 1.5 augustss }
2941 1.152 augustss err = usb_allocmem(&sc->sc_bus,
2942 1.152 augustss sizeof(usb_device_request_t),
2943 1.63 augustss 0, &upipe->u.ctl.reqdma);
2944 1.63 augustss if (err) {
2945 1.5 augustss uhci_free_sqh(sc, upipe->u.ctl.sqh);
2946 1.5 augustss uhci_free_std(sc, upipe->u.ctl.setup);
2947 1.5 augustss uhci_free_std(sc, upipe->u.ctl.stat);
2948 1.5 augustss goto bad;
2949 1.5 augustss }
2950 1.1 augustss break;
2951 1.1 augustss case UE_INTERRUPT:
2952 1.1 augustss pipe->methods = &uhci_device_intr_methods;
2953 1.79 augustss ival = pipe->interval;
2954 1.79 augustss if (ival == USBD_DEFAULT_INTERVAL)
2955 1.79 augustss ival = ed->bInterval;
2956 1.80 augustss return (uhci_device_setintr(sc, upipe, ival));
2957 1.1 augustss case UE_ISOCHRONOUS:
2958 1.16 augustss pipe->methods = &uhci_device_isoc_methods;
2959 1.48 augustss return (uhci_setup_isoc(pipe));
2960 1.1 augustss case UE_BULK:
2961 1.1 augustss pipe->methods = &uhci_device_bulk_methods;
2962 1.1 augustss upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
2963 1.63 augustss if (upipe->u.bulk.sqh == NULL)
2964 1.5 augustss goto bad;
2965 1.1 augustss break;
2966 1.1 augustss }
2967 1.1 augustss }
2968 1.1 augustss return (USBD_NORMAL_COMPLETION);
2969 1.5 augustss
2970 1.5 augustss bad:
2971 1.5 augustss return (USBD_NOMEM);
2972 1.1 augustss }
2973 1.1 augustss
2974 1.1 augustss /*
2975 1.1 augustss * Data structures and routines to emulate the root hub.
2976 1.1 augustss */
2977 1.1 augustss usb_device_descriptor_t uhci_devd = {
2978 1.1 augustss USB_DEVICE_DESCRIPTOR_SIZE,
2979 1.1 augustss UDESC_DEVICE, /* type */
2980 1.1 augustss {0x00, 0x01}, /* USB version */
2981 1.87 augustss UDCLASS_HUB, /* class */
2982 1.87 augustss UDSUBCLASS_HUB, /* subclass */
2983 1.144 augustss UDPROTO_FSHUB, /* protocol */
2984 1.1 augustss 64, /* max packet */
2985 1.1 augustss {0},{0},{0x00,0x01}, /* device id */
2986 1.1 augustss 1,2,0, /* string indicies */
2987 1.1 augustss 1 /* # of configurations */
2988 1.1 augustss };
2989 1.1 augustss
2990 1.208 drochner const usb_config_descriptor_t uhci_confd = {
2991 1.1 augustss USB_CONFIG_DESCRIPTOR_SIZE,
2992 1.1 augustss UDESC_CONFIG,
2993 1.1 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
2994 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
2995 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
2996 1.1 augustss 1,
2997 1.1 augustss 1,
2998 1.1 augustss 0,
2999 1.206 drochner UC_ATTR_MBO | UC_SELF_POWERED,
3000 1.1 augustss 0 /* max power */
3001 1.1 augustss };
3002 1.1 augustss
3003 1.208 drochner const usb_interface_descriptor_t uhci_ifcd = {
3004 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
3005 1.1 augustss UDESC_INTERFACE,
3006 1.1 augustss 0,
3007 1.1 augustss 0,
3008 1.1 augustss 1,
3009 1.87 augustss UICLASS_HUB,
3010 1.87 augustss UISUBCLASS_HUB,
3011 1.144 augustss UIPROTO_FSHUB,
3012 1.1 augustss 0
3013 1.1 augustss };
3014 1.1 augustss
3015 1.208 drochner const usb_endpoint_descriptor_t uhci_endpd = {
3016 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
3017 1.1 augustss UDESC_ENDPOINT,
3018 1.45 augustss UE_DIR_IN | UHCI_INTR_ENDPT,
3019 1.1 augustss UE_INTERRUPT,
3020 1.1 augustss {8},
3021 1.1 augustss 255
3022 1.1 augustss };
3023 1.1 augustss
3024 1.208 drochner const usb_hub_descriptor_t uhci_hubd_piix = {
3025 1.1 augustss USB_HUB_DESCRIPTOR_SIZE,
3026 1.1 augustss UDESC_HUB,
3027 1.1 augustss 2,
3028 1.1 augustss { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
3029 1.1 augustss 50, /* power on to power good */
3030 1.1 augustss 0,
3031 1.1 augustss { 0x00 }, /* both ports are removable */
3032 1.199 christos { 0 },
3033 1.1 augustss };
3034 1.1 augustss
3035 1.1 augustss /*
3036 1.166 dsainty * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also
3037 1.166 dsainty * enables the port, and also states that SET_FEATURE(PORT_ENABLE)
3038 1.166 dsainty * should not be used by the USB subsystem. As we cannot issue a
3039 1.166 dsainty * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port
3040 1.166 dsainty * will be enabled as part of the reset.
3041 1.166 dsainty *
3042 1.166 dsainty * On the VT83C572, the port cannot be successfully enabled until the
3043 1.166 dsainty * outstanding "port enable change" and "connection status change"
3044 1.166 dsainty * events have been reset.
3045 1.166 dsainty */
3046 1.166 dsainty Static usbd_status
3047 1.166 dsainty uhci_portreset(uhci_softc_t *sc, int index)
3048 1.166 dsainty {
3049 1.166 dsainty int lim, port, x;
3050 1.166 dsainty
3051 1.166 dsainty if (index == 1)
3052 1.166 dsainty port = UHCI_PORTSC1;
3053 1.166 dsainty else if (index == 2)
3054 1.166 dsainty port = UHCI_PORTSC2;
3055 1.166 dsainty else
3056 1.166 dsainty return (USBD_IOERROR);
3057 1.166 dsainty
3058 1.166 dsainty x = URWMASK(UREAD2(sc, port));
3059 1.166 dsainty UWRITE2(sc, port, x | UHCI_PORTSC_PR);
3060 1.166 dsainty
3061 1.166 dsainty usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
3062 1.166 dsainty
3063 1.166 dsainty DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n",
3064 1.166 dsainty index, UREAD2(sc, port)));
3065 1.166 dsainty
3066 1.166 dsainty x = URWMASK(UREAD2(sc, port));
3067 1.166 dsainty UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
3068 1.166 dsainty
3069 1.166 dsainty delay(100);
3070 1.166 dsainty
3071 1.166 dsainty DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n",
3072 1.166 dsainty index, UREAD2(sc, port)));
3073 1.166 dsainty
3074 1.166 dsainty x = URWMASK(UREAD2(sc, port));
3075 1.166 dsainty UWRITE2(sc, port, x | UHCI_PORTSC_PE);
3076 1.166 dsainty
3077 1.166 dsainty for (lim = 10; --lim > 0;) {
3078 1.166 dsainty usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY);
3079 1.166 dsainty
3080 1.166 dsainty x = UREAD2(sc, port);
3081 1.166 dsainty
3082 1.166 dsainty DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n",
3083 1.166 dsainty index, lim, x));
3084 1.166 dsainty
3085 1.166 dsainty if (!(x & UHCI_PORTSC_CCS)) {
3086 1.166 dsainty /*
3087 1.166 dsainty * No device is connected (or was disconnected
3088 1.166 dsainty * during reset). Consider the port reset.
3089 1.166 dsainty * The delay must be long enough to ensure on
3090 1.166 dsainty * the initial iteration that the device
3091 1.166 dsainty * connection will have been registered. 50ms
3092 1.166 dsainty * appears to be sufficient, but 20ms is not.
3093 1.166 dsainty */
3094 1.166 dsainty DPRINTFN(3,("uhci port %d loop %u, device detached\n",
3095 1.166 dsainty index, lim));
3096 1.166 dsainty break;
3097 1.166 dsainty }
3098 1.166 dsainty
3099 1.166 dsainty if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) {
3100 1.166 dsainty /*
3101 1.166 dsainty * Port enabled changed and/or connection
3102 1.166 dsainty * status changed were set. Reset either or
3103 1.166 dsainty * both raised flags (by writing a 1 to that
3104 1.166 dsainty * bit), and wait again for state to settle.
3105 1.166 dsainty */
3106 1.166 dsainty UWRITE2(sc, port, URWMASK(x) |
3107 1.166 dsainty (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)));
3108 1.166 dsainty continue;
3109 1.166 dsainty }
3110 1.166 dsainty
3111 1.166 dsainty if (x & UHCI_PORTSC_PE)
3112 1.166 dsainty /* Port is enabled */
3113 1.166 dsainty break;
3114 1.166 dsainty
3115 1.166 dsainty UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE);
3116 1.166 dsainty }
3117 1.166 dsainty
3118 1.166 dsainty DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n",
3119 1.166 dsainty index, UREAD2(sc, port)));
3120 1.166 dsainty
3121 1.166 dsainty if (lim <= 0) {
3122 1.166 dsainty DPRINTFN(1,("uhci port %d reset timed out\n", index));
3123 1.166 dsainty return (USBD_TIMEOUT);
3124 1.166 dsainty }
3125 1.184 perry
3126 1.166 dsainty sc->sc_isreset = 1;
3127 1.166 dsainty return (USBD_NORMAL_COMPLETION);
3128 1.166 dsainty }
3129 1.166 dsainty
3130 1.166 dsainty /*
3131 1.1 augustss * Simulate a hardware hub by handling all the necessary requests.
3132 1.1 augustss */
3133 1.1 augustss usbd_status
3134 1.119 augustss uhci_root_ctrl_transfer(usbd_xfer_handle xfer)
3135 1.1 augustss {
3136 1.63 augustss usbd_status err;
3137 1.16 augustss
3138 1.52 augustss /* Insert last in queue. */
3139 1.63 augustss err = usb_insert_transfer(xfer);
3140 1.63 augustss if (err)
3141 1.63 augustss return (err);
3142 1.52 augustss
3143 1.152 augustss /*
3144 1.94 augustss * Pipe isn't running (otherwise err would be USBD_INPROG),
3145 1.94 augustss * so start it first.
3146 1.67 augustss */
3147 1.63 augustss return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3148 1.16 augustss }
3149 1.16 augustss
3150 1.16 augustss usbd_status
3151 1.119 augustss uhci_root_ctrl_start(usbd_xfer_handle xfer)
3152 1.16 augustss {
3153 1.216 drochner uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
3154 1.1 augustss usb_device_request_t *req;
3155 1.59 augustss void *buf = NULL;
3156 1.1 augustss int port, x;
3157 1.52 augustss int s, len, value, index, status, change, l, totlen = 0;
3158 1.1 augustss usb_port_status_t ps;
3159 1.63 augustss usbd_status err;
3160 1.1 augustss
3161 1.82 augustss if (sc->sc_dying)
3162 1.82 augustss return (USBD_IOERROR);
3163 1.82 augustss
3164 1.48 augustss #ifdef DIAGNOSTIC
3165 1.63 augustss if (!(xfer->rqflags & URQ_REQUEST))
3166 1.163 provos panic("uhci_root_ctrl_transfer: not a request");
3167 1.48 augustss #endif
3168 1.63 augustss req = &xfer->request;
3169 1.1 augustss
3170 1.152 augustss DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
3171 1.1 augustss req->bmRequestType, req->bRequest));
3172 1.1 augustss
3173 1.1 augustss len = UGETW(req->wLength);
3174 1.1 augustss value = UGETW(req->wValue);
3175 1.1 augustss index = UGETW(req->wIndex);
3176 1.49 augustss
3177 1.49 augustss if (len != 0)
3178 1.159 augustss buf = KERNADDR(&xfer->dmabuf, 0);
3179 1.49 augustss
3180 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
3181 1.1 augustss switch(C(req->bRequest, req->bmRequestType)) {
3182 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
3183 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
3184 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
3185 1.152 augustss /*
3186 1.13 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
3187 1.1 augustss * for the integrated root hub.
3188 1.1 augustss */
3189 1.1 augustss break;
3190 1.1 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
3191 1.1 augustss if (len > 0) {
3192 1.1 augustss *(u_int8_t *)buf = sc->sc_conf;
3193 1.1 augustss totlen = 1;
3194 1.1 augustss }
3195 1.1 augustss break;
3196 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
3197 1.1 augustss DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
3198 1.195 christos if (len == 0)
3199 1.195 christos break;
3200 1.1 augustss switch(value >> 8) {
3201 1.1 augustss case UDESC_DEVICE:
3202 1.1 augustss if ((value & 0xff) != 0) {
3203 1.63 augustss err = USBD_IOERROR;
3204 1.1 augustss goto ret;
3205 1.1 augustss }
3206 1.1 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
3207 1.27 augustss USETW(uhci_devd.idVendor, sc->sc_id_vendor);
3208 1.1 augustss memcpy(buf, &uhci_devd, l);
3209 1.1 augustss break;
3210 1.1 augustss case UDESC_CONFIG:
3211 1.1 augustss if ((value & 0xff) != 0) {
3212 1.63 augustss err = USBD_IOERROR;
3213 1.1 augustss goto ret;
3214 1.1 augustss }
3215 1.1 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
3216 1.1 augustss memcpy(buf, &uhci_confd, l);
3217 1.1 augustss buf = (char *)buf + l;
3218 1.1 augustss len -= l;
3219 1.1 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
3220 1.1 augustss totlen += l;
3221 1.1 augustss memcpy(buf, &uhci_ifcd, l);
3222 1.1 augustss buf = (char *)buf + l;
3223 1.1 augustss len -= l;
3224 1.1 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
3225 1.1 augustss totlen += l;
3226 1.1 augustss memcpy(buf, &uhci_endpd, l);
3227 1.1 augustss break;
3228 1.1 augustss case UDESC_STRING:
3229 1.213 drochner #define sd ((usb_string_descriptor_t *)buf)
3230 1.1 augustss switch (value & 0xff) {
3231 1.182 augustss case 0: /* Language table */
3232 1.213 drochner totlen = usb_makelangtbl(sd, len);
3233 1.182 augustss break;
3234 1.1 augustss case 1: /* Vendor */
3235 1.213 drochner totlen = usb_makestrdesc(sd, len,
3236 1.213 drochner sc->sc_vendor);
3237 1.1 augustss break;
3238 1.1 augustss case 2: /* Product */
3239 1.213 drochner totlen = usb_makestrdesc(sd, len,
3240 1.213 drochner "UHCI root hub");
3241 1.1 augustss break;
3242 1.1 augustss }
3243 1.213 drochner #undef sd
3244 1.1 augustss break;
3245 1.1 augustss default:
3246 1.63 augustss err = USBD_IOERROR;
3247 1.1 augustss goto ret;
3248 1.1 augustss }
3249 1.1 augustss break;
3250 1.1 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
3251 1.1 augustss if (len > 0) {
3252 1.1 augustss *(u_int8_t *)buf = 0;
3253 1.1 augustss totlen = 1;
3254 1.1 augustss }
3255 1.1 augustss break;
3256 1.1 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
3257 1.1 augustss if (len > 1) {
3258 1.1 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
3259 1.1 augustss totlen = 2;
3260 1.1 augustss }
3261 1.1 augustss break;
3262 1.1 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
3263 1.1 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
3264 1.1 augustss if (len > 1) {
3265 1.1 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
3266 1.1 augustss totlen = 2;
3267 1.1 augustss }
3268 1.1 augustss break;
3269 1.1 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
3270 1.1 augustss if (value >= USB_MAX_DEVICES) {
3271 1.63 augustss err = USBD_IOERROR;
3272 1.1 augustss goto ret;
3273 1.1 augustss }
3274 1.1 augustss sc->sc_addr = value;
3275 1.1 augustss break;
3276 1.1 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
3277 1.1 augustss if (value != 0 && value != 1) {
3278 1.63 augustss err = USBD_IOERROR;
3279 1.1 augustss goto ret;
3280 1.1 augustss }
3281 1.1 augustss sc->sc_conf = value;
3282 1.1 augustss break;
3283 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
3284 1.1 augustss break;
3285 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
3286 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
3287 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
3288 1.63 augustss err = USBD_IOERROR;
3289 1.1 augustss goto ret;
3290 1.1 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
3291 1.1 augustss break;
3292 1.1 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
3293 1.1 augustss break;
3294 1.1 augustss /* Hub requests */
3295 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
3296 1.1 augustss break;
3297 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
3298 1.12 augustss DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
3299 1.12 augustss "port=%d feature=%d\n",
3300 1.1 augustss index, value));
3301 1.1 augustss if (index == 1)
3302 1.1 augustss port = UHCI_PORTSC1;
3303 1.1 augustss else if (index == 2)
3304 1.1 augustss port = UHCI_PORTSC2;
3305 1.1 augustss else {
3306 1.63 augustss err = USBD_IOERROR;
3307 1.1 augustss goto ret;
3308 1.1 augustss }
3309 1.1 augustss switch(value) {
3310 1.1 augustss case UHF_PORT_ENABLE:
3311 1.137 augustss x = URWMASK(UREAD2(sc, port));
3312 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
3313 1.1 augustss break;
3314 1.1 augustss case UHF_PORT_SUSPEND:
3315 1.137 augustss x = URWMASK(UREAD2(sc, port));
3316 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
3317 1.1 augustss break;
3318 1.1 augustss case UHF_PORT_RESET:
3319 1.137 augustss x = URWMASK(UREAD2(sc, port));
3320 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
3321 1.1 augustss break;
3322 1.1 augustss case UHF_C_PORT_CONNECTION:
3323 1.137 augustss x = URWMASK(UREAD2(sc, port));
3324 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
3325 1.1 augustss break;
3326 1.1 augustss case UHF_C_PORT_ENABLE:
3327 1.137 augustss x = URWMASK(UREAD2(sc, port));
3328 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
3329 1.1 augustss break;
3330 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
3331 1.137 augustss x = URWMASK(UREAD2(sc, port));
3332 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
3333 1.1 augustss break;
3334 1.1 augustss case UHF_C_PORT_RESET:
3335 1.1 augustss sc->sc_isreset = 0;
3336 1.63 augustss err = USBD_NORMAL_COMPLETION;
3337 1.1 augustss goto ret;
3338 1.1 augustss case UHF_PORT_CONNECTION:
3339 1.1 augustss case UHF_PORT_OVER_CURRENT:
3340 1.1 augustss case UHF_PORT_POWER:
3341 1.1 augustss case UHF_PORT_LOW_SPEED:
3342 1.1 augustss case UHF_C_PORT_SUSPEND:
3343 1.1 augustss default:
3344 1.63 augustss err = USBD_IOERROR;
3345 1.1 augustss goto ret;
3346 1.1 augustss }
3347 1.1 augustss break;
3348 1.1 augustss case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
3349 1.1 augustss if (index == 1)
3350 1.1 augustss port = UHCI_PORTSC1;
3351 1.1 augustss else if (index == 2)
3352 1.1 augustss port = UHCI_PORTSC2;
3353 1.1 augustss else {
3354 1.63 augustss err = USBD_IOERROR;
3355 1.1 augustss goto ret;
3356 1.1 augustss }
3357 1.1 augustss if (len > 0) {
3358 1.152 augustss *(u_int8_t *)buf =
3359 1.1 augustss (UREAD2(sc, port) & UHCI_PORTSC_LS) >>
3360 1.1 augustss UHCI_PORTSC_LS_SHIFT;
3361 1.1 augustss totlen = 1;
3362 1.1 augustss }
3363 1.1 augustss break;
3364 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
3365 1.195 christos if (len == 0)
3366 1.195 christos break;
3367 1.177 toshii if ((value & 0xff) != 0) {
3368 1.63 augustss err = USBD_IOERROR;
3369 1.1 augustss goto ret;
3370 1.1 augustss }
3371 1.1 augustss l = min(len, USB_HUB_DESCRIPTOR_SIZE);
3372 1.1 augustss totlen = l;
3373 1.1 augustss memcpy(buf, &uhci_hubd_piix, l);
3374 1.1 augustss break;
3375 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
3376 1.1 augustss if (len != 4) {
3377 1.63 augustss err = USBD_IOERROR;
3378 1.1 augustss goto ret;
3379 1.1 augustss }
3380 1.1 augustss memset(buf, 0, len);
3381 1.1 augustss totlen = len;
3382 1.1 augustss break;
3383 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
3384 1.1 augustss if (index == 1)
3385 1.1 augustss port = UHCI_PORTSC1;
3386 1.1 augustss else if (index == 2)
3387 1.1 augustss port = UHCI_PORTSC2;
3388 1.1 augustss else {
3389 1.63 augustss err = USBD_IOERROR;
3390 1.1 augustss goto ret;
3391 1.1 augustss }
3392 1.1 augustss if (len != 4) {
3393 1.63 augustss err = USBD_IOERROR;
3394 1.1 augustss goto ret;
3395 1.1 augustss }
3396 1.1 augustss x = UREAD2(sc, port);
3397 1.1 augustss status = change = 0;
3398 1.142 augustss if (x & UHCI_PORTSC_CCS)
3399 1.1 augustss status |= UPS_CURRENT_CONNECT_STATUS;
3400 1.152 augustss if (x & UHCI_PORTSC_CSC)
3401 1.1 augustss change |= UPS_C_CONNECT_STATUS;
3402 1.152 augustss if (x & UHCI_PORTSC_PE)
3403 1.1 augustss status |= UPS_PORT_ENABLED;
3404 1.152 augustss if (x & UHCI_PORTSC_POEDC)
3405 1.1 augustss change |= UPS_C_PORT_ENABLED;
3406 1.152 augustss if (x & UHCI_PORTSC_OCI)
3407 1.1 augustss status |= UPS_OVERCURRENT_INDICATOR;
3408 1.152 augustss if (x & UHCI_PORTSC_OCIC)
3409 1.1 augustss change |= UPS_C_OVERCURRENT_INDICATOR;
3410 1.152 augustss if (x & UHCI_PORTSC_SUSP)
3411 1.1 augustss status |= UPS_SUSPEND;
3412 1.152 augustss if (x & UHCI_PORTSC_LSDA)
3413 1.1 augustss status |= UPS_LOW_SPEED;
3414 1.1 augustss status |= UPS_PORT_POWER;
3415 1.1 augustss if (sc->sc_isreset)
3416 1.1 augustss change |= UPS_C_PORT_RESET;
3417 1.1 augustss USETW(ps.wPortStatus, status);
3418 1.1 augustss USETW(ps.wPortChange, change);
3419 1.1 augustss l = min(len, sizeof ps);
3420 1.1 augustss memcpy(buf, &ps, l);
3421 1.1 augustss totlen = l;
3422 1.1 augustss break;
3423 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
3424 1.63 augustss err = USBD_IOERROR;
3425 1.1 augustss goto ret;
3426 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
3427 1.1 augustss break;
3428 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
3429 1.1 augustss if (index == 1)
3430 1.1 augustss port = UHCI_PORTSC1;
3431 1.1 augustss else if (index == 2)
3432 1.1 augustss port = UHCI_PORTSC2;
3433 1.1 augustss else {
3434 1.63 augustss err = USBD_IOERROR;
3435 1.1 augustss goto ret;
3436 1.1 augustss }
3437 1.1 augustss switch(value) {
3438 1.1 augustss case UHF_PORT_ENABLE:
3439 1.137 augustss x = URWMASK(UREAD2(sc, port));
3440 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_PE);
3441 1.1 augustss break;
3442 1.1 augustss case UHF_PORT_SUSPEND:
3443 1.137 augustss x = URWMASK(UREAD2(sc, port));
3444 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
3445 1.1 augustss break;
3446 1.1 augustss case UHF_PORT_RESET:
3447 1.166 dsainty err = uhci_portreset(sc, index);
3448 1.166 dsainty goto ret;
3449 1.111 augustss case UHF_PORT_POWER:
3450 1.111 augustss /* Pretend we turned on power */
3451 1.115 mycroft err = USBD_NORMAL_COMPLETION;
3452 1.111 augustss goto ret;
3453 1.1 augustss case UHF_C_PORT_CONNECTION:
3454 1.1 augustss case UHF_C_PORT_ENABLE:
3455 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
3456 1.1 augustss case UHF_PORT_CONNECTION:
3457 1.1 augustss case UHF_PORT_OVER_CURRENT:
3458 1.1 augustss case UHF_PORT_LOW_SPEED:
3459 1.1 augustss case UHF_C_PORT_SUSPEND:
3460 1.1 augustss case UHF_C_PORT_RESET:
3461 1.1 augustss default:
3462 1.63 augustss err = USBD_IOERROR;
3463 1.1 augustss goto ret;
3464 1.1 augustss }
3465 1.1 augustss break;
3466 1.1 augustss default:
3467 1.63 augustss err = USBD_IOERROR;
3468 1.1 augustss goto ret;
3469 1.1 augustss }
3470 1.63 augustss xfer->actlen = totlen;
3471 1.63 augustss err = USBD_NORMAL_COMPLETION;
3472 1.1 augustss ret:
3473 1.63 augustss xfer->status = err;
3474 1.52 augustss s = splusb();
3475 1.63 augustss usb_transfer_complete(xfer);
3476 1.52 augustss splx(s);
3477 1.1 augustss return (USBD_IN_PROGRESS);
3478 1.1 augustss }
3479 1.1 augustss
3480 1.1 augustss /* Abort a root control request. */
3481 1.1 augustss void
3482 1.205 christos uhci_root_ctrl_abort(usbd_xfer_handle xfer)
3483 1.1 augustss {
3484 1.70 augustss /* Nothing to do, all transfers are synchronous. */
3485 1.1 augustss }
3486 1.1 augustss
3487 1.1 augustss /* Close the root pipe. */
3488 1.1 augustss void
3489 1.205 christos uhci_root_ctrl_close(usbd_pipe_handle pipe)
3490 1.1 augustss {
3491 1.1 augustss DPRINTF(("uhci_root_ctrl_close\n"));
3492 1.1 augustss }
3493 1.1 augustss
3494 1.1 augustss /* Abort a root interrupt request. */
3495 1.1 augustss void
3496 1.119 augustss uhci_root_intr_abort(usbd_xfer_handle xfer)
3497 1.1 augustss {
3498 1.216 drochner uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
3499 1.30 augustss
3500 1.96 augustss usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, xfer);
3501 1.96 augustss sc->sc_intr_xfer = NULL;
3502 1.58 augustss
3503 1.63 augustss if (xfer->pipe->intrxfer == xfer) {
3504 1.58 augustss DPRINTF(("uhci_root_intr_abort: remove\n"));
3505 1.63 augustss xfer->pipe->intrxfer = 0;
3506 1.58 augustss }
3507 1.63 augustss xfer->status = USBD_CANCELLED;
3508 1.96 augustss #ifdef DIAGNOSTIC
3509 1.96 augustss UXFER(xfer)->iinfo.isdone = 1;
3510 1.96 augustss #endif
3511 1.63 augustss usb_transfer_complete(xfer);
3512 1.1 augustss }
3513 1.1 augustss
3514 1.16 augustss usbd_status
3515 1.119 augustss uhci_root_intr_transfer(usbd_xfer_handle xfer)
3516 1.16 augustss {
3517 1.63 augustss usbd_status err;
3518 1.16 augustss
3519 1.52 augustss /* Insert last in queue. */
3520 1.63 augustss err = usb_insert_transfer(xfer);
3521 1.63 augustss if (err)
3522 1.63 augustss return (err);
3523 1.52 augustss
3524 1.186 skrll /*
3525 1.186 skrll * Pipe isn't running (otherwise err would be USBD_INPROG),
3526 1.67 augustss * start first
3527 1.67 augustss */
3528 1.63 augustss return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3529 1.16 augustss }
3530 1.16 augustss
3531 1.1 augustss /* Start a transfer on the root interrupt pipe */
3532 1.1 augustss usbd_status
3533 1.119 augustss uhci_root_intr_start(usbd_xfer_handle xfer)
3534 1.1 augustss {
3535 1.63 augustss usbd_pipe_handle pipe = xfer->pipe;
3536 1.216 drochner uhci_softc_t *sc = pipe->device->bus->hci_private;
3537 1.174 drochner unsigned int ival;
3538 1.1 augustss
3539 1.173 gson DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n",
3540 1.63 augustss xfer, xfer->length, xfer->flags));
3541 1.82 augustss
3542 1.82 augustss if (sc->sc_dying)
3543 1.82 augustss return (USBD_IOERROR);
3544 1.1 augustss
3545 1.174 drochner /* XXX temporary variable needed to avoid gcc3 warning */
3546 1.174 drochner ival = xfer->pipe->endpoint->edesc->bInterval;
3547 1.174 drochner sc->sc_ival = mstohz(ival);
3548 1.96 augustss usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
3549 1.96 augustss sc->sc_intr_xfer = xfer;
3550 1.1 augustss return (USBD_IN_PROGRESS);
3551 1.1 augustss }
3552 1.1 augustss
3553 1.1 augustss /* Close the root interrupt pipe. */
3554 1.1 augustss void
3555 1.119 augustss uhci_root_intr_close(usbd_pipe_handle pipe)
3556 1.1 augustss {
3557 1.216 drochner uhci_softc_t *sc = pipe->device->bus->hci_private;
3558 1.30 augustss
3559 1.96 augustss usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, sc->sc_intr_xfer);
3560 1.96 augustss sc->sc_intr_xfer = NULL;
3561 1.1 augustss DPRINTF(("uhci_root_intr_close\n"));
3562 1.1 augustss }
3563