Home | History | Annotate | Line # | Download | only in usb
uhci.c revision 1.223.12.1
      1  1.223.12.1      matt /*	$NetBSD: uhci.c,v 1.223.12.1 2010/04/21 00:27:53 matt Exp $	*/
      2        1.67  augustss /*	$FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $	*/
      3         1.1  augustss 
      4         1.1  augustss /*
      5       1.185   mycroft  * Copyright (c) 1998, 2004 The NetBSD Foundation, Inc.
      6         1.1  augustss  * All rights reserved.
      7         1.1  augustss  *
      8        1.11  augustss  * This code is derived from software contributed to The NetBSD Foundation
      9       1.113  augustss  * by Lennart Augustsson (lennart (at) augustsson.net) at
     10        1.11  augustss  * Carlstedt Research & Technology.
     11         1.1  augustss  *
     12         1.1  augustss  * Redistribution and use in source and binary forms, with or without
     13         1.1  augustss  * modification, are permitted provided that the following conditions
     14         1.1  augustss  * are met:
     15         1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     16         1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     17         1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     18         1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     19         1.1  augustss  *    documentation and/or other materials provided with the distribution.
     20         1.1  augustss  *
     21         1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     22         1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     23         1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     24         1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     25         1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     26         1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     27         1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     28         1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     29         1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     30         1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     31         1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     32         1.1  augustss  */
     33         1.1  augustss 
     34         1.1  augustss /*
     35         1.1  augustss  * USB Universal Host Controller driver.
     36        1.28  augustss  * Handles e.g. PIIX3 and PIIX4.
     37         1.1  augustss  *
     38       1.131  augustss  * UHCI spec: http://developer.intel.com/design/USB/UHCI11D.htm
     39       1.168    ichiro  * USB spec: http://www.usb.org/developers/docs/usbspec.zip
     40        1.71  augustss  * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
     41        1.71  augustss  *             ftp://download.intel.com/design/intarch/datashts/29056201.pdf
     42         1.1  augustss  */
     43       1.143     lukem 
     44       1.143     lukem #include <sys/cdefs.h>
     45  1.223.12.1      matt __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.223.12.1 2010/04/21 00:27:53 matt Exp $");
     46         1.1  augustss 
     47         1.1  augustss #include <sys/param.h>
     48         1.1  augustss #include <sys/systm.h>
     49         1.1  augustss #include <sys/kernel.h>
     50         1.1  augustss #include <sys/malloc.h>
     51        1.37  augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
     52         1.1  augustss #include <sys/device.h>
     53        1.67  augustss #include <sys/select.h>
     54       1.183      fvdl #include <sys/extent.h>
     55       1.183      fvdl #include <uvm/uvm_extern.h>
     56        1.13  augustss #elif defined(__FreeBSD__)
     57        1.13  augustss #include <sys/module.h>
     58        1.13  augustss #include <sys/bus.h>
     59        1.67  augustss #include <machine/bus_pio.h>
     60        1.67  augustss #if defined(DIAGNOSTIC) && defined(__i386__)
     61       1.211        ad #include <sys/cpu.h>
     62        1.67  augustss #endif
     63        1.13  augustss #endif
     64         1.1  augustss #include <sys/proc.h>
     65         1.1  augustss #include <sys/queue.h>
     66       1.211        ad #include <sys/bus.h>
     67         1.1  augustss 
     68        1.39  augustss #include <machine/endian.h>
     69         1.7  augustss 
     70         1.1  augustss #include <dev/usb/usb.h>
     71         1.1  augustss #include <dev/usb/usbdi.h>
     72         1.1  augustss #include <dev/usb/usbdivar.h>
     73         1.7  augustss #include <dev/usb/usb_mem.h>
     74         1.1  augustss #include <dev/usb/usb_quirks.h>
     75         1.1  augustss 
     76         1.1  augustss #include <dev/usb/uhcireg.h>
     77         1.1  augustss #include <dev/usb/uhcivar.h>
     78       1.213  drochner #include <dev/usb/usbroothub_subr.h>
     79         1.1  augustss 
     80       1.125  augustss /* Use bandwidth reclamation for control transfers. Some devices choke on it. */
     81       1.125  augustss /*#define UHCI_CTL_LOOP */
     82       1.125  augustss 
     83        1.13  augustss #if defined(__FreeBSD__)
     84        1.13  augustss #include <machine/clock.h>
     85        1.13  augustss 
     86        1.13  augustss #define delay(d)		DELAY(d)
     87        1.13  augustss #endif
     88        1.13  augustss 
     89        1.37  augustss #if defined(__OpenBSD__)
     90        1.37  augustss struct cfdriver uhci_cd = {
     91        1.37  augustss 	NULL, "uhci", DV_DULL
     92        1.37  augustss };
     93        1.37  augustss #endif
     94        1.37  augustss 
     95        1.67  augustss #ifdef UHCI_DEBUG
     96        1.92  augustss uhci_softc_t *thesc;
     97        1.59  augustss #define DPRINTF(x)	if (uhcidebug) printf x
     98        1.59  augustss #define DPRINTFN(n,x)	if (uhcidebug>(n)) printf x
     99        1.67  augustss int uhcidebug = 0;
    100       1.125  augustss int uhcinoloop = 0;
    101       1.122        tv #ifndef __NetBSD__
    102       1.122        tv #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
    103       1.122        tv #endif
    104        1.59  augustss #else
    105        1.59  augustss #define DPRINTF(x)
    106        1.59  augustss #define DPRINTFN(n,x)
    107        1.59  augustss #endif
    108        1.59  augustss 
    109        1.39  augustss /*
    110        1.39  augustss  * The UHCI controller is little endian, so on big endian machines
    111       1.181  drochner  * the data stored in memory needs to be swapped.
    112        1.39  augustss  */
    113       1.107  augustss #if defined(__FreeBSD__) || defined(__OpenBSD__)
    114        1.39  augustss #if BYTE_ORDER == BIG_ENDIAN
    115        1.88   tsutsui #define htole32(x) (bswap32(x))
    116        1.88   tsutsui #define le32toh(x) (bswap32(x))
    117        1.39  augustss #else
    118        1.88   tsutsui #define htole32(x) (x)
    119        1.88   tsutsui #define le32toh(x) (x)
    120        1.88   tsutsui #endif
    121        1.39  augustss #endif
    122        1.39  augustss 
    123         1.1  augustss struct uhci_pipe {
    124         1.1  augustss 	struct usbd_pipe pipe;
    125        1.32  augustss 	int nexttoggle;
    126        1.92  augustss 
    127        1.92  augustss 	u_char aborting;
    128        1.92  augustss 	usbd_xfer_handle abortstart, abortend;
    129        1.92  augustss 
    130         1.1  augustss 	/* Info needed for different pipe kinds. */
    131         1.1  augustss 	union {
    132         1.1  augustss 		/* Control pipe */
    133         1.1  augustss 		struct {
    134         1.1  augustss 			uhci_soft_qh_t *sqh;
    135         1.7  augustss 			usb_dma_t reqdma;
    136        1.16  augustss 			uhci_soft_td_t *setup, *stat;
    137         1.1  augustss 			u_int length;
    138         1.1  augustss 		} ctl;
    139         1.1  augustss 		/* Interrupt pipe */
    140         1.1  augustss 		struct {
    141         1.1  augustss 			int npoll;
    142       1.187     skrll 			int isread;
    143         1.1  augustss 			uhci_soft_qh_t **qhs;
    144         1.1  augustss 		} intr;
    145         1.1  augustss 		/* Bulk pipe */
    146         1.1  augustss 		struct {
    147         1.1  augustss 			uhci_soft_qh_t *sqh;
    148         1.1  augustss 			u_int length;
    149         1.1  augustss 			int isread;
    150         1.1  augustss 		} bulk;
    151        1.16  augustss 		/* Iso pipe */
    152        1.16  augustss 		struct iso {
    153        1.16  augustss 			uhci_soft_td_t **stds;
    154        1.48  augustss 			int next, inuse;
    155        1.16  augustss 		} iso;
    156         1.1  augustss 	} u;
    157         1.1  augustss };
    158         1.1  augustss 
    159       1.142  augustss Static void		uhci_globalreset(uhci_softc_t *);
    160       1.166   dsainty Static usbd_status	uhci_portreset(uhci_softc_t*, int);
    161       1.142  augustss Static void		uhci_reset(uhci_softc_t *);
    162       1.119  augustss Static usbd_status	uhci_run(uhci_softc_t *, int run);
    163       1.123  augustss Static uhci_soft_td_t  *uhci_alloc_std(uhci_softc_t *);
    164       1.119  augustss Static void		uhci_free_std(uhci_softc_t *, uhci_soft_td_t *);
    165       1.123  augustss Static uhci_soft_qh_t  *uhci_alloc_sqh(uhci_softc_t *);
    166       1.119  augustss Static void		uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *);
    167        1.16  augustss #if 0
    168       1.119  augustss Static void		uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *,
    169       1.119  augustss 					 uhci_intr_info_t *);
    170       1.119  augustss Static void		uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *);
    171        1.16  augustss #endif
    172         1.1  augustss 
    173       1.152  augustss Static void		uhci_free_std_chain(uhci_softc_t *,
    174       1.119  augustss 					    uhci_soft_td_t *, uhci_soft_td_t *);
    175       1.119  augustss Static usbd_status	uhci_alloc_std_chain(struct uhci_pipe *,
    176       1.152  augustss 			    uhci_softc_t *, int, int, u_int16_t, usb_dma_t *,
    177       1.119  augustss 			    uhci_soft_td_t **, uhci_soft_td_t **);
    178       1.119  augustss Static void		uhci_poll_hub(void *);
    179       1.119  augustss Static void		uhci_waitintr(uhci_softc_t *, usbd_xfer_handle);
    180       1.119  augustss Static void		uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *);
    181       1.119  augustss Static void		uhci_idone(uhci_intr_info_t *);
    182       1.119  augustss 
    183       1.119  augustss Static void		uhci_abort_xfer(usbd_xfer_handle, usbd_status status);
    184       1.119  augustss 
    185       1.119  augustss Static void		uhci_timeout(void *);
    186       1.153  augustss Static void		uhci_timeout_task(void *);
    187       1.123  augustss Static void		uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
    188       1.123  augustss Static void		uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
    189       1.119  augustss Static void		uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *);
    190       1.123  augustss Static void		uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
    191       1.123  augustss Static void		uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
    192       1.119  augustss Static void		uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *);
    193       1.123  augustss Static void		uhci_add_loop(uhci_softc_t *sc);
    194       1.123  augustss Static void		uhci_rem_loop(uhci_softc_t *sc);
    195       1.119  augustss 
    196       1.119  augustss Static usbd_status	uhci_setup_isoc(usbd_pipe_handle pipe);
    197       1.119  augustss Static void		uhci_device_isoc_enter(usbd_xfer_handle);
    198       1.119  augustss 
    199       1.119  augustss Static usbd_status	uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
    200       1.119  augustss Static void		uhci_freem(struct usbd_bus *, usb_dma_t *);
    201       1.119  augustss 
    202       1.119  augustss Static usbd_xfer_handle	uhci_allocx(struct usbd_bus *);
    203       1.119  augustss Static void		uhci_freex(struct usbd_bus *, usbd_xfer_handle);
    204       1.119  augustss 
    205       1.119  augustss Static usbd_status	uhci_device_ctrl_transfer(usbd_xfer_handle);
    206       1.119  augustss Static usbd_status	uhci_device_ctrl_start(usbd_xfer_handle);
    207       1.119  augustss Static void		uhci_device_ctrl_abort(usbd_xfer_handle);
    208       1.119  augustss Static void		uhci_device_ctrl_close(usbd_pipe_handle);
    209       1.119  augustss Static void		uhci_device_ctrl_done(usbd_xfer_handle);
    210       1.119  augustss 
    211       1.119  augustss Static usbd_status	uhci_device_intr_transfer(usbd_xfer_handle);
    212       1.119  augustss Static usbd_status	uhci_device_intr_start(usbd_xfer_handle);
    213       1.119  augustss Static void		uhci_device_intr_abort(usbd_xfer_handle);
    214       1.119  augustss Static void		uhci_device_intr_close(usbd_pipe_handle);
    215       1.119  augustss Static void		uhci_device_intr_done(usbd_xfer_handle);
    216       1.119  augustss 
    217       1.119  augustss Static usbd_status	uhci_device_bulk_transfer(usbd_xfer_handle);
    218       1.119  augustss Static usbd_status	uhci_device_bulk_start(usbd_xfer_handle);
    219       1.119  augustss Static void		uhci_device_bulk_abort(usbd_xfer_handle);
    220       1.119  augustss Static void		uhci_device_bulk_close(usbd_pipe_handle);
    221       1.119  augustss Static void		uhci_device_bulk_done(usbd_xfer_handle);
    222       1.119  augustss 
    223       1.119  augustss Static usbd_status	uhci_device_isoc_transfer(usbd_xfer_handle);
    224       1.119  augustss Static usbd_status	uhci_device_isoc_start(usbd_xfer_handle);
    225       1.119  augustss Static void		uhci_device_isoc_abort(usbd_xfer_handle);
    226       1.119  augustss Static void		uhci_device_isoc_close(usbd_pipe_handle);
    227       1.119  augustss Static void		uhci_device_isoc_done(usbd_xfer_handle);
    228       1.119  augustss 
    229       1.119  augustss Static usbd_status	uhci_root_ctrl_transfer(usbd_xfer_handle);
    230       1.119  augustss Static usbd_status	uhci_root_ctrl_start(usbd_xfer_handle);
    231       1.119  augustss Static void		uhci_root_ctrl_abort(usbd_xfer_handle);
    232       1.119  augustss Static void		uhci_root_ctrl_close(usbd_pipe_handle);
    233       1.119  augustss Static void		uhci_root_ctrl_done(usbd_xfer_handle);
    234       1.119  augustss 
    235       1.119  augustss Static usbd_status	uhci_root_intr_transfer(usbd_xfer_handle);
    236       1.119  augustss Static usbd_status	uhci_root_intr_start(usbd_xfer_handle);
    237       1.119  augustss Static void		uhci_root_intr_abort(usbd_xfer_handle);
    238       1.119  augustss Static void		uhci_root_intr_close(usbd_pipe_handle);
    239       1.119  augustss Static void		uhci_root_intr_done(usbd_xfer_handle);
    240       1.119  augustss 
    241       1.119  augustss Static usbd_status	uhci_open(usbd_pipe_handle);
    242       1.119  augustss Static void		uhci_poll(struct usbd_bus *);
    243       1.133  augustss Static void		uhci_softintr(void *);
    244       1.119  augustss 
    245       1.119  augustss Static usbd_status	uhci_device_request(usbd_xfer_handle xfer);
    246       1.119  augustss 
    247       1.119  augustss Static void		uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *);
    248       1.158  augustss Static void		uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *);
    249       1.152  augustss Static usbd_status	uhci_device_setintr(uhci_softc_t *sc,
    250       1.119  augustss 			    struct uhci_pipe *pipe, int ival);
    251       1.119  augustss 
    252       1.119  augustss Static void		uhci_device_clear_toggle(usbd_pipe_handle pipe);
    253       1.119  augustss Static void		uhci_noop(usbd_pipe_handle pipe);
    254       1.119  augustss 
    255       1.192     perry Static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *,
    256       1.119  augustss 						    uhci_soft_qh_t *);
    257       1.119  augustss 
    258       1.119  augustss #ifdef UHCI_DEBUG
    259       1.119  augustss Static void		uhci_dump_all(uhci_softc_t *);
    260       1.119  augustss Static void		uhci_dumpregs(uhci_softc_t *);
    261       1.119  augustss Static void		uhci_dump_qhs(uhci_soft_qh_t *);
    262       1.119  augustss Static void		uhci_dump_qh(uhci_soft_qh_t *);
    263       1.119  augustss Static void		uhci_dump_tds(uhci_soft_td_t *);
    264       1.119  augustss Static void		uhci_dump_td(uhci_soft_td_t *);
    265       1.119  augustss Static void		uhci_dump_ii(uhci_intr_info_t *ii);
    266       1.119  augustss void			uhci_dump(void);
    267         1.1  augustss #endif
    268         1.1  augustss 
    269       1.112  augustss #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
    270       1.112  augustss 			BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
    271       1.112  augustss #define UWRITE1(sc, r, x) \
    272       1.165   dsainty  do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \
    273       1.165   dsainty  } while (/*CONSTCOND*/0)
    274       1.112  augustss #define UWRITE2(sc, r, x) \
    275       1.165   dsainty  do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \
    276       1.165   dsainty  } while (/*CONSTCOND*/0)
    277       1.112  augustss #define UWRITE4(sc, r, x) \
    278       1.165   dsainty  do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \
    279       1.165   dsainty  } while (/*CONSTCOND*/0)
    280       1.196       mrg static __inline uint8_t
    281       1.196       mrg UREAD1(uhci_softc_t *sc, bus_size_t r)
    282       1.196       mrg {
    283       1.196       mrg 
    284       1.196       mrg 	UBARR(sc);
    285       1.196       mrg 	return bus_space_read_1(sc->iot, sc->ioh, r);
    286       1.196       mrg }
    287       1.196       mrg 
    288       1.196       mrg static __inline uint16_t
    289       1.196       mrg UREAD2(uhci_softc_t *sc, bus_size_t r)
    290       1.196       mrg {
    291       1.196       mrg 
    292       1.196       mrg 	UBARR(sc);
    293       1.196       mrg 	return bus_space_read_2(sc->iot, sc->ioh, r);
    294       1.196       mrg }
    295       1.196       mrg 
    296       1.196       mrg static __inline uint32_t
    297       1.196       mrg UREAD4(uhci_softc_t *sc, bus_size_t r)
    298       1.196       mrg {
    299       1.196       mrg 
    300       1.196       mrg 	UBARR(sc);
    301       1.196       mrg 	return bus_space_read_4(sc->iot, sc->ioh, r);
    302       1.196       mrg }
    303         1.1  augustss 
    304         1.1  augustss #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
    305         1.1  augustss #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
    306         1.1  augustss 
    307       1.142  augustss #define UHCI_RESET_TIMEOUT 100	/* ms, reset timeout */
    308         1.1  augustss 
    309         1.1  augustss #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
    310         1.1  augustss 
    311         1.1  augustss #define UHCI_INTR_ENDPT 1
    312         1.1  augustss 
    313       1.208  drochner const struct usbd_bus_methods uhci_bus_methods = {
    314        1.48  augustss 	uhci_open,
    315        1.85  augustss 	uhci_softintr,
    316        1.48  augustss 	uhci_poll,
    317        1.48  augustss 	uhci_allocm,
    318        1.48  augustss 	uhci_freem,
    319        1.76  augustss 	uhci_allocx,
    320        1.76  augustss 	uhci_freex,
    321        1.48  augustss };
    322        1.48  augustss 
    323       1.208  drochner const struct usbd_pipe_methods uhci_root_ctrl_methods = {
    324         1.1  augustss 	uhci_root_ctrl_transfer,
    325        1.16  augustss 	uhci_root_ctrl_start,
    326         1.1  augustss 	uhci_root_ctrl_abort,
    327         1.1  augustss 	uhci_root_ctrl_close,
    328        1.38  augustss 	uhci_noop,
    329        1.84  augustss 	uhci_root_ctrl_done,
    330         1.1  augustss };
    331         1.1  augustss 
    332       1.208  drochner const struct usbd_pipe_methods uhci_root_intr_methods = {
    333         1.1  augustss 	uhci_root_intr_transfer,
    334        1.16  augustss 	uhci_root_intr_start,
    335         1.1  augustss 	uhci_root_intr_abort,
    336         1.1  augustss 	uhci_root_intr_close,
    337        1.38  augustss 	uhci_noop,
    338        1.41  augustss 	uhci_root_intr_done,
    339         1.1  augustss };
    340         1.1  augustss 
    341       1.208  drochner const struct usbd_pipe_methods uhci_device_ctrl_methods = {
    342         1.1  augustss 	uhci_device_ctrl_transfer,
    343        1.16  augustss 	uhci_device_ctrl_start,
    344         1.1  augustss 	uhci_device_ctrl_abort,
    345         1.1  augustss 	uhci_device_ctrl_close,
    346        1.38  augustss 	uhci_noop,
    347        1.41  augustss 	uhci_device_ctrl_done,
    348         1.1  augustss };
    349         1.1  augustss 
    350       1.208  drochner const struct usbd_pipe_methods uhci_device_intr_methods = {
    351         1.1  augustss 	uhci_device_intr_transfer,
    352        1.16  augustss 	uhci_device_intr_start,
    353         1.1  augustss 	uhci_device_intr_abort,
    354         1.1  augustss 	uhci_device_intr_close,
    355        1.38  augustss 	uhci_device_clear_toggle,
    356        1.41  augustss 	uhci_device_intr_done,
    357         1.1  augustss };
    358         1.1  augustss 
    359       1.208  drochner const struct usbd_pipe_methods uhci_device_bulk_methods = {
    360         1.1  augustss 	uhci_device_bulk_transfer,
    361        1.16  augustss 	uhci_device_bulk_start,
    362         1.1  augustss 	uhci_device_bulk_abort,
    363         1.1  augustss 	uhci_device_bulk_close,
    364        1.38  augustss 	uhci_device_clear_toggle,
    365        1.41  augustss 	uhci_device_bulk_done,
    366         1.1  augustss };
    367         1.1  augustss 
    368       1.208  drochner const struct usbd_pipe_methods uhci_device_isoc_methods = {
    369        1.16  augustss 	uhci_device_isoc_transfer,
    370        1.16  augustss 	uhci_device_isoc_start,
    371        1.16  augustss 	uhci_device_isoc_abort,
    372        1.16  augustss 	uhci_device_isoc_close,
    373        1.38  augustss 	uhci_noop,
    374        1.41  augustss 	uhci_device_isoc_done,
    375        1.16  augustss };
    376        1.16  augustss 
    377        1.92  augustss #define uhci_add_intr_info(sc, ii) \
    378       1.169  augustss 	LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list)
    379        1.92  augustss #define uhci_del_intr_info(ii) \
    380       1.169  augustss 	do { \
    381       1.169  augustss 		LIST_REMOVE((ii), list); \
    382       1.169  augustss 		(ii)->list.le_prev = NULL; \
    383       1.169  augustss 	} while (0)
    384       1.169  augustss #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL)
    385        1.92  augustss 
    386       1.192     perry Static inline uhci_soft_qh_t *
    387       1.119  augustss uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh)
    388        1.92  augustss {
    389        1.92  augustss 	DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh));
    390        1.92  augustss 
    391        1.92  augustss 	for (; pqh->hlink != sqh; pqh = pqh->hlink) {
    392       1.152  augustss #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG)
    393       1.223    bouyer 		usb_syncmem(&pqh->dma,
    394       1.223    bouyer 		    pqh->offs + offsetof(uhci_qh_t, qh_hlink),
    395       1.223    bouyer 		    sizeof(pqh->qh.qh_hlink),
    396       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE);
    397        1.92  augustss 		if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) {
    398       1.102  augustss 			printf("uhci_find_prev_qh: QH not found\n");
    399        1.92  augustss 			return (NULL);
    400        1.92  augustss 		}
    401        1.92  augustss #endif
    402        1.92  augustss 	}
    403        1.92  augustss 	return (pqh);
    404        1.92  augustss }
    405        1.92  augustss 
    406         1.1  augustss void
    407       1.142  augustss uhci_globalreset(uhci_softc_t *sc)
    408         1.1  augustss {
    409         1.1  augustss 	UHCICMD(sc, UHCI_CMD_GRESET);	/* global reset */
    410        1.20  augustss 	usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
    411         1.1  augustss 	UHCICMD(sc, 0);			/* do nothing */
    412         1.1  augustss }
    413         1.1  augustss 
    414         1.1  augustss usbd_status
    415       1.119  augustss uhci_init(uhci_softc_t *sc)
    416         1.1  augustss {
    417        1.63  augustss 	usbd_status err;
    418         1.1  augustss 	int i, j;
    419       1.123  augustss 	uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh;
    420         1.1  augustss 	uhci_soft_td_t *std;
    421         1.1  augustss 
    422         1.1  augustss 	DPRINTFN(1,("uhci_init: start\n"));
    423         1.1  augustss 
    424        1.67  augustss #ifdef UHCI_DEBUG
    425        1.92  augustss 	thesc = sc;
    426        1.92  augustss 
    427         1.1  augustss 	if (uhcidebug > 2)
    428         1.1  augustss 		uhci_dumpregs(sc);
    429         1.1  augustss #endif
    430         1.1  augustss 
    431       1.219  jmcneill 	sc->sc_suspend = PWR_RESUME;
    432       1.219  jmcneill 
    433         1.1  augustss 	UWRITE2(sc, UHCI_INTR, 0);		/* disable interrupts */
    434       1.142  augustss 	uhci_globalreset(sc);			/* reset the controller */
    435       1.142  augustss 	uhci_reset(sc);
    436        1.24  augustss 
    437       1.183      fvdl #ifdef __NetBSD__
    438       1.218  drochner 	usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
    439       1.183      fvdl 	    USB_MEM_RESERVE);
    440       1.183      fvdl #endif
    441       1.183      fvdl 
    442         1.1  augustss 	/* Allocate and initialize real frame array. */
    443       1.152  augustss 	err = usb_allocmem(&sc->sc_bus,
    444        1.63  augustss 		  UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
    445        1.63  augustss 		  UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
    446        1.63  augustss 	if (err)
    447        1.63  augustss 		return (err);
    448       1.159  augustss 	sc->sc_pframes = KERNADDR(&sc->sc_dma, 0);
    449         1.1  augustss 	UWRITE2(sc, UHCI_FRNUM, 0);		/* set frame number to 0 */
    450       1.160  augustss 	UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/
    451         1.1  augustss 
    452       1.152  augustss 	/*
    453       1.123  augustss 	 * Allocate a TD, inactive, that hangs from the last QH.
    454       1.123  augustss 	 * This is to avoid a bug in the PIIX that makes it run berserk
    455       1.123  augustss 	 * otherwise.
    456       1.123  augustss 	 */
    457       1.123  augustss 	std = uhci_alloc_std(sc);
    458       1.123  augustss 	if (std == NULL)
    459       1.123  augustss 		return (USBD_NOMEM);
    460       1.123  augustss 	std->link.std = NULL;
    461       1.123  augustss 	std->td.td_link = htole32(UHCI_PTR_T);
    462       1.123  augustss 	std->td.td_status = htole32(0); /* inactive */
    463       1.123  augustss 	std->td.td_token = htole32(0);
    464       1.123  augustss 	std->td.td_buffer = htole32(0);
    465       1.223    bouyer 	usb_syncmem(&std->dma, std->offs, sizeof(std->td),
    466       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    467       1.123  augustss 
    468       1.123  augustss 	/* Allocate the dummy QH marking the end and used for looping the QHs.*/
    469       1.123  augustss 	lsqh = uhci_alloc_sqh(sc);
    470       1.123  augustss 	if (lsqh == NULL)
    471       1.123  augustss 		return (USBD_NOMEM);
    472       1.123  augustss 	lsqh->hlink = NULL;
    473       1.123  augustss 	lsqh->qh.qh_hlink = htole32(UHCI_PTR_T);	/* end of QH chain */
    474       1.123  augustss 	lsqh->elink = std;
    475       1.123  augustss 	lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD);
    476       1.123  augustss 	sc->sc_last_qh = lsqh;
    477       1.223    bouyer 	usb_syncmem(&lsqh->dma, lsqh->offs, sizeof(lsqh->qh),
    478       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    479       1.123  augustss 
    480         1.1  augustss 	/* Allocate the dummy QH where bulk traffic will be queued. */
    481         1.1  augustss 	bsqh = uhci_alloc_sqh(sc);
    482        1.63  augustss 	if (bsqh == NULL)
    483         1.1  augustss 		return (USBD_NOMEM);
    484       1.123  augustss 	bsqh->hlink = lsqh;
    485       1.123  augustss 	bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH);
    486       1.121  augustss 	bsqh->elink = NULL;
    487        1.88   tsutsui 	bsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    488         1.1  augustss 	sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
    489       1.223    bouyer 	usb_syncmem(&bsqh->dma, bsqh->offs, sizeof(bsqh->qh),
    490       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    491         1.1  augustss 
    492       1.123  augustss 	/* Allocate dummy QH where high speed control traffic will be queued. */
    493       1.123  augustss 	chsqh = uhci_alloc_sqh(sc);
    494       1.123  augustss 	if (chsqh == NULL)
    495       1.123  augustss 		return (USBD_NOMEM);
    496       1.123  augustss 	chsqh->hlink = bsqh;
    497       1.123  augustss 	chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH);
    498       1.123  augustss 	chsqh->elink = NULL;
    499       1.123  augustss 	chsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    500       1.123  augustss 	sc->sc_hctl_start = sc->sc_hctl_end = chsqh;
    501       1.223    bouyer 	usb_syncmem(&chsqh->dma, chsqh->offs, sizeof(chsqh->qh),
    502       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    503       1.123  augustss 
    504       1.123  augustss 	/* Allocate dummy QH where control traffic will be queued. */
    505       1.123  augustss 	clsqh = uhci_alloc_sqh(sc);
    506       1.123  augustss 	if (clsqh == NULL)
    507         1.1  augustss 		return (USBD_NOMEM);
    508       1.220    bouyer 	clsqh->hlink = chsqh;
    509       1.123  augustss 	clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH);
    510       1.123  augustss 	clsqh->elink = NULL;
    511       1.123  augustss 	clsqh->qh.qh_elink = htole32(UHCI_PTR_T);
    512       1.123  augustss 	sc->sc_lctl_start = sc->sc_lctl_end = clsqh;
    513       1.223    bouyer 	usb_syncmem(&clsqh->dma, clsqh->offs, sizeof(clsqh->qh),
    514       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    515         1.1  augustss 
    516       1.152  augustss 	/*
    517         1.1  augustss 	 * Make all (virtual) frame list pointers point to the interrupt
    518         1.1  augustss 	 * queue heads and the interrupt queue heads at the control
    519         1.1  augustss 	 * queue head and point the physical frame list to the virtual.
    520         1.1  augustss 	 */
    521         1.1  augustss 	for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
    522         1.1  augustss 		std = uhci_alloc_std(sc);
    523         1.1  augustss 		sqh = uhci_alloc_sqh(sc);
    524        1.67  augustss 		if (std == NULL || sqh == NULL)
    525        1.13  augustss 			return (USBD_NOMEM);
    526        1.42  augustss 		std->link.sqh = sqh;
    527       1.121  augustss 		std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH);
    528        1.88   tsutsui 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
    529        1.88   tsutsui 		std->td.td_token = htole32(0);
    530        1.88   tsutsui 		std->td.td_buffer = htole32(0);
    531       1.223    bouyer 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
    532       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    533       1.123  augustss 		sqh->hlink = clsqh;
    534       1.123  augustss 		sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH);
    535       1.121  augustss 		sqh->elink = NULL;
    536        1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
    537       1.223    bouyer 		usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    538       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    539         1.1  augustss 		sc->sc_vframes[i].htd = std;
    540         1.1  augustss 		sc->sc_vframes[i].etd = std;
    541         1.1  augustss 		sc->sc_vframes[i].hqh = sqh;
    542         1.1  augustss 		sc->sc_vframes[i].eqh = sqh;
    543       1.152  augustss 		for (j = i;
    544       1.152  augustss 		     j < UHCI_FRAMELIST_COUNT;
    545         1.1  augustss 		     j += UHCI_VFRAMELIST_COUNT)
    546        1.88   tsutsui 			sc->sc_pframes[j] = htole32(std->physaddr);
    547         1.1  augustss 	}
    548       1.223    bouyer 	usb_syncmem(&sc->sc_dma, 0,
    549       1.223    bouyer 	    UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
    550       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
    551       1.223    bouyer 
    552         1.1  augustss 
    553         1.1  augustss 	LIST_INIT(&sc->sc_intrhead);
    554         1.1  augustss 
    555        1.76  augustss 	SIMPLEQ_INIT(&sc->sc_free_xfers);
    556        1.76  augustss 
    557        1.96  augustss 	usb_callout_init(sc->sc_poll_handle);
    558        1.96  augustss 
    559         1.1  augustss 	/* Set up the bus struct. */
    560        1.48  augustss 	sc->sc_bus.methods = &uhci_bus_methods;
    561         1.1  augustss 	sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
    562         1.1  augustss 
    563       1.190  augustss 	UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */
    564       1.190  augustss 
    565         1.1  augustss 	DPRINTFN(1,("uhci_init: enabling\n"));
    566  1.223.12.1      matt 
    567  1.223.12.1      matt 	err =  uhci_run(sc, 1);		/* and here we go... */
    568       1.152  augustss 	UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
    569         1.1  augustss 		UHCI_INTR_IOCE | UHCI_INTR_SPIE);	/* enable interrupts */
    570  1.223.12.1      matt 	return err;
    571        1.53  augustss }
    572        1.53  augustss 
    573        1.67  augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
    574        1.53  augustss int
    575       1.215    dyoung uhci_activate(device_t self, enum devact act)
    576        1.53  augustss {
    577       1.215    dyoung 	struct uhci_softc *sc = device_private(self);
    578        1.53  augustss 	int rv = 0;
    579        1.53  augustss 
    580        1.53  augustss 	switch (act) {
    581        1.53  augustss 	case DVACT_ACTIVATE:
    582        1.53  augustss 		return (EOPNOTSUPP);
    583        1.53  augustss 
    584        1.53  augustss 	case DVACT_DEACTIVATE:
    585       1.210  kiyohara 		sc->sc_dying = 1;
    586        1.56  augustss 		if (sc->sc_child != NULL)
    587        1.56  augustss 			rv = config_deactivate(sc->sc_child);
    588        1.53  augustss 		break;
    589        1.53  augustss 	}
    590        1.53  augustss 	return (rv);
    591        1.53  augustss }
    592        1.53  augustss 
    593       1.215    dyoung void
    594       1.215    dyoung uhci_childdet(device_t self, device_t child)
    595       1.215    dyoung {
    596       1.215    dyoung 	struct uhci_softc *sc = device_private(self);
    597       1.215    dyoung 
    598       1.215    dyoung 	KASSERT(sc->sc_child == child);
    599       1.215    dyoung 	sc->sc_child = NULL;
    600       1.215    dyoung }
    601       1.215    dyoung 
    602        1.53  augustss int
    603       1.119  augustss uhci_detach(struct uhci_softc *sc, int flags)
    604        1.53  augustss {
    605        1.76  augustss 	usbd_xfer_handle xfer;
    606        1.53  augustss 	int rv = 0;
    607        1.53  augustss 
    608        1.53  augustss 	if (sc->sc_child != NULL)
    609        1.53  augustss 		rv = config_detach(sc->sc_child, flags);
    610       1.152  augustss 
    611        1.53  augustss 	if (rv != 0)
    612        1.53  augustss 		return (rv);
    613        1.53  augustss 
    614        1.76  augustss 	/* Free all xfers associated with this HC. */
    615        1.76  augustss 	for (;;) {
    616        1.76  augustss 		xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
    617        1.76  augustss 		if (xfer == NULL)
    618        1.76  augustss 			break;
    619       1.161     lukem 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
    620        1.76  augustss 		free(xfer, M_USB);
    621       1.152  augustss 	}
    622        1.76  augustss 
    623        1.76  augustss 	/* XXX free other data structures XXX */
    624        1.53  augustss 
    625        1.53  augustss 	return (rv);
    626         1.1  augustss }
    627        1.67  augustss #endif
    628         1.1  augustss 
    629        1.48  augustss usbd_status
    630       1.119  augustss uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
    631        1.48  augustss {
    632       1.216  drochner 	struct uhci_softc *sc = bus->hci_private;
    633       1.183      fvdl 	usbd_status status;
    634       1.102  augustss 	u_int32_t n;
    635       1.102  augustss 
    636       1.152  augustss 	/*
    637       1.102  augustss 	 * XXX
    638       1.102  augustss 	 * Since we are allocating a buffer we can assume that we will
    639       1.148  augustss 	 * need TDs for it.  Since we don't want to allocate those from
    640       1.102  augustss 	 * an interrupt context, we allocate them here and free them again.
    641       1.102  augustss 	 * This is no guarantee that we'll get the TDs next time...
    642       1.102  augustss 	 */
    643       1.102  augustss 	n = size / 8;
    644       1.102  augustss 	if (n > 16) {
    645       1.102  augustss 		u_int32_t i;
    646       1.102  augustss 		uhci_soft_td_t **stds;
    647       1.102  augustss 		DPRINTF(("uhci_allocm: get %d TDs\n", n));
    648       1.150   tsutsui 		stds = malloc(sizeof(uhci_soft_td_t *) * n, M_TEMP,
    649       1.151  augustss 		    M_WAITOK|M_ZERO);
    650       1.102  augustss 		for(i=0; i < n; i++)
    651       1.102  augustss 			stds[i] = uhci_alloc_std(sc);
    652       1.102  augustss 		for(i=0; i < n; i++)
    653       1.102  augustss 			if (stds[i] != NULL)
    654       1.102  augustss 				uhci_free_std(sc, stds[i]);
    655       1.102  augustss 		free(stds, M_TEMP);
    656       1.102  augustss 	}
    657       1.102  augustss 
    658       1.183      fvdl 
    659       1.183      fvdl 	status = usb_allocmem(&sc->sc_bus, size, 0, dma);
    660       1.183      fvdl #ifdef __NetBSD__
    661       1.183      fvdl 	if (status == USBD_NOMEM)
    662       1.183      fvdl 		status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
    663       1.183      fvdl #endif
    664       1.183      fvdl 	return status;
    665        1.48  augustss }
    666        1.48  augustss 
    667        1.48  augustss void
    668       1.119  augustss uhci_freem(struct usbd_bus *bus, usb_dma_t *dma)
    669        1.48  augustss {
    670       1.183      fvdl #ifdef __NetBSD__
    671       1.183      fvdl 	if (dma->block->flags & USB_DMA_RESERVE) {
    672       1.183      fvdl 		usb_reserve_freem(&((struct uhci_softc *)bus)->sc_dma_reserve,
    673       1.183      fvdl 		    dma);
    674       1.183      fvdl 		return;
    675       1.183      fvdl 	}
    676       1.183      fvdl #endif
    677        1.63  augustss 	usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma);
    678        1.76  augustss }
    679        1.76  augustss 
    680        1.76  augustss usbd_xfer_handle
    681       1.119  augustss uhci_allocx(struct usbd_bus *bus)
    682        1.76  augustss {
    683       1.216  drochner 	struct uhci_softc *sc = bus->hci_private;
    684        1.76  augustss 	usbd_xfer_handle xfer;
    685        1.76  augustss 
    686        1.76  augustss 	xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
    687        1.94  augustss 	if (xfer != NULL) {
    688       1.161     lukem 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
    689        1.98  augustss #ifdef DIAGNOSTIC
    690        1.94  augustss 		if (xfer->busy_free != XFER_FREE) {
    691       1.105  augustss 			printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer,
    692        1.94  augustss 			       xfer->busy_free);
    693        1.94  augustss 		}
    694        1.98  augustss #endif
    695        1.94  augustss 	} else {
    696        1.92  augustss 		xfer = malloc(sizeof(struct uhci_xfer), M_USB, M_NOWAIT);
    697        1.94  augustss 	}
    698        1.92  augustss 	if (xfer != NULL) {
    699        1.92  augustss 		memset(xfer, 0, sizeof (struct uhci_xfer));
    700        1.92  augustss 		UXFER(xfer)->iinfo.sc = sc;
    701        1.92  augustss #ifdef DIAGNOSTIC
    702        1.92  augustss 		UXFER(xfer)->iinfo.isdone = 1;
    703       1.135  augustss 		xfer->busy_free = XFER_BUSY;
    704        1.92  augustss #endif
    705        1.92  augustss 	}
    706        1.76  augustss 	return (xfer);
    707        1.76  augustss }
    708        1.76  augustss 
    709        1.76  augustss void
    710       1.119  augustss uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
    711        1.76  augustss {
    712       1.216  drochner 	struct uhci_softc *sc = bus->hci_private;
    713        1.76  augustss 
    714        1.93  augustss #ifdef DIAGNOSTIC
    715        1.94  augustss 	if (xfer->busy_free != XFER_BUSY) {
    716        1.94  augustss 		printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer,
    717        1.94  augustss 		       xfer->busy_free);
    718        1.93  augustss 	}
    719        1.94  augustss 	xfer->busy_free = XFER_FREE;
    720       1.105  augustss 	if (!UXFER(xfer)->iinfo.isdone) {
    721        1.96  augustss 		printf("uhci_freex: !isdone\n");
    722       1.105  augustss 	}
    723        1.93  augustss #endif
    724        1.76  augustss 	SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
    725        1.48  augustss }
    726        1.48  augustss 
    727        1.72  augustss /*
    728       1.212  jmcneill  * Handle suspend/resume.
    729       1.212  jmcneill  *
    730       1.212  jmcneill  * We need to switch to polling mode here, because this routine is
    731       1.212  jmcneill  * called from an interrupt context.  This is all right since we
    732       1.212  jmcneill  * are almost suspended anyway.
    733        1.72  augustss  */
    734       1.212  jmcneill bool
    735       1.215    dyoung uhci_resume(device_t dv PMF_FN_ARGS)
    736        1.72  augustss {
    737       1.212  jmcneill 	uhci_softc_t *sc = device_private(dv);
    738       1.212  jmcneill 	int cmd;
    739       1.193  augustss 	int s;
    740        1.72  augustss 
    741       1.212  jmcneill 	s = splhardusb();
    742       1.193  augustss 
    743       1.212  jmcneill 	cmd = UREAD2(sc, UHCI_CMD);
    744       1.193  augustss 	sc->sc_bus.use_polling++;
    745       1.214       smb 	UWRITE2(sc, UHCI_INTR, 0);
    746       1.214       smb 	uhci_globalreset(sc);
    747       1.214       smb 	uhci_reset(sc);
    748       1.212  jmcneill 	if (cmd & UHCI_CMD_RS)
    749       1.212  jmcneill 		uhci_run(sc, 0);
    750       1.212  jmcneill 
    751       1.212  jmcneill 	/* restore saved state */
    752       1.212  jmcneill 	UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0));
    753       1.212  jmcneill 	UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum);
    754       1.212  jmcneill 	UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof);
    755       1.212  jmcneill 
    756       1.212  jmcneill 	UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */
    757       1.212  jmcneill 	usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
    758       1.212  jmcneill 	UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
    759       1.212  jmcneill 	UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE |
    760       1.212  jmcneill 	    UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE);
    761       1.214       smb 	UHCICMD(sc, UHCI_CMD_MAXP);
    762       1.212  jmcneill 	uhci_run(sc, 1); /* and start traffic again */
    763       1.212  jmcneill 	usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
    764       1.193  augustss 	sc->sc_bus.use_polling--;
    765       1.212  jmcneill 	if (sc->sc_intr_xfer != NULL)
    766       1.212  jmcneill 		usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub,
    767       1.212  jmcneill 		    sc->sc_intr_xfer);
    768       1.212  jmcneill #ifdef UHCI_DEBUG
    769       1.212  jmcneill 	if (uhcidebug > 2)
    770       1.212  jmcneill 		uhci_dumpregs(sc);
    771       1.212  jmcneill #endif
    772       1.212  jmcneill 
    773       1.219  jmcneill 	sc->sc_suspend = PWR_RESUME;
    774       1.193  augustss 	splx(s);
    775       1.212  jmcneill 
    776       1.212  jmcneill 	return true;
    777        1.72  augustss }
    778        1.72  augustss 
    779       1.212  jmcneill bool
    780       1.215    dyoung uhci_suspend(device_t dv PMF_FN_ARGS)
    781        1.30  augustss {
    782       1.212  jmcneill 	uhci_softc_t *sc = device_private(dv);
    783        1.30  augustss 	int cmd;
    784        1.30  augustss 	int s;
    785        1.30  augustss 
    786       1.132  augustss 	s = splhardusb();
    787       1.212  jmcneill 
    788        1.30  augustss 	cmd = UREAD2(sc, UHCI_CMD);
    789        1.30  augustss 
    790       1.212  jmcneill #ifdef UHCI_DEBUG
    791       1.212  jmcneill 	if (uhcidebug > 2)
    792       1.212  jmcneill 		uhci_dumpregs(sc);
    793       1.212  jmcneill #endif
    794       1.212  jmcneill 	if (sc->sc_intr_xfer != NULL)
    795       1.212  jmcneill 		usb_uncallout(sc->sc_poll_handle, uhci_poll_hub,
    796       1.212  jmcneill 		    sc->sc_intr_xfer);
    797       1.219  jmcneill 	sc->sc_suspend = PWR_SUSPEND;
    798       1.212  jmcneill 	sc->sc_bus.use_polling++;
    799       1.219  jmcneill 
    800       1.212  jmcneill 	uhci_run(sc, 0); /* stop the controller */
    801       1.212  jmcneill 	cmd &= ~UHCI_CMD_RS;
    802       1.212  jmcneill 
    803       1.212  jmcneill 	/* save some state if BIOS doesn't */
    804       1.212  jmcneill 	sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM);
    805       1.212  jmcneill 	sc->sc_saved_sof = UREAD1(sc, UHCI_SOF);
    806       1.212  jmcneill 
    807       1.212  jmcneill 	UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */
    808        1.30  augustss 
    809       1.212  jmcneill 	UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */
    810       1.212  jmcneill 	usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
    811       1.212  jmcneill 	sc->sc_bus.use_polling--;
    812        1.86  augustss 
    813        1.30  augustss 	splx(s);
    814       1.212  jmcneill 
    815       1.212  jmcneill 	return true;
    816        1.30  augustss }
    817        1.30  augustss 
    818        1.59  augustss #ifdef UHCI_DEBUG
    819       1.101  augustss Static void
    820       1.119  augustss uhci_dumpregs(uhci_softc_t *sc)
    821         1.1  augustss {
    822        1.48  augustss 	DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
    823        1.48  augustss 		     "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
    824       1.216  drochner 		     device_xname(sc->sc_dev),
    825        1.48  augustss 		     UREAD2(sc, UHCI_CMD),
    826        1.48  augustss 		     UREAD2(sc, UHCI_STS),
    827        1.48  augustss 		     UREAD2(sc, UHCI_INTR),
    828        1.48  augustss 		     UREAD2(sc, UHCI_FRNUM),
    829        1.48  augustss 		     UREAD4(sc, UHCI_FLBASEADDR),
    830        1.48  augustss 		     UREAD1(sc, UHCI_SOF),
    831        1.48  augustss 		     UREAD2(sc, UHCI_PORTSC1),
    832        1.48  augustss 		     UREAD2(sc, UHCI_PORTSC2)));
    833         1.1  augustss }
    834         1.1  augustss 
    835         1.1  augustss void
    836       1.119  augustss uhci_dump_td(uhci_soft_td_t *p)
    837         1.1  augustss {
    838       1.122        tv 	char sbuf[128], sbuf2[128];
    839       1.122        tv 
    840       1.223    bouyer 
    841       1.223    bouyer 	usb_syncmem(&p->dma, p->offs, sizeof(p->td),
    842       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    843        1.48  augustss 	DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
    844        1.48  augustss 		     "token=0x%08lx buffer=0x%08lx\n",
    845        1.48  augustss 		     p, (long)p->physaddr,
    846        1.88   tsutsui 		     (long)le32toh(p->td.td_link),
    847        1.88   tsutsui 		     (long)le32toh(p->td.td_status),
    848        1.88   tsutsui 		     (long)le32toh(p->td.td_token),
    849        1.88   tsutsui 		     (long)le32toh(p->td.td_buffer)));
    850       1.122        tv 
    851       1.147  augustss 	bitmask_snprintf((u_int32_t)le32toh(p->td.td_link), "\20\1T\2Q\3VF",
    852       1.122        tv 			 sbuf, sizeof(sbuf));
    853       1.147  augustss 	bitmask_snprintf((u_int32_t)le32toh(p->td.td_status),
    854       1.122        tv 			 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
    855       1.122        tv 			 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
    856       1.122        tv 			 sbuf2, sizeof(sbuf2));
    857       1.122        tv 
    858       1.122        tv 	DPRINTFN(-1,("  %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
    859       1.122        tv 		     "D=%d,maxlen=%d\n", sbuf, sbuf2,
    860        1.88   tsutsui 		     UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)),
    861        1.88   tsutsui 		     UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)),
    862        1.88   tsutsui 		     UHCI_TD_GET_PID(le32toh(p->td.td_token)),
    863        1.88   tsutsui 		     UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)),
    864        1.88   tsutsui 		     UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)),
    865        1.88   tsutsui 		     UHCI_TD_GET_DT(le32toh(p->td.td_token)),
    866        1.88   tsutsui 		     UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token))));
    867       1.223    bouyer 	usb_syncmem(&p->dma, p->offs, sizeof(p->td),
    868       1.223    bouyer 	    BUS_DMASYNC_PREREAD);
    869         1.1  augustss }
    870         1.1  augustss 
    871         1.1  augustss void
    872       1.119  augustss uhci_dump_qh(uhci_soft_qh_t *sqh)
    873         1.1  augustss {
    874       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    875       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    876        1.67  augustss 	DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh,
    877        1.88   tsutsui 	    (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink),
    878        1.88   tsutsui 	    le32toh(sqh->qh.qh_elink)));
    879       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD);
    880         1.1  augustss }
    881         1.1  augustss 
    882        1.13  augustss 
    883       1.110  augustss #if 1
    884         1.1  augustss void
    885       1.119  augustss uhci_dump(void)
    886         1.1  augustss {
    887       1.110  augustss 	uhci_dump_all(thesc);
    888       1.110  augustss }
    889       1.110  augustss #endif
    890         1.1  augustss 
    891       1.110  augustss void
    892       1.119  augustss uhci_dump_all(uhci_softc_t *sc)
    893       1.110  augustss {
    894         1.1  augustss 	uhci_dumpregs(sc);
    895        1.50  augustss 	printf("intrs=%d\n", sc->sc_bus.no_intrs);
    896       1.110  augustss 	/*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/
    897       1.123  augustss 	uhci_dump_qh(sc->sc_lctl_start);
    898         1.1  augustss }
    899         1.1  augustss 
    900        1.67  augustss 
    901        1.67  augustss void
    902       1.119  augustss uhci_dump_qhs(uhci_soft_qh_t *sqh)
    903        1.67  augustss {
    904        1.67  augustss 	uhci_dump_qh(sqh);
    905        1.67  augustss 
    906        1.67  augustss 	/* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards
    907        1.67  augustss 	 * Traverses sideways first, then down.
    908        1.67  augustss 	 *
    909        1.67  augustss 	 * QH1
    910        1.67  augustss 	 * QH2
    911        1.67  augustss 	 * No QH
    912        1.67  augustss 	 * TD2.1
    913        1.67  augustss 	 * TD2.2
    914        1.67  augustss 	 * TD1.1
    915        1.67  augustss 	 * etc.
    916        1.67  augustss 	 *
    917        1.67  augustss 	 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
    918        1.67  augustss 	 */
    919        1.67  augustss 
    920        1.67  augustss 
    921       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
    922       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    923        1.88   tsutsui 	if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T))
    924        1.67  augustss 		uhci_dump_qhs(sqh->hlink);
    925        1.67  augustss 	else
    926        1.67  augustss 		DPRINTF(("No QH\n"));
    927       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD);
    928        1.67  augustss 
    929        1.88   tsutsui 	if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T))
    930        1.67  augustss 		uhci_dump_tds(sqh->elink);
    931        1.67  augustss 	else
    932        1.67  augustss 		DPRINTF(("No TD\n"));
    933        1.67  augustss }
    934        1.67  augustss 
    935         1.1  augustss void
    936       1.119  augustss uhci_dump_tds(uhci_soft_td_t *std)
    937         1.1  augustss {
    938        1.67  augustss 	uhci_soft_td_t *td;
    939       1.223    bouyer 	int stop;
    940        1.67  augustss 
    941        1.67  augustss 	for(td = std; td != NULL; td = td->link.std) {
    942        1.67  augustss 		uhci_dump_td(td);
    943         1.1  augustss 
    944        1.67  augustss 		/* Check whether the link pointer in this TD marks
    945        1.67  augustss 		 * the link pointer as end of queue. This avoids
    946        1.67  augustss 		 * printing the free list in case the queue/TD has
    947        1.67  augustss 		 * already been moved there (seatbelt).
    948        1.67  augustss 		 */
    949       1.223    bouyer 		usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link),
    950       1.223    bouyer 		    sizeof(td->td.td_link),
    951       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
    952       1.223    bouyer 		stop = (le32toh(td->td.td_link) & UHCI_PTR_T ||
    953       1.223    bouyer 			le32toh(td->td.td_link) == 0);
    954       1.223    bouyer 		usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link),
    955       1.223    bouyer 		    sizeof(td->td.td_link), BUS_DMASYNC_PREREAD);
    956       1.223    bouyer 		if (stop)
    957        1.67  augustss 			break;
    958        1.67  augustss 	}
    959         1.1  augustss }
    960        1.92  augustss 
    961       1.101  augustss Static void
    962       1.119  augustss uhci_dump_ii(uhci_intr_info_t *ii)
    963        1.92  augustss {
    964        1.95  augustss 	usbd_pipe_handle pipe;
    965        1.95  augustss 	usb_endpoint_descriptor_t *ed;
    966        1.95  augustss 	usbd_device_handle dev;
    967       1.152  augustss 
    968        1.98  augustss #ifdef DIAGNOSTIC
    969        1.98  augustss #define DONE ii->isdone
    970        1.98  augustss #else
    971        1.98  augustss #define DONE 0
    972        1.98  augustss #endif
    973        1.95  augustss         if (ii == NULL) {
    974        1.95  augustss                 printf("ii NULL\n");
    975        1.95  augustss                 return;
    976        1.95  augustss         }
    977        1.95  augustss         if (ii->xfer == NULL) {
    978        1.95  augustss 		printf("ii %p: done=%d xfer=NULL\n",
    979        1.98  augustss 		       ii, DONE);
    980        1.95  augustss                 return;
    981        1.95  augustss         }
    982        1.95  augustss         pipe = ii->xfer->pipe;
    983        1.95  augustss         if (pipe == NULL) {
    984        1.95  augustss 		printf("ii %p: done=%d xfer=%p pipe=NULL\n",
    985        1.98  augustss 		       ii, DONE, ii->xfer);
    986       1.139  augustss                 return;
    987       1.139  augustss 	}
    988       1.139  augustss         if (pipe->endpoint == NULL) {
    989       1.139  augustss 		printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n",
    990       1.139  augustss 		       ii, DONE, ii->xfer, pipe);
    991       1.139  augustss                 return;
    992       1.139  augustss 	}
    993       1.139  augustss         if (pipe->device == NULL) {
    994       1.139  augustss 		printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n",
    995       1.139  augustss 		       ii, DONE, ii->xfer, pipe);
    996        1.95  augustss                 return;
    997        1.95  augustss 	}
    998        1.95  augustss         ed = pipe->endpoint->edesc;
    999        1.95  augustss         dev = pipe->device;
   1000       1.152  augustss 	printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n",
   1001       1.152  augustss 	       ii, DONE, ii->xfer, dev,
   1002        1.95  augustss 	       UGETW(dev->ddesc.idVendor),
   1003        1.92  augustss 	       UGETW(dev->ddesc.idProduct),
   1004        1.92  augustss 	       dev->address, pipe,
   1005        1.92  augustss 	       ed->bEndpointAddress, ed->bmAttributes);
   1006        1.98  augustss #undef DONE
   1007        1.92  augustss }
   1008        1.92  augustss 
   1009       1.120  augustss void uhci_dump_iis(struct uhci_softc *sc);
   1010        1.92  augustss void
   1011       1.119  augustss uhci_dump_iis(struct uhci_softc *sc)
   1012        1.92  augustss {
   1013        1.92  augustss 	uhci_intr_info_t *ii;
   1014        1.92  augustss 
   1015        1.92  augustss 	printf("intr_info list:\n");
   1016        1.92  augustss 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
   1017        1.92  augustss 		uhci_dump_ii(ii);
   1018        1.92  augustss }
   1019        1.92  augustss 
   1020       1.120  augustss void iidump(void);
   1021       1.119  augustss void iidump(void) { uhci_dump_iis(thesc); }
   1022        1.92  augustss 
   1023         1.1  augustss #endif
   1024         1.1  augustss 
   1025         1.1  augustss /*
   1026         1.1  augustss  * This routine is executed periodically and simulates interrupts
   1027         1.1  augustss  * from the root controller interrupt pipe for port status change.
   1028         1.1  augustss  */
   1029         1.1  augustss void
   1030       1.119  augustss uhci_poll_hub(void *addr)
   1031         1.1  augustss {
   1032        1.63  augustss 	usbd_xfer_handle xfer = addr;
   1033        1.63  augustss 	usbd_pipe_handle pipe = xfer->pipe;
   1034       1.216  drochner 	uhci_softc_t *sc = pipe->device->bus->hci_private;
   1035         1.1  augustss 	int s;
   1036         1.1  augustss 	u_char *p;
   1037         1.1  augustss 
   1038        1.96  augustss 	DPRINTFN(20, ("uhci_poll_hub\n"));
   1039         1.1  augustss 
   1040        1.96  augustss 	usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
   1041        1.41  augustss 
   1042       1.159  augustss 	p = KERNADDR(&xfer->dmabuf, 0);
   1043         1.1  augustss 	p[0] = 0;
   1044         1.1  augustss 	if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
   1045         1.1  augustss 		p[0] |= 1<<1;
   1046         1.1  augustss 	if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
   1047         1.1  augustss 		p[0] |= 1<<2;
   1048        1.41  augustss 	if (p[0] == 0)
   1049        1.41  augustss 		/* No change, try again in a while */
   1050        1.41  augustss 		return;
   1051        1.41  augustss 
   1052        1.63  augustss 	xfer->actlen = 1;
   1053        1.63  augustss 	xfer->status = USBD_NORMAL_COMPLETION;
   1054        1.16  augustss 	s = splusb();
   1055        1.63  augustss 	xfer->device->bus->intr_context++;
   1056        1.63  augustss 	usb_transfer_complete(xfer);
   1057        1.63  augustss 	xfer->device->bus->intr_context--;
   1058        1.41  augustss 	splx(s);
   1059        1.41  augustss }
   1060        1.41  augustss 
   1061        1.41  augustss void
   1062       1.205  christos uhci_root_intr_done(usbd_xfer_handle xfer)
   1063        1.84  augustss {
   1064        1.84  augustss }
   1065        1.84  augustss 
   1066        1.84  augustss void
   1067       1.205  christos uhci_root_ctrl_done(usbd_xfer_handle xfer)
   1068        1.41  augustss {
   1069         1.1  augustss }
   1070         1.1  augustss 
   1071       1.123  augustss /*
   1072       1.123  augustss  * Let the last QH loop back to the high speed control transfer QH.
   1073       1.123  augustss  * This is what intel calls "bandwidth reclamation" and improves
   1074       1.123  augustss  * USB performance a lot for some devices.
   1075       1.123  augustss  * If we are already looping, just count it.
   1076       1.123  augustss  */
   1077         1.1  augustss void
   1078       1.123  augustss uhci_add_loop(uhci_softc_t *sc) {
   1079       1.125  augustss #ifdef UHCI_DEBUG
   1080       1.125  augustss 	if (uhcinoloop)
   1081       1.125  augustss 		return;
   1082       1.125  augustss #endif
   1083       1.123  augustss 	if (++sc->sc_loops == 1) {
   1084       1.125  augustss 		DPRINTFN(5,("uhci_start_loop: add\n"));
   1085       1.123  augustss 		/* Note, we don't loop back the soft pointer. */
   1086       1.152  augustss 		sc->sc_last_qh->qh.qh_hlink =
   1087       1.123  augustss 		    htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH);
   1088       1.223    bouyer 		usb_syncmem(&sc->sc_last_qh->dma,
   1089       1.223    bouyer 		    sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink),
   1090       1.223    bouyer 		    sizeof(sc->sc_last_qh->qh.qh_hlink),
   1091       1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   1092       1.123  augustss 	}
   1093       1.123  augustss }
   1094       1.123  augustss 
   1095       1.123  augustss void
   1096       1.123  augustss uhci_rem_loop(uhci_softc_t *sc) {
   1097       1.125  augustss #ifdef UHCI_DEBUG
   1098       1.125  augustss 	if (uhcinoloop)
   1099       1.125  augustss 		return;
   1100       1.125  augustss #endif
   1101       1.123  augustss 	if (--sc->sc_loops == 0) {
   1102       1.123  augustss 		DPRINTFN(5,("uhci_end_loop: remove\n"));
   1103       1.123  augustss 		sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T);
   1104       1.223    bouyer 		usb_syncmem(&sc->sc_last_qh->dma,
   1105       1.223    bouyer 		    sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink),
   1106       1.223    bouyer 		    sizeof(sc->sc_last_qh->qh.qh_hlink),
   1107       1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   1108       1.123  augustss 	}
   1109       1.123  augustss }
   1110       1.123  augustss 
   1111       1.123  augustss /* Add high speed control QH, called at splusb(). */
   1112       1.123  augustss void
   1113       1.123  augustss uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1114         1.1  augustss {
   1115        1.42  augustss 	uhci_soft_qh_t *eqh;
   1116         1.1  augustss 
   1117        1.52  augustss 	SPLUSBCHECK;
   1118        1.52  augustss 
   1119         1.1  augustss 	DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
   1120       1.123  augustss 	eqh = sc->sc_hctl_end;
   1121       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1122       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink),
   1123       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE);
   1124        1.42  augustss 	sqh->hlink       = eqh->hlink;
   1125        1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1126       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1127       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1128        1.42  augustss 	eqh->hlink       = sqh;
   1129       1.121  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1130       1.123  augustss 	sc->sc_hctl_end = sqh;
   1131       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1132       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1133       1.125  augustss #ifdef UHCI_CTL_LOOP
   1134       1.123  augustss 	uhci_add_loop(sc);
   1135       1.125  augustss #endif
   1136         1.1  augustss }
   1137         1.1  augustss 
   1138       1.123  augustss /* Remove high speed control QH, called at splusb(). */
   1139         1.1  augustss void
   1140       1.123  augustss uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1141         1.1  augustss {
   1142         1.1  augustss 	uhci_soft_qh_t *pqh;
   1143         1.1  augustss 
   1144        1.52  augustss 	SPLUSBCHECK;
   1145        1.52  augustss 
   1146       1.123  augustss 	DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh));
   1147       1.125  augustss #ifdef UHCI_CTL_LOOP
   1148       1.123  augustss 	uhci_rem_loop(sc);
   1149       1.125  augustss #endif
   1150       1.124  augustss 	/*
   1151       1.124  augustss 	 * The T bit should be set in the elink of the QH so that the HC
   1152       1.124  augustss 	 * doesn't follow the pointer.  This condition may fail if the
   1153       1.124  augustss 	 * the transferred packet was short so that the QH still points
   1154       1.124  augustss 	 * at the last used TD.
   1155       1.124  augustss 	 * In this case we set the T bit and wait a little for the HC
   1156       1.124  augustss 	 * to stop looking at the TD.
   1157       1.223    bouyer 	 * Note that if the TD chain is large enough, the controller
   1158       1.223    bouyer 	 * may still be looking at the chain at the end of this function.
   1159       1.223    bouyer 	 * uhci_free_std_chain() will make sure the controller stops
   1160       1.223    bouyer 	 * looking at it quickly, but until then we should not change
   1161       1.223    bouyer 	 * sqh->hlink.
   1162       1.124  augustss 	 */
   1163       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1164       1.223    bouyer 	    sizeof(sqh->qh.qh_elink),
   1165       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1166       1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1167       1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1168       1.223    bouyer 		usb_syncmem(&sqh->dma,
   1169       1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1170       1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   1171       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1172       1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1173       1.124  augustss 	}
   1174       1.124  augustss 
   1175       1.123  augustss 	pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh);
   1176       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1177       1.223    bouyer 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1178       1.152  augustss 	pqh->hlink = sqh->hlink;
   1179        1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1180       1.223    bouyer 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1181       1.223    bouyer 	    sizeof(pqh->qh.qh_hlink),
   1182       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1183       1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1184       1.123  augustss 	if (sc->sc_hctl_end == sqh)
   1185       1.123  augustss 		sc->sc_hctl_end = pqh;
   1186       1.123  augustss }
   1187       1.123  augustss 
   1188       1.123  augustss /* Add low speed control QH, called at splusb(). */
   1189       1.123  augustss void
   1190       1.123  augustss uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1191       1.123  augustss {
   1192       1.123  augustss 	uhci_soft_qh_t *eqh;
   1193       1.123  augustss 
   1194       1.123  augustss 	SPLUSBCHECK;
   1195       1.123  augustss 
   1196       1.123  augustss 	DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh));
   1197       1.123  augustss 	eqh = sc->sc_lctl_end;
   1198       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1199       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1200       1.152  augustss 	sqh->hlink = eqh->hlink;
   1201       1.123  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1202       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1203       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1204       1.152  augustss 	eqh->hlink = sqh;
   1205       1.123  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1206       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1207       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1208       1.123  augustss 	sc->sc_lctl_end = sqh;
   1209       1.123  augustss }
   1210       1.123  augustss 
   1211       1.123  augustss /* Remove low speed control QH, called at splusb(). */
   1212       1.123  augustss void
   1213       1.123  augustss uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1214       1.123  augustss {
   1215       1.123  augustss 	uhci_soft_qh_t *pqh;
   1216       1.123  augustss 
   1217       1.123  augustss 	SPLUSBCHECK;
   1218       1.123  augustss 
   1219       1.123  augustss 	DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh));
   1220       1.124  augustss 	/* See comment in uhci_remove_hs_ctrl() */
   1221       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1222       1.223    bouyer 	    sizeof(sqh->qh.qh_elink),
   1223       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1224       1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1225       1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1226       1.223    bouyer 		usb_syncmem(&sqh->dma,
   1227       1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1228       1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   1229       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1230       1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1231       1.124  augustss 	}
   1232       1.123  augustss 	pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh);
   1233       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1234       1.223    bouyer 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1235       1.152  augustss 	pqh->hlink = sqh->hlink;
   1236       1.123  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1237       1.223    bouyer 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1238       1.223    bouyer 	    sizeof(pqh->qh.qh_hlink),
   1239       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1240       1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1241       1.123  augustss 	if (sc->sc_lctl_end == sqh)
   1242       1.123  augustss 		sc->sc_lctl_end = pqh;
   1243         1.1  augustss }
   1244         1.1  augustss 
   1245         1.1  augustss /* Add bulk QH, called at splusb(). */
   1246         1.1  augustss void
   1247       1.119  augustss uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1248         1.1  augustss {
   1249        1.42  augustss 	uhci_soft_qh_t *eqh;
   1250         1.1  augustss 
   1251        1.52  augustss 	SPLUSBCHECK;
   1252        1.52  augustss 
   1253         1.1  augustss 	DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
   1254        1.42  augustss 	eqh = sc->sc_bulk_end;
   1255       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1256       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1257       1.152  augustss 	sqh->hlink = eqh->hlink;
   1258        1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   1259       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
   1260       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   1261       1.152  augustss 	eqh->hlink = sqh;
   1262       1.121  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   1263       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1264       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1265         1.1  augustss 	sc->sc_bulk_end = sqh;
   1266       1.123  augustss 	uhci_add_loop(sc);
   1267         1.1  augustss }
   1268         1.1  augustss 
   1269         1.1  augustss /* Remove bulk QH, called at splusb(). */
   1270         1.1  augustss void
   1271       1.119  augustss uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1272         1.1  augustss {
   1273         1.1  augustss 	uhci_soft_qh_t *pqh;
   1274         1.1  augustss 
   1275        1.52  augustss 	SPLUSBCHECK;
   1276        1.52  augustss 
   1277         1.1  augustss 	DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
   1278       1.123  augustss 	uhci_rem_loop(sc);
   1279       1.124  augustss 	/* See comment in uhci_remove_hs_ctrl() */
   1280       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1281       1.223    bouyer 	    sizeof(sqh->qh.qh_elink),
   1282       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1283       1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   1284       1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   1285       1.223    bouyer 		usb_syncmem(&sqh->dma,
   1286       1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   1287       1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   1288       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1289       1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   1290       1.124  augustss 	}
   1291        1.92  augustss 	pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh);
   1292       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1293       1.223    bouyer 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
   1294        1.42  augustss 	pqh->hlink       = sqh->hlink;
   1295        1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   1296       1.223    bouyer 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   1297       1.223    bouyer 	    sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
   1298       1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   1299         1.1  augustss 	if (sc->sc_bulk_end == sqh)
   1300         1.1  augustss 		sc->sc_bulk_end = pqh;
   1301         1.1  augustss }
   1302         1.1  augustss 
   1303       1.141  augustss Static int uhci_intr1(uhci_softc_t *);
   1304       1.141  augustss 
   1305         1.1  augustss int
   1306       1.119  augustss uhci_intr(void *arg)
   1307         1.1  augustss {
   1308        1.44  augustss 	uhci_softc_t *sc = arg;
   1309       1.146  augustss 
   1310       1.216  drochner 	if (sc->sc_dying || !device_has_power(sc->sc_dev))
   1311       1.146  augustss 		return (0);
   1312       1.141  augustss 
   1313  1.223.12.1      matt 	if (sc->sc_bus.use_polling || UREAD2(sc, UHCI_INTR) == 0) {
   1314       1.141  augustss #ifdef DIAGNOSTIC
   1315       1.179   mycroft 		DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n"));
   1316       1.141  augustss #endif
   1317       1.141  augustss 		return (0);
   1318       1.141  augustss 	}
   1319       1.179   mycroft 
   1320       1.141  augustss 	return (uhci_intr1(sc));
   1321       1.141  augustss }
   1322       1.141  augustss 
   1323       1.141  augustss int
   1324       1.141  augustss uhci_intr1(uhci_softc_t *sc)
   1325       1.141  augustss {
   1326        1.44  augustss 	int status;
   1327        1.44  augustss 	int ack;
   1328         1.1  augustss 
   1329        1.67  augustss #ifdef UHCI_DEBUG
   1330        1.44  augustss 	if (uhcidebug > 15) {
   1331       1.216  drochner 		DPRINTF(("%s: uhci_intr1\n", device_xname(sc->sc_dev)));
   1332         1.1  augustss 		uhci_dumpregs(sc);
   1333         1.1  augustss 	}
   1334         1.1  augustss #endif
   1335       1.117  augustss 
   1336       1.153  augustss 	status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS;
   1337       1.127     soren 	if (status == 0)	/* The interrupt was not for us. */
   1338       1.127     soren 		return (0);
   1339       1.127     soren 
   1340       1.117  augustss 	if (sc->sc_suspend != PWR_RESUME) {
   1341       1.201  jmcneill #ifdef DIAGNOSTIC
   1342       1.117  augustss 		printf("%s: interrupt while not operating ignored\n",
   1343       1.216  drochner 		       device_xname(sc->sc_dev));
   1344       1.201  jmcneill #endif
   1345       1.134  augustss 		UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */
   1346       1.117  augustss 		return (0);
   1347       1.117  augustss 	}
   1348        1.44  augustss 
   1349        1.44  augustss 	ack = 0;
   1350        1.44  augustss 	if (status & UHCI_STS_USBINT)
   1351        1.44  augustss 		ack |= UHCI_STS_USBINT;
   1352        1.44  augustss 	if (status & UHCI_STS_USBEI)
   1353        1.44  augustss 		ack |= UHCI_STS_USBEI;
   1354         1.1  augustss 	if (status & UHCI_STS_RD) {
   1355        1.44  augustss 		ack |= UHCI_STS_RD;
   1356       1.118  augustss #ifdef UHCI_DEBUG
   1357       1.216  drochner 		printf("%s: resume detect\n", device_xname(sc->sc_dev));
   1358       1.118  augustss #endif
   1359         1.1  augustss 	}
   1360         1.1  augustss 	if (status & UHCI_STS_HSE) {
   1361        1.44  augustss 		ack |= UHCI_STS_HSE;
   1362       1.216  drochner 		printf("%s: host system error\n", device_xname(sc->sc_dev));
   1363         1.1  augustss 	}
   1364         1.1  augustss 	if (status & UHCI_STS_HCPE) {
   1365        1.44  augustss 		ack |= UHCI_STS_HCPE;
   1366       1.152  augustss 		printf("%s: host controller process error\n",
   1367       1.216  drochner 		       device_xname(sc->sc_dev));
   1368        1.44  augustss 	}
   1369        1.44  augustss 	if (status & UHCI_STS_HCH) {
   1370        1.44  augustss 		/* no acknowledge needed */
   1371       1.136  augustss 		if (!sc->sc_dying) {
   1372       1.152  augustss 			printf("%s: host controller halted\n",
   1373       1.216  drochner 			    device_xname(sc->sc_dev));
   1374       1.110  augustss #ifdef UHCI_DEBUG
   1375       1.136  augustss 			uhci_dump_all(sc);
   1376       1.110  augustss #endif
   1377       1.136  augustss 		}
   1378       1.136  augustss 		sc->sc_dying = 1;
   1379         1.1  augustss 	}
   1380        1.44  augustss 
   1381       1.132  augustss 	if (!ack)
   1382       1.132  augustss 		return (0);	/* nothing to acknowledge */
   1383       1.132  augustss 	UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */
   1384         1.1  augustss 
   1385        1.85  augustss 	sc->sc_bus.no_intrs++;
   1386        1.85  augustss 	usb_schedsoftintr(&sc->sc_bus);
   1387        1.85  augustss 
   1388       1.216  drochner 	DPRINTFN(15, ("%s: uhci_intr: exit\n", device_xname(sc->sc_dev)));
   1389        1.85  augustss 
   1390        1.85  augustss 	return (1);
   1391        1.85  augustss }
   1392        1.85  augustss 
   1393        1.85  augustss void
   1394       1.133  augustss uhci_softintr(void *v)
   1395        1.85  augustss {
   1396       1.216  drochner 	struct usbd_bus *bus = v;
   1397       1.216  drochner 	uhci_softc_t *sc = bus->hci_private;
   1398       1.178    martin 	uhci_intr_info_t *ii, *nextii;
   1399        1.85  augustss 
   1400       1.216  drochner 	DPRINTFN(10,("%s: uhci_softintr (%d)\n", device_xname(sc->sc_dev),
   1401       1.140  augustss 		     sc->sc_bus.intr_context));
   1402        1.85  augustss 
   1403        1.51  augustss 	sc->sc_bus.intr_context++;
   1404        1.50  augustss 
   1405         1.1  augustss 	/*
   1406         1.1  augustss 	 * Interrupts on UHCI really suck.  When the host controller
   1407         1.1  augustss 	 * interrupts because a transfer is completed there is no
   1408         1.1  augustss 	 * way of knowing which transfer it was.  You can scan down
   1409         1.1  augustss 	 * the TDs and QHs of the previous frame to limit the search,
   1410         1.1  augustss 	 * but that assumes that the interrupt was not delayed by more
   1411         1.1  augustss 	 * than 1 ms, which may not always be true (e.g. after debug
   1412         1.1  augustss 	 * output on a slow console).
   1413         1.1  augustss 	 * We scan all interrupt descriptors to see if any have
   1414         1.1  augustss 	 * completed.
   1415         1.1  augustss 	 */
   1416       1.178    martin 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) {
   1417       1.178    martin 		nextii = LIST_NEXT(ii, list);
   1418         1.1  augustss 		uhci_check_intr(sc, ii);
   1419       1.178    martin 	}
   1420         1.1  augustss 
   1421       1.164  augustss #ifdef USB_USE_SOFTINTR
   1422       1.153  augustss 	if (sc->sc_softwake) {
   1423       1.153  augustss 		sc->sc_softwake = 0;
   1424       1.153  augustss 		wakeup(&sc->sc_softwake);
   1425       1.153  augustss 	}
   1426       1.164  augustss #endif /* USB_USE_SOFTINTR */
   1427       1.153  augustss 
   1428        1.51  augustss 	sc->sc_bus.intr_context--;
   1429         1.1  augustss }
   1430         1.1  augustss 
   1431         1.1  augustss /* Check for an interrupt. */
   1432         1.1  augustss void
   1433       1.205  christos uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii)
   1434         1.1  augustss {
   1435         1.1  augustss 	uhci_soft_td_t *std, *lstd;
   1436        1.18  augustss 	u_int32_t status;
   1437         1.1  augustss 
   1438         1.1  augustss 	DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
   1439         1.1  augustss #ifdef DIAGNOSTIC
   1440        1.63  augustss 	if (ii == NULL) {
   1441         1.1  augustss 		printf("uhci_check_intr: no ii? %p\n", ii);
   1442         1.1  augustss 		return;
   1443         1.1  augustss 	}
   1444         1.1  augustss #endif
   1445       1.155  augustss 	if (ii->xfer->status == USBD_CANCELLED ||
   1446       1.155  augustss 	    ii->xfer->status == USBD_TIMEOUT) {
   1447       1.155  augustss 		DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer));
   1448       1.155  augustss 		return;
   1449       1.155  augustss 	}
   1450       1.155  augustss 
   1451        1.63  augustss 	if (ii->stdstart == NULL)
   1452         1.1  augustss 		return;
   1453         1.1  augustss 	lstd = ii->stdend;
   1454         1.1  augustss #ifdef DIAGNOSTIC
   1455        1.63  augustss 	if (lstd == NULL) {
   1456         1.1  augustss 		printf("uhci_check_intr: std==0\n");
   1457         1.1  augustss 		return;
   1458         1.1  augustss 	}
   1459         1.1  augustss #endif
   1460       1.152  augustss 	/*
   1461        1.26  augustss 	 * If the last TD is still active we need to check whether there
   1462       1.186     skrll 	 * is an error somewhere in the middle, or whether there was a
   1463        1.26  augustss 	 * short packet (SPD and not ACTIVE).
   1464        1.26  augustss 	 */
   1465       1.223    bouyer 	usb_syncmem(&lstd->dma,
   1466       1.223    bouyer 	    lstd->offs + offsetof(uhci_td_t, td_status),
   1467       1.223    bouyer 	    sizeof(lstd->td.td_status),
   1468       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1469        1.88   tsutsui 	if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) {
   1470        1.92  augustss 		DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii));
   1471        1.48  augustss 		for (std = ii->stdstart; std != lstd; std = std->link.std) {
   1472       1.223    bouyer 			usb_syncmem(&std->dma,
   1473       1.223    bouyer 			    std->offs + offsetof(uhci_td_t, td_status),
   1474       1.223    bouyer 			    sizeof(std->td.td_status),
   1475       1.223    bouyer 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1476        1.88   tsutsui 			status = le32toh(std->td.td_status);
   1477       1.223    bouyer 			usb_syncmem(&std->dma,
   1478       1.223    bouyer 			    std->offs + offsetof(uhci_td_t, td_status),
   1479       1.223    bouyer 			    sizeof(std->td.td_status), BUS_DMASYNC_PREREAD);
   1480        1.83  augustss 			/* If there's an active TD the xfer isn't done. */
   1481        1.83  augustss 			if (status & UHCI_TD_ACTIVE)
   1482        1.83  augustss 				break;
   1483        1.83  augustss 			/* Any kind of error makes the xfer done. */
   1484        1.83  augustss 			if (status & UHCI_TD_STALLED)
   1485        1.83  augustss 				goto done;
   1486        1.83  augustss 			/* We want short packets, and it is short: it's done */
   1487       1.223    bouyer 			usb_syncmem(&std->dma,
   1488       1.223    bouyer 			    std->offs + offsetof(uhci_td_t, td_token),
   1489       1.223    bouyer 			    sizeof(std->td.td_token),
   1490       1.223    bouyer 			    BUS_DMASYNC_POSTWRITE);
   1491        1.83  augustss 			if ((status & UHCI_TD_SPD) &&
   1492       1.152  augustss 			      UHCI_TD_GET_ACTLEN(status) <
   1493        1.88   tsutsui 			      UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)))
   1494         1.1  augustss 				goto done;
   1495        1.18  augustss 		}
   1496        1.92  augustss 		DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n",
   1497        1.18  augustss 			      ii, ii->stdstart));
   1498       1.223    bouyer 		usb_syncmem(&lstd->dma,
   1499       1.223    bouyer 		    lstd->offs + offsetof(uhci_td_t, td_status),
   1500       1.223    bouyer 		    sizeof(lstd->td.td_status),
   1501       1.223    bouyer 		    BUS_DMASYNC_PREREAD);
   1502         1.1  augustss 		return;
   1503         1.1  augustss 	}
   1504         1.1  augustss  done:
   1505        1.92  augustss 	DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii));
   1506        1.96  augustss 	usb_uncallout(ii->xfer->timeout_handle, uhci_timeout, ii);
   1507        1.36  augustss 	uhci_idone(ii);
   1508         1.1  augustss }
   1509         1.1  augustss 
   1510        1.52  augustss /* Called at splusb() */
   1511         1.1  augustss void
   1512       1.119  augustss uhci_idone(uhci_intr_info_t *ii)
   1513         1.1  augustss {
   1514        1.63  augustss 	usbd_xfer_handle xfer = ii->xfer;
   1515        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   1516         1.1  augustss 	uhci_soft_td_t *std;
   1517        1.67  augustss 	u_int32_t status = 0, nstatus;
   1518        1.26  augustss 	int actlen;
   1519         1.1  augustss 
   1520       1.140  augustss 	DPRINTFN(12, ("uhci_idone: ii=%p\n", ii));
   1521         1.7  augustss #ifdef DIAGNOSTIC
   1522         1.7  augustss 	{
   1523         1.7  augustss 		int s = splhigh();
   1524         1.7  augustss 		if (ii->isdone) {
   1525        1.26  augustss 			splx(s);
   1526        1.92  augustss #ifdef UHCI_DEBUG
   1527        1.92  augustss 			printf("uhci_idone: ii is done!\n   ");
   1528        1.92  augustss 			uhci_dump_ii(ii);
   1529        1.92  augustss #else
   1530        1.36  augustss 			printf("uhci_idone: ii=%p is done!\n", ii);
   1531        1.92  augustss #endif
   1532         1.7  augustss 			return;
   1533         1.7  augustss 		}
   1534         1.7  augustss 		ii->isdone = 1;
   1535         1.7  augustss 		splx(s);
   1536         1.7  augustss 	}
   1537         1.7  augustss #endif
   1538        1.48  augustss 
   1539        1.63  augustss 	if (xfer->nframes != 0) {
   1540        1.48  augustss 		/* Isoc transfer, do things differently. */
   1541        1.48  augustss 		uhci_soft_td_t **stds = upipe->u.iso.stds;
   1542       1.126  augustss 		int i, n, nframes, len;
   1543        1.48  augustss 
   1544        1.48  augustss 		DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii));
   1545        1.48  augustss 
   1546        1.63  augustss 		nframes = xfer->nframes;
   1547        1.48  augustss 		actlen = 0;
   1548        1.92  augustss 		n = UXFER(xfer)->curframe;
   1549        1.48  augustss 		for (i = 0; i < nframes; i++) {
   1550        1.48  augustss 			std = stds[n];
   1551        1.59  augustss #ifdef UHCI_DEBUG
   1552        1.48  augustss 			if (uhcidebug > 5) {
   1553        1.48  augustss 				DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i));
   1554        1.48  augustss 				uhci_dump_td(std);
   1555        1.48  augustss 			}
   1556        1.48  augustss #endif
   1557        1.48  augustss 			if (++n >= UHCI_VFRAMELIST_COUNT)
   1558        1.48  augustss 				n = 0;
   1559       1.223    bouyer 			usb_syncmem(&std->dma,
   1560       1.223    bouyer 			    std->offs + offsetof(uhci_td_t, td_status),
   1561       1.223    bouyer 			    sizeof(std->td.td_status),
   1562       1.223    bouyer 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1563        1.88   tsutsui 			status = le32toh(std->td.td_status);
   1564       1.126  augustss 			len = UHCI_TD_GET_ACTLEN(status);
   1565       1.126  augustss 			xfer->frlengths[i] = len;
   1566       1.126  augustss 			actlen += len;
   1567        1.48  augustss 		}
   1568        1.48  augustss 		upipe->u.iso.inuse -= nframes;
   1569        1.63  augustss 		xfer->actlen = actlen;
   1570        1.63  augustss 		xfer->status = USBD_NORMAL_COMPLETION;
   1571       1.140  augustss 		goto end;
   1572        1.48  augustss 	}
   1573        1.48  augustss 
   1574        1.59  augustss #ifdef UHCI_DEBUG
   1575        1.65  augustss 	DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n",
   1576        1.65  augustss 		      ii, xfer, upipe));
   1577        1.48  augustss 	if (uhcidebug > 10)
   1578        1.48  augustss 		uhci_dump_tds(ii->stdstart);
   1579        1.48  augustss #endif
   1580        1.48  augustss 
   1581        1.26  augustss 	/* The transfer is done, compute actual length and status. */
   1582        1.26  augustss 	actlen = 0;
   1583        1.63  augustss 	for (std = ii->stdstart; std != NULL; std = std->link.std) {
   1584       1.223    bouyer 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   1585       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1586        1.88   tsutsui 		nstatus = le32toh(std->td.td_status);
   1587        1.64  augustss 		if (nstatus & UHCI_TD_ACTIVE)
   1588        1.26  augustss 			break;
   1589        1.67  augustss 
   1590        1.64  augustss 		status = nstatus;
   1591        1.88   tsutsui 		if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) !=
   1592        1.88   tsutsui 			UHCI_TD_PID_SETUP)
   1593        1.26  augustss 			actlen += UHCI_TD_GET_ACTLEN(status);
   1594       1.176   mycroft 		else {
   1595       1.176   mycroft 			/*
   1596       1.176   mycroft 			 * UHCI will report CRCTO in addition to a STALL or NAK
   1597       1.176   mycroft 			 * for a SETUP transaction.  See section 3.2.2, "TD
   1598       1.176   mycroft 			 * CONTROL AND STATUS".
   1599       1.176   mycroft 			 */
   1600       1.176   mycroft 			if (status & (UHCI_TD_STALLED | UHCI_TD_NAK))
   1601       1.176   mycroft 				status &= ~UHCI_TD_CRCTO;
   1602       1.176   mycroft 		}
   1603         1.1  augustss 	}
   1604        1.38  augustss 	/* If there are left over TDs we need to update the toggle. */
   1605        1.63  augustss 	if (std != NULL)
   1606        1.88   tsutsui 		upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token));
   1607        1.38  augustss 
   1608         1.1  augustss 	status &= UHCI_TD_ERROR;
   1609       1.152  augustss 	DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n",
   1610        1.26  augustss 		      actlen, status));
   1611        1.63  augustss 	xfer->actlen = actlen;
   1612         1.1  augustss 	if (status != 0) {
   1613       1.122        tv #ifdef UHCI_DEBUG
   1614       1.122        tv 		char sbuf[128];
   1615       1.122        tv 
   1616       1.147  augustss 		bitmask_snprintf((u_int32_t)status,
   1617       1.147  augustss 				 "\20\22BITSTUFF\23CRCTO\24NAK\25"
   1618       1.122        tv 				 "BABBLE\26DBUFFER\27STALLED\30ACTIVE",
   1619       1.122        tv 				 sbuf, sizeof(sbuf));
   1620       1.122        tv 
   1621        1.75  augustss 		DPRINTFN((status == UHCI_TD_STALLED)*10,
   1622        1.36  augustss 			 ("uhci_idone: error, addr=%d, endpt=0x%02x, "
   1623       1.122        tv 			  "status 0x%s\n",
   1624        1.63  augustss 			  xfer->pipe->device->address,
   1625        1.63  augustss 			  xfer->pipe->endpoint->edesc->bEndpointAddress,
   1626       1.122        tv 			  sbuf));
   1627       1.122        tv #endif
   1628       1.122        tv 
   1629         1.1  augustss 		if (status == UHCI_TD_STALLED)
   1630        1.63  augustss 			xfer->status = USBD_STALLED;
   1631         1.1  augustss 		else
   1632        1.63  augustss 			xfer->status = USBD_IOERROR; /* more info XXX */
   1633         1.1  augustss 	} else {
   1634        1.63  augustss 		xfer->status = USBD_NORMAL_COMPLETION;
   1635         1.1  augustss 	}
   1636       1.140  augustss 
   1637       1.140  augustss  end:
   1638        1.63  augustss 	usb_transfer_complete(xfer);
   1639       1.140  augustss 	DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii));
   1640         1.1  augustss }
   1641         1.1  augustss 
   1642        1.13  augustss /*
   1643        1.13  augustss  * Called when a request does not complete.
   1644        1.13  augustss  */
   1645         1.1  augustss void
   1646       1.119  augustss uhci_timeout(void *addr)
   1647         1.1  augustss {
   1648         1.1  augustss 	uhci_intr_info_t *ii = addr;
   1649       1.153  augustss 	struct uhci_xfer *uxfer = UXFER(ii->xfer);
   1650       1.153  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe;
   1651       1.216  drochner 	uhci_softc_t *sc = upipe->pipe.device->bus->hci_private;
   1652       1.153  augustss 
   1653       1.153  augustss 	DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer));
   1654       1.153  augustss 
   1655       1.153  augustss 	if (sc->sc_dying) {
   1656       1.153  augustss 		uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT);
   1657       1.153  augustss 		return;
   1658       1.153  augustss 	}
   1659         1.1  augustss 
   1660       1.153  augustss 	/* Execute the abort in a process context. */
   1661       1.156  augustss 	usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer);
   1662       1.204     joerg 	usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task,
   1663       1.204     joerg 	    USB_TASKQ_HC);
   1664       1.153  augustss }
   1665        1.51  augustss 
   1666       1.153  augustss void
   1667       1.153  augustss uhci_timeout_task(void *addr)
   1668       1.153  augustss {
   1669       1.153  augustss 	usbd_xfer_handle xfer = addr;
   1670       1.153  augustss 	int s;
   1671       1.153  augustss 
   1672       1.153  augustss 	DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer));
   1673        1.67  augustss 
   1674       1.153  augustss 	s = splusb();
   1675       1.153  augustss 	uhci_abort_xfer(xfer, USBD_TIMEOUT);
   1676       1.153  augustss 	splx(s);
   1677         1.1  augustss }
   1678         1.1  augustss 
   1679         1.1  augustss /*
   1680         1.1  augustss  * Wait here until controller claims to have an interrupt.
   1681         1.1  augustss  * Then call uhci_intr and return.  Use timeout to avoid waiting
   1682         1.1  augustss  * too long.
   1683        1.13  augustss  * Only used during boot when interrupts are not enabled yet.
   1684         1.1  augustss  */
   1685         1.1  augustss void
   1686       1.119  augustss uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer)
   1687         1.1  augustss {
   1688        1.63  augustss 	int timo = xfer->timeout;
   1689        1.13  augustss 	uhci_intr_info_t *ii;
   1690        1.13  augustss 
   1691        1.26  augustss 	DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
   1692         1.1  augustss 
   1693        1.63  augustss 	xfer->status = USBD_IN_PROGRESS;
   1694        1.26  augustss 	for (; timo >= 0; timo--) {
   1695        1.20  augustss 		usb_delay_ms(&sc->sc_bus, 1);
   1696        1.26  augustss 		DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
   1697         1.1  augustss 		if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
   1698       1.141  augustss 			uhci_intr1(sc);
   1699        1.63  augustss 			if (xfer->status != USBD_IN_PROGRESS)
   1700         1.1  augustss 				return;
   1701         1.1  augustss 		}
   1702         1.1  augustss 	}
   1703        1.13  augustss 
   1704        1.13  augustss 	/* Timeout */
   1705        1.13  augustss 	DPRINTF(("uhci_waitintr: timeout\n"));
   1706        1.13  augustss 	for (ii = LIST_FIRST(&sc->sc_intrhead);
   1707       1.152  augustss 	     ii != NULL && ii->xfer != xfer;
   1708        1.13  augustss 	     ii = LIST_NEXT(ii, list))
   1709        1.13  augustss 		;
   1710        1.41  augustss #ifdef DIAGNOSTIC
   1711        1.63  augustss 	if (ii == NULL)
   1712       1.163    provos 		panic("uhci_waitintr: lost intr_info");
   1713        1.41  augustss #endif
   1714        1.41  augustss 	uhci_idone(ii);
   1715         1.1  augustss }
   1716         1.1  augustss 
   1717         1.8  augustss void
   1718       1.119  augustss uhci_poll(struct usbd_bus *bus)
   1719         1.8  augustss {
   1720       1.216  drochner 	uhci_softc_t *sc = bus->hci_private;
   1721         1.8  augustss 
   1722         1.8  augustss 	if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT)
   1723       1.141  augustss 		uhci_intr1(sc);
   1724         1.8  augustss }
   1725         1.8  augustss 
   1726         1.1  augustss void
   1727       1.119  augustss uhci_reset(uhci_softc_t *sc)
   1728         1.1  augustss {
   1729         1.1  augustss 	int n;
   1730         1.1  augustss 
   1731         1.1  augustss 	UHCICMD(sc, UHCI_CMD_HCRESET);
   1732         1.1  augustss 	/* The reset bit goes low when the controller is done. */
   1733       1.152  augustss 	for (n = 0; n < UHCI_RESET_TIMEOUT &&
   1734         1.1  augustss 		    (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
   1735        1.92  augustss 		usb_delay_ms(&sc->sc_bus, 1);
   1736         1.1  augustss 	if (n >= UHCI_RESET_TIMEOUT)
   1737       1.152  augustss 		printf("%s: controller did not reset\n",
   1738       1.216  drochner 		       device_xname(sc->sc_dev));
   1739         1.1  augustss }
   1740         1.1  augustss 
   1741        1.16  augustss usbd_status
   1742       1.119  augustss uhci_run(uhci_softc_t *sc, int run)
   1743         1.1  augustss {
   1744         1.1  augustss 	int s, n, running;
   1745        1.71  augustss 	u_int16_t cmd;
   1746         1.1  augustss 
   1747         1.1  augustss 	run = run != 0;
   1748       1.132  augustss 	s = splhardusb();
   1749        1.30  augustss 	DPRINTF(("uhci_run: setting run=%d\n", run));
   1750        1.71  augustss 	cmd = UREAD2(sc, UHCI_CMD);
   1751        1.71  augustss 	if (run)
   1752        1.71  augustss 		cmd |= UHCI_CMD_RS;
   1753        1.71  augustss 	else
   1754        1.71  augustss 		cmd &= ~UHCI_CMD_RS;
   1755        1.71  augustss 	UHCICMD(sc, cmd);
   1756        1.13  augustss 	for(n = 0; n < 10; n++) {
   1757         1.1  augustss 		running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
   1758         1.1  augustss 		/* return when we've entered the state we want */
   1759         1.1  augustss 		if (run == running) {
   1760         1.1  augustss 			splx(s);
   1761        1.30  augustss 			DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
   1762        1.30  augustss 				 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
   1763        1.16  augustss 			return (USBD_NORMAL_COMPLETION);
   1764         1.1  augustss 		}
   1765        1.20  augustss 		usb_delay_ms(&sc->sc_bus, 1);
   1766         1.1  augustss 	}
   1767         1.1  augustss 	splx(s);
   1768       1.216  drochner 	printf("%s: cannot %s\n", device_xname(sc->sc_dev),
   1769        1.14  augustss 	       run ? "start" : "stop");
   1770        1.16  augustss 	return (USBD_IOERROR);
   1771         1.1  augustss }
   1772         1.1  augustss 
   1773         1.1  augustss /*
   1774         1.1  augustss  * Memory management routines.
   1775         1.1  augustss  *  uhci_alloc_std allocates TDs
   1776         1.1  augustss  *  uhci_alloc_sqh allocates QHs
   1777         1.7  augustss  * These two routines do their own free list management,
   1778         1.1  augustss  * partly for speed, partly because allocating DMAable memory
   1779         1.1  augustss  * has page size granularaity so much memory would be wasted if
   1780        1.16  augustss  * only one TD/QH (32 bytes) was placed in each allocated chunk.
   1781         1.1  augustss  */
   1782         1.1  augustss 
   1783         1.1  augustss uhci_soft_td_t *
   1784       1.119  augustss uhci_alloc_std(uhci_softc_t *sc)
   1785         1.1  augustss {
   1786         1.1  augustss 	uhci_soft_td_t *std;
   1787        1.63  augustss 	usbd_status err;
   1788        1.42  augustss 	int i, offs;
   1789         1.7  augustss 	usb_dma_t dma;
   1790         1.1  augustss 
   1791        1.63  augustss 	if (sc->sc_freetds == NULL) {
   1792         1.1  augustss 		DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
   1793        1.63  augustss 		err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK,
   1794        1.63  augustss 			  UHCI_TD_ALIGN, &dma);
   1795        1.63  augustss 		if (err)
   1796        1.16  augustss 			return (0);
   1797        1.43  augustss 		for(i = 0; i < UHCI_STD_CHUNK; i++) {
   1798        1.42  augustss 			offs = i * UHCI_STD_SIZE;
   1799       1.159  augustss 			std = KERNADDR(&dma, offs);
   1800       1.160  augustss 			std->physaddr = DMAADDR(&dma, offs);
   1801       1.223    bouyer 			std->dma = dma;
   1802       1.223    bouyer 			std->offs = offs;
   1803        1.42  augustss 			std->link.std = sc->sc_freetds;
   1804         1.1  augustss 			sc->sc_freetds = std;
   1805         1.1  augustss 		}
   1806         1.1  augustss 	}
   1807         1.1  augustss 	std = sc->sc_freetds;
   1808        1.42  augustss 	sc->sc_freetds = std->link.std;
   1809        1.42  augustss 	memset(&std->td, 0, sizeof(uhci_td_t));
   1810         1.1  augustss 	return std;
   1811         1.1  augustss }
   1812         1.1  augustss 
   1813         1.1  augustss void
   1814       1.119  augustss uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std)
   1815         1.1  augustss {
   1816         1.7  augustss #ifdef DIAGNOSTIC
   1817         1.7  augustss #define TD_IS_FREE 0x12345678
   1818        1.88   tsutsui 	if (le32toh(std->td.td_token) == TD_IS_FREE) {
   1819         1.7  augustss 		printf("uhci_free_std: freeing free TD %p\n", std);
   1820         1.7  augustss 		return;
   1821         1.7  augustss 	}
   1822        1.88   tsutsui 	std->td.td_token = htole32(TD_IS_FREE);
   1823         1.7  augustss #endif
   1824        1.42  augustss 	std->link.std = sc->sc_freetds;
   1825         1.1  augustss 	sc->sc_freetds = std;
   1826         1.1  augustss }
   1827         1.1  augustss 
   1828         1.1  augustss uhci_soft_qh_t *
   1829       1.119  augustss uhci_alloc_sqh(uhci_softc_t *sc)
   1830         1.1  augustss {
   1831         1.1  augustss 	uhci_soft_qh_t *sqh;
   1832        1.63  augustss 	usbd_status err;
   1833         1.1  augustss 	int i, offs;
   1834         1.7  augustss 	usb_dma_t dma;
   1835         1.1  augustss 
   1836        1.63  augustss 	if (sc->sc_freeqhs == NULL) {
   1837         1.1  augustss 		DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
   1838        1.63  augustss 		err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK,
   1839        1.63  augustss 			  UHCI_QH_ALIGN, &dma);
   1840        1.63  augustss 		if (err)
   1841        1.63  augustss 			return (0);
   1842        1.43  augustss 		for(i = 0; i < UHCI_SQH_CHUNK; i++) {
   1843        1.42  augustss 			offs = i * UHCI_SQH_SIZE;
   1844       1.159  augustss 			sqh = KERNADDR(&dma, offs);
   1845       1.160  augustss 			sqh->physaddr = DMAADDR(&dma, offs);
   1846       1.223    bouyer 			sqh->dma = dma;
   1847       1.223    bouyer 			sqh->offs = offs;
   1848        1.42  augustss 			sqh->hlink = sc->sc_freeqhs;
   1849         1.1  augustss 			sc->sc_freeqhs = sqh;
   1850         1.1  augustss 		}
   1851         1.1  augustss 	}
   1852         1.1  augustss 	sqh = sc->sc_freeqhs;
   1853        1.42  augustss 	sc->sc_freeqhs = sqh->hlink;
   1854        1.42  augustss 	memset(&sqh->qh, 0, sizeof(uhci_qh_t));
   1855        1.16  augustss 	return (sqh);
   1856         1.1  augustss }
   1857         1.1  augustss 
   1858         1.1  augustss void
   1859       1.119  augustss uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   1860         1.1  augustss {
   1861        1.42  augustss 	sqh->hlink = sc->sc_freeqhs;
   1862         1.1  augustss 	sc->sc_freeqhs = sqh;
   1863         1.1  augustss }
   1864         1.1  augustss 
   1865         1.1  augustss void
   1866       1.119  augustss uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std,
   1867       1.119  augustss 		    uhci_soft_td_t *stdend)
   1868         1.1  augustss {
   1869         1.1  augustss 	uhci_soft_td_t *p;
   1870         1.1  augustss 
   1871       1.223    bouyer 	/*
   1872       1.223    bouyer 	 * to avoid race condition with the controller which may be looking
   1873       1.223    bouyer 	 * at this chain, we need to first invalidate all links, and
   1874       1.223    bouyer 	 * then wait for the controller to move to another queue
   1875       1.223    bouyer 	 */
   1876       1.223    bouyer 	for (p = std; p != stdend; p = p->link.std) {
   1877       1.223    bouyer 		usb_syncmem(&p->dma,
   1878       1.223    bouyer 		    p->offs + offsetof(uhci_td_t, td_link),
   1879       1.223    bouyer 		    sizeof(p->td.td_link),
   1880       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1881       1.223    bouyer 		if ((p->td.td_link & UHCI_PTR_T) == 0) {
   1882       1.223    bouyer 			p->td.td_link = UHCI_PTR_T;
   1883       1.223    bouyer 			usb_syncmem(&p->dma,
   1884       1.223    bouyer 			    p->offs + offsetof(uhci_td_t, td_link),
   1885       1.223    bouyer 			    sizeof(p->td.td_link),
   1886       1.223    bouyer 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1887       1.223    bouyer 		}
   1888       1.223    bouyer 	}
   1889       1.223    bouyer 	delay(UHCI_QH_REMOVE_DELAY);
   1890       1.223    bouyer 
   1891         1.1  augustss 	for (; std != stdend; std = p) {
   1892        1.42  augustss 		p = std->link.std;
   1893         1.1  augustss 		uhci_free_std(sc, std);
   1894         1.1  augustss 	}
   1895         1.1  augustss }
   1896         1.1  augustss 
   1897         1.1  augustss usbd_status
   1898       1.119  augustss uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len,
   1899       1.119  augustss 		     int rd, u_int16_t flags, usb_dma_t *dma,
   1900       1.119  augustss 		     uhci_soft_td_t **sp, uhci_soft_td_t **ep)
   1901         1.1  augustss {
   1902         1.1  augustss 	uhci_soft_td_t *p, *lastp;
   1903         1.1  augustss 	uhci_physaddr_t lastlink;
   1904         1.1  augustss 	int i, ntd, l, tog, maxp;
   1905        1.18  augustss 	u_int32_t status;
   1906         1.1  augustss 	int addr = upipe->pipe.device->address;
   1907         1.1  augustss 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   1908         1.1  augustss 
   1909       1.144  augustss 	DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d "
   1910       1.152  augustss 		      "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len,
   1911       1.144  augustss 		      upipe->pipe.device->speed, flags));
   1912         1.4  augustss 	maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
   1913         1.1  augustss 	if (maxp == 0) {
   1914         1.1  augustss 		printf("uhci_alloc_std_chain: maxp=0\n");
   1915         1.1  augustss 		return (USBD_INVAL);
   1916         1.1  augustss 	}
   1917         1.1  augustss 	ntd = (len + maxp - 1) / maxp;
   1918        1.73  augustss 	if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0)
   1919        1.73  augustss 		ntd++;
   1920        1.39  augustss 	DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd));
   1921        1.73  augustss 	if (ntd == 0) {
   1922        1.73  augustss 		*sp = *ep = 0;
   1923        1.73  augustss 		DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n"));
   1924        1.73  augustss 		return (USBD_NORMAL_COMPLETION);
   1925        1.73  augustss 	}
   1926        1.38  augustss 	tog = upipe->nexttoggle;
   1927         1.1  augustss 	if (ntd % 2 == 0)
   1928         1.1  augustss 		tog ^= 1;
   1929        1.32  augustss 	upipe->nexttoggle = tog ^ 1;
   1930       1.121  augustss 	lastp = NULL;
   1931         1.1  augustss 	lastlink = UHCI_PTR_T;
   1932         1.1  augustss 	ntd--;
   1933        1.33  augustss 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
   1934       1.144  augustss 	if (upipe->pipe.device->speed == USB_SPEED_LOW)
   1935        1.18  augustss 		status |= UHCI_TD_LS;
   1936        1.73  augustss 	if (flags & USBD_SHORT_XFER_OK)
   1937        1.18  augustss 		status |= UHCI_TD_SPD;
   1938       1.223    bouyer 	usb_syncmem(dma, 0, len,
   1939       1.223    bouyer 	    rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   1940         1.1  augustss 	for (i = ntd; i >= 0; i--) {
   1941         1.1  augustss 		p = uhci_alloc_std(sc);
   1942        1.63  augustss 		if (p == NULL) {
   1943       1.202  christos 			KASSERT(lastp != NULL);
   1944       1.149  augustss 			uhci_free_std_chain(sc, lastp, NULL);
   1945         1.1  augustss 			return (USBD_NOMEM);
   1946         1.1  augustss 		}
   1947        1.42  augustss 		p->link.std = lastp;
   1948       1.121  augustss 		p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD);
   1949         1.1  augustss 		lastp = p;
   1950         1.1  augustss 		lastlink = p->physaddr;
   1951        1.88   tsutsui 		p->td.td_status = htole32(status);
   1952         1.1  augustss 		if (i == ntd) {
   1953         1.1  augustss 			/* last TD */
   1954         1.1  augustss 			l = len % maxp;
   1955        1.73  augustss 			if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER))
   1956        1.73  augustss 				l = maxp;
   1957         1.1  augustss 			*ep = p;
   1958         1.1  augustss 		} else
   1959         1.1  augustss 			l = maxp;
   1960       1.152  augustss 		p->td.td_token =
   1961        1.88   tsutsui 		    htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) :
   1962        1.88   tsutsui 				 UHCI_TD_OUT(l, endpt, addr, tog));
   1963       1.160  augustss 		p->td.td_buffer = htole32(DMAADDR(dma, i * maxp));
   1964       1.223    bouyer 		usb_syncmem(&p->dma, p->offs, sizeof(p->td),
   1965       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1966         1.1  augustss 		tog ^= 1;
   1967         1.1  augustss 	}
   1968         1.1  augustss 	*sp = lastp;
   1969       1.152  augustss 	DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n",
   1970        1.38  augustss 		      upipe->nexttoggle));
   1971         1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   1972         1.1  augustss }
   1973         1.1  augustss 
   1974        1.38  augustss void
   1975       1.119  augustss uhci_device_clear_toggle(usbd_pipe_handle pipe)
   1976        1.38  augustss {
   1977        1.38  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   1978        1.38  augustss 	upipe->nexttoggle = 0;
   1979        1.38  augustss }
   1980        1.38  augustss 
   1981        1.38  augustss void
   1982       1.205  christos uhci_noop(usbd_pipe_handle pipe)
   1983        1.38  augustss {
   1984        1.38  augustss }
   1985        1.38  augustss 
   1986         1.1  augustss usbd_status
   1987       1.119  augustss uhci_device_bulk_transfer(usbd_xfer_handle xfer)
   1988         1.1  augustss {
   1989        1.63  augustss 	usbd_status err;
   1990        1.16  augustss 
   1991        1.52  augustss 	/* Insert last in queue. */
   1992        1.63  augustss 	err = usb_insert_transfer(xfer);
   1993        1.63  augustss 	if (err)
   1994        1.63  augustss 		return (err);
   1995        1.52  augustss 
   1996       1.152  augustss 	/*
   1997        1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   1998        1.92  augustss 	 * so start it first.
   1999        1.67  augustss 	 */
   2000        1.63  augustss 	return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2001        1.16  augustss }
   2002        1.16  augustss 
   2003        1.16  augustss usbd_status
   2004       1.119  augustss uhci_device_bulk_start(usbd_xfer_handle xfer)
   2005        1.16  augustss {
   2006        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2007         1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2008       1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2009        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2010        1.55  augustss 	uhci_soft_td_t *data, *dataend;
   2011         1.1  augustss 	uhci_soft_qh_t *sqh;
   2012        1.63  augustss 	usbd_status err;
   2013        1.45  augustss 	int len, isread, endpt;
   2014         1.1  augustss 	int s;
   2015         1.1  augustss 
   2016       1.169  augustss 	DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n",
   2017       1.169  augustss 		     xfer, xfer->length, xfer->flags, ii));
   2018         1.1  augustss 
   2019        1.82  augustss 	if (sc->sc_dying)
   2020        1.82  augustss 		return (USBD_IOERROR);
   2021        1.82  augustss 
   2022        1.48  augustss #ifdef DIAGNOSTIC
   2023        1.63  augustss 	if (xfer->rqflags & URQ_REQUEST)
   2024       1.163    provos 		panic("uhci_device_bulk_transfer: a request");
   2025        1.48  augustss #endif
   2026         1.1  augustss 
   2027        1.63  augustss 	len = xfer->length;
   2028       1.102  augustss 	endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2029        1.45  augustss 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2030         1.1  augustss 	sqh = upipe->u.bulk.sqh;
   2031         1.1  augustss 
   2032         1.1  augustss 	upipe->u.bulk.isread = isread;
   2033         1.1  augustss 	upipe->u.bulk.length = len;
   2034         1.1  augustss 
   2035        1.73  augustss 	err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
   2036        1.73  augustss 				   &xfer->dmabuf, &data, &dataend);
   2037        1.63  augustss 	if (err)
   2038        1.63  augustss 		return (err);
   2039        1.88   tsutsui 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2040       1.223    bouyer 	usb_syncmem(&dataend->dma,
   2041       1.223    bouyer 	    dataend->offs + offsetof(uhci_td_t, td_status),
   2042       1.223    bouyer 	    sizeof(dataend->td.td_status),
   2043       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2044       1.223    bouyer 
   2045         1.1  augustss 
   2046        1.59  augustss #ifdef UHCI_DEBUG
   2047        1.33  augustss 	if (uhcidebug > 8) {
   2048        1.55  augustss 		DPRINTF(("uhci_device_bulk_transfer: data(1)\n"));
   2049        1.55  augustss 		uhci_dump_tds(data);
   2050         1.1  augustss 	}
   2051         1.1  augustss #endif
   2052         1.1  augustss 
   2053         1.1  augustss 	/* Set up interrupt info. */
   2054        1.63  augustss 	ii->xfer = xfer;
   2055        1.55  augustss 	ii->stdstart = data;
   2056        1.55  augustss 	ii->stdend = dataend;
   2057         1.7  augustss #ifdef DIAGNOSTIC
   2058        1.70  augustss 	if (!ii->isdone) {
   2059        1.70  augustss 		printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii);
   2060        1.70  augustss 	}
   2061         1.7  augustss 	ii->isdone = 0;
   2062         1.7  augustss #endif
   2063         1.1  augustss 
   2064        1.55  augustss 	sqh->elink = data;
   2065       1.121  augustss 	sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2066       1.223    bouyer 	/* uhci_add_bulk() will do usb_syncmem(sqh) */
   2067         1.1  augustss 
   2068         1.1  augustss 	s = splusb();
   2069         1.1  augustss 	uhci_add_bulk(sc, sqh);
   2070        1.92  augustss 	uhci_add_intr_info(sc, ii);
   2071         1.1  augustss 
   2072        1.63  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   2073       1.171   tsutsui 		usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
   2074        1.91  augustss 			    uhci_timeout, ii);
   2075        1.13  augustss 	}
   2076        1.92  augustss 	xfer->status = USBD_IN_PROGRESS;
   2077         1.1  augustss 	splx(s);
   2078         1.1  augustss 
   2079        1.59  augustss #ifdef UHCI_DEBUG
   2080         1.1  augustss 	if (uhcidebug > 10) {
   2081        1.55  augustss 		DPRINTF(("uhci_device_bulk_transfer: data(2)\n"));
   2082        1.55  augustss 		uhci_dump_tds(data);
   2083         1.1  augustss 	}
   2084         1.1  augustss #endif
   2085         1.1  augustss 
   2086        1.26  augustss 	if (sc->sc_bus.use_polling)
   2087        1.63  augustss 		uhci_waitintr(sc, xfer);
   2088        1.26  augustss 
   2089         1.1  augustss 	return (USBD_IN_PROGRESS);
   2090         1.1  augustss }
   2091         1.1  augustss 
   2092         1.1  augustss /* Abort a device bulk request. */
   2093         1.1  augustss void
   2094       1.119  augustss uhci_device_bulk_abort(usbd_xfer_handle xfer)
   2095         1.1  augustss {
   2096        1.33  augustss 	DPRINTF(("uhci_device_bulk_abort:\n"));
   2097        1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2098        1.33  augustss }
   2099        1.33  augustss 
   2100        1.92  augustss /*
   2101       1.154  augustss  * Abort a device request.
   2102       1.154  augustss  * If this routine is called at splusb() it guarantees that the request
   2103       1.154  augustss  * will be removed from the hardware scheduling and that the callback
   2104       1.154  augustss  * for it will be called with USBD_CANCELLED status.
   2105       1.154  augustss  * It's impossible to guarantee that the requested transfer will not
   2106       1.154  augustss  * have happened since the hardware runs concurrently.
   2107       1.154  augustss  * If the transaction has already happened we rely on the ordinary
   2108       1.154  augustss  * interrupt processing to process it.
   2109        1.92  augustss  */
   2110        1.33  augustss void
   2111       1.119  augustss uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
   2112        1.33  augustss {
   2113        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2114       1.153  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2115       1.216  drochner 	uhci_softc_t *sc = upipe->pipe.device->bus->hci_private;
   2116        1.33  augustss 	uhci_soft_td_t *std;
   2117        1.92  augustss 	int s;
   2118       1.188  augustss 	int wake;
   2119        1.65  augustss 
   2120       1.106  augustss 	DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status));
   2121        1.33  augustss 
   2122       1.153  augustss 	if (sc->sc_dying) {
   2123       1.153  augustss 		/* If we're dying, just do the software part. */
   2124       1.153  augustss 		s = splusb();
   2125       1.153  augustss 		xfer->status = status;	/* make software ignore it */
   2126       1.157   tsutsui 		usb_uncallout(xfer->timeout_handle, uhci_timeout, xfer);
   2127       1.153  augustss 		usb_transfer_complete(xfer);
   2128        1.92  augustss 		splx(s);
   2129       1.194  christos 		return;
   2130        1.92  augustss 	}
   2131        1.92  augustss 
   2132       1.153  augustss 	if (xfer->device->bus->intr_context || !curproc)
   2133       1.163    provos 		panic("uhci_abort_xfer: not in process context");
   2134       1.153  augustss 
   2135       1.153  augustss 	/*
   2136       1.188  augustss 	 * If an abort is already in progress then just wait for it to
   2137       1.188  augustss 	 * complete and return.
   2138       1.188  augustss 	 */
   2139       1.188  augustss 	if (xfer->hcflags & UXFER_ABORTING) {
   2140       1.188  augustss 		DPRINTFN(2, ("uhci_abort_xfer: already aborting\n"));
   2141       1.188  augustss #ifdef DIAGNOSTIC
   2142       1.188  augustss 		if (status == USBD_TIMEOUT)
   2143       1.188  augustss 			printf("uhci_abort_xfer: TIMEOUT while aborting\n");
   2144       1.188  augustss #endif
   2145       1.188  augustss 		/* Override the status which might be USBD_TIMEOUT. */
   2146       1.188  augustss 		xfer->status = status;
   2147       1.188  augustss 		DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n"));
   2148       1.188  augustss 		xfer->hcflags |= UXFER_ABORTWAIT;
   2149       1.188  augustss 		while (xfer->hcflags & UXFER_ABORTING)
   2150       1.188  augustss 			tsleep(&xfer->hcflags, PZERO, "uhciaw", 0);
   2151       1.188  augustss 		return;
   2152       1.188  augustss 	}
   2153       1.188  augustss 	xfer->hcflags |= UXFER_ABORTING;
   2154       1.188  augustss 
   2155       1.188  augustss 	/*
   2156       1.153  augustss 	 * Step 1: Make interrupt routine and hardware ignore xfer.
   2157       1.153  augustss 	 */
   2158       1.153  augustss 	s = splusb();
   2159       1.153  augustss 	xfer->status = status;	/* make software ignore it */
   2160       1.106  augustss 	usb_uncallout(xfer->timeout_handle, uhci_timeout, ii);
   2161       1.153  augustss 	DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii));
   2162       1.223    bouyer 	for (std = ii->stdstart; std != NULL; std = std->link.std) {
   2163       1.223    bouyer 		usb_syncmem(&std->dma,
   2164       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2165       1.223    bouyer 		    sizeof(std->td.td_status),
   2166       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2167        1.92  augustss 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
   2168       1.223    bouyer 		usb_syncmem(&std->dma,
   2169       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2170       1.223    bouyer 		    sizeof(std->td.td_status),
   2171       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2172       1.223    bouyer 	}
   2173       1.153  augustss 	splx(s);
   2174        1.92  augustss 
   2175       1.162  augustss 	/*
   2176       1.153  augustss 	 * Step 2: Wait until we know hardware has finished any possible
   2177       1.153  augustss 	 * use of the xfer.  Also make sure the soft interrupt routine
   2178       1.153  augustss 	 * has run.
   2179       1.153  augustss 	 */
   2180       1.154  augustss 	usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */
   2181       1.153  augustss 	s = splusb();
   2182       1.164  augustss #ifdef USB_USE_SOFTINTR
   2183       1.153  augustss 	sc->sc_softwake = 1;
   2184       1.164  augustss #endif /* USB_USE_SOFTINTR */
   2185       1.153  augustss 	usb_schedsoftintr(&sc->sc_bus);
   2186       1.164  augustss #ifdef USB_USE_SOFTINTR
   2187       1.154  augustss 	DPRINTFN(1,("uhci_abort_xfer: tsleep\n"));
   2188       1.153  augustss 	tsleep(&sc->sc_softwake, PZERO, "uhciab", 0);
   2189       1.164  augustss #endif /* USB_USE_SOFTINTR */
   2190       1.153  augustss 	splx(s);
   2191       1.162  augustss 
   2192       1.153  augustss 	/*
   2193       1.153  augustss 	 * Step 3: Execute callback.
   2194       1.153  augustss 	 */
   2195       1.154  augustss 	DPRINTFN(1,("uhci_abort_xfer: callback\n"));
   2196        1.92  augustss 	s = splusb();
   2197       1.100  augustss #ifdef DIAGNOSTIC
   2198       1.106  augustss 	ii->isdone = 1;
   2199       1.100  augustss #endif
   2200       1.188  augustss 	wake = xfer->hcflags & UXFER_ABORTWAIT;
   2201       1.188  augustss 	xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
   2202       1.106  augustss 	usb_transfer_complete(xfer);
   2203       1.188  augustss 	if (wake)
   2204       1.188  augustss 		wakeup(&xfer->hcflags);
   2205        1.33  augustss 	splx(s);
   2206         1.1  augustss }
   2207         1.1  augustss 
   2208         1.1  augustss /* Close a device bulk pipe. */
   2209         1.1  augustss void
   2210       1.119  augustss uhci_device_bulk_close(usbd_pipe_handle pipe)
   2211         1.1  augustss {
   2212         1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2213         1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2214       1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2215         1.1  augustss 
   2216         1.1  augustss 	uhci_free_sqh(sc, upipe->u.bulk.sqh);
   2217         1.1  augustss }
   2218         1.1  augustss 
   2219         1.1  augustss usbd_status
   2220       1.119  augustss uhci_device_ctrl_transfer(usbd_xfer_handle xfer)
   2221         1.1  augustss {
   2222        1.63  augustss 	usbd_status err;
   2223        1.16  augustss 
   2224        1.52  augustss 	/* Insert last in queue. */
   2225        1.63  augustss 	err = usb_insert_transfer(xfer);
   2226        1.63  augustss 	if (err)
   2227        1.63  augustss 		return (err);
   2228        1.52  augustss 
   2229       1.152  augustss 	/*
   2230        1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2231        1.92  augustss 	 * so start it first.
   2232        1.67  augustss 	 */
   2233        1.63  augustss 	return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2234        1.16  augustss }
   2235        1.16  augustss 
   2236        1.16  augustss usbd_status
   2237       1.119  augustss uhci_device_ctrl_start(usbd_xfer_handle xfer)
   2238        1.16  augustss {
   2239       1.216  drochner 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   2240        1.63  augustss 	usbd_status err;
   2241         1.1  augustss 
   2242        1.82  augustss 	if (sc->sc_dying)
   2243        1.82  augustss 		return (USBD_IOERROR);
   2244        1.82  augustss 
   2245        1.48  augustss #ifdef DIAGNOSTIC
   2246        1.63  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   2247       1.163    provos 		panic("uhci_device_ctrl_transfer: not a request");
   2248        1.48  augustss #endif
   2249         1.1  augustss 
   2250        1.63  augustss 	err = uhci_device_request(xfer);
   2251        1.63  augustss 	if (err)
   2252        1.63  augustss 		return (err);
   2253         1.1  augustss 
   2254         1.9  augustss 	if (sc->sc_bus.use_polling)
   2255        1.63  augustss 		uhci_waitintr(sc, xfer);
   2256         1.1  augustss 	return (USBD_IN_PROGRESS);
   2257         1.1  augustss }
   2258         1.1  augustss 
   2259         1.1  augustss usbd_status
   2260       1.119  augustss uhci_device_intr_transfer(usbd_xfer_handle xfer)
   2261         1.1  augustss {
   2262        1.63  augustss 	usbd_status err;
   2263        1.16  augustss 
   2264        1.52  augustss 	/* Insert last in queue. */
   2265        1.63  augustss 	err = usb_insert_transfer(xfer);
   2266        1.63  augustss 	if (err)
   2267        1.63  augustss 		return (err);
   2268        1.52  augustss 
   2269       1.152  augustss 	/*
   2270        1.92  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   2271        1.92  augustss 	 * so start it first.
   2272        1.67  augustss 	 */
   2273        1.63  augustss 	return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   2274        1.16  augustss }
   2275        1.16  augustss 
   2276        1.16  augustss usbd_status
   2277       1.119  augustss uhci_device_intr_start(usbd_xfer_handle xfer)
   2278        1.16  augustss {
   2279        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2280         1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2281       1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2282        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2283        1.55  augustss 	uhci_soft_td_t *data, *dataend;
   2284         1.1  augustss 	uhci_soft_qh_t *sqh;
   2285        1.63  augustss 	usbd_status err;
   2286       1.187     skrll 	int isread, endpt;
   2287        1.49  augustss 	int i, s;
   2288         1.1  augustss 
   2289        1.82  augustss 	if (sc->sc_dying)
   2290        1.82  augustss 		return (USBD_IOERROR);
   2291        1.82  augustss 
   2292        1.63  augustss 	DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n",
   2293        1.63  augustss 		    xfer, xfer->length, xfer->flags));
   2294         1.1  augustss 
   2295        1.48  augustss #ifdef DIAGNOSTIC
   2296        1.63  augustss 	if (xfer->rqflags & URQ_REQUEST)
   2297       1.163    provos 		panic("uhci_device_intr_transfer: a request");
   2298        1.48  augustss #endif
   2299         1.1  augustss 
   2300       1.187     skrll 	endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2301       1.187     skrll 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2302       1.187     skrll 
   2303       1.187     skrll 	upipe->u.intr.isread = isread;
   2304       1.187     skrll 
   2305       1.187     skrll 	err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread,
   2306       1.187     skrll 				   xfer->flags, &xfer->dmabuf, &data,
   2307       1.187     skrll 				   &dataend);
   2308        1.63  augustss 	if (err)
   2309        1.63  augustss 		return (err);
   2310        1.88   tsutsui 	dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2311       1.223    bouyer 	usb_syncmem(&dataend->dma,
   2312       1.223    bouyer 	    dataend->offs + offsetof(uhci_td_t, td_status),
   2313       1.223    bouyer 	    sizeof(dataend->td.td_status),
   2314       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2315         1.1  augustss 
   2316        1.59  augustss #ifdef UHCI_DEBUG
   2317         1.1  augustss 	if (uhcidebug > 10) {
   2318        1.55  augustss 		DPRINTF(("uhci_device_intr_transfer: data(1)\n"));
   2319        1.55  augustss 		uhci_dump_tds(data);
   2320         1.1  augustss 		uhci_dump_qh(upipe->u.intr.qhs[0]);
   2321         1.1  augustss 	}
   2322         1.1  augustss #endif
   2323         1.1  augustss 
   2324         1.1  augustss 	s = splusb();
   2325         1.1  augustss 	/* Set up interrupt info. */
   2326        1.63  augustss 	ii->xfer = xfer;
   2327        1.55  augustss 	ii->stdstart = data;
   2328        1.55  augustss 	ii->stdend = dataend;
   2329         1.7  augustss #ifdef DIAGNOSTIC
   2330        1.70  augustss 	if (!ii->isdone) {
   2331        1.70  augustss 		printf("uhci_device_intr_transfer: not done, ii=%p\n", ii);
   2332        1.70  augustss 	}
   2333         1.7  augustss 	ii->isdone = 0;
   2334         1.7  augustss #endif
   2335         1.1  augustss 
   2336       1.152  augustss 	DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
   2337        1.12  augustss 		     upipe->u.intr.qhs[0]));
   2338         1.1  augustss 	for (i = 0; i < upipe->u.intr.npoll; i++) {
   2339         1.1  augustss 		sqh = upipe->u.intr.qhs[i];
   2340        1.55  augustss 		sqh->elink = data;
   2341       1.121  augustss 		sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   2342       1.223    bouyer 		usb_syncmem(&sqh->dma,
   2343       1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   2344       1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   2345       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2346         1.1  augustss 	}
   2347        1.92  augustss 	uhci_add_intr_info(sc, ii);
   2348        1.92  augustss 	xfer->status = USBD_IN_PROGRESS;
   2349         1.1  augustss 	splx(s);
   2350         1.1  augustss 
   2351        1.59  augustss #ifdef UHCI_DEBUG
   2352         1.1  augustss 	if (uhcidebug > 10) {
   2353        1.55  augustss 		DPRINTF(("uhci_device_intr_transfer: data(2)\n"));
   2354        1.55  augustss 		uhci_dump_tds(data);
   2355         1.1  augustss 		uhci_dump_qh(upipe->u.intr.qhs[0]);
   2356         1.1  augustss 	}
   2357         1.1  augustss #endif
   2358         1.1  augustss 
   2359         1.1  augustss 	return (USBD_IN_PROGRESS);
   2360         1.1  augustss }
   2361         1.1  augustss 
   2362         1.1  augustss /* Abort a device control request. */
   2363         1.1  augustss void
   2364       1.119  augustss uhci_device_ctrl_abort(usbd_xfer_handle xfer)
   2365         1.1  augustss {
   2366        1.33  augustss 	DPRINTF(("uhci_device_ctrl_abort:\n"));
   2367        1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2368         1.1  augustss }
   2369         1.1  augustss 
   2370         1.1  augustss /* Close a device control pipe. */
   2371         1.1  augustss void
   2372       1.205  christos uhci_device_ctrl_close(usbd_pipe_handle pipe)
   2373         1.1  augustss {
   2374         1.1  augustss }
   2375         1.1  augustss 
   2376         1.1  augustss /* Abort a device interrupt request. */
   2377         1.1  augustss void
   2378       1.119  augustss uhci_device_intr_abort(usbd_xfer_handle xfer)
   2379         1.1  augustss {
   2380        1.63  augustss 	DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer));
   2381        1.63  augustss 	if (xfer->pipe->intrxfer == xfer) {
   2382        1.36  augustss 		DPRINTFN(1,("uhci_device_intr_abort: remove\n"));
   2383       1.154  augustss 		xfer->pipe->intrxfer = NULL;
   2384         1.1  augustss 	}
   2385        1.66  augustss 	uhci_abort_xfer(xfer, USBD_CANCELLED);
   2386         1.1  augustss }
   2387         1.1  augustss 
   2388         1.1  augustss /* Close a device interrupt pipe. */
   2389         1.1  augustss void
   2390       1.119  augustss uhci_device_intr_close(usbd_pipe_handle pipe)
   2391         1.1  augustss {
   2392         1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2393       1.216  drochner 	uhci_softc_t *sc = pipe->device->bus->hci_private;
   2394        1.92  augustss 	int i, npoll;
   2395        1.92  augustss 	int s;
   2396         1.1  augustss 
   2397         1.1  augustss 	/* Unlink descriptors from controller data structures. */
   2398         1.1  augustss 	npoll = upipe->u.intr.npoll;
   2399        1.92  augustss 	s = splusb();
   2400         1.1  augustss 	for (i = 0; i < npoll; i++)
   2401        1.92  augustss 		uhci_remove_intr(sc, upipe->u.intr.qhs[i]);
   2402        1.92  augustss 	splx(s);
   2403         1.1  augustss 
   2404       1.152  augustss 	/*
   2405         1.1  augustss 	 * We now have to wait for any activity on the physical
   2406         1.1  augustss 	 * descriptors to stop.
   2407         1.1  augustss 	 */
   2408        1.20  augustss 	usb_delay_ms(&sc->sc_bus, 2);
   2409         1.1  augustss 
   2410         1.1  augustss 	for(i = 0; i < npoll; i++)
   2411         1.1  augustss 		uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
   2412        1.31  augustss 	free(upipe->u.intr.qhs, M_USBHC);
   2413         1.1  augustss 
   2414         1.1  augustss 	/* XXX free other resources */
   2415         1.1  augustss }
   2416         1.1  augustss 
   2417         1.1  augustss usbd_status
   2418       1.119  augustss uhci_device_request(usbd_xfer_handle xfer)
   2419         1.1  augustss {
   2420        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2421        1.63  augustss 	usb_device_request_t *req = &xfer->request;
   2422         1.1  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2423       1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2424         1.1  augustss 	int addr = dev->address;
   2425         1.1  augustss 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2426        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2427        1.55  augustss 	uhci_soft_td_t *setup, *data, *stat, *next, *dataend;
   2428         1.1  augustss 	uhci_soft_qh_t *sqh;
   2429         1.1  augustss 	int len;
   2430         1.1  augustss 	u_int32_t ls;
   2431        1.63  augustss 	usbd_status err;
   2432         1.1  augustss 	int isread;
   2433         1.1  augustss 	int s;
   2434         1.1  augustss 
   2435        1.13  augustss 	DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
   2436        1.12  augustss 		    "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
   2437         1.1  augustss 		    req->bmRequestType, req->bRequest, UGETW(req->wValue),
   2438         1.1  augustss 		    UGETW(req->wIndex), UGETW(req->wLength),
   2439         1.1  augustss 		    addr, endpt));
   2440         1.1  augustss 
   2441       1.144  augustss 	ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0;
   2442         1.1  augustss 	isread = req->bmRequestType & UT_READ;
   2443         1.1  augustss 	len = UGETW(req->wLength);
   2444         1.1  augustss 
   2445         1.1  augustss 	setup = upipe->u.ctl.setup;
   2446         1.1  augustss 	stat = upipe->u.ctl.stat;
   2447         1.1  augustss 	sqh = upipe->u.ctl.sqh;
   2448         1.1  augustss 
   2449         1.1  augustss 	/* Set up data transaction */
   2450         1.1  augustss 	if (len != 0) {
   2451        1.38  augustss 		upipe->nexttoggle = 1;
   2452        1.73  augustss 		err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
   2453        1.73  augustss 					   &xfer->dmabuf, &data, &dataend);
   2454        1.63  augustss 		if (err)
   2455        1.63  augustss 			return (err);
   2456        1.55  augustss 		next = data;
   2457        1.55  augustss 		dataend->link.std = stat;
   2458       1.121  augustss 		dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
   2459       1.223    bouyer 		usb_syncmem(&dataend->dma,
   2460       1.223    bouyer 		    dataend->offs + offsetof(uhci_td_t, td_link),
   2461       1.223    bouyer 		    sizeof(dataend->td.td_link),
   2462       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2463         1.1  augustss 	} else {
   2464         1.1  augustss 		next = stat;
   2465         1.1  augustss 	}
   2466         1.1  augustss 	upipe->u.ctl.length = len;
   2467         1.1  augustss 
   2468       1.159  augustss 	memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req);
   2469       1.223    bouyer 	usb_syncmem(&upipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE);
   2470         1.1  augustss 
   2471        1.42  augustss 	setup->link.std = next;
   2472       1.121  augustss 	setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
   2473        1.88   tsutsui 	setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
   2474        1.88   tsutsui 		UHCI_TD_ACTIVE);
   2475        1.88   tsutsui 	setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr));
   2476       1.160  augustss 	setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0));
   2477       1.223    bouyer 	usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td),
   2478       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2479        1.42  augustss 
   2480        1.92  augustss 	stat->link.std = NULL;
   2481        1.88   tsutsui 	stat->td.td_link = htole32(UHCI_PTR_T);
   2482       1.152  augustss 	stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
   2483        1.39  augustss 		UHCI_TD_ACTIVE | UHCI_TD_IOC);
   2484       1.152  augustss 	stat->td.td_token =
   2485        1.88   tsutsui 		htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
   2486        1.88   tsutsui 		                 UHCI_TD_IN (0, endpt, addr, 1));
   2487        1.88   tsutsui 	stat->td.td_buffer = htole32(0);
   2488       1.223    bouyer 	usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td),
   2489       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2490         1.1  augustss 
   2491        1.59  augustss #ifdef UHCI_DEBUG
   2492        1.67  augustss 	if (uhcidebug > 10) {
   2493        1.47  augustss 		DPRINTF(("uhci_device_request: before transfer\n"));
   2494        1.41  augustss 		uhci_dump_tds(setup);
   2495         1.1  augustss 	}
   2496         1.1  augustss #endif
   2497         1.1  augustss 
   2498         1.1  augustss 	/* Set up interrupt info. */
   2499        1.63  augustss 	ii->xfer = xfer;
   2500         1.1  augustss 	ii->stdstart = setup;
   2501         1.1  augustss 	ii->stdend = stat;
   2502         1.7  augustss #ifdef DIAGNOSTIC
   2503        1.70  augustss 	if (!ii->isdone) {
   2504        1.70  augustss 		printf("uhci_device_request: not done, ii=%p\n", ii);
   2505        1.70  augustss 	}
   2506         1.7  augustss 	ii->isdone = 0;
   2507         1.7  augustss #endif
   2508         1.1  augustss 
   2509        1.42  augustss 	sqh->elink = setup;
   2510       1.121  augustss 	sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD);
   2511       1.223    bouyer 	/* uhci_add_?s_ctrl() will do usb_syncmem(sqh) */
   2512         1.1  augustss 
   2513         1.1  augustss 	s = splusb();
   2514       1.144  augustss 	if (dev->speed == USB_SPEED_LOW)
   2515       1.123  augustss 		uhci_add_ls_ctrl(sc, sqh);
   2516       1.123  augustss 	else
   2517       1.123  augustss 		uhci_add_hs_ctrl(sc, sqh);
   2518        1.92  augustss 	uhci_add_intr_info(sc, ii);
   2519        1.59  augustss #ifdef UHCI_DEBUG
   2520         1.1  augustss 	if (uhcidebug > 12) {
   2521         1.1  augustss 		uhci_soft_td_t *std;
   2522         1.1  augustss 		uhci_soft_qh_t *xqh;
   2523        1.13  augustss 		uhci_soft_qh_t *sxqh;
   2524        1.13  augustss 		int maxqh = 0;
   2525         1.1  augustss 		uhci_physaddr_t link;
   2526        1.47  augustss 		DPRINTF(("uhci_enter_ctl_q: follow from [0]\n"));
   2527         1.1  augustss 		for (std = sc->sc_vframes[0].htd, link = 0;
   2528       1.121  augustss 		     (link & UHCI_PTR_QH) == 0;
   2529        1.42  augustss 		     std = std->link.std) {
   2530        1.88   tsutsui 			link = le32toh(std->td.td_link);
   2531         1.1  augustss 			uhci_dump_td(std);
   2532         1.1  augustss 		}
   2533        1.67  augustss 		sxqh = (uhci_soft_qh_t *)std;
   2534        1.67  augustss 		uhci_dump_qh(sxqh);
   2535        1.67  augustss 		for (xqh = sxqh;
   2536        1.63  augustss 		     xqh != NULL;
   2537       1.152  augustss 		     xqh = (maxqh++ == 5 || xqh->hlink == sxqh ||
   2538       1.121  augustss                             xqh->hlink == xqh ? NULL : xqh->hlink)) {
   2539         1.1  augustss 			uhci_dump_qh(xqh);
   2540        1.13  augustss 		}
   2541        1.47  augustss 		DPRINTF(("Enqueued QH:\n"));
   2542         1.1  augustss 		uhci_dump_qh(sqh);
   2543        1.42  augustss 		uhci_dump_tds(sqh->elink);
   2544         1.1  augustss 	}
   2545         1.1  augustss #endif
   2546        1.63  augustss 	if (xfer->timeout && !sc->sc_bus.use_polling) {
   2547       1.171   tsutsui 		usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
   2548        1.91  augustss 			    uhci_timeout, ii);
   2549        1.13  augustss 	}
   2550        1.92  augustss 	xfer->status = USBD_IN_PROGRESS;
   2551         1.1  augustss 	splx(s);
   2552         1.1  augustss 
   2553         1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   2554         1.1  augustss }
   2555         1.1  augustss 
   2556        1.16  augustss usbd_status
   2557       1.119  augustss uhci_device_isoc_transfer(usbd_xfer_handle xfer)
   2558        1.16  augustss {
   2559        1.63  augustss 	usbd_status err;
   2560        1.48  augustss 
   2561        1.63  augustss 	DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer));
   2562        1.48  augustss 
   2563        1.48  augustss 	/* Put it on our queue, */
   2564        1.63  augustss 	err = usb_insert_transfer(xfer);
   2565        1.48  augustss 
   2566        1.48  augustss 	/* bail out on error, */
   2567        1.63  augustss 	if (err && err != USBD_IN_PROGRESS)
   2568        1.63  augustss 		return (err);
   2569        1.48  augustss 
   2570        1.48  augustss 	/* XXX should check inuse here */
   2571        1.48  augustss 
   2572        1.48  augustss 	/* insert into schedule, */
   2573        1.63  augustss 	uhci_device_isoc_enter(xfer);
   2574        1.48  augustss 
   2575       1.102  augustss 	/* and start if the pipe wasn't running */
   2576        1.67  augustss 	if (!err)
   2577        1.63  augustss 		uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
   2578        1.48  augustss 
   2579        1.63  augustss 	return (err);
   2580        1.48  augustss }
   2581        1.48  augustss 
   2582        1.48  augustss void
   2583       1.119  augustss uhci_device_isoc_enter(usbd_xfer_handle xfer)
   2584        1.48  augustss {
   2585        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2586        1.16  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2587       1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2588        1.48  augustss 	struct iso *iso = &upipe->u.iso;
   2589       1.152  augustss 	uhci_soft_td_t *std;
   2590       1.223    bouyer 	u_int32_t buf, len, status, offs;
   2591        1.48  augustss 	int s, i, next, nframes;
   2592       1.223    bouyer 	int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN;
   2593        1.48  augustss 
   2594        1.63  augustss 	DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p "
   2595        1.48  augustss 		    "nframes=%d\n",
   2596        1.63  augustss 		    iso->inuse, iso->next, xfer, xfer->nframes));
   2597        1.48  augustss 
   2598        1.82  augustss 	if (sc->sc_dying)
   2599        1.82  augustss 		return;
   2600        1.82  augustss 
   2601        1.63  augustss 	if (xfer->status == USBD_IN_PROGRESS) {
   2602        1.48  augustss 		/* This request has already been entered into the frame list */
   2603        1.96  augustss 		printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer);
   2604        1.68  augustss 		/* XXX */
   2605        1.48  augustss 	}
   2606        1.48  augustss 
   2607        1.48  augustss #ifdef DIAGNOSTIC
   2608        1.48  augustss 	if (iso->inuse >= UHCI_VFRAMELIST_COUNT)
   2609        1.48  augustss 		printf("uhci_device_isoc_enter: overflow!\n");
   2610        1.19  augustss #endif
   2611        1.16  augustss 
   2612        1.48  augustss 	next = iso->next;
   2613        1.48  augustss 	if (next == -1) {
   2614        1.48  augustss 		/* Not in use yet, schedule it a few frames ahead. */
   2615        1.48  augustss 		next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
   2616        1.48  augustss 		DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next));
   2617        1.48  augustss 	}
   2618        1.48  augustss 
   2619        1.63  augustss 	xfer->status = USBD_IN_PROGRESS;
   2620        1.92  augustss 	UXFER(xfer)->curframe = next;
   2621        1.48  augustss 
   2622       1.160  augustss 	buf = DMAADDR(&xfer->dmabuf, 0);
   2623       1.223    bouyer 	offs = 0;
   2624        1.88   tsutsui 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |
   2625        1.88   tsutsui 				     UHCI_TD_ACTIVE |
   2626        1.88   tsutsui 				     UHCI_TD_IOS);
   2627        1.63  augustss 	nframes = xfer->nframes;
   2628        1.48  augustss 	s = splusb();
   2629        1.48  augustss 	for (i = 0; i < nframes; i++) {
   2630        1.48  augustss 		std = iso->stds[next];
   2631        1.48  augustss 		if (++next >= UHCI_VFRAMELIST_COUNT)
   2632        1.48  augustss 			next = 0;
   2633        1.63  augustss 		len = xfer->frlengths[i];
   2634        1.88   tsutsui 		std->td.td_buffer = htole32(buf);
   2635       1.223    bouyer 		usb_syncmem(&xfer->dmabuf, offs, len,
   2636       1.223    bouyer 		    rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   2637        1.48  augustss 		if (i == nframes - 1)
   2638        1.88   tsutsui 			status |= UHCI_TD_IOC;
   2639        1.88   tsutsui 		std->td.td_status = htole32(status);
   2640        1.88   tsutsui 		std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK);
   2641        1.88   tsutsui 		std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len));
   2642       1.223    bouyer 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   2643       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2644        1.59  augustss #ifdef UHCI_DEBUG
   2645        1.48  augustss 		if (uhcidebug > 5) {
   2646        1.48  augustss 			DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i));
   2647        1.48  augustss 			uhci_dump_td(std);
   2648        1.48  augustss 		}
   2649        1.48  augustss #endif
   2650        1.48  augustss 		buf += len;
   2651       1.223    bouyer 		offs += len;
   2652        1.48  augustss 	}
   2653        1.48  augustss 	iso->next = next;
   2654        1.63  augustss 	iso->inuse += xfer->nframes;
   2655        1.16  augustss 
   2656        1.48  augustss 	splx(s);
   2657        1.16  augustss }
   2658        1.16  augustss 
   2659        1.16  augustss usbd_status
   2660       1.119  augustss uhci_device_isoc_start(usbd_xfer_handle xfer)
   2661        1.16  augustss {
   2662        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2663       1.216  drochner 	uhci_softc_t *sc = upipe->pipe.device->bus->hci_private;
   2664        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2665        1.48  augustss 	uhci_soft_td_t *end;
   2666        1.48  augustss 	int s, i;
   2667        1.48  augustss 
   2668        1.96  augustss 	DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer));
   2669        1.96  augustss 
   2670        1.82  augustss 	if (sc->sc_dying)
   2671        1.82  augustss 		return (USBD_IOERROR);
   2672        1.82  augustss 
   2673        1.48  augustss #ifdef DIAGNOSTIC
   2674        1.63  augustss 	if (xfer->status != USBD_IN_PROGRESS)
   2675        1.63  augustss 		printf("uhci_device_isoc_start: not in progress %p\n", xfer);
   2676        1.48  augustss #endif
   2677        1.48  augustss 
   2678        1.48  augustss 	/* Find the last TD */
   2679        1.92  augustss 	i = UXFER(xfer)->curframe + xfer->nframes;
   2680        1.48  augustss 	if (i >= UHCI_VFRAMELIST_COUNT)
   2681        1.48  augustss 		i -= UHCI_VFRAMELIST_COUNT;
   2682        1.48  augustss 	end = upipe->u.iso.stds[i];
   2683        1.48  augustss 
   2684        1.96  augustss #ifdef DIAGNOSTIC
   2685        1.96  augustss 	if (end == NULL) {
   2686        1.96  augustss 		printf("uhci_device_isoc_start: end == NULL\n");
   2687        1.96  augustss 		return (USBD_INVAL);
   2688        1.96  augustss 	}
   2689        1.96  augustss #endif
   2690        1.96  augustss 
   2691        1.48  augustss 	s = splusb();
   2692       1.152  augustss 
   2693        1.48  augustss 	/* Set up interrupt info. */
   2694        1.63  augustss 	ii->xfer = xfer;
   2695        1.48  augustss 	ii->stdstart = end;
   2696        1.48  augustss 	ii->stdend = end;
   2697        1.48  augustss #ifdef DIAGNOSTIC
   2698       1.102  augustss 	if (!ii->isdone)
   2699        1.70  augustss 		printf("uhci_device_isoc_start: not done, ii=%p\n", ii);
   2700        1.48  augustss 	ii->isdone = 0;
   2701        1.48  augustss #endif
   2702        1.92  augustss 	uhci_add_intr_info(sc, ii);
   2703       1.152  augustss 
   2704        1.48  augustss 	splx(s);
   2705        1.48  augustss 
   2706        1.48  augustss 	return (USBD_IN_PROGRESS);
   2707        1.16  augustss }
   2708        1.16  augustss 
   2709        1.16  augustss void
   2710       1.119  augustss uhci_device_isoc_abort(usbd_xfer_handle xfer)
   2711        1.16  augustss {
   2712        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2713        1.48  augustss 	uhci_soft_td_t **stds = upipe->u.iso.stds;
   2714        1.48  augustss 	uhci_soft_td_t *std;
   2715        1.92  augustss 	int i, n, s, nframes, maxlen, len;
   2716        1.92  augustss 
   2717        1.92  augustss 	s = splusb();
   2718        1.92  augustss 
   2719        1.92  augustss 	/* Transfer is already done. */
   2720       1.152  augustss 	if (xfer->status != USBD_NOT_STARTED &&
   2721        1.92  augustss 	    xfer->status != USBD_IN_PROGRESS) {
   2722        1.92  augustss 		splx(s);
   2723        1.92  augustss 		return;
   2724        1.92  augustss 	}
   2725        1.48  augustss 
   2726        1.92  augustss 	/* Give xfer the requested abort code. */
   2727        1.63  augustss 	xfer->status = USBD_CANCELLED;
   2728        1.48  augustss 
   2729        1.48  augustss 	/* make hardware ignore it, */
   2730        1.63  augustss 	nframes = xfer->nframes;
   2731        1.92  augustss 	n = UXFER(xfer)->curframe;
   2732        1.92  augustss 	maxlen = 0;
   2733        1.48  augustss 	for (i = 0; i < nframes; i++) {
   2734        1.48  augustss 		std = stds[n];
   2735       1.223    bouyer 		usb_syncmem(&std->dma,
   2736       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2737       1.223    bouyer 		    sizeof(std->td.td_status),
   2738       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2739        1.88   tsutsui 		std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
   2740       1.223    bouyer 		usb_syncmem(&std->dma,
   2741       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2742       1.223    bouyer 		    sizeof(std->td.td_status),
   2743       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2744       1.223    bouyer 		usb_syncmem(&std->dma,
   2745       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_token),
   2746       1.223    bouyer 		    sizeof(std->td.td_token),
   2747       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE);
   2748       1.130   tsutsui 		len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token));
   2749        1.92  augustss 		if (len > maxlen)
   2750        1.92  augustss 			maxlen = len;
   2751        1.48  augustss 		if (++n >= UHCI_VFRAMELIST_COUNT)
   2752        1.48  augustss 			n = 0;
   2753        1.48  augustss 	}
   2754        1.48  augustss 
   2755        1.92  augustss 	/* and wait until we are sure the hardware has finished. */
   2756        1.92  augustss 	delay(maxlen);
   2757        1.92  augustss 
   2758        1.96  augustss #ifdef DIAGNOSTIC
   2759        1.96  augustss 	UXFER(xfer)->iinfo.isdone = 1;
   2760        1.96  augustss #endif
   2761        1.92  augustss 	/* Run callback and remove from interrupt list. */
   2762        1.92  augustss 	usb_transfer_complete(xfer);
   2763        1.48  augustss 
   2764        1.92  augustss 	splx(s);
   2765        1.16  augustss }
   2766        1.16  augustss 
   2767        1.16  augustss void
   2768       1.119  augustss uhci_device_isoc_close(usbd_pipe_handle pipe)
   2769        1.16  augustss {
   2770        1.16  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2771        1.16  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2772       1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2773        1.48  augustss 	uhci_soft_td_t *std, *vstd;
   2774        1.16  augustss 	struct iso *iso;
   2775        1.92  augustss 	int i, s;
   2776        1.16  augustss 
   2777        1.16  augustss 	/*
   2778        1.16  augustss 	 * Make sure all TDs are marked as inactive.
   2779        1.16  augustss 	 * Wait for completion.
   2780        1.16  augustss 	 * Unschedule.
   2781        1.16  augustss 	 * Deallocate.
   2782        1.16  augustss 	 */
   2783        1.16  augustss 	iso = &upipe->u.iso;
   2784        1.16  augustss 
   2785       1.223    bouyer 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2786       1.223    bouyer 		std = iso->stds[i];
   2787       1.223    bouyer 		usb_syncmem(&std->dma,
   2788       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2789       1.223    bouyer 		    sizeof(std->td.td_status),
   2790       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2791       1.223    bouyer 		std->td.td_status &= htole32(~UHCI_TD_ACTIVE);
   2792       1.223    bouyer 		usb_syncmem(&std->dma,
   2793       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_status),
   2794       1.223    bouyer 		    sizeof(std->td.td_status),
   2795       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2796       1.223    bouyer 	}
   2797        1.20  augustss 	usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */
   2798        1.16  augustss 
   2799        1.92  augustss 	s = splusb();
   2800        1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2801        1.16  augustss 		std = iso->stds[i];
   2802        1.48  augustss 		for (vstd = sc->sc_vframes[i].htd;
   2803        1.67  augustss 		     vstd != NULL && vstd->link.std != std;
   2804        1.42  augustss 		     vstd = vstd->link.std)
   2805        1.16  augustss 			;
   2806        1.67  augustss 		if (vstd == NULL) {
   2807        1.16  augustss 			/*panic*/
   2808        1.16  augustss 			printf("uhci_device_isoc_close: %p not found\n", std);
   2809        1.92  augustss 			splx(s);
   2810        1.16  augustss 			return;
   2811        1.16  augustss 		}
   2812        1.42  augustss 		vstd->link = std->link;
   2813       1.223    bouyer 		usb_syncmem(&std->dma,
   2814       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_link),
   2815       1.223    bouyer 		    sizeof(std->td.td_link),
   2816       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE);
   2817        1.42  augustss 		vstd->td.td_link = std->td.td_link;
   2818       1.223    bouyer 		usb_syncmem(&vstd->dma,
   2819       1.223    bouyer 		    vstd->offs + offsetof(uhci_td_t, td_link),
   2820       1.223    bouyer 		    sizeof(vstd->td.td_link),
   2821       1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   2822        1.16  augustss 		uhci_free_std(sc, std);
   2823        1.16  augustss 	}
   2824        1.92  augustss 	splx(s);
   2825        1.16  augustss 
   2826        1.31  augustss 	free(iso->stds, M_USBHC);
   2827        1.16  augustss }
   2828        1.16  augustss 
   2829        1.16  augustss usbd_status
   2830       1.119  augustss uhci_setup_isoc(usbd_pipe_handle pipe)
   2831        1.16  augustss {
   2832        1.16  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   2833        1.16  augustss 	usbd_device_handle dev = upipe->pipe.device;
   2834       1.216  drochner 	uhci_softc_t *sc = dev->bus->hci_private;
   2835        1.16  augustss 	int addr = upipe->pipe.device->address;
   2836        1.16  augustss 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
   2837        1.45  augustss 	int rd = UE_GET_DIR(endpt) == UE_DIR_IN;
   2838        1.48  augustss 	uhci_soft_td_t *std, *vstd;
   2839        1.48  augustss 	u_int32_t token;
   2840        1.16  augustss 	struct iso *iso;
   2841        1.92  augustss 	int i, s;
   2842        1.16  augustss 
   2843        1.16  augustss 	iso = &upipe->u.iso;
   2844        1.16  augustss 	iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *),
   2845        1.31  augustss 			   M_USBHC, M_WAITOK);
   2846        1.16  augustss 
   2847        1.88   tsutsui 	token = rd ? UHCI_TD_IN (0, endpt, addr, 0) :
   2848        1.88   tsutsui 		     UHCI_TD_OUT(0, endpt, addr, 0);
   2849        1.16  augustss 
   2850        1.48  augustss 	/* Allocate the TDs and mark as inactive; */
   2851        1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2852        1.48  augustss 		std = uhci_alloc_std(sc);
   2853        1.48  augustss 		if (std == 0)
   2854        1.48  augustss 			goto bad;
   2855        1.88   tsutsui 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
   2856        1.88   tsutsui 		std->td.td_token = htole32(token);
   2857       1.223    bouyer 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   2858       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2859        1.48  augustss 		iso->stds[i] = std;
   2860        1.16  augustss 	}
   2861        1.16  augustss 
   2862        1.48  augustss 	/* Insert TDs into schedule. */
   2863        1.92  augustss 	s = splusb();
   2864        1.16  augustss 	for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
   2865        1.16  augustss 		std = iso->stds[i];
   2866        1.48  augustss 		vstd = sc->sc_vframes[i].htd;
   2867       1.223    bouyer 		usb_syncmem(&vstd->dma,
   2868       1.223    bouyer 		    vstd->offs + offsetof(uhci_td_t, td_link),
   2869       1.223    bouyer 		    sizeof(vstd->td.td_link),
   2870       1.223    bouyer 		    BUS_DMASYNC_POSTWRITE);
   2871        1.42  augustss 		std->link = vstd->link;
   2872        1.42  augustss 		std->td.td_link = vstd->td.td_link;
   2873       1.223    bouyer 		usb_syncmem(&std->dma,
   2874       1.223    bouyer 		    std->offs + offsetof(uhci_td_t, td_link),
   2875       1.223    bouyer 		    sizeof(std->td.td_link),
   2876       1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   2877        1.42  augustss 		vstd->link.std = std;
   2878       1.121  augustss 		vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD);
   2879       1.223    bouyer 		usb_syncmem(&vstd->dma,
   2880       1.223    bouyer 		    vstd->offs + offsetof(uhci_td_t, td_link),
   2881       1.223    bouyer 		    sizeof(vstd->td.td_link),
   2882       1.223    bouyer 		    BUS_DMASYNC_PREWRITE);
   2883        1.16  augustss 	}
   2884        1.92  augustss 	splx(s);
   2885        1.16  augustss 
   2886        1.48  augustss 	iso->next = -1;
   2887        1.48  augustss 	iso->inuse = 0;
   2888        1.48  augustss 
   2889        1.16  augustss 	return (USBD_NORMAL_COMPLETION);
   2890        1.16  augustss 
   2891        1.48  augustss  bad:
   2892        1.16  augustss 	while (--i >= 0)
   2893        1.16  augustss 		uhci_free_std(sc, iso->stds[i]);
   2894        1.31  augustss 	free(iso->stds, M_USBHC);
   2895        1.16  augustss 	return (USBD_NOMEM);
   2896        1.16  augustss }
   2897        1.16  augustss 
   2898        1.16  augustss void
   2899       1.119  augustss uhci_device_isoc_done(usbd_xfer_handle xfer)
   2900        1.16  augustss {
   2901        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2902       1.223    bouyer 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2903       1.223    bouyer 	int i, offs;
   2904       1.223    bouyer 	int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN;
   2905       1.223    bouyer 
   2906        1.48  augustss 
   2907       1.197   gdamore 	DPRINTFN(4, ("uhci_isoc_done: length=%d, busy_free=0x%08x\n",
   2908       1.197   gdamore 			xfer->actlen, xfer->busy_free));
   2909        1.93  augustss 
   2910        1.96  augustss 	if (ii->xfer != xfer)
   2911        1.96  augustss 		/* Not on interrupt list, ignore it. */
   2912       1.170  augustss 		return;
   2913       1.170  augustss 
   2914       1.170  augustss 	if (!uhci_active_intr_info(ii))
   2915        1.96  augustss 		return;
   2916        1.96  augustss 
   2917        1.93  augustss #ifdef DIAGNOSTIC
   2918        1.93  augustss         if (ii->stdend == NULL) {
   2919        1.93  augustss                 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
   2920        1.93  augustss #ifdef UHCI_DEBUG
   2921        1.93  augustss 		uhci_dump_ii(ii);
   2922        1.93  augustss #endif
   2923        1.93  augustss 		return;
   2924        1.93  augustss 	}
   2925        1.93  augustss #endif
   2926        1.48  augustss 
   2927        1.48  augustss 	/* Turn off the interrupt since it is active even if the TD is not. */
   2928       1.223    bouyer 	usb_syncmem(&ii->stdend->dma,
   2929       1.223    bouyer 	    ii->stdend->offs + offsetof(uhci_td_t, td_status),
   2930       1.223    bouyer 	    sizeof(ii->stdend->td.td_status),
   2931       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2932        1.88   tsutsui 	ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC);
   2933       1.223    bouyer 	usb_syncmem(&ii->stdend->dma,
   2934       1.223    bouyer 	    ii->stdend->offs + offsetof(uhci_td_t, td_status),
   2935       1.223    bouyer 	    sizeof(ii->stdend->td.td_status),
   2936       1.223    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2937        1.48  augustss 
   2938        1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   2939       1.223    bouyer 
   2940       1.223    bouyer 	offs = 0;
   2941       1.223    bouyer 	for (i = 0; i < xfer->nframes; i++) {
   2942       1.223    bouyer 		usb_syncmem(&xfer->dmabuf, offs, xfer->frlengths[i],
   2943       1.223    bouyer 		    rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   2944       1.223    bouyer 		offs += xfer->frlengths[i];
   2945       1.223    bouyer 	}
   2946        1.16  augustss }
   2947        1.16  augustss 
   2948         1.1  augustss void
   2949       1.119  augustss uhci_device_intr_done(usbd_xfer_handle xfer)
   2950         1.1  augustss {
   2951        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   2952         1.1  augustss 	uhci_softc_t *sc = ii->sc;
   2953        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   2954         1.1  augustss 	uhci_soft_qh_t *sqh;
   2955       1.223    bouyer 	int i, npoll, isread;
   2956         1.1  augustss 
   2957       1.173      gson 	DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen));
   2958         1.1  augustss 
   2959         1.1  augustss 	npoll = upipe->u.intr.npoll;
   2960         1.1  augustss 	for(i = 0; i < npoll; i++) {
   2961         1.1  augustss 		sqh = upipe->u.intr.qhs[i];
   2962       1.121  augustss 		sqh->elink = NULL;
   2963        1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   2964       1.223    bouyer 		usb_syncmem(&sqh->dma,
   2965       1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   2966       1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   2967       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2968         1.1  augustss 	}
   2969       1.149  augustss 	uhci_free_std_chain(sc, ii->stdstart, NULL);
   2970         1.1  augustss 
   2971       1.223    bouyer 	isread = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN;
   2972       1.223    bouyer 	usb_syncmem(&xfer->dmabuf, 0, xfer->length,
   2973       1.223    bouyer 	    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   2974       1.223    bouyer 
   2975         1.1  augustss 	/* XXX Wasteful. */
   2976        1.63  augustss 	if (xfer->pipe->repeat) {
   2977        1.55  augustss 		uhci_soft_td_t *data, *dataend;
   2978         1.1  augustss 
   2979        1.92  augustss 		DPRINTFN(5,("uhci_device_intr_done: requeing\n"));
   2980        1.92  augustss 
   2981         1.1  augustss 		/* This alloc cannot fail since we freed the chain above. */
   2982       1.221  jmcneill 		uhci_alloc_std_chain(upipe, sc, xfer->length,
   2983       1.221  jmcneill 				     upipe->u.intr.isread, xfer->flags,
   2984        1.63  augustss 				     &xfer->dmabuf, &data, &dataend);
   2985        1.88   tsutsui 		dataend->td.td_status |= htole32(UHCI_TD_IOC);
   2986       1.223    bouyer 		usb_syncmem(&dataend->dma,
   2987       1.223    bouyer 		    dataend->offs + offsetof(uhci_td_t, td_status),
   2988       1.223    bouyer 		    sizeof(dataend->td.td_status),
   2989       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2990         1.1  augustss 
   2991        1.59  augustss #ifdef UHCI_DEBUG
   2992         1.1  augustss 		if (uhcidebug > 10) {
   2993        1.55  augustss 			DPRINTF(("uhci_device_intr_done: data(1)\n"));
   2994        1.55  augustss 			uhci_dump_tds(data);
   2995         1.1  augustss 			uhci_dump_qh(upipe->u.intr.qhs[0]);
   2996         1.1  augustss 		}
   2997         1.1  augustss #endif
   2998         1.1  augustss 
   2999        1.55  augustss 		ii->stdstart = data;
   3000        1.55  augustss 		ii->stdend = dataend;
   3001         1.7  augustss #ifdef DIAGNOSTIC
   3002        1.70  augustss 		if (!ii->isdone) {
   3003        1.70  augustss 			printf("uhci_device_intr_done: not done, ii=%p\n", ii);
   3004        1.70  augustss 		}
   3005         1.7  augustss 		ii->isdone = 0;
   3006         1.7  augustss #endif
   3007         1.1  augustss 		for (i = 0; i < npoll; i++) {
   3008         1.1  augustss 			sqh = upipe->u.intr.qhs[i];
   3009        1.55  augustss 			sqh->elink = data;
   3010       1.121  augustss 			sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
   3011       1.223    bouyer 			usb_syncmem(&sqh->dma,
   3012       1.223    bouyer 			    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3013       1.223    bouyer 			    sizeof(sqh->qh.qh_elink),
   3014       1.223    bouyer 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3015         1.1  augustss 		}
   3016        1.92  augustss 		xfer->status = USBD_IN_PROGRESS;
   3017        1.92  augustss 		/* The ii is already on the examined list, just leave it. */
   3018         1.1  augustss 	} else {
   3019        1.92  augustss 		DPRINTFN(5,("uhci_device_intr_done: removing\n"));
   3020       1.169  augustss 		if (uhci_active_intr_info(ii))
   3021       1.169  augustss 			uhci_del_intr_info(ii);
   3022         1.1  augustss 	}
   3023         1.1  augustss }
   3024         1.1  augustss 
   3025         1.1  augustss /* Deallocate request data structures */
   3026         1.1  augustss void
   3027       1.119  augustss uhci_device_ctrl_done(usbd_xfer_handle xfer)
   3028         1.1  augustss {
   3029        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   3030         1.1  augustss 	uhci_softc_t *sc = ii->sc;
   3031        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   3032       1.223    bouyer 	int len = UGETW(xfer->request.wLength);
   3033       1.223    bouyer 	int isread = (xfer->request.bmRequestType & UT_READ);
   3034         1.1  augustss 
   3035         1.7  augustss #ifdef DIAGNOSTIC
   3036        1.63  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   3037       1.173      gson 		panic("uhci_device_ctrl_done: not a request");
   3038         1.7  augustss #endif
   3039         1.1  augustss 
   3040       1.169  augustss 	if (!uhci_active_intr_info(ii))
   3041       1.169  augustss 		return;
   3042       1.169  augustss 
   3043        1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   3044         1.1  augustss 
   3045       1.144  augustss 	if (upipe->pipe.device->speed == USB_SPEED_LOW)
   3046       1.123  augustss 		uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh);
   3047       1.123  augustss 	else
   3048       1.123  augustss 		uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh);
   3049         1.1  augustss 
   3050        1.49  augustss 	if (upipe->u.ctl.length != 0)
   3051        1.42  augustss 		uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend);
   3052        1.49  augustss 
   3053       1.223    bouyer 	if (len) {
   3054       1.223    bouyer 		usb_syncmem(&xfer->dmabuf, 0, len,
   3055       1.223    bouyer 		    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   3056       1.223    bouyer 	}
   3057       1.223    bouyer 	usb_syncmem(&upipe->u.ctl.reqdma, 0,
   3058       1.223    bouyer 	    sizeof(usb_device_request_t),  BUS_DMASYNC_POSTWRITE);
   3059       1.223    bouyer 
   3060       1.173      gson 	DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen));
   3061         1.1  augustss }
   3062         1.1  augustss 
   3063         1.1  augustss /* Deallocate request data structures */
   3064         1.1  augustss void
   3065       1.119  augustss uhci_device_bulk_done(usbd_xfer_handle xfer)
   3066         1.1  augustss {
   3067        1.92  augustss 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
   3068         1.1  augustss 	uhci_softc_t *sc = ii->sc;
   3069        1.63  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
   3070       1.169  augustss 
   3071       1.173      gson 	DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n",
   3072       1.169  augustss 		    xfer, ii, sc, upipe));
   3073       1.169  augustss 
   3074       1.169  augustss 	if (!uhci_active_intr_info(ii))
   3075       1.169  augustss 		return;
   3076         1.1  augustss 
   3077        1.92  augustss 	uhci_del_intr_info(ii);	/* remove from active list */
   3078         1.1  augustss 
   3079         1.1  augustss 	uhci_remove_bulk(sc, upipe->u.bulk.sqh);
   3080        1.32  augustss 
   3081       1.149  augustss 	uhci_free_std_chain(sc, ii->stdstart, NULL);
   3082        1.32  augustss 
   3083       1.173      gson 	DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen));
   3084         1.1  augustss }
   3085         1.1  augustss 
   3086         1.1  augustss /* Add interrupt QH, called with vflock. */
   3087         1.1  augustss void
   3088       1.119  augustss uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   3089         1.1  augustss {
   3090        1.92  augustss 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
   3091        1.42  augustss 	uhci_soft_qh_t *eqh;
   3092         1.1  augustss 
   3093        1.92  augustss 	DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh));
   3094        1.92  augustss 
   3095        1.42  augustss 	eqh = vf->eqh;
   3096       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3097       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink),
   3098       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE);
   3099        1.42  augustss 	sqh->hlink       = eqh->hlink;
   3100        1.42  augustss 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
   3101       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3102       1.223    bouyer 	    sizeof(sqh->qh.qh_hlink),
   3103       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   3104        1.42  augustss 	eqh->hlink       = sqh;
   3105       1.121  augustss 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
   3106       1.223    bouyer 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3107       1.223    bouyer 	    sizeof(eqh->qh.qh_hlink),
   3108       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   3109         1.1  augustss 	vf->eqh = sqh;
   3110         1.1  augustss 	vf->bandwidth++;
   3111         1.1  augustss }
   3112         1.1  augustss 
   3113       1.119  augustss /* Remove interrupt QH. */
   3114         1.1  augustss void
   3115       1.119  augustss uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
   3116         1.1  augustss {
   3117        1.92  augustss 	struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
   3118         1.1  augustss 	uhci_soft_qh_t *pqh;
   3119         1.1  augustss 
   3120        1.92  augustss 	DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh));
   3121         1.1  augustss 
   3122       1.124  augustss 	/* See comment in uhci_remove_ctrl() */
   3123       1.223    bouyer 
   3124       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3125       1.223    bouyer 	    sizeof(sqh->qh.qh_elink),
   3126       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3127       1.124  augustss 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
   3128       1.124  augustss 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   3129       1.223    bouyer 		usb_syncmem(&sqh->dma,
   3130       1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3131       1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   3132       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3133       1.124  augustss 		delay(UHCI_QH_REMOVE_DELAY);
   3134       1.124  augustss 	}
   3135       1.124  augustss 
   3136        1.92  augustss 	pqh = uhci_find_prev_qh(vf->hqh, sqh);
   3137       1.223    bouyer 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3138       1.223    bouyer 	    sizeof(sqh->qh.qh_hlink),
   3139       1.223    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3140        1.42  augustss 	pqh->hlink       = sqh->hlink;
   3141        1.42  augustss 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
   3142       1.223    bouyer 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
   3143       1.223    bouyer 	    sizeof(pqh->qh.qh_hlink),
   3144       1.223    bouyer 	    BUS_DMASYNC_PREWRITE);
   3145       1.124  augustss 	delay(UHCI_QH_REMOVE_DELAY);
   3146         1.1  augustss 	if (vf->eqh == sqh)
   3147         1.1  augustss 		vf->eqh = pqh;
   3148         1.1  augustss 	vf->bandwidth--;
   3149         1.1  augustss }
   3150         1.1  augustss 
   3151         1.1  augustss usbd_status
   3152       1.119  augustss uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival)
   3153         1.1  augustss {
   3154         1.1  augustss 	uhci_soft_qh_t *sqh;
   3155         1.1  augustss 	int i, npoll, s;
   3156         1.1  augustss 	u_int bestbw, bw, bestoffs, offs;
   3157         1.1  augustss 
   3158       1.173      gson 	DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe));
   3159         1.1  augustss 	if (ival == 0) {
   3160       1.173      gson 		printf("uhci_device_setintr: 0 interval\n");
   3161         1.1  augustss 		return (USBD_INVAL);
   3162         1.1  augustss 	}
   3163         1.1  augustss 
   3164         1.1  augustss 	if (ival > UHCI_VFRAMELIST_COUNT)
   3165         1.1  augustss 		ival = UHCI_VFRAMELIST_COUNT;
   3166         1.1  augustss 	npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
   3167       1.173      gson 	DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll));
   3168         1.1  augustss 
   3169         1.1  augustss 	upipe->u.intr.npoll = npoll;
   3170       1.152  augustss 	upipe->u.intr.qhs =
   3171        1.31  augustss 		malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK);
   3172         1.1  augustss 
   3173       1.152  augustss 	/*
   3174         1.1  augustss 	 * Figure out which offset in the schedule that has most
   3175         1.1  augustss 	 * bandwidth left over.
   3176         1.1  augustss 	 */
   3177         1.1  augustss #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
   3178         1.1  augustss 	for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
   3179         1.1  augustss 		for (bw = i = 0; i < npoll; i++)
   3180         1.1  augustss 			bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
   3181         1.1  augustss 		if (bw < bestbw) {
   3182         1.1  augustss 			bestbw = bw;
   3183         1.1  augustss 			bestoffs = offs;
   3184         1.1  augustss 		}
   3185         1.1  augustss 	}
   3186       1.173      gson 	DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
   3187         1.1  augustss 
   3188         1.1  augustss 	for(i = 0; i < npoll; i++) {
   3189         1.1  augustss 		upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
   3190       1.121  augustss 		sqh->elink = NULL;
   3191        1.88   tsutsui 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
   3192       1.223    bouyer 		usb_syncmem(&sqh->dma,
   3193       1.223    bouyer 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
   3194       1.223    bouyer 		    sizeof(sqh->qh.qh_elink),
   3195       1.223    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3196         1.1  augustss 		sqh->pos = MOD(i * ival + bestoffs);
   3197         1.1  augustss 	}
   3198         1.1  augustss #undef MOD
   3199         1.1  augustss 
   3200         1.1  augustss 	s = splusb();
   3201         1.1  augustss 	/* Enter QHs into the controller data structures. */
   3202         1.1  augustss 	for(i = 0; i < npoll; i++)
   3203        1.92  augustss 		uhci_add_intr(sc, upipe->u.intr.qhs[i]);
   3204        1.92  augustss 	splx(s);
   3205         1.1  augustss 
   3206       1.173      gson 	DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe));
   3207         1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   3208         1.1  augustss }
   3209         1.1  augustss 
   3210         1.1  augustss /* Open a new pipe. */
   3211         1.1  augustss usbd_status
   3212       1.119  augustss uhci_open(usbd_pipe_handle pipe)
   3213         1.1  augustss {
   3214       1.216  drochner 	uhci_softc_t *sc = pipe->device->bus->hci_private;
   3215         1.1  augustss 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
   3216         1.1  augustss 	usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
   3217        1.63  augustss 	usbd_status err;
   3218        1.79  augustss 	int ival;
   3219         1.1  augustss 
   3220         1.1  augustss 	DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
   3221       1.152  augustss 		     pipe, pipe->device->address,
   3222         1.1  augustss 		     ed->bEndpointAddress, sc->sc_addr));
   3223        1.92  augustss 
   3224        1.92  augustss 	upipe->aborting = 0;
   3225        1.92  augustss 	upipe->nexttoggle = 0;
   3226        1.92  augustss 
   3227         1.1  augustss 	if (pipe->device->address == sc->sc_addr) {
   3228         1.1  augustss 		switch (ed->bEndpointAddress) {
   3229         1.1  augustss 		case USB_CONTROL_ENDPOINT:
   3230         1.1  augustss 			pipe->methods = &uhci_root_ctrl_methods;
   3231         1.1  augustss 			break;
   3232        1.45  augustss 		case UE_DIR_IN | UHCI_INTR_ENDPT:
   3233         1.1  augustss 			pipe->methods = &uhci_root_intr_methods;
   3234         1.1  augustss 			break;
   3235         1.1  augustss 		default:
   3236         1.1  augustss 			return (USBD_INVAL);
   3237         1.1  augustss 		}
   3238         1.1  augustss 	} else {
   3239         1.1  augustss 		switch (ed->bmAttributes & UE_XFERTYPE) {
   3240         1.1  augustss 		case UE_CONTROL:
   3241         1.1  augustss 			pipe->methods = &uhci_device_ctrl_methods;
   3242         1.1  augustss 			upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
   3243        1.63  augustss 			if (upipe->u.ctl.sqh == NULL)
   3244         1.5  augustss 				goto bad;
   3245         1.1  augustss 			upipe->u.ctl.setup = uhci_alloc_std(sc);
   3246        1.63  augustss 			if (upipe->u.ctl.setup == NULL) {
   3247         1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   3248         1.5  augustss 				goto bad;
   3249         1.5  augustss 			}
   3250         1.1  augustss 			upipe->u.ctl.stat = uhci_alloc_std(sc);
   3251        1.63  augustss 			if (upipe->u.ctl.stat == NULL) {
   3252         1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   3253         1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.setup);
   3254         1.5  augustss 				goto bad;
   3255         1.5  augustss 			}
   3256       1.152  augustss 			err = usb_allocmem(&sc->sc_bus,
   3257       1.152  augustss 				  sizeof(usb_device_request_t),
   3258        1.63  augustss 				  0, &upipe->u.ctl.reqdma);
   3259        1.63  augustss 			if (err) {
   3260         1.5  augustss 				uhci_free_sqh(sc, upipe->u.ctl.sqh);
   3261         1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.setup);
   3262         1.5  augustss 				uhci_free_std(sc, upipe->u.ctl.stat);
   3263         1.5  augustss 				goto bad;
   3264         1.5  augustss 			}
   3265         1.1  augustss 			break;
   3266         1.1  augustss 		case UE_INTERRUPT:
   3267         1.1  augustss 			pipe->methods = &uhci_device_intr_methods;
   3268        1.79  augustss 			ival = pipe->interval;
   3269        1.79  augustss 			if (ival == USBD_DEFAULT_INTERVAL)
   3270        1.79  augustss 				ival = ed->bInterval;
   3271        1.80  augustss 			return (uhci_device_setintr(sc, upipe, ival));
   3272         1.1  augustss 		case UE_ISOCHRONOUS:
   3273        1.16  augustss 			pipe->methods = &uhci_device_isoc_methods;
   3274        1.48  augustss 			return (uhci_setup_isoc(pipe));
   3275         1.1  augustss 		case UE_BULK:
   3276         1.1  augustss 			pipe->methods = &uhci_device_bulk_methods;
   3277         1.1  augustss 			upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
   3278        1.63  augustss 			if (upipe->u.bulk.sqh == NULL)
   3279         1.5  augustss 				goto bad;
   3280         1.1  augustss 			break;
   3281         1.1  augustss 		}
   3282         1.1  augustss 	}
   3283         1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   3284         1.5  augustss 
   3285         1.5  augustss  bad:
   3286         1.5  augustss 	return (USBD_NOMEM);
   3287         1.1  augustss }
   3288         1.1  augustss 
   3289         1.1  augustss /*
   3290         1.1  augustss  * Data structures and routines to emulate the root hub.
   3291         1.1  augustss  */
   3292         1.1  augustss usb_device_descriptor_t uhci_devd = {
   3293         1.1  augustss 	USB_DEVICE_DESCRIPTOR_SIZE,
   3294         1.1  augustss 	UDESC_DEVICE,		/* type */
   3295         1.1  augustss 	{0x00, 0x01},		/* USB version */
   3296        1.87  augustss 	UDCLASS_HUB,		/* class */
   3297        1.87  augustss 	UDSUBCLASS_HUB,		/* subclass */
   3298       1.144  augustss 	UDPROTO_FSHUB,		/* protocol */
   3299         1.1  augustss 	64,			/* max packet */
   3300         1.1  augustss 	{0},{0},{0x00,0x01},	/* device id */
   3301         1.1  augustss 	1,2,0,			/* string indicies */
   3302         1.1  augustss 	1			/* # of configurations */
   3303         1.1  augustss };
   3304         1.1  augustss 
   3305       1.208  drochner const usb_config_descriptor_t uhci_confd = {
   3306         1.1  augustss 	USB_CONFIG_DESCRIPTOR_SIZE,
   3307         1.1  augustss 	UDESC_CONFIG,
   3308         1.1  augustss 	{USB_CONFIG_DESCRIPTOR_SIZE +
   3309         1.1  augustss 	 USB_INTERFACE_DESCRIPTOR_SIZE +
   3310         1.1  augustss 	 USB_ENDPOINT_DESCRIPTOR_SIZE},
   3311         1.1  augustss 	1,
   3312         1.1  augustss 	1,
   3313         1.1  augustss 	0,
   3314       1.206  drochner 	UC_ATTR_MBO | UC_SELF_POWERED,
   3315         1.1  augustss 	0			/* max power */
   3316         1.1  augustss };
   3317         1.1  augustss 
   3318       1.208  drochner const usb_interface_descriptor_t uhci_ifcd = {
   3319         1.1  augustss 	USB_INTERFACE_DESCRIPTOR_SIZE,
   3320         1.1  augustss 	UDESC_INTERFACE,
   3321         1.1  augustss 	0,
   3322         1.1  augustss 	0,
   3323         1.1  augustss 	1,
   3324        1.87  augustss 	UICLASS_HUB,
   3325        1.87  augustss 	UISUBCLASS_HUB,
   3326       1.144  augustss 	UIPROTO_FSHUB,
   3327         1.1  augustss 	0
   3328         1.1  augustss };
   3329         1.1  augustss 
   3330       1.208  drochner const usb_endpoint_descriptor_t uhci_endpd = {
   3331         1.1  augustss 	USB_ENDPOINT_DESCRIPTOR_SIZE,
   3332         1.1  augustss 	UDESC_ENDPOINT,
   3333        1.45  augustss 	UE_DIR_IN | UHCI_INTR_ENDPT,
   3334         1.1  augustss 	UE_INTERRUPT,
   3335         1.1  augustss 	{8},
   3336         1.1  augustss 	255
   3337         1.1  augustss };
   3338         1.1  augustss 
   3339       1.208  drochner const usb_hub_descriptor_t uhci_hubd_piix = {
   3340         1.1  augustss 	USB_HUB_DESCRIPTOR_SIZE,
   3341         1.1  augustss 	UDESC_HUB,
   3342         1.1  augustss 	2,
   3343         1.1  augustss 	{ UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
   3344         1.1  augustss 	50,			/* power on to power good */
   3345         1.1  augustss 	0,
   3346         1.1  augustss 	{ 0x00 },		/* both ports are removable */
   3347       1.199  christos 	{ 0 },
   3348         1.1  augustss };
   3349         1.1  augustss 
   3350         1.1  augustss /*
   3351       1.166   dsainty  * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also
   3352       1.166   dsainty  * enables the port, and also states that SET_FEATURE(PORT_ENABLE)
   3353       1.166   dsainty  * should not be used by the USB subsystem.  As we cannot issue a
   3354       1.166   dsainty  * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port
   3355       1.166   dsainty  * will be enabled as part of the reset.
   3356       1.166   dsainty  *
   3357       1.166   dsainty  * On the VT83C572, the port cannot be successfully enabled until the
   3358       1.166   dsainty  * outstanding "port enable change" and "connection status change"
   3359       1.166   dsainty  * events have been reset.
   3360       1.166   dsainty  */
   3361       1.166   dsainty Static usbd_status
   3362       1.166   dsainty uhci_portreset(uhci_softc_t *sc, int index)
   3363       1.166   dsainty {
   3364       1.166   dsainty 	int lim, port, x;
   3365       1.166   dsainty 
   3366       1.166   dsainty 	if (index == 1)
   3367       1.166   dsainty 		port = UHCI_PORTSC1;
   3368       1.166   dsainty 	else if (index == 2)
   3369       1.166   dsainty 		port = UHCI_PORTSC2;
   3370       1.166   dsainty 	else
   3371       1.166   dsainty 		return (USBD_IOERROR);
   3372       1.166   dsainty 
   3373       1.166   dsainty 	x = URWMASK(UREAD2(sc, port));
   3374       1.166   dsainty 	UWRITE2(sc, port, x | UHCI_PORTSC_PR);
   3375       1.166   dsainty 
   3376       1.166   dsainty 	usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
   3377       1.166   dsainty 
   3378       1.166   dsainty 	DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n",
   3379       1.166   dsainty 		    index, UREAD2(sc, port)));
   3380       1.166   dsainty 
   3381       1.166   dsainty 	x = URWMASK(UREAD2(sc, port));
   3382       1.222  drochner 	UWRITE2(sc, port, x & ~(UHCI_PORTSC_PR | UHCI_PORTSC_SUSP));
   3383       1.166   dsainty 
   3384       1.166   dsainty 	delay(100);
   3385       1.166   dsainty 
   3386       1.166   dsainty 	DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n",
   3387       1.166   dsainty 		    index, UREAD2(sc, port)));
   3388       1.166   dsainty 
   3389       1.166   dsainty 	x = URWMASK(UREAD2(sc, port));
   3390       1.166   dsainty 	UWRITE2(sc, port, x  | UHCI_PORTSC_PE);
   3391       1.166   dsainty 
   3392       1.166   dsainty 	for (lim = 10; --lim > 0;) {
   3393       1.166   dsainty 		usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY);
   3394       1.166   dsainty 
   3395       1.166   dsainty 		x = UREAD2(sc, port);
   3396       1.166   dsainty 
   3397       1.166   dsainty 		DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n",
   3398       1.166   dsainty 			    index, lim, x));
   3399       1.166   dsainty 
   3400       1.166   dsainty 		if (!(x & UHCI_PORTSC_CCS)) {
   3401       1.166   dsainty 			/*
   3402       1.166   dsainty 			 * No device is connected (or was disconnected
   3403       1.166   dsainty 			 * during reset).  Consider the port reset.
   3404       1.166   dsainty 			 * The delay must be long enough to ensure on
   3405       1.166   dsainty 			 * the initial iteration that the device
   3406       1.166   dsainty 			 * connection will have been registered.  50ms
   3407       1.166   dsainty 			 * appears to be sufficient, but 20ms is not.
   3408       1.166   dsainty 			 */
   3409       1.166   dsainty 			DPRINTFN(3,("uhci port %d loop %u, device detached\n",
   3410       1.166   dsainty 				    index, lim));
   3411       1.166   dsainty 			break;
   3412       1.166   dsainty 		}
   3413       1.166   dsainty 
   3414       1.166   dsainty 		if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) {
   3415       1.166   dsainty 			/*
   3416       1.166   dsainty 			 * Port enabled changed and/or connection
   3417       1.166   dsainty 			 * status changed were set.  Reset either or
   3418       1.166   dsainty 			 * both raised flags (by writing a 1 to that
   3419       1.166   dsainty 			 * bit), and wait again for state to settle.
   3420       1.166   dsainty 			 */
   3421       1.166   dsainty 			UWRITE2(sc, port, URWMASK(x) |
   3422       1.166   dsainty 				(x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)));
   3423       1.166   dsainty 			continue;
   3424       1.166   dsainty 		}
   3425       1.166   dsainty 
   3426       1.166   dsainty 		if (x & UHCI_PORTSC_PE)
   3427       1.166   dsainty 			/* Port is enabled */
   3428       1.166   dsainty 			break;
   3429       1.166   dsainty 
   3430       1.166   dsainty 		UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE);
   3431       1.166   dsainty 	}
   3432       1.166   dsainty 
   3433       1.166   dsainty 	DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n",
   3434       1.166   dsainty 		    index, UREAD2(sc, port)));
   3435       1.166   dsainty 
   3436       1.166   dsainty 	if (lim <= 0) {
   3437       1.166   dsainty 		DPRINTFN(1,("uhci port %d reset timed out\n", index));
   3438       1.166   dsainty 		return (USBD_TIMEOUT);
   3439       1.166   dsainty 	}
   3440       1.184     perry 
   3441       1.166   dsainty 	sc->sc_isreset = 1;
   3442       1.166   dsainty 	return (USBD_NORMAL_COMPLETION);
   3443       1.166   dsainty }
   3444       1.166   dsainty 
   3445       1.166   dsainty /*
   3446         1.1  augustss  * Simulate a hardware hub by handling all the necessary requests.
   3447         1.1  augustss  */
   3448         1.1  augustss usbd_status
   3449       1.119  augustss uhci_root_ctrl_transfer(usbd_xfer_handle xfer)
   3450         1.1  augustss {
   3451        1.63  augustss 	usbd_status err;
   3452        1.16  augustss 
   3453        1.52  augustss 	/* Insert last in queue. */
   3454        1.63  augustss 	err = usb_insert_transfer(xfer);
   3455        1.63  augustss 	if (err)
   3456        1.63  augustss 		return (err);
   3457        1.52  augustss 
   3458       1.152  augustss 	/*
   3459        1.94  augustss 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   3460        1.94  augustss 	 * so start it first.
   3461        1.67  augustss 	 */
   3462        1.63  augustss 	return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   3463        1.16  augustss }
   3464        1.16  augustss 
   3465        1.16  augustss usbd_status
   3466       1.119  augustss uhci_root_ctrl_start(usbd_xfer_handle xfer)
   3467        1.16  augustss {
   3468       1.216  drochner 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   3469         1.1  augustss 	usb_device_request_t *req;
   3470        1.59  augustss 	void *buf = NULL;
   3471         1.1  augustss 	int port, x;
   3472        1.52  augustss 	int s, len, value, index, status, change, l, totlen = 0;
   3473         1.1  augustss 	usb_port_status_t ps;
   3474        1.63  augustss 	usbd_status err;
   3475         1.1  augustss 
   3476        1.82  augustss 	if (sc->sc_dying)
   3477        1.82  augustss 		return (USBD_IOERROR);
   3478        1.82  augustss 
   3479        1.48  augustss #ifdef DIAGNOSTIC
   3480        1.63  augustss 	if (!(xfer->rqflags & URQ_REQUEST))
   3481       1.163    provos 		panic("uhci_root_ctrl_transfer: not a request");
   3482        1.48  augustss #endif
   3483        1.63  augustss 	req = &xfer->request;
   3484         1.1  augustss 
   3485       1.152  augustss 	DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
   3486         1.1  augustss 		    req->bmRequestType, req->bRequest));
   3487         1.1  augustss 
   3488         1.1  augustss 	len = UGETW(req->wLength);
   3489         1.1  augustss 	value = UGETW(req->wValue);
   3490         1.1  augustss 	index = UGETW(req->wIndex);
   3491        1.49  augustss 
   3492        1.49  augustss 	if (len != 0)
   3493       1.159  augustss 		buf = KERNADDR(&xfer->dmabuf, 0);
   3494        1.49  augustss 
   3495         1.1  augustss #define C(x,y) ((x) | ((y) << 8))
   3496         1.1  augustss 	switch(C(req->bRequest, req->bmRequestType)) {
   3497         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
   3498         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
   3499         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
   3500       1.152  augustss 		/*
   3501        1.13  augustss 		 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
   3502         1.1  augustss 		 * for the integrated root hub.
   3503         1.1  augustss 		 */
   3504         1.1  augustss 		break;
   3505         1.1  augustss 	case C(UR_GET_CONFIG, UT_READ_DEVICE):
   3506         1.1  augustss 		if (len > 0) {
   3507         1.1  augustss 			*(u_int8_t *)buf = sc->sc_conf;
   3508         1.1  augustss 			totlen = 1;
   3509         1.1  augustss 		}
   3510         1.1  augustss 		break;
   3511         1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   3512         1.1  augustss 		DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
   3513       1.195  christos 		if (len == 0)
   3514       1.195  christos 			break;
   3515         1.1  augustss 		switch(value >> 8) {
   3516         1.1  augustss 		case UDESC_DEVICE:
   3517         1.1  augustss 			if ((value & 0xff) != 0) {
   3518        1.63  augustss 				err = USBD_IOERROR;
   3519         1.1  augustss 				goto ret;
   3520         1.1  augustss 			}
   3521         1.1  augustss 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
   3522        1.27  augustss 			USETW(uhci_devd.idVendor, sc->sc_id_vendor);
   3523         1.1  augustss 			memcpy(buf, &uhci_devd, l);
   3524         1.1  augustss 			break;
   3525         1.1  augustss 		case UDESC_CONFIG:
   3526         1.1  augustss 			if ((value & 0xff) != 0) {
   3527        1.63  augustss 				err = USBD_IOERROR;
   3528         1.1  augustss 				goto ret;
   3529         1.1  augustss 			}
   3530         1.1  augustss 			totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
   3531         1.1  augustss 			memcpy(buf, &uhci_confd, l);
   3532         1.1  augustss 			buf = (char *)buf + l;
   3533         1.1  augustss 			len -= l;
   3534         1.1  augustss 			l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
   3535         1.1  augustss 			totlen += l;
   3536         1.1  augustss 			memcpy(buf, &uhci_ifcd, l);
   3537         1.1  augustss 			buf = (char *)buf + l;
   3538         1.1  augustss 			len -= l;
   3539         1.1  augustss 			l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
   3540         1.1  augustss 			totlen += l;
   3541         1.1  augustss 			memcpy(buf, &uhci_endpd, l);
   3542         1.1  augustss 			break;
   3543         1.1  augustss 		case UDESC_STRING:
   3544       1.213  drochner #define sd ((usb_string_descriptor_t *)buf)
   3545         1.1  augustss 			switch (value & 0xff) {
   3546       1.182  augustss 			case 0: /* Language table */
   3547       1.213  drochner 				totlen = usb_makelangtbl(sd, len);
   3548       1.182  augustss 				break;
   3549         1.1  augustss 			case 1: /* Vendor */
   3550       1.213  drochner 				totlen = usb_makestrdesc(sd, len,
   3551       1.213  drochner 							 sc->sc_vendor);
   3552         1.1  augustss 				break;
   3553         1.1  augustss 			case 2: /* Product */
   3554       1.213  drochner 				totlen = usb_makestrdesc(sd, len,
   3555       1.213  drochner 							 "UHCI root hub");
   3556         1.1  augustss 				break;
   3557         1.1  augustss 			}
   3558       1.213  drochner #undef sd
   3559         1.1  augustss 			break;
   3560         1.1  augustss 		default:
   3561        1.63  augustss 			err = USBD_IOERROR;
   3562         1.1  augustss 			goto ret;
   3563         1.1  augustss 		}
   3564         1.1  augustss 		break;
   3565         1.1  augustss 	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
   3566         1.1  augustss 		if (len > 0) {
   3567         1.1  augustss 			*(u_int8_t *)buf = 0;
   3568         1.1  augustss 			totlen = 1;
   3569         1.1  augustss 		}
   3570         1.1  augustss 		break;
   3571         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_DEVICE):
   3572         1.1  augustss 		if (len > 1) {
   3573         1.1  augustss 			USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
   3574         1.1  augustss 			totlen = 2;
   3575         1.1  augustss 		}
   3576         1.1  augustss 		break;
   3577         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_INTERFACE):
   3578         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
   3579         1.1  augustss 		if (len > 1) {
   3580         1.1  augustss 			USETW(((usb_status_t *)buf)->wStatus, 0);
   3581         1.1  augustss 			totlen = 2;
   3582         1.1  augustss 		}
   3583         1.1  augustss 		break;
   3584         1.1  augustss 	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
   3585         1.1  augustss 		if (value >= USB_MAX_DEVICES) {
   3586        1.63  augustss 			err = USBD_IOERROR;
   3587         1.1  augustss 			goto ret;
   3588         1.1  augustss 		}
   3589         1.1  augustss 		sc->sc_addr = value;
   3590         1.1  augustss 		break;
   3591         1.1  augustss 	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
   3592         1.1  augustss 		if (value != 0 && value != 1) {
   3593        1.63  augustss 			err = USBD_IOERROR;
   3594         1.1  augustss 			goto ret;
   3595         1.1  augustss 		}
   3596         1.1  augustss 		sc->sc_conf = value;
   3597         1.1  augustss 		break;
   3598         1.1  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
   3599         1.1  augustss 		break;
   3600         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
   3601         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
   3602         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
   3603        1.63  augustss 		err = USBD_IOERROR;
   3604         1.1  augustss 		goto ret;
   3605         1.1  augustss 	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
   3606         1.1  augustss 		break;
   3607         1.1  augustss 	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
   3608         1.1  augustss 		break;
   3609         1.1  augustss 	/* Hub requests */
   3610         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   3611         1.1  augustss 		break;
   3612         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   3613        1.12  augustss 		DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
   3614        1.12  augustss 			     "port=%d feature=%d\n",
   3615         1.1  augustss 			     index, value));
   3616         1.1  augustss 		if (index == 1)
   3617         1.1  augustss 			port = UHCI_PORTSC1;
   3618         1.1  augustss 		else if (index == 2)
   3619         1.1  augustss 			port = UHCI_PORTSC2;
   3620         1.1  augustss 		else {
   3621        1.63  augustss 			err = USBD_IOERROR;
   3622         1.1  augustss 			goto ret;
   3623         1.1  augustss 		}
   3624         1.1  augustss 		switch(value) {
   3625         1.1  augustss 		case UHF_PORT_ENABLE:
   3626       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3627         1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
   3628         1.1  augustss 			break;
   3629         1.1  augustss 		case UHF_PORT_SUSPEND:
   3630       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3631       1.222  drochner 			if (!(x & UHCI_PORTSC_SUSP)) /* not suspended */
   3632       1.222  drochner 				break;
   3633       1.222  drochner 			UWRITE2(sc, port, x | UHCI_PORTSC_RD);
   3634       1.222  drochner 			/* see USB2 spec ch. 7.1.7.7 */
   3635       1.222  drochner 			usb_delay_ms(&sc->sc_bus, 20);
   3636         1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
   3637       1.222  drochner 			/* 10ms resume delay must be provided by caller */
   3638         1.1  augustss 			break;
   3639         1.1  augustss 		case UHF_PORT_RESET:
   3640       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3641         1.1  augustss 			UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
   3642         1.1  augustss 			break;
   3643         1.1  augustss 		case UHF_C_PORT_CONNECTION:
   3644       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3645         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
   3646         1.1  augustss 			break;
   3647         1.1  augustss 		case UHF_C_PORT_ENABLE:
   3648       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3649         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
   3650         1.1  augustss 			break;
   3651         1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   3652       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3653         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
   3654         1.1  augustss 			break;
   3655         1.1  augustss 		case UHF_C_PORT_RESET:
   3656         1.1  augustss 			sc->sc_isreset = 0;
   3657        1.63  augustss 			err = USBD_NORMAL_COMPLETION;
   3658         1.1  augustss 			goto ret;
   3659         1.1  augustss 		case UHF_PORT_CONNECTION:
   3660         1.1  augustss 		case UHF_PORT_OVER_CURRENT:
   3661         1.1  augustss 		case UHF_PORT_POWER:
   3662         1.1  augustss 		case UHF_PORT_LOW_SPEED:
   3663         1.1  augustss 		case UHF_C_PORT_SUSPEND:
   3664         1.1  augustss 		default:
   3665        1.63  augustss 			err = USBD_IOERROR;
   3666         1.1  augustss 			goto ret;
   3667         1.1  augustss 		}
   3668         1.1  augustss 		break;
   3669         1.1  augustss 	case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
   3670         1.1  augustss 		if (index == 1)
   3671         1.1  augustss 			port = UHCI_PORTSC1;
   3672         1.1  augustss 		else if (index == 2)
   3673         1.1  augustss 			port = UHCI_PORTSC2;
   3674         1.1  augustss 		else {
   3675        1.63  augustss 			err = USBD_IOERROR;
   3676         1.1  augustss 			goto ret;
   3677         1.1  augustss 		}
   3678         1.1  augustss 		if (len > 0) {
   3679       1.152  augustss 			*(u_int8_t *)buf =
   3680         1.1  augustss 				(UREAD2(sc, port) & UHCI_PORTSC_LS) >>
   3681         1.1  augustss 				UHCI_PORTSC_LS_SHIFT;
   3682         1.1  augustss 			totlen = 1;
   3683         1.1  augustss 		}
   3684         1.1  augustss 		break;
   3685         1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   3686       1.195  christos 		if (len == 0)
   3687       1.195  christos 			break;
   3688       1.177    toshii 		if ((value & 0xff) != 0) {
   3689        1.63  augustss 			err = USBD_IOERROR;
   3690         1.1  augustss 			goto ret;
   3691         1.1  augustss 		}
   3692         1.1  augustss 		l = min(len, USB_HUB_DESCRIPTOR_SIZE);
   3693         1.1  augustss 		totlen = l;
   3694         1.1  augustss 		memcpy(buf, &uhci_hubd_piix, l);
   3695         1.1  augustss 		break;
   3696         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   3697         1.1  augustss 		if (len != 4) {
   3698        1.63  augustss 			err = USBD_IOERROR;
   3699         1.1  augustss 			goto ret;
   3700         1.1  augustss 		}
   3701         1.1  augustss 		memset(buf, 0, len);
   3702         1.1  augustss 		totlen = len;
   3703         1.1  augustss 		break;
   3704         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   3705         1.1  augustss 		if (index == 1)
   3706         1.1  augustss 			port = UHCI_PORTSC1;
   3707         1.1  augustss 		else if (index == 2)
   3708         1.1  augustss 			port = UHCI_PORTSC2;
   3709         1.1  augustss 		else {
   3710        1.63  augustss 			err = USBD_IOERROR;
   3711         1.1  augustss 			goto ret;
   3712         1.1  augustss 		}
   3713         1.1  augustss 		if (len != 4) {
   3714        1.63  augustss 			err = USBD_IOERROR;
   3715         1.1  augustss 			goto ret;
   3716         1.1  augustss 		}
   3717         1.1  augustss 		x = UREAD2(sc, port);
   3718         1.1  augustss 		status = change = 0;
   3719       1.142  augustss 		if (x & UHCI_PORTSC_CCS)
   3720         1.1  augustss 			status |= UPS_CURRENT_CONNECT_STATUS;
   3721       1.152  augustss 		if (x & UHCI_PORTSC_CSC)
   3722         1.1  augustss 			change |= UPS_C_CONNECT_STATUS;
   3723       1.152  augustss 		if (x & UHCI_PORTSC_PE)
   3724         1.1  augustss 			status |= UPS_PORT_ENABLED;
   3725       1.152  augustss 		if (x & UHCI_PORTSC_POEDC)
   3726         1.1  augustss 			change |= UPS_C_PORT_ENABLED;
   3727       1.152  augustss 		if (x & UHCI_PORTSC_OCI)
   3728         1.1  augustss 			status |= UPS_OVERCURRENT_INDICATOR;
   3729       1.152  augustss 		if (x & UHCI_PORTSC_OCIC)
   3730         1.1  augustss 			change |= UPS_C_OVERCURRENT_INDICATOR;
   3731       1.152  augustss 		if (x & UHCI_PORTSC_SUSP)
   3732         1.1  augustss 			status |= UPS_SUSPEND;
   3733       1.152  augustss 		if (x & UHCI_PORTSC_LSDA)
   3734         1.1  augustss 			status |= UPS_LOW_SPEED;
   3735         1.1  augustss 		status |= UPS_PORT_POWER;
   3736         1.1  augustss 		if (sc->sc_isreset)
   3737         1.1  augustss 			change |= UPS_C_PORT_RESET;
   3738         1.1  augustss 		USETW(ps.wPortStatus, status);
   3739         1.1  augustss 		USETW(ps.wPortChange, change);
   3740         1.1  augustss 		l = min(len, sizeof ps);
   3741         1.1  augustss 		memcpy(buf, &ps, l);
   3742         1.1  augustss 		totlen = l;
   3743         1.1  augustss 		break;
   3744         1.1  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   3745        1.63  augustss 		err = USBD_IOERROR;
   3746         1.1  augustss 		goto ret;
   3747         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   3748         1.1  augustss 		break;
   3749         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   3750         1.1  augustss 		if (index == 1)
   3751         1.1  augustss 			port = UHCI_PORTSC1;
   3752         1.1  augustss 		else if (index == 2)
   3753         1.1  augustss 			port = UHCI_PORTSC2;
   3754         1.1  augustss 		else {
   3755        1.63  augustss 			err = USBD_IOERROR;
   3756         1.1  augustss 			goto ret;
   3757         1.1  augustss 		}
   3758         1.1  augustss 		switch(value) {
   3759         1.1  augustss 		case UHF_PORT_ENABLE:
   3760       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3761         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_PE);
   3762         1.1  augustss 			break;
   3763         1.1  augustss 		case UHF_PORT_SUSPEND:
   3764       1.137  augustss 			x = URWMASK(UREAD2(sc, port));
   3765         1.1  augustss 			UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
   3766         1.1  augustss 			break;
   3767         1.1  augustss 		case UHF_PORT_RESET:
   3768       1.166   dsainty 			err = uhci_portreset(sc, index);
   3769       1.166   dsainty 			goto ret;
   3770       1.111  augustss 		case UHF_PORT_POWER:
   3771       1.111  augustss 			/* Pretend we turned on power */
   3772       1.115   mycroft 			err = USBD_NORMAL_COMPLETION;
   3773       1.111  augustss 			goto ret;
   3774         1.1  augustss 		case UHF_C_PORT_CONNECTION:
   3775         1.1  augustss 		case UHF_C_PORT_ENABLE:
   3776         1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   3777         1.1  augustss 		case UHF_PORT_CONNECTION:
   3778         1.1  augustss 		case UHF_PORT_OVER_CURRENT:
   3779         1.1  augustss 		case UHF_PORT_LOW_SPEED:
   3780         1.1  augustss 		case UHF_C_PORT_SUSPEND:
   3781         1.1  augustss 		case UHF_C_PORT_RESET:
   3782         1.1  augustss 		default:
   3783        1.63  augustss 			err = USBD_IOERROR;
   3784         1.1  augustss 			goto ret;
   3785         1.1  augustss 		}
   3786         1.1  augustss 		break;
   3787         1.1  augustss 	default:
   3788        1.63  augustss 		err = USBD_IOERROR;
   3789         1.1  augustss 		goto ret;
   3790         1.1  augustss 	}
   3791        1.63  augustss 	xfer->actlen = totlen;
   3792        1.63  augustss 	err = USBD_NORMAL_COMPLETION;
   3793         1.1  augustss  ret:
   3794        1.63  augustss 	xfer->status = err;
   3795        1.52  augustss 	s = splusb();
   3796        1.63  augustss 	usb_transfer_complete(xfer);
   3797        1.52  augustss 	splx(s);
   3798         1.1  augustss 	return (USBD_IN_PROGRESS);
   3799         1.1  augustss }
   3800         1.1  augustss 
   3801         1.1  augustss /* Abort a root control request. */
   3802         1.1  augustss void
   3803       1.205  christos uhci_root_ctrl_abort(usbd_xfer_handle xfer)
   3804         1.1  augustss {
   3805        1.70  augustss 	/* Nothing to do, all transfers are synchronous. */
   3806         1.1  augustss }
   3807         1.1  augustss 
   3808         1.1  augustss /* Close the root pipe. */
   3809         1.1  augustss void
   3810       1.205  christos uhci_root_ctrl_close(usbd_pipe_handle pipe)
   3811         1.1  augustss {
   3812         1.1  augustss 	DPRINTF(("uhci_root_ctrl_close\n"));
   3813         1.1  augustss }
   3814         1.1  augustss 
   3815         1.1  augustss /* Abort a root interrupt request. */
   3816         1.1  augustss void
   3817       1.119  augustss uhci_root_intr_abort(usbd_xfer_handle xfer)
   3818         1.1  augustss {
   3819       1.216  drochner 	uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
   3820        1.30  augustss 
   3821        1.96  augustss 	usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, xfer);
   3822        1.96  augustss 	sc->sc_intr_xfer = NULL;
   3823        1.58  augustss 
   3824        1.63  augustss 	if (xfer->pipe->intrxfer == xfer) {
   3825        1.58  augustss 		DPRINTF(("uhci_root_intr_abort: remove\n"));
   3826        1.63  augustss 		xfer->pipe->intrxfer = 0;
   3827        1.58  augustss 	}
   3828        1.63  augustss 	xfer->status = USBD_CANCELLED;
   3829        1.96  augustss #ifdef DIAGNOSTIC
   3830        1.96  augustss 	UXFER(xfer)->iinfo.isdone = 1;
   3831        1.96  augustss #endif
   3832        1.63  augustss 	usb_transfer_complete(xfer);
   3833         1.1  augustss }
   3834         1.1  augustss 
   3835        1.16  augustss usbd_status
   3836       1.119  augustss uhci_root_intr_transfer(usbd_xfer_handle xfer)
   3837        1.16  augustss {
   3838        1.63  augustss 	usbd_status err;
   3839        1.16  augustss 
   3840        1.52  augustss 	/* Insert last in queue. */
   3841        1.63  augustss 	err = usb_insert_transfer(xfer);
   3842        1.63  augustss 	if (err)
   3843        1.63  augustss 		return (err);
   3844        1.52  augustss 
   3845       1.186     skrll 	/*
   3846       1.186     skrll 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   3847        1.67  augustss 	 * start first
   3848        1.67  augustss 	 */
   3849        1.63  augustss 	return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
   3850        1.16  augustss }
   3851        1.16  augustss 
   3852         1.1  augustss /* Start a transfer on the root interrupt pipe */
   3853         1.1  augustss usbd_status
   3854       1.119  augustss uhci_root_intr_start(usbd_xfer_handle xfer)
   3855         1.1  augustss {
   3856        1.63  augustss 	usbd_pipe_handle pipe = xfer->pipe;
   3857       1.216  drochner 	uhci_softc_t *sc = pipe->device->bus->hci_private;
   3858       1.174  drochner 	unsigned int ival;
   3859         1.1  augustss 
   3860       1.173      gson 	DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n",
   3861        1.63  augustss 		     xfer, xfer->length, xfer->flags));
   3862        1.82  augustss 
   3863        1.82  augustss 	if (sc->sc_dying)
   3864        1.82  augustss 		return (USBD_IOERROR);
   3865         1.1  augustss 
   3866       1.174  drochner 	/* XXX temporary variable needed to avoid gcc3 warning */
   3867       1.174  drochner 	ival = xfer->pipe->endpoint->edesc->bInterval;
   3868       1.174  drochner 	sc->sc_ival = mstohz(ival);
   3869        1.96  augustss 	usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
   3870        1.96  augustss 	sc->sc_intr_xfer = xfer;
   3871         1.1  augustss 	return (USBD_IN_PROGRESS);
   3872         1.1  augustss }
   3873         1.1  augustss 
   3874         1.1  augustss /* Close the root interrupt pipe. */
   3875         1.1  augustss void
   3876       1.119  augustss uhci_root_intr_close(usbd_pipe_handle pipe)
   3877         1.1  augustss {
   3878       1.216  drochner 	uhci_softc_t *sc = pipe->device->bus->hci_private;
   3879        1.30  augustss 
   3880        1.96  augustss 	usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, sc->sc_intr_xfer);
   3881        1.96  augustss 	sc->sc_intr_xfer = NULL;
   3882         1.1  augustss 	DPRINTF(("uhci_root_intr_close\n"));
   3883         1.1  augustss }
   3884