uhci.c revision 1.224 1 1.224 christos /* $NetBSD: uhci.c,v 1.224 2008/12/16 22:35:36 christos Exp $ */
2 1.67 augustss /* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $ */
3 1.1 augustss
4 1.1 augustss /*
5 1.185 mycroft * Copyright (c) 1998, 2004 The NetBSD Foundation, Inc.
6 1.1 augustss * All rights reserved.
7 1.1 augustss *
8 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
9 1.113 augustss * by Lennart Augustsson (lennart (at) augustsson.net) at
10 1.11 augustss * Carlstedt Research & Technology.
11 1.1 augustss *
12 1.1 augustss * Redistribution and use in source and binary forms, with or without
13 1.1 augustss * modification, are permitted provided that the following conditions
14 1.1 augustss * are met:
15 1.1 augustss * 1. Redistributions of source code must retain the above copyright
16 1.1 augustss * notice, this list of conditions and the following disclaimer.
17 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
18 1.1 augustss * notice, this list of conditions and the following disclaimer in the
19 1.1 augustss * documentation and/or other materials provided with the distribution.
20 1.1 augustss *
21 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
32 1.1 augustss */
33 1.1 augustss
34 1.1 augustss /*
35 1.1 augustss * USB Universal Host Controller driver.
36 1.28 augustss * Handles e.g. PIIX3 and PIIX4.
37 1.1 augustss *
38 1.131 augustss * UHCI spec: http://developer.intel.com/design/USB/UHCI11D.htm
39 1.168 ichiro * USB spec: http://www.usb.org/developers/docs/usbspec.zip
40 1.71 augustss * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
41 1.71 augustss * ftp://download.intel.com/design/intarch/datashts/29056201.pdf
42 1.1 augustss */
43 1.143 lukem
44 1.143 lukem #include <sys/cdefs.h>
45 1.224 christos __KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.224 2008/12/16 22:35:36 christos Exp $");
46 1.1 augustss
47 1.1 augustss #include <sys/param.h>
48 1.1 augustss #include <sys/systm.h>
49 1.1 augustss #include <sys/kernel.h>
50 1.1 augustss #include <sys/malloc.h>
51 1.37 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
52 1.1 augustss #include <sys/device.h>
53 1.67 augustss #include <sys/select.h>
54 1.183 fvdl #include <sys/extent.h>
55 1.183 fvdl #include <uvm/uvm_extern.h>
56 1.13 augustss #elif defined(__FreeBSD__)
57 1.13 augustss #include <sys/module.h>
58 1.13 augustss #include <sys/bus.h>
59 1.67 augustss #include <machine/bus_pio.h>
60 1.67 augustss #if defined(DIAGNOSTIC) && defined(__i386__)
61 1.211 ad #include <sys/cpu.h>
62 1.67 augustss #endif
63 1.13 augustss #endif
64 1.1 augustss #include <sys/proc.h>
65 1.1 augustss #include <sys/queue.h>
66 1.211 ad #include <sys/bus.h>
67 1.1 augustss
68 1.39 augustss #include <machine/endian.h>
69 1.7 augustss
70 1.1 augustss #include <dev/usb/usb.h>
71 1.1 augustss #include <dev/usb/usbdi.h>
72 1.1 augustss #include <dev/usb/usbdivar.h>
73 1.7 augustss #include <dev/usb/usb_mem.h>
74 1.1 augustss #include <dev/usb/usb_quirks.h>
75 1.1 augustss
76 1.1 augustss #include <dev/usb/uhcireg.h>
77 1.1 augustss #include <dev/usb/uhcivar.h>
78 1.213 drochner #include <dev/usb/usbroothub_subr.h>
79 1.1 augustss
80 1.125 augustss /* Use bandwidth reclamation for control transfers. Some devices choke on it. */
81 1.125 augustss /*#define UHCI_CTL_LOOP */
82 1.125 augustss
83 1.13 augustss #if defined(__FreeBSD__)
84 1.13 augustss #include <machine/clock.h>
85 1.13 augustss
86 1.13 augustss #define delay(d) DELAY(d)
87 1.13 augustss #endif
88 1.13 augustss
89 1.37 augustss #if defined(__OpenBSD__)
90 1.37 augustss struct cfdriver uhci_cd = {
91 1.37 augustss NULL, "uhci", DV_DULL
92 1.37 augustss };
93 1.37 augustss #endif
94 1.37 augustss
95 1.67 augustss #ifdef UHCI_DEBUG
96 1.92 augustss uhci_softc_t *thesc;
97 1.59 augustss #define DPRINTF(x) if (uhcidebug) printf x
98 1.59 augustss #define DPRINTFN(n,x) if (uhcidebug>(n)) printf x
99 1.67 augustss int uhcidebug = 0;
100 1.125 augustss int uhcinoloop = 0;
101 1.122 tv #ifndef __NetBSD__
102 1.224 christos #define snprintb((q), (f), "%b", q,f,b,l) snprintf((b), (l))
103 1.122 tv #endif
104 1.59 augustss #else
105 1.59 augustss #define DPRINTF(x)
106 1.59 augustss #define DPRINTFN(n,x)
107 1.59 augustss #endif
108 1.59 augustss
109 1.39 augustss /*
110 1.39 augustss * The UHCI controller is little endian, so on big endian machines
111 1.181 drochner * the data stored in memory needs to be swapped.
112 1.39 augustss */
113 1.107 augustss #if defined(__FreeBSD__) || defined(__OpenBSD__)
114 1.39 augustss #if BYTE_ORDER == BIG_ENDIAN
115 1.88 tsutsui #define htole32(x) (bswap32(x))
116 1.88 tsutsui #define le32toh(x) (bswap32(x))
117 1.39 augustss #else
118 1.88 tsutsui #define htole32(x) (x)
119 1.88 tsutsui #define le32toh(x) (x)
120 1.88 tsutsui #endif
121 1.39 augustss #endif
122 1.39 augustss
123 1.1 augustss struct uhci_pipe {
124 1.1 augustss struct usbd_pipe pipe;
125 1.32 augustss int nexttoggle;
126 1.92 augustss
127 1.92 augustss u_char aborting;
128 1.92 augustss usbd_xfer_handle abortstart, abortend;
129 1.92 augustss
130 1.1 augustss /* Info needed for different pipe kinds. */
131 1.1 augustss union {
132 1.1 augustss /* Control pipe */
133 1.1 augustss struct {
134 1.1 augustss uhci_soft_qh_t *sqh;
135 1.7 augustss usb_dma_t reqdma;
136 1.16 augustss uhci_soft_td_t *setup, *stat;
137 1.1 augustss u_int length;
138 1.1 augustss } ctl;
139 1.1 augustss /* Interrupt pipe */
140 1.1 augustss struct {
141 1.1 augustss int npoll;
142 1.187 skrll int isread;
143 1.1 augustss uhci_soft_qh_t **qhs;
144 1.1 augustss } intr;
145 1.1 augustss /* Bulk pipe */
146 1.1 augustss struct {
147 1.1 augustss uhci_soft_qh_t *sqh;
148 1.1 augustss u_int length;
149 1.1 augustss int isread;
150 1.1 augustss } bulk;
151 1.16 augustss /* Iso pipe */
152 1.16 augustss struct iso {
153 1.16 augustss uhci_soft_td_t **stds;
154 1.48 augustss int next, inuse;
155 1.16 augustss } iso;
156 1.1 augustss } u;
157 1.1 augustss };
158 1.1 augustss
159 1.142 augustss Static void uhci_globalreset(uhci_softc_t *);
160 1.166 dsainty Static usbd_status uhci_portreset(uhci_softc_t*, int);
161 1.142 augustss Static void uhci_reset(uhci_softc_t *);
162 1.119 augustss Static usbd_status uhci_run(uhci_softc_t *, int run);
163 1.123 augustss Static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *);
164 1.119 augustss Static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *);
165 1.123 augustss Static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *);
166 1.119 augustss Static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *);
167 1.16 augustss #if 0
168 1.119 augustss Static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *,
169 1.119 augustss uhci_intr_info_t *);
170 1.119 augustss Static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *);
171 1.16 augustss #endif
172 1.1 augustss
173 1.152 augustss Static void uhci_free_std_chain(uhci_softc_t *,
174 1.119 augustss uhci_soft_td_t *, uhci_soft_td_t *);
175 1.119 augustss Static usbd_status uhci_alloc_std_chain(struct uhci_pipe *,
176 1.152 augustss uhci_softc_t *, int, int, u_int16_t, usb_dma_t *,
177 1.119 augustss uhci_soft_td_t **, uhci_soft_td_t **);
178 1.119 augustss Static void uhci_poll_hub(void *);
179 1.119 augustss Static void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle);
180 1.119 augustss Static void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *);
181 1.119 augustss Static void uhci_idone(uhci_intr_info_t *);
182 1.119 augustss
183 1.119 augustss Static void uhci_abort_xfer(usbd_xfer_handle, usbd_status status);
184 1.119 augustss
185 1.119 augustss Static void uhci_timeout(void *);
186 1.153 augustss Static void uhci_timeout_task(void *);
187 1.123 augustss Static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
188 1.123 augustss Static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
189 1.119 augustss Static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *);
190 1.123 augustss Static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
191 1.123 augustss Static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
192 1.119 augustss Static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *);
193 1.123 augustss Static void uhci_add_loop(uhci_softc_t *sc);
194 1.123 augustss Static void uhci_rem_loop(uhci_softc_t *sc);
195 1.119 augustss
196 1.119 augustss Static usbd_status uhci_setup_isoc(usbd_pipe_handle pipe);
197 1.119 augustss Static void uhci_device_isoc_enter(usbd_xfer_handle);
198 1.119 augustss
199 1.119 augustss Static usbd_status uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
200 1.119 augustss Static void uhci_freem(struct usbd_bus *, usb_dma_t *);
201 1.119 augustss
202 1.119 augustss Static usbd_xfer_handle uhci_allocx(struct usbd_bus *);
203 1.119 augustss Static void uhci_freex(struct usbd_bus *, usbd_xfer_handle);
204 1.119 augustss
205 1.119 augustss Static usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle);
206 1.119 augustss Static usbd_status uhci_device_ctrl_start(usbd_xfer_handle);
207 1.119 augustss Static void uhci_device_ctrl_abort(usbd_xfer_handle);
208 1.119 augustss Static void uhci_device_ctrl_close(usbd_pipe_handle);
209 1.119 augustss Static void uhci_device_ctrl_done(usbd_xfer_handle);
210 1.119 augustss
211 1.119 augustss Static usbd_status uhci_device_intr_transfer(usbd_xfer_handle);
212 1.119 augustss Static usbd_status uhci_device_intr_start(usbd_xfer_handle);
213 1.119 augustss Static void uhci_device_intr_abort(usbd_xfer_handle);
214 1.119 augustss Static void uhci_device_intr_close(usbd_pipe_handle);
215 1.119 augustss Static void uhci_device_intr_done(usbd_xfer_handle);
216 1.119 augustss
217 1.119 augustss Static usbd_status uhci_device_bulk_transfer(usbd_xfer_handle);
218 1.119 augustss Static usbd_status uhci_device_bulk_start(usbd_xfer_handle);
219 1.119 augustss Static void uhci_device_bulk_abort(usbd_xfer_handle);
220 1.119 augustss Static void uhci_device_bulk_close(usbd_pipe_handle);
221 1.119 augustss Static void uhci_device_bulk_done(usbd_xfer_handle);
222 1.119 augustss
223 1.119 augustss Static usbd_status uhci_device_isoc_transfer(usbd_xfer_handle);
224 1.119 augustss Static usbd_status uhci_device_isoc_start(usbd_xfer_handle);
225 1.119 augustss Static void uhci_device_isoc_abort(usbd_xfer_handle);
226 1.119 augustss Static void uhci_device_isoc_close(usbd_pipe_handle);
227 1.119 augustss Static void uhci_device_isoc_done(usbd_xfer_handle);
228 1.119 augustss
229 1.119 augustss Static usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle);
230 1.119 augustss Static usbd_status uhci_root_ctrl_start(usbd_xfer_handle);
231 1.119 augustss Static void uhci_root_ctrl_abort(usbd_xfer_handle);
232 1.119 augustss Static void uhci_root_ctrl_close(usbd_pipe_handle);
233 1.119 augustss Static void uhci_root_ctrl_done(usbd_xfer_handle);
234 1.119 augustss
235 1.119 augustss Static usbd_status uhci_root_intr_transfer(usbd_xfer_handle);
236 1.119 augustss Static usbd_status uhci_root_intr_start(usbd_xfer_handle);
237 1.119 augustss Static void uhci_root_intr_abort(usbd_xfer_handle);
238 1.119 augustss Static void uhci_root_intr_close(usbd_pipe_handle);
239 1.119 augustss Static void uhci_root_intr_done(usbd_xfer_handle);
240 1.119 augustss
241 1.119 augustss Static usbd_status uhci_open(usbd_pipe_handle);
242 1.119 augustss Static void uhci_poll(struct usbd_bus *);
243 1.133 augustss Static void uhci_softintr(void *);
244 1.119 augustss
245 1.119 augustss Static usbd_status uhci_device_request(usbd_xfer_handle xfer);
246 1.119 augustss
247 1.119 augustss Static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *);
248 1.158 augustss Static void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *);
249 1.152 augustss Static usbd_status uhci_device_setintr(uhci_softc_t *sc,
250 1.119 augustss struct uhci_pipe *pipe, int ival);
251 1.119 augustss
252 1.119 augustss Static void uhci_device_clear_toggle(usbd_pipe_handle pipe);
253 1.119 augustss Static void uhci_noop(usbd_pipe_handle pipe);
254 1.119 augustss
255 1.192 perry Static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *,
256 1.119 augustss uhci_soft_qh_t *);
257 1.119 augustss
258 1.119 augustss #ifdef UHCI_DEBUG
259 1.119 augustss Static void uhci_dump_all(uhci_softc_t *);
260 1.119 augustss Static void uhci_dumpregs(uhci_softc_t *);
261 1.119 augustss Static void uhci_dump_qhs(uhci_soft_qh_t *);
262 1.119 augustss Static void uhci_dump_qh(uhci_soft_qh_t *);
263 1.119 augustss Static void uhci_dump_tds(uhci_soft_td_t *);
264 1.119 augustss Static void uhci_dump_td(uhci_soft_td_t *);
265 1.119 augustss Static void uhci_dump_ii(uhci_intr_info_t *ii);
266 1.119 augustss void uhci_dump(void);
267 1.1 augustss #endif
268 1.1 augustss
269 1.112 augustss #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
270 1.112 augustss BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
271 1.112 augustss #define UWRITE1(sc, r, x) \
272 1.165 dsainty do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \
273 1.165 dsainty } while (/*CONSTCOND*/0)
274 1.112 augustss #define UWRITE2(sc, r, x) \
275 1.165 dsainty do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \
276 1.165 dsainty } while (/*CONSTCOND*/0)
277 1.112 augustss #define UWRITE4(sc, r, x) \
278 1.165 dsainty do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \
279 1.165 dsainty } while (/*CONSTCOND*/0)
280 1.196 mrg static __inline uint8_t
281 1.196 mrg UREAD1(uhci_softc_t *sc, bus_size_t r)
282 1.196 mrg {
283 1.196 mrg
284 1.196 mrg UBARR(sc);
285 1.196 mrg return bus_space_read_1(sc->iot, sc->ioh, r);
286 1.196 mrg }
287 1.196 mrg
288 1.196 mrg static __inline uint16_t
289 1.196 mrg UREAD2(uhci_softc_t *sc, bus_size_t r)
290 1.196 mrg {
291 1.196 mrg
292 1.196 mrg UBARR(sc);
293 1.196 mrg return bus_space_read_2(sc->iot, sc->ioh, r);
294 1.196 mrg }
295 1.196 mrg
296 1.196 mrg static __inline uint32_t
297 1.196 mrg UREAD4(uhci_softc_t *sc, bus_size_t r)
298 1.196 mrg {
299 1.196 mrg
300 1.196 mrg UBARR(sc);
301 1.196 mrg return bus_space_read_4(sc->iot, sc->ioh, r);
302 1.196 mrg }
303 1.1 augustss
304 1.1 augustss #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
305 1.1 augustss #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
306 1.1 augustss
307 1.142 augustss #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */
308 1.1 augustss
309 1.1 augustss #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
310 1.1 augustss
311 1.1 augustss #define UHCI_INTR_ENDPT 1
312 1.1 augustss
313 1.208 drochner const struct usbd_bus_methods uhci_bus_methods = {
314 1.48 augustss uhci_open,
315 1.85 augustss uhci_softintr,
316 1.48 augustss uhci_poll,
317 1.48 augustss uhci_allocm,
318 1.48 augustss uhci_freem,
319 1.76 augustss uhci_allocx,
320 1.76 augustss uhci_freex,
321 1.48 augustss };
322 1.48 augustss
323 1.208 drochner const struct usbd_pipe_methods uhci_root_ctrl_methods = {
324 1.1 augustss uhci_root_ctrl_transfer,
325 1.16 augustss uhci_root_ctrl_start,
326 1.1 augustss uhci_root_ctrl_abort,
327 1.1 augustss uhci_root_ctrl_close,
328 1.38 augustss uhci_noop,
329 1.84 augustss uhci_root_ctrl_done,
330 1.1 augustss };
331 1.1 augustss
332 1.208 drochner const struct usbd_pipe_methods uhci_root_intr_methods = {
333 1.1 augustss uhci_root_intr_transfer,
334 1.16 augustss uhci_root_intr_start,
335 1.1 augustss uhci_root_intr_abort,
336 1.1 augustss uhci_root_intr_close,
337 1.38 augustss uhci_noop,
338 1.41 augustss uhci_root_intr_done,
339 1.1 augustss };
340 1.1 augustss
341 1.208 drochner const struct usbd_pipe_methods uhci_device_ctrl_methods = {
342 1.1 augustss uhci_device_ctrl_transfer,
343 1.16 augustss uhci_device_ctrl_start,
344 1.1 augustss uhci_device_ctrl_abort,
345 1.1 augustss uhci_device_ctrl_close,
346 1.38 augustss uhci_noop,
347 1.41 augustss uhci_device_ctrl_done,
348 1.1 augustss };
349 1.1 augustss
350 1.208 drochner const struct usbd_pipe_methods uhci_device_intr_methods = {
351 1.1 augustss uhci_device_intr_transfer,
352 1.16 augustss uhci_device_intr_start,
353 1.1 augustss uhci_device_intr_abort,
354 1.1 augustss uhci_device_intr_close,
355 1.38 augustss uhci_device_clear_toggle,
356 1.41 augustss uhci_device_intr_done,
357 1.1 augustss };
358 1.1 augustss
359 1.208 drochner const struct usbd_pipe_methods uhci_device_bulk_methods = {
360 1.1 augustss uhci_device_bulk_transfer,
361 1.16 augustss uhci_device_bulk_start,
362 1.1 augustss uhci_device_bulk_abort,
363 1.1 augustss uhci_device_bulk_close,
364 1.38 augustss uhci_device_clear_toggle,
365 1.41 augustss uhci_device_bulk_done,
366 1.1 augustss };
367 1.1 augustss
368 1.208 drochner const struct usbd_pipe_methods uhci_device_isoc_methods = {
369 1.16 augustss uhci_device_isoc_transfer,
370 1.16 augustss uhci_device_isoc_start,
371 1.16 augustss uhci_device_isoc_abort,
372 1.16 augustss uhci_device_isoc_close,
373 1.38 augustss uhci_noop,
374 1.41 augustss uhci_device_isoc_done,
375 1.16 augustss };
376 1.16 augustss
377 1.92 augustss #define uhci_add_intr_info(sc, ii) \
378 1.169 augustss LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list)
379 1.92 augustss #define uhci_del_intr_info(ii) \
380 1.169 augustss do { \
381 1.169 augustss LIST_REMOVE((ii), list); \
382 1.169 augustss (ii)->list.le_prev = NULL; \
383 1.169 augustss } while (0)
384 1.169 augustss #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL)
385 1.92 augustss
386 1.192 perry Static inline uhci_soft_qh_t *
387 1.119 augustss uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh)
388 1.92 augustss {
389 1.92 augustss DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh));
390 1.92 augustss
391 1.92 augustss for (; pqh->hlink != sqh; pqh = pqh->hlink) {
392 1.152 augustss #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG)
393 1.223 bouyer usb_syncmem(&pqh->dma,
394 1.223 bouyer pqh->offs + offsetof(uhci_qh_t, qh_hlink),
395 1.223 bouyer sizeof(pqh->qh.qh_hlink),
396 1.223 bouyer BUS_DMASYNC_POSTWRITE);
397 1.92 augustss if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) {
398 1.102 augustss printf("uhci_find_prev_qh: QH not found\n");
399 1.92 augustss return (NULL);
400 1.92 augustss }
401 1.92 augustss #endif
402 1.92 augustss }
403 1.92 augustss return (pqh);
404 1.92 augustss }
405 1.92 augustss
406 1.1 augustss void
407 1.142 augustss uhci_globalreset(uhci_softc_t *sc)
408 1.1 augustss {
409 1.1 augustss UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */
410 1.20 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
411 1.1 augustss UHCICMD(sc, 0); /* do nothing */
412 1.1 augustss }
413 1.1 augustss
414 1.1 augustss usbd_status
415 1.119 augustss uhci_init(uhci_softc_t *sc)
416 1.1 augustss {
417 1.63 augustss usbd_status err;
418 1.1 augustss int i, j;
419 1.123 augustss uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh;
420 1.1 augustss uhci_soft_td_t *std;
421 1.1 augustss
422 1.1 augustss DPRINTFN(1,("uhci_init: start\n"));
423 1.1 augustss
424 1.67 augustss #ifdef UHCI_DEBUG
425 1.92 augustss thesc = sc;
426 1.92 augustss
427 1.1 augustss if (uhcidebug > 2)
428 1.1 augustss uhci_dumpregs(sc);
429 1.1 augustss #endif
430 1.1 augustss
431 1.219 jmcneill sc->sc_suspend = PWR_RESUME;
432 1.219 jmcneill
433 1.1 augustss UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
434 1.142 augustss uhci_globalreset(sc); /* reset the controller */
435 1.142 augustss uhci_reset(sc);
436 1.24 augustss
437 1.183 fvdl #ifdef __NetBSD__
438 1.218 drochner usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
439 1.183 fvdl USB_MEM_RESERVE);
440 1.183 fvdl #endif
441 1.183 fvdl
442 1.1 augustss /* Allocate and initialize real frame array. */
443 1.152 augustss err = usb_allocmem(&sc->sc_bus,
444 1.63 augustss UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
445 1.63 augustss UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
446 1.63 augustss if (err)
447 1.63 augustss return (err);
448 1.159 augustss sc->sc_pframes = KERNADDR(&sc->sc_dma, 0);
449 1.1 augustss UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */
450 1.160 augustss UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/
451 1.1 augustss
452 1.152 augustss /*
453 1.123 augustss * Allocate a TD, inactive, that hangs from the last QH.
454 1.123 augustss * This is to avoid a bug in the PIIX that makes it run berserk
455 1.123 augustss * otherwise.
456 1.123 augustss */
457 1.123 augustss std = uhci_alloc_std(sc);
458 1.123 augustss if (std == NULL)
459 1.123 augustss return (USBD_NOMEM);
460 1.123 augustss std->link.std = NULL;
461 1.123 augustss std->td.td_link = htole32(UHCI_PTR_T);
462 1.123 augustss std->td.td_status = htole32(0); /* inactive */
463 1.123 augustss std->td.td_token = htole32(0);
464 1.123 augustss std->td.td_buffer = htole32(0);
465 1.223 bouyer usb_syncmem(&std->dma, std->offs, sizeof(std->td),
466 1.223 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
467 1.123 augustss
468 1.123 augustss /* Allocate the dummy QH marking the end and used for looping the QHs.*/
469 1.123 augustss lsqh = uhci_alloc_sqh(sc);
470 1.123 augustss if (lsqh == NULL)
471 1.123 augustss return (USBD_NOMEM);
472 1.123 augustss lsqh->hlink = NULL;
473 1.123 augustss lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */
474 1.123 augustss lsqh->elink = std;
475 1.123 augustss lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD);
476 1.123 augustss sc->sc_last_qh = lsqh;
477 1.223 bouyer usb_syncmem(&lsqh->dma, lsqh->offs, sizeof(lsqh->qh),
478 1.223 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
479 1.123 augustss
480 1.1 augustss /* Allocate the dummy QH where bulk traffic will be queued. */
481 1.1 augustss bsqh = uhci_alloc_sqh(sc);
482 1.63 augustss if (bsqh == NULL)
483 1.1 augustss return (USBD_NOMEM);
484 1.123 augustss bsqh->hlink = lsqh;
485 1.123 augustss bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH);
486 1.121 augustss bsqh->elink = NULL;
487 1.88 tsutsui bsqh->qh.qh_elink = htole32(UHCI_PTR_T);
488 1.1 augustss sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
489 1.223 bouyer usb_syncmem(&bsqh->dma, bsqh->offs, sizeof(bsqh->qh),
490 1.223 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
491 1.1 augustss
492 1.123 augustss /* Allocate dummy QH where high speed control traffic will be queued. */
493 1.123 augustss chsqh = uhci_alloc_sqh(sc);
494 1.123 augustss if (chsqh == NULL)
495 1.123 augustss return (USBD_NOMEM);
496 1.123 augustss chsqh->hlink = bsqh;
497 1.123 augustss chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH);
498 1.123 augustss chsqh->elink = NULL;
499 1.123 augustss chsqh->qh.qh_elink = htole32(UHCI_PTR_T);
500 1.123 augustss sc->sc_hctl_start = sc->sc_hctl_end = chsqh;
501 1.223 bouyer usb_syncmem(&chsqh->dma, chsqh->offs, sizeof(chsqh->qh),
502 1.223 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
503 1.123 augustss
504 1.123 augustss /* Allocate dummy QH where control traffic will be queued. */
505 1.123 augustss clsqh = uhci_alloc_sqh(sc);
506 1.123 augustss if (clsqh == NULL)
507 1.1 augustss return (USBD_NOMEM);
508 1.220 bouyer clsqh->hlink = chsqh;
509 1.123 augustss clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH);
510 1.123 augustss clsqh->elink = NULL;
511 1.123 augustss clsqh->qh.qh_elink = htole32(UHCI_PTR_T);
512 1.123 augustss sc->sc_lctl_start = sc->sc_lctl_end = clsqh;
513 1.223 bouyer usb_syncmem(&clsqh->dma, clsqh->offs, sizeof(clsqh->qh),
514 1.223 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
515 1.1 augustss
516 1.152 augustss /*
517 1.1 augustss * Make all (virtual) frame list pointers point to the interrupt
518 1.1 augustss * queue heads and the interrupt queue heads at the control
519 1.1 augustss * queue head and point the physical frame list to the virtual.
520 1.1 augustss */
521 1.1 augustss for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
522 1.1 augustss std = uhci_alloc_std(sc);
523 1.1 augustss sqh = uhci_alloc_sqh(sc);
524 1.67 augustss if (std == NULL || sqh == NULL)
525 1.13 augustss return (USBD_NOMEM);
526 1.42 augustss std->link.sqh = sqh;
527 1.121 augustss std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH);
528 1.88 tsutsui std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
529 1.88 tsutsui std->td.td_token = htole32(0);
530 1.88 tsutsui std->td.td_buffer = htole32(0);
531 1.223 bouyer usb_syncmem(&std->dma, std->offs, sizeof(std->td),
532 1.223 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
533 1.123 augustss sqh->hlink = clsqh;
534 1.123 augustss sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH);
535 1.121 augustss sqh->elink = NULL;
536 1.88 tsutsui sqh->qh.qh_elink = htole32(UHCI_PTR_T);
537 1.223 bouyer usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
538 1.223 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
539 1.1 augustss sc->sc_vframes[i].htd = std;
540 1.1 augustss sc->sc_vframes[i].etd = std;
541 1.1 augustss sc->sc_vframes[i].hqh = sqh;
542 1.1 augustss sc->sc_vframes[i].eqh = sqh;
543 1.152 augustss for (j = i;
544 1.152 augustss j < UHCI_FRAMELIST_COUNT;
545 1.1 augustss j += UHCI_VFRAMELIST_COUNT)
546 1.88 tsutsui sc->sc_pframes[j] = htole32(std->physaddr);
547 1.1 augustss }
548 1.223 bouyer usb_syncmem(&sc->sc_dma, 0,
549 1.223 bouyer UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
550 1.223 bouyer BUS_DMASYNC_PREWRITE);
551 1.223 bouyer
552 1.1 augustss
553 1.1 augustss LIST_INIT(&sc->sc_intrhead);
554 1.1 augustss
555 1.76 augustss SIMPLEQ_INIT(&sc->sc_free_xfers);
556 1.76 augustss
557 1.96 augustss usb_callout_init(sc->sc_poll_handle);
558 1.96 augustss
559 1.1 augustss /* Set up the bus struct. */
560 1.48 augustss sc->sc_bus.methods = &uhci_bus_methods;
561 1.1 augustss sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
562 1.1 augustss
563 1.190 augustss UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */
564 1.190 augustss
565 1.1 augustss DPRINTFN(1,("uhci_init: enabling\n"));
566 1.152 augustss UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
567 1.1 augustss UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */
568 1.1 augustss
569 1.16 augustss return (uhci_run(sc, 1)); /* and here we go... */
570 1.53 augustss }
571 1.53 augustss
572 1.67 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
573 1.53 augustss int
574 1.215 dyoung uhci_activate(device_t self, enum devact act)
575 1.53 augustss {
576 1.215 dyoung struct uhci_softc *sc = device_private(self);
577 1.53 augustss int rv = 0;
578 1.53 augustss
579 1.53 augustss switch (act) {
580 1.53 augustss case DVACT_ACTIVATE:
581 1.53 augustss return (EOPNOTSUPP);
582 1.53 augustss
583 1.53 augustss case DVACT_DEACTIVATE:
584 1.210 kiyohara sc->sc_dying = 1;
585 1.56 augustss if (sc->sc_child != NULL)
586 1.56 augustss rv = config_deactivate(sc->sc_child);
587 1.53 augustss break;
588 1.53 augustss }
589 1.53 augustss return (rv);
590 1.53 augustss }
591 1.53 augustss
592 1.215 dyoung void
593 1.215 dyoung uhci_childdet(device_t self, device_t child)
594 1.215 dyoung {
595 1.215 dyoung struct uhci_softc *sc = device_private(self);
596 1.215 dyoung
597 1.215 dyoung KASSERT(sc->sc_child == child);
598 1.215 dyoung sc->sc_child = NULL;
599 1.215 dyoung }
600 1.215 dyoung
601 1.53 augustss int
602 1.119 augustss uhci_detach(struct uhci_softc *sc, int flags)
603 1.53 augustss {
604 1.76 augustss usbd_xfer_handle xfer;
605 1.53 augustss int rv = 0;
606 1.53 augustss
607 1.53 augustss if (sc->sc_child != NULL)
608 1.53 augustss rv = config_detach(sc->sc_child, flags);
609 1.152 augustss
610 1.53 augustss if (rv != 0)
611 1.53 augustss return (rv);
612 1.53 augustss
613 1.76 augustss /* Free all xfers associated with this HC. */
614 1.76 augustss for (;;) {
615 1.76 augustss xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
616 1.76 augustss if (xfer == NULL)
617 1.76 augustss break;
618 1.161 lukem SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
619 1.76 augustss free(xfer, M_USB);
620 1.152 augustss }
621 1.76 augustss
622 1.76 augustss /* XXX free other data structures XXX */
623 1.53 augustss
624 1.53 augustss return (rv);
625 1.1 augustss }
626 1.67 augustss #endif
627 1.1 augustss
628 1.48 augustss usbd_status
629 1.119 augustss uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
630 1.48 augustss {
631 1.216 drochner struct uhci_softc *sc = bus->hci_private;
632 1.183 fvdl usbd_status status;
633 1.102 augustss u_int32_t n;
634 1.102 augustss
635 1.152 augustss /*
636 1.102 augustss * XXX
637 1.102 augustss * Since we are allocating a buffer we can assume that we will
638 1.148 augustss * need TDs for it. Since we don't want to allocate those from
639 1.102 augustss * an interrupt context, we allocate them here and free them again.
640 1.102 augustss * This is no guarantee that we'll get the TDs next time...
641 1.102 augustss */
642 1.102 augustss n = size / 8;
643 1.102 augustss if (n > 16) {
644 1.102 augustss u_int32_t i;
645 1.102 augustss uhci_soft_td_t **stds;
646 1.102 augustss DPRINTF(("uhci_allocm: get %d TDs\n", n));
647 1.150 tsutsui stds = malloc(sizeof(uhci_soft_td_t *) * n, M_TEMP,
648 1.151 augustss M_WAITOK|M_ZERO);
649 1.102 augustss for(i=0; i < n; i++)
650 1.102 augustss stds[i] = uhci_alloc_std(sc);
651 1.102 augustss for(i=0; i < n; i++)
652 1.102 augustss if (stds[i] != NULL)
653 1.102 augustss uhci_free_std(sc, stds[i]);
654 1.102 augustss free(stds, M_TEMP);
655 1.102 augustss }
656 1.102 augustss
657 1.183 fvdl
658 1.183 fvdl status = usb_allocmem(&sc->sc_bus, size, 0, dma);
659 1.183 fvdl #ifdef __NetBSD__
660 1.183 fvdl if (status == USBD_NOMEM)
661 1.183 fvdl status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
662 1.183 fvdl #endif
663 1.183 fvdl return status;
664 1.48 augustss }
665 1.48 augustss
666 1.48 augustss void
667 1.119 augustss uhci_freem(struct usbd_bus *bus, usb_dma_t *dma)
668 1.48 augustss {
669 1.183 fvdl #ifdef __NetBSD__
670 1.183 fvdl if (dma->block->flags & USB_DMA_RESERVE) {
671 1.183 fvdl usb_reserve_freem(&((struct uhci_softc *)bus)->sc_dma_reserve,
672 1.183 fvdl dma);
673 1.183 fvdl return;
674 1.183 fvdl }
675 1.183 fvdl #endif
676 1.63 augustss usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma);
677 1.76 augustss }
678 1.76 augustss
679 1.76 augustss usbd_xfer_handle
680 1.119 augustss uhci_allocx(struct usbd_bus *bus)
681 1.76 augustss {
682 1.216 drochner struct uhci_softc *sc = bus->hci_private;
683 1.76 augustss usbd_xfer_handle xfer;
684 1.76 augustss
685 1.76 augustss xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
686 1.94 augustss if (xfer != NULL) {
687 1.161 lukem SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
688 1.98 augustss #ifdef DIAGNOSTIC
689 1.94 augustss if (xfer->busy_free != XFER_FREE) {
690 1.105 augustss printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer,
691 1.94 augustss xfer->busy_free);
692 1.94 augustss }
693 1.98 augustss #endif
694 1.94 augustss } else {
695 1.92 augustss xfer = malloc(sizeof(struct uhci_xfer), M_USB, M_NOWAIT);
696 1.94 augustss }
697 1.92 augustss if (xfer != NULL) {
698 1.92 augustss memset(xfer, 0, sizeof (struct uhci_xfer));
699 1.92 augustss UXFER(xfer)->iinfo.sc = sc;
700 1.92 augustss #ifdef DIAGNOSTIC
701 1.92 augustss UXFER(xfer)->iinfo.isdone = 1;
702 1.135 augustss xfer->busy_free = XFER_BUSY;
703 1.92 augustss #endif
704 1.92 augustss }
705 1.76 augustss return (xfer);
706 1.76 augustss }
707 1.76 augustss
708 1.76 augustss void
709 1.119 augustss uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
710 1.76 augustss {
711 1.216 drochner struct uhci_softc *sc = bus->hci_private;
712 1.76 augustss
713 1.93 augustss #ifdef DIAGNOSTIC
714 1.94 augustss if (xfer->busy_free != XFER_BUSY) {
715 1.94 augustss printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer,
716 1.94 augustss xfer->busy_free);
717 1.93 augustss }
718 1.94 augustss xfer->busy_free = XFER_FREE;
719 1.105 augustss if (!UXFER(xfer)->iinfo.isdone) {
720 1.96 augustss printf("uhci_freex: !isdone\n");
721 1.105 augustss }
722 1.93 augustss #endif
723 1.76 augustss SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
724 1.48 augustss }
725 1.48 augustss
726 1.72 augustss /*
727 1.212 jmcneill * Handle suspend/resume.
728 1.212 jmcneill *
729 1.212 jmcneill * We need to switch to polling mode here, because this routine is
730 1.212 jmcneill * called from an interrupt context. This is all right since we
731 1.212 jmcneill * are almost suspended anyway.
732 1.72 augustss */
733 1.212 jmcneill bool
734 1.215 dyoung uhci_resume(device_t dv PMF_FN_ARGS)
735 1.72 augustss {
736 1.212 jmcneill uhci_softc_t *sc = device_private(dv);
737 1.212 jmcneill int cmd;
738 1.193 augustss int s;
739 1.72 augustss
740 1.212 jmcneill s = splhardusb();
741 1.193 augustss
742 1.212 jmcneill cmd = UREAD2(sc, UHCI_CMD);
743 1.193 augustss sc->sc_bus.use_polling++;
744 1.214 smb UWRITE2(sc, UHCI_INTR, 0);
745 1.214 smb uhci_globalreset(sc);
746 1.214 smb uhci_reset(sc);
747 1.212 jmcneill if (cmd & UHCI_CMD_RS)
748 1.212 jmcneill uhci_run(sc, 0);
749 1.212 jmcneill
750 1.212 jmcneill /* restore saved state */
751 1.212 jmcneill UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0));
752 1.212 jmcneill UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum);
753 1.212 jmcneill UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof);
754 1.212 jmcneill
755 1.212 jmcneill UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */
756 1.212 jmcneill usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
757 1.212 jmcneill UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
758 1.212 jmcneill UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE |
759 1.212 jmcneill UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE);
760 1.214 smb UHCICMD(sc, UHCI_CMD_MAXP);
761 1.212 jmcneill uhci_run(sc, 1); /* and start traffic again */
762 1.212 jmcneill usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
763 1.193 augustss sc->sc_bus.use_polling--;
764 1.212 jmcneill if (sc->sc_intr_xfer != NULL)
765 1.212 jmcneill usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub,
766 1.212 jmcneill sc->sc_intr_xfer);
767 1.212 jmcneill #ifdef UHCI_DEBUG
768 1.212 jmcneill if (uhcidebug > 2)
769 1.212 jmcneill uhci_dumpregs(sc);
770 1.212 jmcneill #endif
771 1.212 jmcneill
772 1.219 jmcneill sc->sc_suspend = PWR_RESUME;
773 1.193 augustss splx(s);
774 1.212 jmcneill
775 1.212 jmcneill return true;
776 1.72 augustss }
777 1.72 augustss
778 1.212 jmcneill bool
779 1.215 dyoung uhci_suspend(device_t dv PMF_FN_ARGS)
780 1.30 augustss {
781 1.212 jmcneill uhci_softc_t *sc = device_private(dv);
782 1.30 augustss int cmd;
783 1.30 augustss int s;
784 1.30 augustss
785 1.132 augustss s = splhardusb();
786 1.212 jmcneill
787 1.30 augustss cmd = UREAD2(sc, UHCI_CMD);
788 1.30 augustss
789 1.212 jmcneill #ifdef UHCI_DEBUG
790 1.212 jmcneill if (uhcidebug > 2)
791 1.212 jmcneill uhci_dumpregs(sc);
792 1.212 jmcneill #endif
793 1.212 jmcneill if (sc->sc_intr_xfer != NULL)
794 1.212 jmcneill usb_uncallout(sc->sc_poll_handle, uhci_poll_hub,
795 1.212 jmcneill sc->sc_intr_xfer);
796 1.219 jmcneill sc->sc_suspend = PWR_SUSPEND;
797 1.212 jmcneill sc->sc_bus.use_polling++;
798 1.219 jmcneill
799 1.212 jmcneill uhci_run(sc, 0); /* stop the controller */
800 1.212 jmcneill cmd &= ~UHCI_CMD_RS;
801 1.212 jmcneill
802 1.212 jmcneill /* save some state if BIOS doesn't */
803 1.212 jmcneill sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM);
804 1.212 jmcneill sc->sc_saved_sof = UREAD1(sc, UHCI_SOF);
805 1.212 jmcneill
806 1.212 jmcneill UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */
807 1.30 augustss
808 1.212 jmcneill UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */
809 1.212 jmcneill usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
810 1.212 jmcneill sc->sc_bus.use_polling--;
811 1.86 augustss
812 1.30 augustss splx(s);
813 1.212 jmcneill
814 1.212 jmcneill return true;
815 1.30 augustss }
816 1.30 augustss
817 1.59 augustss #ifdef UHCI_DEBUG
818 1.101 augustss Static void
819 1.119 augustss uhci_dumpregs(uhci_softc_t *sc)
820 1.1 augustss {
821 1.48 augustss DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
822 1.48 augustss "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
823 1.216 drochner device_xname(sc->sc_dev),
824 1.48 augustss UREAD2(sc, UHCI_CMD),
825 1.48 augustss UREAD2(sc, UHCI_STS),
826 1.48 augustss UREAD2(sc, UHCI_INTR),
827 1.48 augustss UREAD2(sc, UHCI_FRNUM),
828 1.48 augustss UREAD4(sc, UHCI_FLBASEADDR),
829 1.48 augustss UREAD1(sc, UHCI_SOF),
830 1.48 augustss UREAD2(sc, UHCI_PORTSC1),
831 1.48 augustss UREAD2(sc, UHCI_PORTSC2)));
832 1.1 augustss }
833 1.1 augustss
834 1.1 augustss void
835 1.119 augustss uhci_dump_td(uhci_soft_td_t *p)
836 1.1 augustss {
837 1.122 tv char sbuf[128], sbuf2[128];
838 1.122 tv
839 1.223 bouyer
840 1.223 bouyer usb_syncmem(&p->dma, p->offs, sizeof(p->td),
841 1.223 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
842 1.48 augustss DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
843 1.48 augustss "token=0x%08lx buffer=0x%08lx\n",
844 1.48 augustss p, (long)p->physaddr,
845 1.88 tsutsui (long)le32toh(p->td.td_link),
846 1.88 tsutsui (long)le32toh(p->td.td_status),
847 1.88 tsutsui (long)le32toh(p->td.td_token),
848 1.88 tsutsui (long)le32toh(p->td.td_buffer)));
849 1.122 tv
850 1.224 christos snprintb(sbuf, sizeof(sbuf), "\20\1T\2Q\3VF",
851 1.224 christos (u_int32_t)le32toh(p->td.td_link));
852 1.224 christos snprintb(sbuf2, sizeof(sbuf2),
853 1.224 christos "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
854 1.224 christos "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
855 1.224 christos (u_int32_t)le32toh(p->td.td_status));
856 1.122 tv
857 1.122 tv DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
858 1.122 tv "D=%d,maxlen=%d\n", sbuf, sbuf2,
859 1.88 tsutsui UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)),
860 1.88 tsutsui UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)),
861 1.88 tsutsui UHCI_TD_GET_PID(le32toh(p->td.td_token)),
862 1.88 tsutsui UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)),
863 1.88 tsutsui UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)),
864 1.88 tsutsui UHCI_TD_GET_DT(le32toh(p->td.td_token)),
865 1.88 tsutsui UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token))));
866 1.223 bouyer usb_syncmem(&p->dma, p->offs, sizeof(p->td),
867 1.223 bouyer BUS_DMASYNC_PREREAD);
868 1.1 augustss }
869 1.1 augustss
870 1.1 augustss void
871 1.119 augustss uhci_dump_qh(uhci_soft_qh_t *sqh)
872 1.1 augustss {
873 1.223 bouyer usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
874 1.223 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
875 1.67 augustss DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh,
876 1.88 tsutsui (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink),
877 1.88 tsutsui le32toh(sqh->qh.qh_elink)));
878 1.223 bouyer usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD);
879 1.1 augustss }
880 1.1 augustss
881 1.13 augustss
882 1.110 augustss #if 1
883 1.1 augustss void
884 1.119 augustss uhci_dump(void)
885 1.1 augustss {
886 1.110 augustss uhci_dump_all(thesc);
887 1.110 augustss }
888 1.110 augustss #endif
889 1.1 augustss
890 1.110 augustss void
891 1.119 augustss uhci_dump_all(uhci_softc_t *sc)
892 1.110 augustss {
893 1.1 augustss uhci_dumpregs(sc);
894 1.50 augustss printf("intrs=%d\n", sc->sc_bus.no_intrs);
895 1.110 augustss /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/
896 1.123 augustss uhci_dump_qh(sc->sc_lctl_start);
897 1.1 augustss }
898 1.1 augustss
899 1.67 augustss
900 1.67 augustss void
901 1.119 augustss uhci_dump_qhs(uhci_soft_qh_t *sqh)
902 1.67 augustss {
903 1.67 augustss uhci_dump_qh(sqh);
904 1.67 augustss
905 1.67 augustss /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards
906 1.67 augustss * Traverses sideways first, then down.
907 1.67 augustss *
908 1.67 augustss * QH1
909 1.67 augustss * QH2
910 1.67 augustss * No QH
911 1.67 augustss * TD2.1
912 1.67 augustss * TD2.2
913 1.67 augustss * TD1.1
914 1.67 augustss * etc.
915 1.67 augustss *
916 1.67 augustss * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
917 1.67 augustss */
918 1.67 augustss
919 1.67 augustss
920 1.223 bouyer usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
921 1.223 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
922 1.88 tsutsui if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T))
923 1.67 augustss uhci_dump_qhs(sqh->hlink);
924 1.67 augustss else
925 1.67 augustss DPRINTF(("No QH\n"));
926 1.223 bouyer usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD);
927 1.67 augustss
928 1.88 tsutsui if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T))
929 1.67 augustss uhci_dump_tds(sqh->elink);
930 1.67 augustss else
931 1.67 augustss DPRINTF(("No TD\n"));
932 1.67 augustss }
933 1.67 augustss
934 1.1 augustss void
935 1.119 augustss uhci_dump_tds(uhci_soft_td_t *std)
936 1.1 augustss {
937 1.67 augustss uhci_soft_td_t *td;
938 1.223 bouyer int stop;
939 1.67 augustss
940 1.67 augustss for(td = std; td != NULL; td = td->link.std) {
941 1.67 augustss uhci_dump_td(td);
942 1.1 augustss
943 1.67 augustss /* Check whether the link pointer in this TD marks
944 1.67 augustss * the link pointer as end of queue. This avoids
945 1.67 augustss * printing the free list in case the queue/TD has
946 1.67 augustss * already been moved there (seatbelt).
947 1.67 augustss */
948 1.223 bouyer usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link),
949 1.223 bouyer sizeof(td->td.td_link),
950 1.223 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
951 1.223 bouyer stop = (le32toh(td->td.td_link) & UHCI_PTR_T ||
952 1.223 bouyer le32toh(td->td.td_link) == 0);
953 1.223 bouyer usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link),
954 1.223 bouyer sizeof(td->td.td_link), BUS_DMASYNC_PREREAD);
955 1.223 bouyer if (stop)
956 1.67 augustss break;
957 1.67 augustss }
958 1.1 augustss }
959 1.92 augustss
960 1.101 augustss Static void
961 1.119 augustss uhci_dump_ii(uhci_intr_info_t *ii)
962 1.92 augustss {
963 1.95 augustss usbd_pipe_handle pipe;
964 1.95 augustss usb_endpoint_descriptor_t *ed;
965 1.95 augustss usbd_device_handle dev;
966 1.152 augustss
967 1.98 augustss #ifdef DIAGNOSTIC
968 1.98 augustss #define DONE ii->isdone
969 1.98 augustss #else
970 1.98 augustss #define DONE 0
971 1.98 augustss #endif
972 1.95 augustss if (ii == NULL) {
973 1.95 augustss printf("ii NULL\n");
974 1.95 augustss return;
975 1.95 augustss }
976 1.95 augustss if (ii->xfer == NULL) {
977 1.95 augustss printf("ii %p: done=%d xfer=NULL\n",
978 1.98 augustss ii, DONE);
979 1.95 augustss return;
980 1.95 augustss }
981 1.95 augustss pipe = ii->xfer->pipe;
982 1.95 augustss if (pipe == NULL) {
983 1.95 augustss printf("ii %p: done=%d xfer=%p pipe=NULL\n",
984 1.98 augustss ii, DONE, ii->xfer);
985 1.139 augustss return;
986 1.139 augustss }
987 1.139 augustss if (pipe->endpoint == NULL) {
988 1.139 augustss printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n",
989 1.139 augustss ii, DONE, ii->xfer, pipe);
990 1.139 augustss return;
991 1.139 augustss }
992 1.139 augustss if (pipe->device == NULL) {
993 1.139 augustss printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n",
994 1.139 augustss ii, DONE, ii->xfer, pipe);
995 1.95 augustss return;
996 1.95 augustss }
997 1.95 augustss ed = pipe->endpoint->edesc;
998 1.95 augustss dev = pipe->device;
999 1.152 augustss printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n",
1000 1.152 augustss ii, DONE, ii->xfer, dev,
1001 1.95 augustss UGETW(dev->ddesc.idVendor),
1002 1.92 augustss UGETW(dev->ddesc.idProduct),
1003 1.92 augustss dev->address, pipe,
1004 1.92 augustss ed->bEndpointAddress, ed->bmAttributes);
1005 1.98 augustss #undef DONE
1006 1.92 augustss }
1007 1.92 augustss
1008 1.120 augustss void uhci_dump_iis(struct uhci_softc *sc);
1009 1.92 augustss void
1010 1.119 augustss uhci_dump_iis(struct uhci_softc *sc)
1011 1.92 augustss {
1012 1.92 augustss uhci_intr_info_t *ii;
1013 1.92 augustss
1014 1.92 augustss printf("intr_info list:\n");
1015 1.92 augustss for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
1016 1.92 augustss uhci_dump_ii(ii);
1017 1.92 augustss }
1018 1.92 augustss
1019 1.120 augustss void iidump(void);
1020 1.119 augustss void iidump(void) { uhci_dump_iis(thesc); }
1021 1.92 augustss
1022 1.1 augustss #endif
1023 1.1 augustss
1024 1.1 augustss /*
1025 1.1 augustss * This routine is executed periodically and simulates interrupts
1026 1.1 augustss * from the root controller interrupt pipe for port status change.
1027 1.1 augustss */
1028 1.1 augustss void
1029 1.119 augustss uhci_poll_hub(void *addr)
1030 1.1 augustss {
1031 1.63 augustss usbd_xfer_handle xfer = addr;
1032 1.63 augustss usbd_pipe_handle pipe = xfer->pipe;
1033 1.216 drochner uhci_softc_t *sc = pipe->device->bus->hci_private;
1034 1.1 augustss int s;
1035 1.1 augustss u_char *p;
1036 1.1 augustss
1037 1.96 augustss DPRINTFN(20, ("uhci_poll_hub\n"));
1038 1.1 augustss
1039 1.96 augustss usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
1040 1.41 augustss
1041 1.159 augustss p = KERNADDR(&xfer->dmabuf, 0);
1042 1.1 augustss p[0] = 0;
1043 1.1 augustss if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
1044 1.1 augustss p[0] |= 1<<1;
1045 1.1 augustss if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
1046 1.1 augustss p[0] |= 1<<2;
1047 1.41 augustss if (p[0] == 0)
1048 1.41 augustss /* No change, try again in a while */
1049 1.41 augustss return;
1050 1.41 augustss
1051 1.63 augustss xfer->actlen = 1;
1052 1.63 augustss xfer->status = USBD_NORMAL_COMPLETION;
1053 1.16 augustss s = splusb();
1054 1.63 augustss xfer->device->bus->intr_context++;
1055 1.63 augustss usb_transfer_complete(xfer);
1056 1.63 augustss xfer->device->bus->intr_context--;
1057 1.41 augustss splx(s);
1058 1.41 augustss }
1059 1.41 augustss
1060 1.41 augustss void
1061 1.205 christos uhci_root_intr_done(usbd_xfer_handle xfer)
1062 1.84 augustss {
1063 1.84 augustss }
1064 1.84 augustss
1065 1.84 augustss void
1066 1.205 christos uhci_root_ctrl_done(usbd_xfer_handle xfer)
1067 1.41 augustss {
1068 1.1 augustss }
1069 1.1 augustss
1070 1.123 augustss /*
1071 1.123 augustss * Let the last QH loop back to the high speed control transfer QH.
1072 1.123 augustss * This is what intel calls "bandwidth reclamation" and improves
1073 1.123 augustss * USB performance a lot for some devices.
1074 1.123 augustss * If we are already looping, just count it.
1075 1.123 augustss */
1076 1.1 augustss void
1077 1.123 augustss uhci_add_loop(uhci_softc_t *sc) {
1078 1.125 augustss #ifdef UHCI_DEBUG
1079 1.125 augustss if (uhcinoloop)
1080 1.125 augustss return;
1081 1.125 augustss #endif
1082 1.123 augustss if (++sc->sc_loops == 1) {
1083 1.125 augustss DPRINTFN(5,("uhci_start_loop: add\n"));
1084 1.123 augustss /* Note, we don't loop back the soft pointer. */
1085 1.152 augustss sc->sc_last_qh->qh.qh_hlink =
1086 1.123 augustss htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH);
1087 1.223 bouyer usb_syncmem(&sc->sc_last_qh->dma,
1088 1.223 bouyer sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink),
1089 1.223 bouyer sizeof(sc->sc_last_qh->qh.qh_hlink),
1090 1.223 bouyer BUS_DMASYNC_PREWRITE);
1091 1.123 augustss }
1092 1.123 augustss }
1093 1.123 augustss
1094 1.123 augustss void
1095 1.123 augustss uhci_rem_loop(uhci_softc_t *sc) {
1096 1.125 augustss #ifdef UHCI_DEBUG
1097 1.125 augustss if (uhcinoloop)
1098 1.125 augustss return;
1099 1.125 augustss #endif
1100 1.123 augustss if (--sc->sc_loops == 0) {
1101 1.123 augustss DPRINTFN(5,("uhci_end_loop: remove\n"));
1102 1.123 augustss sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T);
1103 1.223 bouyer usb_syncmem(&sc->sc_last_qh->dma,
1104 1.223 bouyer sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink),
1105 1.223 bouyer sizeof(sc->sc_last_qh->qh.qh_hlink),
1106 1.223 bouyer BUS_DMASYNC_PREWRITE);
1107 1.123 augustss }
1108 1.123 augustss }
1109 1.123 augustss
1110 1.123 augustss /* Add high speed control QH, called at splusb(). */
1111 1.123 augustss void
1112 1.123 augustss uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1113 1.1 augustss {
1114 1.42 augustss uhci_soft_qh_t *eqh;
1115 1.1 augustss
1116 1.52 augustss SPLUSBCHECK;
1117 1.52 augustss
1118 1.1 augustss DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
1119 1.123 augustss eqh = sc->sc_hctl_end;
1120 1.223 bouyer usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
1121 1.223 bouyer sizeof(eqh->qh.qh_hlink),
1122 1.223 bouyer BUS_DMASYNC_POSTWRITE);
1123 1.42 augustss sqh->hlink = eqh->hlink;
1124 1.42 augustss sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1125 1.223 bouyer usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
1126 1.223 bouyer BUS_DMASYNC_PREWRITE);
1127 1.42 augustss eqh->hlink = sqh;
1128 1.121 augustss eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
1129 1.123 augustss sc->sc_hctl_end = sqh;
1130 1.223 bouyer usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
1131 1.223 bouyer sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
1132 1.125 augustss #ifdef UHCI_CTL_LOOP
1133 1.123 augustss uhci_add_loop(sc);
1134 1.125 augustss #endif
1135 1.1 augustss }
1136 1.1 augustss
1137 1.123 augustss /* Remove high speed control QH, called at splusb(). */
1138 1.1 augustss void
1139 1.123 augustss uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1140 1.1 augustss {
1141 1.1 augustss uhci_soft_qh_t *pqh;
1142 1.1 augustss
1143 1.52 augustss SPLUSBCHECK;
1144 1.52 augustss
1145 1.123 augustss DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh));
1146 1.125 augustss #ifdef UHCI_CTL_LOOP
1147 1.123 augustss uhci_rem_loop(sc);
1148 1.125 augustss #endif
1149 1.124 augustss /*
1150 1.124 augustss * The T bit should be set in the elink of the QH so that the HC
1151 1.124 augustss * doesn't follow the pointer. This condition may fail if the
1152 1.124 augustss * the transferred packet was short so that the QH still points
1153 1.124 augustss * at the last used TD.
1154 1.124 augustss * In this case we set the T bit and wait a little for the HC
1155 1.124 augustss * to stop looking at the TD.
1156 1.223 bouyer * Note that if the TD chain is large enough, the controller
1157 1.223 bouyer * may still be looking at the chain at the end of this function.
1158 1.223 bouyer * uhci_free_std_chain() will make sure the controller stops
1159 1.223 bouyer * looking at it quickly, but until then we should not change
1160 1.223 bouyer * sqh->hlink.
1161 1.124 augustss */
1162 1.223 bouyer usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
1163 1.223 bouyer sizeof(sqh->qh.qh_elink),
1164 1.223 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1165 1.124 augustss if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1166 1.124 augustss sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1167 1.223 bouyer usb_syncmem(&sqh->dma,
1168 1.223 bouyer sqh->offs + offsetof(uhci_qh_t, qh_elink),
1169 1.223 bouyer sizeof(sqh->qh.qh_elink),
1170 1.223 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1171 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
1172 1.124 augustss }
1173 1.124 augustss
1174 1.123 augustss pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh);
1175 1.223 bouyer usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
1176 1.223 bouyer sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
1177 1.152 augustss pqh->hlink = sqh->hlink;
1178 1.42 augustss pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1179 1.223 bouyer usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
1180 1.223 bouyer sizeof(pqh->qh.qh_hlink),
1181 1.223 bouyer BUS_DMASYNC_PREWRITE);
1182 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
1183 1.123 augustss if (sc->sc_hctl_end == sqh)
1184 1.123 augustss sc->sc_hctl_end = pqh;
1185 1.123 augustss }
1186 1.123 augustss
1187 1.123 augustss /* Add low speed control QH, called at splusb(). */
1188 1.123 augustss void
1189 1.123 augustss uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1190 1.123 augustss {
1191 1.123 augustss uhci_soft_qh_t *eqh;
1192 1.123 augustss
1193 1.123 augustss SPLUSBCHECK;
1194 1.123 augustss
1195 1.123 augustss DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh));
1196 1.123 augustss eqh = sc->sc_lctl_end;
1197 1.223 bouyer usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
1198 1.223 bouyer sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
1199 1.152 augustss sqh->hlink = eqh->hlink;
1200 1.123 augustss sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1201 1.223 bouyer usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
1202 1.223 bouyer BUS_DMASYNC_PREWRITE);
1203 1.152 augustss eqh->hlink = sqh;
1204 1.123 augustss eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
1205 1.223 bouyer usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
1206 1.223 bouyer sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
1207 1.123 augustss sc->sc_lctl_end = sqh;
1208 1.123 augustss }
1209 1.123 augustss
1210 1.123 augustss /* Remove low speed control QH, called at splusb(). */
1211 1.123 augustss void
1212 1.123 augustss uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1213 1.123 augustss {
1214 1.123 augustss uhci_soft_qh_t *pqh;
1215 1.123 augustss
1216 1.123 augustss SPLUSBCHECK;
1217 1.123 augustss
1218 1.123 augustss DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh));
1219 1.124 augustss /* See comment in uhci_remove_hs_ctrl() */
1220 1.223 bouyer usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
1221 1.223 bouyer sizeof(sqh->qh.qh_elink),
1222 1.223 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1223 1.124 augustss if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1224 1.124 augustss sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1225 1.223 bouyer usb_syncmem(&sqh->dma,
1226 1.223 bouyer sqh->offs + offsetof(uhci_qh_t, qh_elink),
1227 1.223 bouyer sizeof(sqh->qh.qh_elink),
1228 1.223 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1229 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
1230 1.124 augustss }
1231 1.123 augustss pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh);
1232 1.223 bouyer usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
1233 1.223 bouyer sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
1234 1.152 augustss pqh->hlink = sqh->hlink;
1235 1.123 augustss pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1236 1.223 bouyer usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
1237 1.223 bouyer sizeof(pqh->qh.qh_hlink),
1238 1.223 bouyer BUS_DMASYNC_PREWRITE);
1239 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
1240 1.123 augustss if (sc->sc_lctl_end == sqh)
1241 1.123 augustss sc->sc_lctl_end = pqh;
1242 1.1 augustss }
1243 1.1 augustss
1244 1.1 augustss /* Add bulk QH, called at splusb(). */
1245 1.1 augustss void
1246 1.119 augustss uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1247 1.1 augustss {
1248 1.42 augustss uhci_soft_qh_t *eqh;
1249 1.1 augustss
1250 1.52 augustss SPLUSBCHECK;
1251 1.52 augustss
1252 1.1 augustss DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
1253 1.42 augustss eqh = sc->sc_bulk_end;
1254 1.223 bouyer usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
1255 1.223 bouyer sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
1256 1.152 augustss sqh->hlink = eqh->hlink;
1257 1.42 augustss sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1258 1.223 bouyer usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
1259 1.223 bouyer BUS_DMASYNC_PREWRITE);
1260 1.152 augustss eqh->hlink = sqh;
1261 1.121 augustss eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
1262 1.223 bouyer usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
1263 1.223 bouyer sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
1264 1.1 augustss sc->sc_bulk_end = sqh;
1265 1.123 augustss uhci_add_loop(sc);
1266 1.1 augustss }
1267 1.1 augustss
1268 1.1 augustss /* Remove bulk QH, called at splusb(). */
1269 1.1 augustss void
1270 1.119 augustss uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1271 1.1 augustss {
1272 1.1 augustss uhci_soft_qh_t *pqh;
1273 1.1 augustss
1274 1.52 augustss SPLUSBCHECK;
1275 1.52 augustss
1276 1.1 augustss DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
1277 1.123 augustss uhci_rem_loop(sc);
1278 1.124 augustss /* See comment in uhci_remove_hs_ctrl() */
1279 1.223 bouyer usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
1280 1.223 bouyer sizeof(sqh->qh.qh_elink),
1281 1.223 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1282 1.124 augustss if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1283 1.124 augustss sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1284 1.223 bouyer usb_syncmem(&sqh->dma,
1285 1.223 bouyer sqh->offs + offsetof(uhci_qh_t, qh_elink),
1286 1.223 bouyer sizeof(sqh->qh.qh_elink),
1287 1.223 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1288 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
1289 1.124 augustss }
1290 1.92 augustss pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh);
1291 1.223 bouyer usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
1292 1.223 bouyer sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
1293 1.42 augustss pqh->hlink = sqh->hlink;
1294 1.42 augustss pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1295 1.223 bouyer usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
1296 1.223 bouyer sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
1297 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
1298 1.1 augustss if (sc->sc_bulk_end == sqh)
1299 1.1 augustss sc->sc_bulk_end = pqh;
1300 1.1 augustss }
1301 1.1 augustss
1302 1.141 augustss Static int uhci_intr1(uhci_softc_t *);
1303 1.141 augustss
1304 1.1 augustss int
1305 1.119 augustss uhci_intr(void *arg)
1306 1.1 augustss {
1307 1.44 augustss uhci_softc_t *sc = arg;
1308 1.146 augustss
1309 1.216 drochner if (sc->sc_dying || !device_has_power(sc->sc_dev))
1310 1.146 augustss return (0);
1311 1.141 augustss
1312 1.141 augustss if (sc->sc_bus.use_polling) {
1313 1.141 augustss #ifdef DIAGNOSTIC
1314 1.179 mycroft DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n"));
1315 1.141 augustss #endif
1316 1.141 augustss return (0);
1317 1.141 augustss }
1318 1.179 mycroft
1319 1.141 augustss return (uhci_intr1(sc));
1320 1.141 augustss }
1321 1.141 augustss
1322 1.141 augustss int
1323 1.141 augustss uhci_intr1(uhci_softc_t *sc)
1324 1.141 augustss {
1325 1.44 augustss int status;
1326 1.44 augustss int ack;
1327 1.1 augustss
1328 1.67 augustss #ifdef UHCI_DEBUG
1329 1.44 augustss if (uhcidebug > 15) {
1330 1.216 drochner DPRINTF(("%s: uhci_intr1\n", device_xname(sc->sc_dev)));
1331 1.1 augustss uhci_dumpregs(sc);
1332 1.1 augustss }
1333 1.1 augustss #endif
1334 1.117 augustss
1335 1.153 augustss status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS;
1336 1.127 soren if (status == 0) /* The interrupt was not for us. */
1337 1.127 soren return (0);
1338 1.127 soren
1339 1.117 augustss if (sc->sc_suspend != PWR_RESUME) {
1340 1.201 jmcneill #ifdef DIAGNOSTIC
1341 1.117 augustss printf("%s: interrupt while not operating ignored\n",
1342 1.216 drochner device_xname(sc->sc_dev));
1343 1.201 jmcneill #endif
1344 1.134 augustss UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */
1345 1.117 augustss return (0);
1346 1.117 augustss }
1347 1.44 augustss
1348 1.44 augustss ack = 0;
1349 1.44 augustss if (status & UHCI_STS_USBINT)
1350 1.44 augustss ack |= UHCI_STS_USBINT;
1351 1.44 augustss if (status & UHCI_STS_USBEI)
1352 1.44 augustss ack |= UHCI_STS_USBEI;
1353 1.1 augustss if (status & UHCI_STS_RD) {
1354 1.44 augustss ack |= UHCI_STS_RD;
1355 1.118 augustss #ifdef UHCI_DEBUG
1356 1.216 drochner printf("%s: resume detect\n", device_xname(sc->sc_dev));
1357 1.118 augustss #endif
1358 1.1 augustss }
1359 1.1 augustss if (status & UHCI_STS_HSE) {
1360 1.44 augustss ack |= UHCI_STS_HSE;
1361 1.216 drochner printf("%s: host system error\n", device_xname(sc->sc_dev));
1362 1.1 augustss }
1363 1.1 augustss if (status & UHCI_STS_HCPE) {
1364 1.44 augustss ack |= UHCI_STS_HCPE;
1365 1.152 augustss printf("%s: host controller process error\n",
1366 1.216 drochner device_xname(sc->sc_dev));
1367 1.44 augustss }
1368 1.44 augustss if (status & UHCI_STS_HCH) {
1369 1.44 augustss /* no acknowledge needed */
1370 1.136 augustss if (!sc->sc_dying) {
1371 1.152 augustss printf("%s: host controller halted\n",
1372 1.216 drochner device_xname(sc->sc_dev));
1373 1.110 augustss #ifdef UHCI_DEBUG
1374 1.136 augustss uhci_dump_all(sc);
1375 1.110 augustss #endif
1376 1.136 augustss }
1377 1.136 augustss sc->sc_dying = 1;
1378 1.1 augustss }
1379 1.44 augustss
1380 1.132 augustss if (!ack)
1381 1.132 augustss return (0); /* nothing to acknowledge */
1382 1.132 augustss UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */
1383 1.1 augustss
1384 1.85 augustss sc->sc_bus.no_intrs++;
1385 1.85 augustss usb_schedsoftintr(&sc->sc_bus);
1386 1.85 augustss
1387 1.216 drochner DPRINTFN(15, ("%s: uhci_intr: exit\n", device_xname(sc->sc_dev)));
1388 1.85 augustss
1389 1.85 augustss return (1);
1390 1.85 augustss }
1391 1.85 augustss
1392 1.85 augustss void
1393 1.133 augustss uhci_softintr(void *v)
1394 1.85 augustss {
1395 1.216 drochner struct usbd_bus *bus = v;
1396 1.216 drochner uhci_softc_t *sc = bus->hci_private;
1397 1.178 martin uhci_intr_info_t *ii, *nextii;
1398 1.85 augustss
1399 1.216 drochner DPRINTFN(10,("%s: uhci_softintr (%d)\n", device_xname(sc->sc_dev),
1400 1.140 augustss sc->sc_bus.intr_context));
1401 1.85 augustss
1402 1.51 augustss sc->sc_bus.intr_context++;
1403 1.50 augustss
1404 1.1 augustss /*
1405 1.1 augustss * Interrupts on UHCI really suck. When the host controller
1406 1.1 augustss * interrupts because a transfer is completed there is no
1407 1.1 augustss * way of knowing which transfer it was. You can scan down
1408 1.1 augustss * the TDs and QHs of the previous frame to limit the search,
1409 1.1 augustss * but that assumes that the interrupt was not delayed by more
1410 1.1 augustss * than 1 ms, which may not always be true (e.g. after debug
1411 1.1 augustss * output on a slow console).
1412 1.1 augustss * We scan all interrupt descriptors to see if any have
1413 1.1 augustss * completed.
1414 1.1 augustss */
1415 1.178 martin for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) {
1416 1.178 martin nextii = LIST_NEXT(ii, list);
1417 1.1 augustss uhci_check_intr(sc, ii);
1418 1.178 martin }
1419 1.1 augustss
1420 1.164 augustss #ifdef USB_USE_SOFTINTR
1421 1.153 augustss if (sc->sc_softwake) {
1422 1.153 augustss sc->sc_softwake = 0;
1423 1.153 augustss wakeup(&sc->sc_softwake);
1424 1.153 augustss }
1425 1.164 augustss #endif /* USB_USE_SOFTINTR */
1426 1.153 augustss
1427 1.51 augustss sc->sc_bus.intr_context--;
1428 1.1 augustss }
1429 1.1 augustss
1430 1.1 augustss /* Check for an interrupt. */
1431 1.1 augustss void
1432 1.205 christos uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii)
1433 1.1 augustss {
1434 1.1 augustss uhci_soft_td_t *std, *lstd;
1435 1.18 augustss u_int32_t status;
1436 1.1 augustss
1437 1.1 augustss DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
1438 1.1 augustss #ifdef DIAGNOSTIC
1439 1.63 augustss if (ii == NULL) {
1440 1.1 augustss printf("uhci_check_intr: no ii? %p\n", ii);
1441 1.1 augustss return;
1442 1.1 augustss }
1443 1.1 augustss #endif
1444 1.155 augustss if (ii->xfer->status == USBD_CANCELLED ||
1445 1.155 augustss ii->xfer->status == USBD_TIMEOUT) {
1446 1.155 augustss DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer));
1447 1.155 augustss return;
1448 1.155 augustss }
1449 1.155 augustss
1450 1.63 augustss if (ii->stdstart == NULL)
1451 1.1 augustss return;
1452 1.1 augustss lstd = ii->stdend;
1453 1.1 augustss #ifdef DIAGNOSTIC
1454 1.63 augustss if (lstd == NULL) {
1455 1.1 augustss printf("uhci_check_intr: std==0\n");
1456 1.1 augustss return;
1457 1.1 augustss }
1458 1.1 augustss #endif
1459 1.152 augustss /*
1460 1.26 augustss * If the last TD is still active we need to check whether there
1461 1.186 skrll * is an error somewhere in the middle, or whether there was a
1462 1.26 augustss * short packet (SPD and not ACTIVE).
1463 1.26 augustss */
1464 1.223 bouyer usb_syncmem(&lstd->dma,
1465 1.223 bouyer lstd->offs + offsetof(uhci_td_t, td_status),
1466 1.223 bouyer sizeof(lstd->td.td_status),
1467 1.223 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1468 1.88 tsutsui if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) {
1469 1.92 augustss DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii));
1470 1.48 augustss for (std = ii->stdstart; std != lstd; std = std->link.std) {
1471 1.223 bouyer usb_syncmem(&std->dma,
1472 1.223 bouyer std->offs + offsetof(uhci_td_t, td_status),
1473 1.223 bouyer sizeof(std->td.td_status),
1474 1.223 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1475 1.88 tsutsui status = le32toh(std->td.td_status);
1476 1.223 bouyer usb_syncmem(&std->dma,
1477 1.223 bouyer std->offs + offsetof(uhci_td_t, td_status),
1478 1.223 bouyer sizeof(std->td.td_status), BUS_DMASYNC_PREREAD);
1479 1.83 augustss /* If there's an active TD the xfer isn't done. */
1480 1.83 augustss if (status & UHCI_TD_ACTIVE)
1481 1.83 augustss break;
1482 1.83 augustss /* Any kind of error makes the xfer done. */
1483 1.83 augustss if (status & UHCI_TD_STALLED)
1484 1.83 augustss goto done;
1485 1.83 augustss /* We want short packets, and it is short: it's done */
1486 1.223 bouyer usb_syncmem(&std->dma,
1487 1.223 bouyer std->offs + offsetof(uhci_td_t, td_token),
1488 1.223 bouyer sizeof(std->td.td_token),
1489 1.223 bouyer BUS_DMASYNC_POSTWRITE);
1490 1.83 augustss if ((status & UHCI_TD_SPD) &&
1491 1.152 augustss UHCI_TD_GET_ACTLEN(status) <
1492 1.88 tsutsui UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)))
1493 1.1 augustss goto done;
1494 1.18 augustss }
1495 1.92 augustss DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n",
1496 1.18 augustss ii, ii->stdstart));
1497 1.223 bouyer usb_syncmem(&lstd->dma,
1498 1.223 bouyer lstd->offs + offsetof(uhci_td_t, td_status),
1499 1.223 bouyer sizeof(lstd->td.td_status),
1500 1.223 bouyer BUS_DMASYNC_PREREAD);
1501 1.1 augustss return;
1502 1.1 augustss }
1503 1.1 augustss done:
1504 1.92 augustss DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii));
1505 1.96 augustss usb_uncallout(ii->xfer->timeout_handle, uhci_timeout, ii);
1506 1.36 augustss uhci_idone(ii);
1507 1.1 augustss }
1508 1.1 augustss
1509 1.52 augustss /* Called at splusb() */
1510 1.1 augustss void
1511 1.119 augustss uhci_idone(uhci_intr_info_t *ii)
1512 1.1 augustss {
1513 1.63 augustss usbd_xfer_handle xfer = ii->xfer;
1514 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1515 1.1 augustss uhci_soft_td_t *std;
1516 1.67 augustss u_int32_t status = 0, nstatus;
1517 1.26 augustss int actlen;
1518 1.1 augustss
1519 1.140 augustss DPRINTFN(12, ("uhci_idone: ii=%p\n", ii));
1520 1.7 augustss #ifdef DIAGNOSTIC
1521 1.7 augustss {
1522 1.7 augustss int s = splhigh();
1523 1.7 augustss if (ii->isdone) {
1524 1.26 augustss splx(s);
1525 1.92 augustss #ifdef UHCI_DEBUG
1526 1.92 augustss printf("uhci_idone: ii is done!\n ");
1527 1.92 augustss uhci_dump_ii(ii);
1528 1.92 augustss #else
1529 1.36 augustss printf("uhci_idone: ii=%p is done!\n", ii);
1530 1.92 augustss #endif
1531 1.7 augustss return;
1532 1.7 augustss }
1533 1.7 augustss ii->isdone = 1;
1534 1.7 augustss splx(s);
1535 1.7 augustss }
1536 1.7 augustss #endif
1537 1.48 augustss
1538 1.63 augustss if (xfer->nframes != 0) {
1539 1.48 augustss /* Isoc transfer, do things differently. */
1540 1.48 augustss uhci_soft_td_t **stds = upipe->u.iso.stds;
1541 1.126 augustss int i, n, nframes, len;
1542 1.48 augustss
1543 1.48 augustss DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii));
1544 1.48 augustss
1545 1.63 augustss nframes = xfer->nframes;
1546 1.48 augustss actlen = 0;
1547 1.92 augustss n = UXFER(xfer)->curframe;
1548 1.48 augustss for (i = 0; i < nframes; i++) {
1549 1.48 augustss std = stds[n];
1550 1.59 augustss #ifdef UHCI_DEBUG
1551 1.48 augustss if (uhcidebug > 5) {
1552 1.48 augustss DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i));
1553 1.48 augustss uhci_dump_td(std);
1554 1.48 augustss }
1555 1.48 augustss #endif
1556 1.48 augustss if (++n >= UHCI_VFRAMELIST_COUNT)
1557 1.48 augustss n = 0;
1558 1.223 bouyer usb_syncmem(&std->dma,
1559 1.223 bouyer std->offs + offsetof(uhci_td_t, td_status),
1560 1.223 bouyer sizeof(std->td.td_status),
1561 1.223 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1562 1.88 tsutsui status = le32toh(std->td.td_status);
1563 1.126 augustss len = UHCI_TD_GET_ACTLEN(status);
1564 1.126 augustss xfer->frlengths[i] = len;
1565 1.126 augustss actlen += len;
1566 1.48 augustss }
1567 1.48 augustss upipe->u.iso.inuse -= nframes;
1568 1.63 augustss xfer->actlen = actlen;
1569 1.63 augustss xfer->status = USBD_NORMAL_COMPLETION;
1570 1.140 augustss goto end;
1571 1.48 augustss }
1572 1.48 augustss
1573 1.59 augustss #ifdef UHCI_DEBUG
1574 1.65 augustss DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n",
1575 1.65 augustss ii, xfer, upipe));
1576 1.48 augustss if (uhcidebug > 10)
1577 1.48 augustss uhci_dump_tds(ii->stdstart);
1578 1.48 augustss #endif
1579 1.48 augustss
1580 1.26 augustss /* The transfer is done, compute actual length and status. */
1581 1.26 augustss actlen = 0;
1582 1.63 augustss for (std = ii->stdstart; std != NULL; std = std->link.std) {
1583 1.223 bouyer usb_syncmem(&std->dma, std->offs, sizeof(std->td),
1584 1.223 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1585 1.88 tsutsui nstatus = le32toh(std->td.td_status);
1586 1.64 augustss if (nstatus & UHCI_TD_ACTIVE)
1587 1.26 augustss break;
1588 1.67 augustss
1589 1.64 augustss status = nstatus;
1590 1.88 tsutsui if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) !=
1591 1.88 tsutsui UHCI_TD_PID_SETUP)
1592 1.26 augustss actlen += UHCI_TD_GET_ACTLEN(status);
1593 1.176 mycroft else {
1594 1.176 mycroft /*
1595 1.176 mycroft * UHCI will report CRCTO in addition to a STALL or NAK
1596 1.176 mycroft * for a SETUP transaction. See section 3.2.2, "TD
1597 1.176 mycroft * CONTROL AND STATUS".
1598 1.176 mycroft */
1599 1.176 mycroft if (status & (UHCI_TD_STALLED | UHCI_TD_NAK))
1600 1.176 mycroft status &= ~UHCI_TD_CRCTO;
1601 1.176 mycroft }
1602 1.1 augustss }
1603 1.38 augustss /* If there are left over TDs we need to update the toggle. */
1604 1.63 augustss if (std != NULL)
1605 1.88 tsutsui upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token));
1606 1.38 augustss
1607 1.1 augustss status &= UHCI_TD_ERROR;
1608 1.152 augustss DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n",
1609 1.26 augustss actlen, status));
1610 1.63 augustss xfer->actlen = actlen;
1611 1.1 augustss if (status != 0) {
1612 1.122 tv #ifdef UHCI_DEBUG
1613 1.122 tv char sbuf[128];
1614 1.122 tv
1615 1.224 christos snprintb(sbuf, sizeof(sbuf),
1616 1.224 christos "\20\22BITSTUFF\23CRCTO\24NAK\25"
1617 1.224 christos "BABBLE\26DBUFFER\27STALLED\30ACTIVE",(u_int32_t)status);
1618 1.122 tv
1619 1.75 augustss DPRINTFN((status == UHCI_TD_STALLED)*10,
1620 1.36 augustss ("uhci_idone: error, addr=%d, endpt=0x%02x, "
1621 1.122 tv "status 0x%s\n",
1622 1.63 augustss xfer->pipe->device->address,
1623 1.63 augustss xfer->pipe->endpoint->edesc->bEndpointAddress,
1624 1.122 tv sbuf));
1625 1.122 tv #endif
1626 1.122 tv
1627 1.1 augustss if (status == UHCI_TD_STALLED)
1628 1.63 augustss xfer->status = USBD_STALLED;
1629 1.1 augustss else
1630 1.63 augustss xfer->status = USBD_IOERROR; /* more info XXX */
1631 1.1 augustss } else {
1632 1.63 augustss xfer->status = USBD_NORMAL_COMPLETION;
1633 1.1 augustss }
1634 1.140 augustss
1635 1.140 augustss end:
1636 1.63 augustss usb_transfer_complete(xfer);
1637 1.140 augustss DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii));
1638 1.1 augustss }
1639 1.1 augustss
1640 1.13 augustss /*
1641 1.13 augustss * Called when a request does not complete.
1642 1.13 augustss */
1643 1.1 augustss void
1644 1.119 augustss uhci_timeout(void *addr)
1645 1.1 augustss {
1646 1.1 augustss uhci_intr_info_t *ii = addr;
1647 1.153 augustss struct uhci_xfer *uxfer = UXFER(ii->xfer);
1648 1.153 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe;
1649 1.216 drochner uhci_softc_t *sc = upipe->pipe.device->bus->hci_private;
1650 1.153 augustss
1651 1.153 augustss DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer));
1652 1.153 augustss
1653 1.153 augustss if (sc->sc_dying) {
1654 1.153 augustss uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT);
1655 1.153 augustss return;
1656 1.153 augustss }
1657 1.1 augustss
1658 1.153 augustss /* Execute the abort in a process context. */
1659 1.156 augustss usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer);
1660 1.204 joerg usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task,
1661 1.204 joerg USB_TASKQ_HC);
1662 1.153 augustss }
1663 1.51 augustss
1664 1.153 augustss void
1665 1.153 augustss uhci_timeout_task(void *addr)
1666 1.153 augustss {
1667 1.153 augustss usbd_xfer_handle xfer = addr;
1668 1.153 augustss int s;
1669 1.153 augustss
1670 1.153 augustss DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer));
1671 1.67 augustss
1672 1.153 augustss s = splusb();
1673 1.153 augustss uhci_abort_xfer(xfer, USBD_TIMEOUT);
1674 1.153 augustss splx(s);
1675 1.1 augustss }
1676 1.1 augustss
1677 1.1 augustss /*
1678 1.1 augustss * Wait here until controller claims to have an interrupt.
1679 1.1 augustss * Then call uhci_intr and return. Use timeout to avoid waiting
1680 1.1 augustss * too long.
1681 1.13 augustss * Only used during boot when interrupts are not enabled yet.
1682 1.1 augustss */
1683 1.1 augustss void
1684 1.119 augustss uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer)
1685 1.1 augustss {
1686 1.63 augustss int timo = xfer->timeout;
1687 1.13 augustss uhci_intr_info_t *ii;
1688 1.13 augustss
1689 1.26 augustss DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
1690 1.1 augustss
1691 1.63 augustss xfer->status = USBD_IN_PROGRESS;
1692 1.26 augustss for (; timo >= 0; timo--) {
1693 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1694 1.26 augustss DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
1695 1.1 augustss if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
1696 1.141 augustss uhci_intr1(sc);
1697 1.63 augustss if (xfer->status != USBD_IN_PROGRESS)
1698 1.1 augustss return;
1699 1.1 augustss }
1700 1.1 augustss }
1701 1.13 augustss
1702 1.13 augustss /* Timeout */
1703 1.13 augustss DPRINTF(("uhci_waitintr: timeout\n"));
1704 1.13 augustss for (ii = LIST_FIRST(&sc->sc_intrhead);
1705 1.152 augustss ii != NULL && ii->xfer != xfer;
1706 1.13 augustss ii = LIST_NEXT(ii, list))
1707 1.13 augustss ;
1708 1.41 augustss #ifdef DIAGNOSTIC
1709 1.63 augustss if (ii == NULL)
1710 1.163 provos panic("uhci_waitintr: lost intr_info");
1711 1.41 augustss #endif
1712 1.41 augustss uhci_idone(ii);
1713 1.1 augustss }
1714 1.1 augustss
1715 1.8 augustss void
1716 1.119 augustss uhci_poll(struct usbd_bus *bus)
1717 1.8 augustss {
1718 1.216 drochner uhci_softc_t *sc = bus->hci_private;
1719 1.8 augustss
1720 1.8 augustss if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT)
1721 1.141 augustss uhci_intr1(sc);
1722 1.8 augustss }
1723 1.8 augustss
1724 1.1 augustss void
1725 1.119 augustss uhci_reset(uhci_softc_t *sc)
1726 1.1 augustss {
1727 1.1 augustss int n;
1728 1.1 augustss
1729 1.1 augustss UHCICMD(sc, UHCI_CMD_HCRESET);
1730 1.1 augustss /* The reset bit goes low when the controller is done. */
1731 1.152 augustss for (n = 0; n < UHCI_RESET_TIMEOUT &&
1732 1.1 augustss (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
1733 1.92 augustss usb_delay_ms(&sc->sc_bus, 1);
1734 1.1 augustss if (n >= UHCI_RESET_TIMEOUT)
1735 1.152 augustss printf("%s: controller did not reset\n",
1736 1.216 drochner device_xname(sc->sc_dev));
1737 1.1 augustss }
1738 1.1 augustss
1739 1.16 augustss usbd_status
1740 1.119 augustss uhci_run(uhci_softc_t *sc, int run)
1741 1.1 augustss {
1742 1.1 augustss int s, n, running;
1743 1.71 augustss u_int16_t cmd;
1744 1.1 augustss
1745 1.1 augustss run = run != 0;
1746 1.132 augustss s = splhardusb();
1747 1.30 augustss DPRINTF(("uhci_run: setting run=%d\n", run));
1748 1.71 augustss cmd = UREAD2(sc, UHCI_CMD);
1749 1.71 augustss if (run)
1750 1.71 augustss cmd |= UHCI_CMD_RS;
1751 1.71 augustss else
1752 1.71 augustss cmd &= ~UHCI_CMD_RS;
1753 1.71 augustss UHCICMD(sc, cmd);
1754 1.13 augustss for(n = 0; n < 10; n++) {
1755 1.1 augustss running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
1756 1.1 augustss /* return when we've entered the state we want */
1757 1.1 augustss if (run == running) {
1758 1.1 augustss splx(s);
1759 1.30 augustss DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
1760 1.30 augustss UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
1761 1.16 augustss return (USBD_NORMAL_COMPLETION);
1762 1.1 augustss }
1763 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1764 1.1 augustss }
1765 1.1 augustss splx(s);
1766 1.216 drochner printf("%s: cannot %s\n", device_xname(sc->sc_dev),
1767 1.14 augustss run ? "start" : "stop");
1768 1.16 augustss return (USBD_IOERROR);
1769 1.1 augustss }
1770 1.1 augustss
1771 1.1 augustss /*
1772 1.1 augustss * Memory management routines.
1773 1.1 augustss * uhci_alloc_std allocates TDs
1774 1.1 augustss * uhci_alloc_sqh allocates QHs
1775 1.7 augustss * These two routines do their own free list management,
1776 1.1 augustss * partly for speed, partly because allocating DMAable memory
1777 1.1 augustss * has page size granularaity so much memory would be wasted if
1778 1.16 augustss * only one TD/QH (32 bytes) was placed in each allocated chunk.
1779 1.1 augustss */
1780 1.1 augustss
1781 1.1 augustss uhci_soft_td_t *
1782 1.119 augustss uhci_alloc_std(uhci_softc_t *sc)
1783 1.1 augustss {
1784 1.1 augustss uhci_soft_td_t *std;
1785 1.63 augustss usbd_status err;
1786 1.42 augustss int i, offs;
1787 1.7 augustss usb_dma_t dma;
1788 1.1 augustss
1789 1.63 augustss if (sc->sc_freetds == NULL) {
1790 1.1 augustss DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
1791 1.63 augustss err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK,
1792 1.63 augustss UHCI_TD_ALIGN, &dma);
1793 1.63 augustss if (err)
1794 1.16 augustss return (0);
1795 1.43 augustss for(i = 0; i < UHCI_STD_CHUNK; i++) {
1796 1.42 augustss offs = i * UHCI_STD_SIZE;
1797 1.159 augustss std = KERNADDR(&dma, offs);
1798 1.160 augustss std->physaddr = DMAADDR(&dma, offs);
1799 1.223 bouyer std->dma = dma;
1800 1.223 bouyer std->offs = offs;
1801 1.42 augustss std->link.std = sc->sc_freetds;
1802 1.1 augustss sc->sc_freetds = std;
1803 1.1 augustss }
1804 1.1 augustss }
1805 1.1 augustss std = sc->sc_freetds;
1806 1.42 augustss sc->sc_freetds = std->link.std;
1807 1.42 augustss memset(&std->td, 0, sizeof(uhci_td_t));
1808 1.1 augustss return std;
1809 1.1 augustss }
1810 1.1 augustss
1811 1.1 augustss void
1812 1.119 augustss uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std)
1813 1.1 augustss {
1814 1.7 augustss #ifdef DIAGNOSTIC
1815 1.7 augustss #define TD_IS_FREE 0x12345678
1816 1.88 tsutsui if (le32toh(std->td.td_token) == TD_IS_FREE) {
1817 1.7 augustss printf("uhci_free_std: freeing free TD %p\n", std);
1818 1.7 augustss return;
1819 1.7 augustss }
1820 1.88 tsutsui std->td.td_token = htole32(TD_IS_FREE);
1821 1.7 augustss #endif
1822 1.42 augustss std->link.std = sc->sc_freetds;
1823 1.1 augustss sc->sc_freetds = std;
1824 1.1 augustss }
1825 1.1 augustss
1826 1.1 augustss uhci_soft_qh_t *
1827 1.119 augustss uhci_alloc_sqh(uhci_softc_t *sc)
1828 1.1 augustss {
1829 1.1 augustss uhci_soft_qh_t *sqh;
1830 1.63 augustss usbd_status err;
1831 1.1 augustss int i, offs;
1832 1.7 augustss usb_dma_t dma;
1833 1.1 augustss
1834 1.63 augustss if (sc->sc_freeqhs == NULL) {
1835 1.1 augustss DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
1836 1.63 augustss err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK,
1837 1.63 augustss UHCI_QH_ALIGN, &dma);
1838 1.63 augustss if (err)
1839 1.63 augustss return (0);
1840 1.43 augustss for(i = 0; i < UHCI_SQH_CHUNK; i++) {
1841 1.42 augustss offs = i * UHCI_SQH_SIZE;
1842 1.159 augustss sqh = KERNADDR(&dma, offs);
1843 1.160 augustss sqh->physaddr = DMAADDR(&dma, offs);
1844 1.223 bouyer sqh->dma = dma;
1845 1.223 bouyer sqh->offs = offs;
1846 1.42 augustss sqh->hlink = sc->sc_freeqhs;
1847 1.1 augustss sc->sc_freeqhs = sqh;
1848 1.1 augustss }
1849 1.1 augustss }
1850 1.1 augustss sqh = sc->sc_freeqhs;
1851 1.42 augustss sc->sc_freeqhs = sqh->hlink;
1852 1.42 augustss memset(&sqh->qh, 0, sizeof(uhci_qh_t));
1853 1.16 augustss return (sqh);
1854 1.1 augustss }
1855 1.1 augustss
1856 1.1 augustss void
1857 1.119 augustss uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1858 1.1 augustss {
1859 1.42 augustss sqh->hlink = sc->sc_freeqhs;
1860 1.1 augustss sc->sc_freeqhs = sqh;
1861 1.1 augustss }
1862 1.1 augustss
1863 1.1 augustss void
1864 1.119 augustss uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std,
1865 1.119 augustss uhci_soft_td_t *stdend)
1866 1.1 augustss {
1867 1.1 augustss uhci_soft_td_t *p;
1868 1.1 augustss
1869 1.223 bouyer /*
1870 1.223 bouyer * to avoid race condition with the controller which may be looking
1871 1.223 bouyer * at this chain, we need to first invalidate all links, and
1872 1.223 bouyer * then wait for the controller to move to another queue
1873 1.223 bouyer */
1874 1.223 bouyer for (p = std; p != stdend; p = p->link.std) {
1875 1.223 bouyer usb_syncmem(&p->dma,
1876 1.223 bouyer p->offs + offsetof(uhci_td_t, td_link),
1877 1.223 bouyer sizeof(p->td.td_link),
1878 1.223 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1879 1.223 bouyer if ((p->td.td_link & UHCI_PTR_T) == 0) {
1880 1.223 bouyer p->td.td_link = UHCI_PTR_T;
1881 1.223 bouyer usb_syncmem(&p->dma,
1882 1.223 bouyer p->offs + offsetof(uhci_td_t, td_link),
1883 1.223 bouyer sizeof(p->td.td_link),
1884 1.223 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1885 1.223 bouyer }
1886 1.223 bouyer }
1887 1.223 bouyer delay(UHCI_QH_REMOVE_DELAY);
1888 1.223 bouyer
1889 1.1 augustss for (; std != stdend; std = p) {
1890 1.42 augustss p = std->link.std;
1891 1.1 augustss uhci_free_std(sc, std);
1892 1.1 augustss }
1893 1.1 augustss }
1894 1.1 augustss
1895 1.1 augustss usbd_status
1896 1.119 augustss uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len,
1897 1.119 augustss int rd, u_int16_t flags, usb_dma_t *dma,
1898 1.119 augustss uhci_soft_td_t **sp, uhci_soft_td_t **ep)
1899 1.1 augustss {
1900 1.1 augustss uhci_soft_td_t *p, *lastp;
1901 1.1 augustss uhci_physaddr_t lastlink;
1902 1.1 augustss int i, ntd, l, tog, maxp;
1903 1.18 augustss u_int32_t status;
1904 1.1 augustss int addr = upipe->pipe.device->address;
1905 1.1 augustss int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1906 1.1 augustss
1907 1.144 augustss DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d "
1908 1.152 augustss "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len,
1909 1.144 augustss upipe->pipe.device->speed, flags));
1910 1.4 augustss maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
1911 1.1 augustss if (maxp == 0) {
1912 1.1 augustss printf("uhci_alloc_std_chain: maxp=0\n");
1913 1.1 augustss return (USBD_INVAL);
1914 1.1 augustss }
1915 1.1 augustss ntd = (len + maxp - 1) / maxp;
1916 1.73 augustss if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0)
1917 1.73 augustss ntd++;
1918 1.39 augustss DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd));
1919 1.73 augustss if (ntd == 0) {
1920 1.73 augustss *sp = *ep = 0;
1921 1.73 augustss DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n"));
1922 1.73 augustss return (USBD_NORMAL_COMPLETION);
1923 1.73 augustss }
1924 1.38 augustss tog = upipe->nexttoggle;
1925 1.1 augustss if (ntd % 2 == 0)
1926 1.1 augustss tog ^= 1;
1927 1.32 augustss upipe->nexttoggle = tog ^ 1;
1928 1.121 augustss lastp = NULL;
1929 1.1 augustss lastlink = UHCI_PTR_T;
1930 1.1 augustss ntd--;
1931 1.33 augustss status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
1932 1.144 augustss if (upipe->pipe.device->speed == USB_SPEED_LOW)
1933 1.18 augustss status |= UHCI_TD_LS;
1934 1.73 augustss if (flags & USBD_SHORT_XFER_OK)
1935 1.18 augustss status |= UHCI_TD_SPD;
1936 1.223 bouyer usb_syncmem(dma, 0, len,
1937 1.223 bouyer rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
1938 1.1 augustss for (i = ntd; i >= 0; i--) {
1939 1.1 augustss p = uhci_alloc_std(sc);
1940 1.63 augustss if (p == NULL) {
1941 1.202 christos KASSERT(lastp != NULL);
1942 1.149 augustss uhci_free_std_chain(sc, lastp, NULL);
1943 1.1 augustss return (USBD_NOMEM);
1944 1.1 augustss }
1945 1.42 augustss p->link.std = lastp;
1946 1.121 augustss p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD);
1947 1.1 augustss lastp = p;
1948 1.1 augustss lastlink = p->physaddr;
1949 1.88 tsutsui p->td.td_status = htole32(status);
1950 1.1 augustss if (i == ntd) {
1951 1.1 augustss /* last TD */
1952 1.1 augustss l = len % maxp;
1953 1.73 augustss if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER))
1954 1.73 augustss l = maxp;
1955 1.1 augustss *ep = p;
1956 1.1 augustss } else
1957 1.1 augustss l = maxp;
1958 1.152 augustss p->td.td_token =
1959 1.88 tsutsui htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) :
1960 1.88 tsutsui UHCI_TD_OUT(l, endpt, addr, tog));
1961 1.160 augustss p->td.td_buffer = htole32(DMAADDR(dma, i * maxp));
1962 1.223 bouyer usb_syncmem(&p->dma, p->offs, sizeof(p->td),
1963 1.223 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1964 1.1 augustss tog ^= 1;
1965 1.1 augustss }
1966 1.1 augustss *sp = lastp;
1967 1.152 augustss DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n",
1968 1.38 augustss upipe->nexttoggle));
1969 1.1 augustss return (USBD_NORMAL_COMPLETION);
1970 1.1 augustss }
1971 1.1 augustss
1972 1.38 augustss void
1973 1.119 augustss uhci_device_clear_toggle(usbd_pipe_handle pipe)
1974 1.38 augustss {
1975 1.38 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1976 1.38 augustss upipe->nexttoggle = 0;
1977 1.38 augustss }
1978 1.38 augustss
1979 1.38 augustss void
1980 1.205 christos uhci_noop(usbd_pipe_handle pipe)
1981 1.38 augustss {
1982 1.38 augustss }
1983 1.38 augustss
1984 1.1 augustss usbd_status
1985 1.119 augustss uhci_device_bulk_transfer(usbd_xfer_handle xfer)
1986 1.1 augustss {
1987 1.63 augustss usbd_status err;
1988 1.16 augustss
1989 1.52 augustss /* Insert last in queue. */
1990 1.63 augustss err = usb_insert_transfer(xfer);
1991 1.63 augustss if (err)
1992 1.63 augustss return (err);
1993 1.52 augustss
1994 1.152 augustss /*
1995 1.92 augustss * Pipe isn't running (otherwise err would be USBD_INPROG),
1996 1.92 augustss * so start it first.
1997 1.67 augustss */
1998 1.63 augustss return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1999 1.16 augustss }
2000 1.16 augustss
2001 1.16 augustss usbd_status
2002 1.119 augustss uhci_device_bulk_start(usbd_xfer_handle xfer)
2003 1.16 augustss {
2004 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2005 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
2006 1.216 drochner uhci_softc_t *sc = dev->bus->hci_private;
2007 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2008 1.55 augustss uhci_soft_td_t *data, *dataend;
2009 1.1 augustss uhci_soft_qh_t *sqh;
2010 1.63 augustss usbd_status err;
2011 1.45 augustss int len, isread, endpt;
2012 1.1 augustss int s;
2013 1.1 augustss
2014 1.169 augustss DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n",
2015 1.169 augustss xfer, xfer->length, xfer->flags, ii));
2016 1.1 augustss
2017 1.82 augustss if (sc->sc_dying)
2018 1.82 augustss return (USBD_IOERROR);
2019 1.82 augustss
2020 1.48 augustss #ifdef DIAGNOSTIC
2021 1.63 augustss if (xfer->rqflags & URQ_REQUEST)
2022 1.163 provos panic("uhci_device_bulk_transfer: a request");
2023 1.48 augustss #endif
2024 1.1 augustss
2025 1.63 augustss len = xfer->length;
2026 1.102 augustss endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2027 1.45 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2028 1.1 augustss sqh = upipe->u.bulk.sqh;
2029 1.1 augustss
2030 1.1 augustss upipe->u.bulk.isread = isread;
2031 1.1 augustss upipe->u.bulk.length = len;
2032 1.1 augustss
2033 1.73 augustss err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
2034 1.73 augustss &xfer->dmabuf, &data, &dataend);
2035 1.63 augustss if (err)
2036 1.63 augustss return (err);
2037 1.88 tsutsui dataend->td.td_status |= htole32(UHCI_TD_IOC);
2038 1.223 bouyer usb_syncmem(&dataend->dma,
2039 1.223 bouyer dataend->offs + offsetof(uhci_td_t, td_status),
2040 1.223 bouyer sizeof(dataend->td.td_status),
2041 1.223 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2042 1.223 bouyer
2043 1.1 augustss
2044 1.59 augustss #ifdef UHCI_DEBUG
2045 1.33 augustss if (uhcidebug > 8) {
2046 1.55 augustss DPRINTF(("uhci_device_bulk_transfer: data(1)\n"));
2047 1.55 augustss uhci_dump_tds(data);
2048 1.1 augustss }
2049 1.1 augustss #endif
2050 1.1 augustss
2051 1.1 augustss /* Set up interrupt info. */
2052 1.63 augustss ii->xfer = xfer;
2053 1.55 augustss ii->stdstart = data;
2054 1.55 augustss ii->stdend = dataend;
2055 1.7 augustss #ifdef DIAGNOSTIC
2056 1.70 augustss if (!ii->isdone) {
2057 1.70 augustss printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii);
2058 1.70 augustss }
2059 1.7 augustss ii->isdone = 0;
2060 1.7 augustss #endif
2061 1.1 augustss
2062 1.55 augustss sqh->elink = data;
2063 1.121 augustss sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
2064 1.223 bouyer /* uhci_add_bulk() will do usb_syncmem(sqh) */
2065 1.1 augustss
2066 1.1 augustss s = splusb();
2067 1.1 augustss uhci_add_bulk(sc, sqh);
2068 1.92 augustss uhci_add_intr_info(sc, ii);
2069 1.1 augustss
2070 1.63 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
2071 1.171 tsutsui usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
2072 1.91 augustss uhci_timeout, ii);
2073 1.13 augustss }
2074 1.92 augustss xfer->status = USBD_IN_PROGRESS;
2075 1.1 augustss splx(s);
2076 1.1 augustss
2077 1.59 augustss #ifdef UHCI_DEBUG
2078 1.1 augustss if (uhcidebug > 10) {
2079 1.55 augustss DPRINTF(("uhci_device_bulk_transfer: data(2)\n"));
2080 1.55 augustss uhci_dump_tds(data);
2081 1.1 augustss }
2082 1.1 augustss #endif
2083 1.1 augustss
2084 1.26 augustss if (sc->sc_bus.use_polling)
2085 1.63 augustss uhci_waitintr(sc, xfer);
2086 1.26 augustss
2087 1.1 augustss return (USBD_IN_PROGRESS);
2088 1.1 augustss }
2089 1.1 augustss
2090 1.1 augustss /* Abort a device bulk request. */
2091 1.1 augustss void
2092 1.119 augustss uhci_device_bulk_abort(usbd_xfer_handle xfer)
2093 1.1 augustss {
2094 1.33 augustss DPRINTF(("uhci_device_bulk_abort:\n"));
2095 1.66 augustss uhci_abort_xfer(xfer, USBD_CANCELLED);
2096 1.33 augustss }
2097 1.33 augustss
2098 1.92 augustss /*
2099 1.154 augustss * Abort a device request.
2100 1.154 augustss * If this routine is called at splusb() it guarantees that the request
2101 1.154 augustss * will be removed from the hardware scheduling and that the callback
2102 1.154 augustss * for it will be called with USBD_CANCELLED status.
2103 1.154 augustss * It's impossible to guarantee that the requested transfer will not
2104 1.154 augustss * have happened since the hardware runs concurrently.
2105 1.154 augustss * If the transaction has already happened we rely on the ordinary
2106 1.154 augustss * interrupt processing to process it.
2107 1.92 augustss */
2108 1.33 augustss void
2109 1.119 augustss uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2110 1.33 augustss {
2111 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2112 1.153 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2113 1.216 drochner uhci_softc_t *sc = upipe->pipe.device->bus->hci_private;
2114 1.33 augustss uhci_soft_td_t *std;
2115 1.92 augustss int s;
2116 1.188 augustss int wake;
2117 1.65 augustss
2118 1.106 augustss DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status));
2119 1.33 augustss
2120 1.153 augustss if (sc->sc_dying) {
2121 1.153 augustss /* If we're dying, just do the software part. */
2122 1.153 augustss s = splusb();
2123 1.153 augustss xfer->status = status; /* make software ignore it */
2124 1.157 tsutsui usb_uncallout(xfer->timeout_handle, uhci_timeout, xfer);
2125 1.153 augustss usb_transfer_complete(xfer);
2126 1.92 augustss splx(s);
2127 1.194 christos return;
2128 1.92 augustss }
2129 1.92 augustss
2130 1.153 augustss if (xfer->device->bus->intr_context || !curproc)
2131 1.163 provos panic("uhci_abort_xfer: not in process context");
2132 1.153 augustss
2133 1.153 augustss /*
2134 1.188 augustss * If an abort is already in progress then just wait for it to
2135 1.188 augustss * complete and return.
2136 1.188 augustss */
2137 1.188 augustss if (xfer->hcflags & UXFER_ABORTING) {
2138 1.188 augustss DPRINTFN(2, ("uhci_abort_xfer: already aborting\n"));
2139 1.188 augustss #ifdef DIAGNOSTIC
2140 1.188 augustss if (status == USBD_TIMEOUT)
2141 1.188 augustss printf("uhci_abort_xfer: TIMEOUT while aborting\n");
2142 1.188 augustss #endif
2143 1.188 augustss /* Override the status which might be USBD_TIMEOUT. */
2144 1.188 augustss xfer->status = status;
2145 1.188 augustss DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n"));
2146 1.188 augustss xfer->hcflags |= UXFER_ABORTWAIT;
2147 1.188 augustss while (xfer->hcflags & UXFER_ABORTING)
2148 1.188 augustss tsleep(&xfer->hcflags, PZERO, "uhciaw", 0);
2149 1.188 augustss return;
2150 1.188 augustss }
2151 1.188 augustss xfer->hcflags |= UXFER_ABORTING;
2152 1.188 augustss
2153 1.188 augustss /*
2154 1.153 augustss * Step 1: Make interrupt routine and hardware ignore xfer.
2155 1.153 augustss */
2156 1.153 augustss s = splusb();
2157 1.153 augustss xfer->status = status; /* make software ignore it */
2158 1.106 augustss usb_uncallout(xfer->timeout_handle, uhci_timeout, ii);
2159 1.153 augustss DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii));
2160 1.223 bouyer for (std = ii->stdstart; std != NULL; std = std->link.std) {
2161 1.223 bouyer usb_syncmem(&std->dma,
2162 1.223 bouyer std->offs + offsetof(uhci_td_t, td_status),
2163 1.223 bouyer sizeof(std->td.td_status),
2164 1.223 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2165 1.92 augustss std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
2166 1.223 bouyer usb_syncmem(&std->dma,
2167 1.223 bouyer std->offs + offsetof(uhci_td_t, td_status),
2168 1.223 bouyer sizeof(std->td.td_status),
2169 1.223 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2170 1.223 bouyer }
2171 1.153 augustss splx(s);
2172 1.92 augustss
2173 1.162 augustss /*
2174 1.153 augustss * Step 2: Wait until we know hardware has finished any possible
2175 1.153 augustss * use of the xfer. Also make sure the soft interrupt routine
2176 1.153 augustss * has run.
2177 1.153 augustss */
2178 1.154 augustss usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */
2179 1.153 augustss s = splusb();
2180 1.164 augustss #ifdef USB_USE_SOFTINTR
2181 1.153 augustss sc->sc_softwake = 1;
2182 1.164 augustss #endif /* USB_USE_SOFTINTR */
2183 1.153 augustss usb_schedsoftintr(&sc->sc_bus);
2184 1.164 augustss #ifdef USB_USE_SOFTINTR
2185 1.154 augustss DPRINTFN(1,("uhci_abort_xfer: tsleep\n"));
2186 1.153 augustss tsleep(&sc->sc_softwake, PZERO, "uhciab", 0);
2187 1.164 augustss #endif /* USB_USE_SOFTINTR */
2188 1.153 augustss splx(s);
2189 1.162 augustss
2190 1.153 augustss /*
2191 1.153 augustss * Step 3: Execute callback.
2192 1.153 augustss */
2193 1.154 augustss DPRINTFN(1,("uhci_abort_xfer: callback\n"));
2194 1.92 augustss s = splusb();
2195 1.100 augustss #ifdef DIAGNOSTIC
2196 1.106 augustss ii->isdone = 1;
2197 1.100 augustss #endif
2198 1.188 augustss wake = xfer->hcflags & UXFER_ABORTWAIT;
2199 1.188 augustss xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
2200 1.106 augustss usb_transfer_complete(xfer);
2201 1.188 augustss if (wake)
2202 1.188 augustss wakeup(&xfer->hcflags);
2203 1.33 augustss splx(s);
2204 1.1 augustss }
2205 1.1 augustss
2206 1.1 augustss /* Close a device bulk pipe. */
2207 1.1 augustss void
2208 1.119 augustss uhci_device_bulk_close(usbd_pipe_handle pipe)
2209 1.1 augustss {
2210 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2211 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
2212 1.216 drochner uhci_softc_t *sc = dev->bus->hci_private;
2213 1.1 augustss
2214 1.1 augustss uhci_free_sqh(sc, upipe->u.bulk.sqh);
2215 1.1 augustss }
2216 1.1 augustss
2217 1.1 augustss usbd_status
2218 1.119 augustss uhci_device_ctrl_transfer(usbd_xfer_handle xfer)
2219 1.1 augustss {
2220 1.63 augustss usbd_status err;
2221 1.16 augustss
2222 1.52 augustss /* Insert last in queue. */
2223 1.63 augustss err = usb_insert_transfer(xfer);
2224 1.63 augustss if (err)
2225 1.63 augustss return (err);
2226 1.52 augustss
2227 1.152 augustss /*
2228 1.92 augustss * Pipe isn't running (otherwise err would be USBD_INPROG),
2229 1.92 augustss * so start it first.
2230 1.67 augustss */
2231 1.63 augustss return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2232 1.16 augustss }
2233 1.16 augustss
2234 1.16 augustss usbd_status
2235 1.119 augustss uhci_device_ctrl_start(usbd_xfer_handle xfer)
2236 1.16 augustss {
2237 1.216 drochner uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2238 1.63 augustss usbd_status err;
2239 1.1 augustss
2240 1.82 augustss if (sc->sc_dying)
2241 1.82 augustss return (USBD_IOERROR);
2242 1.82 augustss
2243 1.48 augustss #ifdef DIAGNOSTIC
2244 1.63 augustss if (!(xfer->rqflags & URQ_REQUEST))
2245 1.163 provos panic("uhci_device_ctrl_transfer: not a request");
2246 1.48 augustss #endif
2247 1.1 augustss
2248 1.63 augustss err = uhci_device_request(xfer);
2249 1.63 augustss if (err)
2250 1.63 augustss return (err);
2251 1.1 augustss
2252 1.9 augustss if (sc->sc_bus.use_polling)
2253 1.63 augustss uhci_waitintr(sc, xfer);
2254 1.1 augustss return (USBD_IN_PROGRESS);
2255 1.1 augustss }
2256 1.1 augustss
2257 1.1 augustss usbd_status
2258 1.119 augustss uhci_device_intr_transfer(usbd_xfer_handle xfer)
2259 1.1 augustss {
2260 1.63 augustss usbd_status err;
2261 1.16 augustss
2262 1.52 augustss /* Insert last in queue. */
2263 1.63 augustss err = usb_insert_transfer(xfer);
2264 1.63 augustss if (err)
2265 1.63 augustss return (err);
2266 1.52 augustss
2267 1.152 augustss /*
2268 1.92 augustss * Pipe isn't running (otherwise err would be USBD_INPROG),
2269 1.92 augustss * so start it first.
2270 1.67 augustss */
2271 1.63 augustss return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2272 1.16 augustss }
2273 1.16 augustss
2274 1.16 augustss usbd_status
2275 1.119 augustss uhci_device_intr_start(usbd_xfer_handle xfer)
2276 1.16 augustss {
2277 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2278 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
2279 1.216 drochner uhci_softc_t *sc = dev->bus->hci_private;
2280 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2281 1.55 augustss uhci_soft_td_t *data, *dataend;
2282 1.1 augustss uhci_soft_qh_t *sqh;
2283 1.63 augustss usbd_status err;
2284 1.187 skrll int isread, endpt;
2285 1.49 augustss int i, s;
2286 1.1 augustss
2287 1.82 augustss if (sc->sc_dying)
2288 1.82 augustss return (USBD_IOERROR);
2289 1.82 augustss
2290 1.63 augustss DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n",
2291 1.63 augustss xfer, xfer->length, xfer->flags));
2292 1.1 augustss
2293 1.48 augustss #ifdef DIAGNOSTIC
2294 1.63 augustss if (xfer->rqflags & URQ_REQUEST)
2295 1.163 provos panic("uhci_device_intr_transfer: a request");
2296 1.48 augustss #endif
2297 1.1 augustss
2298 1.187 skrll endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2299 1.187 skrll isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2300 1.187 skrll
2301 1.187 skrll upipe->u.intr.isread = isread;
2302 1.187 skrll
2303 1.187 skrll err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread,
2304 1.187 skrll xfer->flags, &xfer->dmabuf, &data,
2305 1.187 skrll &dataend);
2306 1.63 augustss if (err)
2307 1.63 augustss return (err);
2308 1.88 tsutsui dataend->td.td_status |= htole32(UHCI_TD_IOC);
2309 1.223 bouyer usb_syncmem(&dataend->dma,
2310 1.223 bouyer dataend->offs + offsetof(uhci_td_t, td_status),
2311 1.223 bouyer sizeof(dataend->td.td_status),
2312 1.223 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2313 1.1 augustss
2314 1.59 augustss #ifdef UHCI_DEBUG
2315 1.1 augustss if (uhcidebug > 10) {
2316 1.55 augustss DPRINTF(("uhci_device_intr_transfer: data(1)\n"));
2317 1.55 augustss uhci_dump_tds(data);
2318 1.1 augustss uhci_dump_qh(upipe->u.intr.qhs[0]);
2319 1.1 augustss }
2320 1.1 augustss #endif
2321 1.1 augustss
2322 1.1 augustss s = splusb();
2323 1.1 augustss /* Set up interrupt info. */
2324 1.63 augustss ii->xfer = xfer;
2325 1.55 augustss ii->stdstart = data;
2326 1.55 augustss ii->stdend = dataend;
2327 1.7 augustss #ifdef DIAGNOSTIC
2328 1.70 augustss if (!ii->isdone) {
2329 1.70 augustss printf("uhci_device_intr_transfer: not done, ii=%p\n", ii);
2330 1.70 augustss }
2331 1.7 augustss ii->isdone = 0;
2332 1.7 augustss #endif
2333 1.1 augustss
2334 1.152 augustss DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
2335 1.12 augustss upipe->u.intr.qhs[0]));
2336 1.1 augustss for (i = 0; i < upipe->u.intr.npoll; i++) {
2337 1.1 augustss sqh = upipe->u.intr.qhs[i];
2338 1.55 augustss sqh->elink = data;
2339 1.121 augustss sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
2340 1.223 bouyer usb_syncmem(&sqh->dma,
2341 1.223 bouyer sqh->offs + offsetof(uhci_qh_t, qh_elink),
2342 1.223 bouyer sizeof(sqh->qh.qh_elink),
2343 1.223 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2344 1.1 augustss }
2345 1.92 augustss uhci_add_intr_info(sc, ii);
2346 1.92 augustss xfer->status = USBD_IN_PROGRESS;
2347 1.1 augustss splx(s);
2348 1.1 augustss
2349 1.59 augustss #ifdef UHCI_DEBUG
2350 1.1 augustss if (uhcidebug > 10) {
2351 1.55 augustss DPRINTF(("uhci_device_intr_transfer: data(2)\n"));
2352 1.55 augustss uhci_dump_tds(data);
2353 1.1 augustss uhci_dump_qh(upipe->u.intr.qhs[0]);
2354 1.1 augustss }
2355 1.1 augustss #endif
2356 1.1 augustss
2357 1.1 augustss return (USBD_IN_PROGRESS);
2358 1.1 augustss }
2359 1.1 augustss
2360 1.1 augustss /* Abort a device control request. */
2361 1.1 augustss void
2362 1.119 augustss uhci_device_ctrl_abort(usbd_xfer_handle xfer)
2363 1.1 augustss {
2364 1.33 augustss DPRINTF(("uhci_device_ctrl_abort:\n"));
2365 1.66 augustss uhci_abort_xfer(xfer, USBD_CANCELLED);
2366 1.1 augustss }
2367 1.1 augustss
2368 1.1 augustss /* Close a device control pipe. */
2369 1.1 augustss void
2370 1.205 christos uhci_device_ctrl_close(usbd_pipe_handle pipe)
2371 1.1 augustss {
2372 1.1 augustss }
2373 1.1 augustss
2374 1.1 augustss /* Abort a device interrupt request. */
2375 1.1 augustss void
2376 1.119 augustss uhci_device_intr_abort(usbd_xfer_handle xfer)
2377 1.1 augustss {
2378 1.63 augustss DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer));
2379 1.63 augustss if (xfer->pipe->intrxfer == xfer) {
2380 1.36 augustss DPRINTFN(1,("uhci_device_intr_abort: remove\n"));
2381 1.154 augustss xfer->pipe->intrxfer = NULL;
2382 1.1 augustss }
2383 1.66 augustss uhci_abort_xfer(xfer, USBD_CANCELLED);
2384 1.1 augustss }
2385 1.1 augustss
2386 1.1 augustss /* Close a device interrupt pipe. */
2387 1.1 augustss void
2388 1.119 augustss uhci_device_intr_close(usbd_pipe_handle pipe)
2389 1.1 augustss {
2390 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2391 1.216 drochner uhci_softc_t *sc = pipe->device->bus->hci_private;
2392 1.92 augustss int i, npoll;
2393 1.92 augustss int s;
2394 1.1 augustss
2395 1.1 augustss /* Unlink descriptors from controller data structures. */
2396 1.1 augustss npoll = upipe->u.intr.npoll;
2397 1.92 augustss s = splusb();
2398 1.1 augustss for (i = 0; i < npoll; i++)
2399 1.92 augustss uhci_remove_intr(sc, upipe->u.intr.qhs[i]);
2400 1.92 augustss splx(s);
2401 1.1 augustss
2402 1.152 augustss /*
2403 1.1 augustss * We now have to wait for any activity on the physical
2404 1.1 augustss * descriptors to stop.
2405 1.1 augustss */
2406 1.20 augustss usb_delay_ms(&sc->sc_bus, 2);
2407 1.1 augustss
2408 1.1 augustss for(i = 0; i < npoll; i++)
2409 1.1 augustss uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
2410 1.31 augustss free(upipe->u.intr.qhs, M_USBHC);
2411 1.1 augustss
2412 1.1 augustss /* XXX free other resources */
2413 1.1 augustss }
2414 1.1 augustss
2415 1.1 augustss usbd_status
2416 1.119 augustss uhci_device_request(usbd_xfer_handle xfer)
2417 1.1 augustss {
2418 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2419 1.63 augustss usb_device_request_t *req = &xfer->request;
2420 1.1 augustss usbd_device_handle dev = upipe->pipe.device;
2421 1.216 drochner uhci_softc_t *sc = dev->bus->hci_private;
2422 1.1 augustss int addr = dev->address;
2423 1.1 augustss int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2424 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2425 1.55 augustss uhci_soft_td_t *setup, *data, *stat, *next, *dataend;
2426 1.1 augustss uhci_soft_qh_t *sqh;
2427 1.1 augustss int len;
2428 1.1 augustss u_int32_t ls;
2429 1.63 augustss usbd_status err;
2430 1.1 augustss int isread;
2431 1.1 augustss int s;
2432 1.1 augustss
2433 1.13 augustss DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
2434 1.12 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
2435 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
2436 1.1 augustss UGETW(req->wIndex), UGETW(req->wLength),
2437 1.1 augustss addr, endpt));
2438 1.1 augustss
2439 1.144 augustss ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0;
2440 1.1 augustss isread = req->bmRequestType & UT_READ;
2441 1.1 augustss len = UGETW(req->wLength);
2442 1.1 augustss
2443 1.1 augustss setup = upipe->u.ctl.setup;
2444 1.1 augustss stat = upipe->u.ctl.stat;
2445 1.1 augustss sqh = upipe->u.ctl.sqh;
2446 1.1 augustss
2447 1.1 augustss /* Set up data transaction */
2448 1.1 augustss if (len != 0) {
2449 1.38 augustss upipe->nexttoggle = 1;
2450 1.73 augustss err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
2451 1.73 augustss &xfer->dmabuf, &data, &dataend);
2452 1.63 augustss if (err)
2453 1.63 augustss return (err);
2454 1.55 augustss next = data;
2455 1.55 augustss dataend->link.std = stat;
2456 1.121 augustss dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
2457 1.223 bouyer usb_syncmem(&dataend->dma,
2458 1.223 bouyer dataend->offs + offsetof(uhci_td_t, td_link),
2459 1.223 bouyer sizeof(dataend->td.td_link),
2460 1.223 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2461 1.1 augustss } else {
2462 1.1 augustss next = stat;
2463 1.1 augustss }
2464 1.1 augustss upipe->u.ctl.length = len;
2465 1.1 augustss
2466 1.159 augustss memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req);
2467 1.223 bouyer usb_syncmem(&upipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE);
2468 1.1 augustss
2469 1.42 augustss setup->link.std = next;
2470 1.121 augustss setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
2471 1.88 tsutsui setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
2472 1.88 tsutsui UHCI_TD_ACTIVE);
2473 1.88 tsutsui setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr));
2474 1.160 augustss setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0));
2475 1.223 bouyer usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td),
2476 1.223 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2477 1.42 augustss
2478 1.92 augustss stat->link.std = NULL;
2479 1.88 tsutsui stat->td.td_link = htole32(UHCI_PTR_T);
2480 1.152 augustss stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
2481 1.39 augustss UHCI_TD_ACTIVE | UHCI_TD_IOC);
2482 1.152 augustss stat->td.td_token =
2483 1.88 tsutsui htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
2484 1.88 tsutsui UHCI_TD_IN (0, endpt, addr, 1));
2485 1.88 tsutsui stat->td.td_buffer = htole32(0);
2486 1.223 bouyer usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td),
2487 1.223 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2488 1.1 augustss
2489 1.59 augustss #ifdef UHCI_DEBUG
2490 1.67 augustss if (uhcidebug > 10) {
2491 1.47 augustss DPRINTF(("uhci_device_request: before transfer\n"));
2492 1.41 augustss uhci_dump_tds(setup);
2493 1.1 augustss }
2494 1.1 augustss #endif
2495 1.1 augustss
2496 1.1 augustss /* Set up interrupt info. */
2497 1.63 augustss ii->xfer = xfer;
2498 1.1 augustss ii->stdstart = setup;
2499 1.1 augustss ii->stdend = stat;
2500 1.7 augustss #ifdef DIAGNOSTIC
2501 1.70 augustss if (!ii->isdone) {
2502 1.70 augustss printf("uhci_device_request: not done, ii=%p\n", ii);
2503 1.70 augustss }
2504 1.7 augustss ii->isdone = 0;
2505 1.7 augustss #endif
2506 1.1 augustss
2507 1.42 augustss sqh->elink = setup;
2508 1.121 augustss sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD);
2509 1.223 bouyer /* uhci_add_?s_ctrl() will do usb_syncmem(sqh) */
2510 1.1 augustss
2511 1.1 augustss s = splusb();
2512 1.144 augustss if (dev->speed == USB_SPEED_LOW)
2513 1.123 augustss uhci_add_ls_ctrl(sc, sqh);
2514 1.123 augustss else
2515 1.123 augustss uhci_add_hs_ctrl(sc, sqh);
2516 1.92 augustss uhci_add_intr_info(sc, ii);
2517 1.59 augustss #ifdef UHCI_DEBUG
2518 1.1 augustss if (uhcidebug > 12) {
2519 1.1 augustss uhci_soft_td_t *std;
2520 1.1 augustss uhci_soft_qh_t *xqh;
2521 1.13 augustss uhci_soft_qh_t *sxqh;
2522 1.13 augustss int maxqh = 0;
2523 1.1 augustss uhci_physaddr_t link;
2524 1.47 augustss DPRINTF(("uhci_enter_ctl_q: follow from [0]\n"));
2525 1.1 augustss for (std = sc->sc_vframes[0].htd, link = 0;
2526 1.121 augustss (link & UHCI_PTR_QH) == 0;
2527 1.42 augustss std = std->link.std) {
2528 1.88 tsutsui link = le32toh(std->td.td_link);
2529 1.1 augustss uhci_dump_td(std);
2530 1.1 augustss }
2531 1.67 augustss sxqh = (uhci_soft_qh_t *)std;
2532 1.67 augustss uhci_dump_qh(sxqh);
2533 1.67 augustss for (xqh = sxqh;
2534 1.63 augustss xqh != NULL;
2535 1.152 augustss xqh = (maxqh++ == 5 || xqh->hlink == sxqh ||
2536 1.121 augustss xqh->hlink == xqh ? NULL : xqh->hlink)) {
2537 1.1 augustss uhci_dump_qh(xqh);
2538 1.13 augustss }
2539 1.47 augustss DPRINTF(("Enqueued QH:\n"));
2540 1.1 augustss uhci_dump_qh(sqh);
2541 1.42 augustss uhci_dump_tds(sqh->elink);
2542 1.1 augustss }
2543 1.1 augustss #endif
2544 1.63 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
2545 1.171 tsutsui usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
2546 1.91 augustss uhci_timeout, ii);
2547 1.13 augustss }
2548 1.92 augustss xfer->status = USBD_IN_PROGRESS;
2549 1.1 augustss splx(s);
2550 1.1 augustss
2551 1.1 augustss return (USBD_NORMAL_COMPLETION);
2552 1.1 augustss }
2553 1.1 augustss
2554 1.16 augustss usbd_status
2555 1.119 augustss uhci_device_isoc_transfer(usbd_xfer_handle xfer)
2556 1.16 augustss {
2557 1.63 augustss usbd_status err;
2558 1.48 augustss
2559 1.63 augustss DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer));
2560 1.48 augustss
2561 1.48 augustss /* Put it on our queue, */
2562 1.63 augustss err = usb_insert_transfer(xfer);
2563 1.48 augustss
2564 1.48 augustss /* bail out on error, */
2565 1.63 augustss if (err && err != USBD_IN_PROGRESS)
2566 1.63 augustss return (err);
2567 1.48 augustss
2568 1.48 augustss /* XXX should check inuse here */
2569 1.48 augustss
2570 1.48 augustss /* insert into schedule, */
2571 1.63 augustss uhci_device_isoc_enter(xfer);
2572 1.48 augustss
2573 1.102 augustss /* and start if the pipe wasn't running */
2574 1.67 augustss if (!err)
2575 1.63 augustss uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
2576 1.48 augustss
2577 1.63 augustss return (err);
2578 1.48 augustss }
2579 1.48 augustss
2580 1.48 augustss void
2581 1.119 augustss uhci_device_isoc_enter(usbd_xfer_handle xfer)
2582 1.48 augustss {
2583 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2584 1.16 augustss usbd_device_handle dev = upipe->pipe.device;
2585 1.216 drochner uhci_softc_t *sc = dev->bus->hci_private;
2586 1.48 augustss struct iso *iso = &upipe->u.iso;
2587 1.152 augustss uhci_soft_td_t *std;
2588 1.223 bouyer u_int32_t buf, len, status, offs;
2589 1.48 augustss int s, i, next, nframes;
2590 1.223 bouyer int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN;
2591 1.48 augustss
2592 1.63 augustss DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p "
2593 1.48 augustss "nframes=%d\n",
2594 1.63 augustss iso->inuse, iso->next, xfer, xfer->nframes));
2595 1.48 augustss
2596 1.82 augustss if (sc->sc_dying)
2597 1.82 augustss return;
2598 1.82 augustss
2599 1.63 augustss if (xfer->status == USBD_IN_PROGRESS) {
2600 1.48 augustss /* This request has already been entered into the frame list */
2601 1.96 augustss printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer);
2602 1.68 augustss /* XXX */
2603 1.48 augustss }
2604 1.48 augustss
2605 1.48 augustss #ifdef DIAGNOSTIC
2606 1.48 augustss if (iso->inuse >= UHCI_VFRAMELIST_COUNT)
2607 1.48 augustss printf("uhci_device_isoc_enter: overflow!\n");
2608 1.19 augustss #endif
2609 1.16 augustss
2610 1.48 augustss next = iso->next;
2611 1.48 augustss if (next == -1) {
2612 1.48 augustss /* Not in use yet, schedule it a few frames ahead. */
2613 1.48 augustss next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
2614 1.48 augustss DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next));
2615 1.48 augustss }
2616 1.48 augustss
2617 1.63 augustss xfer->status = USBD_IN_PROGRESS;
2618 1.92 augustss UXFER(xfer)->curframe = next;
2619 1.48 augustss
2620 1.160 augustss buf = DMAADDR(&xfer->dmabuf, 0);
2621 1.223 bouyer offs = 0;
2622 1.88 tsutsui status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |
2623 1.88 tsutsui UHCI_TD_ACTIVE |
2624 1.88 tsutsui UHCI_TD_IOS);
2625 1.63 augustss nframes = xfer->nframes;
2626 1.48 augustss s = splusb();
2627 1.48 augustss for (i = 0; i < nframes; i++) {
2628 1.48 augustss std = iso->stds[next];
2629 1.48 augustss if (++next >= UHCI_VFRAMELIST_COUNT)
2630 1.48 augustss next = 0;
2631 1.63 augustss len = xfer->frlengths[i];
2632 1.88 tsutsui std->td.td_buffer = htole32(buf);
2633 1.223 bouyer usb_syncmem(&xfer->dmabuf, offs, len,
2634 1.223 bouyer rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
2635 1.48 augustss if (i == nframes - 1)
2636 1.88 tsutsui status |= UHCI_TD_IOC;
2637 1.88 tsutsui std->td.td_status = htole32(status);
2638 1.88 tsutsui std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK);
2639 1.88 tsutsui std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len));
2640 1.223 bouyer usb_syncmem(&std->dma, std->offs, sizeof(std->td),
2641 1.223 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2642 1.59 augustss #ifdef UHCI_DEBUG
2643 1.48 augustss if (uhcidebug > 5) {
2644 1.48 augustss DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i));
2645 1.48 augustss uhci_dump_td(std);
2646 1.48 augustss }
2647 1.48 augustss #endif
2648 1.48 augustss buf += len;
2649 1.223 bouyer offs += len;
2650 1.48 augustss }
2651 1.48 augustss iso->next = next;
2652 1.63 augustss iso->inuse += xfer->nframes;
2653 1.16 augustss
2654 1.48 augustss splx(s);
2655 1.16 augustss }
2656 1.16 augustss
2657 1.16 augustss usbd_status
2658 1.119 augustss uhci_device_isoc_start(usbd_xfer_handle xfer)
2659 1.16 augustss {
2660 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2661 1.216 drochner uhci_softc_t *sc = upipe->pipe.device->bus->hci_private;
2662 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2663 1.48 augustss uhci_soft_td_t *end;
2664 1.48 augustss int s, i;
2665 1.48 augustss
2666 1.96 augustss DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer));
2667 1.96 augustss
2668 1.82 augustss if (sc->sc_dying)
2669 1.82 augustss return (USBD_IOERROR);
2670 1.82 augustss
2671 1.48 augustss #ifdef DIAGNOSTIC
2672 1.63 augustss if (xfer->status != USBD_IN_PROGRESS)
2673 1.63 augustss printf("uhci_device_isoc_start: not in progress %p\n", xfer);
2674 1.48 augustss #endif
2675 1.48 augustss
2676 1.48 augustss /* Find the last TD */
2677 1.92 augustss i = UXFER(xfer)->curframe + xfer->nframes;
2678 1.48 augustss if (i >= UHCI_VFRAMELIST_COUNT)
2679 1.48 augustss i -= UHCI_VFRAMELIST_COUNT;
2680 1.48 augustss end = upipe->u.iso.stds[i];
2681 1.48 augustss
2682 1.96 augustss #ifdef DIAGNOSTIC
2683 1.96 augustss if (end == NULL) {
2684 1.96 augustss printf("uhci_device_isoc_start: end == NULL\n");
2685 1.96 augustss return (USBD_INVAL);
2686 1.96 augustss }
2687 1.96 augustss #endif
2688 1.96 augustss
2689 1.48 augustss s = splusb();
2690 1.152 augustss
2691 1.48 augustss /* Set up interrupt info. */
2692 1.63 augustss ii->xfer = xfer;
2693 1.48 augustss ii->stdstart = end;
2694 1.48 augustss ii->stdend = end;
2695 1.48 augustss #ifdef DIAGNOSTIC
2696 1.102 augustss if (!ii->isdone)
2697 1.70 augustss printf("uhci_device_isoc_start: not done, ii=%p\n", ii);
2698 1.48 augustss ii->isdone = 0;
2699 1.48 augustss #endif
2700 1.92 augustss uhci_add_intr_info(sc, ii);
2701 1.152 augustss
2702 1.48 augustss splx(s);
2703 1.48 augustss
2704 1.48 augustss return (USBD_IN_PROGRESS);
2705 1.16 augustss }
2706 1.16 augustss
2707 1.16 augustss void
2708 1.119 augustss uhci_device_isoc_abort(usbd_xfer_handle xfer)
2709 1.16 augustss {
2710 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2711 1.48 augustss uhci_soft_td_t **stds = upipe->u.iso.stds;
2712 1.48 augustss uhci_soft_td_t *std;
2713 1.92 augustss int i, n, s, nframes, maxlen, len;
2714 1.92 augustss
2715 1.92 augustss s = splusb();
2716 1.92 augustss
2717 1.92 augustss /* Transfer is already done. */
2718 1.152 augustss if (xfer->status != USBD_NOT_STARTED &&
2719 1.92 augustss xfer->status != USBD_IN_PROGRESS) {
2720 1.92 augustss splx(s);
2721 1.92 augustss return;
2722 1.92 augustss }
2723 1.48 augustss
2724 1.92 augustss /* Give xfer the requested abort code. */
2725 1.63 augustss xfer->status = USBD_CANCELLED;
2726 1.48 augustss
2727 1.48 augustss /* make hardware ignore it, */
2728 1.63 augustss nframes = xfer->nframes;
2729 1.92 augustss n = UXFER(xfer)->curframe;
2730 1.92 augustss maxlen = 0;
2731 1.48 augustss for (i = 0; i < nframes; i++) {
2732 1.48 augustss std = stds[n];
2733 1.223 bouyer usb_syncmem(&std->dma,
2734 1.223 bouyer std->offs + offsetof(uhci_td_t, td_status),
2735 1.223 bouyer sizeof(std->td.td_status),
2736 1.223 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2737 1.88 tsutsui std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
2738 1.223 bouyer usb_syncmem(&std->dma,
2739 1.223 bouyer std->offs + offsetof(uhci_td_t, td_status),
2740 1.223 bouyer sizeof(std->td.td_status),
2741 1.223 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2742 1.223 bouyer usb_syncmem(&std->dma,
2743 1.223 bouyer std->offs + offsetof(uhci_td_t, td_token),
2744 1.223 bouyer sizeof(std->td.td_token),
2745 1.223 bouyer BUS_DMASYNC_POSTWRITE);
2746 1.130 tsutsui len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token));
2747 1.92 augustss if (len > maxlen)
2748 1.92 augustss maxlen = len;
2749 1.48 augustss if (++n >= UHCI_VFRAMELIST_COUNT)
2750 1.48 augustss n = 0;
2751 1.48 augustss }
2752 1.48 augustss
2753 1.92 augustss /* and wait until we are sure the hardware has finished. */
2754 1.92 augustss delay(maxlen);
2755 1.92 augustss
2756 1.96 augustss #ifdef DIAGNOSTIC
2757 1.96 augustss UXFER(xfer)->iinfo.isdone = 1;
2758 1.96 augustss #endif
2759 1.92 augustss /* Run callback and remove from interrupt list. */
2760 1.92 augustss usb_transfer_complete(xfer);
2761 1.48 augustss
2762 1.92 augustss splx(s);
2763 1.16 augustss }
2764 1.16 augustss
2765 1.16 augustss void
2766 1.119 augustss uhci_device_isoc_close(usbd_pipe_handle pipe)
2767 1.16 augustss {
2768 1.16 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2769 1.16 augustss usbd_device_handle dev = upipe->pipe.device;
2770 1.216 drochner uhci_softc_t *sc = dev->bus->hci_private;
2771 1.48 augustss uhci_soft_td_t *std, *vstd;
2772 1.16 augustss struct iso *iso;
2773 1.92 augustss int i, s;
2774 1.16 augustss
2775 1.16 augustss /*
2776 1.16 augustss * Make sure all TDs are marked as inactive.
2777 1.16 augustss * Wait for completion.
2778 1.16 augustss * Unschedule.
2779 1.16 augustss * Deallocate.
2780 1.16 augustss */
2781 1.16 augustss iso = &upipe->u.iso;
2782 1.16 augustss
2783 1.223 bouyer for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2784 1.223 bouyer std = iso->stds[i];
2785 1.223 bouyer usb_syncmem(&std->dma,
2786 1.223 bouyer std->offs + offsetof(uhci_td_t, td_status),
2787 1.223 bouyer sizeof(std->td.td_status),
2788 1.223 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2789 1.223 bouyer std->td.td_status &= htole32(~UHCI_TD_ACTIVE);
2790 1.223 bouyer usb_syncmem(&std->dma,
2791 1.223 bouyer std->offs + offsetof(uhci_td_t, td_status),
2792 1.223 bouyer sizeof(std->td.td_status),
2793 1.223 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2794 1.223 bouyer }
2795 1.20 augustss usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */
2796 1.16 augustss
2797 1.92 augustss s = splusb();
2798 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2799 1.16 augustss std = iso->stds[i];
2800 1.48 augustss for (vstd = sc->sc_vframes[i].htd;
2801 1.67 augustss vstd != NULL && vstd->link.std != std;
2802 1.42 augustss vstd = vstd->link.std)
2803 1.16 augustss ;
2804 1.67 augustss if (vstd == NULL) {
2805 1.16 augustss /*panic*/
2806 1.16 augustss printf("uhci_device_isoc_close: %p not found\n", std);
2807 1.92 augustss splx(s);
2808 1.16 augustss return;
2809 1.16 augustss }
2810 1.42 augustss vstd->link = std->link;
2811 1.223 bouyer usb_syncmem(&std->dma,
2812 1.223 bouyer std->offs + offsetof(uhci_td_t, td_link),
2813 1.223 bouyer sizeof(std->td.td_link),
2814 1.223 bouyer BUS_DMASYNC_POSTWRITE);
2815 1.42 augustss vstd->td.td_link = std->td.td_link;
2816 1.223 bouyer usb_syncmem(&vstd->dma,
2817 1.223 bouyer vstd->offs + offsetof(uhci_td_t, td_link),
2818 1.223 bouyer sizeof(vstd->td.td_link),
2819 1.223 bouyer BUS_DMASYNC_PREWRITE);
2820 1.16 augustss uhci_free_std(sc, std);
2821 1.16 augustss }
2822 1.92 augustss splx(s);
2823 1.16 augustss
2824 1.31 augustss free(iso->stds, M_USBHC);
2825 1.16 augustss }
2826 1.16 augustss
2827 1.16 augustss usbd_status
2828 1.119 augustss uhci_setup_isoc(usbd_pipe_handle pipe)
2829 1.16 augustss {
2830 1.16 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2831 1.16 augustss usbd_device_handle dev = upipe->pipe.device;
2832 1.216 drochner uhci_softc_t *sc = dev->bus->hci_private;
2833 1.16 augustss int addr = upipe->pipe.device->address;
2834 1.16 augustss int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2835 1.45 augustss int rd = UE_GET_DIR(endpt) == UE_DIR_IN;
2836 1.48 augustss uhci_soft_td_t *std, *vstd;
2837 1.48 augustss u_int32_t token;
2838 1.16 augustss struct iso *iso;
2839 1.92 augustss int i, s;
2840 1.16 augustss
2841 1.16 augustss iso = &upipe->u.iso;
2842 1.16 augustss iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *),
2843 1.31 augustss M_USBHC, M_WAITOK);
2844 1.16 augustss
2845 1.88 tsutsui token = rd ? UHCI_TD_IN (0, endpt, addr, 0) :
2846 1.88 tsutsui UHCI_TD_OUT(0, endpt, addr, 0);
2847 1.16 augustss
2848 1.48 augustss /* Allocate the TDs and mark as inactive; */
2849 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2850 1.48 augustss std = uhci_alloc_std(sc);
2851 1.48 augustss if (std == 0)
2852 1.48 augustss goto bad;
2853 1.88 tsutsui std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
2854 1.88 tsutsui std->td.td_token = htole32(token);
2855 1.223 bouyer usb_syncmem(&std->dma, std->offs, sizeof(std->td),
2856 1.223 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2857 1.48 augustss iso->stds[i] = std;
2858 1.16 augustss }
2859 1.16 augustss
2860 1.48 augustss /* Insert TDs into schedule. */
2861 1.92 augustss s = splusb();
2862 1.16 augustss for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2863 1.16 augustss std = iso->stds[i];
2864 1.48 augustss vstd = sc->sc_vframes[i].htd;
2865 1.223 bouyer usb_syncmem(&vstd->dma,
2866 1.223 bouyer vstd->offs + offsetof(uhci_td_t, td_link),
2867 1.223 bouyer sizeof(vstd->td.td_link),
2868 1.223 bouyer BUS_DMASYNC_POSTWRITE);
2869 1.42 augustss std->link = vstd->link;
2870 1.42 augustss std->td.td_link = vstd->td.td_link;
2871 1.223 bouyer usb_syncmem(&std->dma,
2872 1.223 bouyer std->offs + offsetof(uhci_td_t, td_link),
2873 1.223 bouyer sizeof(std->td.td_link),
2874 1.223 bouyer BUS_DMASYNC_PREWRITE);
2875 1.42 augustss vstd->link.std = std;
2876 1.121 augustss vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD);
2877 1.223 bouyer usb_syncmem(&vstd->dma,
2878 1.223 bouyer vstd->offs + offsetof(uhci_td_t, td_link),
2879 1.223 bouyer sizeof(vstd->td.td_link),
2880 1.223 bouyer BUS_DMASYNC_PREWRITE);
2881 1.16 augustss }
2882 1.92 augustss splx(s);
2883 1.16 augustss
2884 1.48 augustss iso->next = -1;
2885 1.48 augustss iso->inuse = 0;
2886 1.48 augustss
2887 1.16 augustss return (USBD_NORMAL_COMPLETION);
2888 1.16 augustss
2889 1.48 augustss bad:
2890 1.16 augustss while (--i >= 0)
2891 1.16 augustss uhci_free_std(sc, iso->stds[i]);
2892 1.31 augustss free(iso->stds, M_USBHC);
2893 1.16 augustss return (USBD_NOMEM);
2894 1.16 augustss }
2895 1.16 augustss
2896 1.16 augustss void
2897 1.119 augustss uhci_device_isoc_done(usbd_xfer_handle xfer)
2898 1.16 augustss {
2899 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2900 1.223 bouyer struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2901 1.223 bouyer int i, offs;
2902 1.223 bouyer int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN;
2903 1.223 bouyer
2904 1.48 augustss
2905 1.197 gdamore DPRINTFN(4, ("uhci_isoc_done: length=%d, busy_free=0x%08x\n",
2906 1.197 gdamore xfer->actlen, xfer->busy_free));
2907 1.93 augustss
2908 1.96 augustss if (ii->xfer != xfer)
2909 1.96 augustss /* Not on interrupt list, ignore it. */
2910 1.170 augustss return;
2911 1.170 augustss
2912 1.170 augustss if (!uhci_active_intr_info(ii))
2913 1.96 augustss return;
2914 1.96 augustss
2915 1.93 augustss #ifdef DIAGNOSTIC
2916 1.93 augustss if (ii->stdend == NULL) {
2917 1.93 augustss printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
2918 1.93 augustss #ifdef UHCI_DEBUG
2919 1.93 augustss uhci_dump_ii(ii);
2920 1.93 augustss #endif
2921 1.93 augustss return;
2922 1.93 augustss }
2923 1.93 augustss #endif
2924 1.48 augustss
2925 1.48 augustss /* Turn off the interrupt since it is active even if the TD is not. */
2926 1.223 bouyer usb_syncmem(&ii->stdend->dma,
2927 1.223 bouyer ii->stdend->offs + offsetof(uhci_td_t, td_status),
2928 1.223 bouyer sizeof(ii->stdend->td.td_status),
2929 1.223 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2930 1.88 tsutsui ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC);
2931 1.223 bouyer usb_syncmem(&ii->stdend->dma,
2932 1.223 bouyer ii->stdend->offs + offsetof(uhci_td_t, td_status),
2933 1.223 bouyer sizeof(ii->stdend->td.td_status),
2934 1.223 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2935 1.48 augustss
2936 1.92 augustss uhci_del_intr_info(ii); /* remove from active list */
2937 1.223 bouyer
2938 1.223 bouyer offs = 0;
2939 1.223 bouyer for (i = 0; i < xfer->nframes; i++) {
2940 1.223 bouyer usb_syncmem(&xfer->dmabuf, offs, xfer->frlengths[i],
2941 1.223 bouyer rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
2942 1.223 bouyer offs += xfer->frlengths[i];
2943 1.223 bouyer }
2944 1.16 augustss }
2945 1.16 augustss
2946 1.1 augustss void
2947 1.119 augustss uhci_device_intr_done(usbd_xfer_handle xfer)
2948 1.1 augustss {
2949 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2950 1.1 augustss uhci_softc_t *sc = ii->sc;
2951 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2952 1.1 augustss uhci_soft_qh_t *sqh;
2953 1.223 bouyer int i, npoll, isread;
2954 1.1 augustss
2955 1.173 gson DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen));
2956 1.1 augustss
2957 1.1 augustss npoll = upipe->u.intr.npoll;
2958 1.1 augustss for(i = 0; i < npoll; i++) {
2959 1.1 augustss sqh = upipe->u.intr.qhs[i];
2960 1.121 augustss sqh->elink = NULL;
2961 1.88 tsutsui sqh->qh.qh_elink = htole32(UHCI_PTR_T);
2962 1.223 bouyer usb_syncmem(&sqh->dma,
2963 1.223 bouyer sqh->offs + offsetof(uhci_qh_t, qh_elink),
2964 1.223 bouyer sizeof(sqh->qh.qh_elink),
2965 1.223 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2966 1.1 augustss }
2967 1.149 augustss uhci_free_std_chain(sc, ii->stdstart, NULL);
2968 1.1 augustss
2969 1.223 bouyer isread = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN;
2970 1.223 bouyer usb_syncmem(&xfer->dmabuf, 0, xfer->length,
2971 1.223 bouyer isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
2972 1.223 bouyer
2973 1.1 augustss /* XXX Wasteful. */
2974 1.63 augustss if (xfer->pipe->repeat) {
2975 1.55 augustss uhci_soft_td_t *data, *dataend;
2976 1.1 augustss
2977 1.92 augustss DPRINTFN(5,("uhci_device_intr_done: requeing\n"));
2978 1.92 augustss
2979 1.1 augustss /* This alloc cannot fail since we freed the chain above. */
2980 1.221 jmcneill uhci_alloc_std_chain(upipe, sc, xfer->length,
2981 1.221 jmcneill upipe->u.intr.isread, xfer->flags,
2982 1.63 augustss &xfer->dmabuf, &data, &dataend);
2983 1.88 tsutsui dataend->td.td_status |= htole32(UHCI_TD_IOC);
2984 1.223 bouyer usb_syncmem(&dataend->dma,
2985 1.223 bouyer dataend->offs + offsetof(uhci_td_t, td_status),
2986 1.223 bouyer sizeof(dataend->td.td_status),
2987 1.223 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2988 1.1 augustss
2989 1.59 augustss #ifdef UHCI_DEBUG
2990 1.1 augustss if (uhcidebug > 10) {
2991 1.55 augustss DPRINTF(("uhci_device_intr_done: data(1)\n"));
2992 1.55 augustss uhci_dump_tds(data);
2993 1.1 augustss uhci_dump_qh(upipe->u.intr.qhs[0]);
2994 1.1 augustss }
2995 1.1 augustss #endif
2996 1.1 augustss
2997 1.55 augustss ii->stdstart = data;
2998 1.55 augustss ii->stdend = dataend;
2999 1.7 augustss #ifdef DIAGNOSTIC
3000 1.70 augustss if (!ii->isdone) {
3001 1.70 augustss printf("uhci_device_intr_done: not done, ii=%p\n", ii);
3002 1.70 augustss }
3003 1.7 augustss ii->isdone = 0;
3004 1.7 augustss #endif
3005 1.1 augustss for (i = 0; i < npoll; i++) {
3006 1.1 augustss sqh = upipe->u.intr.qhs[i];
3007 1.55 augustss sqh->elink = data;
3008 1.121 augustss sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
3009 1.223 bouyer usb_syncmem(&sqh->dma,
3010 1.223 bouyer sqh->offs + offsetof(uhci_qh_t, qh_elink),
3011 1.223 bouyer sizeof(sqh->qh.qh_elink),
3012 1.223 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3013 1.1 augustss }
3014 1.92 augustss xfer->status = USBD_IN_PROGRESS;
3015 1.92 augustss /* The ii is already on the examined list, just leave it. */
3016 1.1 augustss } else {
3017 1.92 augustss DPRINTFN(5,("uhci_device_intr_done: removing\n"));
3018 1.169 augustss if (uhci_active_intr_info(ii))
3019 1.169 augustss uhci_del_intr_info(ii);
3020 1.1 augustss }
3021 1.1 augustss }
3022 1.1 augustss
3023 1.1 augustss /* Deallocate request data structures */
3024 1.1 augustss void
3025 1.119 augustss uhci_device_ctrl_done(usbd_xfer_handle xfer)
3026 1.1 augustss {
3027 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
3028 1.1 augustss uhci_softc_t *sc = ii->sc;
3029 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
3030 1.223 bouyer int len = UGETW(xfer->request.wLength);
3031 1.223 bouyer int isread = (xfer->request.bmRequestType & UT_READ);
3032 1.1 augustss
3033 1.7 augustss #ifdef DIAGNOSTIC
3034 1.63 augustss if (!(xfer->rqflags & URQ_REQUEST))
3035 1.173 gson panic("uhci_device_ctrl_done: not a request");
3036 1.7 augustss #endif
3037 1.1 augustss
3038 1.169 augustss if (!uhci_active_intr_info(ii))
3039 1.169 augustss return;
3040 1.169 augustss
3041 1.92 augustss uhci_del_intr_info(ii); /* remove from active list */
3042 1.1 augustss
3043 1.144 augustss if (upipe->pipe.device->speed == USB_SPEED_LOW)
3044 1.123 augustss uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh);
3045 1.123 augustss else
3046 1.123 augustss uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh);
3047 1.1 augustss
3048 1.49 augustss if (upipe->u.ctl.length != 0)
3049 1.42 augustss uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend);
3050 1.49 augustss
3051 1.223 bouyer if (len) {
3052 1.223 bouyer usb_syncmem(&xfer->dmabuf, 0, len,
3053 1.223 bouyer isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
3054 1.223 bouyer }
3055 1.223 bouyer usb_syncmem(&upipe->u.ctl.reqdma, 0,
3056 1.223 bouyer sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE);
3057 1.223 bouyer
3058 1.173 gson DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen));
3059 1.1 augustss }
3060 1.1 augustss
3061 1.1 augustss /* Deallocate request data structures */
3062 1.1 augustss void
3063 1.119 augustss uhci_device_bulk_done(usbd_xfer_handle xfer)
3064 1.1 augustss {
3065 1.92 augustss uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
3066 1.1 augustss uhci_softc_t *sc = ii->sc;
3067 1.63 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
3068 1.169 augustss
3069 1.173 gson DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n",
3070 1.169 augustss xfer, ii, sc, upipe));
3071 1.169 augustss
3072 1.169 augustss if (!uhci_active_intr_info(ii))
3073 1.169 augustss return;
3074 1.1 augustss
3075 1.92 augustss uhci_del_intr_info(ii); /* remove from active list */
3076 1.1 augustss
3077 1.1 augustss uhci_remove_bulk(sc, upipe->u.bulk.sqh);
3078 1.32 augustss
3079 1.149 augustss uhci_free_std_chain(sc, ii->stdstart, NULL);
3080 1.32 augustss
3081 1.173 gson DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen));
3082 1.1 augustss }
3083 1.1 augustss
3084 1.1 augustss /* Add interrupt QH, called with vflock. */
3085 1.1 augustss void
3086 1.119 augustss uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
3087 1.1 augustss {
3088 1.92 augustss struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
3089 1.42 augustss uhci_soft_qh_t *eqh;
3090 1.1 augustss
3091 1.92 augustss DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh));
3092 1.92 augustss
3093 1.42 augustss eqh = vf->eqh;
3094 1.223 bouyer usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
3095 1.223 bouyer sizeof(eqh->qh.qh_hlink),
3096 1.223 bouyer BUS_DMASYNC_POSTWRITE);
3097 1.42 augustss sqh->hlink = eqh->hlink;
3098 1.42 augustss sqh->qh.qh_hlink = eqh->qh.qh_hlink;
3099 1.223 bouyer usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
3100 1.223 bouyer sizeof(sqh->qh.qh_hlink),
3101 1.223 bouyer BUS_DMASYNC_PREWRITE);
3102 1.42 augustss eqh->hlink = sqh;
3103 1.121 augustss eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
3104 1.223 bouyer usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
3105 1.223 bouyer sizeof(eqh->qh.qh_hlink),
3106 1.223 bouyer BUS_DMASYNC_PREWRITE);
3107 1.1 augustss vf->eqh = sqh;
3108 1.1 augustss vf->bandwidth++;
3109 1.1 augustss }
3110 1.1 augustss
3111 1.119 augustss /* Remove interrupt QH. */
3112 1.1 augustss void
3113 1.119 augustss uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
3114 1.1 augustss {
3115 1.92 augustss struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
3116 1.1 augustss uhci_soft_qh_t *pqh;
3117 1.1 augustss
3118 1.92 augustss DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh));
3119 1.1 augustss
3120 1.124 augustss /* See comment in uhci_remove_ctrl() */
3121 1.223 bouyer
3122 1.223 bouyer usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
3123 1.223 bouyer sizeof(sqh->qh.qh_elink),
3124 1.223 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3125 1.124 augustss if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
3126 1.124 augustss sqh->qh.qh_elink = htole32(UHCI_PTR_T);
3127 1.223 bouyer usb_syncmem(&sqh->dma,
3128 1.223 bouyer sqh->offs + offsetof(uhci_qh_t, qh_elink),
3129 1.223 bouyer sizeof(sqh->qh.qh_elink),
3130 1.223 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3131 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
3132 1.124 augustss }
3133 1.124 augustss
3134 1.92 augustss pqh = uhci_find_prev_qh(vf->hqh, sqh);
3135 1.223 bouyer usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
3136 1.223 bouyer sizeof(sqh->qh.qh_hlink),
3137 1.223 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3138 1.42 augustss pqh->hlink = sqh->hlink;
3139 1.42 augustss pqh->qh.qh_hlink = sqh->qh.qh_hlink;
3140 1.223 bouyer usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
3141 1.223 bouyer sizeof(pqh->qh.qh_hlink),
3142 1.223 bouyer BUS_DMASYNC_PREWRITE);
3143 1.124 augustss delay(UHCI_QH_REMOVE_DELAY);
3144 1.1 augustss if (vf->eqh == sqh)
3145 1.1 augustss vf->eqh = pqh;
3146 1.1 augustss vf->bandwidth--;
3147 1.1 augustss }
3148 1.1 augustss
3149 1.1 augustss usbd_status
3150 1.119 augustss uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival)
3151 1.1 augustss {
3152 1.1 augustss uhci_soft_qh_t *sqh;
3153 1.1 augustss int i, npoll, s;
3154 1.1 augustss u_int bestbw, bw, bestoffs, offs;
3155 1.1 augustss
3156 1.173 gson DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe));
3157 1.1 augustss if (ival == 0) {
3158 1.173 gson printf("uhci_device_setintr: 0 interval\n");
3159 1.1 augustss return (USBD_INVAL);
3160 1.1 augustss }
3161 1.1 augustss
3162 1.1 augustss if (ival > UHCI_VFRAMELIST_COUNT)
3163 1.1 augustss ival = UHCI_VFRAMELIST_COUNT;
3164 1.1 augustss npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
3165 1.173 gson DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll));
3166 1.1 augustss
3167 1.1 augustss upipe->u.intr.npoll = npoll;
3168 1.152 augustss upipe->u.intr.qhs =
3169 1.31 augustss malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK);
3170 1.1 augustss
3171 1.152 augustss /*
3172 1.1 augustss * Figure out which offset in the schedule that has most
3173 1.1 augustss * bandwidth left over.
3174 1.1 augustss */
3175 1.1 augustss #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
3176 1.1 augustss for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
3177 1.1 augustss for (bw = i = 0; i < npoll; i++)
3178 1.1 augustss bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
3179 1.1 augustss if (bw < bestbw) {
3180 1.1 augustss bestbw = bw;
3181 1.1 augustss bestoffs = offs;
3182 1.1 augustss }
3183 1.1 augustss }
3184 1.173 gson DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
3185 1.1 augustss
3186 1.1 augustss for(i = 0; i < npoll; i++) {
3187 1.1 augustss upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
3188 1.121 augustss sqh->elink = NULL;
3189 1.88 tsutsui sqh->qh.qh_elink = htole32(UHCI_PTR_T);
3190 1.223 bouyer usb_syncmem(&sqh->dma,
3191 1.223 bouyer sqh->offs + offsetof(uhci_qh_t, qh_elink),
3192 1.223 bouyer sizeof(sqh->qh.qh_elink),
3193 1.223 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3194 1.1 augustss sqh->pos = MOD(i * ival + bestoffs);
3195 1.1 augustss }
3196 1.1 augustss #undef MOD
3197 1.1 augustss
3198 1.1 augustss s = splusb();
3199 1.1 augustss /* Enter QHs into the controller data structures. */
3200 1.1 augustss for(i = 0; i < npoll; i++)
3201 1.92 augustss uhci_add_intr(sc, upipe->u.intr.qhs[i]);
3202 1.92 augustss splx(s);
3203 1.1 augustss
3204 1.173 gson DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe));
3205 1.1 augustss return (USBD_NORMAL_COMPLETION);
3206 1.1 augustss }
3207 1.1 augustss
3208 1.1 augustss /* Open a new pipe. */
3209 1.1 augustss usbd_status
3210 1.119 augustss uhci_open(usbd_pipe_handle pipe)
3211 1.1 augustss {
3212 1.216 drochner uhci_softc_t *sc = pipe->device->bus->hci_private;
3213 1.1 augustss struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
3214 1.1 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
3215 1.63 augustss usbd_status err;
3216 1.79 augustss int ival;
3217 1.1 augustss
3218 1.1 augustss DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
3219 1.152 augustss pipe, pipe->device->address,
3220 1.1 augustss ed->bEndpointAddress, sc->sc_addr));
3221 1.92 augustss
3222 1.92 augustss upipe->aborting = 0;
3223 1.92 augustss upipe->nexttoggle = 0;
3224 1.92 augustss
3225 1.1 augustss if (pipe->device->address == sc->sc_addr) {
3226 1.1 augustss switch (ed->bEndpointAddress) {
3227 1.1 augustss case USB_CONTROL_ENDPOINT:
3228 1.1 augustss pipe->methods = &uhci_root_ctrl_methods;
3229 1.1 augustss break;
3230 1.45 augustss case UE_DIR_IN | UHCI_INTR_ENDPT:
3231 1.1 augustss pipe->methods = &uhci_root_intr_methods;
3232 1.1 augustss break;
3233 1.1 augustss default:
3234 1.1 augustss return (USBD_INVAL);
3235 1.1 augustss }
3236 1.1 augustss } else {
3237 1.1 augustss switch (ed->bmAttributes & UE_XFERTYPE) {
3238 1.1 augustss case UE_CONTROL:
3239 1.1 augustss pipe->methods = &uhci_device_ctrl_methods;
3240 1.1 augustss upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
3241 1.63 augustss if (upipe->u.ctl.sqh == NULL)
3242 1.5 augustss goto bad;
3243 1.1 augustss upipe->u.ctl.setup = uhci_alloc_std(sc);
3244 1.63 augustss if (upipe->u.ctl.setup == NULL) {
3245 1.5 augustss uhci_free_sqh(sc, upipe->u.ctl.sqh);
3246 1.5 augustss goto bad;
3247 1.5 augustss }
3248 1.1 augustss upipe->u.ctl.stat = uhci_alloc_std(sc);
3249 1.63 augustss if (upipe->u.ctl.stat == NULL) {
3250 1.5 augustss uhci_free_sqh(sc, upipe->u.ctl.sqh);
3251 1.5 augustss uhci_free_std(sc, upipe->u.ctl.setup);
3252 1.5 augustss goto bad;
3253 1.5 augustss }
3254 1.152 augustss err = usb_allocmem(&sc->sc_bus,
3255 1.152 augustss sizeof(usb_device_request_t),
3256 1.63 augustss 0, &upipe->u.ctl.reqdma);
3257 1.63 augustss if (err) {
3258 1.5 augustss uhci_free_sqh(sc, upipe->u.ctl.sqh);
3259 1.5 augustss uhci_free_std(sc, upipe->u.ctl.setup);
3260 1.5 augustss uhci_free_std(sc, upipe->u.ctl.stat);
3261 1.5 augustss goto bad;
3262 1.5 augustss }
3263 1.1 augustss break;
3264 1.1 augustss case UE_INTERRUPT:
3265 1.1 augustss pipe->methods = &uhci_device_intr_methods;
3266 1.79 augustss ival = pipe->interval;
3267 1.79 augustss if (ival == USBD_DEFAULT_INTERVAL)
3268 1.79 augustss ival = ed->bInterval;
3269 1.80 augustss return (uhci_device_setintr(sc, upipe, ival));
3270 1.1 augustss case UE_ISOCHRONOUS:
3271 1.16 augustss pipe->methods = &uhci_device_isoc_methods;
3272 1.48 augustss return (uhci_setup_isoc(pipe));
3273 1.1 augustss case UE_BULK:
3274 1.1 augustss pipe->methods = &uhci_device_bulk_methods;
3275 1.1 augustss upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
3276 1.63 augustss if (upipe->u.bulk.sqh == NULL)
3277 1.5 augustss goto bad;
3278 1.1 augustss break;
3279 1.1 augustss }
3280 1.1 augustss }
3281 1.1 augustss return (USBD_NORMAL_COMPLETION);
3282 1.5 augustss
3283 1.5 augustss bad:
3284 1.5 augustss return (USBD_NOMEM);
3285 1.1 augustss }
3286 1.1 augustss
3287 1.1 augustss /*
3288 1.1 augustss * Data structures and routines to emulate the root hub.
3289 1.1 augustss */
3290 1.1 augustss usb_device_descriptor_t uhci_devd = {
3291 1.1 augustss USB_DEVICE_DESCRIPTOR_SIZE,
3292 1.1 augustss UDESC_DEVICE, /* type */
3293 1.1 augustss {0x00, 0x01}, /* USB version */
3294 1.87 augustss UDCLASS_HUB, /* class */
3295 1.87 augustss UDSUBCLASS_HUB, /* subclass */
3296 1.144 augustss UDPROTO_FSHUB, /* protocol */
3297 1.1 augustss 64, /* max packet */
3298 1.1 augustss {0},{0},{0x00,0x01}, /* device id */
3299 1.1 augustss 1,2,0, /* string indicies */
3300 1.1 augustss 1 /* # of configurations */
3301 1.1 augustss };
3302 1.1 augustss
3303 1.208 drochner const usb_config_descriptor_t uhci_confd = {
3304 1.1 augustss USB_CONFIG_DESCRIPTOR_SIZE,
3305 1.1 augustss UDESC_CONFIG,
3306 1.1 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
3307 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
3308 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
3309 1.1 augustss 1,
3310 1.1 augustss 1,
3311 1.1 augustss 0,
3312 1.206 drochner UC_ATTR_MBO | UC_SELF_POWERED,
3313 1.1 augustss 0 /* max power */
3314 1.1 augustss };
3315 1.1 augustss
3316 1.208 drochner const usb_interface_descriptor_t uhci_ifcd = {
3317 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
3318 1.1 augustss UDESC_INTERFACE,
3319 1.1 augustss 0,
3320 1.1 augustss 0,
3321 1.1 augustss 1,
3322 1.87 augustss UICLASS_HUB,
3323 1.87 augustss UISUBCLASS_HUB,
3324 1.144 augustss UIPROTO_FSHUB,
3325 1.1 augustss 0
3326 1.1 augustss };
3327 1.1 augustss
3328 1.208 drochner const usb_endpoint_descriptor_t uhci_endpd = {
3329 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
3330 1.1 augustss UDESC_ENDPOINT,
3331 1.45 augustss UE_DIR_IN | UHCI_INTR_ENDPT,
3332 1.1 augustss UE_INTERRUPT,
3333 1.1 augustss {8},
3334 1.1 augustss 255
3335 1.1 augustss };
3336 1.1 augustss
3337 1.208 drochner const usb_hub_descriptor_t uhci_hubd_piix = {
3338 1.1 augustss USB_HUB_DESCRIPTOR_SIZE,
3339 1.1 augustss UDESC_HUB,
3340 1.1 augustss 2,
3341 1.1 augustss { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
3342 1.1 augustss 50, /* power on to power good */
3343 1.1 augustss 0,
3344 1.1 augustss { 0x00 }, /* both ports are removable */
3345 1.199 christos { 0 },
3346 1.1 augustss };
3347 1.1 augustss
3348 1.1 augustss /*
3349 1.166 dsainty * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also
3350 1.166 dsainty * enables the port, and also states that SET_FEATURE(PORT_ENABLE)
3351 1.166 dsainty * should not be used by the USB subsystem. As we cannot issue a
3352 1.166 dsainty * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port
3353 1.166 dsainty * will be enabled as part of the reset.
3354 1.166 dsainty *
3355 1.166 dsainty * On the VT83C572, the port cannot be successfully enabled until the
3356 1.166 dsainty * outstanding "port enable change" and "connection status change"
3357 1.166 dsainty * events have been reset.
3358 1.166 dsainty */
3359 1.166 dsainty Static usbd_status
3360 1.166 dsainty uhci_portreset(uhci_softc_t *sc, int index)
3361 1.166 dsainty {
3362 1.166 dsainty int lim, port, x;
3363 1.166 dsainty
3364 1.166 dsainty if (index == 1)
3365 1.166 dsainty port = UHCI_PORTSC1;
3366 1.166 dsainty else if (index == 2)
3367 1.166 dsainty port = UHCI_PORTSC2;
3368 1.166 dsainty else
3369 1.166 dsainty return (USBD_IOERROR);
3370 1.166 dsainty
3371 1.166 dsainty x = URWMASK(UREAD2(sc, port));
3372 1.166 dsainty UWRITE2(sc, port, x | UHCI_PORTSC_PR);
3373 1.166 dsainty
3374 1.166 dsainty usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
3375 1.166 dsainty
3376 1.166 dsainty DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n",
3377 1.166 dsainty index, UREAD2(sc, port)));
3378 1.166 dsainty
3379 1.166 dsainty x = URWMASK(UREAD2(sc, port));
3380 1.222 drochner UWRITE2(sc, port, x & ~(UHCI_PORTSC_PR | UHCI_PORTSC_SUSP));
3381 1.166 dsainty
3382 1.166 dsainty delay(100);
3383 1.166 dsainty
3384 1.166 dsainty DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n",
3385 1.166 dsainty index, UREAD2(sc, port)));
3386 1.166 dsainty
3387 1.166 dsainty x = URWMASK(UREAD2(sc, port));
3388 1.166 dsainty UWRITE2(sc, port, x | UHCI_PORTSC_PE);
3389 1.166 dsainty
3390 1.166 dsainty for (lim = 10; --lim > 0;) {
3391 1.166 dsainty usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY);
3392 1.166 dsainty
3393 1.166 dsainty x = UREAD2(sc, port);
3394 1.166 dsainty
3395 1.166 dsainty DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n",
3396 1.166 dsainty index, lim, x));
3397 1.166 dsainty
3398 1.166 dsainty if (!(x & UHCI_PORTSC_CCS)) {
3399 1.166 dsainty /*
3400 1.166 dsainty * No device is connected (or was disconnected
3401 1.166 dsainty * during reset). Consider the port reset.
3402 1.166 dsainty * The delay must be long enough to ensure on
3403 1.166 dsainty * the initial iteration that the device
3404 1.166 dsainty * connection will have been registered. 50ms
3405 1.166 dsainty * appears to be sufficient, but 20ms is not.
3406 1.166 dsainty */
3407 1.166 dsainty DPRINTFN(3,("uhci port %d loop %u, device detached\n",
3408 1.166 dsainty index, lim));
3409 1.166 dsainty break;
3410 1.166 dsainty }
3411 1.166 dsainty
3412 1.166 dsainty if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) {
3413 1.166 dsainty /*
3414 1.166 dsainty * Port enabled changed and/or connection
3415 1.166 dsainty * status changed were set. Reset either or
3416 1.166 dsainty * both raised flags (by writing a 1 to that
3417 1.166 dsainty * bit), and wait again for state to settle.
3418 1.166 dsainty */
3419 1.166 dsainty UWRITE2(sc, port, URWMASK(x) |
3420 1.166 dsainty (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)));
3421 1.166 dsainty continue;
3422 1.166 dsainty }
3423 1.166 dsainty
3424 1.166 dsainty if (x & UHCI_PORTSC_PE)
3425 1.166 dsainty /* Port is enabled */
3426 1.166 dsainty break;
3427 1.166 dsainty
3428 1.166 dsainty UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE);
3429 1.166 dsainty }
3430 1.166 dsainty
3431 1.166 dsainty DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n",
3432 1.166 dsainty index, UREAD2(sc, port)));
3433 1.166 dsainty
3434 1.166 dsainty if (lim <= 0) {
3435 1.166 dsainty DPRINTFN(1,("uhci port %d reset timed out\n", index));
3436 1.166 dsainty return (USBD_TIMEOUT);
3437 1.166 dsainty }
3438 1.184 perry
3439 1.166 dsainty sc->sc_isreset = 1;
3440 1.166 dsainty return (USBD_NORMAL_COMPLETION);
3441 1.166 dsainty }
3442 1.166 dsainty
3443 1.166 dsainty /*
3444 1.1 augustss * Simulate a hardware hub by handling all the necessary requests.
3445 1.1 augustss */
3446 1.1 augustss usbd_status
3447 1.119 augustss uhci_root_ctrl_transfer(usbd_xfer_handle xfer)
3448 1.1 augustss {
3449 1.63 augustss usbd_status err;
3450 1.16 augustss
3451 1.52 augustss /* Insert last in queue. */
3452 1.63 augustss err = usb_insert_transfer(xfer);
3453 1.63 augustss if (err)
3454 1.63 augustss return (err);
3455 1.52 augustss
3456 1.152 augustss /*
3457 1.94 augustss * Pipe isn't running (otherwise err would be USBD_INPROG),
3458 1.94 augustss * so start it first.
3459 1.67 augustss */
3460 1.63 augustss return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3461 1.16 augustss }
3462 1.16 augustss
3463 1.16 augustss usbd_status
3464 1.119 augustss uhci_root_ctrl_start(usbd_xfer_handle xfer)
3465 1.16 augustss {
3466 1.216 drochner uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
3467 1.1 augustss usb_device_request_t *req;
3468 1.59 augustss void *buf = NULL;
3469 1.1 augustss int port, x;
3470 1.52 augustss int s, len, value, index, status, change, l, totlen = 0;
3471 1.1 augustss usb_port_status_t ps;
3472 1.63 augustss usbd_status err;
3473 1.1 augustss
3474 1.82 augustss if (sc->sc_dying)
3475 1.82 augustss return (USBD_IOERROR);
3476 1.82 augustss
3477 1.48 augustss #ifdef DIAGNOSTIC
3478 1.63 augustss if (!(xfer->rqflags & URQ_REQUEST))
3479 1.163 provos panic("uhci_root_ctrl_transfer: not a request");
3480 1.48 augustss #endif
3481 1.63 augustss req = &xfer->request;
3482 1.1 augustss
3483 1.152 augustss DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
3484 1.1 augustss req->bmRequestType, req->bRequest));
3485 1.1 augustss
3486 1.1 augustss len = UGETW(req->wLength);
3487 1.1 augustss value = UGETW(req->wValue);
3488 1.1 augustss index = UGETW(req->wIndex);
3489 1.49 augustss
3490 1.49 augustss if (len != 0)
3491 1.159 augustss buf = KERNADDR(&xfer->dmabuf, 0);
3492 1.49 augustss
3493 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
3494 1.1 augustss switch(C(req->bRequest, req->bmRequestType)) {
3495 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
3496 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
3497 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
3498 1.152 augustss /*
3499 1.13 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
3500 1.1 augustss * for the integrated root hub.
3501 1.1 augustss */
3502 1.1 augustss break;
3503 1.1 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
3504 1.1 augustss if (len > 0) {
3505 1.1 augustss *(u_int8_t *)buf = sc->sc_conf;
3506 1.1 augustss totlen = 1;
3507 1.1 augustss }
3508 1.1 augustss break;
3509 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
3510 1.1 augustss DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
3511 1.195 christos if (len == 0)
3512 1.195 christos break;
3513 1.1 augustss switch(value >> 8) {
3514 1.1 augustss case UDESC_DEVICE:
3515 1.1 augustss if ((value & 0xff) != 0) {
3516 1.63 augustss err = USBD_IOERROR;
3517 1.1 augustss goto ret;
3518 1.1 augustss }
3519 1.1 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
3520 1.27 augustss USETW(uhci_devd.idVendor, sc->sc_id_vendor);
3521 1.1 augustss memcpy(buf, &uhci_devd, l);
3522 1.1 augustss break;
3523 1.1 augustss case UDESC_CONFIG:
3524 1.1 augustss if ((value & 0xff) != 0) {
3525 1.63 augustss err = USBD_IOERROR;
3526 1.1 augustss goto ret;
3527 1.1 augustss }
3528 1.1 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
3529 1.1 augustss memcpy(buf, &uhci_confd, l);
3530 1.1 augustss buf = (char *)buf + l;
3531 1.1 augustss len -= l;
3532 1.1 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
3533 1.1 augustss totlen += l;
3534 1.1 augustss memcpy(buf, &uhci_ifcd, l);
3535 1.1 augustss buf = (char *)buf + l;
3536 1.1 augustss len -= l;
3537 1.1 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
3538 1.1 augustss totlen += l;
3539 1.1 augustss memcpy(buf, &uhci_endpd, l);
3540 1.1 augustss break;
3541 1.1 augustss case UDESC_STRING:
3542 1.213 drochner #define sd ((usb_string_descriptor_t *)buf)
3543 1.1 augustss switch (value & 0xff) {
3544 1.182 augustss case 0: /* Language table */
3545 1.213 drochner totlen = usb_makelangtbl(sd, len);
3546 1.182 augustss break;
3547 1.1 augustss case 1: /* Vendor */
3548 1.213 drochner totlen = usb_makestrdesc(sd, len,
3549 1.213 drochner sc->sc_vendor);
3550 1.1 augustss break;
3551 1.1 augustss case 2: /* Product */
3552 1.213 drochner totlen = usb_makestrdesc(sd, len,
3553 1.213 drochner "UHCI root hub");
3554 1.1 augustss break;
3555 1.1 augustss }
3556 1.213 drochner #undef sd
3557 1.1 augustss break;
3558 1.1 augustss default:
3559 1.63 augustss err = USBD_IOERROR;
3560 1.1 augustss goto ret;
3561 1.1 augustss }
3562 1.1 augustss break;
3563 1.1 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
3564 1.1 augustss if (len > 0) {
3565 1.1 augustss *(u_int8_t *)buf = 0;
3566 1.1 augustss totlen = 1;
3567 1.1 augustss }
3568 1.1 augustss break;
3569 1.1 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
3570 1.1 augustss if (len > 1) {
3571 1.1 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
3572 1.1 augustss totlen = 2;
3573 1.1 augustss }
3574 1.1 augustss break;
3575 1.1 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
3576 1.1 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
3577 1.1 augustss if (len > 1) {
3578 1.1 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
3579 1.1 augustss totlen = 2;
3580 1.1 augustss }
3581 1.1 augustss break;
3582 1.1 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
3583 1.1 augustss if (value >= USB_MAX_DEVICES) {
3584 1.63 augustss err = USBD_IOERROR;
3585 1.1 augustss goto ret;
3586 1.1 augustss }
3587 1.1 augustss sc->sc_addr = value;
3588 1.1 augustss break;
3589 1.1 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
3590 1.1 augustss if (value != 0 && value != 1) {
3591 1.63 augustss err = USBD_IOERROR;
3592 1.1 augustss goto ret;
3593 1.1 augustss }
3594 1.1 augustss sc->sc_conf = value;
3595 1.1 augustss break;
3596 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
3597 1.1 augustss break;
3598 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
3599 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
3600 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
3601 1.63 augustss err = USBD_IOERROR;
3602 1.1 augustss goto ret;
3603 1.1 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
3604 1.1 augustss break;
3605 1.1 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
3606 1.1 augustss break;
3607 1.1 augustss /* Hub requests */
3608 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
3609 1.1 augustss break;
3610 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
3611 1.12 augustss DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
3612 1.12 augustss "port=%d feature=%d\n",
3613 1.1 augustss index, value));
3614 1.1 augustss if (index == 1)
3615 1.1 augustss port = UHCI_PORTSC1;
3616 1.1 augustss else if (index == 2)
3617 1.1 augustss port = UHCI_PORTSC2;
3618 1.1 augustss else {
3619 1.63 augustss err = USBD_IOERROR;
3620 1.1 augustss goto ret;
3621 1.1 augustss }
3622 1.1 augustss switch(value) {
3623 1.1 augustss case UHF_PORT_ENABLE:
3624 1.137 augustss x = URWMASK(UREAD2(sc, port));
3625 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
3626 1.1 augustss break;
3627 1.1 augustss case UHF_PORT_SUSPEND:
3628 1.137 augustss x = URWMASK(UREAD2(sc, port));
3629 1.222 drochner if (!(x & UHCI_PORTSC_SUSP)) /* not suspended */
3630 1.222 drochner break;
3631 1.222 drochner UWRITE2(sc, port, x | UHCI_PORTSC_RD);
3632 1.222 drochner /* see USB2 spec ch. 7.1.7.7 */
3633 1.222 drochner usb_delay_ms(&sc->sc_bus, 20);
3634 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
3635 1.222 drochner /* 10ms resume delay must be provided by caller */
3636 1.1 augustss break;
3637 1.1 augustss case UHF_PORT_RESET:
3638 1.137 augustss x = URWMASK(UREAD2(sc, port));
3639 1.1 augustss UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
3640 1.1 augustss break;
3641 1.1 augustss case UHF_C_PORT_CONNECTION:
3642 1.137 augustss x = URWMASK(UREAD2(sc, port));
3643 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
3644 1.1 augustss break;
3645 1.1 augustss case UHF_C_PORT_ENABLE:
3646 1.137 augustss x = URWMASK(UREAD2(sc, port));
3647 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
3648 1.1 augustss break;
3649 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
3650 1.137 augustss x = URWMASK(UREAD2(sc, port));
3651 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
3652 1.1 augustss break;
3653 1.1 augustss case UHF_C_PORT_RESET:
3654 1.1 augustss sc->sc_isreset = 0;
3655 1.63 augustss err = USBD_NORMAL_COMPLETION;
3656 1.1 augustss goto ret;
3657 1.1 augustss case UHF_PORT_CONNECTION:
3658 1.1 augustss case UHF_PORT_OVER_CURRENT:
3659 1.1 augustss case UHF_PORT_POWER:
3660 1.1 augustss case UHF_PORT_LOW_SPEED:
3661 1.1 augustss case UHF_C_PORT_SUSPEND:
3662 1.1 augustss default:
3663 1.63 augustss err = USBD_IOERROR;
3664 1.1 augustss goto ret;
3665 1.1 augustss }
3666 1.1 augustss break;
3667 1.1 augustss case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
3668 1.1 augustss if (index == 1)
3669 1.1 augustss port = UHCI_PORTSC1;
3670 1.1 augustss else if (index == 2)
3671 1.1 augustss port = UHCI_PORTSC2;
3672 1.1 augustss else {
3673 1.63 augustss err = USBD_IOERROR;
3674 1.1 augustss goto ret;
3675 1.1 augustss }
3676 1.1 augustss if (len > 0) {
3677 1.152 augustss *(u_int8_t *)buf =
3678 1.1 augustss (UREAD2(sc, port) & UHCI_PORTSC_LS) >>
3679 1.1 augustss UHCI_PORTSC_LS_SHIFT;
3680 1.1 augustss totlen = 1;
3681 1.1 augustss }
3682 1.1 augustss break;
3683 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
3684 1.195 christos if (len == 0)
3685 1.195 christos break;
3686 1.177 toshii if ((value & 0xff) != 0) {
3687 1.63 augustss err = USBD_IOERROR;
3688 1.1 augustss goto ret;
3689 1.1 augustss }
3690 1.1 augustss l = min(len, USB_HUB_DESCRIPTOR_SIZE);
3691 1.1 augustss totlen = l;
3692 1.1 augustss memcpy(buf, &uhci_hubd_piix, l);
3693 1.1 augustss break;
3694 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
3695 1.1 augustss if (len != 4) {
3696 1.63 augustss err = USBD_IOERROR;
3697 1.1 augustss goto ret;
3698 1.1 augustss }
3699 1.1 augustss memset(buf, 0, len);
3700 1.1 augustss totlen = len;
3701 1.1 augustss break;
3702 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
3703 1.1 augustss if (index == 1)
3704 1.1 augustss port = UHCI_PORTSC1;
3705 1.1 augustss else if (index == 2)
3706 1.1 augustss port = UHCI_PORTSC2;
3707 1.1 augustss else {
3708 1.63 augustss err = USBD_IOERROR;
3709 1.1 augustss goto ret;
3710 1.1 augustss }
3711 1.1 augustss if (len != 4) {
3712 1.63 augustss err = USBD_IOERROR;
3713 1.1 augustss goto ret;
3714 1.1 augustss }
3715 1.1 augustss x = UREAD2(sc, port);
3716 1.1 augustss status = change = 0;
3717 1.142 augustss if (x & UHCI_PORTSC_CCS)
3718 1.1 augustss status |= UPS_CURRENT_CONNECT_STATUS;
3719 1.152 augustss if (x & UHCI_PORTSC_CSC)
3720 1.1 augustss change |= UPS_C_CONNECT_STATUS;
3721 1.152 augustss if (x & UHCI_PORTSC_PE)
3722 1.1 augustss status |= UPS_PORT_ENABLED;
3723 1.152 augustss if (x & UHCI_PORTSC_POEDC)
3724 1.1 augustss change |= UPS_C_PORT_ENABLED;
3725 1.152 augustss if (x & UHCI_PORTSC_OCI)
3726 1.1 augustss status |= UPS_OVERCURRENT_INDICATOR;
3727 1.152 augustss if (x & UHCI_PORTSC_OCIC)
3728 1.1 augustss change |= UPS_C_OVERCURRENT_INDICATOR;
3729 1.152 augustss if (x & UHCI_PORTSC_SUSP)
3730 1.1 augustss status |= UPS_SUSPEND;
3731 1.152 augustss if (x & UHCI_PORTSC_LSDA)
3732 1.1 augustss status |= UPS_LOW_SPEED;
3733 1.1 augustss status |= UPS_PORT_POWER;
3734 1.1 augustss if (sc->sc_isreset)
3735 1.1 augustss change |= UPS_C_PORT_RESET;
3736 1.1 augustss USETW(ps.wPortStatus, status);
3737 1.1 augustss USETW(ps.wPortChange, change);
3738 1.1 augustss l = min(len, sizeof ps);
3739 1.1 augustss memcpy(buf, &ps, l);
3740 1.1 augustss totlen = l;
3741 1.1 augustss break;
3742 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
3743 1.63 augustss err = USBD_IOERROR;
3744 1.1 augustss goto ret;
3745 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
3746 1.1 augustss break;
3747 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
3748 1.1 augustss if (index == 1)
3749 1.1 augustss port = UHCI_PORTSC1;
3750 1.1 augustss else if (index == 2)
3751 1.1 augustss port = UHCI_PORTSC2;
3752 1.1 augustss else {
3753 1.63 augustss err = USBD_IOERROR;
3754 1.1 augustss goto ret;
3755 1.1 augustss }
3756 1.1 augustss switch(value) {
3757 1.1 augustss case UHF_PORT_ENABLE:
3758 1.137 augustss x = URWMASK(UREAD2(sc, port));
3759 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_PE);
3760 1.1 augustss break;
3761 1.1 augustss case UHF_PORT_SUSPEND:
3762 1.137 augustss x = URWMASK(UREAD2(sc, port));
3763 1.1 augustss UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
3764 1.1 augustss break;
3765 1.1 augustss case UHF_PORT_RESET:
3766 1.166 dsainty err = uhci_portreset(sc, index);
3767 1.166 dsainty goto ret;
3768 1.111 augustss case UHF_PORT_POWER:
3769 1.111 augustss /* Pretend we turned on power */
3770 1.115 mycroft err = USBD_NORMAL_COMPLETION;
3771 1.111 augustss goto ret;
3772 1.1 augustss case UHF_C_PORT_CONNECTION:
3773 1.1 augustss case UHF_C_PORT_ENABLE:
3774 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
3775 1.1 augustss case UHF_PORT_CONNECTION:
3776 1.1 augustss case UHF_PORT_OVER_CURRENT:
3777 1.1 augustss case UHF_PORT_LOW_SPEED:
3778 1.1 augustss case UHF_C_PORT_SUSPEND:
3779 1.1 augustss case UHF_C_PORT_RESET:
3780 1.1 augustss default:
3781 1.63 augustss err = USBD_IOERROR;
3782 1.1 augustss goto ret;
3783 1.1 augustss }
3784 1.1 augustss break;
3785 1.1 augustss default:
3786 1.63 augustss err = USBD_IOERROR;
3787 1.1 augustss goto ret;
3788 1.1 augustss }
3789 1.63 augustss xfer->actlen = totlen;
3790 1.63 augustss err = USBD_NORMAL_COMPLETION;
3791 1.1 augustss ret:
3792 1.63 augustss xfer->status = err;
3793 1.52 augustss s = splusb();
3794 1.63 augustss usb_transfer_complete(xfer);
3795 1.52 augustss splx(s);
3796 1.1 augustss return (USBD_IN_PROGRESS);
3797 1.1 augustss }
3798 1.1 augustss
3799 1.1 augustss /* Abort a root control request. */
3800 1.1 augustss void
3801 1.205 christos uhci_root_ctrl_abort(usbd_xfer_handle xfer)
3802 1.1 augustss {
3803 1.70 augustss /* Nothing to do, all transfers are synchronous. */
3804 1.1 augustss }
3805 1.1 augustss
3806 1.1 augustss /* Close the root pipe. */
3807 1.1 augustss void
3808 1.205 christos uhci_root_ctrl_close(usbd_pipe_handle pipe)
3809 1.1 augustss {
3810 1.1 augustss DPRINTF(("uhci_root_ctrl_close\n"));
3811 1.1 augustss }
3812 1.1 augustss
3813 1.1 augustss /* Abort a root interrupt request. */
3814 1.1 augustss void
3815 1.119 augustss uhci_root_intr_abort(usbd_xfer_handle xfer)
3816 1.1 augustss {
3817 1.216 drochner uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
3818 1.30 augustss
3819 1.96 augustss usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, xfer);
3820 1.96 augustss sc->sc_intr_xfer = NULL;
3821 1.58 augustss
3822 1.63 augustss if (xfer->pipe->intrxfer == xfer) {
3823 1.58 augustss DPRINTF(("uhci_root_intr_abort: remove\n"));
3824 1.63 augustss xfer->pipe->intrxfer = 0;
3825 1.58 augustss }
3826 1.63 augustss xfer->status = USBD_CANCELLED;
3827 1.96 augustss #ifdef DIAGNOSTIC
3828 1.96 augustss UXFER(xfer)->iinfo.isdone = 1;
3829 1.96 augustss #endif
3830 1.63 augustss usb_transfer_complete(xfer);
3831 1.1 augustss }
3832 1.1 augustss
3833 1.16 augustss usbd_status
3834 1.119 augustss uhci_root_intr_transfer(usbd_xfer_handle xfer)
3835 1.16 augustss {
3836 1.63 augustss usbd_status err;
3837 1.16 augustss
3838 1.52 augustss /* Insert last in queue. */
3839 1.63 augustss err = usb_insert_transfer(xfer);
3840 1.63 augustss if (err)
3841 1.63 augustss return (err);
3842 1.52 augustss
3843 1.186 skrll /*
3844 1.186 skrll * Pipe isn't running (otherwise err would be USBD_INPROG),
3845 1.67 augustss * start first
3846 1.67 augustss */
3847 1.63 augustss return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3848 1.16 augustss }
3849 1.16 augustss
3850 1.1 augustss /* Start a transfer on the root interrupt pipe */
3851 1.1 augustss usbd_status
3852 1.119 augustss uhci_root_intr_start(usbd_xfer_handle xfer)
3853 1.1 augustss {
3854 1.63 augustss usbd_pipe_handle pipe = xfer->pipe;
3855 1.216 drochner uhci_softc_t *sc = pipe->device->bus->hci_private;
3856 1.174 drochner unsigned int ival;
3857 1.1 augustss
3858 1.173 gson DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n",
3859 1.63 augustss xfer, xfer->length, xfer->flags));
3860 1.82 augustss
3861 1.82 augustss if (sc->sc_dying)
3862 1.82 augustss return (USBD_IOERROR);
3863 1.1 augustss
3864 1.174 drochner /* XXX temporary variable needed to avoid gcc3 warning */
3865 1.174 drochner ival = xfer->pipe->endpoint->edesc->bInterval;
3866 1.174 drochner sc->sc_ival = mstohz(ival);
3867 1.96 augustss usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
3868 1.96 augustss sc->sc_intr_xfer = xfer;
3869 1.1 augustss return (USBD_IN_PROGRESS);
3870 1.1 augustss }
3871 1.1 augustss
3872 1.1 augustss /* Close the root interrupt pipe. */
3873 1.1 augustss void
3874 1.119 augustss uhci_root_intr_close(usbd_pipe_handle pipe)
3875 1.1 augustss {
3876 1.216 drochner uhci_softc_t *sc = pipe->device->bus->hci_private;
3877 1.30 augustss
3878 1.96 augustss usb_uncallout(sc->sc_poll_handle, uhci_poll_hub, sc->sc_intr_xfer);
3879 1.96 augustss sc->sc_intr_xfer = NULL;
3880 1.1 augustss DPRINTF(("uhci_root_intr_close\n"));
3881 1.1 augustss }
3882